| 1 | /* |
| 2 | * Dynamic DMA mapping support. |
| 3 | * |
| 4 | * This implementation is a fallback for platforms that do not support |
| 5 | * I/O TLBs (aka DMA address translation hardware). |
| 6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> |
| 7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> |
| 8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co |
| 9 | * David Mosberger-Tang <davidm@hpl.hp.com> |
| 10 | * |
| 11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. |
| 12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid |
| 13 | * unnecessary i-cache flushing. |
| 14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
| 15 | * 05/09/10 linville Add support for syncing ranges, support syncing for |
| 16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. |
| 17 | * 08/12/11 beckyb Add highmem support |
| 18 | */ |
| 19 | |
| 20 | #include <linux/cache.h> |
| 21 | #include <linux/dma-mapping.h> |
| 22 | #include <linux/mm.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/spinlock.h> |
| 25 | #include <linux/string.h> |
| 26 | #include <linux/swiotlb.h> |
| 27 | #include <linux/pfn.h> |
| 28 | #include <linux/types.h> |
| 29 | #include <linux/ctype.h> |
| 30 | #include <linux/highmem.h> |
| 31 | |
| 32 | #include <asm/io.h> |
| 33 | #include <asm/dma.h> |
| 34 | #include <asm/scatterlist.h> |
| 35 | |
| 36 | #include <linux/init.h> |
| 37 | #include <linux/bootmem.h> |
| 38 | #include <linux/iommu-helper.h> |
| 39 | |
| 40 | #define OFFSET(val,align) ((unsigned long) \ |
| 41 | ( (val) & ( (align) - 1))) |
| 42 | |
| 43 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
| 44 | |
| 45 | /* |
| 46 | * Minimum IO TLB size to bother booting with. Systems with mainly |
| 47 | * 64bit capable cards will only lightly use the swiotlb. If we can't |
| 48 | * allocate a contiguous 1MB, we're probably in trouble anyway. |
| 49 | */ |
| 50 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) |
| 51 | |
| 52 | /* |
| 53 | * Enumeration for sync targets |
| 54 | */ |
| 55 | enum dma_sync_target { |
| 56 | SYNC_FOR_CPU = 0, |
| 57 | SYNC_FOR_DEVICE = 1, |
| 58 | }; |
| 59 | |
| 60 | int swiotlb_force; |
| 61 | |
| 62 | /* |
| 63 | * Used to do a quick range check in unmap_single and |
| 64 | * sync_single_*, to see if the memory was in fact allocated by this |
| 65 | * API. |
| 66 | */ |
| 67 | static char *io_tlb_start, *io_tlb_end; |
| 68 | |
| 69 | /* |
| 70 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and |
| 71 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
| 72 | */ |
| 73 | static unsigned long io_tlb_nslabs; |
| 74 | |
| 75 | /* |
| 76 | * When the IOMMU overflows we return a fallback buffer. This sets the size. |
| 77 | */ |
| 78 | static unsigned long io_tlb_overflow = 32*1024; |
| 79 | |
| 80 | void *io_tlb_overflow_buffer; |
| 81 | |
| 82 | /* |
| 83 | * This is a free list describing the number of free entries available from |
| 84 | * each index |
| 85 | */ |
| 86 | static unsigned int *io_tlb_list; |
| 87 | static unsigned int io_tlb_index; |
| 88 | |
| 89 | /* |
| 90 | * We need to save away the original address corresponding to a mapped entry |
| 91 | * for the sync operations. |
| 92 | */ |
| 93 | static phys_addr_t *io_tlb_orig_addr; |
| 94 | |
| 95 | /* |
| 96 | * Protect the above data structures in the map and unmap calls |
| 97 | */ |
| 98 | static DEFINE_SPINLOCK(io_tlb_lock); |
| 99 | |
| 100 | static int __init |
| 101 | setup_io_tlb_npages(char *str) |
| 102 | { |
| 103 | if (isdigit(*str)) { |
| 104 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
| 105 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
| 106 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 107 | } |
| 108 | if (*str == ',') |
| 109 | ++str; |
| 110 | if (!strcmp(str, "force")) |
| 111 | swiotlb_force = 1; |
| 112 | return 1; |
| 113 | } |
| 114 | __setup("swiotlb=", setup_io_tlb_npages); |
| 115 | /* make io_tlb_overflow tunable too? */ |
| 116 | |
| 117 | void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs) |
| 118 | { |
| 119 | return alloc_bootmem_low_pages(size); |
| 120 | } |
| 121 | |
| 122 | void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs) |
| 123 | { |
| 124 | return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order); |
| 125 | } |
| 126 | |
| 127 | dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr) |
| 128 | { |
| 129 | return paddr; |
| 130 | } |
| 131 | |
| 132 | phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr) |
| 133 | { |
| 134 | return baddr; |
| 135 | } |
| 136 | |
| 137 | static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev, |
| 138 | volatile void *address) |
| 139 | { |
| 140 | return swiotlb_phys_to_bus(hwdev, virt_to_phys(address)); |
| 141 | } |
| 142 | |
| 143 | static void *swiotlb_bus_to_virt(dma_addr_t address) |
| 144 | { |
| 145 | return phys_to_virt(swiotlb_bus_to_phys(address)); |
| 146 | } |
| 147 | |
| 148 | int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size) |
| 149 | { |
| 150 | return 0; |
| 151 | } |
| 152 | |
| 153 | static void swiotlb_print_info(unsigned long bytes) |
| 154 | { |
| 155 | phys_addr_t pstart, pend; |
| 156 | |
| 157 | pstart = virt_to_phys(io_tlb_start); |
| 158 | pend = virt_to_phys(io_tlb_end); |
| 159 | |
| 160 | printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n", |
| 161 | bytes >> 20, io_tlb_start, io_tlb_end); |
| 162 | printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n", |
| 163 | (unsigned long long)pstart, |
| 164 | (unsigned long long)pend); |
| 165 | } |
| 166 | |
| 167 | /* |
| 168 | * Statically reserve bounce buffer space and initialize bounce buffer data |
| 169 | * structures for the software IO TLB used to implement the DMA API. |
| 170 | */ |
| 171 | void __init |
| 172 | swiotlb_init_with_default_size(size_t default_size) |
| 173 | { |
| 174 | unsigned long i, bytes; |
| 175 | |
| 176 | if (!io_tlb_nslabs) { |
| 177 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
| 178 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 179 | } |
| 180 | |
| 181 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 182 | |
| 183 | /* |
| 184 | * Get IO TLB memory from the low pages |
| 185 | */ |
| 186 | io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs); |
| 187 | if (!io_tlb_start) |
| 188 | panic("Cannot allocate SWIOTLB buffer"); |
| 189 | io_tlb_end = io_tlb_start + bytes; |
| 190 | |
| 191 | /* |
| 192 | * Allocate and initialize the free list array. This array is used |
| 193 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE |
| 194 | * between io_tlb_start and io_tlb_end. |
| 195 | */ |
| 196 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); |
| 197 | for (i = 0; i < io_tlb_nslabs; i++) |
| 198 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
| 199 | io_tlb_index = 0; |
| 200 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t)); |
| 201 | |
| 202 | /* |
| 203 | * Get the overflow emergency buffer |
| 204 | */ |
| 205 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); |
| 206 | if (!io_tlb_overflow_buffer) |
| 207 | panic("Cannot allocate SWIOTLB overflow buffer!\n"); |
| 208 | |
| 209 | swiotlb_print_info(bytes); |
| 210 | } |
| 211 | |
| 212 | void __init |
| 213 | swiotlb_init(void) |
| 214 | { |
| 215 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ |
| 216 | } |
| 217 | |
| 218 | /* |
| 219 | * Systems with larger DMA zones (those that don't support ISA) can |
| 220 | * initialize the swiotlb later using the slab allocator if needed. |
| 221 | * This should be just like above, but with some error catching. |
| 222 | */ |
| 223 | int |
| 224 | swiotlb_late_init_with_default_size(size_t default_size) |
| 225 | { |
| 226 | unsigned long i, bytes, req_nslabs = io_tlb_nslabs; |
| 227 | unsigned int order; |
| 228 | |
| 229 | if (!io_tlb_nslabs) { |
| 230 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); |
| 231 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); |
| 232 | } |
| 233 | |
| 234 | /* |
| 235 | * Get IO TLB memory from the low pages |
| 236 | */ |
| 237 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
| 238 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
| 239 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 240 | |
| 241 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { |
| 242 | io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs); |
| 243 | if (io_tlb_start) |
| 244 | break; |
| 245 | order--; |
| 246 | } |
| 247 | |
| 248 | if (!io_tlb_start) |
| 249 | goto cleanup1; |
| 250 | |
| 251 | if (order != get_order(bytes)) { |
| 252 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " |
| 253 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); |
| 254 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
| 255 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
| 256 | } |
| 257 | io_tlb_end = io_tlb_start + bytes; |
| 258 | memset(io_tlb_start, 0, bytes); |
| 259 | |
| 260 | /* |
| 261 | * Allocate and initialize the free list array. This array is used |
| 262 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE |
| 263 | * between io_tlb_start and io_tlb_end. |
| 264 | */ |
| 265 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, |
| 266 | get_order(io_tlb_nslabs * sizeof(int))); |
| 267 | if (!io_tlb_list) |
| 268 | goto cleanup2; |
| 269 | |
| 270 | for (i = 0; i < io_tlb_nslabs; i++) |
| 271 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); |
| 272 | io_tlb_index = 0; |
| 273 | |
| 274 | io_tlb_orig_addr = (phys_addr_t *) |
| 275 | __get_free_pages(GFP_KERNEL, |
| 276 | get_order(io_tlb_nslabs * |
| 277 | sizeof(phys_addr_t))); |
| 278 | if (!io_tlb_orig_addr) |
| 279 | goto cleanup3; |
| 280 | |
| 281 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t)); |
| 282 | |
| 283 | /* |
| 284 | * Get the overflow emergency buffer |
| 285 | */ |
| 286 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, |
| 287 | get_order(io_tlb_overflow)); |
| 288 | if (!io_tlb_overflow_buffer) |
| 289 | goto cleanup4; |
| 290 | |
| 291 | swiotlb_print_info(bytes); |
| 292 | |
| 293 | return 0; |
| 294 | |
| 295 | cleanup4: |
| 296 | free_pages((unsigned long)io_tlb_orig_addr, |
| 297 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); |
| 298 | io_tlb_orig_addr = NULL; |
| 299 | cleanup3: |
| 300 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
| 301 | sizeof(int))); |
| 302 | io_tlb_list = NULL; |
| 303 | cleanup2: |
| 304 | io_tlb_end = NULL; |
| 305 | free_pages((unsigned long)io_tlb_start, order); |
| 306 | io_tlb_start = NULL; |
| 307 | cleanup1: |
| 308 | io_tlb_nslabs = req_nslabs; |
| 309 | return -ENOMEM; |
| 310 | } |
| 311 | |
| 312 | static int |
| 313 | address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size) |
| 314 | { |
| 315 | return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size); |
| 316 | } |
| 317 | |
| 318 | static inline int range_needs_mapping(phys_addr_t paddr, size_t size) |
| 319 | { |
| 320 | return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size); |
| 321 | } |
| 322 | |
| 323 | static int is_swiotlb_buffer(char *addr) |
| 324 | { |
| 325 | return addr >= io_tlb_start && addr < io_tlb_end; |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * Bounce: copy the swiotlb buffer back to the original dma location |
| 330 | */ |
| 331 | static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size, |
| 332 | enum dma_data_direction dir) |
| 333 | { |
| 334 | unsigned long pfn = PFN_DOWN(phys); |
| 335 | |
| 336 | if (PageHighMem(pfn_to_page(pfn))) { |
| 337 | /* The buffer does not have a mapping. Map it in and copy */ |
| 338 | unsigned int offset = phys & ~PAGE_MASK; |
| 339 | char *buffer; |
| 340 | unsigned int sz = 0; |
| 341 | unsigned long flags; |
| 342 | |
| 343 | while (size) { |
| 344 | sz = min(PAGE_SIZE - offset, size); |
| 345 | |
| 346 | local_irq_save(flags); |
| 347 | buffer = kmap_atomic(pfn_to_page(pfn), |
| 348 | KM_BOUNCE_READ); |
| 349 | if (dir == DMA_TO_DEVICE) |
| 350 | memcpy(dma_addr, buffer + offset, sz); |
| 351 | else |
| 352 | memcpy(buffer + offset, dma_addr, sz); |
| 353 | kunmap_atomic(buffer, KM_BOUNCE_READ); |
| 354 | local_irq_restore(flags); |
| 355 | |
| 356 | size -= sz; |
| 357 | pfn++; |
| 358 | dma_addr += sz; |
| 359 | offset = 0; |
| 360 | } |
| 361 | } else { |
| 362 | if (dir == DMA_TO_DEVICE) |
| 363 | memcpy(dma_addr, phys_to_virt(phys), size); |
| 364 | else |
| 365 | memcpy(phys_to_virt(phys), dma_addr, size); |
| 366 | } |
| 367 | } |
| 368 | |
| 369 | /* |
| 370 | * Allocates bounce buffer and returns its kernel virtual address. |
| 371 | */ |
| 372 | static void * |
| 373 | map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir) |
| 374 | { |
| 375 | unsigned long flags; |
| 376 | char *dma_addr; |
| 377 | unsigned int nslots, stride, index, wrap; |
| 378 | int i; |
| 379 | unsigned long start_dma_addr; |
| 380 | unsigned long mask; |
| 381 | unsigned long offset_slots; |
| 382 | unsigned long max_slots; |
| 383 | |
| 384 | mask = dma_get_seg_boundary(hwdev); |
| 385 | start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask; |
| 386 | |
| 387 | offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 388 | |
| 389 | /* |
| 390 | * Carefully handle integer overflow which can occur when mask == ~0UL. |
| 391 | */ |
| 392 | max_slots = mask + 1 |
| 393 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT |
| 394 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); |
| 395 | |
| 396 | /* |
| 397 | * For mappings greater than a page, we limit the stride (and |
| 398 | * hence alignment) to a page size. |
| 399 | */ |
| 400 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 401 | if (size > PAGE_SIZE) |
| 402 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); |
| 403 | else |
| 404 | stride = 1; |
| 405 | |
| 406 | BUG_ON(!nslots); |
| 407 | |
| 408 | /* |
| 409 | * Find suitable number of IO TLB entries size that will fit this |
| 410 | * request and allocate a buffer from that IO TLB pool. |
| 411 | */ |
| 412 | spin_lock_irqsave(&io_tlb_lock, flags); |
| 413 | index = ALIGN(io_tlb_index, stride); |
| 414 | if (index >= io_tlb_nslabs) |
| 415 | index = 0; |
| 416 | wrap = index; |
| 417 | |
| 418 | do { |
| 419 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
| 420 | max_slots)) { |
| 421 | index += stride; |
| 422 | if (index >= io_tlb_nslabs) |
| 423 | index = 0; |
| 424 | if (index == wrap) |
| 425 | goto not_found; |
| 426 | } |
| 427 | |
| 428 | /* |
| 429 | * If we find a slot that indicates we have 'nslots' number of |
| 430 | * contiguous buffers, we allocate the buffers from that slot |
| 431 | * and mark the entries as '0' indicating unavailable. |
| 432 | */ |
| 433 | if (io_tlb_list[index] >= nslots) { |
| 434 | int count = 0; |
| 435 | |
| 436 | for (i = index; i < (int) (index + nslots); i++) |
| 437 | io_tlb_list[i] = 0; |
| 438 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) |
| 439 | io_tlb_list[i] = ++count; |
| 440 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); |
| 441 | |
| 442 | /* |
| 443 | * Update the indices to avoid searching in the next |
| 444 | * round. |
| 445 | */ |
| 446 | io_tlb_index = ((index + nslots) < io_tlb_nslabs |
| 447 | ? (index + nslots) : 0); |
| 448 | |
| 449 | goto found; |
| 450 | } |
| 451 | index += stride; |
| 452 | if (index >= io_tlb_nslabs) |
| 453 | index = 0; |
| 454 | } while (index != wrap); |
| 455 | |
| 456 | not_found: |
| 457 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 458 | return NULL; |
| 459 | found: |
| 460 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 461 | |
| 462 | /* |
| 463 | * Save away the mapping from the original address to the DMA address. |
| 464 | * This is needed when we sync the memory. Then we sync the buffer if |
| 465 | * needed. |
| 466 | */ |
| 467 | for (i = 0; i < nslots; i++) |
| 468 | io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT); |
| 469 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
| 470 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
| 471 | |
| 472 | return dma_addr; |
| 473 | } |
| 474 | |
| 475 | /* |
| 476 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. |
| 477 | */ |
| 478 | static void |
| 479 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) |
| 480 | { |
| 481 | unsigned long flags; |
| 482 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; |
| 483 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
| 484 | phys_addr_t phys = io_tlb_orig_addr[index]; |
| 485 | |
| 486 | /* |
| 487 | * First, sync the memory before unmapping the entry |
| 488 | */ |
| 489 | if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
| 490 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
| 491 | |
| 492 | /* |
| 493 | * Return the buffer to the free list by setting the corresponding |
| 494 | * entries to indicate the number of contigous entries available. |
| 495 | * While returning the entries to the free list, we merge the entries |
| 496 | * with slots below and above the pool being returned. |
| 497 | */ |
| 498 | spin_lock_irqsave(&io_tlb_lock, flags); |
| 499 | { |
| 500 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? |
| 501 | io_tlb_list[index + nslots] : 0); |
| 502 | /* |
| 503 | * Step 1: return the slots to the free list, merging the |
| 504 | * slots with superceeding slots |
| 505 | */ |
| 506 | for (i = index + nslots - 1; i >= index; i--) |
| 507 | io_tlb_list[i] = ++count; |
| 508 | /* |
| 509 | * Step 2: merge the returned slots with the preceding slots, |
| 510 | * if available (non zero) |
| 511 | */ |
| 512 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) |
| 513 | io_tlb_list[i] = ++count; |
| 514 | } |
| 515 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
| 516 | } |
| 517 | |
| 518 | static void |
| 519 | sync_single(struct device *hwdev, char *dma_addr, size_t size, |
| 520 | int dir, int target) |
| 521 | { |
| 522 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; |
| 523 | phys_addr_t phys = io_tlb_orig_addr[index]; |
| 524 | |
| 525 | phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1)); |
| 526 | |
| 527 | switch (target) { |
| 528 | case SYNC_FOR_CPU: |
| 529 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 530 | swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE); |
| 531 | else |
| 532 | BUG_ON(dir != DMA_TO_DEVICE); |
| 533 | break; |
| 534 | case SYNC_FOR_DEVICE: |
| 535 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) |
| 536 | swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE); |
| 537 | else |
| 538 | BUG_ON(dir != DMA_FROM_DEVICE); |
| 539 | break; |
| 540 | default: |
| 541 | BUG(); |
| 542 | } |
| 543 | } |
| 544 | |
| 545 | void * |
| 546 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, |
| 547 | dma_addr_t *dma_handle, gfp_t flags) |
| 548 | { |
| 549 | dma_addr_t dev_addr; |
| 550 | void *ret; |
| 551 | int order = get_order(size); |
| 552 | u64 dma_mask = DMA_BIT_MASK(32); |
| 553 | |
| 554 | if (hwdev && hwdev->coherent_dma_mask) |
| 555 | dma_mask = hwdev->coherent_dma_mask; |
| 556 | |
| 557 | ret = (void *)__get_free_pages(flags, order); |
| 558 | if (ret && |
| 559 | !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret), |
| 560 | size)) { |
| 561 | /* |
| 562 | * The allocated memory isn't reachable by the device. |
| 563 | */ |
| 564 | free_pages((unsigned long) ret, order); |
| 565 | ret = NULL; |
| 566 | } |
| 567 | if (!ret) { |
| 568 | /* |
| 569 | * We are either out of memory or the device can't DMA |
| 570 | * to GFP_DMA memory; fall back on map_single(), which |
| 571 | * will grab memory from the lowest available address range. |
| 572 | */ |
| 573 | ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE); |
| 574 | if (!ret) |
| 575 | return NULL; |
| 576 | } |
| 577 | |
| 578 | memset(ret, 0, size); |
| 579 | dev_addr = swiotlb_virt_to_bus(hwdev, ret); |
| 580 | |
| 581 | /* Confirm address can be DMA'd by device */ |
| 582 | if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) { |
| 583 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n", |
| 584 | (unsigned long long)dma_mask, |
| 585 | (unsigned long long)dev_addr); |
| 586 | |
| 587 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ |
| 588 | unmap_single(hwdev, ret, size, DMA_TO_DEVICE); |
| 589 | return NULL; |
| 590 | } |
| 591 | *dma_handle = dev_addr; |
| 592 | return ret; |
| 593 | } |
| 594 | EXPORT_SYMBOL(swiotlb_alloc_coherent); |
| 595 | |
| 596 | void |
| 597 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, |
| 598 | dma_addr_t dma_handle) |
| 599 | { |
| 600 | WARN_ON(irqs_disabled()); |
| 601 | if (!is_swiotlb_buffer(vaddr)) |
| 602 | free_pages((unsigned long) vaddr, get_order(size)); |
| 603 | else |
| 604 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ |
| 605 | unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE); |
| 606 | } |
| 607 | EXPORT_SYMBOL(swiotlb_free_coherent); |
| 608 | |
| 609 | static void |
| 610 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) |
| 611 | { |
| 612 | /* |
| 613 | * Ran out of IOMMU space for this operation. This is very bad. |
| 614 | * Unfortunately the drivers cannot handle this operation properly. |
| 615 | * unless they check for dma_mapping_error (most don't) |
| 616 | * When the mapping is small enough return a static buffer to limit |
| 617 | * the damage, or panic when the transfer is too big. |
| 618 | */ |
| 619 | printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at " |
| 620 | "device %s\n", size, dev ? dev_name(dev) : "?"); |
| 621 | |
| 622 | if (size > io_tlb_overflow && do_panic) { |
| 623 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
| 624 | panic("DMA: Memory would be corrupted\n"); |
| 625 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
| 626 | panic("DMA: Random memory would be DMAed\n"); |
| 627 | } |
| 628 | } |
| 629 | |
| 630 | /* |
| 631 | * Map a single buffer of the indicated size for DMA in streaming mode. The |
| 632 | * physical address to use is returned. |
| 633 | * |
| 634 | * Once the device is given the dma address, the device owns this memory until |
| 635 | * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. |
| 636 | */ |
| 637 | dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, |
| 638 | unsigned long offset, size_t size, |
| 639 | enum dma_data_direction dir, |
| 640 | struct dma_attrs *attrs) |
| 641 | { |
| 642 | phys_addr_t phys = page_to_phys(page) + offset; |
| 643 | void *ptr = page_address(page) + offset; |
| 644 | dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys); |
| 645 | void *map; |
| 646 | |
| 647 | BUG_ON(dir == DMA_NONE); |
| 648 | /* |
| 649 | * If the address happens to be in the device's DMA window, |
| 650 | * we can safely return the device addr and not worry about bounce |
| 651 | * buffering it. |
| 652 | */ |
| 653 | if (!address_needs_mapping(dev, dev_addr, size) && |
| 654 | !range_needs_mapping(virt_to_phys(ptr), size)) |
| 655 | return dev_addr; |
| 656 | |
| 657 | /* |
| 658 | * Oh well, have to allocate and map a bounce buffer. |
| 659 | */ |
| 660 | map = map_single(dev, phys, size, dir); |
| 661 | if (!map) { |
| 662 | swiotlb_full(dev, size, dir, 1); |
| 663 | map = io_tlb_overflow_buffer; |
| 664 | } |
| 665 | |
| 666 | dev_addr = swiotlb_virt_to_bus(dev, map); |
| 667 | |
| 668 | /* |
| 669 | * Ensure that the address returned is DMA'ble |
| 670 | */ |
| 671 | if (address_needs_mapping(dev, dev_addr, size)) |
| 672 | panic("map_single: bounce buffer is not DMA'ble"); |
| 673 | |
| 674 | return dev_addr; |
| 675 | } |
| 676 | EXPORT_SYMBOL_GPL(swiotlb_map_page); |
| 677 | |
| 678 | /* |
| 679 | * Unmap a single streaming mode DMA translation. The dma_addr and size must |
| 680 | * match what was provided for in a previous swiotlb_map_page call. All |
| 681 | * other usages are undefined. |
| 682 | * |
| 683 | * After this call, reads by the cpu to the buffer are guaranteed to see |
| 684 | * whatever the device wrote there. |
| 685 | */ |
| 686 | void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, |
| 687 | size_t size, enum dma_data_direction dir, |
| 688 | struct dma_attrs *attrs) |
| 689 | { |
| 690 | char *dma_addr = swiotlb_bus_to_virt(dev_addr); |
| 691 | |
| 692 | BUG_ON(dir == DMA_NONE); |
| 693 | if (is_swiotlb_buffer(dma_addr)) |
| 694 | unmap_single(hwdev, dma_addr, size, dir); |
| 695 | else if (dir == DMA_FROM_DEVICE) |
| 696 | dma_mark_clean(dma_addr, size); |
| 697 | } |
| 698 | EXPORT_SYMBOL_GPL(swiotlb_unmap_page); |
| 699 | |
| 700 | /* |
| 701 | * Make physical memory consistent for a single streaming mode DMA translation |
| 702 | * after a transfer. |
| 703 | * |
| 704 | * If you perform a swiotlb_map_page() but wish to interrogate the buffer |
| 705 | * using the cpu, yet do not wish to teardown the dma mapping, you must |
| 706 | * call this function before doing so. At the next point you give the dma |
| 707 | * address back to the card, you must first perform a |
| 708 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer |
| 709 | */ |
| 710 | static void |
| 711 | swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, |
| 712 | size_t size, int dir, int target) |
| 713 | { |
| 714 | char *dma_addr = swiotlb_bus_to_virt(dev_addr); |
| 715 | |
| 716 | BUG_ON(dir == DMA_NONE); |
| 717 | if (is_swiotlb_buffer(dma_addr)) |
| 718 | sync_single(hwdev, dma_addr, size, dir, target); |
| 719 | else if (dir == DMA_FROM_DEVICE) |
| 720 | dma_mark_clean(dma_addr, size); |
| 721 | } |
| 722 | |
| 723 | void |
| 724 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, |
| 725 | size_t size, enum dma_data_direction dir) |
| 726 | { |
| 727 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); |
| 728 | } |
| 729 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); |
| 730 | |
| 731 | void |
| 732 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, |
| 733 | size_t size, enum dma_data_direction dir) |
| 734 | { |
| 735 | swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); |
| 736 | } |
| 737 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); |
| 738 | |
| 739 | /* |
| 740 | * Same as above, but for a sub-range of the mapping. |
| 741 | */ |
| 742 | static void |
| 743 | swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr, |
| 744 | unsigned long offset, size_t size, |
| 745 | int dir, int target) |
| 746 | { |
| 747 | char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset; |
| 748 | |
| 749 | BUG_ON(dir == DMA_NONE); |
| 750 | if (is_swiotlb_buffer(dma_addr)) |
| 751 | sync_single(hwdev, dma_addr, size, dir, target); |
| 752 | else if (dir == DMA_FROM_DEVICE) |
| 753 | dma_mark_clean(dma_addr, size); |
| 754 | } |
| 755 | |
| 756 | void |
| 757 | swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, |
| 758 | unsigned long offset, size_t size, |
| 759 | enum dma_data_direction dir) |
| 760 | { |
| 761 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
| 762 | SYNC_FOR_CPU); |
| 763 | } |
| 764 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu); |
| 765 | |
| 766 | void |
| 767 | swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, |
| 768 | unsigned long offset, size_t size, |
| 769 | enum dma_data_direction dir) |
| 770 | { |
| 771 | swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir, |
| 772 | SYNC_FOR_DEVICE); |
| 773 | } |
| 774 | EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device); |
| 775 | |
| 776 | /* |
| 777 | * Map a set of buffers described by scatterlist in streaming mode for DMA. |
| 778 | * This is the scatter-gather version of the above swiotlb_map_page |
| 779 | * interface. Here the scatter gather list elements are each tagged with the |
| 780 | * appropriate dma address and length. They are obtained via |
| 781 | * sg_dma_{address,length}(SG). |
| 782 | * |
| 783 | * NOTE: An implementation may be able to use a smaller number of |
| 784 | * DMA address/length pairs than there are SG table elements. |
| 785 | * (for example via virtual mapping capabilities) |
| 786 | * The routine returns the number of addr/length pairs actually |
| 787 | * used, at most nents. |
| 788 | * |
| 789 | * Device ownership issues as mentioned above for swiotlb_map_page are the |
| 790 | * same here. |
| 791 | */ |
| 792 | int |
| 793 | swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, |
| 794 | enum dma_data_direction dir, struct dma_attrs *attrs) |
| 795 | { |
| 796 | struct scatterlist *sg; |
| 797 | int i; |
| 798 | |
| 799 | BUG_ON(dir == DMA_NONE); |
| 800 | |
| 801 | for_each_sg(sgl, sg, nelems, i) { |
| 802 | phys_addr_t paddr = sg_phys(sg); |
| 803 | dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr); |
| 804 | |
| 805 | if (range_needs_mapping(paddr, sg->length) || |
| 806 | address_needs_mapping(hwdev, dev_addr, sg->length)) { |
| 807 | void *map = map_single(hwdev, sg_phys(sg), |
| 808 | sg->length, dir); |
| 809 | if (!map) { |
| 810 | /* Don't panic here, we expect map_sg users |
| 811 | to do proper error handling. */ |
| 812 | swiotlb_full(hwdev, sg->length, dir, 0); |
| 813 | swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir, |
| 814 | attrs); |
| 815 | sgl[0].dma_length = 0; |
| 816 | return 0; |
| 817 | } |
| 818 | sg->dma_address = swiotlb_virt_to_bus(hwdev, map); |
| 819 | } else |
| 820 | sg->dma_address = dev_addr; |
| 821 | sg->dma_length = sg->length; |
| 822 | } |
| 823 | return nelems; |
| 824 | } |
| 825 | EXPORT_SYMBOL(swiotlb_map_sg_attrs); |
| 826 | |
| 827 | int |
| 828 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, |
| 829 | int dir) |
| 830 | { |
| 831 | return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL); |
| 832 | } |
| 833 | EXPORT_SYMBOL(swiotlb_map_sg); |
| 834 | |
| 835 | /* |
| 836 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules |
| 837 | * concerning calls here are the same as for swiotlb_unmap_page() above. |
| 838 | */ |
| 839 | void |
| 840 | swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, |
| 841 | int nelems, enum dma_data_direction dir, struct dma_attrs *attrs) |
| 842 | { |
| 843 | struct scatterlist *sg; |
| 844 | int i; |
| 845 | |
| 846 | BUG_ON(dir == DMA_NONE); |
| 847 | |
| 848 | for_each_sg(sgl, sg, nelems, i) { |
| 849 | if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg))) |
| 850 | unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address), |
| 851 | sg->dma_length, dir); |
| 852 | else if (dir == DMA_FROM_DEVICE) |
| 853 | dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length); |
| 854 | } |
| 855 | } |
| 856 | EXPORT_SYMBOL(swiotlb_unmap_sg_attrs); |
| 857 | |
| 858 | void |
| 859 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems, |
| 860 | int dir) |
| 861 | { |
| 862 | return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL); |
| 863 | } |
| 864 | EXPORT_SYMBOL(swiotlb_unmap_sg); |
| 865 | |
| 866 | /* |
| 867 | * Make physical memory consistent for a set of streaming mode DMA translations |
| 868 | * after a transfer. |
| 869 | * |
| 870 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules |
| 871 | * and usage. |
| 872 | */ |
| 873 | static void |
| 874 | swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, |
| 875 | int nelems, int dir, int target) |
| 876 | { |
| 877 | struct scatterlist *sg; |
| 878 | int i; |
| 879 | |
| 880 | BUG_ON(dir == DMA_NONE); |
| 881 | |
| 882 | for_each_sg(sgl, sg, nelems, i) { |
| 883 | if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg))) |
| 884 | sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address), |
| 885 | sg->dma_length, dir, target); |
| 886 | else if (dir == DMA_FROM_DEVICE) |
| 887 | dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length); |
| 888 | } |
| 889 | } |
| 890 | |
| 891 | void |
| 892 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, |
| 893 | int nelems, enum dma_data_direction dir) |
| 894 | { |
| 895 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); |
| 896 | } |
| 897 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); |
| 898 | |
| 899 | void |
| 900 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, |
| 901 | int nelems, enum dma_data_direction dir) |
| 902 | { |
| 903 | swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); |
| 904 | } |
| 905 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); |
| 906 | |
| 907 | int |
| 908 | swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr) |
| 909 | { |
| 910 | return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer)); |
| 911 | } |
| 912 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); |
| 913 | |
| 914 | /* |
| 915 | * Return whether the given device DMA address mask can be supported |
| 916 | * properly. For example, if your device can only drive the low 24-bits |
| 917 | * during bus mastering, then you would pass 0x00ffffff as the mask to |
| 918 | * this function. |
| 919 | */ |
| 920 | int |
| 921 | swiotlb_dma_supported(struct device *hwdev, u64 mask) |
| 922 | { |
| 923 | return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask; |
| 924 | } |
| 925 | EXPORT_SYMBOL(swiotlb_dma_supported); |