| 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Exceet Electronics GmbH |
| 4 | * Copyright (C) 2018 Bootlin |
| 5 | * |
| 6 | * Author: Boris Brezillon <boris.brezillon@bootlin.com> |
| 7 | */ |
| 8 | #include <linux/dmaengine.h> |
| 9 | #include <linux/iopoll.h> |
| 10 | #include <linux/pm_runtime.h> |
| 11 | #include <linux/spi/spi.h> |
| 12 | #include <linux/spi/spi-mem.h> |
| 13 | #include <linux/sched/task_stack.h> |
| 14 | |
| 15 | #include "internals.h" |
| 16 | |
| 17 | #define SPI_MEM_MAX_BUSWIDTH 8 |
| 18 | |
| 19 | /** |
| 20 | * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a |
| 21 | * memory operation |
| 22 | * @ctlr: the SPI controller requesting this dma_map() |
| 23 | * @op: the memory operation containing the buffer to map |
| 24 | * @sgt: a pointer to a non-initialized sg_table that will be filled by this |
| 25 | * function |
| 26 | * |
| 27 | * Some controllers might want to do DMA on the data buffer embedded in @op. |
| 28 | * This helper prepares everything for you and provides a ready-to-use |
| 29 | * sg_table. This function is not intended to be called from spi drivers. |
| 30 | * Only SPI controller drivers should use it. |
| 31 | * Note that the caller must ensure the memory region pointed by |
| 32 | * op->data.buf.{in,out} is DMA-able before calling this function. |
| 33 | * |
| 34 | * Return: 0 in case of success, a negative error code otherwise. |
| 35 | */ |
| 36 | int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, |
| 37 | const struct spi_mem_op *op, |
| 38 | struct sg_table *sgt) |
| 39 | { |
| 40 | struct device *dmadev; |
| 41 | |
| 42 | if (!op->data.nbytes) |
| 43 | return -EINVAL; |
| 44 | |
| 45 | if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) |
| 46 | dmadev = ctlr->dma_tx->device->dev; |
| 47 | else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx) |
| 48 | dmadev = ctlr->dma_rx->device->dev; |
| 49 | else |
| 50 | dmadev = ctlr->dev.parent; |
| 51 | |
| 52 | if (!dmadev) |
| 53 | return -EINVAL; |
| 54 | |
| 55 | return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes, |
| 56 | op->data.dir == SPI_MEM_DATA_IN ? |
| 57 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
| 58 | } |
| 59 | EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data); |
| 60 | |
| 61 | /** |
| 62 | * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a |
| 63 | * memory operation |
| 64 | * @ctlr: the SPI controller requesting this dma_unmap() |
| 65 | * @op: the memory operation containing the buffer to unmap |
| 66 | * @sgt: a pointer to an sg_table previously initialized by |
| 67 | * spi_controller_dma_map_mem_op_data() |
| 68 | * |
| 69 | * Some controllers might want to do DMA on the data buffer embedded in @op. |
| 70 | * This helper prepares things so that the CPU can access the |
| 71 | * op->data.buf.{in,out} buffer again. |
| 72 | * |
| 73 | * This function is not intended to be called from SPI drivers. Only SPI |
| 74 | * controller drivers should use it. |
| 75 | * |
| 76 | * This function should be called after the DMA operation has finished and is |
| 77 | * only valid if the previous spi_controller_dma_map_mem_op_data() call |
| 78 | * returned 0. |
| 79 | * |
| 80 | * Return: 0 in case of success, a negative error code otherwise. |
| 81 | */ |
| 82 | void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, |
| 83 | const struct spi_mem_op *op, |
| 84 | struct sg_table *sgt) |
| 85 | { |
| 86 | struct device *dmadev; |
| 87 | |
| 88 | if (!op->data.nbytes) |
| 89 | return; |
| 90 | |
| 91 | if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx) |
| 92 | dmadev = ctlr->dma_tx->device->dev; |
| 93 | else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx) |
| 94 | dmadev = ctlr->dma_rx->device->dev; |
| 95 | else |
| 96 | dmadev = ctlr->dev.parent; |
| 97 | |
| 98 | spi_unmap_buf(ctlr, dmadev, sgt, |
| 99 | op->data.dir == SPI_MEM_DATA_IN ? |
| 100 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
| 101 | } |
| 102 | EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data); |
| 103 | |
| 104 | static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx) |
| 105 | { |
| 106 | u32 mode = mem->spi->mode; |
| 107 | |
| 108 | switch (buswidth) { |
| 109 | case 1: |
| 110 | return 0; |
| 111 | |
| 112 | case 2: |
| 113 | if ((tx && |
| 114 | (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) || |
| 115 | (!tx && |
| 116 | (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL)))) |
| 117 | return 0; |
| 118 | |
| 119 | break; |
| 120 | |
| 121 | case 4: |
| 122 | if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) || |
| 123 | (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL)))) |
| 124 | return 0; |
| 125 | |
| 126 | break; |
| 127 | |
| 128 | case 8: |
| 129 | if ((tx && (mode & SPI_TX_OCTAL)) || |
| 130 | (!tx && (mode & SPI_RX_OCTAL))) |
| 131 | return 0; |
| 132 | |
| 133 | break; |
| 134 | |
| 135 | default: |
| 136 | break; |
| 137 | } |
| 138 | |
| 139 | return -ENOTSUPP; |
| 140 | } |
| 141 | |
| 142 | static bool spi_mem_check_buswidth(struct spi_mem *mem, |
| 143 | const struct spi_mem_op *op) |
| 144 | { |
| 145 | if (spi_check_buswidth_req(mem, op->cmd.buswidth, true)) |
| 146 | return false; |
| 147 | |
| 148 | if (op->addr.nbytes && |
| 149 | spi_check_buswidth_req(mem, op->addr.buswidth, true)) |
| 150 | return false; |
| 151 | |
| 152 | if (op->dummy.nbytes && |
| 153 | spi_check_buswidth_req(mem, op->dummy.buswidth, true)) |
| 154 | return false; |
| 155 | |
| 156 | if (op->data.dir != SPI_MEM_NO_DATA && |
| 157 | spi_check_buswidth_req(mem, op->data.buswidth, |
| 158 | op->data.dir == SPI_MEM_DATA_OUT)) |
| 159 | return false; |
| 160 | |
| 161 | return true; |
| 162 | } |
| 163 | |
| 164 | bool spi_mem_default_supports_op(struct spi_mem *mem, |
| 165 | const struct spi_mem_op *op) |
| 166 | { |
| 167 | struct spi_controller *ctlr = mem->spi->controller; |
| 168 | bool op_is_dtr = |
| 169 | op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr; |
| 170 | |
| 171 | if (op_is_dtr) { |
| 172 | if (!spi_mem_controller_is_capable(ctlr, dtr)) |
| 173 | return false; |
| 174 | |
| 175 | if (op->cmd.nbytes != 2) |
| 176 | return false; |
| 177 | } else { |
| 178 | if (op->cmd.nbytes != 1) |
| 179 | return false; |
| 180 | } |
| 181 | |
| 182 | if (op->data.ecc) { |
| 183 | if (!spi_mem_controller_is_capable(ctlr, ecc)) |
| 184 | return false; |
| 185 | } |
| 186 | |
| 187 | return spi_mem_check_buswidth(mem, op); |
| 188 | } |
| 189 | EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); |
| 190 | |
| 191 | static bool spi_mem_buswidth_is_valid(u8 buswidth) |
| 192 | { |
| 193 | if (hweight8(buswidth) > 1 || buswidth > SPI_MEM_MAX_BUSWIDTH) |
| 194 | return false; |
| 195 | |
| 196 | return true; |
| 197 | } |
| 198 | |
| 199 | static int spi_mem_check_op(const struct spi_mem_op *op) |
| 200 | { |
| 201 | if (!op->cmd.buswidth || !op->cmd.nbytes) |
| 202 | return -EINVAL; |
| 203 | |
| 204 | if ((op->addr.nbytes && !op->addr.buswidth) || |
| 205 | (op->dummy.nbytes && !op->dummy.buswidth) || |
| 206 | (op->data.nbytes && !op->data.buswidth)) |
| 207 | return -EINVAL; |
| 208 | |
| 209 | if (!spi_mem_buswidth_is_valid(op->cmd.buswidth) || |
| 210 | !spi_mem_buswidth_is_valid(op->addr.buswidth) || |
| 211 | !spi_mem_buswidth_is_valid(op->dummy.buswidth) || |
| 212 | !spi_mem_buswidth_is_valid(op->data.buswidth)) |
| 213 | return -EINVAL; |
| 214 | |
| 215 | /* Buffers must be DMA-able. */ |
| 216 | if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_IN && |
| 217 | object_is_on_stack(op->data.buf.in))) |
| 218 | return -EINVAL; |
| 219 | |
| 220 | if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_OUT && |
| 221 | object_is_on_stack(op->data.buf.out))) |
| 222 | return -EINVAL; |
| 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | static bool spi_mem_internal_supports_op(struct spi_mem *mem, |
| 228 | const struct spi_mem_op *op) |
| 229 | { |
| 230 | struct spi_controller *ctlr = mem->spi->controller; |
| 231 | |
| 232 | if (ctlr->mem_ops && ctlr->mem_ops->supports_op) |
| 233 | return ctlr->mem_ops->supports_op(mem, op); |
| 234 | |
| 235 | return spi_mem_default_supports_op(mem, op); |
| 236 | } |
| 237 | |
| 238 | /** |
| 239 | * spi_mem_supports_op() - Check if a memory device and the controller it is |
| 240 | * connected to support a specific memory operation |
| 241 | * @mem: the SPI memory |
| 242 | * @op: the memory operation to check |
| 243 | * |
| 244 | * Some controllers are only supporting Single or Dual IOs, others might only |
| 245 | * support specific opcodes, or it can even be that the controller and device |
| 246 | * both support Quad IOs but the hardware prevents you from using it because |
| 247 | * only 2 IO lines are connected. |
| 248 | * |
| 249 | * This function checks whether a specific operation is supported. |
| 250 | * |
| 251 | * Return: true if @op is supported, false otherwise. |
| 252 | */ |
| 253 | bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op) |
| 254 | { |
| 255 | if (spi_mem_check_op(op)) |
| 256 | return false; |
| 257 | |
| 258 | return spi_mem_internal_supports_op(mem, op); |
| 259 | } |
| 260 | EXPORT_SYMBOL_GPL(spi_mem_supports_op); |
| 261 | |
| 262 | static int spi_mem_access_start(struct spi_mem *mem) |
| 263 | { |
| 264 | struct spi_controller *ctlr = mem->spi->controller; |
| 265 | |
| 266 | /* |
| 267 | * Flush the message queue before executing our SPI memory |
| 268 | * operation to prevent preemption of regular SPI transfers. |
| 269 | */ |
| 270 | spi_flush_queue(ctlr); |
| 271 | |
| 272 | if (ctlr->auto_runtime_pm) { |
| 273 | int ret; |
| 274 | |
| 275 | ret = pm_runtime_resume_and_get(ctlr->dev.parent); |
| 276 | if (ret < 0) { |
| 277 | dev_err(&ctlr->dev, "Failed to power device: %d\n", |
| 278 | ret); |
| 279 | return ret; |
| 280 | } |
| 281 | } |
| 282 | |
| 283 | mutex_lock(&ctlr->bus_lock_mutex); |
| 284 | mutex_lock(&ctlr->io_mutex); |
| 285 | |
| 286 | return 0; |
| 287 | } |
| 288 | |
| 289 | static void spi_mem_access_end(struct spi_mem *mem) |
| 290 | { |
| 291 | struct spi_controller *ctlr = mem->spi->controller; |
| 292 | |
| 293 | mutex_unlock(&ctlr->io_mutex); |
| 294 | mutex_unlock(&ctlr->bus_lock_mutex); |
| 295 | |
| 296 | if (ctlr->auto_runtime_pm) |
| 297 | pm_runtime_put(ctlr->dev.parent); |
| 298 | } |
| 299 | |
| 300 | static void spi_mem_add_op_stats(struct spi_statistics __percpu *pcpu_stats, |
| 301 | const struct spi_mem_op *op, int exec_op_ret) |
| 302 | { |
| 303 | struct spi_statistics *stats; |
| 304 | u64 len, l2len; |
| 305 | |
| 306 | get_cpu(); |
| 307 | stats = this_cpu_ptr(pcpu_stats); |
| 308 | u64_stats_update_begin(&stats->syncp); |
| 309 | |
| 310 | /* |
| 311 | * We do not have the concept of messages or transfers. Let's consider |
| 312 | * that one operation is equivalent to one message and one transfer. |
| 313 | */ |
| 314 | u64_stats_inc(&stats->messages); |
| 315 | u64_stats_inc(&stats->transfers); |
| 316 | |
| 317 | /* Use the sum of all lengths as bytes count and histogram value. */ |
| 318 | len = op->cmd.nbytes + op->addr.nbytes; |
| 319 | len += op->dummy.nbytes + op->data.nbytes; |
| 320 | u64_stats_add(&stats->bytes, len); |
| 321 | l2len = min(fls(len), SPI_STATISTICS_HISTO_SIZE) - 1; |
| 322 | u64_stats_inc(&stats->transfer_bytes_histo[l2len]); |
| 323 | |
| 324 | /* Only account for data bytes as transferred bytes. */ |
| 325 | if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) |
| 326 | u64_stats_add(&stats->bytes_tx, op->data.nbytes); |
| 327 | if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN) |
| 328 | u64_stats_add(&stats->bytes_rx, op->data.nbytes); |
| 329 | |
| 330 | /* |
| 331 | * A timeout is not an error, following the same behavior as |
| 332 | * spi_transfer_one_message(). |
| 333 | */ |
| 334 | if (exec_op_ret == -ETIMEDOUT) |
| 335 | u64_stats_inc(&stats->timedout); |
| 336 | else if (exec_op_ret) |
| 337 | u64_stats_inc(&stats->errors); |
| 338 | |
| 339 | u64_stats_update_end(&stats->syncp); |
| 340 | put_cpu(); |
| 341 | } |
| 342 | |
| 343 | /** |
| 344 | * spi_mem_exec_op() - Execute a memory operation |
| 345 | * @mem: the SPI memory |
| 346 | * @op: the memory operation to execute |
| 347 | * |
| 348 | * Executes a memory operation. |
| 349 | * |
| 350 | * This function first checks that @op is supported and then tries to execute |
| 351 | * it. |
| 352 | * |
| 353 | * Return: 0 in case of success, a negative error code otherwise. |
| 354 | */ |
| 355 | int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op) |
| 356 | { |
| 357 | unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0; |
| 358 | struct spi_controller *ctlr = mem->spi->controller; |
| 359 | struct spi_transfer xfers[4] = { }; |
| 360 | struct spi_message msg; |
| 361 | u8 *tmpbuf; |
| 362 | int ret; |
| 363 | |
| 364 | ret = spi_mem_check_op(op); |
| 365 | if (ret) |
| 366 | return ret; |
| 367 | |
| 368 | if (!spi_mem_internal_supports_op(mem, op)) |
| 369 | return -EOPNOTSUPP; |
| 370 | |
| 371 | if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) { |
| 372 | ret = spi_mem_access_start(mem); |
| 373 | if (ret) |
| 374 | return ret; |
| 375 | |
| 376 | ret = ctlr->mem_ops->exec_op(mem, op); |
| 377 | |
| 378 | spi_mem_access_end(mem); |
| 379 | |
| 380 | /* |
| 381 | * Some controllers only optimize specific paths (typically the |
| 382 | * read path) and expect the core to use the regular SPI |
| 383 | * interface in other cases. |
| 384 | */ |
| 385 | if (!ret || (ret != -ENOTSUPP && ret != -EOPNOTSUPP)) { |
| 386 | spi_mem_add_op_stats(ctlr->pcpu_statistics, op, ret); |
| 387 | spi_mem_add_op_stats(mem->spi->pcpu_statistics, op, ret); |
| 388 | |
| 389 | return ret; |
| 390 | } |
| 391 | } |
| 392 | |
| 393 | tmpbufsize = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; |
| 394 | |
| 395 | /* |
| 396 | * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so |
| 397 | * we're guaranteed that this buffer is DMA-able, as required by the |
| 398 | * SPI layer. |
| 399 | */ |
| 400 | tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA); |
| 401 | if (!tmpbuf) |
| 402 | return -ENOMEM; |
| 403 | |
| 404 | spi_message_init(&msg); |
| 405 | |
| 406 | tmpbuf[0] = op->cmd.opcode; |
| 407 | xfers[xferpos].tx_buf = tmpbuf; |
| 408 | xfers[xferpos].len = op->cmd.nbytes; |
| 409 | xfers[xferpos].tx_nbits = op->cmd.buswidth; |
| 410 | spi_message_add_tail(&xfers[xferpos], &msg); |
| 411 | xferpos++; |
| 412 | totalxferlen++; |
| 413 | |
| 414 | if (op->addr.nbytes) { |
| 415 | int i; |
| 416 | |
| 417 | for (i = 0; i < op->addr.nbytes; i++) |
| 418 | tmpbuf[i + 1] = op->addr.val >> |
| 419 | (8 * (op->addr.nbytes - i - 1)); |
| 420 | |
| 421 | xfers[xferpos].tx_buf = tmpbuf + 1; |
| 422 | xfers[xferpos].len = op->addr.nbytes; |
| 423 | xfers[xferpos].tx_nbits = op->addr.buswidth; |
| 424 | spi_message_add_tail(&xfers[xferpos], &msg); |
| 425 | xferpos++; |
| 426 | totalxferlen += op->addr.nbytes; |
| 427 | } |
| 428 | |
| 429 | if (op->dummy.nbytes) { |
| 430 | memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes); |
| 431 | xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1; |
| 432 | xfers[xferpos].len = op->dummy.nbytes; |
| 433 | xfers[xferpos].tx_nbits = op->dummy.buswidth; |
| 434 | xfers[xferpos].dummy_data = 1; |
| 435 | spi_message_add_tail(&xfers[xferpos], &msg); |
| 436 | xferpos++; |
| 437 | totalxferlen += op->dummy.nbytes; |
| 438 | } |
| 439 | |
| 440 | if (op->data.nbytes) { |
| 441 | if (op->data.dir == SPI_MEM_DATA_IN) { |
| 442 | xfers[xferpos].rx_buf = op->data.buf.in; |
| 443 | xfers[xferpos].rx_nbits = op->data.buswidth; |
| 444 | } else { |
| 445 | xfers[xferpos].tx_buf = op->data.buf.out; |
| 446 | xfers[xferpos].tx_nbits = op->data.buswidth; |
| 447 | } |
| 448 | |
| 449 | xfers[xferpos].len = op->data.nbytes; |
| 450 | spi_message_add_tail(&xfers[xferpos], &msg); |
| 451 | xferpos++; |
| 452 | totalxferlen += op->data.nbytes; |
| 453 | } |
| 454 | |
| 455 | ret = spi_sync(mem->spi, &msg); |
| 456 | |
| 457 | kfree(tmpbuf); |
| 458 | |
| 459 | if (ret) |
| 460 | return ret; |
| 461 | |
| 462 | if (msg.actual_length != totalxferlen) |
| 463 | return -EIO; |
| 464 | |
| 465 | return 0; |
| 466 | } |
| 467 | EXPORT_SYMBOL_GPL(spi_mem_exec_op); |
| 468 | |
| 469 | /** |
| 470 | * spi_mem_get_name() - Return the SPI mem device name to be used by the |
| 471 | * upper layer if necessary |
| 472 | * @mem: the SPI memory |
| 473 | * |
| 474 | * This function allows SPI mem users to retrieve the SPI mem device name. |
| 475 | * It is useful if the upper layer needs to expose a custom name for |
| 476 | * compatibility reasons. |
| 477 | * |
| 478 | * Return: a string containing the name of the memory device to be used |
| 479 | * by the SPI mem user |
| 480 | */ |
| 481 | const char *spi_mem_get_name(struct spi_mem *mem) |
| 482 | { |
| 483 | return mem->name; |
| 484 | } |
| 485 | EXPORT_SYMBOL_GPL(spi_mem_get_name); |
| 486 | |
| 487 | /** |
| 488 | * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to |
| 489 | * match controller limitations |
| 490 | * @mem: the SPI memory |
| 491 | * @op: the operation to adjust |
| 492 | * |
| 493 | * Some controllers have FIFO limitations and must split a data transfer |
| 494 | * operation into multiple ones, others require a specific alignment for |
| 495 | * optimized accesses. This function allows SPI mem drivers to split a single |
| 496 | * operation into multiple sub-operations when required. |
| 497 | * |
| 498 | * Return: a negative error code if the controller can't properly adjust @op, |
| 499 | * 0 otherwise. Note that @op->data.nbytes will be updated if @op |
| 500 | * can't be handled in a single step. |
| 501 | */ |
| 502 | int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op) |
| 503 | { |
| 504 | struct spi_controller *ctlr = mem->spi->controller; |
| 505 | size_t len; |
| 506 | |
| 507 | if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size) |
| 508 | return ctlr->mem_ops->adjust_op_size(mem, op); |
| 509 | |
| 510 | if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) { |
| 511 | len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; |
| 512 | |
| 513 | if (len > spi_max_transfer_size(mem->spi)) |
| 514 | return -EINVAL; |
| 515 | |
| 516 | op->data.nbytes = min3((size_t)op->data.nbytes, |
| 517 | spi_max_transfer_size(mem->spi), |
| 518 | spi_max_message_size(mem->spi) - |
| 519 | len); |
| 520 | if (!op->data.nbytes) |
| 521 | return -EINVAL; |
| 522 | } |
| 523 | |
| 524 | return 0; |
| 525 | } |
| 526 | EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size); |
| 527 | |
| 528 | static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc, |
| 529 | u64 offs, size_t len, void *buf) |
| 530 | { |
| 531 | struct spi_mem_op op = desc->info.op_tmpl; |
| 532 | int ret; |
| 533 | |
| 534 | op.addr.val = desc->info.offset + offs; |
| 535 | op.data.buf.in = buf; |
| 536 | op.data.nbytes = len; |
| 537 | ret = spi_mem_adjust_op_size(desc->mem, &op); |
| 538 | if (ret) |
| 539 | return ret; |
| 540 | |
| 541 | ret = spi_mem_exec_op(desc->mem, &op); |
| 542 | if (ret) |
| 543 | return ret; |
| 544 | |
| 545 | return op.data.nbytes; |
| 546 | } |
| 547 | |
| 548 | static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc, |
| 549 | u64 offs, size_t len, const void *buf) |
| 550 | { |
| 551 | struct spi_mem_op op = desc->info.op_tmpl; |
| 552 | int ret; |
| 553 | |
| 554 | op.addr.val = desc->info.offset + offs; |
| 555 | op.data.buf.out = buf; |
| 556 | op.data.nbytes = len; |
| 557 | ret = spi_mem_adjust_op_size(desc->mem, &op); |
| 558 | if (ret) |
| 559 | return ret; |
| 560 | |
| 561 | ret = spi_mem_exec_op(desc->mem, &op); |
| 562 | if (ret) |
| 563 | return ret; |
| 564 | |
| 565 | return op.data.nbytes; |
| 566 | } |
| 567 | |
| 568 | /** |
| 569 | * spi_mem_dirmap_create() - Create a direct mapping descriptor |
| 570 | * @mem: SPI mem device this direct mapping should be created for |
| 571 | * @info: direct mapping information |
| 572 | * |
| 573 | * This function is creating a direct mapping descriptor which can then be used |
| 574 | * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write(). |
| 575 | * If the SPI controller driver does not support direct mapping, this function |
| 576 | * falls back to an implementation using spi_mem_exec_op(), so that the caller |
| 577 | * doesn't have to bother implementing a fallback on his own. |
| 578 | * |
| 579 | * Return: a valid pointer in case of success, and ERR_PTR() otherwise. |
| 580 | */ |
| 581 | struct spi_mem_dirmap_desc * |
| 582 | spi_mem_dirmap_create(struct spi_mem *mem, |
| 583 | const struct spi_mem_dirmap_info *info) |
| 584 | { |
| 585 | struct spi_controller *ctlr = mem->spi->controller; |
| 586 | struct spi_mem_dirmap_desc *desc; |
| 587 | int ret = -ENOTSUPP; |
| 588 | |
| 589 | /* Make sure the number of address cycles is between 1 and 8 bytes. */ |
| 590 | if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8) |
| 591 | return ERR_PTR(-EINVAL); |
| 592 | |
| 593 | /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */ |
| 594 | if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA) |
| 595 | return ERR_PTR(-EINVAL); |
| 596 | |
| 597 | desc = kzalloc(sizeof(*desc), GFP_KERNEL); |
| 598 | if (!desc) |
| 599 | return ERR_PTR(-ENOMEM); |
| 600 | |
| 601 | desc->mem = mem; |
| 602 | desc->info = *info; |
| 603 | if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create) |
| 604 | ret = ctlr->mem_ops->dirmap_create(desc); |
| 605 | |
| 606 | if (ret) { |
| 607 | desc->nodirmap = true; |
| 608 | if (!spi_mem_supports_op(desc->mem, &desc->info.op_tmpl)) |
| 609 | ret = -EOPNOTSUPP; |
| 610 | else |
| 611 | ret = 0; |
| 612 | } |
| 613 | |
| 614 | if (ret) { |
| 615 | kfree(desc); |
| 616 | return ERR_PTR(ret); |
| 617 | } |
| 618 | |
| 619 | return desc; |
| 620 | } |
| 621 | EXPORT_SYMBOL_GPL(spi_mem_dirmap_create); |
| 622 | |
| 623 | /** |
| 624 | * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor |
| 625 | * @desc: the direct mapping descriptor to destroy |
| 626 | * |
| 627 | * This function destroys a direct mapping descriptor previously created by |
| 628 | * spi_mem_dirmap_create(). |
| 629 | */ |
| 630 | void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc) |
| 631 | { |
| 632 | struct spi_controller *ctlr = desc->mem->spi->controller; |
| 633 | |
| 634 | if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy) |
| 635 | ctlr->mem_ops->dirmap_destroy(desc); |
| 636 | |
| 637 | kfree(desc); |
| 638 | } |
| 639 | EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy); |
| 640 | |
| 641 | static void devm_spi_mem_dirmap_release(struct device *dev, void *res) |
| 642 | { |
| 643 | struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res; |
| 644 | |
| 645 | spi_mem_dirmap_destroy(desc); |
| 646 | } |
| 647 | |
| 648 | /** |
| 649 | * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach |
| 650 | * it to a device |
| 651 | * @dev: device the dirmap desc will be attached to |
| 652 | * @mem: SPI mem device this direct mapping should be created for |
| 653 | * @info: direct mapping information |
| 654 | * |
| 655 | * devm_ variant of the spi_mem_dirmap_create() function. See |
| 656 | * spi_mem_dirmap_create() for more details. |
| 657 | * |
| 658 | * Return: a valid pointer in case of success, and ERR_PTR() otherwise. |
| 659 | */ |
| 660 | struct spi_mem_dirmap_desc * |
| 661 | devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem, |
| 662 | const struct spi_mem_dirmap_info *info) |
| 663 | { |
| 664 | struct spi_mem_dirmap_desc **ptr, *desc; |
| 665 | |
| 666 | ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr), |
| 667 | GFP_KERNEL); |
| 668 | if (!ptr) |
| 669 | return ERR_PTR(-ENOMEM); |
| 670 | |
| 671 | desc = spi_mem_dirmap_create(mem, info); |
| 672 | if (IS_ERR(desc)) { |
| 673 | devres_free(ptr); |
| 674 | } else { |
| 675 | *ptr = desc; |
| 676 | devres_add(dev, ptr); |
| 677 | } |
| 678 | |
| 679 | return desc; |
| 680 | } |
| 681 | EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create); |
| 682 | |
| 683 | static int devm_spi_mem_dirmap_match(struct device *dev, void *res, void *data) |
| 684 | { |
| 685 | struct spi_mem_dirmap_desc **ptr = res; |
| 686 | |
| 687 | if (WARN_ON(!ptr || !*ptr)) |
| 688 | return 0; |
| 689 | |
| 690 | return *ptr == data; |
| 691 | } |
| 692 | |
| 693 | /** |
| 694 | * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached |
| 695 | * to a device |
| 696 | * @dev: device the dirmap desc is attached to |
| 697 | * @desc: the direct mapping descriptor to destroy |
| 698 | * |
| 699 | * devm_ variant of the spi_mem_dirmap_destroy() function. See |
| 700 | * spi_mem_dirmap_destroy() for more details. |
| 701 | */ |
| 702 | void devm_spi_mem_dirmap_destroy(struct device *dev, |
| 703 | struct spi_mem_dirmap_desc *desc) |
| 704 | { |
| 705 | devres_release(dev, devm_spi_mem_dirmap_release, |
| 706 | devm_spi_mem_dirmap_match, desc); |
| 707 | } |
| 708 | EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy); |
| 709 | |
| 710 | /** |
| 711 | * spi_mem_dirmap_read() - Read data through a direct mapping |
| 712 | * @desc: direct mapping descriptor |
| 713 | * @offs: offset to start reading from. Note that this is not an absolute |
| 714 | * offset, but the offset within the direct mapping which already has |
| 715 | * its own offset |
| 716 | * @len: length in bytes |
| 717 | * @buf: destination buffer. This buffer must be DMA-able |
| 718 | * |
| 719 | * This function reads data from a memory device using a direct mapping |
| 720 | * previously instantiated with spi_mem_dirmap_create(). |
| 721 | * |
| 722 | * Return: the amount of data read from the memory device or a negative error |
| 723 | * code. Note that the returned size might be smaller than @len, and the caller |
| 724 | * is responsible for calling spi_mem_dirmap_read() again when that happens. |
| 725 | */ |
| 726 | ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, |
| 727 | u64 offs, size_t len, void *buf) |
| 728 | { |
| 729 | struct spi_controller *ctlr = desc->mem->spi->controller; |
| 730 | ssize_t ret; |
| 731 | |
| 732 | if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN) |
| 733 | return -EINVAL; |
| 734 | |
| 735 | if (!len) |
| 736 | return 0; |
| 737 | |
| 738 | if (desc->nodirmap) { |
| 739 | ret = spi_mem_no_dirmap_read(desc, offs, len, buf); |
| 740 | } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_read) { |
| 741 | ret = spi_mem_access_start(desc->mem); |
| 742 | if (ret) |
| 743 | return ret; |
| 744 | |
| 745 | ret = ctlr->mem_ops->dirmap_read(desc, offs, len, buf); |
| 746 | |
| 747 | spi_mem_access_end(desc->mem); |
| 748 | } else { |
| 749 | ret = -ENOTSUPP; |
| 750 | } |
| 751 | |
| 752 | return ret; |
| 753 | } |
| 754 | EXPORT_SYMBOL_GPL(spi_mem_dirmap_read); |
| 755 | |
| 756 | /** |
| 757 | * spi_mem_dirmap_write() - Write data through a direct mapping |
| 758 | * @desc: direct mapping descriptor |
| 759 | * @offs: offset to start writing from. Note that this is not an absolute |
| 760 | * offset, but the offset within the direct mapping which already has |
| 761 | * its own offset |
| 762 | * @len: length in bytes |
| 763 | * @buf: source buffer. This buffer must be DMA-able |
| 764 | * |
| 765 | * This function writes data to a memory device using a direct mapping |
| 766 | * previously instantiated with spi_mem_dirmap_create(). |
| 767 | * |
| 768 | * Return: the amount of data written to the memory device or a negative error |
| 769 | * code. Note that the returned size might be smaller than @len, and the caller |
| 770 | * is responsible for calling spi_mem_dirmap_write() again when that happens. |
| 771 | */ |
| 772 | ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, |
| 773 | u64 offs, size_t len, const void *buf) |
| 774 | { |
| 775 | struct spi_controller *ctlr = desc->mem->spi->controller; |
| 776 | ssize_t ret; |
| 777 | |
| 778 | if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT) |
| 779 | return -EINVAL; |
| 780 | |
| 781 | if (!len) |
| 782 | return 0; |
| 783 | |
| 784 | if (desc->nodirmap) { |
| 785 | ret = spi_mem_no_dirmap_write(desc, offs, len, buf); |
| 786 | } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_write) { |
| 787 | ret = spi_mem_access_start(desc->mem); |
| 788 | if (ret) |
| 789 | return ret; |
| 790 | |
| 791 | ret = ctlr->mem_ops->dirmap_write(desc, offs, len, buf); |
| 792 | |
| 793 | spi_mem_access_end(desc->mem); |
| 794 | } else { |
| 795 | ret = -ENOTSUPP; |
| 796 | } |
| 797 | |
| 798 | return ret; |
| 799 | } |
| 800 | EXPORT_SYMBOL_GPL(spi_mem_dirmap_write); |
| 801 | |
| 802 | static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv) |
| 803 | { |
| 804 | return container_of(drv, struct spi_mem_driver, spidrv.driver); |
| 805 | } |
| 806 | |
| 807 | static int spi_mem_read_status(struct spi_mem *mem, |
| 808 | const struct spi_mem_op *op, |
| 809 | u16 *status) |
| 810 | { |
| 811 | const u8 *bytes = (u8 *)op->data.buf.in; |
| 812 | int ret; |
| 813 | |
| 814 | ret = spi_mem_exec_op(mem, op); |
| 815 | if (ret) |
| 816 | return ret; |
| 817 | |
| 818 | if (op->data.nbytes > 1) |
| 819 | *status = ((u16)bytes[0] << 8) | bytes[1]; |
| 820 | else |
| 821 | *status = bytes[0]; |
| 822 | |
| 823 | return 0; |
| 824 | } |
| 825 | |
| 826 | /** |
| 827 | * spi_mem_poll_status() - Poll memory device status |
| 828 | * @mem: SPI memory device |
| 829 | * @op: the memory operation to execute |
| 830 | * @mask: status bitmask to ckeck |
| 831 | * @match: (status & mask) expected value |
| 832 | * @initial_delay_us: delay in us before starting to poll |
| 833 | * @polling_delay_us: time to sleep between reads in us |
| 834 | * @timeout_ms: timeout in milliseconds |
| 835 | * |
| 836 | * This function polls a status register and returns when |
| 837 | * (status & mask) == match or when the timeout has expired. |
| 838 | * |
| 839 | * Return: 0 in case of success, -ETIMEDOUT in case of error, |
| 840 | * -EOPNOTSUPP if not supported. |
| 841 | */ |
| 842 | int spi_mem_poll_status(struct spi_mem *mem, |
| 843 | const struct spi_mem_op *op, |
| 844 | u16 mask, u16 match, |
| 845 | unsigned long initial_delay_us, |
| 846 | unsigned long polling_delay_us, |
| 847 | u16 timeout_ms) |
| 848 | { |
| 849 | struct spi_controller *ctlr = mem->spi->controller; |
| 850 | int ret = -EOPNOTSUPP; |
| 851 | int read_status_ret; |
| 852 | u16 status; |
| 853 | |
| 854 | if (op->data.nbytes < 1 || op->data.nbytes > 2 || |
| 855 | op->data.dir != SPI_MEM_DATA_IN) |
| 856 | return -EINVAL; |
| 857 | |
| 858 | if (ctlr->mem_ops && ctlr->mem_ops->poll_status && !spi_get_csgpiod(mem->spi, 0)) { |
| 859 | ret = spi_mem_access_start(mem); |
| 860 | if (ret) |
| 861 | return ret; |
| 862 | |
| 863 | ret = ctlr->mem_ops->poll_status(mem, op, mask, match, |
| 864 | initial_delay_us, polling_delay_us, |
| 865 | timeout_ms); |
| 866 | |
| 867 | spi_mem_access_end(mem); |
| 868 | } |
| 869 | |
| 870 | if (ret == -EOPNOTSUPP) { |
| 871 | if (!spi_mem_supports_op(mem, op)) |
| 872 | return ret; |
| 873 | |
| 874 | if (initial_delay_us < 10) |
| 875 | udelay(initial_delay_us); |
| 876 | else |
| 877 | usleep_range((initial_delay_us >> 2) + 1, |
| 878 | initial_delay_us); |
| 879 | |
| 880 | ret = read_poll_timeout(spi_mem_read_status, read_status_ret, |
| 881 | (read_status_ret || ((status) & mask) == match), |
| 882 | polling_delay_us, timeout_ms * 1000, false, mem, |
| 883 | op, &status); |
| 884 | if (read_status_ret) |
| 885 | return read_status_ret; |
| 886 | } |
| 887 | |
| 888 | return ret; |
| 889 | } |
| 890 | EXPORT_SYMBOL_GPL(spi_mem_poll_status); |
| 891 | |
| 892 | static int spi_mem_probe(struct spi_device *spi) |
| 893 | { |
| 894 | struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); |
| 895 | struct spi_controller *ctlr = spi->controller; |
| 896 | struct spi_mem *mem; |
| 897 | |
| 898 | mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL); |
| 899 | if (!mem) |
| 900 | return -ENOMEM; |
| 901 | |
| 902 | mem->spi = spi; |
| 903 | |
| 904 | if (ctlr->mem_ops && ctlr->mem_ops->get_name) |
| 905 | mem->name = ctlr->mem_ops->get_name(mem); |
| 906 | else |
| 907 | mem->name = dev_name(&spi->dev); |
| 908 | |
| 909 | if (IS_ERR_OR_NULL(mem->name)) |
| 910 | return PTR_ERR_OR_ZERO(mem->name); |
| 911 | |
| 912 | spi_set_drvdata(spi, mem); |
| 913 | |
| 914 | return memdrv->probe(mem); |
| 915 | } |
| 916 | |
| 917 | static void spi_mem_remove(struct spi_device *spi) |
| 918 | { |
| 919 | struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); |
| 920 | struct spi_mem *mem = spi_get_drvdata(spi); |
| 921 | |
| 922 | if (memdrv->remove) |
| 923 | memdrv->remove(mem); |
| 924 | } |
| 925 | |
| 926 | static void spi_mem_shutdown(struct spi_device *spi) |
| 927 | { |
| 928 | struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver); |
| 929 | struct spi_mem *mem = spi_get_drvdata(spi); |
| 930 | |
| 931 | if (memdrv->shutdown) |
| 932 | memdrv->shutdown(mem); |
| 933 | } |
| 934 | |
| 935 | /** |
| 936 | * spi_mem_driver_register_with_owner() - Register a SPI memory driver |
| 937 | * @memdrv: the SPI memory driver to register |
| 938 | * @owner: the owner of this driver |
| 939 | * |
| 940 | * Registers a SPI memory driver. |
| 941 | * |
| 942 | * Return: 0 in case of success, a negative error core otherwise. |
| 943 | */ |
| 944 | |
| 945 | int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv, |
| 946 | struct module *owner) |
| 947 | { |
| 948 | memdrv->spidrv.probe = spi_mem_probe; |
| 949 | memdrv->spidrv.remove = spi_mem_remove; |
| 950 | memdrv->spidrv.shutdown = spi_mem_shutdown; |
| 951 | |
| 952 | return __spi_register_driver(owner, &memdrv->spidrv); |
| 953 | } |
| 954 | EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner); |
| 955 | |
| 956 | /** |
| 957 | * spi_mem_driver_unregister() - Unregister a SPI memory driver |
| 958 | * @memdrv: the SPI memory driver to unregister |
| 959 | * |
| 960 | * Unregisters a SPI memory driver. |
| 961 | */ |
| 962 | void spi_mem_driver_unregister(struct spi_mem_driver *memdrv) |
| 963 | { |
| 964 | spi_unregister_driver(&memdrv->spidrv); |
| 965 | } |
| 966 | EXPORT_SYMBOL_GPL(spi_mem_driver_unregister); |