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Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6
[linux-block.git] / drivers / scsi / libata-core.c
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1/*
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/list.h>
40#include <linux/mm.h>
41#include <linux/highmem.h>
42#include <linux/spinlock.h>
43#include <linux/blkdev.h>
44#include <linux/delay.h>
45#include <linux/timer.h>
46#include <linux/interrupt.h>
47#include <linux/completion.h>
48#include <linux/suspend.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/scatterlist.h>
52#include <scsi/scsi.h>
53#include "scsi_priv.h"
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsi_host.h>
56#include <linux/libata.h>
57#include <asm/io.h>
58#include <asm/semaphore.h>
59#include <asm/byteorder.h>
60
61#include "libata.h"
62
63/* debounce timing parameters in msecs { interval, duration, timeout } */
64const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
65const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
66const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
67
68static unsigned int ata_dev_init_params(struct ata_device *dev,
69 u16 heads, u16 sectors);
70static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
71static void ata_dev_xfermask(struct ata_device *dev);
72
73static unsigned int ata_unique_id = 1;
74static struct workqueue_struct *ata_wq;
75
76struct workqueue_struct *ata_aux_wq;
77
78int atapi_enabled = 1;
79module_param(atapi_enabled, int, 0444);
80MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
81
82int atapi_dmadir = 0;
83module_param(atapi_dmadir, int, 0444);
84MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
85
86int libata_fua = 0;
87module_param_named(fua, libata_fua, int, 0444);
88MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
89
90static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ;
91module_param(ata_probe_timeout, int, 0444);
92MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
93
94MODULE_AUTHOR("Jeff Garzik");
95MODULE_DESCRIPTION("Library module for ATA devices");
96MODULE_LICENSE("GPL");
97MODULE_VERSION(DRV_VERSION);
98
99
100/**
101 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
102 * @tf: Taskfile to convert
103 * @fis: Buffer into which data will output
104 * @pmp: Port multiplier port
105 *
106 * Converts a standard ATA taskfile to a Serial ATA
107 * FIS structure (Register - Host to Device).
108 *
109 * LOCKING:
110 * Inherited from caller.
111 */
112
113void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
114{
115 fis[0] = 0x27; /* Register - Host to Device FIS */
116 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
117 bit 7 indicates Command FIS */
118 fis[2] = tf->command;
119 fis[3] = tf->feature;
120
121 fis[4] = tf->lbal;
122 fis[5] = tf->lbam;
123 fis[6] = tf->lbah;
124 fis[7] = tf->device;
125
126 fis[8] = tf->hob_lbal;
127 fis[9] = tf->hob_lbam;
128 fis[10] = tf->hob_lbah;
129 fis[11] = tf->hob_feature;
130
131 fis[12] = tf->nsect;
132 fis[13] = tf->hob_nsect;
133 fis[14] = 0;
134 fis[15] = tf->ctl;
135
136 fis[16] = 0;
137 fis[17] = 0;
138 fis[18] = 0;
139 fis[19] = 0;
140}
141
142/**
143 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
144 * @fis: Buffer from which data will be input
145 * @tf: Taskfile to output
146 *
147 * Converts a serial ATA FIS structure to a standard ATA taskfile.
148 *
149 * LOCKING:
150 * Inherited from caller.
151 */
152
153void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
154{
155 tf->command = fis[2]; /* status */
156 tf->feature = fis[3]; /* error */
157
158 tf->lbal = fis[4];
159 tf->lbam = fis[5];
160 tf->lbah = fis[6];
161 tf->device = fis[7];
162
163 tf->hob_lbal = fis[8];
164 tf->hob_lbam = fis[9];
165 tf->hob_lbah = fis[10];
166
167 tf->nsect = fis[12];
168 tf->hob_nsect = fis[13];
169}
170
171static const u8 ata_rw_cmds[] = {
172 /* pio multi */
173 ATA_CMD_READ_MULTI,
174 ATA_CMD_WRITE_MULTI,
175 ATA_CMD_READ_MULTI_EXT,
176 ATA_CMD_WRITE_MULTI_EXT,
177 0,
178 0,
179 0,
180 ATA_CMD_WRITE_MULTI_FUA_EXT,
181 /* pio */
182 ATA_CMD_PIO_READ,
183 ATA_CMD_PIO_WRITE,
184 ATA_CMD_PIO_READ_EXT,
185 ATA_CMD_PIO_WRITE_EXT,
186 0,
187 0,
188 0,
189 0,
190 /* dma */
191 ATA_CMD_READ,
192 ATA_CMD_WRITE,
193 ATA_CMD_READ_EXT,
194 ATA_CMD_WRITE_EXT,
195 0,
196 0,
197 0,
198 ATA_CMD_WRITE_FUA_EXT
199};
200
201/**
202 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
203 * @qc: command to examine and configure
204 *
205 * Examine the device configuration and tf->flags to calculate
206 * the proper read/write commands and protocol to use.
207 *
208 * LOCKING:
209 * caller.
210 */
211int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
212{
213 struct ata_taskfile *tf = &qc->tf;
214 struct ata_device *dev = qc->dev;
215 u8 cmd;
216
217 int index, fua, lba48, write;
218
219 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
220 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
221 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
222
223 if (dev->flags & ATA_DFLAG_PIO) {
224 tf->protocol = ATA_PROT_PIO;
225 index = dev->multi_count ? 0 : 8;
226 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
227 /* Unable to use DMA due to host limitation */
228 tf->protocol = ATA_PROT_PIO;
229 index = dev->multi_count ? 0 : 8;
230 } else {
231 tf->protocol = ATA_PROT_DMA;
232 index = 16;
233 }
234
235 cmd = ata_rw_cmds[index + fua + lba48 + write];
236 if (cmd) {
237 tf->command = cmd;
238 return 0;
239 }
240 return -1;
241}
242
243/**
244 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
245 * @pio_mask: pio_mask
246 * @mwdma_mask: mwdma_mask
247 * @udma_mask: udma_mask
248 *
249 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
250 * unsigned int xfer_mask.
251 *
252 * LOCKING:
253 * None.
254 *
255 * RETURNS:
256 * Packed xfer_mask.
257 */
258static unsigned int ata_pack_xfermask(unsigned int pio_mask,
259 unsigned int mwdma_mask,
260 unsigned int udma_mask)
261{
262 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
263 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
264 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
265}
266
267/**
268 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
269 * @xfer_mask: xfer_mask to unpack
270 * @pio_mask: resulting pio_mask
271 * @mwdma_mask: resulting mwdma_mask
272 * @udma_mask: resulting udma_mask
273 *
274 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
275 * Any NULL distination masks will be ignored.
276 */
277static void ata_unpack_xfermask(unsigned int xfer_mask,
278 unsigned int *pio_mask,
279 unsigned int *mwdma_mask,
280 unsigned int *udma_mask)
281{
282 if (pio_mask)
283 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
284 if (mwdma_mask)
285 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
286 if (udma_mask)
287 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
288}
289
290static const struct ata_xfer_ent {
291 int shift, bits;
292 u8 base;
293} ata_xfer_tbl[] = {
294 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
295 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
296 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
297 { -1, },
298};
299
300/**
301 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
302 * @xfer_mask: xfer_mask of interest
303 *
304 * Return matching XFER_* value for @xfer_mask. Only the highest
305 * bit of @xfer_mask is considered.
306 *
307 * LOCKING:
308 * None.
309 *
310 * RETURNS:
311 * Matching XFER_* value, 0 if no match found.
312 */
313static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
314{
315 int highbit = fls(xfer_mask) - 1;
316 const struct ata_xfer_ent *ent;
317
318 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
319 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
320 return ent->base + highbit - ent->shift;
321 return 0;
322}
323
324/**
325 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
326 * @xfer_mode: XFER_* of interest
327 *
328 * Return matching xfer_mask for @xfer_mode.
329 *
330 * LOCKING:
331 * None.
332 *
333 * RETURNS:
334 * Matching xfer_mask, 0 if no match found.
335 */
336static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
337{
338 const struct ata_xfer_ent *ent;
339
340 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
341 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
342 return 1 << (ent->shift + xfer_mode - ent->base);
343 return 0;
344}
345
346/**
347 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
348 * @xfer_mode: XFER_* of interest
349 *
350 * Return matching xfer_shift for @xfer_mode.
351 *
352 * LOCKING:
353 * None.
354 *
355 * RETURNS:
356 * Matching xfer_shift, -1 if no match found.
357 */
358static int ata_xfer_mode2shift(unsigned int xfer_mode)
359{
360 const struct ata_xfer_ent *ent;
361
362 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
363 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
364 return ent->shift;
365 return -1;
366}
367
368/**
369 * ata_mode_string - convert xfer_mask to string
370 * @xfer_mask: mask of bits supported; only highest bit counts.
371 *
372 * Determine string which represents the highest speed
373 * (highest bit in @modemask).
374 *
375 * LOCKING:
376 * None.
377 *
378 * RETURNS:
379 * Constant C string representing highest speed listed in
380 * @mode_mask, or the constant C string "<n/a>".
381 */
382static const char *ata_mode_string(unsigned int xfer_mask)
383{
384 static const char * const xfer_mode_str[] = {
385 "PIO0",
386 "PIO1",
387 "PIO2",
388 "PIO3",
389 "PIO4",
390 "MWDMA0",
391 "MWDMA1",
392 "MWDMA2",
393 "UDMA/16",
394 "UDMA/25",
395 "UDMA/33",
396 "UDMA/44",
397 "UDMA/66",
398 "UDMA/100",
399 "UDMA/133",
400 "UDMA7",
401 };
402 int highbit;
403
404 highbit = fls(xfer_mask) - 1;
405 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
406 return xfer_mode_str[highbit];
407 return "<n/a>";
408}
409
410static const char *sata_spd_string(unsigned int spd)
411{
412 static const char * const spd_str[] = {
413 "1.5 Gbps",
414 "3.0 Gbps",
415 };
416
417 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
418 return "<unknown>";
419 return spd_str[spd - 1];
420}
421
422void ata_dev_disable(struct ata_device *dev)
423{
424 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
425 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
426 dev->class++;
427 }
428}
429
430/**
431 * ata_pio_devchk - PATA device presence detection
432 * @ap: ATA channel to examine
433 * @device: Device to examine (starting at zero)
434 *
435 * This technique was originally described in
436 * Hale Landis's ATADRVR (www.ata-atapi.com), and
437 * later found its way into the ATA/ATAPI spec.
438 *
439 * Write a pattern to the ATA shadow registers,
440 * and if a device is present, it will respond by
441 * correctly storing and echoing back the
442 * ATA shadow register contents.
443 *
444 * LOCKING:
445 * caller.
446 */
447
448static unsigned int ata_pio_devchk(struct ata_port *ap,
449 unsigned int device)
450{
451 struct ata_ioports *ioaddr = &ap->ioaddr;
452 u8 nsect, lbal;
453
454 ap->ops->dev_select(ap, device);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 outb(0xaa, ioaddr->nsect_addr);
460 outb(0x55, ioaddr->lbal_addr);
461
462 outb(0x55, ioaddr->nsect_addr);
463 outb(0xaa, ioaddr->lbal_addr);
464
465 nsect = inb(ioaddr->nsect_addr);
466 lbal = inb(ioaddr->lbal_addr);
467
468 if ((nsect == 0x55) && (lbal == 0xaa))
469 return 1; /* we found a device */
470
471 return 0; /* nothing found */
472}
473
474/**
475 * ata_mmio_devchk - PATA device presence detection
476 * @ap: ATA channel to examine
477 * @device: Device to examine (starting at zero)
478 *
479 * This technique was originally described in
480 * Hale Landis's ATADRVR (www.ata-atapi.com), and
481 * later found its way into the ATA/ATAPI spec.
482 *
483 * Write a pattern to the ATA shadow registers,
484 * and if a device is present, it will respond by
485 * correctly storing and echoing back the
486 * ATA shadow register contents.
487 *
488 * LOCKING:
489 * caller.
490 */
491
492static unsigned int ata_mmio_devchk(struct ata_port *ap,
493 unsigned int device)
494{
495 struct ata_ioports *ioaddr = &ap->ioaddr;
496 u8 nsect, lbal;
497
498 ap->ops->dev_select(ap, device);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
505
506 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
507 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
508
509 nsect = readb((void __iomem *) ioaddr->nsect_addr);
510 lbal = readb((void __iomem *) ioaddr->lbal_addr);
511
512 if ((nsect == 0x55) && (lbal == 0xaa))
513 return 1; /* we found a device */
514
515 return 0; /* nothing found */
516}
517
518/**
519 * ata_devchk - PATA device presence detection
520 * @ap: ATA channel to examine
521 * @device: Device to examine (starting at zero)
522 *
523 * Dispatch ATA device presence detection, depending
524 * on whether we are using PIO or MMIO to talk to the
525 * ATA shadow registers.
526 *
527 * LOCKING:
528 * caller.
529 */
530
531static unsigned int ata_devchk(struct ata_port *ap,
532 unsigned int device)
533{
534 if (ap->flags & ATA_FLAG_MMIO)
535 return ata_mmio_devchk(ap, device);
536 return ata_pio_devchk(ap, device);
537}
538
539/**
540 * ata_dev_classify - determine device type based on ATA-spec signature
541 * @tf: ATA taskfile register set for device to be identified
542 *
543 * Determine from taskfile register contents whether a device is
544 * ATA or ATAPI, as per "Signature and persistence" section
545 * of ATA/PI spec (volume 1, sect 5.14).
546 *
547 * LOCKING:
548 * None.
549 *
550 * RETURNS:
551 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
552 * the event of failure.
553 */
554
555unsigned int ata_dev_classify(const struct ata_taskfile *tf)
556{
557 /* Apple's open source Darwin code hints that some devices only
558 * put a proper signature into the LBA mid/high registers,
559 * So, we only check those. It's sufficient for uniqueness.
560 */
561
562 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
563 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
564 DPRINTK("found ATA device by sig\n");
565 return ATA_DEV_ATA;
566 }
567
568 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
569 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
570 DPRINTK("found ATAPI device by sig\n");
571 return ATA_DEV_ATAPI;
572 }
573
574 DPRINTK("unknown device\n");
575 return ATA_DEV_UNKNOWN;
576}
577
578/**
579 * ata_dev_try_classify - Parse returned ATA device signature
580 * @ap: ATA channel to examine
581 * @device: Device to examine (starting at zero)
582 * @r_err: Value of error register on completion
583 *
584 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
585 * an ATA/ATAPI-defined set of values is placed in the ATA
586 * shadow registers, indicating the results of device detection
587 * and diagnostics.
588 *
589 * Select the ATA device, and read the values from the ATA shadow
590 * registers. Then parse according to the Error register value,
591 * and the spec-defined values examined by ata_dev_classify().
592 *
593 * LOCKING:
594 * caller.
595 *
596 * RETURNS:
597 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
598 */
599
600static unsigned int
601ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
602{
603 struct ata_taskfile tf;
604 unsigned int class;
605 u8 err;
606
607 ap->ops->dev_select(ap, device);
608
609 memset(&tf, 0, sizeof(tf));
610
611 ap->ops->tf_read(ap, &tf);
612 err = tf.feature;
613 if (r_err)
614 *r_err = err;
615
616 /* see if device passed diags */
617 if (err == 1)
618 /* do nothing */ ;
619 else if ((device == 0) && (err == 0x81))
620 /* do nothing */ ;
621 else
622 return ATA_DEV_NONE;
623
624 /* determine if device is ATA or ATAPI */
625 class = ata_dev_classify(&tf);
626
627 if (class == ATA_DEV_UNKNOWN)
628 return ATA_DEV_NONE;
629 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
630 return ATA_DEV_NONE;
631 return class;
632}
633
634/**
635 * ata_id_string - Convert IDENTIFY DEVICE page into string
636 * @id: IDENTIFY DEVICE results we will examine
637 * @s: string into which data is output
638 * @ofs: offset into identify device page
639 * @len: length of string to return. must be an even number.
640 *
641 * The strings in the IDENTIFY DEVICE page are broken up into
642 * 16-bit chunks. Run through the string, and output each
643 * 8-bit chunk linearly, regardless of platform.
644 *
645 * LOCKING:
646 * caller.
647 */
648
649void ata_id_string(const u16 *id, unsigned char *s,
650 unsigned int ofs, unsigned int len)
651{
652 unsigned int c;
653
654 while (len > 0) {
655 c = id[ofs] >> 8;
656 *s = c;
657 s++;
658
659 c = id[ofs] & 0xff;
660 *s = c;
661 s++;
662
663 ofs++;
664 len -= 2;
665 }
666}
667
668/**
669 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
670 * @id: IDENTIFY DEVICE results we will examine
671 * @s: string into which data is output
672 * @ofs: offset into identify device page
673 * @len: length of string to return. must be an odd number.
674 *
675 * This function is identical to ata_id_string except that it
676 * trims trailing spaces and terminates the resulting string with
677 * null. @len must be actual maximum length (even number) + 1.
678 *
679 * LOCKING:
680 * caller.
681 */
682void ata_id_c_string(const u16 *id, unsigned char *s,
683 unsigned int ofs, unsigned int len)
684{
685 unsigned char *p;
686
687 WARN_ON(!(len & 1));
688
689 ata_id_string(id, s, ofs, len - 1);
690
691 p = s + strnlen(s, len - 1);
692 while (p > s && p[-1] == ' ')
693 p--;
694 *p = '\0';
695}
696
697static u64 ata_id_n_sectors(const u16 *id)
698{
699 if (ata_id_has_lba(id)) {
700 if (ata_id_has_lba48(id))
701 return ata_id_u64(id, 100);
702 else
703 return ata_id_u32(id, 60);
704 } else {
705 if (ata_id_current_chs_valid(id))
706 return ata_id_u32(id, 57);
707 else
708 return id[1] * id[3] * id[6];
709 }
710}
711
712/**
713 * ata_noop_dev_select - Select device 0/1 on ATA bus
714 * @ap: ATA channel to manipulate
715 * @device: ATA device (numbered from zero) to select
716 *
717 * This function performs no actual function.
718 *
719 * May be used as the dev_select() entry in ata_port_operations.
720 *
721 * LOCKING:
722 * caller.
723 */
724void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
725{
726}
727
728
729/**
730 * ata_std_dev_select - Select device 0/1 on ATA bus
731 * @ap: ATA channel to manipulate
732 * @device: ATA device (numbered from zero) to select
733 *
734 * Use the method defined in the ATA specification to
735 * make either device 0, or device 1, active on the
736 * ATA channel. Works with both PIO and MMIO.
737 *
738 * May be used as the dev_select() entry in ata_port_operations.
739 *
740 * LOCKING:
741 * caller.
742 */
743
744void ata_std_dev_select (struct ata_port *ap, unsigned int device)
745{
746 u8 tmp;
747
748 if (device == 0)
749 tmp = ATA_DEVICE_OBS;
750 else
751 tmp = ATA_DEVICE_OBS | ATA_DEV1;
752
753 if (ap->flags & ATA_FLAG_MMIO) {
754 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
755 } else {
756 outb(tmp, ap->ioaddr.device_addr);
757 }
758 ata_pause(ap); /* needed; also flushes, for mmio */
759}
760
761/**
762 * ata_dev_select - Select device 0/1 on ATA bus
763 * @ap: ATA channel to manipulate
764 * @device: ATA device (numbered from zero) to select
765 * @wait: non-zero to wait for Status register BSY bit to clear
766 * @can_sleep: non-zero if context allows sleeping
767 *
768 * Use the method defined in the ATA specification to
769 * make either device 0, or device 1, active on the
770 * ATA channel.
771 *
772 * This is a high-level version of ata_std_dev_select(),
773 * which additionally provides the services of inserting
774 * the proper pauses and status polling, where needed.
775 *
776 * LOCKING:
777 * caller.
778 */
779
780void ata_dev_select(struct ata_port *ap, unsigned int device,
781 unsigned int wait, unsigned int can_sleep)
782{
783 if (ata_msg_probe(ap))
784 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
785 "device %u, wait %u\n", ap->id, device, wait);
786
787 if (wait)
788 ata_wait_idle(ap);
789
790 ap->ops->dev_select(ap, device);
791
792 if (wait) {
793 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
794 msleep(150);
795 ata_wait_idle(ap);
796 }
797}
798
799/**
800 * ata_dump_id - IDENTIFY DEVICE info debugging output
801 * @id: IDENTIFY DEVICE page to dump
802 *
803 * Dump selected 16-bit words from the given IDENTIFY DEVICE
804 * page.
805 *
806 * LOCKING:
807 * caller.
808 */
809
810static inline void ata_dump_id(const u16 *id)
811{
812 DPRINTK("49==0x%04x "
813 "53==0x%04x "
814 "63==0x%04x "
815 "64==0x%04x "
816 "75==0x%04x \n",
817 id[49],
818 id[53],
819 id[63],
820 id[64],
821 id[75]);
822 DPRINTK("80==0x%04x "
823 "81==0x%04x "
824 "82==0x%04x "
825 "83==0x%04x "
826 "84==0x%04x \n",
827 id[80],
828 id[81],
829 id[82],
830 id[83],
831 id[84]);
832 DPRINTK("88==0x%04x "
833 "93==0x%04x\n",
834 id[88],
835 id[93]);
836}
837
838/**
839 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
840 * @id: IDENTIFY data to compute xfer mask from
841 *
842 * Compute the xfermask for this device. This is not as trivial
843 * as it seems if we must consider early devices correctly.
844 *
845 * FIXME: pre IDE drive timing (do we care ?).
846 *
847 * LOCKING:
848 * None.
849 *
850 * RETURNS:
851 * Computed xfermask
852 */
853static unsigned int ata_id_xfermask(const u16 *id)
854{
855 unsigned int pio_mask, mwdma_mask, udma_mask;
856
857 /* Usual case. Word 53 indicates word 64 is valid */
858 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
859 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
860 pio_mask <<= 3;
861 pio_mask |= 0x7;
862 } else {
863 /* If word 64 isn't valid then Word 51 high byte holds
864 * the PIO timing number for the maximum. Turn it into
865 * a mask.
866 */
867 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
868
869 /* But wait.. there's more. Design your standards by
870 * committee and you too can get a free iordy field to
871 * process. However its the speeds not the modes that
872 * are supported... Note drivers using the timing API
873 * will get this right anyway
874 */
875 }
876
877 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
878
879 udma_mask = 0;
880 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
881 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
882
883 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
884}
885
886/**
887 * ata_port_queue_task - Queue port_task
888 * @ap: The ata_port to queue port_task for
889 * @fn: workqueue function to be scheduled
890 * @data: data value to pass to workqueue function
891 * @delay: delay time for workqueue function
892 *
893 * Schedule @fn(@data) for execution after @delay jiffies using
894 * port_task. There is one port_task per port and it's the
895 * user(low level driver)'s responsibility to make sure that only
896 * one task is active at any given time.
897 *
898 * libata core layer takes care of synchronization between
899 * port_task and EH. ata_port_queue_task() may be ignored for EH
900 * synchronization.
901 *
902 * LOCKING:
903 * Inherited from caller.
904 */
905void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
906 unsigned long delay)
907{
908 int rc;
909
910 if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK)
911 return;
912
913 PREPARE_WORK(&ap->port_task, fn, data);
914
915 if (!delay)
916 rc = queue_work(ata_wq, &ap->port_task);
917 else
918 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
919
920 /* rc == 0 means that another user is using port task */
921 WARN_ON(rc == 0);
922}
923
924/**
925 * ata_port_flush_task - Flush port_task
926 * @ap: The ata_port to flush port_task for
927 *
928 * After this function completes, port_task is guranteed not to
929 * be running or scheduled.
930 *
931 * LOCKING:
932 * Kernel thread context (may sleep)
933 */
934void ata_port_flush_task(struct ata_port *ap)
935{
936 unsigned long flags;
937
938 DPRINTK("ENTER\n");
939
940 spin_lock_irqsave(ap->lock, flags);
941 ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK;
942 spin_unlock_irqrestore(ap->lock, flags);
943
944 DPRINTK("flush #1\n");
945 flush_workqueue(ata_wq);
946
947 /*
948 * At this point, if a task is running, it's guaranteed to see
949 * the FLUSH flag; thus, it will never queue pio tasks again.
950 * Cancel and flush.
951 */
952 if (!cancel_delayed_work(&ap->port_task)) {
953 if (ata_msg_ctl(ap))
954 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n",
955 __FUNCTION__);
956 flush_workqueue(ata_wq);
957 }
958
959 spin_lock_irqsave(ap->lock, flags);
960 ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK;
961 spin_unlock_irqrestore(ap->lock, flags);
962
963 if (ata_msg_ctl(ap))
964 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
965}
966
967void ata_qc_complete_internal(struct ata_queued_cmd *qc)
968{
969 struct completion *waiting = qc->private_data;
970
971 complete(waiting);
972}
973
974/**
975 * ata_exec_internal - execute libata internal command
976 * @dev: Device to which the command is sent
977 * @tf: Taskfile registers for the command and the result
978 * @cdb: CDB for packet command
979 * @dma_dir: Data tranfer direction of the command
980 * @buf: Data buffer of the command
981 * @buflen: Length of data buffer
982 *
983 * Executes libata internal command with timeout. @tf contains
984 * command on entry and result on return. Timeout and error
985 * conditions are reported via return value. No recovery action
986 * is taken after a command times out. It's caller's duty to
987 * clean up after timeout.
988 *
989 * LOCKING:
990 * None. Should be called with kernel context, might sleep.
991 *
992 * RETURNS:
993 * Zero on success, AC_ERR_* mask on failure
994 */
995unsigned ata_exec_internal(struct ata_device *dev,
996 struct ata_taskfile *tf, const u8 *cdb,
997 int dma_dir, void *buf, unsigned int buflen)
998{
999 struct ata_port *ap = dev->ap;
1000 u8 command = tf->command;
1001 struct ata_queued_cmd *qc;
1002 unsigned int tag, preempted_tag;
1003 u32 preempted_sactive, preempted_qc_active;
1004 DECLARE_COMPLETION_ONSTACK(wait);
1005 unsigned long flags;
1006 unsigned int err_mask;
1007 int rc;
1008
1009 spin_lock_irqsave(ap->lock, flags);
1010
1011 /* no internal command while frozen */
1012 if (ap->pflags & ATA_PFLAG_FROZEN) {
1013 spin_unlock_irqrestore(ap->lock, flags);
1014 return AC_ERR_SYSTEM;
1015 }
1016
1017 /* initialize internal qc */
1018
1019 /* XXX: Tag 0 is used for drivers with legacy EH as some
1020 * drivers choke if any other tag is given. This breaks
1021 * ata_tag_internal() test for those drivers. Don't use new
1022 * EH stuff without converting to it.
1023 */
1024 if (ap->ops->error_handler)
1025 tag = ATA_TAG_INTERNAL;
1026 else
1027 tag = 0;
1028
1029 if (test_and_set_bit(tag, &ap->qc_allocated))
1030 BUG();
1031 qc = __ata_qc_from_tag(ap, tag);
1032
1033 qc->tag = tag;
1034 qc->scsicmd = NULL;
1035 qc->ap = ap;
1036 qc->dev = dev;
1037 ata_qc_reinit(qc);
1038
1039 preempted_tag = ap->active_tag;
1040 preempted_sactive = ap->sactive;
1041 preempted_qc_active = ap->qc_active;
1042 ap->active_tag = ATA_TAG_POISON;
1043 ap->sactive = 0;
1044 ap->qc_active = 0;
1045
1046 /* prepare & issue qc */
1047 qc->tf = *tf;
1048 if (cdb)
1049 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1050 qc->flags |= ATA_QCFLAG_RESULT_TF;
1051 qc->dma_dir = dma_dir;
1052 if (dma_dir != DMA_NONE) {
1053 ata_sg_init_one(qc, buf, buflen);
1054 qc->nsect = buflen / ATA_SECT_SIZE;
1055 }
1056
1057 qc->private_data = &wait;
1058 qc->complete_fn = ata_qc_complete_internal;
1059
1060 ata_qc_issue(qc);
1061
1062 spin_unlock_irqrestore(ap->lock, flags);
1063
1064 rc = wait_for_completion_timeout(&wait, ata_probe_timeout);
1065
1066 ata_port_flush_task(ap);
1067
1068 if (!rc) {
1069 spin_lock_irqsave(ap->lock, flags);
1070
1071 /* We're racing with irq here. If we lose, the
1072 * following test prevents us from completing the qc
1073 * twice. If we win, the port is frozen and will be
1074 * cleaned up by ->post_internal_cmd().
1075 */
1076 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1077 qc->err_mask |= AC_ERR_TIMEOUT;
1078
1079 if (ap->ops->error_handler)
1080 ata_port_freeze(ap);
1081 else
1082 ata_qc_complete(qc);
1083
1084 if (ata_msg_warn(ap))
1085 ata_dev_printk(dev, KERN_WARNING,
1086 "qc timeout (cmd 0x%x)\n", command);
1087 }
1088
1089 spin_unlock_irqrestore(ap->lock, flags);
1090 }
1091
1092 /* do post_internal_cmd */
1093 if (ap->ops->post_internal_cmd)
1094 ap->ops->post_internal_cmd(qc);
1095
1096 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1097 if (ata_msg_warn(ap))
1098 ata_dev_printk(dev, KERN_WARNING,
1099 "zero err_mask for failed "
1100 "internal command, assuming AC_ERR_OTHER\n");
1101 qc->err_mask |= AC_ERR_OTHER;
1102 }
1103
1104 /* finish up */
1105 spin_lock_irqsave(ap->lock, flags);
1106
1107 *tf = qc->result_tf;
1108 err_mask = qc->err_mask;
1109
1110 ata_qc_free(qc);
1111 ap->active_tag = preempted_tag;
1112 ap->sactive = preempted_sactive;
1113 ap->qc_active = preempted_qc_active;
1114
1115 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1116 * Until those drivers are fixed, we detect the condition
1117 * here, fail the command with AC_ERR_SYSTEM and reenable the
1118 * port.
1119 *
1120 * Note that this doesn't change any behavior as internal
1121 * command failure results in disabling the device in the
1122 * higher layer for LLDDs without new reset/EH callbacks.
1123 *
1124 * Kill the following code as soon as those drivers are fixed.
1125 */
1126 if (ap->flags & ATA_FLAG_DISABLED) {
1127 err_mask |= AC_ERR_SYSTEM;
1128 ata_port_probe(ap);
1129 }
1130
1131 spin_unlock_irqrestore(ap->lock, flags);
1132
1133 return err_mask;
1134}
1135
1136/**
1137 * ata_do_simple_cmd - execute simple internal command
1138 * @dev: Device to which the command is sent
1139 * @cmd: Opcode to execute
1140 *
1141 * Execute a 'simple' command, that only consists of the opcode
1142 * 'cmd' itself, without filling any other registers
1143 *
1144 * LOCKING:
1145 * Kernel thread context (may sleep).
1146 *
1147 * RETURNS:
1148 * Zero on success, AC_ERR_* mask on failure
1149 */
1150unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1151{
1152 struct ata_taskfile tf;
1153
1154 ata_tf_init(dev, &tf);
1155
1156 tf.command = cmd;
1157 tf.flags |= ATA_TFLAG_DEVICE;
1158 tf.protocol = ATA_PROT_NODATA;
1159
1160 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1161}
1162
1163/**
1164 * ata_pio_need_iordy - check if iordy needed
1165 * @adev: ATA device
1166 *
1167 * Check if the current speed of the device requires IORDY. Used
1168 * by various controllers for chip configuration.
1169 */
1170
1171unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1172{
1173 int pio;
1174 int speed = adev->pio_mode - XFER_PIO_0;
1175
1176 if (speed < 2)
1177 return 0;
1178 if (speed > 2)
1179 return 1;
1180
1181 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1182
1183 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1184 pio = adev->id[ATA_ID_EIDE_PIO];
1185 /* Is the speed faster than the drive allows non IORDY ? */
1186 if (pio) {
1187 /* This is cycle times not frequency - watch the logic! */
1188 if (pio > 240) /* PIO2 is 240nS per cycle */
1189 return 1;
1190 return 0;
1191 }
1192 }
1193 return 0;
1194}
1195
1196/**
1197 * ata_dev_read_id - Read ID data from the specified device
1198 * @dev: target device
1199 * @p_class: pointer to class of the target device (may be changed)
1200 * @post_reset: is this read ID post-reset?
1201 * @id: buffer to read IDENTIFY data into
1202 *
1203 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1204 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1205 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1206 * for pre-ATA4 drives.
1207 *
1208 * LOCKING:
1209 * Kernel thread context (may sleep)
1210 *
1211 * RETURNS:
1212 * 0 on success, -errno otherwise.
1213 */
1214int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1215 int post_reset, u16 *id)
1216{
1217 struct ata_port *ap = dev->ap;
1218 unsigned int class = *p_class;
1219 struct ata_taskfile tf;
1220 unsigned int err_mask = 0;
1221 const char *reason;
1222 int rc;
1223
1224 if (ata_msg_ctl(ap))
1225 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1226 __FUNCTION__, ap->id, dev->devno);
1227
1228 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1229
1230 retry:
1231 ata_tf_init(dev, &tf);
1232
1233 switch (class) {
1234 case ATA_DEV_ATA:
1235 tf.command = ATA_CMD_ID_ATA;
1236 break;
1237 case ATA_DEV_ATAPI:
1238 tf.command = ATA_CMD_ID_ATAPI;
1239 break;
1240 default:
1241 rc = -ENODEV;
1242 reason = "unsupported class";
1243 goto err_out;
1244 }
1245
1246 tf.protocol = ATA_PROT_PIO;
1247
1248 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1249 id, sizeof(id[0]) * ATA_ID_WORDS);
1250 if (err_mask) {
1251 rc = -EIO;
1252 reason = "I/O error";
1253 goto err_out;
1254 }
1255
1256 swap_buf_le16(id, ATA_ID_WORDS);
1257
1258 /* sanity check */
1259 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1260 rc = -EINVAL;
1261 reason = "device reports illegal type";
1262 goto err_out;
1263 }
1264
1265 if (post_reset && class == ATA_DEV_ATA) {
1266 /*
1267 * The exact sequence expected by certain pre-ATA4 drives is:
1268 * SRST RESET
1269 * IDENTIFY
1270 * INITIALIZE DEVICE PARAMETERS
1271 * anything else..
1272 * Some drives were very specific about that exact sequence.
1273 */
1274 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1275 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1276 if (err_mask) {
1277 rc = -EIO;
1278 reason = "INIT_DEV_PARAMS failed";
1279 goto err_out;
1280 }
1281
1282 /* current CHS translation info (id[53-58]) might be
1283 * changed. reread the identify device info.
1284 */
1285 post_reset = 0;
1286 goto retry;
1287 }
1288 }
1289
1290 *p_class = class;
1291
1292 return 0;
1293
1294 err_out:
1295 if (ata_msg_warn(ap))
1296 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1297 "(%s, err_mask=0x%x)\n", reason, err_mask);
1298 return rc;
1299}
1300
1301static inline u8 ata_dev_knobble(struct ata_device *dev)
1302{
1303 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1304}
1305
1306static void ata_dev_config_ncq(struct ata_device *dev,
1307 char *desc, size_t desc_sz)
1308{
1309 struct ata_port *ap = dev->ap;
1310 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1311
1312 if (!ata_id_has_ncq(dev->id)) {
1313 desc[0] = '\0';
1314 return;
1315 }
1316
1317 if (ap->flags & ATA_FLAG_NCQ) {
1318 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1319 dev->flags |= ATA_DFLAG_NCQ;
1320 }
1321
1322 if (hdepth >= ddepth)
1323 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1324 else
1325 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1326}
1327
1328static void ata_set_port_max_cmd_len(struct ata_port *ap)
1329{
1330 int i;
1331
1332 if (ap->host) {
1333 ap->host->max_cmd_len = 0;
1334 for (i = 0; i < ATA_MAX_DEVICES; i++)
1335 ap->host->max_cmd_len = max_t(unsigned int,
1336 ap->host->max_cmd_len,
1337 ap->device[i].cdb_len);
1338 }
1339}
1340
1341/**
1342 * ata_dev_configure - Configure the specified ATA/ATAPI device
1343 * @dev: Target device to configure
1344 * @print_info: Enable device info printout
1345 *
1346 * Configure @dev according to @dev->id. Generic and low-level
1347 * driver specific fixups are also applied.
1348 *
1349 * LOCKING:
1350 * Kernel thread context (may sleep)
1351 *
1352 * RETURNS:
1353 * 0 on success, -errno otherwise
1354 */
1355int ata_dev_configure(struct ata_device *dev, int print_info)
1356{
1357 struct ata_port *ap = dev->ap;
1358 const u16 *id = dev->id;
1359 unsigned int xfer_mask;
1360 int rc;
1361
1362 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1363 ata_dev_printk(dev, KERN_INFO,
1364 "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1365 __FUNCTION__, ap->id, dev->devno);
1366 return 0;
1367 }
1368
1369 if (ata_msg_probe(ap))
1370 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1371 __FUNCTION__, ap->id, dev->devno);
1372
1373 /* print device capabilities */
1374 if (ata_msg_probe(ap))
1375 ata_dev_printk(dev, KERN_DEBUG,
1376 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
1377 "85:%04x 86:%04x 87:%04x 88:%04x\n",
1378 __FUNCTION__,
1379 id[49], id[82], id[83], id[84],
1380 id[85], id[86], id[87], id[88]);
1381
1382 /* initialize to-be-configured parameters */
1383 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1384 dev->max_sectors = 0;
1385 dev->cdb_len = 0;
1386 dev->n_sectors = 0;
1387 dev->cylinders = 0;
1388 dev->heads = 0;
1389 dev->sectors = 0;
1390
1391 /*
1392 * common ATA, ATAPI feature tests
1393 */
1394
1395 /* find max transfer mode; for printk only */
1396 xfer_mask = ata_id_xfermask(id);
1397
1398 if (ata_msg_probe(ap))
1399 ata_dump_id(id);
1400
1401 /* ATA-specific feature tests */
1402 if (dev->class == ATA_DEV_ATA) {
1403 dev->n_sectors = ata_id_n_sectors(id);
1404
1405 if (ata_id_has_lba(id)) {
1406 const char *lba_desc;
1407 char ncq_desc[20];
1408
1409 lba_desc = "LBA";
1410 dev->flags |= ATA_DFLAG_LBA;
1411 if (ata_id_has_lba48(id)) {
1412 dev->flags |= ATA_DFLAG_LBA48;
1413 lba_desc = "LBA48";
1414 }
1415
1416 /* config NCQ */
1417 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1418
1419 /* print device info to dmesg */
1420 if (ata_msg_drv(ap) && print_info)
1421 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1422 "max %s, %Lu sectors: %s %s\n",
1423 ata_id_major_version(id),
1424 ata_mode_string(xfer_mask),
1425 (unsigned long long)dev->n_sectors,
1426 lba_desc, ncq_desc);
1427 } else {
1428 /* CHS */
1429
1430 /* Default translation */
1431 dev->cylinders = id[1];
1432 dev->heads = id[3];
1433 dev->sectors = id[6];
1434
1435 if (ata_id_current_chs_valid(id)) {
1436 /* Current CHS translation is valid. */
1437 dev->cylinders = id[54];
1438 dev->heads = id[55];
1439 dev->sectors = id[56];
1440 }
1441
1442 /* print device info to dmesg */
1443 if (ata_msg_drv(ap) && print_info)
1444 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1445 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1446 ata_id_major_version(id),
1447 ata_mode_string(xfer_mask),
1448 (unsigned long long)dev->n_sectors,
1449 dev->cylinders, dev->heads,
1450 dev->sectors);
1451 }
1452
1453 if (dev->id[59] & 0x100) {
1454 dev->multi_count = dev->id[59] & 0xff;
1455 if (ata_msg_drv(ap) && print_info)
1456 ata_dev_printk(dev, KERN_INFO,
1457 "ata%u: dev %u multi count %u\n",
1458 ap->id, dev->devno, dev->multi_count);
1459 }
1460
1461 dev->cdb_len = 16;
1462 }
1463
1464 /* ATAPI-specific feature tests */
1465 else if (dev->class == ATA_DEV_ATAPI) {
1466 char *cdb_intr_string = "";
1467
1468 rc = atapi_cdb_len(id);
1469 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1470 if (ata_msg_warn(ap))
1471 ata_dev_printk(dev, KERN_WARNING,
1472 "unsupported CDB len\n");
1473 rc = -EINVAL;
1474 goto err_out_nosup;
1475 }
1476 dev->cdb_len = (unsigned int) rc;
1477
1478 if (ata_id_cdb_intr(dev->id)) {
1479 dev->flags |= ATA_DFLAG_CDB_INTR;
1480 cdb_intr_string = ", CDB intr";
1481 }
1482
1483 /* print device info to dmesg */
1484 if (ata_msg_drv(ap) && print_info)
1485 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1486 ata_mode_string(xfer_mask),
1487 cdb_intr_string);
1488 }
1489
1490 ata_set_port_max_cmd_len(ap);
1491
1492 /* limit bridge transfers to udma5, 200 sectors */
1493 if (ata_dev_knobble(dev)) {
1494 if (ata_msg_drv(ap) && print_info)
1495 ata_dev_printk(dev, KERN_INFO,
1496 "applying bridge limits\n");
1497 dev->udma_mask &= ATA_UDMA5;
1498 dev->max_sectors = ATA_MAX_SECTORS;
1499 }
1500
1501 if (ap->ops->dev_config)
1502 ap->ops->dev_config(ap, dev);
1503
1504 if (ata_msg_probe(ap))
1505 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1506 __FUNCTION__, ata_chk_status(ap));
1507 return 0;
1508
1509err_out_nosup:
1510 if (ata_msg_probe(ap))
1511 ata_dev_printk(dev, KERN_DEBUG,
1512 "%s: EXIT, err\n", __FUNCTION__);
1513 return rc;
1514}
1515
1516/**
1517 * ata_bus_probe - Reset and probe ATA bus
1518 * @ap: Bus to probe
1519 *
1520 * Master ATA bus probing function. Initiates a hardware-dependent
1521 * bus reset, then attempts to identify any devices found on
1522 * the bus.
1523 *
1524 * LOCKING:
1525 * PCI/etc. bus probe sem.
1526 *
1527 * RETURNS:
1528 * Zero on success, negative errno otherwise.
1529 */
1530
1531static int ata_bus_probe(struct ata_port *ap)
1532{
1533 unsigned int classes[ATA_MAX_DEVICES];
1534 int tries[ATA_MAX_DEVICES];
1535 int i, rc, down_xfermask;
1536 struct ata_device *dev;
1537
1538 ata_port_probe(ap);
1539
1540 for (i = 0; i < ATA_MAX_DEVICES; i++)
1541 tries[i] = ATA_PROBE_MAX_TRIES;
1542
1543 retry:
1544 down_xfermask = 0;
1545
1546 /* reset and determine device classes */
1547 ap->ops->phy_reset(ap);
1548
1549 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1550 dev = &ap->device[i];
1551
1552 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1553 dev->class != ATA_DEV_UNKNOWN)
1554 classes[dev->devno] = dev->class;
1555 else
1556 classes[dev->devno] = ATA_DEV_NONE;
1557
1558 dev->class = ATA_DEV_UNKNOWN;
1559 }
1560
1561 ata_port_probe(ap);
1562
1563 /* after the reset the device state is PIO 0 and the controller
1564 state is undefined. Record the mode */
1565
1566 for (i = 0; i < ATA_MAX_DEVICES; i++)
1567 ap->device[i].pio_mode = XFER_PIO_0;
1568
1569 /* read IDENTIFY page and configure devices */
1570 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1571 dev = &ap->device[i];
1572
1573 if (tries[i])
1574 dev->class = classes[i];
1575
1576 if (!ata_dev_enabled(dev))
1577 continue;
1578
1579 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1580 if (rc)
1581 goto fail;
1582
1583 rc = ata_dev_configure(dev, 1);
1584 if (rc)
1585 goto fail;
1586 }
1587
1588 /* configure transfer mode */
1589 rc = ata_set_mode(ap, &dev);
1590 if (rc) {
1591 down_xfermask = 1;
1592 goto fail;
1593 }
1594
1595 for (i = 0; i < ATA_MAX_DEVICES; i++)
1596 if (ata_dev_enabled(&ap->device[i]))
1597 return 0;
1598
1599 /* no device present, disable port */
1600 ata_port_disable(ap);
1601 ap->ops->port_disable(ap);
1602 return -ENODEV;
1603
1604 fail:
1605 switch (rc) {
1606 case -EINVAL:
1607 case -ENODEV:
1608 tries[dev->devno] = 0;
1609 break;
1610 case -EIO:
1611 sata_down_spd_limit(ap);
1612 /* fall through */
1613 default:
1614 tries[dev->devno]--;
1615 if (down_xfermask &&
1616 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1617 tries[dev->devno] = 0;
1618 }
1619
1620 if (!tries[dev->devno]) {
1621 ata_down_xfermask_limit(dev, 1);
1622 ata_dev_disable(dev);
1623 }
1624
1625 goto retry;
1626}
1627
1628/**
1629 * ata_port_probe - Mark port as enabled
1630 * @ap: Port for which we indicate enablement
1631 *
1632 * Modify @ap data structure such that the system
1633 * thinks that the entire port is enabled.
1634 *
1635 * LOCKING: host_set lock, or some other form of
1636 * serialization.
1637 */
1638
1639void ata_port_probe(struct ata_port *ap)
1640{
1641 ap->flags &= ~ATA_FLAG_DISABLED;
1642}
1643
1644/**
1645 * sata_print_link_status - Print SATA link status
1646 * @ap: SATA port to printk link status about
1647 *
1648 * This function prints link speed and status of a SATA link.
1649 *
1650 * LOCKING:
1651 * None.
1652 */
1653static void sata_print_link_status(struct ata_port *ap)
1654{
1655 u32 sstatus, scontrol, tmp;
1656
1657 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1658 return;
1659 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1660
1661 if (ata_port_online(ap)) {
1662 tmp = (sstatus >> 4) & 0xf;
1663 ata_port_printk(ap, KERN_INFO,
1664 "SATA link up %s (SStatus %X SControl %X)\n",
1665 sata_spd_string(tmp), sstatus, scontrol);
1666 } else {
1667 ata_port_printk(ap, KERN_INFO,
1668 "SATA link down (SStatus %X SControl %X)\n",
1669 sstatus, scontrol);
1670 }
1671}
1672
1673/**
1674 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1675 * @ap: SATA port associated with target SATA PHY.
1676 *
1677 * This function issues commands to standard SATA Sxxx
1678 * PHY registers, to wake up the phy (and device), and
1679 * clear any reset condition.
1680 *
1681 * LOCKING:
1682 * PCI/etc. bus probe sem.
1683 *
1684 */
1685void __sata_phy_reset(struct ata_port *ap)
1686{
1687 u32 sstatus;
1688 unsigned long timeout = jiffies + (HZ * 5);
1689
1690 if (ap->flags & ATA_FLAG_SATA_RESET) {
1691 /* issue phy wake/reset */
1692 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1693 /* Couldn't find anything in SATA I/II specs, but
1694 * AHCI-1.1 10.4.2 says at least 1 ms. */
1695 mdelay(1);
1696 }
1697 /* phy wake/clear reset */
1698 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1699
1700 /* wait for phy to become ready, if necessary */
1701 do {
1702 msleep(200);
1703 sata_scr_read(ap, SCR_STATUS, &sstatus);
1704 if ((sstatus & 0xf) != 1)
1705 break;
1706 } while (time_before(jiffies, timeout));
1707
1708 /* print link status */
1709 sata_print_link_status(ap);
1710
1711 /* TODO: phy layer with polling, timeouts, etc. */
1712 if (!ata_port_offline(ap))
1713 ata_port_probe(ap);
1714 else
1715 ata_port_disable(ap);
1716
1717 if (ap->flags & ATA_FLAG_DISABLED)
1718 return;
1719
1720 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1721 ata_port_disable(ap);
1722 return;
1723 }
1724
1725 ap->cbl = ATA_CBL_SATA;
1726}
1727
1728/**
1729 * sata_phy_reset - Reset SATA bus.
1730 * @ap: SATA port associated with target SATA PHY.
1731 *
1732 * This function resets the SATA bus, and then probes
1733 * the bus for devices.
1734 *
1735 * LOCKING:
1736 * PCI/etc. bus probe sem.
1737 *
1738 */
1739void sata_phy_reset(struct ata_port *ap)
1740{
1741 __sata_phy_reset(ap);
1742 if (ap->flags & ATA_FLAG_DISABLED)
1743 return;
1744 ata_bus_reset(ap);
1745}
1746
1747/**
1748 * ata_dev_pair - return other device on cable
1749 * @adev: device
1750 *
1751 * Obtain the other device on the same cable, or if none is
1752 * present NULL is returned
1753 */
1754
1755struct ata_device *ata_dev_pair(struct ata_device *adev)
1756{
1757 struct ata_port *ap = adev->ap;
1758 struct ata_device *pair = &ap->device[1 - adev->devno];
1759 if (!ata_dev_enabled(pair))
1760 return NULL;
1761 return pair;
1762}
1763
1764/**
1765 * ata_port_disable - Disable port.
1766 * @ap: Port to be disabled.
1767 *
1768 * Modify @ap data structure such that the system
1769 * thinks that the entire port is disabled, and should
1770 * never attempt to probe or communicate with devices
1771 * on this port.
1772 *
1773 * LOCKING: host_set lock, or some other form of
1774 * serialization.
1775 */
1776
1777void ata_port_disable(struct ata_port *ap)
1778{
1779 ap->device[0].class = ATA_DEV_NONE;
1780 ap->device[1].class = ATA_DEV_NONE;
1781 ap->flags |= ATA_FLAG_DISABLED;
1782}
1783
1784/**
1785 * sata_down_spd_limit - adjust SATA spd limit downward
1786 * @ap: Port to adjust SATA spd limit for
1787 *
1788 * Adjust SATA spd limit of @ap downward. Note that this
1789 * function only adjusts the limit. The change must be applied
1790 * using sata_set_spd().
1791 *
1792 * LOCKING:
1793 * Inherited from caller.
1794 *
1795 * RETURNS:
1796 * 0 on success, negative errno on failure
1797 */
1798int sata_down_spd_limit(struct ata_port *ap)
1799{
1800 u32 sstatus, spd, mask;
1801 int rc, highbit;
1802
1803 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1804 if (rc)
1805 return rc;
1806
1807 mask = ap->sata_spd_limit;
1808 if (mask <= 1)
1809 return -EINVAL;
1810 highbit = fls(mask) - 1;
1811 mask &= ~(1 << highbit);
1812
1813 spd = (sstatus >> 4) & 0xf;
1814 if (spd <= 1)
1815 return -EINVAL;
1816 spd--;
1817 mask &= (1 << spd) - 1;
1818 if (!mask)
1819 return -EINVAL;
1820
1821 ap->sata_spd_limit = mask;
1822
1823 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1824 sata_spd_string(fls(mask)));
1825
1826 return 0;
1827}
1828
1829static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1830{
1831 u32 spd, limit;
1832
1833 if (ap->sata_spd_limit == UINT_MAX)
1834 limit = 0;
1835 else
1836 limit = fls(ap->sata_spd_limit);
1837
1838 spd = (*scontrol >> 4) & 0xf;
1839 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1840
1841 return spd != limit;
1842}
1843
1844/**
1845 * sata_set_spd_needed - is SATA spd configuration needed
1846 * @ap: Port in question
1847 *
1848 * Test whether the spd limit in SControl matches
1849 * @ap->sata_spd_limit. This function is used to determine
1850 * whether hardreset is necessary to apply SATA spd
1851 * configuration.
1852 *
1853 * LOCKING:
1854 * Inherited from caller.
1855 *
1856 * RETURNS:
1857 * 1 if SATA spd configuration is needed, 0 otherwise.
1858 */
1859int sata_set_spd_needed(struct ata_port *ap)
1860{
1861 u32 scontrol;
1862
1863 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1864 return 0;
1865
1866 return __sata_set_spd_needed(ap, &scontrol);
1867}
1868
1869/**
1870 * sata_set_spd - set SATA spd according to spd limit
1871 * @ap: Port to set SATA spd for
1872 *
1873 * Set SATA spd of @ap according to sata_spd_limit.
1874 *
1875 * LOCKING:
1876 * Inherited from caller.
1877 *
1878 * RETURNS:
1879 * 0 if spd doesn't need to be changed, 1 if spd has been
1880 * changed. Negative errno if SCR registers are inaccessible.
1881 */
1882int sata_set_spd(struct ata_port *ap)
1883{
1884 u32 scontrol;
1885 int rc;
1886
1887 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1888 return rc;
1889
1890 if (!__sata_set_spd_needed(ap, &scontrol))
1891 return 0;
1892
1893 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1894 return rc;
1895
1896 return 1;
1897}
1898
1899/*
1900 * This mode timing computation functionality is ported over from
1901 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1902 */
1903/*
1904 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1905 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1906 * for PIO 5, which is a nonstandard extension and UDMA6, which
1907 * is currently supported only by Maxtor drives.
1908 */
1909
1910static const struct ata_timing ata_timing[] = {
1911
1912 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1913 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1914 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1915 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1916
1917 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1918 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1919 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1920
1921/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1922
1923 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1924 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1925 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1926
1927 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1928 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1929 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1930
1931/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1932 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1933 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1934
1935 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1936 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1937 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1938
1939/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1940
1941 { 0xFF }
1942};
1943
1944#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1945#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1946
1947static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1948{
1949 q->setup = EZ(t->setup * 1000, T);
1950 q->act8b = EZ(t->act8b * 1000, T);
1951 q->rec8b = EZ(t->rec8b * 1000, T);
1952 q->cyc8b = EZ(t->cyc8b * 1000, T);
1953 q->active = EZ(t->active * 1000, T);
1954 q->recover = EZ(t->recover * 1000, T);
1955 q->cycle = EZ(t->cycle * 1000, T);
1956 q->udma = EZ(t->udma * 1000, UT);
1957}
1958
1959void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1960 struct ata_timing *m, unsigned int what)
1961{
1962 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1963 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1964 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1965 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1966 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1967 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1968 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1969 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1970}
1971
1972static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1973{
1974 const struct ata_timing *t;
1975
1976 for (t = ata_timing; t->mode != speed; t++)
1977 if (t->mode == 0xFF)
1978 return NULL;
1979 return t;
1980}
1981
1982int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1983 struct ata_timing *t, int T, int UT)
1984{
1985 const struct ata_timing *s;
1986 struct ata_timing p;
1987
1988 /*
1989 * Find the mode.
1990 */
1991
1992 if (!(s = ata_timing_find_mode(speed)))
1993 return -EINVAL;
1994
1995 memcpy(t, s, sizeof(*s));
1996
1997 /*
1998 * If the drive is an EIDE drive, it can tell us it needs extended
1999 * PIO/MW_DMA cycle timing.
2000 */
2001
2002 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
2003 memset(&p, 0, sizeof(p));
2004 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
2005 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
2006 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
2007 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
2008 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
2009 }
2010 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2011 }
2012
2013 /*
2014 * Convert the timing to bus clock counts.
2015 */
2016
2017 ata_timing_quantize(t, t, T, UT);
2018
2019 /*
2020 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2021 * S.M.A.R.T * and some other commands. We have to ensure that the
2022 * DMA cycle timing is slower/equal than the fastest PIO timing.
2023 */
2024
2025 if (speed > XFER_PIO_4) {
2026 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2027 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2028 }
2029
2030 /*
2031 * Lengthen active & recovery time so that cycle time is correct.
2032 */
2033
2034 if (t->act8b + t->rec8b < t->cyc8b) {
2035 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2036 t->rec8b = t->cyc8b - t->act8b;
2037 }
2038
2039 if (t->active + t->recover < t->cycle) {
2040 t->active += (t->cycle - (t->active + t->recover)) / 2;
2041 t->recover = t->cycle - t->active;
2042 }
2043
2044 return 0;
2045}
2046
2047/**
2048 * ata_down_xfermask_limit - adjust dev xfer masks downward
2049 * @dev: Device to adjust xfer masks
2050 * @force_pio0: Force PIO0
2051 *
2052 * Adjust xfer masks of @dev downward. Note that this function
2053 * does not apply the change. Invoking ata_set_mode() afterwards
2054 * will apply the limit.
2055 *
2056 * LOCKING:
2057 * Inherited from caller.
2058 *
2059 * RETURNS:
2060 * 0 on success, negative errno on failure
2061 */
2062int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2063{
2064 unsigned long xfer_mask;
2065 int highbit;
2066
2067 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2068 dev->udma_mask);
2069
2070 if (!xfer_mask)
2071 goto fail;
2072 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2073 if (xfer_mask & ATA_MASK_UDMA)
2074 xfer_mask &= ~ATA_MASK_MWDMA;
2075
2076 highbit = fls(xfer_mask) - 1;
2077 xfer_mask &= ~(1 << highbit);
2078 if (force_pio0)
2079 xfer_mask &= 1 << ATA_SHIFT_PIO;
2080 if (!xfer_mask)
2081 goto fail;
2082
2083 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2084 &dev->udma_mask);
2085
2086 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2087 ata_mode_string(xfer_mask));
2088
2089 return 0;
2090
2091 fail:
2092 return -EINVAL;
2093}
2094
2095static int ata_dev_set_mode(struct ata_device *dev)
2096{
2097 unsigned int err_mask;
2098 int rc;
2099
2100 dev->flags &= ~ATA_DFLAG_PIO;
2101 if (dev->xfer_shift == ATA_SHIFT_PIO)
2102 dev->flags |= ATA_DFLAG_PIO;
2103
2104 err_mask = ata_dev_set_xfermode(dev);
2105 if (err_mask) {
2106 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2107 "(err_mask=0x%x)\n", err_mask);
2108 return -EIO;
2109 }
2110
2111 rc = ata_dev_revalidate(dev, 0);
2112 if (rc)
2113 return rc;
2114
2115 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2116 dev->xfer_shift, (int)dev->xfer_mode);
2117
2118 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2119 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2120 return 0;
2121}
2122
2123/**
2124 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2125 * @ap: port on which timings will be programmed
2126 * @r_failed_dev: out paramter for failed device
2127 *
2128 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2129 * ata_set_mode() fails, pointer to the failing device is
2130 * returned in @r_failed_dev.
2131 *
2132 * LOCKING:
2133 * PCI/etc. bus probe sem.
2134 *
2135 * RETURNS:
2136 * 0 on success, negative errno otherwise
2137 */
2138int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2139{
2140 struct ata_device *dev;
2141 int i, rc = 0, used_dma = 0, found = 0;
2142
2143 /* has private set_mode? */
2144 if (ap->ops->set_mode) {
2145 /* FIXME: make ->set_mode handle no device case and
2146 * return error code and failing device on failure.
2147 */
2148 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2149 if (ata_dev_ready(&ap->device[i])) {
2150 ap->ops->set_mode(ap);
2151 break;
2152 }
2153 }
2154 return 0;
2155 }
2156
2157 /* step 1: calculate xfer_mask */
2158 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2159 unsigned int pio_mask, dma_mask;
2160
2161 dev = &ap->device[i];
2162
2163 if (!ata_dev_enabled(dev))
2164 continue;
2165
2166 ata_dev_xfermask(dev);
2167
2168 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2169 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2170 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2171 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2172
2173 found = 1;
2174 if (dev->dma_mode)
2175 used_dma = 1;
2176 }
2177 if (!found)
2178 goto out;
2179
2180 /* step 2: always set host PIO timings */
2181 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2182 dev = &ap->device[i];
2183 if (!ata_dev_enabled(dev))
2184 continue;
2185
2186 if (!dev->pio_mode) {
2187 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2188 rc = -EINVAL;
2189 goto out;
2190 }
2191
2192 dev->xfer_mode = dev->pio_mode;
2193 dev->xfer_shift = ATA_SHIFT_PIO;
2194 if (ap->ops->set_piomode)
2195 ap->ops->set_piomode(ap, dev);
2196 }
2197
2198 /* step 3: set host DMA timings */
2199 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2200 dev = &ap->device[i];
2201
2202 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2203 continue;
2204
2205 dev->xfer_mode = dev->dma_mode;
2206 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2207 if (ap->ops->set_dmamode)
2208 ap->ops->set_dmamode(ap, dev);
2209 }
2210
2211 /* step 4: update devices' xfer mode */
2212 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2213 dev = &ap->device[i];
2214
2215 /* don't udpate suspended devices' xfer mode */
2216 if (!ata_dev_ready(dev))
2217 continue;
2218
2219 rc = ata_dev_set_mode(dev);
2220 if (rc)
2221 goto out;
2222 }
2223
2224 /* Record simplex status. If we selected DMA then the other
2225 * host channels are not permitted to do so.
2226 */
2227 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2228 ap->host_set->simplex_claimed = 1;
2229
2230 /* step5: chip specific finalisation */
2231 if (ap->ops->post_set_mode)
2232 ap->ops->post_set_mode(ap);
2233
2234 out:
2235 if (rc)
2236 *r_failed_dev = dev;
2237 return rc;
2238}
2239
2240/**
2241 * ata_tf_to_host - issue ATA taskfile to host controller
2242 * @ap: port to which command is being issued
2243 * @tf: ATA taskfile register set
2244 *
2245 * Issues ATA taskfile register set to ATA host controller,
2246 * with proper synchronization with interrupt handler and
2247 * other threads.
2248 *
2249 * LOCKING:
2250 * spin_lock_irqsave(host_set lock)
2251 */
2252
2253static inline void ata_tf_to_host(struct ata_port *ap,
2254 const struct ata_taskfile *tf)
2255{
2256 ap->ops->tf_load(ap, tf);
2257 ap->ops->exec_command(ap, tf);
2258}
2259
2260/**
2261 * ata_busy_sleep - sleep until BSY clears, or timeout
2262 * @ap: port containing status register to be polled
2263 * @tmout_pat: impatience timeout
2264 * @tmout: overall timeout
2265 *
2266 * Sleep until ATA Status register bit BSY clears,
2267 * or a timeout occurs.
2268 *
2269 * LOCKING: None.
2270 */
2271
2272unsigned int ata_busy_sleep (struct ata_port *ap,
2273 unsigned long tmout_pat, unsigned long tmout)
2274{
2275 unsigned long timer_start, timeout;
2276 u8 status;
2277
2278 status = ata_busy_wait(ap, ATA_BUSY, 300);
2279 timer_start = jiffies;
2280 timeout = timer_start + tmout_pat;
2281 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2282 msleep(50);
2283 status = ata_busy_wait(ap, ATA_BUSY, 3);
2284 }
2285
2286 if (status & ATA_BUSY)
2287 ata_port_printk(ap, KERN_WARNING,
2288 "port is slow to respond, please be patient\n");
2289
2290 timeout = timer_start + tmout;
2291 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2292 msleep(50);
2293 status = ata_chk_status(ap);
2294 }
2295
2296 if (status & ATA_BUSY) {
2297 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2298 "(%lu secs)\n", tmout / HZ);
2299 return 1;
2300 }
2301
2302 return 0;
2303}
2304
2305static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2306{
2307 struct ata_ioports *ioaddr = &ap->ioaddr;
2308 unsigned int dev0 = devmask & (1 << 0);
2309 unsigned int dev1 = devmask & (1 << 1);
2310 unsigned long timeout;
2311
2312 /* if device 0 was found in ata_devchk, wait for its
2313 * BSY bit to clear
2314 */
2315 if (dev0)
2316 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2317
2318 /* if device 1 was found in ata_devchk, wait for
2319 * register access, then wait for BSY to clear
2320 */
2321 timeout = jiffies + ATA_TMOUT_BOOT;
2322 while (dev1) {
2323 u8 nsect, lbal;
2324
2325 ap->ops->dev_select(ap, 1);
2326 if (ap->flags & ATA_FLAG_MMIO) {
2327 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2328 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2329 } else {
2330 nsect = inb(ioaddr->nsect_addr);
2331 lbal = inb(ioaddr->lbal_addr);
2332 }
2333 if ((nsect == 1) && (lbal == 1))
2334 break;
2335 if (time_after(jiffies, timeout)) {
2336 dev1 = 0;
2337 break;
2338 }
2339 msleep(50); /* give drive a breather */
2340 }
2341 if (dev1)
2342 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2343
2344 /* is all this really necessary? */
2345 ap->ops->dev_select(ap, 0);
2346 if (dev1)
2347 ap->ops->dev_select(ap, 1);
2348 if (dev0)
2349 ap->ops->dev_select(ap, 0);
2350}
2351
2352static unsigned int ata_bus_softreset(struct ata_port *ap,
2353 unsigned int devmask)
2354{
2355 struct ata_ioports *ioaddr = &ap->ioaddr;
2356
2357 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2358
2359 /* software reset. causes dev0 to be selected */
2360 if (ap->flags & ATA_FLAG_MMIO) {
2361 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2362 udelay(20); /* FIXME: flush */
2363 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2364 udelay(20); /* FIXME: flush */
2365 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2366 } else {
2367 outb(ap->ctl, ioaddr->ctl_addr);
2368 udelay(10);
2369 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2370 udelay(10);
2371 outb(ap->ctl, ioaddr->ctl_addr);
2372 }
2373
2374 /* spec mandates ">= 2ms" before checking status.
2375 * We wait 150ms, because that was the magic delay used for
2376 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2377 * between when the ATA command register is written, and then
2378 * status is checked. Because waiting for "a while" before
2379 * checking status is fine, post SRST, we perform this magic
2380 * delay here as well.
2381 *
2382 * Old drivers/ide uses the 2mS rule and then waits for ready
2383 */
2384 msleep(150);
2385
2386 /* Before we perform post reset processing we want to see if
2387 * the bus shows 0xFF because the odd clown forgets the D7
2388 * pulldown resistor.
2389 */
2390 if (ata_check_status(ap) == 0xFF) {
2391 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2392 return AC_ERR_OTHER;
2393 }
2394
2395 ata_bus_post_reset(ap, devmask);
2396
2397 return 0;
2398}
2399
2400/**
2401 * ata_bus_reset - reset host port and associated ATA channel
2402 * @ap: port to reset
2403 *
2404 * This is typically the first time we actually start issuing
2405 * commands to the ATA channel. We wait for BSY to clear, then
2406 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2407 * result. Determine what devices, if any, are on the channel
2408 * by looking at the device 0/1 error register. Look at the signature
2409 * stored in each device's taskfile registers, to determine if
2410 * the device is ATA or ATAPI.
2411 *
2412 * LOCKING:
2413 * PCI/etc. bus probe sem.
2414 * Obtains host_set lock.
2415 *
2416 * SIDE EFFECTS:
2417 * Sets ATA_FLAG_DISABLED if bus reset fails.
2418 */
2419
2420void ata_bus_reset(struct ata_port *ap)
2421{
2422 struct ata_ioports *ioaddr = &ap->ioaddr;
2423 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2424 u8 err;
2425 unsigned int dev0, dev1 = 0, devmask = 0;
2426
2427 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2428
2429 /* determine if device 0/1 are present */
2430 if (ap->flags & ATA_FLAG_SATA_RESET)
2431 dev0 = 1;
2432 else {
2433 dev0 = ata_devchk(ap, 0);
2434 if (slave_possible)
2435 dev1 = ata_devchk(ap, 1);
2436 }
2437
2438 if (dev0)
2439 devmask |= (1 << 0);
2440 if (dev1)
2441 devmask |= (1 << 1);
2442
2443 /* select device 0 again */
2444 ap->ops->dev_select(ap, 0);
2445
2446 /* issue bus reset */
2447 if (ap->flags & ATA_FLAG_SRST)
2448 if (ata_bus_softreset(ap, devmask))
2449 goto err_out;
2450
2451 /*
2452 * determine by signature whether we have ATA or ATAPI devices
2453 */
2454 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2455 if ((slave_possible) && (err != 0x81))
2456 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2457
2458 /* re-enable interrupts */
2459 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2460 ata_irq_on(ap);
2461
2462 /* is double-select really necessary? */
2463 if (ap->device[1].class != ATA_DEV_NONE)
2464 ap->ops->dev_select(ap, 1);
2465 if (ap->device[0].class != ATA_DEV_NONE)
2466 ap->ops->dev_select(ap, 0);
2467
2468 /* if no devices were detected, disable this port */
2469 if ((ap->device[0].class == ATA_DEV_NONE) &&
2470 (ap->device[1].class == ATA_DEV_NONE))
2471 goto err_out;
2472
2473 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2474 /* set up device control for ATA_FLAG_SATA_RESET */
2475 if (ap->flags & ATA_FLAG_MMIO)
2476 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2477 else
2478 outb(ap->ctl, ioaddr->ctl_addr);
2479 }
2480
2481 DPRINTK("EXIT\n");
2482 return;
2483
2484err_out:
2485 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2486 ap->ops->port_disable(ap);
2487
2488 DPRINTK("EXIT\n");
2489}
2490
2491/**
2492 * sata_phy_debounce - debounce SATA phy status
2493 * @ap: ATA port to debounce SATA phy status for
2494 * @params: timing parameters { interval, duratinon, timeout } in msec
2495 *
2496 * Make sure SStatus of @ap reaches stable state, determined by
2497 * holding the same value where DET is not 1 for @duration polled
2498 * every @interval, before @timeout. Timeout constraints the
2499 * beginning of the stable state. Because, after hot unplugging,
2500 * DET gets stuck at 1 on some controllers, this functions waits
2501 * until timeout then returns 0 if DET is stable at 1.
2502 *
2503 * LOCKING:
2504 * Kernel thread context (may sleep)
2505 *
2506 * RETURNS:
2507 * 0 on success, -errno on failure.
2508 */
2509int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2510{
2511 unsigned long interval_msec = params[0];
2512 unsigned long duration = params[1] * HZ / 1000;
2513 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2514 unsigned long last_jiffies;
2515 u32 last, cur;
2516 int rc;
2517
2518 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2519 return rc;
2520 cur &= 0xf;
2521
2522 last = cur;
2523 last_jiffies = jiffies;
2524
2525 while (1) {
2526 msleep(interval_msec);
2527 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2528 return rc;
2529 cur &= 0xf;
2530
2531 /* DET stable? */
2532 if (cur == last) {
2533 if (cur == 1 && time_before(jiffies, timeout))
2534 continue;
2535 if (time_after(jiffies, last_jiffies + duration))
2536 return 0;
2537 continue;
2538 }
2539
2540 /* unstable, start over */
2541 last = cur;
2542 last_jiffies = jiffies;
2543
2544 /* check timeout */
2545 if (time_after(jiffies, timeout))
2546 return -EBUSY;
2547 }
2548}
2549
2550/**
2551 * sata_phy_resume - resume SATA phy
2552 * @ap: ATA port to resume SATA phy for
2553 * @params: timing parameters { interval, duratinon, timeout } in msec
2554 *
2555 * Resume SATA phy of @ap and debounce it.
2556 *
2557 * LOCKING:
2558 * Kernel thread context (may sleep)
2559 *
2560 * RETURNS:
2561 * 0 on success, -errno on failure.
2562 */
2563int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2564{
2565 u32 scontrol;
2566 int rc;
2567
2568 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2569 return rc;
2570
2571 scontrol = (scontrol & 0x0f0) | 0x300;
2572
2573 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2574 return rc;
2575
2576 /* Some PHYs react badly if SStatus is pounded immediately
2577 * after resuming. Delay 200ms before debouncing.
2578 */
2579 msleep(200);
2580
2581 return sata_phy_debounce(ap, params);
2582}
2583
2584static void ata_wait_spinup(struct ata_port *ap)
2585{
2586 struct ata_eh_context *ehc = &ap->eh_context;
2587 unsigned long end, secs;
2588 int rc;
2589
2590 /* first, debounce phy if SATA */
2591 if (ap->cbl == ATA_CBL_SATA) {
2592 rc = sata_phy_debounce(ap, sata_deb_timing_hotplug);
2593
2594 /* if debounced successfully and offline, no need to wait */
2595 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2596 return;
2597 }
2598
2599 /* okay, let's give the drive time to spin up */
2600 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2601 secs = ((end - jiffies) + HZ - 1) / HZ;
2602
2603 if (time_after(jiffies, end))
2604 return;
2605
2606 if (secs > 5)
2607 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2608 "(%lu secs)\n", secs);
2609
2610 schedule_timeout_uninterruptible(end - jiffies);
2611}
2612
2613/**
2614 * ata_std_prereset - prepare for reset
2615 * @ap: ATA port to be reset
2616 *
2617 * @ap is about to be reset. Initialize it.
2618 *
2619 * LOCKING:
2620 * Kernel thread context (may sleep)
2621 *
2622 * RETURNS:
2623 * 0 on success, -errno otherwise.
2624 */
2625int ata_std_prereset(struct ata_port *ap)
2626{
2627 struct ata_eh_context *ehc = &ap->eh_context;
2628 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2629 int rc;
2630
2631 /* handle link resume & hotplug spinup */
2632 if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
2633 (ap->flags & ATA_FLAG_HRST_TO_RESUME))
2634 ehc->i.action |= ATA_EH_HARDRESET;
2635
2636 if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) &&
2637 (ap->flags & ATA_FLAG_SKIP_D2H_BSY))
2638 ata_wait_spinup(ap);
2639
2640 /* if we're about to do hardreset, nothing more to do */
2641 if (ehc->i.action & ATA_EH_HARDRESET)
2642 return 0;
2643
2644 /* if SATA, resume phy */
2645 if (ap->cbl == ATA_CBL_SATA) {
2646 rc = sata_phy_resume(ap, timing);
2647 if (rc && rc != -EOPNOTSUPP) {
2648 /* phy resume failed */
2649 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2650 "link for reset (errno=%d)\n", rc);
2651 return rc;
2652 }
2653 }
2654
2655 /* Wait for !BSY if the controller can wait for the first D2H
2656 * Reg FIS and we don't know that no device is attached.
2657 */
2658 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2659 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2660
2661 return 0;
2662}
2663
2664/**
2665 * ata_std_softreset - reset host port via ATA SRST
2666 * @ap: port to reset
2667 * @classes: resulting classes of attached devices
2668 *
2669 * Reset host port using ATA SRST.
2670 *
2671 * LOCKING:
2672 * Kernel thread context (may sleep)
2673 *
2674 * RETURNS:
2675 * 0 on success, -errno otherwise.
2676 */
2677int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2678{
2679 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2680 unsigned int devmask = 0, err_mask;
2681 u8 err;
2682
2683 DPRINTK("ENTER\n");
2684
2685 if (ata_port_offline(ap)) {
2686 classes[0] = ATA_DEV_NONE;
2687 goto out;
2688 }
2689
2690 /* determine if device 0/1 are present */
2691 if (ata_devchk(ap, 0))
2692 devmask |= (1 << 0);
2693 if (slave_possible && ata_devchk(ap, 1))
2694 devmask |= (1 << 1);
2695
2696 /* select device 0 again */
2697 ap->ops->dev_select(ap, 0);
2698
2699 /* issue bus reset */
2700 DPRINTK("about to softreset, devmask=%x\n", devmask);
2701 err_mask = ata_bus_softreset(ap, devmask);
2702 if (err_mask) {
2703 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2704 err_mask);
2705 return -EIO;
2706 }
2707
2708 /* determine by signature whether we have ATA or ATAPI devices */
2709 classes[0] = ata_dev_try_classify(ap, 0, &err);
2710 if (slave_possible && err != 0x81)
2711 classes[1] = ata_dev_try_classify(ap, 1, &err);
2712
2713 out:
2714 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2715 return 0;
2716}
2717
2718/**
2719 * sata_std_hardreset - reset host port via SATA phy reset
2720 * @ap: port to reset
2721 * @class: resulting class of attached device
2722 *
2723 * SATA phy-reset host port using DET bits of SControl register.
2724 *
2725 * LOCKING:
2726 * Kernel thread context (may sleep)
2727 *
2728 * RETURNS:
2729 * 0 on success, -errno otherwise.
2730 */
2731int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2732{
2733 struct ata_eh_context *ehc = &ap->eh_context;
2734 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2735 u32 scontrol;
2736 int rc;
2737
2738 DPRINTK("ENTER\n");
2739
2740 if (sata_set_spd_needed(ap)) {
2741 /* SATA spec says nothing about how to reconfigure
2742 * spd. To be on the safe side, turn off phy during
2743 * reconfiguration. This works for at least ICH7 AHCI
2744 * and Sil3124.
2745 */
2746 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2747 return rc;
2748
2749 scontrol = (scontrol & 0x0f0) | 0x302;
2750
2751 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2752 return rc;
2753
2754 sata_set_spd(ap);
2755 }
2756
2757 /* issue phy wake/reset */
2758 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2759 return rc;
2760
2761 scontrol = (scontrol & 0x0f0) | 0x301;
2762
2763 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2764 return rc;
2765
2766 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2767 * 10.4.2 says at least 1 ms.
2768 */
2769 msleep(1);
2770
2771 /* bring phy back */
2772 sata_phy_resume(ap, timing);
2773
2774 /* TODO: phy layer with polling, timeouts, etc. */
2775 if (ata_port_offline(ap)) {
2776 *class = ATA_DEV_NONE;
2777 DPRINTK("EXIT, link offline\n");
2778 return 0;
2779 }
2780
2781 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2782 ata_port_printk(ap, KERN_ERR,
2783 "COMRESET failed (device not ready)\n");
2784 return -EIO;
2785 }
2786
2787 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2788
2789 *class = ata_dev_try_classify(ap, 0, NULL);
2790
2791 DPRINTK("EXIT, class=%u\n", *class);
2792 return 0;
2793}
2794
2795/**
2796 * ata_std_postreset - standard postreset callback
2797 * @ap: the target ata_port
2798 * @classes: classes of attached devices
2799 *
2800 * This function is invoked after a successful reset. Note that
2801 * the device might have been reset more than once using
2802 * different reset methods before postreset is invoked.
2803 *
2804 * LOCKING:
2805 * Kernel thread context (may sleep)
2806 */
2807void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2808{
2809 u32 serror;
2810
2811 DPRINTK("ENTER\n");
2812
2813 /* print link status */
2814 sata_print_link_status(ap);
2815
2816 /* clear SError */
2817 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2818 sata_scr_write(ap, SCR_ERROR, serror);
2819
2820 /* re-enable interrupts */
2821 if (!ap->ops->error_handler) {
2822 /* FIXME: hack. create a hook instead */
2823 if (ap->ioaddr.ctl_addr)
2824 ata_irq_on(ap);
2825 }
2826
2827 /* is double-select really necessary? */
2828 if (classes[0] != ATA_DEV_NONE)
2829 ap->ops->dev_select(ap, 1);
2830 if (classes[1] != ATA_DEV_NONE)
2831 ap->ops->dev_select(ap, 0);
2832
2833 /* bail out if no device is present */
2834 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2835 DPRINTK("EXIT, no device\n");
2836 return;
2837 }
2838
2839 /* set up device control */
2840 if (ap->ioaddr.ctl_addr) {
2841 if (ap->flags & ATA_FLAG_MMIO)
2842 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2843 else
2844 outb(ap->ctl, ap->ioaddr.ctl_addr);
2845 }
2846
2847 DPRINTK("EXIT\n");
2848}
2849
2850/**
2851 * ata_dev_same_device - Determine whether new ID matches configured device
2852 * @dev: device to compare against
2853 * @new_class: class of the new device
2854 * @new_id: IDENTIFY page of the new device
2855 *
2856 * Compare @new_class and @new_id against @dev and determine
2857 * whether @dev is the device indicated by @new_class and
2858 * @new_id.
2859 *
2860 * LOCKING:
2861 * None.
2862 *
2863 * RETURNS:
2864 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2865 */
2866static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2867 const u16 *new_id)
2868{
2869 const u16 *old_id = dev->id;
2870 unsigned char model[2][41], serial[2][21];
2871 u64 new_n_sectors;
2872
2873 if (dev->class != new_class) {
2874 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2875 dev->class, new_class);
2876 return 0;
2877 }
2878
2879 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2880 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2881 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2882 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2883 new_n_sectors = ata_id_n_sectors(new_id);
2884
2885 if (strcmp(model[0], model[1])) {
2886 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2887 "'%s' != '%s'\n", model[0], model[1]);
2888 return 0;
2889 }
2890
2891 if (strcmp(serial[0], serial[1])) {
2892 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2893 "'%s' != '%s'\n", serial[0], serial[1]);
2894 return 0;
2895 }
2896
2897 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2898 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2899 "%llu != %llu\n",
2900 (unsigned long long)dev->n_sectors,
2901 (unsigned long long)new_n_sectors);
2902 return 0;
2903 }
2904
2905 return 1;
2906}
2907
2908/**
2909 * ata_dev_revalidate - Revalidate ATA device
2910 * @dev: device to revalidate
2911 * @post_reset: is this revalidation after reset?
2912 *
2913 * Re-read IDENTIFY page and make sure @dev is still attached to
2914 * the port.
2915 *
2916 * LOCKING:
2917 * Kernel thread context (may sleep)
2918 *
2919 * RETURNS:
2920 * 0 on success, negative errno otherwise
2921 */
2922int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2923{
2924 unsigned int class = dev->class;
2925 u16 *id = (void *)dev->ap->sector_buf;
2926 int rc;
2927
2928 if (!ata_dev_enabled(dev)) {
2929 rc = -ENODEV;
2930 goto fail;
2931 }
2932
2933 /* read ID data */
2934 rc = ata_dev_read_id(dev, &class, post_reset, id);
2935 if (rc)
2936 goto fail;
2937
2938 /* is the device still there? */
2939 if (!ata_dev_same_device(dev, class, id)) {
2940 rc = -ENODEV;
2941 goto fail;
2942 }
2943
2944 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2945
2946 /* configure device according to the new ID */
2947 rc = ata_dev_configure(dev, 0);
2948 if (rc == 0)
2949 return 0;
2950
2951 fail:
2952 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2953 return rc;
2954}
2955
2956static const char * const ata_dma_blacklist [] = {
2957 "WDC AC11000H", NULL,
2958 "WDC AC22100H", NULL,
2959 "WDC AC32500H", NULL,
2960 "WDC AC33100H", NULL,
2961 "WDC AC31600H", NULL,
2962 "WDC AC32100H", "24.09P07",
2963 "WDC AC23200L", "21.10N21",
2964 "Compaq CRD-8241B", NULL,
2965 "CRD-8400B", NULL,
2966 "CRD-8480B", NULL,
2967 "CRD-8482B", NULL,
2968 "CRD-84", NULL,
2969 "SanDisk SDP3B", NULL,
2970 "SanDisk SDP3B-64", NULL,
2971 "SANYO CD-ROM CRD", NULL,
2972 "HITACHI CDR-8", NULL,
2973 "HITACHI CDR-8335", NULL,
2974 "HITACHI CDR-8435", NULL,
2975 "Toshiba CD-ROM XM-6202B", NULL,
2976 "TOSHIBA CD-ROM XM-1702BC", NULL,
2977 "CD-532E-A", NULL,
2978 "E-IDE CD-ROM CR-840", NULL,
2979 "CD-ROM Drive/F5A", NULL,
2980 "WPI CDD-820", NULL,
2981 "SAMSUNG CD-ROM SC-148C", NULL,
2982 "SAMSUNG CD-ROM SC", NULL,
2983 "SanDisk SDP3B-64", NULL,
2984 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2985 "_NEC DV5800A", NULL,
2986 "SAMSUNG CD-ROM SN-124", "N001"
2987};
2988
2989static int ata_strim(char *s, size_t len)
2990{
2991 len = strnlen(s, len);
2992
2993 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2994 while ((len > 0) && (s[len - 1] == ' ')) {
2995 len--;
2996 s[len] = 0;
2997 }
2998 return len;
2999}
3000
3001static int ata_dma_blacklisted(const struct ata_device *dev)
3002{
3003 unsigned char model_num[40];
3004 unsigned char model_rev[16];
3005 unsigned int nlen, rlen;
3006 int i;
3007
3008 /* We don't support polling DMA.
3009 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
3010 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
3011 */
3012 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
3013 (dev->flags & ATA_DFLAG_CDB_INTR))
3014 return 1;
3015
3016 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3017 sizeof(model_num));
3018 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3019 sizeof(model_rev));
3020 nlen = ata_strim(model_num, sizeof(model_num));
3021 rlen = ata_strim(model_rev, sizeof(model_rev));
3022
3023 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3024 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3025 if (ata_dma_blacklist[i+1] == NULL)
3026 return 1;
3027 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3028 return 1;
3029 }
3030 }
3031 return 0;
3032}
3033
3034/**
3035 * ata_dev_xfermask - Compute supported xfermask of the given device
3036 * @dev: Device to compute xfermask for
3037 *
3038 * Compute supported xfermask of @dev and store it in
3039 * dev->*_mask. This function is responsible for applying all
3040 * known limits including host controller limits, device
3041 * blacklist, etc...
3042 *
3043 * FIXME: The current implementation limits all transfer modes to
3044 * the fastest of the lowested device on the port. This is not
3045 * required on most controllers.
3046 *
3047 * LOCKING:
3048 * None.
3049 */
3050static void ata_dev_xfermask(struct ata_device *dev)
3051{
3052 struct ata_port *ap = dev->ap;
3053 struct ata_host_set *hs = ap->host_set;
3054 unsigned long xfer_mask;
3055 int i;
3056
3057 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3058 ap->mwdma_mask, ap->udma_mask);
3059
3060 /* Apply cable rule here. Don't apply it early because when
3061 * we handle hot plug the cable type can itself change.
3062 */
3063 if (ap->cbl == ATA_CBL_PATA40)
3064 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3065
3066 /* FIXME: Use port-wide xfermask for now */
3067 for (i = 0; i < ATA_MAX_DEVICES; i++) {
3068 struct ata_device *d = &ap->device[i];
3069
3070 if (ata_dev_absent(d))
3071 continue;
3072
3073 if (ata_dev_disabled(d)) {
3074 /* to avoid violating device selection timing */
3075 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3076 UINT_MAX, UINT_MAX);
3077 continue;
3078 }
3079
3080 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3081 d->mwdma_mask, d->udma_mask);
3082 xfer_mask &= ata_id_xfermask(d->id);
3083 if (ata_dma_blacklisted(d))
3084 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3085 }
3086
3087 if (ata_dma_blacklisted(dev))
3088 ata_dev_printk(dev, KERN_WARNING,
3089 "device is on DMA blacklist, disabling DMA\n");
3090
3091 if (hs->flags & ATA_HOST_SIMPLEX) {
3092 if (hs->simplex_claimed)
3093 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3094 }
3095
3096 if (ap->ops->mode_filter)
3097 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3098
3099 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3100 &dev->mwdma_mask, &dev->udma_mask);
3101}
3102
3103/**
3104 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3105 * @dev: Device to which command will be sent
3106 *
3107 * Issue SET FEATURES - XFER MODE command to device @dev
3108 * on port @ap.
3109 *
3110 * LOCKING:
3111 * PCI/etc. bus probe sem.
3112 *
3113 * RETURNS:
3114 * 0 on success, AC_ERR_* mask otherwise.
3115 */
3116
3117static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3118{
3119 struct ata_taskfile tf;
3120 unsigned int err_mask;
3121
3122 /* set up set-features taskfile */
3123 DPRINTK("set features - xfer mode\n");
3124
3125 ata_tf_init(dev, &tf);
3126 tf.command = ATA_CMD_SET_FEATURES;
3127 tf.feature = SETFEATURES_XFER;
3128 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3129 tf.protocol = ATA_PROT_NODATA;
3130 tf.nsect = dev->xfer_mode;
3131
3132 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3133
3134 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3135 return err_mask;
3136}
3137
3138/**
3139 * ata_dev_init_params - Issue INIT DEV PARAMS command
3140 * @dev: Device to which command will be sent
3141 * @heads: Number of heads (taskfile parameter)
3142 * @sectors: Number of sectors (taskfile parameter)
3143 *
3144 * LOCKING:
3145 * Kernel thread context (may sleep)
3146 *
3147 * RETURNS:
3148 * 0 on success, AC_ERR_* mask otherwise.
3149 */
3150static unsigned int ata_dev_init_params(struct ata_device *dev,
3151 u16 heads, u16 sectors)
3152{
3153 struct ata_taskfile tf;
3154 unsigned int err_mask;
3155
3156 /* Number of sectors per track 1-255. Number of heads 1-16 */
3157 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3158 return AC_ERR_INVALID;
3159
3160 /* set up init dev params taskfile */
3161 DPRINTK("init dev params \n");
3162
3163 ata_tf_init(dev, &tf);
3164 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3165 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3166 tf.protocol = ATA_PROT_NODATA;
3167 tf.nsect = sectors;
3168 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3169
3170 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3171
3172 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3173 return err_mask;
3174}
3175
3176/**
3177 * ata_sg_clean - Unmap DMA memory associated with command
3178 * @qc: Command containing DMA memory to be released
3179 *
3180 * Unmap all mapped DMA memory associated with this command.
3181 *
3182 * LOCKING:
3183 * spin_lock_irqsave(host_set lock)
3184 */
3185
3186static void ata_sg_clean(struct ata_queued_cmd *qc)
3187{
3188 struct ata_port *ap = qc->ap;
3189 struct scatterlist *sg = qc->__sg;
3190 int dir = qc->dma_dir;
3191 void *pad_buf = NULL;
3192
3193 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3194 WARN_ON(sg == NULL);
3195
3196 if (qc->flags & ATA_QCFLAG_SINGLE)
3197 WARN_ON(qc->n_elem > 1);
3198
3199 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3200
3201 /* if we padded the buffer out to 32-bit bound, and data
3202 * xfer direction is from-device, we must copy from the
3203 * pad buffer back into the supplied buffer
3204 */
3205 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3206 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3207
3208 if (qc->flags & ATA_QCFLAG_SG) {
3209 if (qc->n_elem)
3210 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3211 /* restore last sg */
3212 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3213 if (pad_buf) {
3214 struct scatterlist *psg = &qc->pad_sgent;
3215 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3216 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3217 kunmap_atomic(addr, KM_IRQ0);
3218 }
3219 } else {
3220 if (qc->n_elem)
3221 dma_unmap_single(ap->dev,
3222 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3223 dir);
3224 /* restore sg */
3225 sg->length += qc->pad_len;
3226 if (pad_buf)
3227 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3228 pad_buf, qc->pad_len);
3229 }
3230
3231 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3232 qc->__sg = NULL;
3233}
3234
3235/**
3236 * ata_fill_sg - Fill PCI IDE PRD table
3237 * @qc: Metadata associated with taskfile to be transferred
3238 *
3239 * Fill PCI IDE PRD (scatter-gather) table with segments
3240 * associated with the current disk command.
3241 *
3242 * LOCKING:
3243 * spin_lock_irqsave(host_set lock)
3244 *
3245 */
3246static void ata_fill_sg(struct ata_queued_cmd *qc)
3247{
3248 struct ata_port *ap = qc->ap;
3249 struct scatterlist *sg;
3250 unsigned int idx;
3251
3252 WARN_ON(qc->__sg == NULL);
3253 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3254
3255 idx = 0;
3256 ata_for_each_sg(sg, qc) {
3257 u32 addr, offset;
3258 u32 sg_len, len;
3259
3260 /* determine if physical DMA addr spans 64K boundary.
3261 * Note h/w doesn't support 64-bit, so we unconditionally
3262 * truncate dma_addr_t to u32.
3263 */
3264 addr = (u32) sg_dma_address(sg);
3265 sg_len = sg_dma_len(sg);
3266
3267 while (sg_len) {
3268 offset = addr & 0xffff;
3269 len = sg_len;
3270 if ((offset + sg_len) > 0x10000)
3271 len = 0x10000 - offset;
3272
3273 ap->prd[idx].addr = cpu_to_le32(addr);
3274 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3275 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3276
3277 idx++;
3278 sg_len -= len;
3279 addr += len;
3280 }
3281 }
3282
3283 if (idx)
3284 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3285}
3286/**
3287 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3288 * @qc: Metadata associated with taskfile to check
3289 *
3290 * Allow low-level driver to filter ATA PACKET commands, returning
3291 * a status indicating whether or not it is OK to use DMA for the
3292 * supplied PACKET command.
3293 *
3294 * LOCKING:
3295 * spin_lock_irqsave(host_set lock)
3296 *
3297 * RETURNS: 0 when ATAPI DMA can be used
3298 * nonzero otherwise
3299 */
3300int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3301{
3302 struct ata_port *ap = qc->ap;
3303 int rc = 0; /* Assume ATAPI DMA is OK by default */
3304
3305 if (ap->ops->check_atapi_dma)
3306 rc = ap->ops->check_atapi_dma(qc);
3307
3308 return rc;
3309}
3310/**
3311 * ata_qc_prep - Prepare taskfile for submission
3312 * @qc: Metadata associated with taskfile to be prepared
3313 *
3314 * Prepare ATA taskfile for submission.
3315 *
3316 * LOCKING:
3317 * spin_lock_irqsave(host_set lock)
3318 */
3319void ata_qc_prep(struct ata_queued_cmd *qc)
3320{
3321 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3322 return;
3323
3324 ata_fill_sg(qc);
3325}
3326
3327void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3328
3329/**
3330 * ata_sg_init_one - Associate command with memory buffer
3331 * @qc: Command to be associated
3332 * @buf: Memory buffer
3333 * @buflen: Length of memory buffer, in bytes.
3334 *
3335 * Initialize the data-related elements of queued_cmd @qc
3336 * to point to a single memory buffer, @buf of byte length @buflen.
3337 *
3338 * LOCKING:
3339 * spin_lock_irqsave(host_set lock)
3340 */
3341
3342void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3343{
3344 struct scatterlist *sg;
3345
3346 qc->flags |= ATA_QCFLAG_SINGLE;
3347
3348 memset(&qc->sgent, 0, sizeof(qc->sgent));
3349 qc->__sg = &qc->sgent;
3350 qc->n_elem = 1;
3351 qc->orig_n_elem = 1;
3352 qc->buf_virt = buf;
3353 qc->nbytes = buflen;
3354
3355 sg = qc->__sg;
3356 sg_init_one(sg, buf, buflen);
3357}
3358
3359/**
3360 * ata_sg_init - Associate command with scatter-gather table.
3361 * @qc: Command to be associated
3362 * @sg: Scatter-gather table.
3363 * @n_elem: Number of elements in s/g table.
3364 *
3365 * Initialize the data-related elements of queued_cmd @qc
3366 * to point to a scatter-gather table @sg, containing @n_elem
3367 * elements.
3368 *
3369 * LOCKING:
3370 * spin_lock_irqsave(host_set lock)
3371 */
3372
3373void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3374 unsigned int n_elem)
3375{
3376 qc->flags |= ATA_QCFLAG_SG;
3377 qc->__sg = sg;
3378 qc->n_elem = n_elem;
3379 qc->orig_n_elem = n_elem;
3380}
3381
3382/**
3383 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3384 * @qc: Command with memory buffer to be mapped.
3385 *
3386 * DMA-map the memory buffer associated with queued_cmd @qc.
3387 *
3388 * LOCKING:
3389 * spin_lock_irqsave(host_set lock)
3390 *
3391 * RETURNS:
3392 * Zero on success, negative on error.
3393 */
3394
3395static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3396{
3397 struct ata_port *ap = qc->ap;
3398 int dir = qc->dma_dir;
3399 struct scatterlist *sg = qc->__sg;
3400 dma_addr_t dma_address;
3401 int trim_sg = 0;
3402
3403 /* we must lengthen transfers to end on a 32-bit boundary */
3404 qc->pad_len = sg->length & 3;
3405 if (qc->pad_len) {
3406 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3407 struct scatterlist *psg = &qc->pad_sgent;
3408
3409 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3410
3411 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3412
3413 if (qc->tf.flags & ATA_TFLAG_WRITE)
3414 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3415 qc->pad_len);
3416
3417 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3418 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3419 /* trim sg */
3420 sg->length -= qc->pad_len;
3421 if (sg->length == 0)
3422 trim_sg = 1;
3423
3424 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3425 sg->length, qc->pad_len);
3426 }
3427
3428 if (trim_sg) {
3429 qc->n_elem--;
3430 goto skip_map;
3431 }
3432
3433 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3434 sg->length, dir);
3435 if (dma_mapping_error(dma_address)) {
3436 /* restore sg */
3437 sg->length += qc->pad_len;
3438 return -1;
3439 }
3440
3441 sg_dma_address(sg) = dma_address;
3442 sg_dma_len(sg) = sg->length;
3443
3444skip_map:
3445 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3446 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3447
3448 return 0;
3449}
3450
3451/**
3452 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3453 * @qc: Command with scatter-gather table to be mapped.
3454 *
3455 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3456 *
3457 * LOCKING:
3458 * spin_lock_irqsave(host_set lock)
3459 *
3460 * RETURNS:
3461 * Zero on success, negative on error.
3462 *
3463 */
3464
3465static int ata_sg_setup(struct ata_queued_cmd *qc)
3466{
3467 struct ata_port *ap = qc->ap;
3468 struct scatterlist *sg = qc->__sg;
3469 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3470 int n_elem, pre_n_elem, dir, trim_sg = 0;
3471
3472 VPRINTK("ENTER, ata%u\n", ap->id);
3473 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3474
3475 /* we must lengthen transfers to end on a 32-bit boundary */
3476 qc->pad_len = lsg->length & 3;
3477 if (qc->pad_len) {
3478 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3479 struct scatterlist *psg = &qc->pad_sgent;
3480 unsigned int offset;
3481
3482 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3483
3484 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3485
3486 /*
3487 * psg->page/offset are used to copy to-be-written
3488 * data in this function or read data in ata_sg_clean.
3489 */
3490 offset = lsg->offset + lsg->length - qc->pad_len;
3491 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3492 psg->offset = offset_in_page(offset);
3493
3494 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3495 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3496 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3497 kunmap_atomic(addr, KM_IRQ0);
3498 }
3499
3500 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3501 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3502 /* trim last sg */
3503 lsg->length -= qc->pad_len;
3504 if (lsg->length == 0)
3505 trim_sg = 1;
3506
3507 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3508 qc->n_elem - 1, lsg->length, qc->pad_len);
3509 }
3510
3511 pre_n_elem = qc->n_elem;
3512 if (trim_sg && pre_n_elem)
3513 pre_n_elem--;
3514
3515 if (!pre_n_elem) {
3516 n_elem = 0;
3517 goto skip_map;
3518 }
3519
3520 dir = qc->dma_dir;
3521 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3522 if (n_elem < 1) {
3523 /* restore last sg */
3524 lsg->length += qc->pad_len;
3525 return -1;
3526 }
3527
3528 DPRINTK("%d sg elements mapped\n", n_elem);
3529
3530skip_map:
3531 qc->n_elem = n_elem;
3532
3533 return 0;
3534}
3535
3536/**
3537 * swap_buf_le16 - swap halves of 16-bit words in place
3538 * @buf: Buffer to swap
3539 * @buf_words: Number of 16-bit words in buffer.
3540 *
3541 * Swap halves of 16-bit words if needed to convert from
3542 * little-endian byte order to native cpu byte order, or
3543 * vice-versa.
3544 *
3545 * LOCKING:
3546 * Inherited from caller.
3547 */
3548void swap_buf_le16(u16 *buf, unsigned int buf_words)
3549{
3550#ifdef __BIG_ENDIAN
3551 unsigned int i;
3552
3553 for (i = 0; i < buf_words; i++)
3554 buf[i] = le16_to_cpu(buf[i]);
3555#endif /* __BIG_ENDIAN */
3556}
3557
3558/**
3559 * ata_mmio_data_xfer - Transfer data by MMIO
3560 * @adev: device for this I/O
3561 * @buf: data buffer
3562 * @buflen: buffer length
3563 * @write_data: read/write
3564 *
3565 * Transfer data from/to the device data register by MMIO.
3566 *
3567 * LOCKING:
3568 * Inherited from caller.
3569 */
3570
3571void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3572 unsigned int buflen, int write_data)
3573{
3574 struct ata_port *ap = adev->ap;
3575 unsigned int i;
3576 unsigned int words = buflen >> 1;
3577 u16 *buf16 = (u16 *) buf;
3578 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3579
3580 /* Transfer multiple of 2 bytes */
3581 if (write_data) {
3582 for (i = 0; i < words; i++)
3583 writew(le16_to_cpu(buf16[i]), mmio);
3584 } else {
3585 for (i = 0; i < words; i++)
3586 buf16[i] = cpu_to_le16(readw(mmio));
3587 }
3588
3589 /* Transfer trailing 1 byte, if any. */
3590 if (unlikely(buflen & 0x01)) {
3591 u16 align_buf[1] = { 0 };
3592 unsigned char *trailing_buf = buf + buflen - 1;
3593
3594 if (write_data) {
3595 memcpy(align_buf, trailing_buf, 1);
3596 writew(le16_to_cpu(align_buf[0]), mmio);
3597 } else {
3598 align_buf[0] = cpu_to_le16(readw(mmio));
3599 memcpy(trailing_buf, align_buf, 1);
3600 }
3601 }
3602}
3603
3604/**
3605 * ata_pio_data_xfer - Transfer data by PIO
3606 * @adev: device to target
3607 * @buf: data buffer
3608 * @buflen: buffer length
3609 * @write_data: read/write
3610 *
3611 * Transfer data from/to the device data register by PIO.
3612 *
3613 * LOCKING:
3614 * Inherited from caller.
3615 */
3616
3617void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3618 unsigned int buflen, int write_data)
3619{
3620 struct ata_port *ap = adev->ap;
3621 unsigned int words = buflen >> 1;
3622
3623 /* Transfer multiple of 2 bytes */
3624 if (write_data)
3625 outsw(ap->ioaddr.data_addr, buf, words);
3626 else
3627 insw(ap->ioaddr.data_addr, buf, words);
3628
3629 /* Transfer trailing 1 byte, if any. */
3630 if (unlikely(buflen & 0x01)) {
3631 u16 align_buf[1] = { 0 };
3632 unsigned char *trailing_buf = buf + buflen - 1;
3633
3634 if (write_data) {
3635 memcpy(align_buf, trailing_buf, 1);
3636 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3637 } else {
3638 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3639 memcpy(trailing_buf, align_buf, 1);
3640 }
3641 }
3642}
3643
3644/**
3645 * ata_pio_data_xfer_noirq - Transfer data by PIO
3646 * @adev: device to target
3647 * @buf: data buffer
3648 * @buflen: buffer length
3649 * @write_data: read/write
3650 *
3651 * Transfer data from/to the device data register by PIO. Do the
3652 * transfer with interrupts disabled.
3653 *
3654 * LOCKING:
3655 * Inherited from caller.
3656 */
3657
3658void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3659 unsigned int buflen, int write_data)
3660{
3661 unsigned long flags;
3662 local_irq_save(flags);
3663 ata_pio_data_xfer(adev, buf, buflen, write_data);
3664 local_irq_restore(flags);
3665}
3666
3667
3668/**
3669 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3670 * @qc: Command on going
3671 *
3672 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3673 *
3674 * LOCKING:
3675 * Inherited from caller.
3676 */
3677
3678static void ata_pio_sector(struct ata_queued_cmd *qc)
3679{
3680 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3681 struct scatterlist *sg = qc->__sg;
3682 struct ata_port *ap = qc->ap;
3683 struct page *page;
3684 unsigned int offset;
3685 unsigned char *buf;
3686
3687 if (qc->cursect == (qc->nsect - 1))
3688 ap->hsm_task_state = HSM_ST_LAST;
3689
3690 page = sg[qc->cursg].page;
3691 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3692
3693 /* get the current page and offset */
3694 page = nth_page(page, (offset >> PAGE_SHIFT));
3695 offset %= PAGE_SIZE;
3696
3697 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3698
3699 if (PageHighMem(page)) {
3700 unsigned long flags;
3701
3702 /* FIXME: use a bounce buffer */
3703 local_irq_save(flags);
3704 buf = kmap_atomic(page, KM_IRQ0);
3705
3706 /* do the actual data transfer */
3707 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3708
3709 kunmap_atomic(buf, KM_IRQ0);
3710 local_irq_restore(flags);
3711 } else {
3712 buf = page_address(page);
3713 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3714 }
3715
3716 qc->cursect++;
3717 qc->cursg_ofs++;
3718
3719 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3720 qc->cursg++;
3721 qc->cursg_ofs = 0;
3722 }
3723}
3724
3725/**
3726 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3727 * @qc: Command on going
3728 *
3729 * Transfer one or many ATA_SECT_SIZE of data from/to the
3730 * ATA device for the DRQ request.
3731 *
3732 * LOCKING:
3733 * Inherited from caller.
3734 */
3735
3736static void ata_pio_sectors(struct ata_queued_cmd *qc)
3737{
3738 if (is_multi_taskfile(&qc->tf)) {
3739 /* READ/WRITE MULTIPLE */
3740 unsigned int nsect;
3741
3742 WARN_ON(qc->dev->multi_count == 0);
3743
3744 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3745 while (nsect--)
3746 ata_pio_sector(qc);
3747 } else
3748 ata_pio_sector(qc);
3749}
3750
3751/**
3752 * atapi_send_cdb - Write CDB bytes to hardware
3753 * @ap: Port to which ATAPI device is attached.
3754 * @qc: Taskfile currently active
3755 *
3756 * When device has indicated its readiness to accept
3757 * a CDB, this function is called. Send the CDB.
3758 *
3759 * LOCKING:
3760 * caller.
3761 */
3762
3763static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3764{
3765 /* send SCSI cdb */
3766 DPRINTK("send cdb\n");
3767 WARN_ON(qc->dev->cdb_len < 12);
3768
3769 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3770 ata_altstatus(ap); /* flush */
3771
3772 switch (qc->tf.protocol) {
3773 case ATA_PROT_ATAPI:
3774 ap->hsm_task_state = HSM_ST;
3775 break;
3776 case ATA_PROT_ATAPI_NODATA:
3777 ap->hsm_task_state = HSM_ST_LAST;
3778 break;
3779 case ATA_PROT_ATAPI_DMA:
3780 ap->hsm_task_state = HSM_ST_LAST;
3781 /* initiate bmdma */
3782 ap->ops->bmdma_start(qc);
3783 break;
3784 }
3785}
3786
3787/**
3788 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3789 * @qc: Command on going
3790 * @bytes: number of bytes
3791 *
3792 * Transfer Transfer data from/to the ATAPI device.
3793 *
3794 * LOCKING:
3795 * Inherited from caller.
3796 *
3797 */
3798
3799static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3800{
3801 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3802 struct scatterlist *sg = qc->__sg;
3803 struct ata_port *ap = qc->ap;
3804 struct page *page;
3805 unsigned char *buf;
3806 unsigned int offset, count;
3807
3808 if (qc->curbytes + bytes >= qc->nbytes)
3809 ap->hsm_task_state = HSM_ST_LAST;
3810
3811next_sg:
3812 if (unlikely(qc->cursg >= qc->n_elem)) {
3813 /*
3814 * The end of qc->sg is reached and the device expects
3815 * more data to transfer. In order not to overrun qc->sg
3816 * and fulfill length specified in the byte count register,
3817 * - for read case, discard trailing data from the device
3818 * - for write case, padding zero data to the device
3819 */
3820 u16 pad_buf[1] = { 0 };
3821 unsigned int words = bytes >> 1;
3822 unsigned int i;
3823
3824 if (words) /* warning if bytes > 1 */
3825 ata_dev_printk(qc->dev, KERN_WARNING,
3826 "%u bytes trailing data\n", bytes);
3827
3828 for (i = 0; i < words; i++)
3829 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3830
3831 ap->hsm_task_state = HSM_ST_LAST;
3832 return;
3833 }
3834
3835 sg = &qc->__sg[qc->cursg];
3836
3837 page = sg->page;
3838 offset = sg->offset + qc->cursg_ofs;
3839
3840 /* get the current page and offset */
3841 page = nth_page(page, (offset >> PAGE_SHIFT));
3842 offset %= PAGE_SIZE;
3843
3844 /* don't overrun current sg */
3845 count = min(sg->length - qc->cursg_ofs, bytes);
3846
3847 /* don't cross page boundaries */
3848 count = min(count, (unsigned int)PAGE_SIZE - offset);
3849
3850 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3851
3852 if (PageHighMem(page)) {
3853 unsigned long flags;
3854
3855 /* FIXME: use bounce buffer */
3856 local_irq_save(flags);
3857 buf = kmap_atomic(page, KM_IRQ0);
3858
3859 /* do the actual data transfer */
3860 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3861
3862 kunmap_atomic(buf, KM_IRQ0);
3863 local_irq_restore(flags);
3864 } else {
3865 buf = page_address(page);
3866 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3867 }
3868
3869 bytes -= count;
3870 qc->curbytes += count;
3871 qc->cursg_ofs += count;
3872
3873 if (qc->cursg_ofs == sg->length) {
3874 qc->cursg++;
3875 qc->cursg_ofs = 0;
3876 }
3877
3878 if (bytes)
3879 goto next_sg;
3880}
3881
3882/**
3883 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3884 * @qc: Command on going
3885 *
3886 * Transfer Transfer data from/to the ATAPI device.
3887 *
3888 * LOCKING:
3889 * Inherited from caller.
3890 */
3891
3892static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3893{
3894 struct ata_port *ap = qc->ap;
3895 struct ata_device *dev = qc->dev;
3896 unsigned int ireason, bc_lo, bc_hi, bytes;
3897 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3898
3899 /* Abuse qc->result_tf for temp storage of intermediate TF
3900 * here to save some kernel stack usage.
3901 * For normal completion, qc->result_tf is not relevant. For
3902 * error, qc->result_tf is later overwritten by ata_qc_complete().
3903 * So, the correctness of qc->result_tf is not affected.
3904 */
3905 ap->ops->tf_read(ap, &qc->result_tf);
3906 ireason = qc->result_tf.nsect;
3907 bc_lo = qc->result_tf.lbam;
3908 bc_hi = qc->result_tf.lbah;
3909 bytes = (bc_hi << 8) | bc_lo;
3910
3911 /* shall be cleared to zero, indicating xfer of data */
3912 if (ireason & (1 << 0))
3913 goto err_out;
3914
3915 /* make sure transfer direction matches expected */
3916 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3917 if (do_write != i_write)
3918 goto err_out;
3919
3920 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3921
3922 __atapi_pio_bytes(qc, bytes);
3923
3924 return;
3925
3926err_out:
3927 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3928 qc->err_mask |= AC_ERR_HSM;
3929 ap->hsm_task_state = HSM_ST_ERR;
3930}
3931
3932/**
3933 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3934 * @ap: the target ata_port
3935 * @qc: qc on going
3936 *
3937 * RETURNS:
3938 * 1 if ok in workqueue, 0 otherwise.
3939 */
3940
3941static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3942{
3943 if (qc->tf.flags & ATA_TFLAG_POLLING)
3944 return 1;
3945
3946 if (ap->hsm_task_state == HSM_ST_FIRST) {
3947 if (qc->tf.protocol == ATA_PROT_PIO &&
3948 (qc->tf.flags & ATA_TFLAG_WRITE))
3949 return 1;
3950
3951 if (is_atapi_taskfile(&qc->tf) &&
3952 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3953 return 1;
3954 }
3955
3956 return 0;
3957}
3958
3959/**
3960 * ata_hsm_qc_complete - finish a qc running on standard HSM
3961 * @qc: Command to complete
3962 * @in_wq: 1 if called from workqueue, 0 otherwise
3963 *
3964 * Finish @qc which is running on standard HSM.
3965 *
3966 * LOCKING:
3967 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3968 * Otherwise, none on entry and grabs host lock.
3969 */
3970static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3971{
3972 struct ata_port *ap = qc->ap;
3973 unsigned long flags;
3974
3975 if (ap->ops->error_handler) {
3976 if (in_wq) {
3977 spin_lock_irqsave(ap->lock, flags);
3978
3979 /* EH might have kicked in while host_set lock
3980 * is released.
3981 */
3982 qc = ata_qc_from_tag(ap, qc->tag);
3983 if (qc) {
3984 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3985 ata_irq_on(ap);
3986 ata_qc_complete(qc);
3987 } else
3988 ata_port_freeze(ap);
3989 }
3990
3991 spin_unlock_irqrestore(ap->lock, flags);
3992 } else {
3993 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3994 ata_qc_complete(qc);
3995 else
3996 ata_port_freeze(ap);
3997 }
3998 } else {
3999 if (in_wq) {
4000 spin_lock_irqsave(ap->lock, flags);
4001 ata_irq_on(ap);
4002 ata_qc_complete(qc);
4003 spin_unlock_irqrestore(ap->lock, flags);
4004 } else
4005 ata_qc_complete(qc);
4006 }
4007
4008 ata_altstatus(ap); /* flush */
4009}
4010
4011/**
4012 * ata_hsm_move - move the HSM to the next state.
4013 * @ap: the target ata_port
4014 * @qc: qc on going
4015 * @status: current device status
4016 * @in_wq: 1 if called from workqueue, 0 otherwise
4017 *
4018 * RETURNS:
4019 * 1 when poll next status needed, 0 otherwise.
4020 */
4021int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4022 u8 status, int in_wq)
4023{
4024 unsigned long flags = 0;
4025 int poll_next;
4026
4027 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4028
4029 /* Make sure ata_qc_issue_prot() does not throw things
4030 * like DMA polling into the workqueue. Notice that
4031 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4032 */
4033 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4034
4035fsm_start:
4036 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4037 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4038
4039 switch (ap->hsm_task_state) {
4040 case HSM_ST_FIRST:
4041 /* Send first data block or PACKET CDB */
4042
4043 /* If polling, we will stay in the work queue after
4044 * sending the data. Otherwise, interrupt handler
4045 * takes over after sending the data.
4046 */
4047 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4048
4049 /* check device status */
4050 if (unlikely((status & ATA_DRQ) == 0)) {
4051 /* handle BSY=0, DRQ=0 as error */
4052 if (likely(status & (ATA_ERR | ATA_DF)))
4053 /* device stops HSM for abort/error */
4054 qc->err_mask |= AC_ERR_DEV;
4055 else
4056 /* HSM violation. Let EH handle this */
4057 qc->err_mask |= AC_ERR_HSM;
4058
4059 ap->hsm_task_state = HSM_ST_ERR;
4060 goto fsm_start;
4061 }
4062
4063 /* Device should not ask for data transfer (DRQ=1)
4064 * when it finds something wrong.
4065 * We ignore DRQ here and stop the HSM by
4066 * changing hsm_task_state to HSM_ST_ERR and
4067 * let the EH abort the command or reset the device.
4068 */
4069 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4070 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4071 ap->id, status);
4072 qc->err_mask |= AC_ERR_HSM;
4073 ap->hsm_task_state = HSM_ST_ERR;
4074 goto fsm_start;
4075 }
4076
4077 /* Send the CDB (atapi) or the first data block (ata pio out).
4078 * During the state transition, interrupt handler shouldn't
4079 * be invoked before the data transfer is complete and
4080 * hsm_task_state is changed. Hence, the following locking.
4081 */
4082 if (in_wq)
4083 spin_lock_irqsave(ap->lock, flags);
4084
4085 if (qc->tf.protocol == ATA_PROT_PIO) {
4086 /* PIO data out protocol.
4087 * send first data block.
4088 */
4089
4090 /* ata_pio_sectors() might change the state
4091 * to HSM_ST_LAST. so, the state is changed here
4092 * before ata_pio_sectors().
4093 */
4094 ap->hsm_task_state = HSM_ST;
4095 ata_pio_sectors(qc);
4096 ata_altstatus(ap); /* flush */
4097 } else
4098 /* send CDB */
4099 atapi_send_cdb(ap, qc);
4100
4101 if (in_wq)
4102 spin_unlock_irqrestore(ap->lock, flags);
4103
4104 /* if polling, ata_pio_task() handles the rest.
4105 * otherwise, interrupt handler takes over from here.
4106 */
4107 break;
4108
4109 case HSM_ST:
4110 /* complete command or read/write the data register */
4111 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4112 /* ATAPI PIO protocol */
4113 if ((status & ATA_DRQ) == 0) {
4114 /* No more data to transfer or device error.
4115 * Device error will be tagged in HSM_ST_LAST.
4116 */
4117 ap->hsm_task_state = HSM_ST_LAST;
4118 goto fsm_start;
4119 }
4120
4121 /* Device should not ask for data transfer (DRQ=1)
4122 * when it finds something wrong.
4123 * We ignore DRQ here and stop the HSM by
4124 * changing hsm_task_state to HSM_ST_ERR and
4125 * let the EH abort the command or reset the device.
4126 */
4127 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4128 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4129 ap->id, status);
4130 qc->err_mask |= AC_ERR_HSM;
4131 ap->hsm_task_state = HSM_ST_ERR;
4132 goto fsm_start;
4133 }
4134
4135 atapi_pio_bytes(qc);
4136
4137 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4138 /* bad ireason reported by device */
4139 goto fsm_start;
4140
4141 } else {
4142 /* ATA PIO protocol */
4143 if (unlikely((status & ATA_DRQ) == 0)) {
4144 /* handle BSY=0, DRQ=0 as error */
4145 if (likely(status & (ATA_ERR | ATA_DF)))
4146 /* device stops HSM for abort/error */
4147 qc->err_mask |= AC_ERR_DEV;
4148 else
4149 /* HSM violation. Let EH handle this */
4150 qc->err_mask |= AC_ERR_HSM;
4151
4152 ap->hsm_task_state = HSM_ST_ERR;
4153 goto fsm_start;
4154 }
4155
4156 /* For PIO reads, some devices may ask for
4157 * data transfer (DRQ=1) alone with ERR=1.
4158 * We respect DRQ here and transfer one
4159 * block of junk data before changing the
4160 * hsm_task_state to HSM_ST_ERR.
4161 *
4162 * For PIO writes, ERR=1 DRQ=1 doesn't make
4163 * sense since the data block has been
4164 * transferred to the device.
4165 */
4166 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4167 /* data might be corrputed */
4168 qc->err_mask |= AC_ERR_DEV;
4169
4170 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4171 ata_pio_sectors(qc);
4172 ata_altstatus(ap);
4173 status = ata_wait_idle(ap);
4174 }
4175
4176 if (status & (ATA_BUSY | ATA_DRQ))
4177 qc->err_mask |= AC_ERR_HSM;
4178
4179 /* ata_pio_sectors() might change the
4180 * state to HSM_ST_LAST. so, the state
4181 * is changed after ata_pio_sectors().
4182 */
4183 ap->hsm_task_state = HSM_ST_ERR;
4184 goto fsm_start;
4185 }
4186
4187 ata_pio_sectors(qc);
4188
4189 if (ap->hsm_task_state == HSM_ST_LAST &&
4190 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4191 /* all data read */
4192 ata_altstatus(ap);
4193 status = ata_wait_idle(ap);
4194 goto fsm_start;
4195 }
4196 }
4197
4198 ata_altstatus(ap); /* flush */
4199 poll_next = 1;
4200 break;
4201
4202 case HSM_ST_LAST:
4203 if (unlikely(!ata_ok(status))) {
4204 qc->err_mask |= __ac_err_mask(status);
4205 ap->hsm_task_state = HSM_ST_ERR;
4206 goto fsm_start;
4207 }
4208
4209 /* no more data to transfer */
4210 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4211 ap->id, qc->dev->devno, status);
4212
4213 WARN_ON(qc->err_mask);
4214
4215 ap->hsm_task_state = HSM_ST_IDLE;
4216
4217 /* complete taskfile transaction */
4218 ata_hsm_qc_complete(qc, in_wq);
4219
4220 poll_next = 0;
4221 break;
4222
4223 case HSM_ST_ERR:
4224 /* make sure qc->err_mask is available to
4225 * know what's wrong and recover
4226 */
4227 WARN_ON(qc->err_mask == 0);
4228
4229 ap->hsm_task_state = HSM_ST_IDLE;
4230
4231 /* complete taskfile transaction */
4232 ata_hsm_qc_complete(qc, in_wq);
4233
4234 poll_next = 0;
4235 break;
4236 default:
4237 poll_next = 0;
4238 BUG();
4239 }
4240
4241 return poll_next;
4242}
4243
4244static void ata_pio_task(void *_data)
4245{
4246 struct ata_queued_cmd *qc = _data;
4247 struct ata_port *ap = qc->ap;
4248 u8 status;
4249 int poll_next;
4250
4251fsm_start:
4252 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4253
4254 /*
4255 * This is purely heuristic. This is a fast path.
4256 * Sometimes when we enter, BSY will be cleared in
4257 * a chk-status or two. If not, the drive is probably seeking
4258 * or something. Snooze for a couple msecs, then
4259 * chk-status again. If still busy, queue delayed work.
4260 */
4261 status = ata_busy_wait(ap, ATA_BUSY, 5);
4262 if (status & ATA_BUSY) {
4263 msleep(2);
4264 status = ata_busy_wait(ap, ATA_BUSY, 10);
4265 if (status & ATA_BUSY) {
4266 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4267 return;
4268 }
4269 }
4270
4271 /* move the HSM */
4272 poll_next = ata_hsm_move(ap, qc, status, 1);
4273
4274 /* another command or interrupt handler
4275 * may be running at this point.
4276 */
4277 if (poll_next)
4278 goto fsm_start;
4279}
4280
4281/**
4282 * ata_qc_new - Request an available ATA command, for queueing
4283 * @ap: Port associated with device @dev
4284 * @dev: Device from whom we request an available command structure
4285 *
4286 * LOCKING:
4287 * None.
4288 */
4289
4290static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4291{
4292 struct ata_queued_cmd *qc = NULL;
4293 unsigned int i;
4294
4295 /* no command while frozen */
4296 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4297 return NULL;
4298
4299 /* the last tag is reserved for internal command. */
4300 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4301 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4302 qc = __ata_qc_from_tag(ap, i);
4303 break;
4304 }
4305
4306 if (qc)
4307 qc->tag = i;
4308
4309 return qc;
4310}
4311
4312/**
4313 * ata_qc_new_init - Request an available ATA command, and initialize it
4314 * @dev: Device from whom we request an available command structure
4315 *
4316 * LOCKING:
4317 * None.
4318 */
4319
4320struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4321{
4322 struct ata_port *ap = dev->ap;
4323 struct ata_queued_cmd *qc;
4324
4325 qc = ata_qc_new(ap);
4326 if (qc) {
4327 qc->scsicmd = NULL;
4328 qc->ap = ap;
4329 qc->dev = dev;
4330
4331 ata_qc_reinit(qc);
4332 }
4333
4334 return qc;
4335}
4336
4337/**
4338 * ata_qc_free - free unused ata_queued_cmd
4339 * @qc: Command to complete
4340 *
4341 * Designed to free unused ata_queued_cmd object
4342 * in case something prevents using it.
4343 *
4344 * LOCKING:
4345 * spin_lock_irqsave(host_set lock)
4346 */
4347void ata_qc_free(struct ata_queued_cmd *qc)
4348{
4349 struct ata_port *ap = qc->ap;
4350 unsigned int tag;
4351
4352 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4353
4354 qc->flags = 0;
4355 tag = qc->tag;
4356 if (likely(ata_tag_valid(tag))) {
4357 qc->tag = ATA_TAG_POISON;
4358 clear_bit(tag, &ap->qc_allocated);
4359 }
4360}
4361
4362void __ata_qc_complete(struct ata_queued_cmd *qc)
4363{
4364 struct ata_port *ap = qc->ap;
4365
4366 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4367 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4368
4369 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4370 ata_sg_clean(qc);
4371
4372 /* command should be marked inactive atomically with qc completion */
4373 if (qc->tf.protocol == ATA_PROT_NCQ)
4374 ap->sactive &= ~(1 << qc->tag);
4375 else
4376 ap->active_tag = ATA_TAG_POISON;
4377
4378 /* atapi: mark qc as inactive to prevent the interrupt handler
4379 * from completing the command twice later, before the error handler
4380 * is called. (when rc != 0 and atapi request sense is needed)
4381 */
4382 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4383 ap->qc_active &= ~(1 << qc->tag);
4384
4385 /* call completion callback */
4386 qc->complete_fn(qc);
4387}
4388
4389/**
4390 * ata_qc_complete - Complete an active ATA command
4391 * @qc: Command to complete
4392 * @err_mask: ATA Status register contents
4393 *
4394 * Indicate to the mid and upper layers that an ATA
4395 * command has completed, with either an ok or not-ok status.
4396 *
4397 * LOCKING:
4398 * spin_lock_irqsave(host_set lock)
4399 */
4400void ata_qc_complete(struct ata_queued_cmd *qc)
4401{
4402 struct ata_port *ap = qc->ap;
4403
4404 /* XXX: New EH and old EH use different mechanisms to
4405 * synchronize EH with regular execution path.
4406 *
4407 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4408 * Normal execution path is responsible for not accessing a
4409 * failed qc. libata core enforces the rule by returning NULL
4410 * from ata_qc_from_tag() for failed qcs.
4411 *
4412 * Old EH depends on ata_qc_complete() nullifying completion
4413 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4414 * not synchronize with interrupt handler. Only PIO task is
4415 * taken care of.
4416 */
4417 if (ap->ops->error_handler) {
4418 WARN_ON(ap->pflags & ATA_PFLAG_FROZEN);
4419
4420 if (unlikely(qc->err_mask))
4421 qc->flags |= ATA_QCFLAG_FAILED;
4422
4423 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4424 if (!ata_tag_internal(qc->tag)) {
4425 /* always fill result TF for failed qc */
4426 ap->ops->tf_read(ap, &qc->result_tf);
4427 ata_qc_schedule_eh(qc);
4428 return;
4429 }
4430 }
4431
4432 /* read result TF if requested */
4433 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4434 ap->ops->tf_read(ap, &qc->result_tf);
4435
4436 __ata_qc_complete(qc);
4437 } else {
4438 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4439 return;
4440
4441 /* read result TF if failed or requested */
4442 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4443 ap->ops->tf_read(ap, &qc->result_tf);
4444
4445 __ata_qc_complete(qc);
4446 }
4447}
4448
4449/**
4450 * ata_qc_complete_multiple - Complete multiple qcs successfully
4451 * @ap: port in question
4452 * @qc_active: new qc_active mask
4453 * @finish_qc: LLDD callback invoked before completing a qc
4454 *
4455 * Complete in-flight commands. This functions is meant to be
4456 * called from low-level driver's interrupt routine to complete
4457 * requests normally. ap->qc_active and @qc_active is compared
4458 * and commands are completed accordingly.
4459 *
4460 * LOCKING:
4461 * spin_lock_irqsave(host_set lock)
4462 *
4463 * RETURNS:
4464 * Number of completed commands on success, -errno otherwise.
4465 */
4466int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4467 void (*finish_qc)(struct ata_queued_cmd *))
4468{
4469 int nr_done = 0;
4470 u32 done_mask;
4471 int i;
4472
4473 done_mask = ap->qc_active ^ qc_active;
4474
4475 if (unlikely(done_mask & qc_active)) {
4476 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4477 "(%08x->%08x)\n", ap->qc_active, qc_active);
4478 return -EINVAL;
4479 }
4480
4481 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4482 struct ata_queued_cmd *qc;
4483
4484 if (!(done_mask & (1 << i)))
4485 continue;
4486
4487 if ((qc = ata_qc_from_tag(ap, i))) {
4488 if (finish_qc)
4489 finish_qc(qc);
4490 ata_qc_complete(qc);
4491 nr_done++;
4492 }
4493 }
4494
4495 return nr_done;
4496}
4497
4498static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4499{
4500 struct ata_port *ap = qc->ap;
4501
4502 switch (qc->tf.protocol) {
4503 case ATA_PROT_NCQ:
4504 case ATA_PROT_DMA:
4505 case ATA_PROT_ATAPI_DMA:
4506 return 1;
4507
4508 case ATA_PROT_ATAPI:
4509 case ATA_PROT_PIO:
4510 if (ap->flags & ATA_FLAG_PIO_DMA)
4511 return 1;
4512
4513 /* fall through */
4514
4515 default:
4516 return 0;
4517 }
4518
4519 /* never reached */
4520}
4521
4522/**
4523 * ata_qc_issue - issue taskfile to device
4524 * @qc: command to issue to device
4525 *
4526 * Prepare an ATA command to submission to device.
4527 * This includes mapping the data into a DMA-able
4528 * area, filling in the S/G table, and finally
4529 * writing the taskfile to hardware, starting the command.
4530 *
4531 * LOCKING:
4532 * spin_lock_irqsave(host_set lock)
4533 */
4534void ata_qc_issue(struct ata_queued_cmd *qc)
4535{
4536 struct ata_port *ap = qc->ap;
4537
4538 /* Make sure only one non-NCQ command is outstanding. The
4539 * check is skipped for old EH because it reuses active qc to
4540 * request ATAPI sense.
4541 */
4542 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4543
4544 if (qc->tf.protocol == ATA_PROT_NCQ) {
4545 WARN_ON(ap->sactive & (1 << qc->tag));
4546 ap->sactive |= 1 << qc->tag;
4547 } else {
4548 WARN_ON(ap->sactive);
4549 ap->active_tag = qc->tag;
4550 }
4551
4552 qc->flags |= ATA_QCFLAG_ACTIVE;
4553 ap->qc_active |= 1 << qc->tag;
4554
4555 if (ata_should_dma_map(qc)) {
4556 if (qc->flags & ATA_QCFLAG_SG) {
4557 if (ata_sg_setup(qc))
4558 goto sg_err;
4559 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4560 if (ata_sg_setup_one(qc))
4561 goto sg_err;
4562 }
4563 } else {
4564 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4565 }
4566
4567 ap->ops->qc_prep(qc);
4568
4569 qc->err_mask |= ap->ops->qc_issue(qc);
4570 if (unlikely(qc->err_mask))
4571 goto err;
4572 return;
4573
4574sg_err:
4575 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4576 qc->err_mask |= AC_ERR_SYSTEM;
4577err:
4578 ata_qc_complete(qc);
4579}
4580
4581/**
4582 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4583 * @qc: command to issue to device
4584 *
4585 * Using various libata functions and hooks, this function
4586 * starts an ATA command. ATA commands are grouped into
4587 * classes called "protocols", and issuing each type of protocol
4588 * is slightly different.
4589 *
4590 * May be used as the qc_issue() entry in ata_port_operations.
4591 *
4592 * LOCKING:
4593 * spin_lock_irqsave(host_set lock)
4594 *
4595 * RETURNS:
4596 * Zero on success, AC_ERR_* mask on failure
4597 */
4598
4599unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4600{
4601 struct ata_port *ap = qc->ap;
4602
4603 /* Use polling pio if the LLD doesn't handle
4604 * interrupt driven pio and atapi CDB interrupt.
4605 */
4606 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4607 switch (qc->tf.protocol) {
4608 case ATA_PROT_PIO:
4609 case ATA_PROT_ATAPI:
4610 case ATA_PROT_ATAPI_NODATA:
4611 qc->tf.flags |= ATA_TFLAG_POLLING;
4612 break;
4613 case ATA_PROT_ATAPI_DMA:
4614 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4615 /* see ata_dma_blacklisted() */
4616 BUG();
4617 break;
4618 default:
4619 break;
4620 }
4621 }
4622
4623 /* select the device */
4624 ata_dev_select(ap, qc->dev->devno, 1, 0);
4625
4626 /* start the command */
4627 switch (qc->tf.protocol) {
4628 case ATA_PROT_NODATA:
4629 if (qc->tf.flags & ATA_TFLAG_POLLING)
4630 ata_qc_set_polling(qc);
4631
4632 ata_tf_to_host(ap, &qc->tf);
4633 ap->hsm_task_state = HSM_ST_LAST;
4634
4635 if (qc->tf.flags & ATA_TFLAG_POLLING)
4636 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4637
4638 break;
4639
4640 case ATA_PROT_DMA:
4641 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4642
4643 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4644 ap->ops->bmdma_setup(qc); /* set up bmdma */
4645 ap->ops->bmdma_start(qc); /* initiate bmdma */
4646 ap->hsm_task_state = HSM_ST_LAST;
4647 break;
4648
4649 case ATA_PROT_PIO:
4650 if (qc->tf.flags & ATA_TFLAG_POLLING)
4651 ata_qc_set_polling(qc);
4652
4653 ata_tf_to_host(ap, &qc->tf);
4654
4655 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4656 /* PIO data out protocol */
4657 ap->hsm_task_state = HSM_ST_FIRST;
4658 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4659
4660 /* always send first data block using
4661 * the ata_pio_task() codepath.
4662 */
4663 } else {
4664 /* PIO data in protocol */
4665 ap->hsm_task_state = HSM_ST;
4666
4667 if (qc->tf.flags & ATA_TFLAG_POLLING)
4668 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4669
4670 /* if polling, ata_pio_task() handles the rest.
4671 * otherwise, interrupt handler takes over from here.
4672 */
4673 }
4674
4675 break;
4676
4677 case ATA_PROT_ATAPI:
4678 case ATA_PROT_ATAPI_NODATA:
4679 if (qc->tf.flags & ATA_TFLAG_POLLING)
4680 ata_qc_set_polling(qc);
4681
4682 ata_tf_to_host(ap, &qc->tf);
4683
4684 ap->hsm_task_state = HSM_ST_FIRST;
4685
4686 /* send cdb by polling if no cdb interrupt */
4687 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4688 (qc->tf.flags & ATA_TFLAG_POLLING))
4689 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4690 break;
4691
4692 case ATA_PROT_ATAPI_DMA:
4693 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4694
4695 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4696 ap->ops->bmdma_setup(qc); /* set up bmdma */
4697 ap->hsm_task_state = HSM_ST_FIRST;
4698
4699 /* send cdb by polling if no cdb interrupt */
4700 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4701 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4702 break;
4703
4704 default:
4705 WARN_ON(1);
4706 return AC_ERR_SYSTEM;
4707 }
4708
4709 return 0;
4710}
4711
4712/**
4713 * ata_host_intr - Handle host interrupt for given (port, task)
4714 * @ap: Port on which interrupt arrived (possibly...)
4715 * @qc: Taskfile currently active in engine
4716 *
4717 * Handle host interrupt for given queued command. Currently,
4718 * only DMA interrupts are handled. All other commands are
4719 * handled via polling with interrupts disabled (nIEN bit).
4720 *
4721 * LOCKING:
4722 * spin_lock_irqsave(host_set lock)
4723 *
4724 * RETURNS:
4725 * One if interrupt was handled, zero if not (shared irq).
4726 */
4727
4728inline unsigned int ata_host_intr (struct ata_port *ap,
4729 struct ata_queued_cmd *qc)
4730{
4731 u8 status, host_stat = 0;
4732
4733 VPRINTK("ata%u: protocol %d task_state %d\n",
4734 ap->id, qc->tf.protocol, ap->hsm_task_state);
4735
4736 /* Check whether we are expecting interrupt in this state */
4737 switch (ap->hsm_task_state) {
4738 case HSM_ST_FIRST:
4739 /* Some pre-ATAPI-4 devices assert INTRQ
4740 * at this state when ready to receive CDB.
4741 */
4742
4743 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4744 * The flag was turned on only for atapi devices.
4745 * No need to check is_atapi_taskfile(&qc->tf) again.
4746 */
4747 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4748 goto idle_irq;
4749 break;
4750 case HSM_ST_LAST:
4751 if (qc->tf.protocol == ATA_PROT_DMA ||
4752 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4753 /* check status of DMA engine */
4754 host_stat = ap->ops->bmdma_status(ap);
4755 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4756
4757 /* if it's not our irq... */
4758 if (!(host_stat & ATA_DMA_INTR))
4759 goto idle_irq;
4760
4761 /* before we do anything else, clear DMA-Start bit */
4762 ap->ops->bmdma_stop(qc);
4763
4764 if (unlikely(host_stat & ATA_DMA_ERR)) {
4765 /* error when transfering data to/from memory */
4766 qc->err_mask |= AC_ERR_HOST_BUS;
4767 ap->hsm_task_state = HSM_ST_ERR;
4768 }
4769 }
4770 break;
4771 case HSM_ST:
4772 break;
4773 default:
4774 goto idle_irq;
4775 }
4776
4777 /* check altstatus */
4778 status = ata_altstatus(ap);
4779 if (status & ATA_BUSY)
4780 goto idle_irq;
4781
4782 /* check main status, clearing INTRQ */
4783 status = ata_chk_status(ap);
4784 if (unlikely(status & ATA_BUSY))
4785 goto idle_irq;
4786
4787 /* ack bmdma irq events */
4788 ap->ops->irq_clear(ap);
4789
4790 ata_hsm_move(ap, qc, status, 0);
4791 return 1; /* irq handled */
4792
4793idle_irq:
4794 ap->stats.idle_irq++;
4795
4796#ifdef ATA_IRQ_TRAP
4797 if ((ap->stats.idle_irq % 1000) == 0) {
4798 ata_irq_ack(ap, 0); /* debug trap */
4799 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4800 return 1;
4801 }
4802#endif
4803 return 0; /* irq not handled */
4804}
4805
4806/**
4807 * ata_interrupt - Default ATA host interrupt handler
4808 * @irq: irq line (unused)
4809 * @dev_instance: pointer to our ata_host_set information structure
4810 * @regs: unused
4811 *
4812 * Default interrupt handler for PCI IDE devices. Calls
4813 * ata_host_intr() for each port that is not disabled.
4814 *
4815 * LOCKING:
4816 * Obtains host_set lock during operation.
4817 *
4818 * RETURNS:
4819 * IRQ_NONE or IRQ_HANDLED.
4820 */
4821
4822irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4823{
4824 struct ata_host_set *host_set = dev_instance;
4825 unsigned int i;
4826 unsigned int handled = 0;
4827 unsigned long flags;
4828
4829 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4830 spin_lock_irqsave(&host_set->lock, flags);
4831
4832 for (i = 0; i < host_set->n_ports; i++) {
4833 struct ata_port *ap;
4834
4835 ap = host_set->ports[i];
4836 if (ap &&
4837 !(ap->flags & ATA_FLAG_DISABLED)) {
4838 struct ata_queued_cmd *qc;
4839
4840 qc = ata_qc_from_tag(ap, ap->active_tag);
4841 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4842 (qc->flags & ATA_QCFLAG_ACTIVE))
4843 handled |= ata_host_intr(ap, qc);
4844 }
4845 }
4846
4847 spin_unlock_irqrestore(&host_set->lock, flags);
4848
4849 return IRQ_RETVAL(handled);
4850}
4851
4852/**
4853 * sata_scr_valid - test whether SCRs are accessible
4854 * @ap: ATA port to test SCR accessibility for
4855 *
4856 * Test whether SCRs are accessible for @ap.
4857 *
4858 * LOCKING:
4859 * None.
4860 *
4861 * RETURNS:
4862 * 1 if SCRs are accessible, 0 otherwise.
4863 */
4864int sata_scr_valid(struct ata_port *ap)
4865{
4866 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4867}
4868
4869/**
4870 * sata_scr_read - read SCR register of the specified port
4871 * @ap: ATA port to read SCR for
4872 * @reg: SCR to read
4873 * @val: Place to store read value
4874 *
4875 * Read SCR register @reg of @ap into *@val. This function is
4876 * guaranteed to succeed if the cable type of the port is SATA
4877 * and the port implements ->scr_read.
4878 *
4879 * LOCKING:
4880 * None.
4881 *
4882 * RETURNS:
4883 * 0 on success, negative errno on failure.
4884 */
4885int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4886{
4887 if (sata_scr_valid(ap)) {
4888 *val = ap->ops->scr_read(ap, reg);
4889 return 0;
4890 }
4891 return -EOPNOTSUPP;
4892}
4893
4894/**
4895 * sata_scr_write - write SCR register of the specified port
4896 * @ap: ATA port to write SCR for
4897 * @reg: SCR to write
4898 * @val: value to write
4899 *
4900 * Write @val to SCR register @reg of @ap. This function is
4901 * guaranteed to succeed if the cable type of the port is SATA
4902 * and the port implements ->scr_read.
4903 *
4904 * LOCKING:
4905 * None.
4906 *
4907 * RETURNS:
4908 * 0 on success, negative errno on failure.
4909 */
4910int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4911{
4912 if (sata_scr_valid(ap)) {
4913 ap->ops->scr_write(ap, reg, val);
4914 return 0;
4915 }
4916 return -EOPNOTSUPP;
4917}
4918
4919/**
4920 * sata_scr_write_flush - write SCR register of the specified port and flush
4921 * @ap: ATA port to write SCR for
4922 * @reg: SCR to write
4923 * @val: value to write
4924 *
4925 * This function is identical to sata_scr_write() except that this
4926 * function performs flush after writing to the register.
4927 *
4928 * LOCKING:
4929 * None.
4930 *
4931 * RETURNS:
4932 * 0 on success, negative errno on failure.
4933 */
4934int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4935{
4936 if (sata_scr_valid(ap)) {
4937 ap->ops->scr_write(ap, reg, val);
4938 ap->ops->scr_read(ap, reg);
4939 return 0;
4940 }
4941 return -EOPNOTSUPP;
4942}
4943
4944/**
4945 * ata_port_online - test whether the given port is online
4946 * @ap: ATA port to test
4947 *
4948 * Test whether @ap is online. Note that this function returns 0
4949 * if online status of @ap cannot be obtained, so
4950 * ata_port_online(ap) != !ata_port_offline(ap).
4951 *
4952 * LOCKING:
4953 * None.
4954 *
4955 * RETURNS:
4956 * 1 if the port online status is available and online.
4957 */
4958int ata_port_online(struct ata_port *ap)
4959{
4960 u32 sstatus;
4961
4962 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4963 return 1;
4964 return 0;
4965}
4966
4967/**
4968 * ata_port_offline - test whether the given port is offline
4969 * @ap: ATA port to test
4970 *
4971 * Test whether @ap is offline. Note that this function returns
4972 * 0 if offline status of @ap cannot be obtained, so
4973 * ata_port_online(ap) != !ata_port_offline(ap).
4974 *
4975 * LOCKING:
4976 * None.
4977 *
4978 * RETURNS:
4979 * 1 if the port offline status is available and offline.
4980 */
4981int ata_port_offline(struct ata_port *ap)
4982{
4983 u32 sstatus;
4984
4985 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4986 return 1;
4987 return 0;
4988}
4989
4990int ata_flush_cache(struct ata_device *dev)
4991{
4992 unsigned int err_mask;
4993 u8 cmd;
4994
4995 if (!ata_try_flush_cache(dev))
4996 return 0;
4997
4998 if (ata_id_has_flush_ext(dev->id))
4999 cmd = ATA_CMD_FLUSH_EXT;
5000 else
5001 cmd = ATA_CMD_FLUSH;
5002
5003 err_mask = ata_do_simple_cmd(dev, cmd);
5004 if (err_mask) {
5005 ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n");
5006 return -EIO;
5007 }
5008
5009 return 0;
5010}
5011
5012static int ata_host_set_request_pm(struct ata_host_set *host_set,
5013 pm_message_t mesg, unsigned int action,
5014 unsigned int ehi_flags, int wait)
5015{
5016 unsigned long flags;
5017 int i, rc;
5018
5019 for (i = 0; i < host_set->n_ports; i++) {
5020 struct ata_port *ap = host_set->ports[i];
5021
5022 /* Previous resume operation might still be in
5023 * progress. Wait for PM_PENDING to clear.
5024 */
5025 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5026 ata_port_wait_eh(ap);
5027 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5028 }
5029
5030 /* request PM ops to EH */
5031 spin_lock_irqsave(ap->lock, flags);
5032
5033 ap->pm_mesg = mesg;
5034 if (wait) {
5035 rc = 0;
5036 ap->pm_result = &rc;
5037 }
5038
5039 ap->pflags |= ATA_PFLAG_PM_PENDING;
5040 ap->eh_info.action |= action;
5041 ap->eh_info.flags |= ehi_flags;
5042
5043 ata_port_schedule_eh(ap);
5044
5045 spin_unlock_irqrestore(ap->lock, flags);
5046
5047 /* wait and check result */
5048 if (wait) {
5049 ata_port_wait_eh(ap);
5050 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5051 if (rc)
5052 return rc;
5053 }
5054 }
5055
5056 return 0;
5057}
5058
5059/**
5060 * ata_host_set_suspend - suspend host_set
5061 * @host_set: host_set to suspend
5062 * @mesg: PM message
5063 *
5064 * Suspend @host_set. Actual operation is performed by EH. This
5065 * function requests EH to perform PM operations and waits for EH
5066 * to finish.
5067 *
5068 * LOCKING:
5069 * Kernel thread context (may sleep).
5070 *
5071 * RETURNS:
5072 * 0 on success, -errno on failure.
5073 */
5074int ata_host_set_suspend(struct ata_host_set *host_set, pm_message_t mesg)
5075{
5076 int i, j, rc;
5077
5078 rc = ata_host_set_request_pm(host_set, mesg, 0, ATA_EHI_QUIET, 1);
5079 if (rc)
5080 goto fail;
5081
5082 /* EH is quiescent now. Fail if we have any ready device.
5083 * This happens if hotplug occurs between completion of device
5084 * suspension and here.
5085 */
5086 for (i = 0; i < host_set->n_ports; i++) {
5087 struct ata_port *ap = host_set->ports[i];
5088
5089 for (j = 0; j < ATA_MAX_DEVICES; j++) {
5090 struct ata_device *dev = &ap->device[j];
5091
5092 if (ata_dev_ready(dev)) {
5093 ata_port_printk(ap, KERN_WARNING,
5094 "suspend failed, device %d "
5095 "still active\n", dev->devno);
5096 rc = -EBUSY;
5097 goto fail;
5098 }
5099 }
5100 }
5101
5102 host_set->dev->power.power_state = mesg;
5103 return 0;
5104
5105 fail:
5106 ata_host_set_resume(host_set);
5107 return rc;
5108}
5109
5110/**
5111 * ata_host_set_resume - resume host_set
5112 * @host_set: host_set to resume
5113 *
5114 * Resume @host_set. Actual operation is performed by EH. This
5115 * function requests EH to perform PM operations and returns.
5116 * Note that all resume operations are performed parallely.
5117 *
5118 * LOCKING:
5119 * Kernel thread context (may sleep).
5120 */
5121void ata_host_set_resume(struct ata_host_set *host_set)
5122{
5123 ata_host_set_request_pm(host_set, PMSG_ON, ATA_EH_SOFTRESET,
5124 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0);
5125 host_set->dev->power.power_state = PMSG_ON;
5126}
5127
5128/**
5129 * ata_port_start - Set port up for dma.
5130 * @ap: Port to initialize
5131 *
5132 * Called just after data structures for each port are
5133 * initialized. Allocates space for PRD table.
5134 *
5135 * May be used as the port_start() entry in ata_port_operations.
5136 *
5137 * LOCKING:
5138 * Inherited from caller.
5139 */
5140
5141int ata_port_start (struct ata_port *ap)
5142{
5143 struct device *dev = ap->dev;
5144 int rc;
5145
5146 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5147 if (!ap->prd)
5148 return -ENOMEM;
5149
5150 rc = ata_pad_alloc(ap, dev);
5151 if (rc) {
5152 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5153 return rc;
5154 }
5155
5156 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5157
5158 return 0;
5159}
5160
5161
5162/**
5163 * ata_port_stop - Undo ata_port_start()
5164 * @ap: Port to shut down
5165 *
5166 * Frees the PRD table.
5167 *
5168 * May be used as the port_stop() entry in ata_port_operations.
5169 *
5170 * LOCKING:
5171 * Inherited from caller.
5172 */
5173
5174void ata_port_stop (struct ata_port *ap)
5175{
5176 struct device *dev = ap->dev;
5177
5178 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5179 ata_pad_free(ap, dev);
5180}
5181
5182void ata_host_stop (struct ata_host_set *host_set)
5183{
5184 if (host_set->mmio_base)
5185 iounmap(host_set->mmio_base);
5186}
5187
5188
5189/**
5190 * ata_host_remove - Unregister SCSI host structure with upper layers
5191 * @ap: Port to unregister
5192 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
5193 *
5194 * LOCKING:
5195 * Inherited from caller.
5196 */
5197
5198static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
5199{
5200 struct Scsi_Host *sh = ap->host;
5201
5202 DPRINTK("ENTER\n");
5203
5204 if (do_unregister)
5205 scsi_remove_host(sh);
5206
5207 ap->ops->port_stop(ap);
5208}
5209
5210/**
5211 * ata_dev_init - Initialize an ata_device structure
5212 * @dev: Device structure to initialize
5213 *
5214 * Initialize @dev in preparation for probing.
5215 *
5216 * LOCKING:
5217 * Inherited from caller.
5218 */
5219void ata_dev_init(struct ata_device *dev)
5220{
5221 struct ata_port *ap = dev->ap;
5222 unsigned long flags;
5223
5224 /* SATA spd limit is bound to the first device */
5225 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5226
5227 /* High bits of dev->flags are used to record warm plug
5228 * requests which occur asynchronously. Synchronize using
5229 * host_set lock.
5230 */
5231 spin_lock_irqsave(ap->lock, flags);
5232 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5233 spin_unlock_irqrestore(ap->lock, flags);
5234
5235 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5236 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5237 dev->pio_mask = UINT_MAX;
5238 dev->mwdma_mask = UINT_MAX;
5239 dev->udma_mask = UINT_MAX;
5240}
5241
5242/**
5243 * ata_host_init - Initialize an ata_port structure
5244 * @ap: Structure to initialize
5245 * @host: associated SCSI mid-layer structure
5246 * @host_set: Collection of hosts to which @ap belongs
5247 * @ent: Probe information provided by low-level driver
5248 * @port_no: Port number associated with this ata_port
5249 *
5250 * Initialize a new ata_port structure, and its associated
5251 * scsi_host.
5252 *
5253 * LOCKING:
5254 * Inherited from caller.
5255 */
5256static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
5257 struct ata_host_set *host_set,
5258 const struct ata_probe_ent *ent, unsigned int port_no)
5259{
5260 unsigned int i;
5261
5262 host->max_id = 16;
5263 host->max_lun = 1;
5264 host->max_channel = 1;
5265 host->unique_id = ata_unique_id++;
5266 host->max_cmd_len = 12;
5267
5268 ap->lock = &host_set->lock;
5269 ap->flags = ATA_FLAG_DISABLED;
5270 ap->id = host->unique_id;
5271 ap->host = host;
5272 ap->ctl = ATA_DEVCTL_OBS;
5273 ap->host_set = host_set;
5274 ap->dev = ent->dev;
5275 ap->port_no = port_no;
5276 ap->hard_port_no =
5277 ent->legacy_mode ? ent->hard_port_no : port_no;
5278 ap->pio_mask = ent->pio_mask;
5279 ap->mwdma_mask = ent->mwdma_mask;
5280 ap->udma_mask = ent->udma_mask;
5281 ap->flags |= ent->host_flags;
5282 ap->ops = ent->port_ops;
5283 ap->hw_sata_spd_limit = UINT_MAX;
5284 ap->active_tag = ATA_TAG_POISON;
5285 ap->last_ctl = 0xFF;
5286
5287#if defined(ATA_VERBOSE_DEBUG)
5288 /* turn on all debugging levels */
5289 ap->msg_enable = 0x00FF;
5290#elif defined(ATA_DEBUG)
5291 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5292#else
5293 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5294#endif
5295
5296 INIT_WORK(&ap->port_task, NULL, NULL);
5297 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5298 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5299 INIT_LIST_HEAD(&ap->eh_done_q);
5300 init_waitqueue_head(&ap->eh_wait_q);
5301
5302 /* set cable type */
5303 ap->cbl = ATA_CBL_NONE;
5304 if (ap->flags & ATA_FLAG_SATA)
5305 ap->cbl = ATA_CBL_SATA;
5306
5307 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5308 struct ata_device *dev = &ap->device[i];
5309 dev->ap = ap;
5310 dev->devno = i;
5311 ata_dev_init(dev);
5312 }
5313
5314#ifdef ATA_IRQ_TRAP
5315 ap->stats.unhandled_irq = 1;
5316 ap->stats.idle_irq = 1;
5317#endif
5318
5319 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5320}
5321
5322/**
5323 * ata_host_add - Attach low-level ATA driver to system
5324 * @ent: Information provided by low-level driver
5325 * @host_set: Collections of ports to which we add
5326 * @port_no: Port number associated with this host
5327 *
5328 * Attach low-level ATA driver to system.
5329 *
5330 * LOCKING:
5331 * PCI/etc. bus probe sem.
5332 *
5333 * RETURNS:
5334 * New ata_port on success, for NULL on error.
5335 */
5336
5337static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
5338 struct ata_host_set *host_set,
5339 unsigned int port_no)
5340{
5341 struct Scsi_Host *host;
5342 struct ata_port *ap;
5343 int rc;
5344
5345 DPRINTK("ENTER\n");
5346
5347 if (!ent->port_ops->error_handler &&
5348 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5349 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5350 port_no);
5351 return NULL;
5352 }
5353
5354 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5355 if (!host)
5356 return NULL;
5357
5358 host->transportt = &ata_scsi_transport_template;
5359
5360 ap = ata_shost_to_port(host);
5361
5362 ata_host_init(ap, host, host_set, ent, port_no);
5363
5364 rc = ap->ops->port_start(ap);
5365 if (rc)
5366 goto err_out;
5367
5368 return ap;
5369
5370err_out:
5371 scsi_host_put(host);
5372 return NULL;
5373}
5374
5375/**
5376 * ata_device_add - Register hardware device with ATA and SCSI layers
5377 * @ent: Probe information describing hardware device to be registered
5378 *
5379 * This function processes the information provided in the probe
5380 * information struct @ent, allocates the necessary ATA and SCSI
5381 * host information structures, initializes them, and registers
5382 * everything with requisite kernel subsystems.
5383 *
5384 * This function requests irqs, probes the ATA bus, and probes
5385 * the SCSI bus.
5386 *
5387 * LOCKING:
5388 * PCI/etc. bus probe sem.
5389 *
5390 * RETURNS:
5391 * Number of ports registered. Zero on error (no ports registered).
5392 */
5393int ata_device_add(const struct ata_probe_ent *ent)
5394{
5395 unsigned int count = 0, i;
5396 struct device *dev = ent->dev;
5397 struct ata_host_set *host_set;
5398 int rc;
5399
5400 DPRINTK("ENTER\n");
5401 /* alloc a container for our list of ATA ports (buses) */
5402 host_set = kzalloc(sizeof(struct ata_host_set) +
5403 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5404 if (!host_set)
5405 return 0;
5406 spin_lock_init(&host_set->lock);
5407
5408 host_set->dev = dev;
5409 host_set->n_ports = ent->n_ports;
5410 host_set->irq = ent->irq;
5411 host_set->mmio_base = ent->mmio_base;
5412 host_set->private_data = ent->private_data;
5413 host_set->ops = ent->port_ops;
5414 host_set->flags = ent->host_set_flags;
5415
5416 /* register each port bound to this device */
5417 for (i = 0; i < ent->n_ports; i++) {
5418 struct ata_port *ap;
5419 unsigned long xfer_mode_mask;
5420
5421 ap = ata_host_add(ent, host_set, i);
5422 if (!ap)
5423 goto err_out;
5424
5425 host_set->ports[i] = ap;
5426 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5427 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5428 (ap->pio_mask << ATA_SHIFT_PIO);
5429
5430 /* print per-port info to dmesg */
5431 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5432 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
5433 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5434 ata_mode_string(xfer_mode_mask),
5435 ap->ioaddr.cmd_addr,
5436 ap->ioaddr.ctl_addr,
5437 ap->ioaddr.bmdma_addr,
5438 ent->irq);
5439
5440 ata_chk_status(ap);
5441 host_set->ops->irq_clear(ap);
5442 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5443 count++;
5444 }
5445
5446 if (!count)
5447 goto err_free_ret;
5448
5449 /* obtain irq, that is shared between channels */
5450 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5451 DRV_NAME, host_set);
5452 if (rc) {
5453 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5454 ent->irq, rc);
5455 goto err_out;
5456 }
5457
5458 /* perform each probe synchronously */
5459 DPRINTK("probe begin\n");
5460 for (i = 0; i < count; i++) {
5461 struct ata_port *ap;
5462 u32 scontrol;
5463 int rc;
5464
5465 ap = host_set->ports[i];
5466
5467 /* init sata_spd_limit to the current value */
5468 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5469 int spd = (scontrol >> 4) & 0xf;
5470 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5471 }
5472 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5473
5474 rc = scsi_add_host(ap->host, dev);
5475 if (rc) {
5476 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5477 /* FIXME: do something useful here */
5478 /* FIXME: handle unconditional calls to
5479 * scsi_scan_host and ata_host_remove, below,
5480 * at the very least
5481 */
5482 }
5483
5484 if (ap->ops->error_handler) {
5485 struct ata_eh_info *ehi = &ap->eh_info;
5486 unsigned long flags;
5487
5488 ata_port_probe(ap);
5489
5490 /* kick EH for boot probing */
5491 spin_lock_irqsave(ap->lock, flags);
5492
5493 ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5494 ehi->action |= ATA_EH_SOFTRESET;
5495 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5496
5497 ap->pflags |= ATA_PFLAG_LOADING;
5498 ata_port_schedule_eh(ap);
5499
5500 spin_unlock_irqrestore(ap->lock, flags);
5501
5502 /* wait for EH to finish */
5503 ata_port_wait_eh(ap);
5504 } else {
5505 DPRINTK("ata%u: bus probe begin\n", ap->id);
5506 rc = ata_bus_probe(ap);
5507 DPRINTK("ata%u: bus probe end\n", ap->id);
5508
5509 if (rc) {
5510 /* FIXME: do something useful here?
5511 * Current libata behavior will
5512 * tear down everything when
5513 * the module is removed
5514 * or the h/w is unplugged.
5515 */
5516 }
5517 }
5518 }
5519
5520 /* probes are done, now scan each port's disk(s) */
5521 DPRINTK("host probe begin\n");
5522 for (i = 0; i < count; i++) {
5523 struct ata_port *ap = host_set->ports[i];
5524
5525 ata_scsi_scan_host(ap);
5526 }
5527
5528 dev_set_drvdata(dev, host_set);
5529
5530 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5531 return ent->n_ports; /* success */
5532
5533err_out:
5534 for (i = 0; i < count; i++) {
5535 ata_host_remove(host_set->ports[i], 1);
5536 scsi_host_put(host_set->ports[i]->host);
5537 }
5538err_free_ret:
5539 kfree(host_set);
5540 VPRINTK("EXIT, returning 0\n");
5541 return 0;
5542}
5543
5544/**
5545 * ata_port_detach - Detach ATA port in prepration of device removal
5546 * @ap: ATA port to be detached
5547 *
5548 * Detach all ATA devices and the associated SCSI devices of @ap;
5549 * then, remove the associated SCSI host. @ap is guaranteed to
5550 * be quiescent on return from this function.
5551 *
5552 * LOCKING:
5553 * Kernel thread context (may sleep).
5554 */
5555void ata_port_detach(struct ata_port *ap)
5556{
5557 unsigned long flags;
5558 int i;
5559
5560 if (!ap->ops->error_handler)
5561 return;
5562
5563 /* tell EH we're leaving & flush EH */
5564 spin_lock_irqsave(ap->lock, flags);
5565 ap->pflags |= ATA_PFLAG_UNLOADING;
5566 spin_unlock_irqrestore(ap->lock, flags);
5567
5568 ata_port_wait_eh(ap);
5569
5570 /* EH is now guaranteed to see UNLOADING, so no new device
5571 * will be attached. Disable all existing devices.
5572 */
5573 spin_lock_irqsave(ap->lock, flags);
5574
5575 for (i = 0; i < ATA_MAX_DEVICES; i++)
5576 ata_dev_disable(&ap->device[i]);
5577
5578 spin_unlock_irqrestore(ap->lock, flags);
5579
5580 /* Final freeze & EH. All in-flight commands are aborted. EH
5581 * will be skipped and retrials will be terminated with bad
5582 * target.
5583 */
5584 spin_lock_irqsave(ap->lock, flags);
5585 ata_port_freeze(ap); /* won't be thawed */
5586 spin_unlock_irqrestore(ap->lock, flags);
5587
5588 ata_port_wait_eh(ap);
5589
5590 /* Flush hotplug task. The sequence is similar to
5591 * ata_port_flush_task().
5592 */
5593 flush_workqueue(ata_aux_wq);
5594 cancel_delayed_work(&ap->hotplug_task);
5595 flush_workqueue(ata_aux_wq);
5596
5597 /* remove the associated SCSI host */
5598 scsi_remove_host(ap->host);
5599}
5600
5601/**
5602 * ata_host_set_remove - PCI layer callback for device removal
5603 * @host_set: ATA host set that was removed
5604 *
5605 * Unregister all objects associated with this host set. Free those
5606 * objects.
5607 *
5608 * LOCKING:
5609 * Inherited from calling layer (may sleep).
5610 */
5611
5612void ata_host_set_remove(struct ata_host_set *host_set)
5613{
5614 unsigned int i;
5615
5616 for (i = 0; i < host_set->n_ports; i++)
5617 ata_port_detach(host_set->ports[i]);
5618
5619 free_irq(host_set->irq, host_set);
5620
5621 for (i = 0; i < host_set->n_ports; i++) {
5622 struct ata_port *ap = host_set->ports[i];
5623
5624 ata_scsi_release(ap->host);
5625
5626 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5627 struct ata_ioports *ioaddr = &ap->ioaddr;
5628
5629 if (ioaddr->cmd_addr == 0x1f0)
5630 release_region(0x1f0, 8);
5631 else if (ioaddr->cmd_addr == 0x170)
5632 release_region(0x170, 8);
5633 }
5634
5635 scsi_host_put(ap->host);
5636 }
5637
5638 if (host_set->ops->host_stop)
5639 host_set->ops->host_stop(host_set);
5640
5641 kfree(host_set);
5642}
5643
5644/**
5645 * ata_scsi_release - SCSI layer callback hook for host unload
5646 * @host: libata host to be unloaded
5647 *
5648 * Performs all duties necessary to shut down a libata port...
5649 * Kill port kthread, disable port, and release resources.
5650 *
5651 * LOCKING:
5652 * Inherited from SCSI layer.
5653 *
5654 * RETURNS:
5655 * One.
5656 */
5657
5658int ata_scsi_release(struct Scsi_Host *host)
5659{
5660 struct ata_port *ap = ata_shost_to_port(host);
5661
5662 DPRINTK("ENTER\n");
5663
5664 ap->ops->port_disable(ap);
5665 ata_host_remove(ap, 0);
5666
5667 DPRINTK("EXIT\n");
5668 return 1;
5669}
5670
5671/**
5672 * ata_std_ports - initialize ioaddr with standard port offsets.
5673 * @ioaddr: IO address structure to be initialized
5674 *
5675 * Utility function which initializes data_addr, error_addr,
5676 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5677 * device_addr, status_addr, and command_addr to standard offsets
5678 * relative to cmd_addr.
5679 *
5680 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5681 */
5682
5683void ata_std_ports(struct ata_ioports *ioaddr)
5684{
5685 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5686 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5687 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5688 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5689 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5690 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5691 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5692 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5693 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5694 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5695}
5696
5697
5698#ifdef CONFIG_PCI
5699
5700void ata_pci_host_stop (struct ata_host_set *host_set)
5701{
5702 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5703
5704 pci_iounmap(pdev, host_set->mmio_base);
5705}
5706
5707/**
5708 * ata_pci_remove_one - PCI layer callback for device removal
5709 * @pdev: PCI device that was removed
5710 *
5711 * PCI layer indicates to libata via this hook that
5712 * hot-unplug or module unload event has occurred.
5713 * Handle this by unregistering all objects associated
5714 * with this PCI device. Free those objects. Then finally
5715 * release PCI resources and disable device.
5716 *
5717 * LOCKING:
5718 * Inherited from PCI layer (may sleep).
5719 */
5720
5721void ata_pci_remove_one (struct pci_dev *pdev)
5722{
5723 struct device *dev = pci_dev_to_dev(pdev);
5724 struct ata_host_set *host_set = dev_get_drvdata(dev);
5725 struct ata_host_set *host_set2 = host_set->next;
5726
5727 ata_host_set_remove(host_set);
5728 if (host_set2)
5729 ata_host_set_remove(host_set2);
5730
5731 pci_release_regions(pdev);
5732 pci_disable_device(pdev);
5733 dev_set_drvdata(dev, NULL);
5734}
5735
5736/* move to PCI subsystem */
5737int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5738{
5739 unsigned long tmp = 0;
5740
5741 switch (bits->width) {
5742 case 1: {
5743 u8 tmp8 = 0;
5744 pci_read_config_byte(pdev, bits->reg, &tmp8);
5745 tmp = tmp8;
5746 break;
5747 }
5748 case 2: {
5749 u16 tmp16 = 0;
5750 pci_read_config_word(pdev, bits->reg, &tmp16);
5751 tmp = tmp16;
5752 break;
5753 }
5754 case 4: {
5755 u32 tmp32 = 0;
5756 pci_read_config_dword(pdev, bits->reg, &tmp32);
5757 tmp = tmp32;
5758 break;
5759 }
5760
5761 default:
5762 return -EINVAL;
5763 }
5764
5765 tmp &= bits->mask;
5766
5767 return (tmp == bits->val) ? 1 : 0;
5768}
5769
5770void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t state)
5771{
5772 pci_save_state(pdev);
5773
5774 if (state.event == PM_EVENT_SUSPEND) {
5775 pci_disable_device(pdev);
5776 pci_set_power_state(pdev, PCI_D3hot);
5777 }
5778}
5779
5780void ata_pci_device_do_resume(struct pci_dev *pdev)
5781{
5782 pci_set_power_state(pdev, PCI_D0);
5783 pci_restore_state(pdev);
5784 pci_enable_device(pdev);
5785 pci_set_master(pdev);
5786}
5787
5788int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5789{
5790 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5791 int rc = 0;
5792
5793 rc = ata_host_set_suspend(host_set, state);
5794 if (rc)
5795 return rc;
5796
5797 if (host_set->next) {
5798 rc = ata_host_set_suspend(host_set->next, state);
5799 if (rc) {
5800 ata_host_set_resume(host_set);
5801 return rc;
5802 }
5803 }
5804
5805 ata_pci_device_do_suspend(pdev, state);
5806
5807 return 0;
5808}
5809
5810int ata_pci_device_resume(struct pci_dev *pdev)
5811{
5812 struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev);
5813
5814 ata_pci_device_do_resume(pdev);
5815 ata_host_set_resume(host_set);
5816 if (host_set->next)
5817 ata_host_set_resume(host_set->next);
5818
5819 return 0;
5820}
5821#endif /* CONFIG_PCI */
5822
5823
5824static int __init ata_init(void)
5825{
5826 ata_probe_timeout *= HZ;
5827 ata_wq = create_workqueue("ata");
5828 if (!ata_wq)
5829 return -ENOMEM;
5830
5831 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5832 if (!ata_aux_wq) {
5833 destroy_workqueue(ata_wq);
5834 return -ENOMEM;
5835 }
5836
5837 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5838 return 0;
5839}
5840
5841static void __exit ata_exit(void)
5842{
5843 destroy_workqueue(ata_wq);
5844 destroy_workqueue(ata_aux_wq);
5845}
5846
5847module_init(ata_init);
5848module_exit(ata_exit);
5849
5850static unsigned long ratelimit_time;
5851static DEFINE_SPINLOCK(ata_ratelimit_lock);
5852
5853int ata_ratelimit(void)
5854{
5855 int rc;
5856 unsigned long flags;
5857
5858 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5859
5860 if (time_after(jiffies, ratelimit_time)) {
5861 rc = 1;
5862 ratelimit_time = jiffies + (HZ/5);
5863 } else
5864 rc = 0;
5865
5866 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5867
5868 return rc;
5869}
5870
5871/**
5872 * ata_wait_register - wait until register value changes
5873 * @reg: IO-mapped register
5874 * @mask: Mask to apply to read register value
5875 * @val: Wait condition
5876 * @interval_msec: polling interval in milliseconds
5877 * @timeout_msec: timeout in milliseconds
5878 *
5879 * Waiting for some bits of register to change is a common
5880 * operation for ATA controllers. This function reads 32bit LE
5881 * IO-mapped register @reg and tests for the following condition.
5882 *
5883 * (*@reg & mask) != val
5884 *
5885 * If the condition is met, it returns; otherwise, the process is
5886 * repeated after @interval_msec until timeout.
5887 *
5888 * LOCKING:
5889 * Kernel thread context (may sleep)
5890 *
5891 * RETURNS:
5892 * The final register value.
5893 */
5894u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5895 unsigned long interval_msec,
5896 unsigned long timeout_msec)
5897{
5898 unsigned long timeout;
5899 u32 tmp;
5900
5901 tmp = ioread32(reg);
5902
5903 /* Calculate timeout _after_ the first read to make sure
5904 * preceding writes reach the controller before starting to
5905 * eat away the timeout.
5906 */
5907 timeout = jiffies + (timeout_msec * HZ) / 1000;
5908
5909 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5910 msleep(interval_msec);
5911 tmp = ioread32(reg);
5912 }
5913
5914 return tmp;
5915}
5916
5917/*
5918 * libata is essentially a library of internal helper functions for
5919 * low-level ATA host controller drivers. As such, the API/ABI is
5920 * likely to change as new drivers are added and updated.
5921 * Do not depend on ABI/API stability.
5922 */
5923
5924EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
5925EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
5926EXPORT_SYMBOL_GPL(sata_deb_timing_long);
5927EXPORT_SYMBOL_GPL(ata_std_bios_param);
5928EXPORT_SYMBOL_GPL(ata_std_ports);
5929EXPORT_SYMBOL_GPL(ata_device_add);
5930EXPORT_SYMBOL_GPL(ata_port_detach);
5931EXPORT_SYMBOL_GPL(ata_host_set_remove);
5932EXPORT_SYMBOL_GPL(ata_sg_init);
5933EXPORT_SYMBOL_GPL(ata_sg_init_one);
5934EXPORT_SYMBOL_GPL(ata_hsm_move);
5935EXPORT_SYMBOL_GPL(ata_qc_complete);
5936EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
5937EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5938EXPORT_SYMBOL_GPL(ata_tf_load);
5939EXPORT_SYMBOL_GPL(ata_tf_read);
5940EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5941EXPORT_SYMBOL_GPL(ata_std_dev_select);
5942EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5943EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5944EXPORT_SYMBOL_GPL(ata_check_status);
5945EXPORT_SYMBOL_GPL(ata_altstatus);
5946EXPORT_SYMBOL_GPL(ata_exec_command);
5947EXPORT_SYMBOL_GPL(ata_port_start);
5948EXPORT_SYMBOL_GPL(ata_port_stop);
5949EXPORT_SYMBOL_GPL(ata_host_stop);
5950EXPORT_SYMBOL_GPL(ata_interrupt);
5951EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
5952EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
5953EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
5954EXPORT_SYMBOL_GPL(ata_qc_prep);
5955EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5956EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5957EXPORT_SYMBOL_GPL(ata_bmdma_start);
5958EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5959EXPORT_SYMBOL_GPL(ata_bmdma_status);
5960EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5961EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
5962EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
5963EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
5964EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
5965EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
5966EXPORT_SYMBOL_GPL(ata_port_probe);
5967EXPORT_SYMBOL_GPL(sata_set_spd);
5968EXPORT_SYMBOL_GPL(sata_phy_debounce);
5969EXPORT_SYMBOL_GPL(sata_phy_resume);
5970EXPORT_SYMBOL_GPL(sata_phy_reset);
5971EXPORT_SYMBOL_GPL(__sata_phy_reset);
5972EXPORT_SYMBOL_GPL(ata_bus_reset);
5973EXPORT_SYMBOL_GPL(ata_std_prereset);
5974EXPORT_SYMBOL_GPL(ata_std_softreset);
5975EXPORT_SYMBOL_GPL(sata_std_hardreset);
5976EXPORT_SYMBOL_GPL(ata_std_postreset);
5977EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5978EXPORT_SYMBOL_GPL(ata_dev_classify);
5979EXPORT_SYMBOL_GPL(ata_dev_pair);
5980EXPORT_SYMBOL_GPL(ata_port_disable);
5981EXPORT_SYMBOL_GPL(ata_ratelimit);
5982EXPORT_SYMBOL_GPL(ata_wait_register);
5983EXPORT_SYMBOL_GPL(ata_busy_sleep);
5984EXPORT_SYMBOL_GPL(ata_port_queue_task);
5985EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5986EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5987EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5988EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
5989EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
5990EXPORT_SYMBOL_GPL(ata_scsi_release);
5991EXPORT_SYMBOL_GPL(ata_host_intr);
5992EXPORT_SYMBOL_GPL(sata_scr_valid);
5993EXPORT_SYMBOL_GPL(sata_scr_read);
5994EXPORT_SYMBOL_GPL(sata_scr_write);
5995EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5996EXPORT_SYMBOL_GPL(ata_port_online);
5997EXPORT_SYMBOL_GPL(ata_port_offline);
5998EXPORT_SYMBOL_GPL(ata_host_set_suspend);
5999EXPORT_SYMBOL_GPL(ata_host_set_resume);
6000EXPORT_SYMBOL_GPL(ata_id_string);
6001EXPORT_SYMBOL_GPL(ata_id_c_string);
6002EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6003
6004EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6005EXPORT_SYMBOL_GPL(ata_timing_compute);
6006EXPORT_SYMBOL_GPL(ata_timing_merge);
6007
6008#ifdef CONFIG_PCI
6009EXPORT_SYMBOL_GPL(pci_test_config_bits);
6010EXPORT_SYMBOL_GPL(ata_pci_host_stop);
6011EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
6012EXPORT_SYMBOL_GPL(ata_pci_init_one);
6013EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6014EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6015EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
6016EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6017EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6018EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6019EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6020#endif /* CONFIG_PCI */
6021
6022EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
6023EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
6024
6025EXPORT_SYMBOL_GPL(ata_eng_timeout);
6026EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6027EXPORT_SYMBOL_GPL(ata_port_abort);
6028EXPORT_SYMBOL_GPL(ata_port_freeze);
6029EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6030EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
6031EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6032EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
6033EXPORT_SYMBOL_GPL(ata_do_eh);
Linux 6.x block layer and io_uring tree(s)