| 1 | /* drivers/rtc/rtc-s3c.c |
| 2 | * |
| 3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ |
| 5 | * |
| 6 | * Copyright (c) 2004,2006 Simtec Electronics |
| 7 | * Ben Dooks, <ben@simtec.co.uk> |
| 8 | * http://armlinux.simtec.co.uk/ |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver |
| 15 | */ |
| 16 | |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/fs.h> |
| 19 | #include <linux/string.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/rtc.h> |
| 24 | #include <linux/bcd.h> |
| 25 | #include <linux/clk.h> |
| 26 | #include <linux/log2.h> |
| 27 | #include <linux/slab.h> |
| 28 | |
| 29 | #include <mach/hardware.h> |
| 30 | #include <asm/uaccess.h> |
| 31 | #include <asm/io.h> |
| 32 | #include <asm/irq.h> |
| 33 | #include <plat/regs-rtc.h> |
| 34 | |
| 35 | enum s3c_cpu_type { |
| 36 | TYPE_S3C2410, |
| 37 | TYPE_S3C64XX, |
| 38 | }; |
| 39 | |
| 40 | /* I have yet to find an S3C implementation with more than one |
| 41 | * of these rtc blocks in */ |
| 42 | |
| 43 | static struct resource *s3c_rtc_mem; |
| 44 | |
| 45 | static struct clk *rtc_clk; |
| 46 | static void __iomem *s3c_rtc_base; |
| 47 | static int s3c_rtc_alarmno = NO_IRQ; |
| 48 | static int s3c_rtc_tickno = NO_IRQ; |
| 49 | static enum s3c_cpu_type s3c_rtc_cpu_type; |
| 50 | |
| 51 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); |
| 52 | |
| 53 | /* IRQ Handlers */ |
| 54 | |
| 55 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
| 56 | { |
| 57 | struct rtc_device *rdev = id; |
| 58 | |
| 59 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); |
| 60 | |
| 61 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) |
| 62 | writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP); |
| 63 | |
| 64 | return IRQ_HANDLED; |
| 65 | } |
| 66 | |
| 67 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
| 68 | { |
| 69 | struct rtc_device *rdev = id; |
| 70 | |
| 71 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); |
| 72 | |
| 73 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) |
| 74 | writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP); |
| 75 | |
| 76 | return IRQ_HANDLED; |
| 77 | } |
| 78 | |
| 79 | /* Update control registers */ |
| 80 | static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) |
| 81 | { |
| 82 | unsigned int tmp; |
| 83 | |
| 84 | pr_debug("%s: aie=%d\n", __func__, enabled); |
| 85 | |
| 86 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
| 87 | |
| 88 | if (enabled) |
| 89 | tmp |= S3C2410_RTCALM_ALMEN; |
| 90 | |
| 91 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
| 92 | |
| 93 | return 0; |
| 94 | } |
| 95 | |
| 96 | static int s3c_rtc_setfreq(struct device *dev, int freq) |
| 97 | { |
| 98 | struct platform_device *pdev = to_platform_device(dev); |
| 99 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); |
| 100 | unsigned int tmp = 0; |
| 101 | |
| 102 | if (!is_power_of_2(freq)) |
| 103 | return -EINVAL; |
| 104 | |
| 105 | spin_lock_irq(&s3c_rtc_pie_lock); |
| 106 | |
| 107 | if (s3c_rtc_cpu_type == TYPE_S3C2410) { |
| 108 | tmp = readb(s3c_rtc_base + S3C2410_TICNT); |
| 109 | tmp &= S3C2410_TICNT_ENABLE; |
| 110 | } |
| 111 | |
| 112 | tmp |= (rtc_dev->max_user_freq / freq)-1; |
| 113 | |
| 114 | writel(tmp, s3c_rtc_base + S3C2410_TICNT); |
| 115 | spin_unlock_irq(&s3c_rtc_pie_lock); |
| 116 | |
| 117 | return 0; |
| 118 | } |
| 119 | |
| 120 | /* Time read/write */ |
| 121 | |
| 122 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) |
| 123 | { |
| 124 | unsigned int have_retried = 0; |
| 125 | void __iomem *base = s3c_rtc_base; |
| 126 | |
| 127 | retry_get_time: |
| 128 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
| 129 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); |
| 130 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); |
| 131 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); |
| 132 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); |
| 133 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); |
| 134 | |
| 135 | /* the only way to work out wether the system was mid-update |
| 136 | * when we read it is to check the second counter, and if it |
| 137 | * is zero, then we re-try the entire read |
| 138 | */ |
| 139 | |
| 140 | if (rtc_tm->tm_sec == 0 && !have_retried) { |
| 141 | have_retried = 1; |
| 142 | goto retry_get_time; |
| 143 | } |
| 144 | |
| 145 | pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n", |
| 146 | 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, |
| 147 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); |
| 148 | |
| 149 | rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); |
| 150 | rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); |
| 151 | rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); |
| 152 | rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); |
| 153 | rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); |
| 154 | rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); |
| 155 | |
| 156 | rtc_tm->tm_year += 100; |
| 157 | rtc_tm->tm_mon -= 1; |
| 158 | |
| 159 | return rtc_valid_tm(rtc_tm); |
| 160 | } |
| 161 | |
| 162 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) |
| 163 | { |
| 164 | void __iomem *base = s3c_rtc_base; |
| 165 | int year = tm->tm_year - 100; |
| 166 | |
| 167 | pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n", |
| 168 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 169 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 170 | |
| 171 | /* we get around y2k by simply not supporting it */ |
| 172 | |
| 173 | if (year < 0 || year >= 100) { |
| 174 | dev_err(dev, "rtc only supports 100 years\n"); |
| 175 | return -EINVAL; |
| 176 | } |
| 177 | |
| 178 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC); |
| 179 | writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN); |
| 180 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR); |
| 181 | writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE); |
| 182 | writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON); |
| 183 | writeb(bin2bcd(year), base + S3C2410_RTCYEAR); |
| 184 | |
| 185 | return 0; |
| 186 | } |
| 187 | |
| 188 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 189 | { |
| 190 | struct rtc_time *alm_tm = &alrm->time; |
| 191 | void __iomem *base = s3c_rtc_base; |
| 192 | unsigned int alm_en; |
| 193 | |
| 194 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
| 195 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); |
| 196 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); |
| 197 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); |
| 198 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); |
| 199 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); |
| 200 | |
| 201 | alm_en = readb(base + S3C2410_RTCALM); |
| 202 | |
| 203 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
| 204 | |
| 205 | pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n", |
| 206 | alm_en, |
| 207 | 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, |
| 208 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); |
| 209 | |
| 210 | |
| 211 | /* decode the alarm enable field */ |
| 212 | |
| 213 | if (alm_en & S3C2410_RTCALM_SECEN) |
| 214 | alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); |
| 215 | else |
| 216 | alm_tm->tm_sec = -1; |
| 217 | |
| 218 | if (alm_en & S3C2410_RTCALM_MINEN) |
| 219 | alm_tm->tm_min = bcd2bin(alm_tm->tm_min); |
| 220 | else |
| 221 | alm_tm->tm_min = -1; |
| 222 | |
| 223 | if (alm_en & S3C2410_RTCALM_HOUREN) |
| 224 | alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); |
| 225 | else |
| 226 | alm_tm->tm_hour = -1; |
| 227 | |
| 228 | if (alm_en & S3C2410_RTCALM_DAYEN) |
| 229 | alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); |
| 230 | else |
| 231 | alm_tm->tm_mday = -1; |
| 232 | |
| 233 | if (alm_en & S3C2410_RTCALM_MONEN) { |
| 234 | alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); |
| 235 | alm_tm->tm_mon -= 1; |
| 236 | } else { |
| 237 | alm_tm->tm_mon = -1; |
| 238 | } |
| 239 | |
| 240 | if (alm_en & S3C2410_RTCALM_YEAREN) |
| 241 | alm_tm->tm_year = bcd2bin(alm_tm->tm_year); |
| 242 | else |
| 243 | alm_tm->tm_year = -1; |
| 244 | |
| 245 | return 0; |
| 246 | } |
| 247 | |
| 248 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 249 | { |
| 250 | struct rtc_time *tm = &alrm->time; |
| 251 | void __iomem *base = s3c_rtc_base; |
| 252 | unsigned int alrm_en; |
| 253 | |
| 254 | pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n", |
| 255 | alrm->enabled, |
| 256 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 257 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 258 | |
| 259 | |
| 260 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
| 261 | writeb(0x00, base + S3C2410_RTCALM); |
| 262 | |
| 263 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { |
| 264 | alrm_en |= S3C2410_RTCALM_SECEN; |
| 265 | writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC); |
| 266 | } |
| 267 | |
| 268 | if (tm->tm_min < 60 && tm->tm_min >= 0) { |
| 269 | alrm_en |= S3C2410_RTCALM_MINEN; |
| 270 | writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN); |
| 271 | } |
| 272 | |
| 273 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { |
| 274 | alrm_en |= S3C2410_RTCALM_HOUREN; |
| 275 | writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR); |
| 276 | } |
| 277 | |
| 278 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); |
| 279 | |
| 280 | writeb(alrm_en, base + S3C2410_RTCALM); |
| 281 | |
| 282 | s3c_rtc_setaie(dev, alrm->enabled); |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) |
| 288 | { |
| 289 | unsigned int ticnt; |
| 290 | |
| 291 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) { |
| 292 | ticnt = readw(s3c_rtc_base + S3C2410_RTCCON); |
| 293 | ticnt &= S3C64XX_RTCCON_TICEN; |
| 294 | } else { |
| 295 | ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
| 296 | ticnt &= S3C2410_TICNT_ENABLE; |
| 297 | } |
| 298 | |
| 299 | seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); |
| 300 | return 0; |
| 301 | } |
| 302 | |
| 303 | static int s3c_rtc_open(struct device *dev) |
| 304 | { |
| 305 | struct platform_device *pdev = to_platform_device(dev); |
| 306 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); |
| 307 | int ret; |
| 308 | |
| 309 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, |
| 310 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
| 311 | |
| 312 | if (ret) { |
| 313 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); |
| 314 | return ret; |
| 315 | } |
| 316 | |
| 317 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, |
| 318 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
| 319 | |
| 320 | if (ret) { |
| 321 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); |
| 322 | goto tick_err; |
| 323 | } |
| 324 | |
| 325 | return ret; |
| 326 | |
| 327 | tick_err: |
| 328 | free_irq(s3c_rtc_alarmno, rtc_dev); |
| 329 | return ret; |
| 330 | } |
| 331 | |
| 332 | static void s3c_rtc_release(struct device *dev) |
| 333 | { |
| 334 | struct platform_device *pdev = to_platform_device(dev); |
| 335 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); |
| 336 | |
| 337 | /* do not clear AIE here, it may be needed for wake */ |
| 338 | |
| 339 | free_irq(s3c_rtc_alarmno, rtc_dev); |
| 340 | free_irq(s3c_rtc_tickno, rtc_dev); |
| 341 | } |
| 342 | |
| 343 | static const struct rtc_class_ops s3c_rtcops = { |
| 344 | .open = s3c_rtc_open, |
| 345 | .release = s3c_rtc_release, |
| 346 | .read_time = s3c_rtc_gettime, |
| 347 | .set_time = s3c_rtc_settime, |
| 348 | .read_alarm = s3c_rtc_getalarm, |
| 349 | .set_alarm = s3c_rtc_setalarm, |
| 350 | .proc = s3c_rtc_proc, |
| 351 | .alarm_irq_enable = s3c_rtc_setaie, |
| 352 | }; |
| 353 | |
| 354 | static void s3c_rtc_enable(struct platform_device *pdev, int en) |
| 355 | { |
| 356 | void __iomem *base = s3c_rtc_base; |
| 357 | unsigned int tmp; |
| 358 | |
| 359 | if (s3c_rtc_base == NULL) |
| 360 | return; |
| 361 | |
| 362 | if (!en) { |
| 363 | tmp = readw(base + S3C2410_RTCCON); |
| 364 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) |
| 365 | tmp &= ~S3C64XX_RTCCON_TICEN; |
| 366 | tmp &= ~S3C2410_RTCCON_RTCEN; |
| 367 | writew(tmp, base + S3C2410_RTCCON); |
| 368 | |
| 369 | if (s3c_rtc_cpu_type == TYPE_S3C2410) { |
| 370 | tmp = readb(base + S3C2410_TICNT); |
| 371 | tmp &= ~S3C2410_TICNT_ENABLE; |
| 372 | writeb(tmp, base + S3C2410_TICNT); |
| 373 | } |
| 374 | } else { |
| 375 | /* re-enable the device, and check it is ok */ |
| 376 | |
| 377 | if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) { |
| 378 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
| 379 | |
| 380 | tmp = readw(base + S3C2410_RTCCON); |
| 381 | writew(tmp | S3C2410_RTCCON_RTCEN, |
| 382 | base + S3C2410_RTCCON); |
| 383 | } |
| 384 | |
| 385 | if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) { |
| 386 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
| 387 | |
| 388 | tmp = readw(base + S3C2410_RTCCON); |
| 389 | writew(tmp & ~S3C2410_RTCCON_CNTSEL, |
| 390 | base + S3C2410_RTCCON); |
| 391 | } |
| 392 | |
| 393 | if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) { |
| 394 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
| 395 | |
| 396 | tmp = readw(base + S3C2410_RTCCON); |
| 397 | writew(tmp & ~S3C2410_RTCCON_CLKRST, |
| 398 | base + S3C2410_RTCCON); |
| 399 | } |
| 400 | } |
| 401 | } |
| 402 | |
| 403 | static int __devexit s3c_rtc_remove(struct platform_device *dev) |
| 404 | { |
| 405 | struct rtc_device *rtc = platform_get_drvdata(dev); |
| 406 | |
| 407 | platform_set_drvdata(dev, NULL); |
| 408 | rtc_device_unregister(rtc); |
| 409 | |
| 410 | s3c_rtc_setaie(&dev->dev, 0); |
| 411 | |
| 412 | clk_disable(rtc_clk); |
| 413 | clk_put(rtc_clk); |
| 414 | rtc_clk = NULL; |
| 415 | |
| 416 | iounmap(s3c_rtc_base); |
| 417 | release_resource(s3c_rtc_mem); |
| 418 | kfree(s3c_rtc_mem); |
| 419 | |
| 420 | return 0; |
| 421 | } |
| 422 | |
| 423 | static int __devinit s3c_rtc_probe(struct platform_device *pdev) |
| 424 | { |
| 425 | struct rtc_device *rtc; |
| 426 | struct rtc_time rtc_tm; |
| 427 | struct resource *res; |
| 428 | int ret; |
| 429 | |
| 430 | pr_debug("%s: probe=%p\n", __func__, pdev); |
| 431 | |
| 432 | /* find the IRQs */ |
| 433 | |
| 434 | s3c_rtc_tickno = platform_get_irq(pdev, 1); |
| 435 | if (s3c_rtc_tickno < 0) { |
| 436 | dev_err(&pdev->dev, "no irq for rtc tick\n"); |
| 437 | return -ENOENT; |
| 438 | } |
| 439 | |
| 440 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); |
| 441 | if (s3c_rtc_alarmno < 0) { |
| 442 | dev_err(&pdev->dev, "no irq for alarm\n"); |
| 443 | return -ENOENT; |
| 444 | } |
| 445 | |
| 446 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", |
| 447 | s3c_rtc_tickno, s3c_rtc_alarmno); |
| 448 | |
| 449 | /* get the memory region */ |
| 450 | |
| 451 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 452 | if (res == NULL) { |
| 453 | dev_err(&pdev->dev, "failed to get memory region resource\n"); |
| 454 | return -ENOENT; |
| 455 | } |
| 456 | |
| 457 | s3c_rtc_mem = request_mem_region(res->start, |
| 458 | res->end-res->start+1, |
| 459 | pdev->name); |
| 460 | |
| 461 | if (s3c_rtc_mem == NULL) { |
| 462 | dev_err(&pdev->dev, "failed to reserve memory region\n"); |
| 463 | ret = -ENOENT; |
| 464 | goto err_nores; |
| 465 | } |
| 466 | |
| 467 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); |
| 468 | if (s3c_rtc_base == NULL) { |
| 469 | dev_err(&pdev->dev, "failed ioremap()\n"); |
| 470 | ret = -EINVAL; |
| 471 | goto err_nomap; |
| 472 | } |
| 473 | |
| 474 | rtc_clk = clk_get(&pdev->dev, "rtc"); |
| 475 | if (IS_ERR(rtc_clk)) { |
| 476 | dev_err(&pdev->dev, "failed to find rtc clock source\n"); |
| 477 | ret = PTR_ERR(rtc_clk); |
| 478 | rtc_clk = NULL; |
| 479 | goto err_clk; |
| 480 | } |
| 481 | |
| 482 | clk_enable(rtc_clk); |
| 483 | |
| 484 | /* check to see if everything is setup correctly */ |
| 485 | |
| 486 | s3c_rtc_enable(pdev, 1); |
| 487 | |
| 488 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
| 489 | readw(s3c_rtc_base + S3C2410_RTCCON)); |
| 490 | |
| 491 | device_init_wakeup(&pdev->dev, 1); |
| 492 | |
| 493 | /* register RTC and exit */ |
| 494 | |
| 495 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, |
| 496 | THIS_MODULE); |
| 497 | |
| 498 | if (IS_ERR(rtc)) { |
| 499 | dev_err(&pdev->dev, "cannot attach rtc\n"); |
| 500 | ret = PTR_ERR(rtc); |
| 501 | goto err_nortc; |
| 502 | } |
| 503 | |
| 504 | s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; |
| 505 | |
| 506 | /* Check RTC Time */ |
| 507 | |
| 508 | s3c_rtc_gettime(NULL, &rtc_tm); |
| 509 | |
| 510 | if (rtc_valid_tm(&rtc_tm)) { |
| 511 | rtc_tm.tm_year = 100; |
| 512 | rtc_tm.tm_mon = 0; |
| 513 | rtc_tm.tm_mday = 1; |
| 514 | rtc_tm.tm_hour = 0; |
| 515 | rtc_tm.tm_min = 0; |
| 516 | rtc_tm.tm_sec = 0; |
| 517 | |
| 518 | s3c_rtc_settime(NULL, &rtc_tm); |
| 519 | |
| 520 | dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); |
| 521 | } |
| 522 | |
| 523 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) |
| 524 | rtc->max_user_freq = 32768; |
| 525 | else |
| 526 | rtc->max_user_freq = 128; |
| 527 | |
| 528 | platform_set_drvdata(pdev, rtc); |
| 529 | |
| 530 | s3c_rtc_setfreq(&pdev->dev, 1); |
| 531 | |
| 532 | return 0; |
| 533 | |
| 534 | err_nortc: |
| 535 | s3c_rtc_enable(pdev, 0); |
| 536 | clk_disable(rtc_clk); |
| 537 | clk_put(rtc_clk); |
| 538 | |
| 539 | err_clk: |
| 540 | iounmap(s3c_rtc_base); |
| 541 | |
| 542 | err_nomap: |
| 543 | release_resource(s3c_rtc_mem); |
| 544 | |
| 545 | err_nores: |
| 546 | return ret; |
| 547 | } |
| 548 | |
| 549 | #ifdef CONFIG_PM |
| 550 | |
| 551 | /* RTC Power management control */ |
| 552 | |
| 553 | static int ticnt_save, ticnt_en_save; |
| 554 | |
| 555 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) |
| 556 | { |
| 557 | /* save TICNT for anyone using periodic interrupts */ |
| 558 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
| 559 | if (s3c_rtc_cpu_type == TYPE_S3C64XX) { |
| 560 | ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON); |
| 561 | ticnt_en_save &= S3C64XX_RTCCON_TICEN; |
| 562 | } |
| 563 | s3c_rtc_enable(pdev, 0); |
| 564 | |
| 565 | if (device_may_wakeup(&pdev->dev)) |
| 566 | enable_irq_wake(s3c_rtc_alarmno); |
| 567 | |
| 568 | return 0; |
| 569 | } |
| 570 | |
| 571 | static int s3c_rtc_resume(struct platform_device *pdev) |
| 572 | { |
| 573 | unsigned int tmp; |
| 574 | |
| 575 | s3c_rtc_enable(pdev, 1); |
| 576 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
| 577 | if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) { |
| 578 | tmp = readw(s3c_rtc_base + S3C2410_RTCCON); |
| 579 | writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON); |
| 580 | } |
| 581 | |
| 582 | if (device_may_wakeup(&pdev->dev)) |
| 583 | disable_irq_wake(s3c_rtc_alarmno); |
| 584 | |
| 585 | return 0; |
| 586 | } |
| 587 | #else |
| 588 | #define s3c_rtc_suspend NULL |
| 589 | #define s3c_rtc_resume NULL |
| 590 | #endif |
| 591 | |
| 592 | static struct platform_device_id s3c_rtc_driver_ids[] = { |
| 593 | { |
| 594 | .name = "s3c2410-rtc", |
| 595 | .driver_data = TYPE_S3C2410, |
| 596 | }, { |
| 597 | .name = "s3c64xx-rtc", |
| 598 | .driver_data = TYPE_S3C64XX, |
| 599 | }, |
| 600 | { } |
| 601 | }; |
| 602 | |
| 603 | MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids); |
| 604 | |
| 605 | static struct platform_driver s3c_rtc_driver = { |
| 606 | .probe = s3c_rtc_probe, |
| 607 | .remove = __devexit_p(s3c_rtc_remove), |
| 608 | .suspend = s3c_rtc_suspend, |
| 609 | .resume = s3c_rtc_resume, |
| 610 | .id_table = s3c_rtc_driver_ids, |
| 611 | .driver = { |
| 612 | .name = "s3c-rtc", |
| 613 | .owner = THIS_MODULE, |
| 614 | }, |
| 615 | }; |
| 616 | |
| 617 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; |
| 618 | |
| 619 | static int __init s3c_rtc_init(void) |
| 620 | { |
| 621 | printk(banner); |
| 622 | return platform_driver_register(&s3c_rtc_driver); |
| 623 | } |
| 624 | |
| 625 | static void __exit s3c_rtc_exit(void) |
| 626 | { |
| 627 | platform_driver_unregister(&s3c_rtc_driver); |
| 628 | } |
| 629 | |
| 630 | module_init(s3c_rtc_init); |
| 631 | module_exit(s3c_rtc_exit); |
| 632 | |
| 633 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); |
| 634 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
| 635 | MODULE_LICENSE("GPL"); |
| 636 | MODULE_ALIAS("platform:s3c2410-rtc"); |