| 1 | /* |
| 2 | * omap_cf.c -- OMAP 16xx CompactFlash controller driver |
| 3 | * |
| 4 | * Copyright (c) 2005 David Brownell |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | |
| 20 | #include <pcmcia/ss.h> |
| 21 | |
| 22 | #include <mach/hardware.h> |
| 23 | #include <asm/io.h> |
| 24 | #include <asm/sizes.h> |
| 25 | |
| 26 | #include <plat/mux.h> |
| 27 | #include <plat/tc.h> |
| 28 | |
| 29 | |
| 30 | /* NOTE: don't expect this to support many I/O cards. The 16xx chips have |
| 31 | * hard-wired timings to support Compact Flash memory cards; they won't work |
| 32 | * with various other devices (like WLAN adapters) without some external |
| 33 | * logic to help out. |
| 34 | * |
| 35 | * NOTE: CF controller docs disagree with address space docs as to where |
| 36 | * CF_BASE really lives; this is a doc erratum. |
| 37 | */ |
| 38 | #define CF_BASE 0xfffe2800 |
| 39 | |
| 40 | /* status; read after IRQ */ |
| 41 | #define CF_STATUS (CF_BASE + 0x00) |
| 42 | # define CF_STATUS_BAD_READ (1 << 2) |
| 43 | # define CF_STATUS_BAD_WRITE (1 << 1) |
| 44 | # define CF_STATUS_CARD_DETECT (1 << 0) |
| 45 | |
| 46 | /* which chipselect (CS0..CS3) is used for CF (active low) */ |
| 47 | #define CF_CFG (CF_BASE + 0x02) |
| 48 | |
| 49 | /* card reset */ |
| 50 | #define CF_CONTROL (CF_BASE + 0x04) |
| 51 | # define CF_CONTROL_RESET (1 << 0) |
| 52 | |
| 53 | #define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT)) |
| 54 | |
| 55 | /*--------------------------------------------------------------------------*/ |
| 56 | |
| 57 | static const char driver_name[] = "omap_cf"; |
| 58 | |
| 59 | struct omap_cf_socket { |
| 60 | struct pcmcia_socket socket; |
| 61 | |
| 62 | struct timer_list timer; |
| 63 | unsigned present:1; |
| 64 | unsigned active:1; |
| 65 | |
| 66 | struct platform_device *pdev; |
| 67 | unsigned long phys_cf; |
| 68 | u_int irq; |
| 69 | struct resource iomem; |
| 70 | }; |
| 71 | |
| 72 | #define POLL_INTERVAL (2 * HZ) |
| 73 | |
| 74 | /*--------------------------------------------------------------------------*/ |
| 75 | |
| 76 | static int omap_cf_ss_init(struct pcmcia_socket *s) |
| 77 | { |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | /* the timer is primarily to kick this socket's pccardd */ |
| 82 | static void omap_cf_timer(unsigned long _cf) |
| 83 | { |
| 84 | struct omap_cf_socket *cf = (void *) _cf; |
| 85 | unsigned present = omap_cf_present(); |
| 86 | |
| 87 | if (present != cf->present) { |
| 88 | cf->present = present; |
| 89 | pr_debug("%s: card %s\n", driver_name, |
| 90 | present ? "present" : "gone"); |
| 91 | pcmcia_parse_events(&cf->socket, SS_DETECT); |
| 92 | } |
| 93 | |
| 94 | if (cf->active) |
| 95 | mod_timer(&cf->timer, jiffies + POLL_INTERVAL); |
| 96 | } |
| 97 | |
| 98 | /* This irq handler prevents "irqNNN: nobody cared" messages as drivers |
| 99 | * claim the card's IRQ. It may also detect some card insertions, but |
| 100 | * not removals; it can't always eliminate timer irqs. |
| 101 | */ |
| 102 | static irqreturn_t omap_cf_irq(int irq, void *_cf) |
| 103 | { |
| 104 | omap_cf_timer((unsigned long)_cf); |
| 105 | return IRQ_HANDLED; |
| 106 | } |
| 107 | |
| 108 | static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp) |
| 109 | { |
| 110 | if (!sp) |
| 111 | return -EINVAL; |
| 112 | |
| 113 | /* NOTE CF is always 3VCARD */ |
| 114 | if (omap_cf_present()) { |
| 115 | struct omap_cf_socket *cf; |
| 116 | |
| 117 | *sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD; |
| 118 | cf = container_of(s, struct omap_cf_socket, socket); |
| 119 | s->irq.AssignedIRQ = 0; |
| 120 | s->pci_irq = cf->irq; |
| 121 | } else |
| 122 | *sp = 0; |
| 123 | return 0; |
| 124 | } |
| 125 | |
| 126 | static int |
| 127 | omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) |
| 128 | { |
| 129 | u16 control; |
| 130 | |
| 131 | /* REVISIT some non-OSK boards may support power switching */ |
| 132 | switch (s->Vcc) { |
| 133 | case 0: |
| 134 | case 33: |
| 135 | break; |
| 136 | default: |
| 137 | return -EINVAL; |
| 138 | } |
| 139 | |
| 140 | control = omap_readw(CF_CONTROL); |
| 141 | if (s->flags & SS_RESET) |
| 142 | omap_writew(CF_CONTROL_RESET, CF_CONTROL); |
| 143 | else |
| 144 | omap_writew(0, CF_CONTROL); |
| 145 | |
| 146 | pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", |
| 147 | driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); |
| 148 | |
| 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | static int omap_cf_ss_suspend(struct pcmcia_socket *s) |
| 153 | { |
| 154 | pr_debug("%s: %s\n", driver_name, __func__); |
| 155 | return omap_cf_set_socket(s, &dead_socket); |
| 156 | } |
| 157 | |
| 158 | /* regions are 2K each: mem, attrib, io (and reserved-for-ide) */ |
| 159 | |
| 160 | static int |
| 161 | omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) |
| 162 | { |
| 163 | struct omap_cf_socket *cf; |
| 164 | |
| 165 | cf = container_of(s, struct omap_cf_socket, socket); |
| 166 | io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; |
| 167 | io->start = cf->phys_cf + SZ_4K; |
| 168 | io->stop = io->start + SZ_2K - 1; |
| 169 | return 0; |
| 170 | } |
| 171 | |
| 172 | static int |
| 173 | omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map) |
| 174 | { |
| 175 | struct omap_cf_socket *cf; |
| 176 | |
| 177 | if (map->card_start) |
| 178 | return -EINVAL; |
| 179 | cf = container_of(s, struct omap_cf_socket, socket); |
| 180 | map->static_start = cf->phys_cf; |
| 181 | map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT; |
| 182 | if (map->flags & MAP_ATTRIB) |
| 183 | map->static_start += SZ_2K; |
| 184 | return 0; |
| 185 | } |
| 186 | |
| 187 | static struct pccard_operations omap_cf_ops = { |
| 188 | .init = omap_cf_ss_init, |
| 189 | .suspend = omap_cf_ss_suspend, |
| 190 | .get_status = omap_cf_get_status, |
| 191 | .set_socket = omap_cf_set_socket, |
| 192 | .set_io_map = omap_cf_set_io_map, |
| 193 | .set_mem_map = omap_cf_set_mem_map, |
| 194 | }; |
| 195 | |
| 196 | /*--------------------------------------------------------------------------*/ |
| 197 | |
| 198 | /* |
| 199 | * NOTE: right now the only board-specific platform_data is |
| 200 | * "what chipselect is used". Boards could want more. |
| 201 | */ |
| 202 | |
| 203 | static int __init omap_cf_probe(struct platform_device *pdev) |
| 204 | { |
| 205 | unsigned seg; |
| 206 | struct omap_cf_socket *cf; |
| 207 | int irq; |
| 208 | int status; |
| 209 | |
| 210 | seg = (int) pdev->dev.platform_data; |
| 211 | if (seg == 0 || seg > 3) |
| 212 | return -ENODEV; |
| 213 | |
| 214 | /* either CFLASH.IREQ (INT_1610_CF) or some GPIO */ |
| 215 | irq = platform_get_irq(pdev, 0); |
| 216 | if (irq < 0) |
| 217 | return -EINVAL; |
| 218 | |
| 219 | cf = kzalloc(sizeof *cf, GFP_KERNEL); |
| 220 | if (!cf) |
| 221 | return -ENOMEM; |
| 222 | init_timer(&cf->timer); |
| 223 | cf->timer.function = omap_cf_timer; |
| 224 | cf->timer.data = (unsigned long) cf; |
| 225 | |
| 226 | cf->pdev = pdev; |
| 227 | platform_set_drvdata(pdev, cf); |
| 228 | |
| 229 | /* this primarily just shuts up irq handling noise */ |
| 230 | status = request_irq(irq, omap_cf_irq, IRQF_SHARED, |
| 231 | driver_name, cf); |
| 232 | if (status < 0) |
| 233 | goto fail0; |
| 234 | cf->irq = irq; |
| 235 | cf->socket.pci_irq = irq; |
| 236 | |
| 237 | switch (seg) { |
| 238 | /* NOTE: CS0 could be configured too ... */ |
| 239 | case 1: |
| 240 | cf->phys_cf = OMAP_CS1_PHYS; |
| 241 | break; |
| 242 | case 2: |
| 243 | cf->phys_cf = OMAP_CS2_PHYS; |
| 244 | break; |
| 245 | case 3: |
| 246 | cf->phys_cf = omap_cs3_phys(); |
| 247 | break; |
| 248 | default: |
| 249 | goto fail1; |
| 250 | } |
| 251 | cf->iomem.start = cf->phys_cf; |
| 252 | cf->iomem.end = cf->iomem.end + SZ_8K - 1; |
| 253 | cf->iomem.flags = IORESOURCE_MEM; |
| 254 | |
| 255 | /* pcmcia layer only remaps "real" memory */ |
| 256 | cf->socket.io_offset = (unsigned long) |
| 257 | ioremap(cf->phys_cf + SZ_4K, SZ_2K); |
| 258 | if (!cf->socket.io_offset) |
| 259 | goto fail1; |
| 260 | |
| 261 | if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) |
| 262 | goto fail1; |
| 263 | |
| 264 | /* NOTE: CF conflicts with MMC1 */ |
| 265 | omap_cfg_reg(W11_1610_CF_CD1); |
| 266 | omap_cfg_reg(P11_1610_CF_CD2); |
| 267 | omap_cfg_reg(R11_1610_CF_IOIS16); |
| 268 | omap_cfg_reg(V10_1610_CF_IREQ); |
| 269 | omap_cfg_reg(W10_1610_CF_RESET); |
| 270 | |
| 271 | omap_writew(~(1 << seg), CF_CFG); |
| 272 | |
| 273 | pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); |
| 274 | |
| 275 | /* NOTE: better EMIFS setup might support more cards; but the |
| 276 | * TRM only shows how to affect regular flash signals, not their |
| 277 | * CF/PCMCIA variants... |
| 278 | */ |
| 279 | pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, |
| 280 | seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); |
| 281 | omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ |
| 282 | omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ |
| 283 | |
| 284 | /* CF uses armxor_ck, which is "always" available */ |
| 285 | |
| 286 | pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, |
| 287 | omap_readw(CF_STATUS), omap_readw(CF_CFG), |
| 288 | omap_readw(CF_CONTROL), |
| 289 | omap_cf_present() ? "present" : "(not present)"); |
| 290 | |
| 291 | cf->socket.owner = THIS_MODULE; |
| 292 | cf->socket.dev.parent = &pdev->dev; |
| 293 | cf->socket.ops = &omap_cf_ops; |
| 294 | cf->socket.resource_ops = &pccard_static_ops; |
| 295 | cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP |
| 296 | | SS_CAP_MEM_ALIGN; |
| 297 | cf->socket.map_size = SZ_2K; |
| 298 | cf->socket.io[0].res = &cf->iomem; |
| 299 | |
| 300 | status = pcmcia_register_socket(&cf->socket); |
| 301 | if (status < 0) |
| 302 | goto fail2; |
| 303 | |
| 304 | cf->active = 1; |
| 305 | mod_timer(&cf->timer, jiffies + POLL_INTERVAL); |
| 306 | return 0; |
| 307 | |
| 308 | fail2: |
| 309 | release_mem_region(cf->phys_cf, SZ_8K); |
| 310 | fail1: |
| 311 | if (cf->socket.io_offset) |
| 312 | iounmap((void __iomem *) cf->socket.io_offset); |
| 313 | free_irq(irq, cf); |
| 314 | fail0: |
| 315 | kfree(cf); |
| 316 | return status; |
| 317 | } |
| 318 | |
| 319 | static int __exit omap_cf_remove(struct platform_device *pdev) |
| 320 | { |
| 321 | struct omap_cf_socket *cf = platform_get_drvdata(pdev); |
| 322 | |
| 323 | cf->active = 0; |
| 324 | pcmcia_unregister_socket(&cf->socket); |
| 325 | del_timer_sync(&cf->timer); |
| 326 | iounmap((void __iomem *) cf->socket.io_offset); |
| 327 | release_mem_region(cf->phys_cf, SZ_8K); |
| 328 | free_irq(cf->irq, cf); |
| 329 | kfree(cf); |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | static struct platform_driver omap_cf_driver = { |
| 334 | .driver = { |
| 335 | .name = (char *) driver_name, |
| 336 | .owner = THIS_MODULE, |
| 337 | }, |
| 338 | .remove = __exit_p(omap_cf_remove), |
| 339 | }; |
| 340 | |
| 341 | static int __init omap_cf_init(void) |
| 342 | { |
| 343 | if (cpu_is_omap16xx()) |
| 344 | return platform_driver_probe(&omap_cf_driver, omap_cf_probe); |
| 345 | return -ENODEV; |
| 346 | } |
| 347 | |
| 348 | static void __exit omap_cf_exit(void) |
| 349 | { |
| 350 | if (cpu_is_omap16xx()) |
| 351 | platform_driver_unregister(&omap_cf_driver); |
| 352 | } |
| 353 | |
| 354 | module_init(omap_cf_init); |
| 355 | module_exit(omap_cf_exit); |
| 356 | |
| 357 | MODULE_DESCRIPTION("OMAP CF Driver"); |
| 358 | MODULE_LICENSE("GPL"); |
| 359 | MODULE_ALIAS("platform:omap_cf"); |