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nvme: split out a nvme_identify_ns_nvm helper
[linux-2.6-block.git] / drivers / nvme / host / core.c
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7#include <linux/blkdev.h>
8#include <linux/blk-mq.h>
9#include <linux/blk-integrity.h>
10#include <linux/compat.h>
11#include <linux/delay.h>
12#include <linux/errno.h>
13#include <linux/hdreg.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/backing-dev.h>
17#include <linux/slab.h>
18#include <linux/types.h>
19#include <linux/pr.h>
20#include <linux/ptrace.h>
21#include <linux/nvme_ioctl.h>
22#include <linux/pm_qos.h>
23#include <linux/ratelimit.h>
24#include <asm/unaligned.h>
25
26#include "nvme.h"
27#include "fabrics.h"
28#include <linux/nvme-auth.h>
29
30#define CREATE_TRACE_POINTS
31#include "trace.h"
32
33#define NVME_MINORS (1U << MINORBITS)
34
35struct nvme_ns_info {
36 struct nvme_ns_ids ids;
37 u32 nsid;
38 __le32 anagrpid;
39 bool is_shared;
40 bool is_readonly;
41 bool is_ready;
42 bool is_removed;
43};
44
45unsigned int admin_timeout = 60;
46module_param(admin_timeout, uint, 0644);
47MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
48EXPORT_SYMBOL_GPL(admin_timeout);
49
50unsigned int nvme_io_timeout = 30;
51module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
52MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
53EXPORT_SYMBOL_GPL(nvme_io_timeout);
54
55static unsigned char shutdown_timeout = 5;
56module_param(shutdown_timeout, byte, 0644);
57MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
58
59static u8 nvme_max_retries = 5;
60module_param_named(max_retries, nvme_max_retries, byte, 0644);
61MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
62
63static unsigned long default_ps_max_latency_us = 100000;
64module_param(default_ps_max_latency_us, ulong, 0644);
65MODULE_PARM_DESC(default_ps_max_latency_us,
66 "max power saving latency for new devices; use PM QOS to change per device");
67
68static bool force_apst;
69module_param(force_apst, bool, 0644);
70MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
71
72static unsigned long apst_primary_timeout_ms = 100;
73module_param(apst_primary_timeout_ms, ulong, 0644);
74MODULE_PARM_DESC(apst_primary_timeout_ms,
75 "primary APST timeout in ms");
76
77static unsigned long apst_secondary_timeout_ms = 2000;
78module_param(apst_secondary_timeout_ms, ulong, 0644);
79MODULE_PARM_DESC(apst_secondary_timeout_ms,
80 "secondary APST timeout in ms");
81
82static unsigned long apst_primary_latency_tol_us = 15000;
83module_param(apst_primary_latency_tol_us, ulong, 0644);
84MODULE_PARM_DESC(apst_primary_latency_tol_us,
85 "primary APST latency tolerance in us");
86
87static unsigned long apst_secondary_latency_tol_us = 100000;
88module_param(apst_secondary_latency_tol_us, ulong, 0644);
89MODULE_PARM_DESC(apst_secondary_latency_tol_us,
90 "secondary APST latency tolerance in us");
91
92/*
93 * nvme_wq - hosts nvme related works that are not reset or delete
94 * nvme_reset_wq - hosts nvme reset works
95 * nvme_delete_wq - hosts nvme delete works
96 *
97 * nvme_wq will host works such as scan, aen handling, fw activation,
98 * keep-alive, periodic reconnects etc. nvme_reset_wq
99 * runs reset works which also flush works hosted on nvme_wq for
100 * serialization purposes. nvme_delete_wq host controller deletion
101 * works which flush reset works for serialization.
102 */
103struct workqueue_struct *nvme_wq;
104EXPORT_SYMBOL_GPL(nvme_wq);
105
106struct workqueue_struct *nvme_reset_wq;
107EXPORT_SYMBOL_GPL(nvme_reset_wq);
108
109struct workqueue_struct *nvme_delete_wq;
110EXPORT_SYMBOL_GPL(nvme_delete_wq);
111
112static LIST_HEAD(nvme_subsystems);
113static DEFINE_MUTEX(nvme_subsystems_lock);
114
115static DEFINE_IDA(nvme_instance_ida);
116static dev_t nvme_ctrl_base_chr_devt;
117static struct class *nvme_class;
118static struct class *nvme_subsys_class;
119
120static DEFINE_IDA(nvme_ns_chr_minor_ida);
121static dev_t nvme_ns_chr_devt;
122static struct class *nvme_ns_chr_class;
123
124static void nvme_put_subsystem(struct nvme_subsystem *subsys);
125static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
126 unsigned nsid);
127static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
128 struct nvme_command *cmd);
129
130void nvme_queue_scan(struct nvme_ctrl *ctrl)
131{
132 /*
133 * Only new queue scan work when admin and IO queues are both alive
134 */
135 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
136 queue_work(nvme_wq, &ctrl->scan_work);
137}
138
139/*
140 * Use this function to proceed with scheduling reset_work for a controller
141 * that had previously been set to the resetting state. This is intended for
142 * code paths that can't be interrupted by other reset attempts. A hot removal
143 * may prevent this from succeeding.
144 */
145int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
146{
147 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
148 return -EBUSY;
149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
150 return -EBUSY;
151 return 0;
152}
153EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
154
155static void nvme_failfast_work(struct work_struct *work)
156{
157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
158 struct nvme_ctrl, failfast_work);
159
160 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
161 return;
162
163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
164 dev_info(ctrl->device, "failfast expired\n");
165 nvme_kick_requeue_lists(ctrl);
166}
167
168static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
169{
170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
171 return;
172
173 schedule_delayed_work(&ctrl->failfast_work,
174 ctrl->opts->fast_io_fail_tmo * HZ);
175}
176
177static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
178{
179 if (!ctrl->opts)
180 return;
181
182 cancel_delayed_work_sync(&ctrl->failfast_work);
183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
184}
185
186
187int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
188{
189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
190 return -EBUSY;
191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
192 return -EBUSY;
193 return 0;
194}
195EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
196
197int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
198{
199 int ret;
200
201 ret = nvme_reset_ctrl(ctrl);
202 if (!ret) {
203 flush_work(&ctrl->reset_work);
204 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
205 ret = -ENETRESET;
206 }
207
208 return ret;
209}
210
211static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
212{
213 dev_info(ctrl->device,
214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
215
216 flush_work(&ctrl->reset_work);
217 nvme_stop_ctrl(ctrl);
218 nvme_remove_namespaces(ctrl);
219 ctrl->ops->delete_ctrl(ctrl);
220 nvme_uninit_ctrl(ctrl);
221}
222
223static void nvme_delete_ctrl_work(struct work_struct *work)
224{
225 struct nvme_ctrl *ctrl =
226 container_of(work, struct nvme_ctrl, delete_work);
227
228 nvme_do_delete_ctrl(ctrl);
229}
230
231int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
232{
233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
234 return -EBUSY;
235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
236 return -EBUSY;
237 return 0;
238}
239EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
240
241void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
242{
243 /*
244 * Keep a reference until nvme_do_delete_ctrl() complete,
245 * since ->delete_ctrl can free the controller.
246 */
247 nvme_get_ctrl(ctrl);
248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
249 nvme_do_delete_ctrl(ctrl);
250 nvme_put_ctrl(ctrl);
251}
252
253static blk_status_t nvme_error_status(u16 status)
254{
255 switch (status & 0x7ff) {
256 case NVME_SC_SUCCESS:
257 return BLK_STS_OK;
258 case NVME_SC_CAP_EXCEEDED:
259 return BLK_STS_NOSPC;
260 case NVME_SC_LBA_RANGE:
261 case NVME_SC_CMD_INTERRUPTED:
262 case NVME_SC_NS_NOT_READY:
263 return BLK_STS_TARGET;
264 case NVME_SC_BAD_ATTRIBUTES:
265 case NVME_SC_ONCS_NOT_SUPPORTED:
266 case NVME_SC_INVALID_OPCODE:
267 case NVME_SC_INVALID_FIELD:
268 case NVME_SC_INVALID_NS:
269 return BLK_STS_NOTSUPP;
270 case NVME_SC_WRITE_FAULT:
271 case NVME_SC_READ_ERROR:
272 case NVME_SC_UNWRITTEN_BLOCK:
273 case NVME_SC_ACCESS_DENIED:
274 case NVME_SC_READ_ONLY:
275 case NVME_SC_COMPARE_FAILED:
276 return BLK_STS_MEDIUM;
277 case NVME_SC_GUARD_CHECK:
278 case NVME_SC_APPTAG_CHECK:
279 case NVME_SC_REFTAG_CHECK:
280 case NVME_SC_INVALID_PI:
281 return BLK_STS_PROTECTION;
282 case NVME_SC_RESERVATION_CONFLICT:
283 return BLK_STS_RESV_CONFLICT;
284 case NVME_SC_HOST_PATH_ERROR:
285 return BLK_STS_TRANSPORT;
286 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
287 return BLK_STS_ZONE_ACTIVE_RESOURCE;
288 case NVME_SC_ZONE_TOO_MANY_OPEN:
289 return BLK_STS_ZONE_OPEN_RESOURCE;
290 default:
291 return BLK_STS_IOERR;
292 }
293}
294
295static void nvme_retry_req(struct request *req)
296{
297 unsigned long delay = 0;
298 u16 crd;
299
300 /* The mask and shift result must be <= 3 */
301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
302 if (crd)
303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
304
305 nvme_req(req)->retries++;
306 blk_mq_requeue_request(req, false);
307 blk_mq_delay_kick_requeue_list(req->q, delay);
308}
309
310static void nvme_log_error(struct request *req)
311{
312 struct nvme_ns *ns = req->q->queuedata;
313 struct nvme_request *nr = nvme_req(req);
314
315 if (ns) {
316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
317 ns->disk ? ns->disk->disk_name : "?",
318 nvme_get_opcode_str(nr->cmd->common.opcode),
319 nr->cmd->common.opcode,
320 nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
321 blk_rq_bytes(req) >> ns->head->lba_shift,
322 nvme_get_error_status_str(nr->status),
323 nr->status >> 8 & 7, /* Status Code Type */
324 nr->status & 0xff, /* Status Code */
325 nr->status & NVME_SC_MORE ? "MORE " : "",
326 nr->status & NVME_SC_DNR ? "DNR " : "");
327 return;
328 }
329
330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
331 dev_name(nr->ctrl->device),
332 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
333 nr->cmd->common.opcode,
334 nvme_get_error_status_str(nr->status),
335 nr->status >> 8 & 7, /* Status Code Type */
336 nr->status & 0xff, /* Status Code */
337 nr->status & NVME_SC_MORE ? "MORE " : "",
338 nr->status & NVME_SC_DNR ? "DNR " : "");
339}
340
341static void nvme_log_err_passthru(struct request *req)
342{
343 struct nvme_ns *ns = req->q->queuedata;
344 struct nvme_request *nr = nvme_req(req);
345
346 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
347 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
348 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
349 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
350 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
351 nr->cmd->common.opcode,
352 nvme_get_error_status_str(nr->status),
353 nr->status >> 8 & 7, /* Status Code Type */
354 nr->status & 0xff, /* Status Code */
355 nr->status & NVME_SC_MORE ? "MORE " : "",
356 nr->status & NVME_SC_DNR ? "DNR " : "",
357 nr->cmd->common.cdw10,
358 nr->cmd->common.cdw11,
359 nr->cmd->common.cdw12,
360 nr->cmd->common.cdw13,
361 nr->cmd->common.cdw14,
362 nr->cmd->common.cdw14);
363}
364
365enum nvme_disposition {
366 COMPLETE,
367 RETRY,
368 FAILOVER,
369 AUTHENTICATE,
370};
371
372static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
373{
374 if (likely(nvme_req(req)->status == 0))
375 return COMPLETE;
376
377 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
378 return AUTHENTICATE;
379
380 if (blk_noretry_request(req) ||
381 (nvme_req(req)->status & NVME_SC_DNR) ||
382 nvme_req(req)->retries >= nvme_max_retries)
383 return COMPLETE;
384
385 if (req->cmd_flags & REQ_NVME_MPATH) {
386 if (nvme_is_path_error(nvme_req(req)->status) ||
387 blk_queue_dying(req->q))
388 return FAILOVER;
389 } else {
390 if (blk_queue_dying(req->q))
391 return COMPLETE;
392 }
393
394 return RETRY;
395}
396
397static inline void nvme_end_req_zoned(struct request *req)
398{
399 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
400 req_op(req) == REQ_OP_ZONE_APPEND) {
401 struct nvme_ns *ns = req->q->queuedata;
402
403 req->__sector = nvme_lba_to_sect(ns->head,
404 le64_to_cpu(nvme_req(req)->result.u64));
405 }
406}
407
408static inline void nvme_end_req(struct request *req)
409{
410 blk_status_t status = nvme_error_status(nvme_req(req)->status);
411
412 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
413 if (blk_rq_is_passthrough(req))
414 nvme_log_err_passthru(req);
415 else
416 nvme_log_error(req);
417 }
418 nvme_end_req_zoned(req);
419 nvme_trace_bio_complete(req);
420 if (req->cmd_flags & REQ_NVME_MPATH)
421 nvme_mpath_end_request(req);
422 blk_mq_end_request(req, status);
423}
424
425void nvme_complete_rq(struct request *req)
426{
427 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
428
429 trace_nvme_complete_rq(req);
430 nvme_cleanup_cmd(req);
431
432 /*
433 * Completions of long-running commands should not be able to
434 * defer sending of periodic keep alives, since the controller
435 * may have completed processing such commands a long time ago
436 * (arbitrarily close to command submission time).
437 * req->deadline - req->timeout is the command submission time
438 * in jiffies.
439 */
440 if (ctrl->kas &&
441 req->deadline - req->timeout >= ctrl->ka_last_check_time)
442 ctrl->comp_seen = true;
443
444 switch (nvme_decide_disposition(req)) {
445 case COMPLETE:
446 nvme_end_req(req);
447 return;
448 case RETRY:
449 nvme_retry_req(req);
450 return;
451 case FAILOVER:
452 nvme_failover_req(req);
453 return;
454 case AUTHENTICATE:
455#ifdef CONFIG_NVME_HOST_AUTH
456 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
457 nvme_retry_req(req);
458#else
459 nvme_end_req(req);
460#endif
461 return;
462 }
463}
464EXPORT_SYMBOL_GPL(nvme_complete_rq);
465
466void nvme_complete_batch_req(struct request *req)
467{
468 trace_nvme_complete_rq(req);
469 nvme_cleanup_cmd(req);
470 nvme_end_req_zoned(req);
471}
472EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
473
474/*
475 * Called to unwind from ->queue_rq on a failed command submission so that the
476 * multipathing code gets called to potentially failover to another path.
477 * The caller needs to unwind all transport specific resource allocations and
478 * must return propagate the return value.
479 */
480blk_status_t nvme_host_path_error(struct request *req)
481{
482 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
483 blk_mq_set_request_complete(req);
484 nvme_complete_rq(req);
485 return BLK_STS_OK;
486}
487EXPORT_SYMBOL_GPL(nvme_host_path_error);
488
489bool nvme_cancel_request(struct request *req, void *data)
490{
491 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
492 "Cancelling I/O %d", req->tag);
493
494 /* don't abort one completed or idle request */
495 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
496 return true;
497
498 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
499 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
500 blk_mq_complete_request(req);
501 return true;
502}
503EXPORT_SYMBOL_GPL(nvme_cancel_request);
504
505void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
506{
507 if (ctrl->tagset) {
508 blk_mq_tagset_busy_iter(ctrl->tagset,
509 nvme_cancel_request, ctrl);
510 blk_mq_tagset_wait_completed_request(ctrl->tagset);
511 }
512}
513EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
514
515void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
516{
517 if (ctrl->admin_tagset) {
518 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
519 nvme_cancel_request, ctrl);
520 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
521 }
522}
523EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
524
525bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
526 enum nvme_ctrl_state new_state)
527{
528 enum nvme_ctrl_state old_state;
529 unsigned long flags;
530 bool changed = false;
531
532 spin_lock_irqsave(&ctrl->lock, flags);
533
534 old_state = nvme_ctrl_state(ctrl);
535 switch (new_state) {
536 case NVME_CTRL_LIVE:
537 switch (old_state) {
538 case NVME_CTRL_NEW:
539 case NVME_CTRL_RESETTING:
540 case NVME_CTRL_CONNECTING:
541 changed = true;
542 fallthrough;
543 default:
544 break;
545 }
546 break;
547 case NVME_CTRL_RESETTING:
548 switch (old_state) {
549 case NVME_CTRL_NEW:
550 case NVME_CTRL_LIVE:
551 changed = true;
552 fallthrough;
553 default:
554 break;
555 }
556 break;
557 case NVME_CTRL_CONNECTING:
558 switch (old_state) {
559 case NVME_CTRL_NEW:
560 case NVME_CTRL_RESETTING:
561 changed = true;
562 fallthrough;
563 default:
564 break;
565 }
566 break;
567 case NVME_CTRL_DELETING:
568 switch (old_state) {
569 case NVME_CTRL_LIVE:
570 case NVME_CTRL_RESETTING:
571 case NVME_CTRL_CONNECTING:
572 changed = true;
573 fallthrough;
574 default:
575 break;
576 }
577 break;
578 case NVME_CTRL_DELETING_NOIO:
579 switch (old_state) {
580 case NVME_CTRL_DELETING:
581 case NVME_CTRL_DEAD:
582 changed = true;
583 fallthrough;
584 default:
585 break;
586 }
587 break;
588 case NVME_CTRL_DEAD:
589 switch (old_state) {
590 case NVME_CTRL_DELETING:
591 changed = true;
592 fallthrough;
593 default:
594 break;
595 }
596 break;
597 default:
598 break;
599 }
600
601 if (changed) {
602 WRITE_ONCE(ctrl->state, new_state);
603 wake_up_all(&ctrl->state_wq);
604 }
605
606 spin_unlock_irqrestore(&ctrl->lock, flags);
607 if (!changed)
608 return false;
609
610 if (new_state == NVME_CTRL_LIVE) {
611 if (old_state == NVME_CTRL_CONNECTING)
612 nvme_stop_failfast_work(ctrl);
613 nvme_kick_requeue_lists(ctrl);
614 } else if (new_state == NVME_CTRL_CONNECTING &&
615 old_state == NVME_CTRL_RESETTING) {
616 nvme_start_failfast_work(ctrl);
617 }
618 return changed;
619}
620EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
621
622/*
623 * Returns true for sink states that can't ever transition back to live.
624 */
625static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
626{
627 switch (nvme_ctrl_state(ctrl)) {
628 case NVME_CTRL_NEW:
629 case NVME_CTRL_LIVE:
630 case NVME_CTRL_RESETTING:
631 case NVME_CTRL_CONNECTING:
632 return false;
633 case NVME_CTRL_DELETING:
634 case NVME_CTRL_DELETING_NOIO:
635 case NVME_CTRL_DEAD:
636 return true;
637 default:
638 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
639 return true;
640 }
641}
642
643/*
644 * Waits for the controller state to be resetting, or returns false if it is
645 * not possible to ever transition to that state.
646 */
647bool nvme_wait_reset(struct nvme_ctrl *ctrl)
648{
649 wait_event(ctrl->state_wq,
650 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
651 nvme_state_terminal(ctrl));
652 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
653}
654EXPORT_SYMBOL_GPL(nvme_wait_reset);
655
656static void nvme_free_ns_head(struct kref *ref)
657{
658 struct nvme_ns_head *head =
659 container_of(ref, struct nvme_ns_head, ref);
660
661 nvme_mpath_remove_disk(head);
662 ida_free(&head->subsys->ns_ida, head->instance);
663 cleanup_srcu_struct(&head->srcu);
664 nvme_put_subsystem(head->subsys);
665 kfree(head);
666}
667
668bool nvme_tryget_ns_head(struct nvme_ns_head *head)
669{
670 return kref_get_unless_zero(&head->ref);
671}
672
673void nvme_put_ns_head(struct nvme_ns_head *head)
674{
675 kref_put(&head->ref, nvme_free_ns_head);
676}
677
678static void nvme_free_ns(struct kref *kref)
679{
680 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
681
682 put_disk(ns->disk);
683 nvme_put_ns_head(ns->head);
684 nvme_put_ctrl(ns->ctrl);
685 kfree(ns);
686}
687
688static inline bool nvme_get_ns(struct nvme_ns *ns)
689{
690 return kref_get_unless_zero(&ns->kref);
691}
692
693void nvme_put_ns(struct nvme_ns *ns)
694{
695 kref_put(&ns->kref, nvme_free_ns);
696}
697EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
698
699static inline void nvme_clear_nvme_request(struct request *req)
700{
701 nvme_req(req)->status = 0;
702 nvme_req(req)->retries = 0;
703 nvme_req(req)->flags = 0;
704 req->rq_flags |= RQF_DONTPREP;
705}
706
707/* initialize a passthrough request */
708void nvme_init_request(struct request *req, struct nvme_command *cmd)
709{
710 struct nvme_request *nr = nvme_req(req);
711 bool logging_enabled;
712
713 if (req->q->queuedata) {
714 struct nvme_ns *ns = req->q->disk->private_data;
715
716 logging_enabled = ns->passthru_err_log_enabled;
717 req->timeout = NVME_IO_TIMEOUT;
718 } else { /* no queuedata implies admin queue */
719 logging_enabled = nr->ctrl->passthru_err_log_enabled;
720 req->timeout = NVME_ADMIN_TIMEOUT;
721 }
722
723 if (!logging_enabled)
724 req->rq_flags |= RQF_QUIET;
725
726 /* passthru commands should let the driver set the SGL flags */
727 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
728
729 req->cmd_flags |= REQ_FAILFAST_DRIVER;
730 if (req->mq_hctx->type == HCTX_TYPE_POLL)
731 req->cmd_flags |= REQ_POLLED;
732 nvme_clear_nvme_request(req);
733 memcpy(nr->cmd, cmd, sizeof(*cmd));
734}
735EXPORT_SYMBOL_GPL(nvme_init_request);
736
737/*
738 * For something we're not in a state to send to the device the default action
739 * is to busy it and retry it after the controller state is recovered. However,
740 * if the controller is deleting or if anything is marked for failfast or
741 * nvme multipath it is immediately failed.
742 *
743 * Note: commands used to initialize the controller will be marked for failfast.
744 * Note: nvme cli/ioctl commands are marked for failfast.
745 */
746blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
747 struct request *rq)
748{
749 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
750
751 if (state != NVME_CTRL_DELETING_NOIO &&
752 state != NVME_CTRL_DELETING &&
753 state != NVME_CTRL_DEAD &&
754 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
755 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
756 return BLK_STS_RESOURCE;
757 return nvme_host_path_error(rq);
758}
759EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
760
761bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
762 bool queue_live, enum nvme_ctrl_state state)
763{
764 struct nvme_request *req = nvme_req(rq);
765
766 /*
767 * currently we have a problem sending passthru commands
768 * on the admin_q if the controller is not LIVE because we can't
769 * make sure that they are going out after the admin connect,
770 * controller enable and/or other commands in the initialization
771 * sequence. until the controller will be LIVE, fail with
772 * BLK_STS_RESOURCE so that they will be rescheduled.
773 */
774 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
775 return false;
776
777 if (ctrl->ops->flags & NVME_F_FABRICS) {
778 /*
779 * Only allow commands on a live queue, except for the connect
780 * command, which is require to set the queue live in the
781 * appropinquate states.
782 */
783 switch (state) {
784 case NVME_CTRL_CONNECTING:
785 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
786 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
787 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
788 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
789 return true;
790 break;
791 default:
792 break;
793 case NVME_CTRL_DEAD:
794 return false;
795 }
796 }
797
798 return queue_live;
799}
800EXPORT_SYMBOL_GPL(__nvme_check_ready);
801
802static inline void nvme_setup_flush(struct nvme_ns *ns,
803 struct nvme_command *cmnd)
804{
805 memset(cmnd, 0, sizeof(*cmnd));
806 cmnd->common.opcode = nvme_cmd_flush;
807 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
808}
809
810static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
811 struct nvme_command *cmnd)
812{
813 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
814 struct nvme_dsm_range *range;
815 struct bio *bio;
816
817 /*
818 * Some devices do not consider the DSM 'Number of Ranges' field when
819 * determining how much data to DMA. Always allocate memory for maximum
820 * number of segments to prevent device reading beyond end of buffer.
821 */
822 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
823
824 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
825 if (!range) {
826 /*
827 * If we fail allocation our range, fallback to the controller
828 * discard page. If that's also busy, it's safe to return
829 * busy, as we know we can make progress once that's freed.
830 */
831 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
832 return BLK_STS_RESOURCE;
833
834 range = page_address(ns->ctrl->discard_page);
835 }
836
837 if (queue_max_discard_segments(req->q) == 1) {
838 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
839 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
840
841 range[0].cattr = cpu_to_le32(0);
842 range[0].nlb = cpu_to_le32(nlb);
843 range[0].slba = cpu_to_le64(slba);
844 n = 1;
845 } else {
846 __rq_for_each_bio(bio, req) {
847 u64 slba = nvme_sect_to_lba(ns->head,
848 bio->bi_iter.bi_sector);
849 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
850
851 if (n < segments) {
852 range[n].cattr = cpu_to_le32(0);
853 range[n].nlb = cpu_to_le32(nlb);
854 range[n].slba = cpu_to_le64(slba);
855 }
856 n++;
857 }
858 }
859
860 if (WARN_ON_ONCE(n != segments)) {
861 if (virt_to_page(range) == ns->ctrl->discard_page)
862 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
863 else
864 kfree(range);
865 return BLK_STS_IOERR;
866 }
867
868 memset(cmnd, 0, sizeof(*cmnd));
869 cmnd->dsm.opcode = nvme_cmd_dsm;
870 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
871 cmnd->dsm.nr = cpu_to_le32(segments - 1);
872 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
873
874 bvec_set_virt(&req->special_vec, range, alloc_size);
875 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
876
877 return BLK_STS_OK;
878}
879
880static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
881 struct request *req)
882{
883 u32 upper, lower;
884 u64 ref48;
885
886 /* both rw and write zeroes share the same reftag format */
887 switch (ns->head->guard_type) {
888 case NVME_NVM_NS_16B_GUARD:
889 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
890 break;
891 case NVME_NVM_NS_64B_GUARD:
892 ref48 = ext_pi_ref_tag(req);
893 lower = lower_32_bits(ref48);
894 upper = upper_32_bits(ref48);
895
896 cmnd->rw.reftag = cpu_to_le32(lower);
897 cmnd->rw.cdw3 = cpu_to_le32(upper);
898 break;
899 default:
900 break;
901 }
902}
903
904static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
905 struct request *req, struct nvme_command *cmnd)
906{
907 memset(cmnd, 0, sizeof(*cmnd));
908
909 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
910 return nvme_setup_discard(ns, req, cmnd);
911
912 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
913 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
914 cmnd->write_zeroes.slba =
915 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
916 cmnd->write_zeroes.length =
917 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
918
919 if (!(req->cmd_flags & REQ_NOUNMAP) &&
920 (ns->head->features & NVME_NS_DEAC))
921 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
922
923 if (nvme_ns_has_pi(ns->head)) {
924 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
925
926 switch (ns->head->pi_type) {
927 case NVME_NS_DPS_PI_TYPE1:
928 case NVME_NS_DPS_PI_TYPE2:
929 nvme_set_ref_tag(ns, cmnd, req);
930 break;
931 }
932 }
933
934 return BLK_STS_OK;
935}
936
937static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
938 struct request *req, struct nvme_command *cmnd,
939 enum nvme_opcode op)
940{
941 u16 control = 0;
942 u32 dsmgmt = 0;
943
944 if (req->cmd_flags & REQ_FUA)
945 control |= NVME_RW_FUA;
946 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
947 control |= NVME_RW_LR;
948
949 if (req->cmd_flags & REQ_RAHEAD)
950 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
951
952 cmnd->rw.opcode = op;
953 cmnd->rw.flags = 0;
954 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
955 cmnd->rw.cdw2 = 0;
956 cmnd->rw.cdw3 = 0;
957 cmnd->rw.metadata = 0;
958 cmnd->rw.slba =
959 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
960 cmnd->rw.length =
961 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
962 cmnd->rw.reftag = 0;
963 cmnd->rw.apptag = 0;
964 cmnd->rw.appmask = 0;
965
966 if (ns->head->ms) {
967 /*
968 * If formated with metadata, the block layer always provides a
969 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
970 * we enable the PRACT bit for protection information or set the
971 * namespace capacity to zero to prevent any I/O.
972 */
973 if (!blk_integrity_rq(req)) {
974 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
975 return BLK_STS_NOTSUPP;
976 control |= NVME_RW_PRINFO_PRACT;
977 }
978
979 switch (ns->head->pi_type) {
980 case NVME_NS_DPS_PI_TYPE3:
981 control |= NVME_RW_PRINFO_PRCHK_GUARD;
982 break;
983 case NVME_NS_DPS_PI_TYPE1:
984 case NVME_NS_DPS_PI_TYPE2:
985 control |= NVME_RW_PRINFO_PRCHK_GUARD |
986 NVME_RW_PRINFO_PRCHK_REF;
987 if (op == nvme_cmd_zone_append)
988 control |= NVME_RW_APPEND_PIREMAP;
989 nvme_set_ref_tag(ns, cmnd, req);
990 break;
991 }
992 }
993
994 cmnd->rw.control = cpu_to_le16(control);
995 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
996 return 0;
997}
998
999void nvme_cleanup_cmd(struct request *req)
1000{
1001 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1002 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1003
1004 if (req->special_vec.bv_page == ctrl->discard_page)
1005 clear_bit_unlock(0, &ctrl->discard_page_busy);
1006 else
1007 kfree(bvec_virt(&req->special_vec));
1008 }
1009}
1010EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1011
1012blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1013{
1014 struct nvme_command *cmd = nvme_req(req)->cmd;
1015 blk_status_t ret = BLK_STS_OK;
1016
1017 if (!(req->rq_flags & RQF_DONTPREP))
1018 nvme_clear_nvme_request(req);
1019
1020 switch (req_op(req)) {
1021 case REQ_OP_DRV_IN:
1022 case REQ_OP_DRV_OUT:
1023 /* these are setup prior to execution in nvme_init_request() */
1024 break;
1025 case REQ_OP_FLUSH:
1026 nvme_setup_flush(ns, cmd);
1027 break;
1028 case REQ_OP_ZONE_RESET_ALL:
1029 case REQ_OP_ZONE_RESET:
1030 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1031 break;
1032 case REQ_OP_ZONE_OPEN:
1033 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1034 break;
1035 case REQ_OP_ZONE_CLOSE:
1036 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1037 break;
1038 case REQ_OP_ZONE_FINISH:
1039 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1040 break;
1041 case REQ_OP_WRITE_ZEROES:
1042 ret = nvme_setup_write_zeroes(ns, req, cmd);
1043 break;
1044 case REQ_OP_DISCARD:
1045 ret = nvme_setup_discard(ns, req, cmd);
1046 break;
1047 case REQ_OP_READ:
1048 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1049 break;
1050 case REQ_OP_WRITE:
1051 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1052 break;
1053 case REQ_OP_ZONE_APPEND:
1054 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1055 break;
1056 default:
1057 WARN_ON_ONCE(1);
1058 return BLK_STS_IOERR;
1059 }
1060
1061 cmd->common.command_id = nvme_cid(req);
1062 trace_nvme_setup_cmd(req, cmd);
1063 return ret;
1064}
1065EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1066
1067/*
1068 * Return values:
1069 * 0: success
1070 * >0: nvme controller's cqe status response
1071 * <0: kernel error in lieu of controller response
1072 */
1073int nvme_execute_rq(struct request *rq, bool at_head)
1074{
1075 blk_status_t status;
1076
1077 status = blk_execute_rq(rq, at_head);
1078 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1079 return -EINTR;
1080 if (nvme_req(rq)->status)
1081 return nvme_req(rq)->status;
1082 return blk_status_to_errno(status);
1083}
1084EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1085
1086/*
1087 * Returns 0 on success. If the result is negative, it's a Linux error code;
1088 * if the result is positive, it's an NVM Express status code
1089 */
1090int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1091 union nvme_result *result, void *buffer, unsigned bufflen,
1092 int qid, nvme_submit_flags_t flags)
1093{
1094 struct request *req;
1095 int ret;
1096 blk_mq_req_flags_t blk_flags = 0;
1097
1098 if (flags & NVME_SUBMIT_NOWAIT)
1099 blk_flags |= BLK_MQ_REQ_NOWAIT;
1100 if (flags & NVME_SUBMIT_RESERVED)
1101 blk_flags |= BLK_MQ_REQ_RESERVED;
1102 if (qid == NVME_QID_ANY)
1103 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1104 else
1105 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1106 qid - 1);
1107
1108 if (IS_ERR(req))
1109 return PTR_ERR(req);
1110 nvme_init_request(req, cmd);
1111 if (flags & NVME_SUBMIT_RETRY)
1112 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1113
1114 if (buffer && bufflen) {
1115 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1116 if (ret)
1117 goto out;
1118 }
1119
1120 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1121 if (result && ret >= 0)
1122 *result = nvme_req(req)->result;
1123 out:
1124 blk_mq_free_request(req);
1125 return ret;
1126}
1127EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1128
1129int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1130 void *buffer, unsigned bufflen)
1131{
1132 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1133 NVME_QID_ANY, 0);
1134}
1135EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1136
1137u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1138{
1139 u32 effects = 0;
1140
1141 if (ns) {
1142 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1143 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1144 dev_warn_once(ctrl->device,
1145 "IO command:%02x has unusual effects:%08x\n",
1146 opcode, effects);
1147
1148 /*
1149 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1150 * which would deadlock when done on an I/O command. Note that
1151 * We already warn about an unusual effect above.
1152 */
1153 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1154 } else {
1155 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1156 }
1157
1158 return effects;
1159}
1160EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1161
1162u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1163{
1164 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1165
1166 /*
1167 * For simplicity, IO to all namespaces is quiesced even if the command
1168 * effects say only one namespace is affected.
1169 */
1170 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1171 mutex_lock(&ctrl->scan_lock);
1172 mutex_lock(&ctrl->subsys->lock);
1173 nvme_mpath_start_freeze(ctrl->subsys);
1174 nvme_mpath_wait_freeze(ctrl->subsys);
1175 nvme_start_freeze(ctrl);
1176 nvme_wait_freeze(ctrl);
1177 }
1178 return effects;
1179}
1180EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1181
1182void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1183 struct nvme_command *cmd, int status)
1184{
1185 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1186 nvme_unfreeze(ctrl);
1187 nvme_mpath_unfreeze(ctrl->subsys);
1188 mutex_unlock(&ctrl->subsys->lock);
1189 mutex_unlock(&ctrl->scan_lock);
1190 }
1191 if (effects & NVME_CMD_EFFECTS_CCC) {
1192 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1193 &ctrl->flags)) {
1194 dev_info(ctrl->device,
1195"controller capabilities changed, reset may be required to take effect.\n");
1196 }
1197 }
1198 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1199 nvme_queue_scan(ctrl);
1200 flush_work(&ctrl->scan_work);
1201 }
1202 if (ns)
1203 return;
1204
1205 switch (cmd->common.opcode) {
1206 case nvme_admin_set_features:
1207 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1208 case NVME_FEAT_KATO:
1209 /*
1210 * Keep alive commands interval on the host should be
1211 * updated when KATO is modified by Set Features
1212 * commands.
1213 */
1214 if (!status)
1215 nvme_update_keep_alive(ctrl, cmd);
1216 break;
1217 default:
1218 break;
1219 }
1220 break;
1221 default:
1222 break;
1223 }
1224}
1225EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1226
1227/*
1228 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1229 *
1230 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1231 * accounting for transport roundtrip times [..].
1232 */
1233static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1234{
1235 unsigned long delay = ctrl->kato * HZ / 2;
1236
1237 /*
1238 * When using Traffic Based Keep Alive, we need to run
1239 * nvme_keep_alive_work at twice the normal frequency, as one
1240 * command completion can postpone sending a keep alive command
1241 * by up to twice the delay between runs.
1242 */
1243 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1244 delay /= 2;
1245 return delay;
1246}
1247
1248static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1249{
1250 unsigned long now = jiffies;
1251 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1252 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1253
1254 if (time_after(now, ka_next_check_tm))
1255 delay = 0;
1256 else
1257 delay = ka_next_check_tm - now;
1258
1259 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1260}
1261
1262static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1263 blk_status_t status)
1264{
1265 struct nvme_ctrl *ctrl = rq->end_io_data;
1266 unsigned long flags;
1267 bool startka = false;
1268 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1269 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1270
1271 /*
1272 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1273 * at the desired frequency.
1274 */
1275 if (rtt <= delay) {
1276 delay -= rtt;
1277 } else {
1278 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1279 jiffies_to_msecs(rtt));
1280 delay = 0;
1281 }
1282
1283 blk_mq_free_request(rq);
1284
1285 if (status) {
1286 dev_err(ctrl->device,
1287 "failed nvme_keep_alive_end_io error=%d\n",
1288 status);
1289 return RQ_END_IO_NONE;
1290 }
1291
1292 ctrl->ka_last_check_time = jiffies;
1293 ctrl->comp_seen = false;
1294 spin_lock_irqsave(&ctrl->lock, flags);
1295 if (ctrl->state == NVME_CTRL_LIVE ||
1296 ctrl->state == NVME_CTRL_CONNECTING)
1297 startka = true;
1298 spin_unlock_irqrestore(&ctrl->lock, flags);
1299 if (startka)
1300 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1301 return RQ_END_IO_NONE;
1302}
1303
1304static void nvme_keep_alive_work(struct work_struct *work)
1305{
1306 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1307 struct nvme_ctrl, ka_work);
1308 bool comp_seen = ctrl->comp_seen;
1309 struct request *rq;
1310
1311 ctrl->ka_last_check_time = jiffies;
1312
1313 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1314 dev_dbg(ctrl->device,
1315 "reschedule traffic based keep-alive timer\n");
1316 ctrl->comp_seen = false;
1317 nvme_queue_keep_alive_work(ctrl);
1318 return;
1319 }
1320
1321 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1322 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1323 if (IS_ERR(rq)) {
1324 /* allocation failure, reset the controller */
1325 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1326 nvme_reset_ctrl(ctrl);
1327 return;
1328 }
1329 nvme_init_request(rq, &ctrl->ka_cmd);
1330
1331 rq->timeout = ctrl->kato * HZ;
1332 rq->end_io = nvme_keep_alive_end_io;
1333 rq->end_io_data = ctrl;
1334 blk_execute_rq_nowait(rq, false);
1335}
1336
1337static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1338{
1339 if (unlikely(ctrl->kato == 0))
1340 return;
1341
1342 nvme_queue_keep_alive_work(ctrl);
1343}
1344
1345void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1346{
1347 if (unlikely(ctrl->kato == 0))
1348 return;
1349
1350 cancel_delayed_work_sync(&ctrl->ka_work);
1351}
1352EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1353
1354static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1355 struct nvme_command *cmd)
1356{
1357 unsigned int new_kato =
1358 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1359
1360 dev_info(ctrl->device,
1361 "keep alive interval updated from %u ms to %u ms\n",
1362 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1363
1364 nvme_stop_keep_alive(ctrl);
1365 ctrl->kato = new_kato;
1366 nvme_start_keep_alive(ctrl);
1367}
1368
1369/*
1370 * In NVMe 1.0 the CNS field was just a binary controller or namespace
1371 * flag, thus sending any new CNS opcodes has a big chance of not working.
1372 * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1373 * (but not for any later version).
1374 */
1375static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1376{
1377 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1378 return ctrl->vs < NVME_VS(1, 2, 0);
1379 return ctrl->vs < NVME_VS(1, 1, 0);
1380}
1381
1382static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1383{
1384 struct nvme_command c = { };
1385 int error;
1386
1387 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1388 c.identify.opcode = nvme_admin_identify;
1389 c.identify.cns = NVME_ID_CNS_CTRL;
1390
1391 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1392 if (!*id)
1393 return -ENOMEM;
1394
1395 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1396 sizeof(struct nvme_id_ctrl));
1397 if (error)
1398 kfree(*id);
1399 return error;
1400}
1401
1402static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1403 struct nvme_ns_id_desc *cur, bool *csi_seen)
1404{
1405 const char *warn_str = "ctrl returned bogus length:";
1406 void *data = cur;
1407
1408 switch (cur->nidt) {
1409 case NVME_NIDT_EUI64:
1410 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1411 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1412 warn_str, cur->nidl);
1413 return -1;
1414 }
1415 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1416 return NVME_NIDT_EUI64_LEN;
1417 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1418 return NVME_NIDT_EUI64_LEN;
1419 case NVME_NIDT_NGUID:
1420 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1421 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1422 warn_str, cur->nidl);
1423 return -1;
1424 }
1425 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1426 return NVME_NIDT_NGUID_LEN;
1427 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1428 return NVME_NIDT_NGUID_LEN;
1429 case NVME_NIDT_UUID:
1430 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1431 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1432 warn_str, cur->nidl);
1433 return -1;
1434 }
1435 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1436 return NVME_NIDT_UUID_LEN;
1437 uuid_copy(&ids->uuid, data + sizeof(*cur));
1438 return NVME_NIDT_UUID_LEN;
1439 case NVME_NIDT_CSI:
1440 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1441 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1442 warn_str, cur->nidl);
1443 return -1;
1444 }
1445 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1446 *csi_seen = true;
1447 return NVME_NIDT_CSI_LEN;
1448 default:
1449 /* Skip unknown types */
1450 return cur->nidl;
1451 }
1452}
1453
1454static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1455 struct nvme_ns_info *info)
1456{
1457 struct nvme_command c = { };
1458 bool csi_seen = false;
1459 int status, pos, len;
1460 void *data;
1461
1462 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1463 return 0;
1464 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1465 return 0;
1466
1467 c.identify.opcode = nvme_admin_identify;
1468 c.identify.nsid = cpu_to_le32(info->nsid);
1469 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1470
1471 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1472 if (!data)
1473 return -ENOMEM;
1474
1475 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1476 NVME_IDENTIFY_DATA_SIZE);
1477 if (status) {
1478 dev_warn(ctrl->device,
1479 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1480 info->nsid, status);
1481 goto free_data;
1482 }
1483
1484 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1485 struct nvme_ns_id_desc *cur = data + pos;
1486
1487 if (cur->nidl == 0)
1488 break;
1489
1490 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1491 if (len < 0)
1492 break;
1493
1494 len += sizeof(*cur);
1495 }
1496
1497 if (nvme_multi_css(ctrl) && !csi_seen) {
1498 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1499 info->nsid);
1500 status = -EINVAL;
1501 }
1502
1503free_data:
1504 kfree(data);
1505 return status;
1506}
1507
1508int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1509 struct nvme_id_ns **id)
1510{
1511 struct nvme_command c = { };
1512 int error;
1513
1514 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1515 c.identify.opcode = nvme_admin_identify;
1516 c.identify.nsid = cpu_to_le32(nsid);
1517 c.identify.cns = NVME_ID_CNS_NS;
1518
1519 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1520 if (!*id)
1521 return -ENOMEM;
1522
1523 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1524 if (error) {
1525 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1526 kfree(*id);
1527 }
1528 return error;
1529}
1530
1531static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1532 struct nvme_ns_info *info)
1533{
1534 struct nvme_ns_ids *ids = &info->ids;
1535 struct nvme_id_ns *id;
1536 int ret;
1537
1538 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1539 if (ret)
1540 return ret;
1541
1542 if (id->ncap == 0) {
1543 /* namespace not allocated or attached */
1544 info->is_removed = true;
1545 ret = -ENODEV;
1546 goto error;
1547 }
1548
1549 info->anagrpid = id->anagrpid;
1550 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1551 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1552 info->is_ready = true;
1553 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1554 dev_info(ctrl->device,
1555 "Ignoring bogus Namespace Identifiers\n");
1556 } else {
1557 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1558 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1559 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1560 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1561 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1562 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1563 }
1564
1565error:
1566 kfree(id);
1567 return ret;
1568}
1569
1570static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1571 struct nvme_ns_info *info)
1572{
1573 struct nvme_id_ns_cs_indep *id;
1574 struct nvme_command c = {
1575 .identify.opcode = nvme_admin_identify,
1576 .identify.nsid = cpu_to_le32(info->nsid),
1577 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1578 };
1579 int ret;
1580
1581 id = kmalloc(sizeof(*id), GFP_KERNEL);
1582 if (!id)
1583 return -ENOMEM;
1584
1585 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1586 if (!ret) {
1587 info->anagrpid = id->anagrpid;
1588 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1589 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1590 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1591 }
1592 kfree(id);
1593 return ret;
1594}
1595
1596static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1597 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1598{
1599 union nvme_result res = { 0 };
1600 struct nvme_command c = { };
1601 int ret;
1602
1603 c.features.opcode = op;
1604 c.features.fid = cpu_to_le32(fid);
1605 c.features.dword11 = cpu_to_le32(dword11);
1606
1607 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1608 buffer, buflen, NVME_QID_ANY, 0);
1609 if (ret >= 0 && result)
1610 *result = le32_to_cpu(res.u32);
1611 return ret;
1612}
1613
1614int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1615 unsigned int dword11, void *buffer, size_t buflen,
1616 u32 *result)
1617{
1618 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1619 buflen, result);
1620}
1621EXPORT_SYMBOL_GPL(nvme_set_features);
1622
1623int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1624 unsigned int dword11, void *buffer, size_t buflen,
1625 u32 *result)
1626{
1627 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1628 buflen, result);
1629}
1630EXPORT_SYMBOL_GPL(nvme_get_features);
1631
1632int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1633{
1634 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1635 u32 result;
1636 int status, nr_io_queues;
1637
1638 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1639 &result);
1640 if (status < 0)
1641 return status;
1642
1643 /*
1644 * Degraded controllers might return an error when setting the queue
1645 * count. We still want to be able to bring them online and offer
1646 * access to the admin queue, as that might be only way to fix them up.
1647 */
1648 if (status > 0) {
1649 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1650 *count = 0;
1651 } else {
1652 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1653 *count = min(*count, nr_io_queues);
1654 }
1655
1656 return 0;
1657}
1658EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1659
1660#define NVME_AEN_SUPPORTED \
1661 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1662 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1663
1664static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1665{
1666 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1667 int status;
1668
1669 if (!supported_aens)
1670 return;
1671
1672 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1673 NULL, 0, &result);
1674 if (status)
1675 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1676 supported_aens);
1677
1678 queue_work(nvme_wq, &ctrl->async_event_work);
1679}
1680
1681static int nvme_ns_open(struct nvme_ns *ns)
1682{
1683
1684 /* should never be called due to GENHD_FL_HIDDEN */
1685 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1686 goto fail;
1687 if (!nvme_get_ns(ns))
1688 goto fail;
1689 if (!try_module_get(ns->ctrl->ops->module))
1690 goto fail_put_ns;
1691
1692 return 0;
1693
1694fail_put_ns:
1695 nvme_put_ns(ns);
1696fail:
1697 return -ENXIO;
1698}
1699
1700static void nvme_ns_release(struct nvme_ns *ns)
1701{
1702
1703 module_put(ns->ctrl->ops->module);
1704 nvme_put_ns(ns);
1705}
1706
1707static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1708{
1709 return nvme_ns_open(disk->private_data);
1710}
1711
1712static void nvme_release(struct gendisk *disk)
1713{
1714 nvme_ns_release(disk->private_data);
1715}
1716
1717int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1718{
1719 /* some standard values */
1720 geo->heads = 1 << 6;
1721 geo->sectors = 1 << 5;
1722 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1723 return 0;
1724}
1725
1726static bool nvme_init_integrity(struct gendisk *disk, struct nvme_ns_head *head)
1727{
1728 struct blk_integrity integrity = { };
1729
1730 blk_integrity_unregister(disk);
1731
1732 if (!head->ms)
1733 return true;
1734
1735 /*
1736 * PI can always be supported as we can ask the controller to simply
1737 * insert/strip it, which is not possible for other kinds of metadata.
1738 */
1739 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1740 !(head->features & NVME_NS_METADATA_SUPPORTED))
1741 return nvme_ns_has_pi(head);
1742
1743 switch (head->pi_type) {
1744 case NVME_NS_DPS_PI_TYPE3:
1745 switch (head->guard_type) {
1746 case NVME_NVM_NS_16B_GUARD:
1747 integrity.profile = &t10_pi_type3_crc;
1748 integrity.tag_size = sizeof(u16) + sizeof(u32);
1749 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1750 break;
1751 case NVME_NVM_NS_64B_GUARD:
1752 integrity.profile = &ext_pi_type3_crc64;
1753 integrity.tag_size = sizeof(u16) + 6;
1754 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1755 break;
1756 default:
1757 integrity.profile = NULL;
1758 break;
1759 }
1760 break;
1761 case NVME_NS_DPS_PI_TYPE1:
1762 case NVME_NS_DPS_PI_TYPE2:
1763 switch (head->guard_type) {
1764 case NVME_NVM_NS_16B_GUARD:
1765 integrity.profile = &t10_pi_type1_crc;
1766 integrity.tag_size = sizeof(u16);
1767 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1768 break;
1769 case NVME_NVM_NS_64B_GUARD:
1770 integrity.profile = &ext_pi_type1_crc64;
1771 integrity.tag_size = sizeof(u16);
1772 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1773 break;
1774 default:
1775 integrity.profile = NULL;
1776 break;
1777 }
1778 break;
1779 default:
1780 integrity.profile = NULL;
1781 break;
1782 }
1783
1784 integrity.tuple_size = head->ms;
1785 integrity.pi_offset = head->pi_offset;
1786 blk_integrity_register(disk, &integrity);
1787 return true;
1788}
1789
1790static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk,
1791 struct nvme_ns_head *head)
1792{
1793 struct request_queue *queue = disk->queue;
1794 u32 max_discard_sectors;
1795
1796 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) {
1797 max_discard_sectors = nvme_lba_to_sect(head, ctrl->dmrsl);
1798 } else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
1799 max_discard_sectors = UINT_MAX;
1800 } else {
1801 blk_queue_max_discard_sectors(queue, 0);
1802 return;
1803 }
1804
1805 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1806 NVME_DSM_MAX_RANGES);
1807
1808 /*
1809 * If discard is already enabled, don't reset queue limits.
1810 *
1811 * This works around the fact that the block layer can't cope well with
1812 * updating the hardware limits when overridden through sysfs. This is
1813 * harmless because discard limits in NVMe are purely advisory.
1814 */
1815 if (queue->limits.max_discard_sectors)
1816 return;
1817
1818 blk_queue_max_discard_sectors(queue, max_discard_sectors);
1819 if (ctrl->dmrl)
1820 blk_queue_max_discard_segments(queue, ctrl->dmrl);
1821 else
1822 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
1823 queue->limits.discard_granularity = queue_logical_block_size(queue);
1824}
1825
1826static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1827{
1828 return uuid_equal(&a->uuid, &b->uuid) &&
1829 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1830 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1831 a->csi == b->csi;
1832}
1833
1834static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1835 struct nvme_id_ns_nvm **nvmp)
1836{
1837 struct nvme_command c = {
1838 .identify.opcode = nvme_admin_identify,
1839 .identify.nsid = cpu_to_le32(nsid),
1840 .identify.cns = NVME_ID_CNS_CS_NS,
1841 .identify.csi = NVME_CSI_NVM,
1842 };
1843 struct nvme_id_ns_nvm *nvm;
1844 int ret;
1845
1846 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1847 if (!nvm)
1848 return -ENOMEM;
1849
1850 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1851 if (ret)
1852 kfree(nvm);
1853 else
1854 *nvmp = nvm;
1855 return ret;
1856}
1857
1858static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head,
1859 struct nvme_id_ns *id)
1860{
1861 bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1862 unsigned lbaf = nvme_lbaf_index(id->flbas);
1863 struct nvme_id_ns_nvm *nvm;
1864 int ret = 0;
1865 u32 elbaf;
1866
1867 head->pi_size = 0;
1868 head->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1869 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1870 head->pi_size = sizeof(struct t10_pi_tuple);
1871 head->guard_type = NVME_NVM_NS_16B_GUARD;
1872 goto set_pi;
1873 }
1874
1875 ret = nvme_identify_ns_nvm(ctrl, head->ns_id, &nvm);
1876 if (ret)
1877 goto set_pi;
1878
1879 elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1880
1881 /* no support for storage tag formats right now */
1882 if (nvme_elbaf_sts(elbaf))
1883 goto free_data;
1884
1885 head->guard_type = nvme_elbaf_guard_type(elbaf);
1886 switch (head->guard_type) {
1887 case NVME_NVM_NS_64B_GUARD:
1888 head->pi_size = sizeof(struct crc64_pi_tuple);
1889 break;
1890 case NVME_NVM_NS_16B_GUARD:
1891 head->pi_size = sizeof(struct t10_pi_tuple);
1892 break;
1893 default:
1894 break;
1895 }
1896
1897free_data:
1898 kfree(nvm);
1899set_pi:
1900 if (head->pi_size && head->ms >= head->pi_size)
1901 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1902 else
1903 head->pi_type = 0;
1904
1905 if (first)
1906 head->pi_offset = 0;
1907 else
1908 head->pi_offset = head->ms - head->pi_size;
1909
1910 return ret;
1911}
1912
1913static int nvme_configure_metadata(struct nvme_ctrl *ctrl,
1914 struct nvme_ns_head *head, struct nvme_id_ns *id)
1915{
1916 int ret;
1917
1918 ret = nvme_init_ms(ctrl, head, id);
1919 if (ret)
1920 return ret;
1921
1922 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1923 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1924 return 0;
1925
1926 if (ctrl->ops->flags & NVME_F_FABRICS) {
1927 /*
1928 * The NVMe over Fabrics specification only supports metadata as
1929 * part of the extended data LBA. We rely on HCA/HBA support to
1930 * remap the separate metadata buffer from the block layer.
1931 */
1932 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1933 return 0;
1934
1935 head->features |= NVME_NS_EXT_LBAS;
1936
1937 /*
1938 * The current fabrics transport drivers support namespace
1939 * metadata formats only if nvme_ns_has_pi() returns true.
1940 * Suppress support for all other formats so the namespace will
1941 * have a 0 capacity and not be usable through the block stack.
1942 *
1943 * Note, this check will need to be modified if any drivers
1944 * gain the ability to use other metadata formats.
1945 */
1946 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1947 head->features |= NVME_NS_METADATA_SUPPORTED;
1948 } else {
1949 /*
1950 * For PCIe controllers, we can't easily remap the separate
1951 * metadata buffer from the block layer and thus require a
1952 * separate metadata buffer for block layer metadata/PI support.
1953 * We allow extended LBAs for the passthrough interface, though.
1954 */
1955 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1956 head->features |= NVME_NS_EXT_LBAS;
1957 else
1958 head->features |= NVME_NS_METADATA_SUPPORTED;
1959 }
1960 return 0;
1961}
1962
1963static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
1964{
1965 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
1966}
1967
1968static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1969 struct request_queue *q)
1970{
1971 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1972 blk_queue_max_segments(q, min_t(u32, USHRT_MAX,
1973 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments)));
1974 blk_queue_max_integrity_segments(q, ctrl->max_integrity_segments);
1975 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1976 blk_queue_dma_alignment(q, 3);
1977}
1978
1979static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id)
1980{
1981 struct gendisk *disk = ns->disk;
1982 struct nvme_ns_head *head = ns->head;
1983 u32 bs = 1U << head->lba_shift;
1984 u32 atomic_bs, phys_bs, io_opt = 0;
1985 bool valid = true;
1986
1987 /*
1988 * The block layer can't support LBA sizes larger than the page size
1989 * or smaller than a sector size yet, so catch this early and don't
1990 * allow block I/O.
1991 */
1992 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
1993 bs = (1 << 9);
1994 valid = false;
1995 }
1996
1997 atomic_bs = phys_bs = bs;
1998 if (id->nabo == 0) {
1999 /*
2000 * Bit 1 indicates whether NAWUPF is defined for this namespace
2001 * and whether it should be used instead of AWUPF. If NAWUPF ==
2002 * 0 then AWUPF must be used instead.
2003 */
2004 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
2005 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2006 else
2007 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
2008 }
2009
2010 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
2011 /* NPWG = Namespace Preferred Write Granularity */
2012 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2013 /* NOWS = Namespace Optimal Write Size */
2014 io_opt = bs * (1 + le16_to_cpu(id->nows));
2015 }
2016
2017 blk_queue_logical_block_size(disk->queue, bs);
2018 /*
2019 * Linux filesystems assume writing a single physical block is
2020 * an atomic operation. Hence limit the physical block size to the
2021 * value of the Atomic Write Unit Power Fail parameter.
2022 */
2023 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
2024 blk_queue_io_min(disk->queue, phys_bs);
2025 blk_queue_io_opt(disk->queue, io_opt);
2026
2027 nvme_config_discard(ns->ctrl, disk, head);
2028
2029 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
2030 blk_queue_max_write_zeroes_sectors(disk->queue, UINT_MAX);
2031 else
2032 blk_queue_max_write_zeroes_sectors(disk->queue,
2033 ns->ctrl->max_zeroes_sectors);
2034 return valid;
2035}
2036
2037static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2038{
2039 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2040}
2041
2042static inline bool nvme_first_scan(struct gendisk *disk)
2043{
2044 /* nvme_alloc_ns() scans the disk prior to adding it */
2045 return !disk_live(disk);
2046}
2047
2048static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
2049{
2050 struct nvme_ctrl *ctrl = ns->ctrl;
2051 u32 iob;
2052
2053 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2054 is_power_of_2(ctrl->max_hw_sectors))
2055 iob = ctrl->max_hw_sectors;
2056 else
2057 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2058
2059 if (!iob)
2060 return;
2061
2062 if (!is_power_of_2(iob)) {
2063 if (nvme_first_scan(ns->disk))
2064 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2065 ns->disk->disk_name, iob);
2066 return;
2067 }
2068
2069 if (blk_queue_is_zoned(ns->disk->queue)) {
2070 if (nvme_first_scan(ns->disk))
2071 pr_warn("%s: ignoring zoned namespace IO boundary\n",
2072 ns->disk->disk_name);
2073 return;
2074 }
2075
2076 blk_queue_chunk_sectors(ns->queue, iob);
2077}
2078
2079static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2080 struct nvme_ns_info *info)
2081{
2082 blk_mq_freeze_queue(ns->disk->queue);
2083 nvme_set_queue_limits(ns->ctrl, ns->queue);
2084 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2085 blk_mq_unfreeze_queue(ns->disk->queue);
2086
2087 /* Hide the block-interface for these devices */
2088 return -ENODEV;
2089}
2090
2091static int nvme_update_ns_info_block(struct nvme_ns *ns,
2092 struct nvme_ns_info *info)
2093{
2094 bool vwc = ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT;
2095 struct nvme_id_ns *id;
2096 sector_t capacity;
2097 unsigned lbaf;
2098 int ret;
2099
2100 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2101 if (ret)
2102 return ret;
2103
2104 if (id->ncap == 0) {
2105 /* namespace not allocated or attached */
2106 info->is_removed = true;
2107 ret = -ENODEV;
2108 goto out;
2109 }
2110
2111 blk_mq_freeze_queue(ns->disk->queue);
2112 lbaf = nvme_lbaf_index(id->flbas);
2113 ns->head->lba_shift = id->lbaf[lbaf].ds;
2114 ns->head->nuse = le64_to_cpu(id->nuse);
2115 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2116
2117 nvme_set_queue_limits(ns->ctrl, ns->queue);
2118
2119 ret = nvme_configure_metadata(ns->ctrl, ns->head, id);
2120 if (ret < 0) {
2121 blk_mq_unfreeze_queue(ns->disk->queue);
2122 goto out;
2123 }
2124 nvme_set_chunk_sectors(ns, id);
2125 if (!nvme_update_disk_info(ns, id))
2126 capacity = 0;
2127
2128 /*
2129 * Register a metadata profile for PI, or the plain non-integrity NVMe
2130 * metadata masquerading as Type 0 if supported, otherwise reject block
2131 * I/O to namespaces with metadata except when the namespace supports
2132 * PI, as it can strip/insert in that case.
2133 */
2134 if (!nvme_init_integrity(ns->disk, ns->head))
2135 capacity = 0;
2136
2137 set_capacity_and_notify(ns->disk, capacity);
2138
2139 if (ns->head->ids.csi == NVME_CSI_ZNS) {
2140 ret = nvme_update_zone_info(ns, lbaf);
2141 if (ret) {
2142 blk_mq_unfreeze_queue(ns->disk->queue);
2143 goto out;
2144 }
2145 }
2146
2147 /*
2148 * Only set the DEAC bit if the device guarantees that reads from
2149 * deallocated data return zeroes. While the DEAC bit does not
2150 * require that, it must be a no-op if reads from deallocated data
2151 * do not return zeroes.
2152 */
2153 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2154 ns->head->features |= NVME_NS_DEAC;
2155 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2156 blk_queue_write_cache(ns->disk->queue, vwc, vwc);
2157 set_bit(NVME_NS_READY, &ns->flags);
2158 blk_mq_unfreeze_queue(ns->disk->queue);
2159
2160 if (blk_queue_is_zoned(ns->queue)) {
2161 ret = blk_revalidate_disk_zones(ns->disk, NULL);
2162 if (ret && !nvme_first_scan(ns->disk))
2163 goto out;
2164 }
2165
2166 ret = 0;
2167out:
2168 kfree(id);
2169 return ret;
2170}
2171
2172static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2173{
2174 bool unsupported = false;
2175 int ret;
2176
2177 switch (info->ids.csi) {
2178 case NVME_CSI_ZNS:
2179 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2180 dev_info(ns->ctrl->device,
2181 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2182 info->nsid);
2183 ret = nvme_update_ns_info_generic(ns, info);
2184 break;
2185 }
2186 ret = nvme_update_ns_info_block(ns, info);
2187 break;
2188 case NVME_CSI_NVM:
2189 ret = nvme_update_ns_info_block(ns, info);
2190 break;
2191 default:
2192 dev_info(ns->ctrl->device,
2193 "block device for nsid %u not supported (csi %u)\n",
2194 info->nsid, info->ids.csi);
2195 ret = nvme_update_ns_info_generic(ns, info);
2196 break;
2197 }
2198
2199 /*
2200 * If probing fails due an unsupported feature, hide the block device,
2201 * but still allow other access.
2202 */
2203 if (ret == -ENODEV) {
2204 ns->disk->flags |= GENHD_FL_HIDDEN;
2205 set_bit(NVME_NS_READY, &ns->flags);
2206 unsupported = true;
2207 ret = 0;
2208 }
2209
2210 if (!ret && nvme_ns_head_multipath(ns->head)) {
2211 blk_mq_freeze_queue(ns->head->disk->queue);
2212 if (unsupported)
2213 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2214 else
2215 nvme_init_integrity(ns->head->disk, ns->head);
2216 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2217 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2218 nvme_mpath_revalidate_paths(ns);
2219 blk_stack_limits(&ns->head->disk->queue->limits,
2220 &ns->queue->limits, 0);
2221
2222 disk_update_readahead(ns->head->disk);
2223 blk_mq_unfreeze_queue(ns->head->disk->queue);
2224 }
2225
2226 return ret;
2227}
2228
2229#ifdef CONFIG_BLK_SED_OPAL
2230static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2231 bool send)
2232{
2233 struct nvme_ctrl *ctrl = data;
2234 struct nvme_command cmd = { };
2235
2236 if (send)
2237 cmd.common.opcode = nvme_admin_security_send;
2238 else
2239 cmd.common.opcode = nvme_admin_security_recv;
2240 cmd.common.nsid = 0;
2241 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2242 cmd.common.cdw11 = cpu_to_le32(len);
2243
2244 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2245 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2246}
2247
2248static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2249{
2250 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2251 if (!ctrl->opal_dev)
2252 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2253 else if (was_suspended)
2254 opal_unlock_from_suspend(ctrl->opal_dev);
2255 } else {
2256 free_opal_dev(ctrl->opal_dev);
2257 ctrl->opal_dev = NULL;
2258 }
2259}
2260#else
2261static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2262{
2263}
2264#endif /* CONFIG_BLK_SED_OPAL */
2265
2266#ifdef CONFIG_BLK_DEV_ZONED
2267static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2268 unsigned int nr_zones, report_zones_cb cb, void *data)
2269{
2270 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2271 data);
2272}
2273#else
2274#define nvme_report_zones NULL
2275#endif /* CONFIG_BLK_DEV_ZONED */
2276
2277const struct block_device_operations nvme_bdev_ops = {
2278 .owner = THIS_MODULE,
2279 .ioctl = nvme_ioctl,
2280 .compat_ioctl = blkdev_compat_ptr_ioctl,
2281 .open = nvme_open,
2282 .release = nvme_release,
2283 .getgeo = nvme_getgeo,
2284 .report_zones = nvme_report_zones,
2285 .pr_ops = &nvme_pr_ops,
2286};
2287
2288static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2289 u32 timeout, const char *op)
2290{
2291 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2292 u32 csts;
2293 int ret;
2294
2295 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2296 if (csts == ~0)
2297 return -ENODEV;
2298 if ((csts & mask) == val)
2299 break;
2300
2301 usleep_range(1000, 2000);
2302 if (fatal_signal_pending(current))
2303 return -EINTR;
2304 if (time_after(jiffies, timeout_jiffies)) {
2305 dev_err(ctrl->device,
2306 "Device not ready; aborting %s, CSTS=0x%x\n",
2307 op, csts);
2308 return -ENODEV;
2309 }
2310 }
2311
2312 return ret;
2313}
2314
2315int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2316{
2317 int ret;
2318
2319 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2320 if (shutdown)
2321 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2322 else
2323 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2324
2325 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2326 if (ret)
2327 return ret;
2328
2329 if (shutdown) {
2330 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2331 NVME_CSTS_SHST_CMPLT,
2332 ctrl->shutdown_timeout, "shutdown");
2333 }
2334 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2335 msleep(NVME_QUIRK_DELAY_AMOUNT);
2336 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2337 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2338}
2339EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2340
2341int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2342{
2343 unsigned dev_page_min;
2344 u32 timeout;
2345 int ret;
2346
2347 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2348 if (ret) {
2349 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2350 return ret;
2351 }
2352 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2353
2354 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2355 dev_err(ctrl->device,
2356 "Minimum device page size %u too large for host (%u)\n",
2357 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2358 return -ENODEV;
2359 }
2360
2361 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2362 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2363 else
2364 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2365
2366 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2367 ctrl->ctrl_config |= NVME_CC_CRIME;
2368
2369 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2370 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2371 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2372 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2373 if (ret)
2374 return ret;
2375
2376 /* Flush write to device (required if transport is PCI) */
2377 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2378 if (ret)
2379 return ret;
2380
2381 /* CAP value may change after initial CC write */
2382 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2383 if (ret)
2384 return ret;
2385
2386 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2387 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2388 u32 crto, ready_timeout;
2389
2390 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2391 if (ret) {
2392 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2393 ret);
2394 return ret;
2395 }
2396
2397 /*
2398 * CRTO should always be greater or equal to CAP.TO, but some
2399 * devices are known to get this wrong. Use the larger of the
2400 * two values.
2401 */
2402 if (ctrl->ctrl_config & NVME_CC_CRIME)
2403 ready_timeout = NVME_CRTO_CRIMT(crto);
2404 else
2405 ready_timeout = NVME_CRTO_CRWMT(crto);
2406
2407 if (ready_timeout < timeout)
2408 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2409 crto, ctrl->cap);
2410 else
2411 timeout = ready_timeout;
2412 }
2413
2414 ctrl->ctrl_config |= NVME_CC_ENABLE;
2415 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2416 if (ret)
2417 return ret;
2418 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2419 (timeout + 1) / 2, "initialisation");
2420}
2421EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2422
2423static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2424{
2425 __le64 ts;
2426 int ret;
2427
2428 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2429 return 0;
2430
2431 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2432 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2433 NULL);
2434 if (ret)
2435 dev_warn_once(ctrl->device,
2436 "could not set timestamp (%d)\n", ret);
2437 return ret;
2438}
2439
2440static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2441{
2442 struct nvme_feat_host_behavior *host;
2443 u8 acre = 0, lbafee = 0;
2444 int ret;
2445
2446 /* Don't bother enabling the feature if retry delay is not reported */
2447 if (ctrl->crdt[0])
2448 acre = NVME_ENABLE_ACRE;
2449 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2450 lbafee = NVME_ENABLE_LBAFEE;
2451
2452 if (!acre && !lbafee)
2453 return 0;
2454
2455 host = kzalloc(sizeof(*host), GFP_KERNEL);
2456 if (!host)
2457 return 0;
2458
2459 host->acre = acre;
2460 host->lbafee = lbafee;
2461 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2462 host, sizeof(*host), NULL);
2463 kfree(host);
2464 return ret;
2465}
2466
2467/*
2468 * The function checks whether the given total (exlat + enlat) latency of
2469 * a power state allows the latter to be used as an APST transition target.
2470 * It does so by comparing the latency to the primary and secondary latency
2471 * tolerances defined by module params. If there's a match, the corresponding
2472 * timeout value is returned and the matching tolerance index (1 or 2) is
2473 * reported.
2474 */
2475static bool nvme_apst_get_transition_time(u64 total_latency,
2476 u64 *transition_time, unsigned *last_index)
2477{
2478 if (total_latency <= apst_primary_latency_tol_us) {
2479 if (*last_index == 1)
2480 return false;
2481 *last_index = 1;
2482 *transition_time = apst_primary_timeout_ms;
2483 return true;
2484 }
2485 if (apst_secondary_timeout_ms &&
2486 total_latency <= apst_secondary_latency_tol_us) {
2487 if (*last_index <= 2)
2488 return false;
2489 *last_index = 2;
2490 *transition_time = apst_secondary_timeout_ms;
2491 return true;
2492 }
2493 return false;
2494}
2495
2496/*
2497 * APST (Autonomous Power State Transition) lets us program a table of power
2498 * state transitions that the controller will perform automatically.
2499 *
2500 * Depending on module params, one of the two supported techniques will be used:
2501 *
2502 * - If the parameters provide explicit timeouts and tolerances, they will be
2503 * used to build a table with up to 2 non-operational states to transition to.
2504 * The default parameter values were selected based on the values used by
2505 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2506 * regeneration of the APST table in the event of switching between external
2507 * and battery power, the timeouts and tolerances reflect a compromise
2508 * between values used by Microsoft for AC and battery scenarios.
2509 * - If not, we'll configure the table with a simple heuristic: we are willing
2510 * to spend at most 2% of the time transitioning between power states.
2511 * Therefore, when running in any given state, we will enter the next
2512 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2513 * microseconds, as long as that state's exit latency is under the requested
2514 * maximum latency.
2515 *
2516 * We will not autonomously enter any non-operational state for which the total
2517 * latency exceeds ps_max_latency_us.
2518 *
2519 * Users can set ps_max_latency_us to zero to turn off APST.
2520 */
2521static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2522{
2523 struct nvme_feat_auto_pst *table;
2524 unsigned apste = 0;
2525 u64 max_lat_us = 0;
2526 __le64 target = 0;
2527 int max_ps = -1;
2528 int state;
2529 int ret;
2530 unsigned last_lt_index = UINT_MAX;
2531
2532 /*
2533 * If APST isn't supported or if we haven't been initialized yet,
2534 * then don't do anything.
2535 */
2536 if (!ctrl->apsta)
2537 return 0;
2538
2539 if (ctrl->npss > 31) {
2540 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2541 return 0;
2542 }
2543
2544 table = kzalloc(sizeof(*table), GFP_KERNEL);
2545 if (!table)
2546 return 0;
2547
2548 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2549 /* Turn off APST. */
2550 dev_dbg(ctrl->device, "APST disabled\n");
2551 goto done;
2552 }
2553
2554 /*
2555 * Walk through all states from lowest- to highest-power.
2556 * According to the spec, lower-numbered states use more power. NPSS,
2557 * despite the name, is the index of the lowest-power state, not the
2558 * number of states.
2559 */
2560 for (state = (int)ctrl->npss; state >= 0; state--) {
2561 u64 total_latency_us, exit_latency_us, transition_ms;
2562
2563 if (target)
2564 table->entries[state] = target;
2565
2566 /*
2567 * Don't allow transitions to the deepest state if it's quirked
2568 * off.
2569 */
2570 if (state == ctrl->npss &&
2571 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2572 continue;
2573
2574 /*
2575 * Is this state a useful non-operational state for higher-power
2576 * states to autonomously transition to?
2577 */
2578 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2579 continue;
2580
2581 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2582 if (exit_latency_us > ctrl->ps_max_latency_us)
2583 continue;
2584
2585 total_latency_us = exit_latency_us +
2586 le32_to_cpu(ctrl->psd[state].entry_lat);
2587
2588 /*
2589 * This state is good. It can be used as the APST idle target
2590 * for higher power states.
2591 */
2592 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2593 if (!nvme_apst_get_transition_time(total_latency_us,
2594 &transition_ms, &last_lt_index))
2595 continue;
2596 } else {
2597 transition_ms = total_latency_us + 19;
2598 do_div(transition_ms, 20);
2599 if (transition_ms > (1 << 24) - 1)
2600 transition_ms = (1 << 24) - 1;
2601 }
2602
2603 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2604 if (max_ps == -1)
2605 max_ps = state;
2606 if (total_latency_us > max_lat_us)
2607 max_lat_us = total_latency_us;
2608 }
2609
2610 if (max_ps == -1)
2611 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2612 else
2613 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2614 max_ps, max_lat_us, (int)sizeof(*table), table);
2615 apste = 1;
2616
2617done:
2618 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2619 table, sizeof(*table), NULL);
2620 if (ret)
2621 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2622 kfree(table);
2623 return ret;
2624}
2625
2626static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2627{
2628 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2629 u64 latency;
2630
2631 switch (val) {
2632 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2633 case PM_QOS_LATENCY_ANY:
2634 latency = U64_MAX;
2635 break;
2636
2637 default:
2638 latency = val;
2639 }
2640
2641 if (ctrl->ps_max_latency_us != latency) {
2642 ctrl->ps_max_latency_us = latency;
2643 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2644 nvme_configure_apst(ctrl);
2645 }
2646}
2647
2648struct nvme_core_quirk_entry {
2649 /*
2650 * NVMe model and firmware strings are padded with spaces. For
2651 * simplicity, strings in the quirk table are padded with NULLs
2652 * instead.
2653 */
2654 u16 vid;
2655 const char *mn;
2656 const char *fr;
2657 unsigned long quirks;
2658};
2659
2660static const struct nvme_core_quirk_entry core_quirks[] = {
2661 {
2662 /*
2663 * This Toshiba device seems to die using any APST states. See:
2664 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2665 */
2666 .vid = 0x1179,
2667 .mn = "THNSF5256GPUK TOSHIBA",
2668 .quirks = NVME_QUIRK_NO_APST,
2669 },
2670 {
2671 /*
2672 * This LiteON CL1-3D*-Q11 firmware version has a race
2673 * condition associated with actions related to suspend to idle
2674 * LiteON has resolved the problem in future firmware
2675 */
2676 .vid = 0x14a4,
2677 .fr = "22301111",
2678 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2679 },
2680 {
2681 /*
2682 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2683 * aborts I/O during any load, but more easily reproducible
2684 * with discards (fstrim).
2685 *
2686 * The device is left in a state where it is also not possible
2687 * to use "nvme set-feature" to disable APST, but booting with
2688 * nvme_core.default_ps_max_latency=0 works.
2689 */
2690 .vid = 0x1e0f,
2691 .mn = "KCD6XVUL6T40",
2692 .quirks = NVME_QUIRK_NO_APST,
2693 },
2694 {
2695 /*
2696 * The external Samsung X5 SSD fails initialization without a
2697 * delay before checking if it is ready and has a whole set of
2698 * other problems. To make this even more interesting, it
2699 * shares the PCI ID with internal Samsung 970 Evo Plus that
2700 * does not need or want these quirks.
2701 */
2702 .vid = 0x144d,
2703 .mn = "Samsung Portable SSD X5",
2704 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2705 NVME_QUIRK_NO_DEEPEST_PS |
2706 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2707 }
2708};
2709
2710/* match is null-terminated but idstr is space-padded. */
2711static bool string_matches(const char *idstr, const char *match, size_t len)
2712{
2713 size_t matchlen;
2714
2715 if (!match)
2716 return true;
2717
2718 matchlen = strlen(match);
2719 WARN_ON_ONCE(matchlen > len);
2720
2721 if (memcmp(idstr, match, matchlen))
2722 return false;
2723
2724 for (; matchlen < len; matchlen++)
2725 if (idstr[matchlen] != ' ')
2726 return false;
2727
2728 return true;
2729}
2730
2731static bool quirk_matches(const struct nvme_id_ctrl *id,
2732 const struct nvme_core_quirk_entry *q)
2733{
2734 return q->vid == le16_to_cpu(id->vid) &&
2735 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2736 string_matches(id->fr, q->fr, sizeof(id->fr));
2737}
2738
2739static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2740 struct nvme_id_ctrl *id)
2741{
2742 size_t nqnlen;
2743 int off;
2744
2745 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2746 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2747 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2748 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2749 return;
2750 }
2751
2752 if (ctrl->vs >= NVME_VS(1, 2, 1))
2753 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2754 }
2755
2756 /*
2757 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2758 * Base Specification 2.0. It is slightly different from the format
2759 * specified there due to historic reasons, and we can't change it now.
2760 */
2761 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2762 "nqn.2014.08.org.nvmexpress:%04x%04x",
2763 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2764 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2765 off += sizeof(id->sn);
2766 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2767 off += sizeof(id->mn);
2768 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2769}
2770
2771static void nvme_release_subsystem(struct device *dev)
2772{
2773 struct nvme_subsystem *subsys =
2774 container_of(dev, struct nvme_subsystem, dev);
2775
2776 if (subsys->instance >= 0)
2777 ida_free(&nvme_instance_ida, subsys->instance);
2778 kfree(subsys);
2779}
2780
2781static void nvme_destroy_subsystem(struct kref *ref)
2782{
2783 struct nvme_subsystem *subsys =
2784 container_of(ref, struct nvme_subsystem, ref);
2785
2786 mutex_lock(&nvme_subsystems_lock);
2787 list_del(&subsys->entry);
2788 mutex_unlock(&nvme_subsystems_lock);
2789
2790 ida_destroy(&subsys->ns_ida);
2791 device_del(&subsys->dev);
2792 put_device(&subsys->dev);
2793}
2794
2795static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2796{
2797 kref_put(&subsys->ref, nvme_destroy_subsystem);
2798}
2799
2800static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2801{
2802 struct nvme_subsystem *subsys;
2803
2804 lockdep_assert_held(&nvme_subsystems_lock);
2805
2806 /*
2807 * Fail matches for discovery subsystems. This results
2808 * in each discovery controller bound to a unique subsystem.
2809 * This avoids issues with validating controller values
2810 * that can only be true when there is a single unique subsystem.
2811 * There may be multiple and completely independent entities
2812 * that provide discovery controllers.
2813 */
2814 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2815 return NULL;
2816
2817 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2818 if (strcmp(subsys->subnqn, subsysnqn))
2819 continue;
2820 if (!kref_get_unless_zero(&subsys->ref))
2821 continue;
2822 return subsys;
2823 }
2824
2825 return NULL;
2826}
2827
2828static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2829{
2830 return ctrl->opts && ctrl->opts->discovery_nqn;
2831}
2832
2833static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2834 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2835{
2836 struct nvme_ctrl *tmp;
2837
2838 lockdep_assert_held(&nvme_subsystems_lock);
2839
2840 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2841 if (nvme_state_terminal(tmp))
2842 continue;
2843
2844 if (tmp->cntlid == ctrl->cntlid) {
2845 dev_err(ctrl->device,
2846 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2847 ctrl->cntlid, dev_name(tmp->device),
2848 subsys->subnqn);
2849 return false;
2850 }
2851
2852 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2853 nvme_discovery_ctrl(ctrl))
2854 continue;
2855
2856 dev_err(ctrl->device,
2857 "Subsystem does not support multiple controllers\n");
2858 return false;
2859 }
2860
2861 return true;
2862}
2863
2864static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2865{
2866 struct nvme_subsystem *subsys, *found;
2867 int ret;
2868
2869 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2870 if (!subsys)
2871 return -ENOMEM;
2872
2873 subsys->instance = -1;
2874 mutex_init(&subsys->lock);
2875 kref_init(&subsys->ref);
2876 INIT_LIST_HEAD(&subsys->ctrls);
2877 INIT_LIST_HEAD(&subsys->nsheads);
2878 nvme_init_subnqn(subsys, ctrl, id);
2879 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2880 memcpy(subsys->model, id->mn, sizeof(subsys->model));
2881 subsys->vendor_id = le16_to_cpu(id->vid);
2882 subsys->cmic = id->cmic;
2883
2884 /* Versions prior to 1.4 don't necessarily report a valid type */
2885 if (id->cntrltype == NVME_CTRL_DISC ||
2886 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2887 subsys->subtype = NVME_NQN_DISC;
2888 else
2889 subsys->subtype = NVME_NQN_NVME;
2890
2891 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2892 dev_err(ctrl->device,
2893 "Subsystem %s is not a discovery controller",
2894 subsys->subnqn);
2895 kfree(subsys);
2896 return -EINVAL;
2897 }
2898 subsys->awupf = le16_to_cpu(id->awupf);
2899 nvme_mpath_default_iopolicy(subsys);
2900
2901 subsys->dev.class = nvme_subsys_class;
2902 subsys->dev.release = nvme_release_subsystem;
2903 subsys->dev.groups = nvme_subsys_attrs_groups;
2904 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2905 device_initialize(&subsys->dev);
2906
2907 mutex_lock(&nvme_subsystems_lock);
2908 found = __nvme_find_get_subsystem(subsys->subnqn);
2909 if (found) {
2910 put_device(&subsys->dev);
2911 subsys = found;
2912
2913 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2914 ret = -EINVAL;
2915 goto out_put_subsystem;
2916 }
2917 } else {
2918 ret = device_add(&subsys->dev);
2919 if (ret) {
2920 dev_err(ctrl->device,
2921 "failed to register subsystem device.\n");
2922 put_device(&subsys->dev);
2923 goto out_unlock;
2924 }
2925 ida_init(&subsys->ns_ida);
2926 list_add_tail(&subsys->entry, &nvme_subsystems);
2927 }
2928
2929 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2930 dev_name(ctrl->device));
2931 if (ret) {
2932 dev_err(ctrl->device,
2933 "failed to create sysfs link from subsystem.\n");
2934 goto out_put_subsystem;
2935 }
2936
2937 if (!found)
2938 subsys->instance = ctrl->instance;
2939 ctrl->subsys = subsys;
2940 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2941 mutex_unlock(&nvme_subsystems_lock);
2942 return 0;
2943
2944out_put_subsystem:
2945 nvme_put_subsystem(subsys);
2946out_unlock:
2947 mutex_unlock(&nvme_subsystems_lock);
2948 return ret;
2949}
2950
2951int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2952 void *log, size_t size, u64 offset)
2953{
2954 struct nvme_command c = { };
2955 u32 dwlen = nvme_bytes_to_numd(size);
2956
2957 c.get_log_page.opcode = nvme_admin_get_log_page;
2958 c.get_log_page.nsid = cpu_to_le32(nsid);
2959 c.get_log_page.lid = log_page;
2960 c.get_log_page.lsp = lsp;
2961 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2962 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2963 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2964 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2965 c.get_log_page.csi = csi;
2966
2967 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2968}
2969
2970static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2971 struct nvme_effects_log **log)
2972{
2973 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi);
2974 int ret;
2975
2976 if (cel)
2977 goto out;
2978
2979 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2980 if (!cel)
2981 return -ENOMEM;
2982
2983 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2984 cel, sizeof(*cel), 0);
2985 if (ret) {
2986 kfree(cel);
2987 return ret;
2988 }
2989
2990 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2991out:
2992 *log = cel;
2993 return 0;
2994}
2995
2996static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2997{
2998 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2999
3000 if (check_shl_overflow(1U, units + page_shift - 9, &val))
3001 return UINT_MAX;
3002 return val;
3003}
3004
3005static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3006{
3007 struct nvme_command c = { };
3008 struct nvme_id_ctrl_nvm *id;
3009 int ret;
3010
3011 /*
3012 * Even though NVMe spec explicitly states that MDTS is not applicable
3013 * to the write-zeroes, we are cautious and limit the size to the
3014 * controllers max_hw_sectors value, which is based on the MDTS field
3015 * and possibly other limiting factors.
3016 */
3017 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3018 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3019 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3020 else
3021 ctrl->max_zeroes_sectors = 0;
3022
3023 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3024 nvme_ctrl_limited_cns(ctrl) ||
3025 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3026 return 0;
3027
3028 id = kzalloc(sizeof(*id), GFP_KERNEL);
3029 if (!id)
3030 return -ENOMEM;
3031
3032 c.identify.opcode = nvme_admin_identify;
3033 c.identify.cns = NVME_ID_CNS_CS_CTRL;
3034 c.identify.csi = NVME_CSI_NVM;
3035
3036 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3037 if (ret)
3038 goto free_data;
3039
3040 ctrl->dmrl = id->dmrl;
3041 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3042 if (id->wzsl)
3043 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3044
3045free_data:
3046 if (ret > 0)
3047 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3048 kfree(id);
3049 return ret;
3050}
3051
3052static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3053{
3054 struct nvme_effects_log *log = ctrl->effects;
3055
3056 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3057 NVME_CMD_EFFECTS_NCC |
3058 NVME_CMD_EFFECTS_CSE_MASK);
3059 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3060 NVME_CMD_EFFECTS_CSE_MASK);
3061
3062 /*
3063 * The spec says the result of a security receive command depends on
3064 * the previous security send command. As such, many vendors log this
3065 * command as one to submitted only when no other commands to the same
3066 * namespace are outstanding. The intention is to tell the host to
3067 * prevent mixing security send and receive.
3068 *
3069 * This driver can only enforce such exclusive access against IO
3070 * queues, though. We are not readily able to enforce such a rule for
3071 * two commands to the admin queue, which is the only queue that
3072 * matters for this command.
3073 *
3074 * Rather than blindly freezing the IO queues for this effect that
3075 * doesn't even apply to IO, mask it off.
3076 */
3077 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3078
3079 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3080 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3081 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3082}
3083
3084static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3085{
3086 int ret = 0;
3087
3088 if (ctrl->effects)
3089 return 0;
3090
3091 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3092 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3093 if (ret < 0)
3094 return ret;
3095 }
3096
3097 if (!ctrl->effects) {
3098 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3099 if (!ctrl->effects)
3100 return -ENOMEM;
3101 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3102 }
3103
3104 nvme_init_known_nvm_effects(ctrl);
3105 return 0;
3106}
3107
3108static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3109{
3110 /*
3111 * In fabrics we need to verify the cntlid matches the
3112 * admin connect
3113 */
3114 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3115 dev_err(ctrl->device,
3116 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3117 ctrl->cntlid, le16_to_cpu(id->cntlid));
3118 return -EINVAL;
3119 }
3120
3121 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3122 dev_err(ctrl->device,
3123 "keep-alive support is mandatory for fabrics\n");
3124 return -EINVAL;
3125 }
3126
3127 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3128 dev_err(ctrl->device,
3129 "I/O queue command capsule supported size %d < 4\n",
3130 ctrl->ioccsz);
3131 return -EINVAL;
3132 }
3133
3134 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3135 dev_err(ctrl->device,
3136 "I/O queue response capsule supported size %d < 1\n",
3137 ctrl->iorcsz);
3138 return -EINVAL;
3139 }
3140
3141 if (!ctrl->maxcmd) {
3142 dev_err(ctrl->device, "Maximum outstanding commands is 0\n");
3143 return -EINVAL;
3144 }
3145
3146 return 0;
3147}
3148
3149static int nvme_init_identify(struct nvme_ctrl *ctrl)
3150{
3151 struct nvme_id_ctrl *id;
3152 u32 max_hw_sectors;
3153 bool prev_apst_enabled;
3154 int ret;
3155
3156 ret = nvme_identify_ctrl(ctrl, &id);
3157 if (ret) {
3158 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3159 return -EIO;
3160 }
3161
3162 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3163 ctrl->cntlid = le16_to_cpu(id->cntlid);
3164
3165 if (!ctrl->identified) {
3166 unsigned int i;
3167
3168 /*
3169 * Check for quirks. Quirk can depend on firmware version,
3170 * so, in principle, the set of quirks present can change
3171 * across a reset. As a possible future enhancement, we
3172 * could re-scan for quirks every time we reinitialize
3173 * the device, but we'd have to make sure that the driver
3174 * behaves intelligently if the quirks change.
3175 */
3176 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3177 if (quirk_matches(id, &core_quirks[i]))
3178 ctrl->quirks |= core_quirks[i].quirks;
3179 }
3180
3181 ret = nvme_init_subsystem(ctrl, id);
3182 if (ret)
3183 goto out_free;
3184
3185 ret = nvme_init_effects(ctrl, id);
3186 if (ret)
3187 goto out_free;
3188 }
3189 memcpy(ctrl->subsys->firmware_rev, id->fr,
3190 sizeof(ctrl->subsys->firmware_rev));
3191
3192 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3193 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3194 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3195 }
3196
3197 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3198 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3199 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3200
3201 ctrl->oacs = le16_to_cpu(id->oacs);
3202 ctrl->oncs = le16_to_cpu(id->oncs);
3203 ctrl->mtfa = le16_to_cpu(id->mtfa);
3204 ctrl->oaes = le32_to_cpu(id->oaes);
3205 ctrl->wctemp = le16_to_cpu(id->wctemp);
3206 ctrl->cctemp = le16_to_cpu(id->cctemp);
3207
3208 atomic_set(&ctrl->abort_limit, id->acl + 1);
3209 ctrl->vwc = id->vwc;
3210 if (id->mdts)
3211 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3212 else
3213 max_hw_sectors = UINT_MAX;
3214 ctrl->max_hw_sectors =
3215 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3216
3217 nvme_set_queue_limits(ctrl, ctrl->admin_q);
3218 ctrl->sgls = le32_to_cpu(id->sgls);
3219 ctrl->kas = le16_to_cpu(id->kas);
3220 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3221 ctrl->ctratt = le32_to_cpu(id->ctratt);
3222
3223 ctrl->cntrltype = id->cntrltype;
3224 ctrl->dctype = id->dctype;
3225
3226 if (id->rtd3e) {
3227 /* us -> s */
3228 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3229
3230 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3231 shutdown_timeout, 60);
3232
3233 if (ctrl->shutdown_timeout != shutdown_timeout)
3234 dev_info(ctrl->device,
3235 "Shutdown timeout set to %u seconds\n",
3236 ctrl->shutdown_timeout);
3237 } else
3238 ctrl->shutdown_timeout = shutdown_timeout;
3239
3240 ctrl->npss = id->npss;
3241 ctrl->apsta = id->apsta;
3242 prev_apst_enabled = ctrl->apst_enabled;
3243 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3244 if (force_apst && id->apsta) {
3245 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3246 ctrl->apst_enabled = true;
3247 } else {
3248 ctrl->apst_enabled = false;
3249 }
3250 } else {
3251 ctrl->apst_enabled = id->apsta;
3252 }
3253 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3254
3255 if (ctrl->ops->flags & NVME_F_FABRICS) {
3256 ctrl->icdoff = le16_to_cpu(id->icdoff);
3257 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3258 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3259 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3260
3261 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3262 if (ret)
3263 goto out_free;
3264 } else {
3265 ctrl->hmpre = le32_to_cpu(id->hmpre);
3266 ctrl->hmmin = le32_to_cpu(id->hmmin);
3267 ctrl->hmminds = le32_to_cpu(id->hmminds);
3268 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3269 }
3270
3271 ret = nvme_mpath_init_identify(ctrl, id);
3272 if (ret < 0)
3273 goto out_free;
3274
3275 if (ctrl->apst_enabled && !prev_apst_enabled)
3276 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3277 else if (!ctrl->apst_enabled && prev_apst_enabled)
3278 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3279
3280out_free:
3281 kfree(id);
3282 return ret;
3283}
3284
3285/*
3286 * Initialize the cached copies of the Identify data and various controller
3287 * register in our nvme_ctrl structure. This should be called as soon as
3288 * the admin queue is fully up and running.
3289 */
3290int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3291{
3292 int ret;
3293
3294 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3295 if (ret) {
3296 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3297 return ret;
3298 }
3299
3300 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3301
3302 if (ctrl->vs >= NVME_VS(1, 1, 0))
3303 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3304
3305 ret = nvme_init_identify(ctrl);
3306 if (ret)
3307 return ret;
3308
3309 ret = nvme_configure_apst(ctrl);
3310 if (ret < 0)
3311 return ret;
3312
3313 ret = nvme_configure_timestamp(ctrl);
3314 if (ret < 0)
3315 return ret;
3316
3317 ret = nvme_configure_host_options(ctrl);
3318 if (ret < 0)
3319 return ret;
3320
3321 nvme_configure_opal(ctrl, was_suspended);
3322
3323 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3324 /*
3325 * Do not return errors unless we are in a controller reset,
3326 * the controller works perfectly fine without hwmon.
3327 */
3328 ret = nvme_hwmon_init(ctrl);
3329 if (ret == -EINTR)
3330 return ret;
3331 }
3332
3333 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3334 ctrl->identified = true;
3335
3336 nvme_start_keep_alive(ctrl);
3337
3338 return 0;
3339}
3340EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3341
3342static int nvme_dev_open(struct inode *inode, struct file *file)
3343{
3344 struct nvme_ctrl *ctrl =
3345 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3346
3347 switch (nvme_ctrl_state(ctrl)) {
3348 case NVME_CTRL_LIVE:
3349 break;
3350 default:
3351 return -EWOULDBLOCK;
3352 }
3353
3354 nvme_get_ctrl(ctrl);
3355 if (!try_module_get(ctrl->ops->module)) {
3356 nvme_put_ctrl(ctrl);
3357 return -EINVAL;
3358 }
3359
3360 file->private_data = ctrl;
3361 return 0;
3362}
3363
3364static int nvme_dev_release(struct inode *inode, struct file *file)
3365{
3366 struct nvme_ctrl *ctrl =
3367 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3368
3369 module_put(ctrl->ops->module);
3370 nvme_put_ctrl(ctrl);
3371 return 0;
3372}
3373
3374static const struct file_operations nvme_dev_fops = {
3375 .owner = THIS_MODULE,
3376 .open = nvme_dev_open,
3377 .release = nvme_dev_release,
3378 .unlocked_ioctl = nvme_dev_ioctl,
3379 .compat_ioctl = compat_ptr_ioctl,
3380 .uring_cmd = nvme_dev_uring_cmd,
3381};
3382
3383static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3384 unsigned nsid)
3385{
3386 struct nvme_ns_head *h;
3387
3388 lockdep_assert_held(&ctrl->subsys->lock);
3389
3390 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3391 /*
3392 * Private namespaces can share NSIDs under some conditions.
3393 * In that case we can't use the same ns_head for namespaces
3394 * with the same NSID.
3395 */
3396 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3397 continue;
3398 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3399 return h;
3400 }
3401
3402 return NULL;
3403}
3404
3405static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3406 struct nvme_ns_ids *ids)
3407{
3408 bool has_uuid = !uuid_is_null(&ids->uuid);
3409 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3410 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3411 struct nvme_ns_head *h;
3412
3413 lockdep_assert_held(&subsys->lock);
3414
3415 list_for_each_entry(h, &subsys->nsheads, entry) {
3416 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3417 return -EINVAL;
3418 if (has_nguid &&
3419 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3420 return -EINVAL;
3421 if (has_eui64 &&
3422 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3423 return -EINVAL;
3424 }
3425
3426 return 0;
3427}
3428
3429static void nvme_cdev_rel(struct device *dev)
3430{
3431 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3432}
3433
3434void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3435{
3436 cdev_device_del(cdev, cdev_device);
3437 put_device(cdev_device);
3438}
3439
3440int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3441 const struct file_operations *fops, struct module *owner)
3442{
3443 int minor, ret;
3444
3445 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3446 if (minor < 0)
3447 return minor;
3448 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3449 cdev_device->class = nvme_ns_chr_class;
3450 cdev_device->release = nvme_cdev_rel;
3451 device_initialize(cdev_device);
3452 cdev_init(cdev, fops);
3453 cdev->owner = owner;
3454 ret = cdev_device_add(cdev, cdev_device);
3455 if (ret)
3456 put_device(cdev_device);
3457
3458 return ret;
3459}
3460
3461static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3462{
3463 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3464}
3465
3466static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3467{
3468 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3469 return 0;
3470}
3471
3472static const struct file_operations nvme_ns_chr_fops = {
3473 .owner = THIS_MODULE,
3474 .open = nvme_ns_chr_open,
3475 .release = nvme_ns_chr_release,
3476 .unlocked_ioctl = nvme_ns_chr_ioctl,
3477 .compat_ioctl = compat_ptr_ioctl,
3478 .uring_cmd = nvme_ns_chr_uring_cmd,
3479 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3480};
3481
3482static int nvme_add_ns_cdev(struct nvme_ns *ns)
3483{
3484 int ret;
3485
3486 ns->cdev_device.parent = ns->ctrl->device;
3487 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3488 ns->ctrl->instance, ns->head->instance);
3489 if (ret)
3490 return ret;
3491
3492 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3493 ns->ctrl->ops->module);
3494}
3495
3496static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3497 struct nvme_ns_info *info)
3498{
3499 struct nvme_ns_head *head;
3500 size_t size = sizeof(*head);
3501 int ret = -ENOMEM;
3502
3503#ifdef CONFIG_NVME_MULTIPATH
3504 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3505#endif
3506
3507 head = kzalloc(size, GFP_KERNEL);
3508 if (!head)
3509 goto out;
3510 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3511 if (ret < 0)
3512 goto out_free_head;
3513 head->instance = ret;
3514 INIT_LIST_HEAD(&head->list);
3515 ret = init_srcu_struct(&head->srcu);
3516 if (ret)
3517 goto out_ida_remove;
3518 head->subsys = ctrl->subsys;
3519 head->ns_id = info->nsid;
3520 head->ids = info->ids;
3521 head->shared = info->is_shared;
3522 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3523 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3524 kref_init(&head->ref);
3525
3526 if (head->ids.csi) {
3527 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3528 if (ret)
3529 goto out_cleanup_srcu;
3530 } else
3531 head->effects = ctrl->effects;
3532
3533 ret = nvme_mpath_alloc_disk(ctrl, head);
3534 if (ret)
3535 goto out_cleanup_srcu;
3536
3537 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3538
3539 kref_get(&ctrl->subsys->ref);
3540
3541 return head;
3542out_cleanup_srcu:
3543 cleanup_srcu_struct(&head->srcu);
3544out_ida_remove:
3545 ida_free(&ctrl->subsys->ns_ida, head->instance);
3546out_free_head:
3547 kfree(head);
3548out:
3549 if (ret > 0)
3550 ret = blk_status_to_errno(nvme_error_status(ret));
3551 return ERR_PTR(ret);
3552}
3553
3554static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3555 struct nvme_ns_ids *ids)
3556{
3557 struct nvme_subsystem *s;
3558 int ret = 0;
3559
3560 /*
3561 * Note that this check is racy as we try to avoid holding the global
3562 * lock over the whole ns_head creation. But it is only intended as
3563 * a sanity check anyway.
3564 */
3565 mutex_lock(&nvme_subsystems_lock);
3566 list_for_each_entry(s, &nvme_subsystems, entry) {
3567 if (s == this)
3568 continue;
3569 mutex_lock(&s->lock);
3570 ret = nvme_subsys_check_duplicate_ids(s, ids);
3571 mutex_unlock(&s->lock);
3572 if (ret)
3573 break;
3574 }
3575 mutex_unlock(&nvme_subsystems_lock);
3576
3577 return ret;
3578}
3579
3580static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3581{
3582 struct nvme_ctrl *ctrl = ns->ctrl;
3583 struct nvme_ns_head *head = NULL;
3584 int ret;
3585
3586 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3587 if (ret) {
3588 /*
3589 * We've found two different namespaces on two different
3590 * subsystems that report the same ID. This is pretty nasty
3591 * for anything that actually requires unique device
3592 * identification. In the kernel we need this for multipathing,
3593 * and in user space the /dev/disk/by-id/ links rely on it.
3594 *
3595 * If the device also claims to be multi-path capable back off
3596 * here now and refuse the probe the second device as this is a
3597 * recipe for data corruption. If not this is probably a
3598 * cheap consumer device if on the PCIe bus, so let the user
3599 * proceed and use the shiny toy, but warn that with changing
3600 * probing order (which due to our async probing could just be
3601 * device taking longer to startup) the other device could show
3602 * up at any time.
3603 */
3604 nvme_print_device_info(ctrl);
3605 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3606 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3607 info->is_shared)) {
3608 dev_err(ctrl->device,
3609 "ignoring nsid %d because of duplicate IDs\n",
3610 info->nsid);
3611 return ret;
3612 }
3613
3614 dev_err(ctrl->device,
3615 "clearing duplicate IDs for nsid %d\n", info->nsid);
3616 dev_err(ctrl->device,
3617 "use of /dev/disk/by-id/ may cause data corruption\n");
3618 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3619 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3620 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3621 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3622 }
3623
3624 mutex_lock(&ctrl->subsys->lock);
3625 head = nvme_find_ns_head(ctrl, info->nsid);
3626 if (!head) {
3627 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3628 if (ret) {
3629 dev_err(ctrl->device,
3630 "duplicate IDs in subsystem for nsid %d\n",
3631 info->nsid);
3632 goto out_unlock;
3633 }
3634 head = nvme_alloc_ns_head(ctrl, info);
3635 if (IS_ERR(head)) {
3636 ret = PTR_ERR(head);
3637 goto out_unlock;
3638 }
3639 } else {
3640 ret = -EINVAL;
3641 if (!info->is_shared || !head->shared) {
3642 dev_err(ctrl->device,
3643 "Duplicate unshared namespace %d\n",
3644 info->nsid);
3645 goto out_put_ns_head;
3646 }
3647 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3648 dev_err(ctrl->device,
3649 "IDs don't match for shared namespace %d\n",
3650 info->nsid);
3651 goto out_put_ns_head;
3652 }
3653
3654 if (!multipath) {
3655 dev_warn(ctrl->device,
3656 "Found shared namespace %d, but multipathing not supported.\n",
3657 info->nsid);
3658 dev_warn_once(ctrl->device,
3659 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
3660 }
3661 }
3662
3663 list_add_tail_rcu(&ns->siblings, &head->list);
3664 ns->head = head;
3665 mutex_unlock(&ctrl->subsys->lock);
3666 return 0;
3667
3668out_put_ns_head:
3669 nvme_put_ns_head(head);
3670out_unlock:
3671 mutex_unlock(&ctrl->subsys->lock);
3672 return ret;
3673}
3674
3675struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3676{
3677 struct nvme_ns *ns, *ret = NULL;
3678
3679 down_read(&ctrl->namespaces_rwsem);
3680 list_for_each_entry(ns, &ctrl->namespaces, list) {
3681 if (ns->head->ns_id == nsid) {
3682 if (!nvme_get_ns(ns))
3683 continue;
3684 ret = ns;
3685 break;
3686 }
3687 if (ns->head->ns_id > nsid)
3688 break;
3689 }
3690 up_read(&ctrl->namespaces_rwsem);
3691 return ret;
3692}
3693EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3694
3695/*
3696 * Add the namespace to the controller list while keeping the list ordered.
3697 */
3698static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3699{
3700 struct nvme_ns *tmp;
3701
3702 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3703 if (tmp->head->ns_id < ns->head->ns_id) {
3704 list_add(&ns->list, &tmp->list);
3705 return;
3706 }
3707 }
3708 list_add(&ns->list, &ns->ctrl->namespaces);
3709}
3710
3711static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3712{
3713 struct nvme_ns *ns;
3714 struct gendisk *disk;
3715 int node = ctrl->numa_node;
3716
3717 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3718 if (!ns)
3719 return;
3720
3721 disk = blk_mq_alloc_disk(ctrl->tagset, NULL, ns);
3722 if (IS_ERR(disk))
3723 goto out_free_ns;
3724 disk->fops = &nvme_bdev_ops;
3725 disk->private_data = ns;
3726
3727 ns->disk = disk;
3728 ns->queue = disk->queue;
3729 ns->passthru_err_log_enabled = false;
3730
3731 if (ctrl->opts && ctrl->opts->data_digest)
3732 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3733
3734 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3735 if (ctrl->ops->supports_pci_p2pdma &&
3736 ctrl->ops->supports_pci_p2pdma(ctrl))
3737 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3738
3739 ns->ctrl = ctrl;
3740 kref_init(&ns->kref);
3741
3742 if (nvme_init_ns_head(ns, info))
3743 goto out_cleanup_disk;
3744
3745 /*
3746 * If multipathing is enabled, the device name for all disks and not
3747 * just those that represent shared namespaces needs to be based on the
3748 * subsystem instance. Using the controller instance for private
3749 * namespaces could lead to naming collisions between shared and private
3750 * namespaces if they don't use a common numbering scheme.
3751 *
3752 * If multipathing is not enabled, disk names must use the controller
3753 * instance as shared namespaces will show up as multiple block
3754 * devices.
3755 */
3756 if (nvme_ns_head_multipath(ns->head)) {
3757 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3758 ctrl->instance, ns->head->instance);
3759 disk->flags |= GENHD_FL_HIDDEN;
3760 } else if (multipath) {
3761 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3762 ns->head->instance);
3763 } else {
3764 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3765 ns->head->instance);
3766 }
3767
3768 if (nvme_update_ns_info(ns, info))
3769 goto out_unlink_ns;
3770
3771 down_write(&ctrl->namespaces_rwsem);
3772 /*
3773 * Ensure that no namespaces are added to the ctrl list after the queues
3774 * are frozen, thereby avoiding a deadlock between scan and reset.
3775 */
3776 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3777 up_write(&ctrl->namespaces_rwsem);
3778 goto out_unlink_ns;
3779 }
3780 nvme_ns_add_to_ctrl_list(ns);
3781 up_write(&ctrl->namespaces_rwsem);
3782 nvme_get_ctrl(ctrl);
3783
3784 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3785 goto out_cleanup_ns_from_list;
3786
3787 if (!nvme_ns_head_multipath(ns->head))
3788 nvme_add_ns_cdev(ns);
3789
3790 nvme_mpath_add_disk(ns, info->anagrpid);
3791 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3792
3793 /*
3794 * Set ns->disk->device->driver_data to ns so we can access
3795 * ns->logging_enabled in nvme_passthru_err_log_enabled_store() and
3796 * nvme_passthru_err_log_enabled_show().
3797 */
3798 dev_set_drvdata(disk_to_dev(ns->disk), ns);
3799
3800 return;
3801
3802 out_cleanup_ns_from_list:
3803 nvme_put_ctrl(ctrl);
3804 down_write(&ctrl->namespaces_rwsem);
3805 list_del_init(&ns->list);
3806 up_write(&ctrl->namespaces_rwsem);
3807 out_unlink_ns:
3808 mutex_lock(&ctrl->subsys->lock);
3809 list_del_rcu(&ns->siblings);
3810 if (list_empty(&ns->head->list))
3811 list_del_init(&ns->head->entry);
3812 mutex_unlock(&ctrl->subsys->lock);
3813 nvme_put_ns_head(ns->head);
3814 out_cleanup_disk:
3815 put_disk(disk);
3816 out_free_ns:
3817 kfree(ns);
3818}
3819
3820static void nvme_ns_remove(struct nvme_ns *ns)
3821{
3822 bool last_path = false;
3823
3824 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3825 return;
3826
3827 clear_bit(NVME_NS_READY, &ns->flags);
3828 set_capacity(ns->disk, 0);
3829 nvme_fault_inject_fini(&ns->fault_inject);
3830
3831 /*
3832 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3833 * this ns going back into current_path.
3834 */
3835 synchronize_srcu(&ns->head->srcu);
3836
3837 /* wait for concurrent submissions */
3838 if (nvme_mpath_clear_current_path(ns))
3839 synchronize_srcu(&ns->head->srcu);
3840
3841 mutex_lock(&ns->ctrl->subsys->lock);
3842 list_del_rcu(&ns->siblings);
3843 if (list_empty(&ns->head->list)) {
3844 list_del_init(&ns->head->entry);
3845 last_path = true;
3846 }
3847 mutex_unlock(&ns->ctrl->subsys->lock);
3848
3849 /* guarantee not available in head->list */
3850 synchronize_srcu(&ns->head->srcu);
3851
3852 if (!nvme_ns_head_multipath(ns->head))
3853 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3854 del_gendisk(ns->disk);
3855
3856 down_write(&ns->ctrl->namespaces_rwsem);
3857 list_del_init(&ns->list);
3858 up_write(&ns->ctrl->namespaces_rwsem);
3859
3860 if (last_path)
3861 nvme_mpath_shutdown_disk(ns->head);
3862 nvme_put_ns(ns);
3863}
3864
3865static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3866{
3867 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3868
3869 if (ns) {
3870 nvme_ns_remove(ns);
3871 nvme_put_ns(ns);
3872 }
3873}
3874
3875static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3876{
3877 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3878
3879 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3880 dev_err(ns->ctrl->device,
3881 "identifiers changed for nsid %d\n", ns->head->ns_id);
3882 goto out;
3883 }
3884
3885 ret = nvme_update_ns_info(ns, info);
3886out:
3887 /*
3888 * Only remove the namespace if we got a fatal error back from the
3889 * device, otherwise ignore the error and just move on.
3890 *
3891 * TODO: we should probably schedule a delayed retry here.
3892 */
3893 if (ret > 0 && (ret & NVME_SC_DNR))
3894 nvme_ns_remove(ns);
3895}
3896
3897static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3898{
3899 struct nvme_ns_info info = { .nsid = nsid };
3900 struct nvme_ns *ns;
3901 int ret;
3902
3903 if (nvme_identify_ns_descs(ctrl, &info))
3904 return;
3905
3906 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3907 dev_warn(ctrl->device,
3908 "command set not reported for nsid: %d\n", nsid);
3909 return;
3910 }
3911
3912 /*
3913 * If available try to use the Command Set Idependent Identify Namespace
3914 * data structure to find all the generic information that is needed to
3915 * set up a namespace. If not fall back to the legacy version.
3916 */
3917 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3918 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3919 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3920 else
3921 ret = nvme_ns_info_from_identify(ctrl, &info);
3922
3923 if (info.is_removed)
3924 nvme_ns_remove_by_nsid(ctrl, nsid);
3925
3926 /*
3927 * Ignore the namespace if it is not ready. We will get an AEN once it
3928 * becomes ready and restart the scan.
3929 */
3930 if (ret || !info.is_ready)
3931 return;
3932
3933 ns = nvme_find_get_ns(ctrl, nsid);
3934 if (ns) {
3935 nvme_validate_ns(ns, &info);
3936 nvme_put_ns(ns);
3937 } else {
3938 nvme_alloc_ns(ctrl, &info);
3939 }
3940}
3941
3942static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3943 unsigned nsid)
3944{
3945 struct nvme_ns *ns, *next;
3946 LIST_HEAD(rm_list);
3947
3948 down_write(&ctrl->namespaces_rwsem);
3949 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3950 if (ns->head->ns_id > nsid)
3951 list_move_tail(&ns->list, &rm_list);
3952 }
3953 up_write(&ctrl->namespaces_rwsem);
3954
3955 list_for_each_entry_safe(ns, next, &rm_list, list)
3956 nvme_ns_remove(ns);
3957
3958}
3959
3960static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3961{
3962 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3963 __le32 *ns_list;
3964 u32 prev = 0;
3965 int ret = 0, i;
3966
3967 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3968 if (!ns_list)
3969 return -ENOMEM;
3970
3971 for (;;) {
3972 struct nvme_command cmd = {
3973 .identify.opcode = nvme_admin_identify,
3974 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
3975 .identify.nsid = cpu_to_le32(prev),
3976 };
3977
3978 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3979 NVME_IDENTIFY_DATA_SIZE);
3980 if (ret) {
3981 dev_warn(ctrl->device,
3982 "Identify NS List failed (status=0x%x)\n", ret);
3983 goto free;
3984 }
3985
3986 for (i = 0; i < nr_entries; i++) {
3987 u32 nsid = le32_to_cpu(ns_list[i]);
3988
3989 if (!nsid) /* end of the list? */
3990 goto out;
3991 nvme_scan_ns(ctrl, nsid);
3992 while (++prev < nsid)
3993 nvme_ns_remove_by_nsid(ctrl, prev);
3994 }
3995 }
3996 out:
3997 nvme_remove_invalid_namespaces(ctrl, prev);
3998 free:
3999 kfree(ns_list);
4000 return ret;
4001}
4002
4003static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4004{
4005 struct nvme_id_ctrl *id;
4006 u32 nn, i;
4007
4008 if (nvme_identify_ctrl(ctrl, &id))
4009 return;
4010 nn = le32_to_cpu(id->nn);
4011 kfree(id);
4012
4013 for (i = 1; i <= nn; i++)
4014 nvme_scan_ns(ctrl, i);
4015
4016 nvme_remove_invalid_namespaces(ctrl, nn);
4017}
4018
4019static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4020{
4021 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4022 __le32 *log;
4023 int error;
4024
4025 log = kzalloc(log_size, GFP_KERNEL);
4026 if (!log)
4027 return;
4028
4029 /*
4030 * We need to read the log to clear the AEN, but we don't want to rely
4031 * on it for the changed namespace information as userspace could have
4032 * raced with us in reading the log page, which could cause us to miss
4033 * updates.
4034 */
4035 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4036 NVME_CSI_NVM, log, log_size, 0);
4037 if (error)
4038 dev_warn(ctrl->device,
4039 "reading changed ns log failed: %d\n", error);
4040
4041 kfree(log);
4042}
4043
4044static void nvme_scan_work(struct work_struct *work)
4045{
4046 struct nvme_ctrl *ctrl =
4047 container_of(work, struct nvme_ctrl, scan_work);
4048 int ret;
4049
4050 /* No tagset on a live ctrl means IO queues could not created */
4051 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4052 return;
4053
4054 /*
4055 * Identify controller limits can change at controller reset due to
4056 * new firmware download, even though it is not common we cannot ignore
4057 * such scenario. Controller's non-mdts limits are reported in the unit
4058 * of logical blocks that is dependent on the format of attached
4059 * namespace. Hence re-read the limits at the time of ns allocation.
4060 */
4061 ret = nvme_init_non_mdts_limits(ctrl);
4062 if (ret < 0) {
4063 dev_warn(ctrl->device,
4064 "reading non-mdts-limits failed: %d\n", ret);
4065 return;
4066 }
4067
4068 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4069 dev_info(ctrl->device, "rescanning namespaces.\n");
4070 nvme_clear_changed_ns_log(ctrl);
4071 }
4072
4073 mutex_lock(&ctrl->scan_lock);
4074 if (nvme_ctrl_limited_cns(ctrl)) {
4075 nvme_scan_ns_sequential(ctrl);
4076 } else {
4077 /*
4078 * Fall back to sequential scan if DNR is set to handle broken
4079 * devices which should support Identify NS List (as per the VS
4080 * they report) but don't actually support it.
4081 */
4082 ret = nvme_scan_ns_list(ctrl);
4083 if (ret > 0 && ret & NVME_SC_DNR)
4084 nvme_scan_ns_sequential(ctrl);
4085 }
4086 mutex_unlock(&ctrl->scan_lock);
4087}
4088
4089/*
4090 * This function iterates the namespace list unlocked to allow recovery from
4091 * controller failure. It is up to the caller to ensure the namespace list is
4092 * not modified by scan work while this function is executing.
4093 */
4094void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4095{
4096 struct nvme_ns *ns, *next;
4097 LIST_HEAD(ns_list);
4098
4099 /*
4100 * make sure to requeue I/O to all namespaces as these
4101 * might result from the scan itself and must complete
4102 * for the scan_work to make progress
4103 */
4104 nvme_mpath_clear_ctrl_paths(ctrl);
4105
4106 /*
4107 * Unquiesce io queues so any pending IO won't hang, especially
4108 * those submitted from scan work
4109 */
4110 nvme_unquiesce_io_queues(ctrl);
4111
4112 /* prevent racing with ns scanning */
4113 flush_work(&ctrl->scan_work);
4114
4115 /*
4116 * The dead states indicates the controller was not gracefully
4117 * disconnected. In that case, we won't be able to flush any data while
4118 * removing the namespaces' disks; fail all the queues now to avoid
4119 * potentially having to clean up the failed sync later.
4120 */
4121 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4122 nvme_mark_namespaces_dead(ctrl);
4123
4124 /* this is a no-op when called from the controller reset handler */
4125 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4126
4127 down_write(&ctrl->namespaces_rwsem);
4128 list_splice_init(&ctrl->namespaces, &ns_list);
4129 up_write(&ctrl->namespaces_rwsem);
4130
4131 list_for_each_entry_safe(ns, next, &ns_list, list)
4132 nvme_ns_remove(ns);
4133}
4134EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4135
4136static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4137{
4138 const struct nvme_ctrl *ctrl =
4139 container_of(dev, struct nvme_ctrl, ctrl_device);
4140 struct nvmf_ctrl_options *opts = ctrl->opts;
4141 int ret;
4142
4143 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4144 if (ret)
4145 return ret;
4146
4147 if (opts) {
4148 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4149 if (ret)
4150 return ret;
4151
4152 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4153 opts->trsvcid ?: "none");
4154 if (ret)
4155 return ret;
4156
4157 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4158 opts->host_traddr ?: "none");
4159 if (ret)
4160 return ret;
4161
4162 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4163 opts->host_iface ?: "none");
4164 }
4165 return ret;
4166}
4167
4168static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4169{
4170 char *envp[2] = { envdata, NULL };
4171
4172 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4173}
4174
4175static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4176{
4177 char *envp[2] = { NULL, NULL };
4178 u32 aen_result = ctrl->aen_result;
4179
4180 ctrl->aen_result = 0;
4181 if (!aen_result)
4182 return;
4183
4184 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4185 if (!envp[0])
4186 return;
4187 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4188 kfree(envp[0]);
4189}
4190
4191static void nvme_async_event_work(struct work_struct *work)
4192{
4193 struct nvme_ctrl *ctrl =
4194 container_of(work, struct nvme_ctrl, async_event_work);
4195
4196 nvme_aen_uevent(ctrl);
4197
4198 /*
4199 * The transport drivers must guarantee AER submission here is safe by
4200 * flushing ctrl async_event_work after changing the controller state
4201 * from LIVE and before freeing the admin queue.
4202 */
4203 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4204 ctrl->ops->submit_async_event(ctrl);
4205}
4206
4207static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4208{
4209
4210 u32 csts;
4211
4212 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4213 return false;
4214
4215 if (csts == ~0)
4216 return false;
4217
4218 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4219}
4220
4221static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4222{
4223 struct nvme_fw_slot_info_log *log;
4224
4225 log = kmalloc(sizeof(*log), GFP_KERNEL);
4226 if (!log)
4227 return;
4228
4229 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4230 log, sizeof(*log), 0)) {
4231 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4232 goto out_free_log;
4233 }
4234
4235 if (log->afi & 0x70 || !(log->afi & 0x7)) {
4236 dev_info(ctrl->device,
4237 "Firmware is activated after next Controller Level Reset\n");
4238 goto out_free_log;
4239 }
4240
4241 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4242 sizeof(ctrl->subsys->firmware_rev));
4243
4244out_free_log:
4245 kfree(log);
4246}
4247
4248static void nvme_fw_act_work(struct work_struct *work)
4249{
4250 struct nvme_ctrl *ctrl = container_of(work,
4251 struct nvme_ctrl, fw_act_work);
4252 unsigned long fw_act_timeout;
4253
4254 nvme_auth_stop(ctrl);
4255
4256 if (ctrl->mtfa)
4257 fw_act_timeout = jiffies +
4258 msecs_to_jiffies(ctrl->mtfa * 100);
4259 else
4260 fw_act_timeout = jiffies +
4261 msecs_to_jiffies(admin_timeout * 1000);
4262
4263 nvme_quiesce_io_queues(ctrl);
4264 while (nvme_ctrl_pp_status(ctrl)) {
4265 if (time_after(jiffies, fw_act_timeout)) {
4266 dev_warn(ctrl->device,
4267 "Fw activation timeout, reset controller\n");
4268 nvme_try_sched_reset(ctrl);
4269 return;
4270 }
4271 msleep(100);
4272 }
4273
4274 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4275 return;
4276
4277 nvme_unquiesce_io_queues(ctrl);
4278 /* read FW slot information to clear the AER */
4279 nvme_get_fw_slot_info(ctrl);
4280
4281 queue_work(nvme_wq, &ctrl->async_event_work);
4282}
4283
4284static u32 nvme_aer_type(u32 result)
4285{
4286 return result & 0x7;
4287}
4288
4289static u32 nvme_aer_subtype(u32 result)
4290{
4291 return (result & 0xff00) >> 8;
4292}
4293
4294static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4295{
4296 u32 aer_notice_type = nvme_aer_subtype(result);
4297 bool requeue = true;
4298
4299 switch (aer_notice_type) {
4300 case NVME_AER_NOTICE_NS_CHANGED:
4301 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4302 nvme_queue_scan(ctrl);
4303 break;
4304 case NVME_AER_NOTICE_FW_ACT_STARTING:
4305 /*
4306 * We are (ab)using the RESETTING state to prevent subsequent
4307 * recovery actions from interfering with the controller's
4308 * firmware activation.
4309 */
4310 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4311 requeue = false;
4312 queue_work(nvme_wq, &ctrl->fw_act_work);
4313 }
4314 break;
4315#ifdef CONFIG_NVME_MULTIPATH
4316 case NVME_AER_NOTICE_ANA:
4317 if (!ctrl->ana_log_buf)
4318 break;
4319 queue_work(nvme_wq, &ctrl->ana_work);
4320 break;
4321#endif
4322 case NVME_AER_NOTICE_DISC_CHANGED:
4323 ctrl->aen_result = result;
4324 break;
4325 default:
4326 dev_warn(ctrl->device, "async event result %08x\n", result);
4327 }
4328 return requeue;
4329}
4330
4331static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4332{
4333 dev_warn(ctrl->device, "resetting controller due to AER\n");
4334 nvme_reset_ctrl(ctrl);
4335}
4336
4337void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4338 volatile union nvme_result *res)
4339{
4340 u32 result = le32_to_cpu(res->u32);
4341 u32 aer_type = nvme_aer_type(result);
4342 u32 aer_subtype = nvme_aer_subtype(result);
4343 bool requeue = true;
4344
4345 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4346 return;
4347
4348 trace_nvme_async_event(ctrl, result);
4349 switch (aer_type) {
4350 case NVME_AER_NOTICE:
4351 requeue = nvme_handle_aen_notice(ctrl, result);
4352 break;
4353 case NVME_AER_ERROR:
4354 /*
4355 * For a persistent internal error, don't run async_event_work
4356 * to submit a new AER. The controller reset will do it.
4357 */
4358 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4359 nvme_handle_aer_persistent_error(ctrl);
4360 return;
4361 }
4362 fallthrough;
4363 case NVME_AER_SMART:
4364 case NVME_AER_CSS:
4365 case NVME_AER_VS:
4366 ctrl->aen_result = result;
4367 break;
4368 default:
4369 break;
4370 }
4371
4372 if (requeue)
4373 queue_work(nvme_wq, &ctrl->async_event_work);
4374}
4375EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4376
4377int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4378 const struct blk_mq_ops *ops, unsigned int cmd_size)
4379{
4380 int ret;
4381
4382 memset(set, 0, sizeof(*set));
4383 set->ops = ops;
4384 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4385 if (ctrl->ops->flags & NVME_F_FABRICS)
4386 set->reserved_tags = NVMF_RESERVED_TAGS;
4387 set->numa_node = ctrl->numa_node;
4388 set->flags = BLK_MQ_F_NO_SCHED;
4389 if (ctrl->ops->flags & NVME_F_BLOCKING)
4390 set->flags |= BLK_MQ_F_BLOCKING;
4391 set->cmd_size = cmd_size;
4392 set->driver_data = ctrl;
4393 set->nr_hw_queues = 1;
4394 set->timeout = NVME_ADMIN_TIMEOUT;
4395 ret = blk_mq_alloc_tag_set(set);
4396 if (ret)
4397 return ret;
4398
4399 ctrl->admin_q = blk_mq_alloc_queue(set, NULL, NULL);
4400 if (IS_ERR(ctrl->admin_q)) {
4401 ret = PTR_ERR(ctrl->admin_q);
4402 goto out_free_tagset;
4403 }
4404
4405 if (ctrl->ops->flags & NVME_F_FABRICS) {
4406 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4407 if (IS_ERR(ctrl->fabrics_q)) {
4408 ret = PTR_ERR(ctrl->fabrics_q);
4409 goto out_cleanup_admin_q;
4410 }
4411 }
4412
4413 ctrl->admin_tagset = set;
4414 return 0;
4415
4416out_cleanup_admin_q:
4417 blk_mq_destroy_queue(ctrl->admin_q);
4418 blk_put_queue(ctrl->admin_q);
4419out_free_tagset:
4420 blk_mq_free_tag_set(set);
4421 ctrl->admin_q = NULL;
4422 ctrl->fabrics_q = NULL;
4423 return ret;
4424}
4425EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4426
4427void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4428{
4429 blk_mq_destroy_queue(ctrl->admin_q);
4430 blk_put_queue(ctrl->admin_q);
4431 if (ctrl->ops->flags & NVME_F_FABRICS) {
4432 blk_mq_destroy_queue(ctrl->fabrics_q);
4433 blk_put_queue(ctrl->fabrics_q);
4434 }
4435 blk_mq_free_tag_set(ctrl->admin_tagset);
4436}
4437EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4438
4439int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4440 const struct blk_mq_ops *ops, unsigned int nr_maps,
4441 unsigned int cmd_size)
4442{
4443 int ret;
4444
4445 memset(set, 0, sizeof(*set));
4446 set->ops = ops;
4447 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4448 /*
4449 * Some Apple controllers requires tags to be unique across admin and
4450 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4451 */
4452 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4453 set->reserved_tags = NVME_AQ_DEPTH;
4454 else if (ctrl->ops->flags & NVME_F_FABRICS)
4455 set->reserved_tags = NVMF_RESERVED_TAGS;
4456 set->numa_node = ctrl->numa_node;
4457 set->flags = BLK_MQ_F_SHOULD_MERGE;
4458 if (ctrl->ops->flags & NVME_F_BLOCKING)
4459 set->flags |= BLK_MQ_F_BLOCKING;
4460 set->cmd_size = cmd_size,
4461 set->driver_data = ctrl;
4462 set->nr_hw_queues = ctrl->queue_count - 1;
4463 set->timeout = NVME_IO_TIMEOUT;
4464 set->nr_maps = nr_maps;
4465 ret = blk_mq_alloc_tag_set(set);
4466 if (ret)
4467 return ret;
4468
4469 if (ctrl->ops->flags & NVME_F_FABRICS) {
4470 ctrl->connect_q = blk_mq_alloc_queue(set, NULL, NULL);
4471 if (IS_ERR(ctrl->connect_q)) {
4472 ret = PTR_ERR(ctrl->connect_q);
4473 goto out_free_tag_set;
4474 }
4475 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4476 ctrl->connect_q);
4477 }
4478
4479 ctrl->tagset = set;
4480 return 0;
4481
4482out_free_tag_set:
4483 blk_mq_free_tag_set(set);
4484 ctrl->connect_q = NULL;
4485 return ret;
4486}
4487EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4488
4489void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4490{
4491 if (ctrl->ops->flags & NVME_F_FABRICS) {
4492 blk_mq_destroy_queue(ctrl->connect_q);
4493 blk_put_queue(ctrl->connect_q);
4494 }
4495 blk_mq_free_tag_set(ctrl->tagset);
4496}
4497EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4498
4499void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4500{
4501 nvme_mpath_stop(ctrl);
4502 nvme_auth_stop(ctrl);
4503 nvme_stop_keep_alive(ctrl);
4504 nvme_stop_failfast_work(ctrl);
4505 flush_work(&ctrl->async_event_work);
4506 cancel_work_sync(&ctrl->fw_act_work);
4507 if (ctrl->ops->stop_ctrl)
4508 ctrl->ops->stop_ctrl(ctrl);
4509}
4510EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4511
4512void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4513{
4514 nvme_enable_aen(ctrl);
4515
4516 /*
4517 * persistent discovery controllers need to send indication to userspace
4518 * to re-read the discovery log page to learn about possible changes
4519 * that were missed. We identify persistent discovery controllers by
4520 * checking that they started once before, hence are reconnecting back.
4521 */
4522 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4523 nvme_discovery_ctrl(ctrl))
4524 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4525
4526 if (ctrl->queue_count > 1) {
4527 nvme_queue_scan(ctrl);
4528 nvme_unquiesce_io_queues(ctrl);
4529 nvme_mpath_update(ctrl);
4530 }
4531
4532 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4533 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4534}
4535EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4536
4537void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4538{
4539 nvme_hwmon_exit(ctrl);
4540 nvme_fault_inject_fini(&ctrl->fault_inject);
4541 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4542 cdev_device_del(&ctrl->cdev, ctrl->device);
4543 nvme_put_ctrl(ctrl);
4544}
4545EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4546
4547static void nvme_free_cels(struct nvme_ctrl *ctrl)
4548{
4549 struct nvme_effects_log *cel;
4550 unsigned long i;
4551
4552 xa_for_each(&ctrl->cels, i, cel) {
4553 xa_erase(&ctrl->cels, i);
4554 kfree(cel);
4555 }
4556
4557 xa_destroy(&ctrl->cels);
4558}
4559
4560static void nvme_free_ctrl(struct device *dev)
4561{
4562 struct nvme_ctrl *ctrl =
4563 container_of(dev, struct nvme_ctrl, ctrl_device);
4564 struct nvme_subsystem *subsys = ctrl->subsys;
4565
4566 if (!subsys || ctrl->instance != subsys->instance)
4567 ida_free(&nvme_instance_ida, ctrl->instance);
4568 key_put(ctrl->tls_key);
4569 nvme_free_cels(ctrl);
4570 nvme_mpath_uninit(ctrl);
4571 nvme_auth_stop(ctrl);
4572 nvme_auth_free(ctrl);
4573 __free_page(ctrl->discard_page);
4574 free_opal_dev(ctrl->opal_dev);
4575
4576 if (subsys) {
4577 mutex_lock(&nvme_subsystems_lock);
4578 list_del(&ctrl->subsys_entry);
4579 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4580 mutex_unlock(&nvme_subsystems_lock);
4581 }
4582
4583 ctrl->ops->free_ctrl(ctrl);
4584
4585 if (subsys)
4586 nvme_put_subsystem(subsys);
4587}
4588
4589/*
4590 * Initialize a NVMe controller structures. This needs to be called during
4591 * earliest initialization so that we have the initialized structured around
4592 * during probing.
4593 */
4594int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4595 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4596{
4597 int ret;
4598
4599 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4600 ctrl->passthru_err_log_enabled = false;
4601 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4602 spin_lock_init(&ctrl->lock);
4603 mutex_init(&ctrl->scan_lock);
4604 INIT_LIST_HEAD(&ctrl->namespaces);
4605 xa_init(&ctrl->cels);
4606 init_rwsem(&ctrl->namespaces_rwsem);
4607 ctrl->dev = dev;
4608 ctrl->ops = ops;
4609 ctrl->quirks = quirks;
4610 ctrl->numa_node = NUMA_NO_NODE;
4611 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4612 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4613 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4614 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4615 init_waitqueue_head(&ctrl->state_wq);
4616
4617 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4618 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4619 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4620 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4621 ctrl->ka_last_check_time = jiffies;
4622
4623 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4624 PAGE_SIZE);
4625 ctrl->discard_page = alloc_page(GFP_KERNEL);
4626 if (!ctrl->discard_page) {
4627 ret = -ENOMEM;
4628 goto out;
4629 }
4630
4631 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4632 if (ret < 0)
4633 goto out;
4634 ctrl->instance = ret;
4635
4636 device_initialize(&ctrl->ctrl_device);
4637 ctrl->device = &ctrl->ctrl_device;
4638 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4639 ctrl->instance);
4640 ctrl->device->class = nvme_class;
4641 ctrl->device->parent = ctrl->dev;
4642 if (ops->dev_attr_groups)
4643 ctrl->device->groups = ops->dev_attr_groups;
4644 else
4645 ctrl->device->groups = nvme_dev_attr_groups;
4646 ctrl->device->release = nvme_free_ctrl;
4647 dev_set_drvdata(ctrl->device, ctrl);
4648 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4649 if (ret)
4650 goto out_release_instance;
4651
4652 nvme_get_ctrl(ctrl);
4653 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4654 ctrl->cdev.owner = ops->module;
4655 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4656 if (ret)
4657 goto out_free_name;
4658
4659 /*
4660 * Initialize latency tolerance controls. The sysfs files won't
4661 * be visible to userspace unless the device actually supports APST.
4662 */
4663 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4664 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4665 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4666
4667 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4668 nvme_mpath_init_ctrl(ctrl);
4669 ret = nvme_auth_init_ctrl(ctrl);
4670 if (ret)
4671 goto out_free_cdev;
4672
4673 return 0;
4674out_free_cdev:
4675 nvme_fault_inject_fini(&ctrl->fault_inject);
4676 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4677 cdev_device_del(&ctrl->cdev, ctrl->device);
4678out_free_name:
4679 nvme_put_ctrl(ctrl);
4680 kfree_const(ctrl->device->kobj.name);
4681out_release_instance:
4682 ida_free(&nvme_instance_ida, ctrl->instance);
4683out:
4684 if (ctrl->discard_page)
4685 __free_page(ctrl->discard_page);
4686 return ret;
4687}
4688EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4689
4690/* let I/O to all namespaces fail in preparation for surprise removal */
4691void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4692{
4693 struct nvme_ns *ns;
4694
4695 down_read(&ctrl->namespaces_rwsem);
4696 list_for_each_entry(ns, &ctrl->namespaces, list)
4697 blk_mark_disk_dead(ns->disk);
4698 up_read(&ctrl->namespaces_rwsem);
4699}
4700EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4701
4702void nvme_unfreeze(struct nvme_ctrl *ctrl)
4703{
4704 struct nvme_ns *ns;
4705
4706 down_read(&ctrl->namespaces_rwsem);
4707 list_for_each_entry(ns, &ctrl->namespaces, list)
4708 blk_mq_unfreeze_queue(ns->queue);
4709 up_read(&ctrl->namespaces_rwsem);
4710 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4711}
4712EXPORT_SYMBOL_GPL(nvme_unfreeze);
4713
4714int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4715{
4716 struct nvme_ns *ns;
4717
4718 down_read(&ctrl->namespaces_rwsem);
4719 list_for_each_entry(ns, &ctrl->namespaces, list) {
4720 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4721 if (timeout <= 0)
4722 break;
4723 }
4724 up_read(&ctrl->namespaces_rwsem);
4725 return timeout;
4726}
4727EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4728
4729void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4730{
4731 struct nvme_ns *ns;
4732
4733 down_read(&ctrl->namespaces_rwsem);
4734 list_for_each_entry(ns, &ctrl->namespaces, list)
4735 blk_mq_freeze_queue_wait(ns->queue);
4736 up_read(&ctrl->namespaces_rwsem);
4737}
4738EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4739
4740void nvme_start_freeze(struct nvme_ctrl *ctrl)
4741{
4742 struct nvme_ns *ns;
4743
4744 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4745 down_read(&ctrl->namespaces_rwsem);
4746 list_for_each_entry(ns, &ctrl->namespaces, list)
4747 blk_freeze_queue_start(ns->queue);
4748 up_read(&ctrl->namespaces_rwsem);
4749}
4750EXPORT_SYMBOL_GPL(nvme_start_freeze);
4751
4752void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4753{
4754 if (!ctrl->tagset)
4755 return;
4756 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4757 blk_mq_quiesce_tagset(ctrl->tagset);
4758 else
4759 blk_mq_wait_quiesce_done(ctrl->tagset);
4760}
4761EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4762
4763void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4764{
4765 if (!ctrl->tagset)
4766 return;
4767 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4768 blk_mq_unquiesce_tagset(ctrl->tagset);
4769}
4770EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4771
4772void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4773{
4774 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4775 blk_mq_quiesce_queue(ctrl->admin_q);
4776 else
4777 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4778}
4779EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4780
4781void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4782{
4783 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4784 blk_mq_unquiesce_queue(ctrl->admin_q);
4785}
4786EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4787
4788void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4789{
4790 struct nvme_ns *ns;
4791
4792 down_read(&ctrl->namespaces_rwsem);
4793 list_for_each_entry(ns, &ctrl->namespaces, list)
4794 blk_sync_queue(ns->queue);
4795 up_read(&ctrl->namespaces_rwsem);
4796}
4797EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4798
4799void nvme_sync_queues(struct nvme_ctrl *ctrl)
4800{
4801 nvme_sync_io_queues(ctrl);
4802 if (ctrl->admin_q)
4803 blk_sync_queue(ctrl->admin_q);
4804}
4805EXPORT_SYMBOL_GPL(nvme_sync_queues);
4806
4807struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4808{
4809 if (file->f_op != &nvme_dev_fops)
4810 return NULL;
4811 return file->private_data;
4812}
4813EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4814
4815/*
4816 * Check we didn't inadvertently grow the command structure sizes:
4817 */
4818static inline void _nvme_check_size(void)
4819{
4820 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4821 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4822 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4823 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4824 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4825 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4826 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4827 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4828 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4829 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4830 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4831 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4832 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4833 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4834 NVME_IDENTIFY_DATA_SIZE);
4835 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4836 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4837 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4838 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4839 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4840 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4841 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4842 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4843 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4844}
4845
4846
4847static int __init nvme_core_init(void)
4848{
4849 int result = -ENOMEM;
4850
4851 _nvme_check_size();
4852
4853 nvme_wq = alloc_workqueue("nvme-wq",
4854 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4855 if (!nvme_wq)
4856 goto out;
4857
4858 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4859 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4860 if (!nvme_reset_wq)
4861 goto destroy_wq;
4862
4863 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4864 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4865 if (!nvme_delete_wq)
4866 goto destroy_reset_wq;
4867
4868 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4869 NVME_MINORS, "nvme");
4870 if (result < 0)
4871 goto destroy_delete_wq;
4872
4873 nvme_class = class_create("nvme");
4874 if (IS_ERR(nvme_class)) {
4875 result = PTR_ERR(nvme_class);
4876 goto unregister_chrdev;
4877 }
4878 nvme_class->dev_uevent = nvme_class_uevent;
4879
4880 nvme_subsys_class = class_create("nvme-subsystem");
4881 if (IS_ERR(nvme_subsys_class)) {
4882 result = PTR_ERR(nvme_subsys_class);
4883 goto destroy_class;
4884 }
4885
4886 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4887 "nvme-generic");
4888 if (result < 0)
4889 goto destroy_subsys_class;
4890
4891 nvme_ns_chr_class = class_create("nvme-generic");
4892 if (IS_ERR(nvme_ns_chr_class)) {
4893 result = PTR_ERR(nvme_ns_chr_class);
4894 goto unregister_generic_ns;
4895 }
4896 result = nvme_init_auth();
4897 if (result)
4898 goto destroy_ns_chr;
4899 return 0;
4900
4901destroy_ns_chr:
4902 class_destroy(nvme_ns_chr_class);
4903unregister_generic_ns:
4904 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4905destroy_subsys_class:
4906 class_destroy(nvme_subsys_class);
4907destroy_class:
4908 class_destroy(nvme_class);
4909unregister_chrdev:
4910 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4911destroy_delete_wq:
4912 destroy_workqueue(nvme_delete_wq);
4913destroy_reset_wq:
4914 destroy_workqueue(nvme_reset_wq);
4915destroy_wq:
4916 destroy_workqueue(nvme_wq);
4917out:
4918 return result;
4919}
4920
4921static void __exit nvme_core_exit(void)
4922{
4923 nvme_exit_auth();
4924 class_destroy(nvme_ns_chr_class);
4925 class_destroy(nvme_subsys_class);
4926 class_destroy(nvme_class);
4927 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4928 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4929 destroy_workqueue(nvme_delete_wq);
4930 destroy_workqueue(nvme_reset_wq);
4931 destroy_workqueue(nvme_wq);
4932 ida_destroy(&nvme_ns_chr_minor_ida);
4933 ida_destroy(&nvme_instance_ida);
4934}
4935
4936MODULE_LICENSE("GPL");
4937MODULE_VERSION("1.0");
4938MODULE_DESCRIPTION("NVMe host core framework");
4939module_init(nvme_core_init);
4940module_exit(nvme_core_exit);
Linux 6.x block layer and io_uring tree(s)