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block: pass a queue_limits argument to blk_alloc_queue
[linux-2.6-block.git] / drivers / nvme / host / core.c
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7#include <linux/blkdev.h>
8#include <linux/blk-mq.h>
9#include <linux/blk-integrity.h>
10#include <linux/compat.h>
11#include <linux/delay.h>
12#include <linux/errno.h>
13#include <linux/hdreg.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/backing-dev.h>
17#include <linux/slab.h>
18#include <linux/types.h>
19#include <linux/pr.h>
20#include <linux/ptrace.h>
21#include <linux/nvme_ioctl.h>
22#include <linux/pm_qos.h>
23#include <linux/ratelimit.h>
24#include <asm/unaligned.h>
25
26#include "nvme.h"
27#include "fabrics.h"
28#include <linux/nvme-auth.h>
29
30#define CREATE_TRACE_POINTS
31#include "trace.h"
32
33#define NVME_MINORS (1U << MINORBITS)
34
35struct nvme_ns_info {
36 struct nvme_ns_ids ids;
37 u32 nsid;
38 __le32 anagrpid;
39 bool is_shared;
40 bool is_readonly;
41 bool is_ready;
42 bool is_removed;
43};
44
45unsigned int admin_timeout = 60;
46module_param(admin_timeout, uint, 0644);
47MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
48EXPORT_SYMBOL_GPL(admin_timeout);
49
50unsigned int nvme_io_timeout = 30;
51module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
52MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
53EXPORT_SYMBOL_GPL(nvme_io_timeout);
54
55static unsigned char shutdown_timeout = 5;
56module_param(shutdown_timeout, byte, 0644);
57MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
58
59static u8 nvme_max_retries = 5;
60module_param_named(max_retries, nvme_max_retries, byte, 0644);
61MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
62
63static unsigned long default_ps_max_latency_us = 100000;
64module_param(default_ps_max_latency_us, ulong, 0644);
65MODULE_PARM_DESC(default_ps_max_latency_us,
66 "max power saving latency for new devices; use PM QOS to change per device");
67
68static bool force_apst;
69module_param(force_apst, bool, 0644);
70MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
71
72static unsigned long apst_primary_timeout_ms = 100;
73module_param(apst_primary_timeout_ms, ulong, 0644);
74MODULE_PARM_DESC(apst_primary_timeout_ms,
75 "primary APST timeout in ms");
76
77static unsigned long apst_secondary_timeout_ms = 2000;
78module_param(apst_secondary_timeout_ms, ulong, 0644);
79MODULE_PARM_DESC(apst_secondary_timeout_ms,
80 "secondary APST timeout in ms");
81
82static unsigned long apst_primary_latency_tol_us = 15000;
83module_param(apst_primary_latency_tol_us, ulong, 0644);
84MODULE_PARM_DESC(apst_primary_latency_tol_us,
85 "primary APST latency tolerance in us");
86
87static unsigned long apst_secondary_latency_tol_us = 100000;
88module_param(apst_secondary_latency_tol_us, ulong, 0644);
89MODULE_PARM_DESC(apst_secondary_latency_tol_us,
90 "secondary APST latency tolerance in us");
91
92/*
93 * nvme_wq - hosts nvme related works that are not reset or delete
94 * nvme_reset_wq - hosts nvme reset works
95 * nvme_delete_wq - hosts nvme delete works
96 *
97 * nvme_wq will host works such as scan, aen handling, fw activation,
98 * keep-alive, periodic reconnects etc. nvme_reset_wq
99 * runs reset works which also flush works hosted on nvme_wq for
100 * serialization purposes. nvme_delete_wq host controller deletion
101 * works which flush reset works for serialization.
102 */
103struct workqueue_struct *nvme_wq;
104EXPORT_SYMBOL_GPL(nvme_wq);
105
106struct workqueue_struct *nvme_reset_wq;
107EXPORT_SYMBOL_GPL(nvme_reset_wq);
108
109struct workqueue_struct *nvme_delete_wq;
110EXPORT_SYMBOL_GPL(nvme_delete_wq);
111
112static LIST_HEAD(nvme_subsystems);
113static DEFINE_MUTEX(nvme_subsystems_lock);
114
115static DEFINE_IDA(nvme_instance_ida);
116static dev_t nvme_ctrl_base_chr_devt;
117static struct class *nvme_class;
118static struct class *nvme_subsys_class;
119
120static DEFINE_IDA(nvme_ns_chr_minor_ida);
121static dev_t nvme_ns_chr_devt;
122static struct class *nvme_ns_chr_class;
123
124static void nvme_put_subsystem(struct nvme_subsystem *subsys);
125static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
126 unsigned nsid);
127static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
128 struct nvme_command *cmd);
129
130void nvme_queue_scan(struct nvme_ctrl *ctrl)
131{
132 /*
133 * Only new queue scan work when admin and IO queues are both alive
134 */
135 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
136 queue_work(nvme_wq, &ctrl->scan_work);
137}
138
139/*
140 * Use this function to proceed with scheduling reset_work for a controller
141 * that had previously been set to the resetting state. This is intended for
142 * code paths that can't be interrupted by other reset attempts. A hot removal
143 * may prevent this from succeeding.
144 */
145int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
146{
147 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
148 return -EBUSY;
149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
150 return -EBUSY;
151 return 0;
152}
153EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
154
155static void nvme_failfast_work(struct work_struct *work)
156{
157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
158 struct nvme_ctrl, failfast_work);
159
160 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
161 return;
162
163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
164 dev_info(ctrl->device, "failfast expired\n");
165 nvme_kick_requeue_lists(ctrl);
166}
167
168static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
169{
170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
171 return;
172
173 schedule_delayed_work(&ctrl->failfast_work,
174 ctrl->opts->fast_io_fail_tmo * HZ);
175}
176
177static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
178{
179 if (!ctrl->opts)
180 return;
181
182 cancel_delayed_work_sync(&ctrl->failfast_work);
183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
184}
185
186
187int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
188{
189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
190 return -EBUSY;
191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
192 return -EBUSY;
193 return 0;
194}
195EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
196
197int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
198{
199 int ret;
200
201 ret = nvme_reset_ctrl(ctrl);
202 if (!ret) {
203 flush_work(&ctrl->reset_work);
204 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
205 ret = -ENETRESET;
206 }
207
208 return ret;
209}
210
211static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
212{
213 dev_info(ctrl->device,
214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
215
216 flush_work(&ctrl->reset_work);
217 nvme_stop_ctrl(ctrl);
218 nvme_remove_namespaces(ctrl);
219 ctrl->ops->delete_ctrl(ctrl);
220 nvme_uninit_ctrl(ctrl);
221}
222
223static void nvme_delete_ctrl_work(struct work_struct *work)
224{
225 struct nvme_ctrl *ctrl =
226 container_of(work, struct nvme_ctrl, delete_work);
227
228 nvme_do_delete_ctrl(ctrl);
229}
230
231int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
232{
233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
234 return -EBUSY;
235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
236 return -EBUSY;
237 return 0;
238}
239EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
240
241void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
242{
243 /*
244 * Keep a reference until nvme_do_delete_ctrl() complete,
245 * since ->delete_ctrl can free the controller.
246 */
247 nvme_get_ctrl(ctrl);
248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
249 nvme_do_delete_ctrl(ctrl);
250 nvme_put_ctrl(ctrl);
251}
252
253static blk_status_t nvme_error_status(u16 status)
254{
255 switch (status & 0x7ff) {
256 case NVME_SC_SUCCESS:
257 return BLK_STS_OK;
258 case NVME_SC_CAP_EXCEEDED:
259 return BLK_STS_NOSPC;
260 case NVME_SC_LBA_RANGE:
261 case NVME_SC_CMD_INTERRUPTED:
262 case NVME_SC_NS_NOT_READY:
263 return BLK_STS_TARGET;
264 case NVME_SC_BAD_ATTRIBUTES:
265 case NVME_SC_ONCS_NOT_SUPPORTED:
266 case NVME_SC_INVALID_OPCODE:
267 case NVME_SC_INVALID_FIELD:
268 case NVME_SC_INVALID_NS:
269 return BLK_STS_NOTSUPP;
270 case NVME_SC_WRITE_FAULT:
271 case NVME_SC_READ_ERROR:
272 case NVME_SC_UNWRITTEN_BLOCK:
273 case NVME_SC_ACCESS_DENIED:
274 case NVME_SC_READ_ONLY:
275 case NVME_SC_COMPARE_FAILED:
276 return BLK_STS_MEDIUM;
277 case NVME_SC_GUARD_CHECK:
278 case NVME_SC_APPTAG_CHECK:
279 case NVME_SC_REFTAG_CHECK:
280 case NVME_SC_INVALID_PI:
281 return BLK_STS_PROTECTION;
282 case NVME_SC_RESERVATION_CONFLICT:
283 return BLK_STS_RESV_CONFLICT;
284 case NVME_SC_HOST_PATH_ERROR:
285 return BLK_STS_TRANSPORT;
286 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
287 return BLK_STS_ZONE_ACTIVE_RESOURCE;
288 case NVME_SC_ZONE_TOO_MANY_OPEN:
289 return BLK_STS_ZONE_OPEN_RESOURCE;
290 default:
291 return BLK_STS_IOERR;
292 }
293}
294
295static void nvme_retry_req(struct request *req)
296{
297 unsigned long delay = 0;
298 u16 crd;
299
300 /* The mask and shift result must be <= 3 */
301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
302 if (crd)
303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
304
305 nvme_req(req)->retries++;
306 blk_mq_requeue_request(req, false);
307 blk_mq_delay_kick_requeue_list(req->q, delay);
308}
309
310static void nvme_log_error(struct request *req)
311{
312 struct nvme_ns *ns = req->q->queuedata;
313 struct nvme_request *nr = nvme_req(req);
314
315 if (ns) {
316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
317 ns->disk ? ns->disk->disk_name : "?",
318 nvme_get_opcode_str(nr->cmd->common.opcode),
319 nr->cmd->common.opcode,
320 nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
321 blk_rq_bytes(req) >> ns->head->lba_shift,
322 nvme_get_error_status_str(nr->status),
323 nr->status >> 8 & 7, /* Status Code Type */
324 nr->status & 0xff, /* Status Code */
325 nr->status & NVME_SC_MORE ? "MORE " : "",
326 nr->status & NVME_SC_DNR ? "DNR " : "");
327 return;
328 }
329
330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
331 dev_name(nr->ctrl->device),
332 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
333 nr->cmd->common.opcode,
334 nvme_get_error_status_str(nr->status),
335 nr->status >> 8 & 7, /* Status Code Type */
336 nr->status & 0xff, /* Status Code */
337 nr->status & NVME_SC_MORE ? "MORE " : "",
338 nr->status & NVME_SC_DNR ? "DNR " : "");
339}
340
341static void nvme_log_err_passthru(struct request *req)
342{
343 struct nvme_ns *ns = req->q->queuedata;
344 struct nvme_request *nr = nvme_req(req);
345
346 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
347 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
348 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
349 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
350 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
351 nr->cmd->common.opcode,
352 nvme_get_error_status_str(nr->status),
353 nr->status >> 8 & 7, /* Status Code Type */
354 nr->status & 0xff, /* Status Code */
355 nr->status & NVME_SC_MORE ? "MORE " : "",
356 nr->status & NVME_SC_DNR ? "DNR " : "",
357 nr->cmd->common.cdw10,
358 nr->cmd->common.cdw11,
359 nr->cmd->common.cdw12,
360 nr->cmd->common.cdw13,
361 nr->cmd->common.cdw14,
362 nr->cmd->common.cdw14);
363}
364
365enum nvme_disposition {
366 COMPLETE,
367 RETRY,
368 FAILOVER,
369 AUTHENTICATE,
370};
371
372static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
373{
374 if (likely(nvme_req(req)->status == 0))
375 return COMPLETE;
376
377 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
378 return AUTHENTICATE;
379
380 if (blk_noretry_request(req) ||
381 (nvme_req(req)->status & NVME_SC_DNR) ||
382 nvme_req(req)->retries >= nvme_max_retries)
383 return COMPLETE;
384
385 if (req->cmd_flags & REQ_NVME_MPATH) {
386 if (nvme_is_path_error(nvme_req(req)->status) ||
387 blk_queue_dying(req->q))
388 return FAILOVER;
389 } else {
390 if (blk_queue_dying(req->q))
391 return COMPLETE;
392 }
393
394 return RETRY;
395}
396
397static inline void nvme_end_req_zoned(struct request *req)
398{
399 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
400 req_op(req) == REQ_OP_ZONE_APPEND) {
401 struct nvme_ns *ns = req->q->queuedata;
402
403 req->__sector = nvme_lba_to_sect(ns->head,
404 le64_to_cpu(nvme_req(req)->result.u64));
405 }
406}
407
408static inline void nvme_end_req(struct request *req)
409{
410 blk_status_t status = nvme_error_status(nvme_req(req)->status);
411
412 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
413 if (blk_rq_is_passthrough(req))
414 nvme_log_err_passthru(req);
415 else
416 nvme_log_error(req);
417 }
418 nvme_end_req_zoned(req);
419 nvme_trace_bio_complete(req);
420 if (req->cmd_flags & REQ_NVME_MPATH)
421 nvme_mpath_end_request(req);
422 blk_mq_end_request(req, status);
423}
424
425void nvme_complete_rq(struct request *req)
426{
427 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
428
429 trace_nvme_complete_rq(req);
430 nvme_cleanup_cmd(req);
431
432 /*
433 * Completions of long-running commands should not be able to
434 * defer sending of periodic keep alives, since the controller
435 * may have completed processing such commands a long time ago
436 * (arbitrarily close to command submission time).
437 * req->deadline - req->timeout is the command submission time
438 * in jiffies.
439 */
440 if (ctrl->kas &&
441 req->deadline - req->timeout >= ctrl->ka_last_check_time)
442 ctrl->comp_seen = true;
443
444 switch (nvme_decide_disposition(req)) {
445 case COMPLETE:
446 nvme_end_req(req);
447 return;
448 case RETRY:
449 nvme_retry_req(req);
450 return;
451 case FAILOVER:
452 nvme_failover_req(req);
453 return;
454 case AUTHENTICATE:
455#ifdef CONFIG_NVME_HOST_AUTH
456 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
457 nvme_retry_req(req);
458#else
459 nvme_end_req(req);
460#endif
461 return;
462 }
463}
464EXPORT_SYMBOL_GPL(nvme_complete_rq);
465
466void nvme_complete_batch_req(struct request *req)
467{
468 trace_nvme_complete_rq(req);
469 nvme_cleanup_cmd(req);
470 nvme_end_req_zoned(req);
471}
472EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
473
474/*
475 * Called to unwind from ->queue_rq on a failed command submission so that the
476 * multipathing code gets called to potentially failover to another path.
477 * The caller needs to unwind all transport specific resource allocations and
478 * must return propagate the return value.
479 */
480blk_status_t nvme_host_path_error(struct request *req)
481{
482 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
483 blk_mq_set_request_complete(req);
484 nvme_complete_rq(req);
485 return BLK_STS_OK;
486}
487EXPORT_SYMBOL_GPL(nvme_host_path_error);
488
489bool nvme_cancel_request(struct request *req, void *data)
490{
491 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
492 "Cancelling I/O %d", req->tag);
493
494 /* don't abort one completed or idle request */
495 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
496 return true;
497
498 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
499 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
500 blk_mq_complete_request(req);
501 return true;
502}
503EXPORT_SYMBOL_GPL(nvme_cancel_request);
504
505void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
506{
507 if (ctrl->tagset) {
508 blk_mq_tagset_busy_iter(ctrl->tagset,
509 nvme_cancel_request, ctrl);
510 blk_mq_tagset_wait_completed_request(ctrl->tagset);
511 }
512}
513EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
514
515void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
516{
517 if (ctrl->admin_tagset) {
518 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
519 nvme_cancel_request, ctrl);
520 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
521 }
522}
523EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
524
525bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
526 enum nvme_ctrl_state new_state)
527{
528 enum nvme_ctrl_state old_state;
529 unsigned long flags;
530 bool changed = false;
531
532 spin_lock_irqsave(&ctrl->lock, flags);
533
534 old_state = nvme_ctrl_state(ctrl);
535 switch (new_state) {
536 case NVME_CTRL_LIVE:
537 switch (old_state) {
538 case NVME_CTRL_NEW:
539 case NVME_CTRL_RESETTING:
540 case NVME_CTRL_CONNECTING:
541 changed = true;
542 fallthrough;
543 default:
544 break;
545 }
546 break;
547 case NVME_CTRL_RESETTING:
548 switch (old_state) {
549 case NVME_CTRL_NEW:
550 case NVME_CTRL_LIVE:
551 changed = true;
552 fallthrough;
553 default:
554 break;
555 }
556 break;
557 case NVME_CTRL_CONNECTING:
558 switch (old_state) {
559 case NVME_CTRL_NEW:
560 case NVME_CTRL_RESETTING:
561 changed = true;
562 fallthrough;
563 default:
564 break;
565 }
566 break;
567 case NVME_CTRL_DELETING:
568 switch (old_state) {
569 case NVME_CTRL_LIVE:
570 case NVME_CTRL_RESETTING:
571 case NVME_CTRL_CONNECTING:
572 changed = true;
573 fallthrough;
574 default:
575 break;
576 }
577 break;
578 case NVME_CTRL_DELETING_NOIO:
579 switch (old_state) {
580 case NVME_CTRL_DELETING:
581 case NVME_CTRL_DEAD:
582 changed = true;
583 fallthrough;
584 default:
585 break;
586 }
587 break;
588 case NVME_CTRL_DEAD:
589 switch (old_state) {
590 case NVME_CTRL_DELETING:
591 changed = true;
592 fallthrough;
593 default:
594 break;
595 }
596 break;
597 default:
598 break;
599 }
600
601 if (changed) {
602 WRITE_ONCE(ctrl->state, new_state);
603 wake_up_all(&ctrl->state_wq);
604 }
605
606 spin_unlock_irqrestore(&ctrl->lock, flags);
607 if (!changed)
608 return false;
609
610 if (new_state == NVME_CTRL_LIVE) {
611 if (old_state == NVME_CTRL_CONNECTING)
612 nvme_stop_failfast_work(ctrl);
613 nvme_kick_requeue_lists(ctrl);
614 } else if (new_state == NVME_CTRL_CONNECTING &&
615 old_state == NVME_CTRL_RESETTING) {
616 nvme_start_failfast_work(ctrl);
617 }
618 return changed;
619}
620EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
621
622/*
623 * Returns true for sink states that can't ever transition back to live.
624 */
625static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
626{
627 switch (nvme_ctrl_state(ctrl)) {
628 case NVME_CTRL_NEW:
629 case NVME_CTRL_LIVE:
630 case NVME_CTRL_RESETTING:
631 case NVME_CTRL_CONNECTING:
632 return false;
633 case NVME_CTRL_DELETING:
634 case NVME_CTRL_DELETING_NOIO:
635 case NVME_CTRL_DEAD:
636 return true;
637 default:
638 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
639 return true;
640 }
641}
642
643/*
644 * Waits for the controller state to be resetting, or returns false if it is
645 * not possible to ever transition to that state.
646 */
647bool nvme_wait_reset(struct nvme_ctrl *ctrl)
648{
649 wait_event(ctrl->state_wq,
650 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
651 nvme_state_terminal(ctrl));
652 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
653}
654EXPORT_SYMBOL_GPL(nvme_wait_reset);
655
656static void nvme_free_ns_head(struct kref *ref)
657{
658 struct nvme_ns_head *head =
659 container_of(ref, struct nvme_ns_head, ref);
660
661 nvme_mpath_remove_disk(head);
662 ida_free(&head->subsys->ns_ida, head->instance);
663 cleanup_srcu_struct(&head->srcu);
664 nvme_put_subsystem(head->subsys);
665 kfree(head);
666}
667
668bool nvme_tryget_ns_head(struct nvme_ns_head *head)
669{
670 return kref_get_unless_zero(&head->ref);
671}
672
673void nvme_put_ns_head(struct nvme_ns_head *head)
674{
675 kref_put(&head->ref, nvme_free_ns_head);
676}
677
678static void nvme_free_ns(struct kref *kref)
679{
680 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
681
682 put_disk(ns->disk);
683 nvme_put_ns_head(ns->head);
684 nvme_put_ctrl(ns->ctrl);
685 kfree(ns);
686}
687
688static inline bool nvme_get_ns(struct nvme_ns *ns)
689{
690 return kref_get_unless_zero(&ns->kref);
691}
692
693void nvme_put_ns(struct nvme_ns *ns)
694{
695 kref_put(&ns->kref, nvme_free_ns);
696}
697EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
698
699static inline void nvme_clear_nvme_request(struct request *req)
700{
701 nvme_req(req)->status = 0;
702 nvme_req(req)->retries = 0;
703 nvme_req(req)->flags = 0;
704 req->rq_flags |= RQF_DONTPREP;
705}
706
707/* initialize a passthrough request */
708void nvme_init_request(struct request *req, struct nvme_command *cmd)
709{
710 struct nvme_request *nr = nvme_req(req);
711 bool logging_enabled;
712
713 if (req->q->queuedata) {
714 struct nvme_ns *ns = req->q->disk->private_data;
715
716 logging_enabled = ns->passthru_err_log_enabled;
717 req->timeout = NVME_IO_TIMEOUT;
718 } else { /* no queuedata implies admin queue */
719 logging_enabled = nr->ctrl->passthru_err_log_enabled;
720 req->timeout = NVME_ADMIN_TIMEOUT;
721 }
722
723 if (!logging_enabled)
724 req->rq_flags |= RQF_QUIET;
725
726 /* passthru commands should let the driver set the SGL flags */
727 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
728
729 req->cmd_flags |= REQ_FAILFAST_DRIVER;
730 if (req->mq_hctx->type == HCTX_TYPE_POLL)
731 req->cmd_flags |= REQ_POLLED;
732 nvme_clear_nvme_request(req);
733 memcpy(nr->cmd, cmd, sizeof(*cmd));
734}
735EXPORT_SYMBOL_GPL(nvme_init_request);
736
737/*
738 * For something we're not in a state to send to the device the default action
739 * is to busy it and retry it after the controller state is recovered. However,
740 * if the controller is deleting or if anything is marked for failfast or
741 * nvme multipath it is immediately failed.
742 *
743 * Note: commands used to initialize the controller will be marked for failfast.
744 * Note: nvme cli/ioctl commands are marked for failfast.
745 */
746blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
747 struct request *rq)
748{
749 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
750
751 if (state != NVME_CTRL_DELETING_NOIO &&
752 state != NVME_CTRL_DELETING &&
753 state != NVME_CTRL_DEAD &&
754 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
755 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
756 return BLK_STS_RESOURCE;
757 return nvme_host_path_error(rq);
758}
759EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
760
761bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
762 bool queue_live, enum nvme_ctrl_state state)
763{
764 struct nvme_request *req = nvme_req(rq);
765
766 /*
767 * currently we have a problem sending passthru commands
768 * on the admin_q if the controller is not LIVE because we can't
769 * make sure that they are going out after the admin connect,
770 * controller enable and/or other commands in the initialization
771 * sequence. until the controller will be LIVE, fail with
772 * BLK_STS_RESOURCE so that they will be rescheduled.
773 */
774 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
775 return false;
776
777 if (ctrl->ops->flags & NVME_F_FABRICS) {
778 /*
779 * Only allow commands on a live queue, except for the connect
780 * command, which is require to set the queue live in the
781 * appropinquate states.
782 */
783 switch (state) {
784 case NVME_CTRL_CONNECTING:
785 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
786 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
787 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
788 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
789 return true;
790 break;
791 default:
792 break;
793 case NVME_CTRL_DEAD:
794 return false;
795 }
796 }
797
798 return queue_live;
799}
800EXPORT_SYMBOL_GPL(__nvme_check_ready);
801
802static inline void nvme_setup_flush(struct nvme_ns *ns,
803 struct nvme_command *cmnd)
804{
805 memset(cmnd, 0, sizeof(*cmnd));
806 cmnd->common.opcode = nvme_cmd_flush;
807 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
808}
809
810static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
811 struct nvme_command *cmnd)
812{
813 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
814 struct nvme_dsm_range *range;
815 struct bio *bio;
816
817 /*
818 * Some devices do not consider the DSM 'Number of Ranges' field when
819 * determining how much data to DMA. Always allocate memory for maximum
820 * number of segments to prevent device reading beyond end of buffer.
821 */
822 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
823
824 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
825 if (!range) {
826 /*
827 * If we fail allocation our range, fallback to the controller
828 * discard page. If that's also busy, it's safe to return
829 * busy, as we know we can make progress once that's freed.
830 */
831 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
832 return BLK_STS_RESOURCE;
833
834 range = page_address(ns->ctrl->discard_page);
835 }
836
837 if (queue_max_discard_segments(req->q) == 1) {
838 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
839 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
840
841 range[0].cattr = cpu_to_le32(0);
842 range[0].nlb = cpu_to_le32(nlb);
843 range[0].slba = cpu_to_le64(slba);
844 n = 1;
845 } else {
846 __rq_for_each_bio(bio, req) {
847 u64 slba = nvme_sect_to_lba(ns->head,
848 bio->bi_iter.bi_sector);
849 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
850
851 if (n < segments) {
852 range[n].cattr = cpu_to_le32(0);
853 range[n].nlb = cpu_to_le32(nlb);
854 range[n].slba = cpu_to_le64(slba);
855 }
856 n++;
857 }
858 }
859
860 if (WARN_ON_ONCE(n != segments)) {
861 if (virt_to_page(range) == ns->ctrl->discard_page)
862 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
863 else
864 kfree(range);
865 return BLK_STS_IOERR;
866 }
867
868 memset(cmnd, 0, sizeof(*cmnd));
869 cmnd->dsm.opcode = nvme_cmd_dsm;
870 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
871 cmnd->dsm.nr = cpu_to_le32(segments - 1);
872 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
873
874 bvec_set_virt(&req->special_vec, range, alloc_size);
875 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
876
877 return BLK_STS_OK;
878}
879
880static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
881 struct request *req)
882{
883 u32 upper, lower;
884 u64 ref48;
885
886 /* both rw and write zeroes share the same reftag format */
887 switch (ns->head->guard_type) {
888 case NVME_NVM_NS_16B_GUARD:
889 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
890 break;
891 case NVME_NVM_NS_64B_GUARD:
892 ref48 = ext_pi_ref_tag(req);
893 lower = lower_32_bits(ref48);
894 upper = upper_32_bits(ref48);
895
896 cmnd->rw.reftag = cpu_to_le32(lower);
897 cmnd->rw.cdw3 = cpu_to_le32(upper);
898 break;
899 default:
900 break;
901 }
902}
903
904static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
905 struct request *req, struct nvme_command *cmnd)
906{
907 memset(cmnd, 0, sizeof(*cmnd));
908
909 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
910 return nvme_setup_discard(ns, req, cmnd);
911
912 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
913 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
914 cmnd->write_zeroes.slba =
915 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
916 cmnd->write_zeroes.length =
917 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
918
919 if (!(req->cmd_flags & REQ_NOUNMAP) &&
920 (ns->head->features & NVME_NS_DEAC))
921 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
922
923 if (nvme_ns_has_pi(ns->head)) {
924 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
925
926 switch (ns->head->pi_type) {
927 case NVME_NS_DPS_PI_TYPE1:
928 case NVME_NS_DPS_PI_TYPE2:
929 nvme_set_ref_tag(ns, cmnd, req);
930 break;
931 }
932 }
933
934 return BLK_STS_OK;
935}
936
937static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
938 struct request *req, struct nvme_command *cmnd,
939 enum nvme_opcode op)
940{
941 u16 control = 0;
942 u32 dsmgmt = 0;
943
944 if (req->cmd_flags & REQ_FUA)
945 control |= NVME_RW_FUA;
946 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
947 control |= NVME_RW_LR;
948
949 if (req->cmd_flags & REQ_RAHEAD)
950 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
951
952 cmnd->rw.opcode = op;
953 cmnd->rw.flags = 0;
954 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
955 cmnd->rw.cdw2 = 0;
956 cmnd->rw.cdw3 = 0;
957 cmnd->rw.metadata = 0;
958 cmnd->rw.slba =
959 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
960 cmnd->rw.length =
961 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
962 cmnd->rw.reftag = 0;
963 cmnd->rw.apptag = 0;
964 cmnd->rw.appmask = 0;
965
966 if (ns->head->ms) {
967 /*
968 * If formated with metadata, the block layer always provides a
969 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
970 * we enable the PRACT bit for protection information or set the
971 * namespace capacity to zero to prevent any I/O.
972 */
973 if (!blk_integrity_rq(req)) {
974 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
975 return BLK_STS_NOTSUPP;
976 control |= NVME_RW_PRINFO_PRACT;
977 }
978
979 switch (ns->head->pi_type) {
980 case NVME_NS_DPS_PI_TYPE3:
981 control |= NVME_RW_PRINFO_PRCHK_GUARD;
982 break;
983 case NVME_NS_DPS_PI_TYPE1:
984 case NVME_NS_DPS_PI_TYPE2:
985 control |= NVME_RW_PRINFO_PRCHK_GUARD |
986 NVME_RW_PRINFO_PRCHK_REF;
987 if (op == nvme_cmd_zone_append)
988 control |= NVME_RW_APPEND_PIREMAP;
989 nvme_set_ref_tag(ns, cmnd, req);
990 break;
991 }
992 }
993
994 cmnd->rw.control = cpu_to_le16(control);
995 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
996 return 0;
997}
998
999void nvme_cleanup_cmd(struct request *req)
1000{
1001 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1002 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1003
1004 if (req->special_vec.bv_page == ctrl->discard_page)
1005 clear_bit_unlock(0, &ctrl->discard_page_busy);
1006 else
1007 kfree(bvec_virt(&req->special_vec));
1008 }
1009}
1010EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1011
1012blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1013{
1014 struct nvme_command *cmd = nvme_req(req)->cmd;
1015 blk_status_t ret = BLK_STS_OK;
1016
1017 if (!(req->rq_flags & RQF_DONTPREP))
1018 nvme_clear_nvme_request(req);
1019
1020 switch (req_op(req)) {
1021 case REQ_OP_DRV_IN:
1022 case REQ_OP_DRV_OUT:
1023 /* these are setup prior to execution in nvme_init_request() */
1024 break;
1025 case REQ_OP_FLUSH:
1026 nvme_setup_flush(ns, cmd);
1027 break;
1028 case REQ_OP_ZONE_RESET_ALL:
1029 case REQ_OP_ZONE_RESET:
1030 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1031 break;
1032 case REQ_OP_ZONE_OPEN:
1033 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1034 break;
1035 case REQ_OP_ZONE_CLOSE:
1036 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1037 break;
1038 case REQ_OP_ZONE_FINISH:
1039 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1040 break;
1041 case REQ_OP_WRITE_ZEROES:
1042 ret = nvme_setup_write_zeroes(ns, req, cmd);
1043 break;
1044 case REQ_OP_DISCARD:
1045 ret = nvme_setup_discard(ns, req, cmd);
1046 break;
1047 case REQ_OP_READ:
1048 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1049 break;
1050 case REQ_OP_WRITE:
1051 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1052 break;
1053 case REQ_OP_ZONE_APPEND:
1054 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1055 break;
1056 default:
1057 WARN_ON_ONCE(1);
1058 return BLK_STS_IOERR;
1059 }
1060
1061 cmd->common.command_id = nvme_cid(req);
1062 trace_nvme_setup_cmd(req, cmd);
1063 return ret;
1064}
1065EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1066
1067/*
1068 * Return values:
1069 * 0: success
1070 * >0: nvme controller's cqe status response
1071 * <0: kernel error in lieu of controller response
1072 */
1073int nvme_execute_rq(struct request *rq, bool at_head)
1074{
1075 blk_status_t status;
1076
1077 status = blk_execute_rq(rq, at_head);
1078 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1079 return -EINTR;
1080 if (nvme_req(rq)->status)
1081 return nvme_req(rq)->status;
1082 return blk_status_to_errno(status);
1083}
1084EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1085
1086/*
1087 * Returns 0 on success. If the result is negative, it's a Linux error code;
1088 * if the result is positive, it's an NVM Express status code
1089 */
1090int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1091 union nvme_result *result, void *buffer, unsigned bufflen,
1092 int qid, nvme_submit_flags_t flags)
1093{
1094 struct request *req;
1095 int ret;
1096 blk_mq_req_flags_t blk_flags = 0;
1097
1098 if (flags & NVME_SUBMIT_NOWAIT)
1099 blk_flags |= BLK_MQ_REQ_NOWAIT;
1100 if (flags & NVME_SUBMIT_RESERVED)
1101 blk_flags |= BLK_MQ_REQ_RESERVED;
1102 if (qid == NVME_QID_ANY)
1103 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1104 else
1105 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1106 qid - 1);
1107
1108 if (IS_ERR(req))
1109 return PTR_ERR(req);
1110 nvme_init_request(req, cmd);
1111 if (flags & NVME_SUBMIT_RETRY)
1112 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1113
1114 if (buffer && bufflen) {
1115 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1116 if (ret)
1117 goto out;
1118 }
1119
1120 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1121 if (result && ret >= 0)
1122 *result = nvme_req(req)->result;
1123 out:
1124 blk_mq_free_request(req);
1125 return ret;
1126}
1127EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1128
1129int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1130 void *buffer, unsigned bufflen)
1131{
1132 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1133 NVME_QID_ANY, 0);
1134}
1135EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1136
1137u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1138{
1139 u32 effects = 0;
1140
1141 if (ns) {
1142 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1143 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1144 dev_warn_once(ctrl->device,
1145 "IO command:%02x has unusual effects:%08x\n",
1146 opcode, effects);
1147
1148 /*
1149 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1150 * which would deadlock when done on an I/O command. Note that
1151 * We already warn about an unusual effect above.
1152 */
1153 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1154 } else {
1155 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1156 }
1157
1158 return effects;
1159}
1160EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1161
1162u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1163{
1164 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1165
1166 /*
1167 * For simplicity, IO to all namespaces is quiesced even if the command
1168 * effects say only one namespace is affected.
1169 */
1170 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1171 mutex_lock(&ctrl->scan_lock);
1172 mutex_lock(&ctrl->subsys->lock);
1173 nvme_mpath_start_freeze(ctrl->subsys);
1174 nvme_mpath_wait_freeze(ctrl->subsys);
1175 nvme_start_freeze(ctrl);
1176 nvme_wait_freeze(ctrl);
1177 }
1178 return effects;
1179}
1180EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1181
1182void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1183 struct nvme_command *cmd, int status)
1184{
1185 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1186 nvme_unfreeze(ctrl);
1187 nvme_mpath_unfreeze(ctrl->subsys);
1188 mutex_unlock(&ctrl->subsys->lock);
1189 mutex_unlock(&ctrl->scan_lock);
1190 }
1191 if (effects & NVME_CMD_EFFECTS_CCC) {
1192 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1193 &ctrl->flags)) {
1194 dev_info(ctrl->device,
1195"controller capabilities changed, reset may be required to take effect.\n");
1196 }
1197 }
1198 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1199 nvme_queue_scan(ctrl);
1200 flush_work(&ctrl->scan_work);
1201 }
1202 if (ns)
1203 return;
1204
1205 switch (cmd->common.opcode) {
1206 case nvme_admin_set_features:
1207 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1208 case NVME_FEAT_KATO:
1209 /*
1210 * Keep alive commands interval on the host should be
1211 * updated when KATO is modified by Set Features
1212 * commands.
1213 */
1214 if (!status)
1215 nvme_update_keep_alive(ctrl, cmd);
1216 break;
1217 default:
1218 break;
1219 }
1220 break;
1221 default:
1222 break;
1223 }
1224}
1225EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1226
1227/*
1228 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1229 *
1230 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1231 * accounting for transport roundtrip times [..].
1232 */
1233static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1234{
1235 unsigned long delay = ctrl->kato * HZ / 2;
1236
1237 /*
1238 * When using Traffic Based Keep Alive, we need to run
1239 * nvme_keep_alive_work at twice the normal frequency, as one
1240 * command completion can postpone sending a keep alive command
1241 * by up to twice the delay between runs.
1242 */
1243 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1244 delay /= 2;
1245 return delay;
1246}
1247
1248static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1249{
1250 unsigned long now = jiffies;
1251 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1252 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1253
1254 if (time_after(now, ka_next_check_tm))
1255 delay = 0;
1256 else
1257 delay = ka_next_check_tm - now;
1258
1259 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1260}
1261
1262static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1263 blk_status_t status)
1264{
1265 struct nvme_ctrl *ctrl = rq->end_io_data;
1266 unsigned long flags;
1267 bool startka = false;
1268 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1269 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1270
1271 /*
1272 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1273 * at the desired frequency.
1274 */
1275 if (rtt <= delay) {
1276 delay -= rtt;
1277 } else {
1278 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1279 jiffies_to_msecs(rtt));
1280 delay = 0;
1281 }
1282
1283 blk_mq_free_request(rq);
1284
1285 if (status) {
1286 dev_err(ctrl->device,
1287 "failed nvme_keep_alive_end_io error=%d\n",
1288 status);
1289 return RQ_END_IO_NONE;
1290 }
1291
1292 ctrl->ka_last_check_time = jiffies;
1293 ctrl->comp_seen = false;
1294 spin_lock_irqsave(&ctrl->lock, flags);
1295 if (ctrl->state == NVME_CTRL_LIVE ||
1296 ctrl->state == NVME_CTRL_CONNECTING)
1297 startka = true;
1298 spin_unlock_irqrestore(&ctrl->lock, flags);
1299 if (startka)
1300 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1301 return RQ_END_IO_NONE;
1302}
1303
1304static void nvme_keep_alive_work(struct work_struct *work)
1305{
1306 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1307 struct nvme_ctrl, ka_work);
1308 bool comp_seen = ctrl->comp_seen;
1309 struct request *rq;
1310
1311 ctrl->ka_last_check_time = jiffies;
1312
1313 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1314 dev_dbg(ctrl->device,
1315 "reschedule traffic based keep-alive timer\n");
1316 ctrl->comp_seen = false;
1317 nvme_queue_keep_alive_work(ctrl);
1318 return;
1319 }
1320
1321 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1322 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1323 if (IS_ERR(rq)) {
1324 /* allocation failure, reset the controller */
1325 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1326 nvme_reset_ctrl(ctrl);
1327 return;
1328 }
1329 nvme_init_request(rq, &ctrl->ka_cmd);
1330
1331 rq->timeout = ctrl->kato * HZ;
1332 rq->end_io = nvme_keep_alive_end_io;
1333 rq->end_io_data = ctrl;
1334 blk_execute_rq_nowait(rq, false);
1335}
1336
1337static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1338{
1339 if (unlikely(ctrl->kato == 0))
1340 return;
1341
1342 nvme_queue_keep_alive_work(ctrl);
1343}
1344
1345void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1346{
1347 if (unlikely(ctrl->kato == 0))
1348 return;
1349
1350 cancel_delayed_work_sync(&ctrl->ka_work);
1351}
1352EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1353
1354static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1355 struct nvme_command *cmd)
1356{
1357 unsigned int new_kato =
1358 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1359
1360 dev_info(ctrl->device,
1361 "keep alive interval updated from %u ms to %u ms\n",
1362 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1363
1364 nvme_stop_keep_alive(ctrl);
1365 ctrl->kato = new_kato;
1366 nvme_start_keep_alive(ctrl);
1367}
1368
1369/*
1370 * In NVMe 1.0 the CNS field was just a binary controller or namespace
1371 * flag, thus sending any new CNS opcodes has a big chance of not working.
1372 * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1373 * (but not for any later version).
1374 */
1375static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1376{
1377 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1378 return ctrl->vs < NVME_VS(1, 2, 0);
1379 return ctrl->vs < NVME_VS(1, 1, 0);
1380}
1381
1382static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1383{
1384 struct nvme_command c = { };
1385 int error;
1386
1387 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1388 c.identify.opcode = nvme_admin_identify;
1389 c.identify.cns = NVME_ID_CNS_CTRL;
1390
1391 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1392 if (!*id)
1393 return -ENOMEM;
1394
1395 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1396 sizeof(struct nvme_id_ctrl));
1397 if (error)
1398 kfree(*id);
1399 return error;
1400}
1401
1402static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1403 struct nvme_ns_id_desc *cur, bool *csi_seen)
1404{
1405 const char *warn_str = "ctrl returned bogus length:";
1406 void *data = cur;
1407
1408 switch (cur->nidt) {
1409 case NVME_NIDT_EUI64:
1410 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1411 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1412 warn_str, cur->nidl);
1413 return -1;
1414 }
1415 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1416 return NVME_NIDT_EUI64_LEN;
1417 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1418 return NVME_NIDT_EUI64_LEN;
1419 case NVME_NIDT_NGUID:
1420 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1421 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1422 warn_str, cur->nidl);
1423 return -1;
1424 }
1425 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1426 return NVME_NIDT_NGUID_LEN;
1427 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1428 return NVME_NIDT_NGUID_LEN;
1429 case NVME_NIDT_UUID:
1430 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1431 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1432 warn_str, cur->nidl);
1433 return -1;
1434 }
1435 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1436 return NVME_NIDT_UUID_LEN;
1437 uuid_copy(&ids->uuid, data + sizeof(*cur));
1438 return NVME_NIDT_UUID_LEN;
1439 case NVME_NIDT_CSI:
1440 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1441 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1442 warn_str, cur->nidl);
1443 return -1;
1444 }
1445 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1446 *csi_seen = true;
1447 return NVME_NIDT_CSI_LEN;
1448 default:
1449 /* Skip unknown types */
1450 return cur->nidl;
1451 }
1452}
1453
1454static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1455 struct nvme_ns_info *info)
1456{
1457 struct nvme_command c = { };
1458 bool csi_seen = false;
1459 int status, pos, len;
1460 void *data;
1461
1462 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1463 return 0;
1464 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1465 return 0;
1466
1467 c.identify.opcode = nvme_admin_identify;
1468 c.identify.nsid = cpu_to_le32(info->nsid);
1469 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1470
1471 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1472 if (!data)
1473 return -ENOMEM;
1474
1475 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1476 NVME_IDENTIFY_DATA_SIZE);
1477 if (status) {
1478 dev_warn(ctrl->device,
1479 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1480 info->nsid, status);
1481 goto free_data;
1482 }
1483
1484 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1485 struct nvme_ns_id_desc *cur = data + pos;
1486
1487 if (cur->nidl == 0)
1488 break;
1489
1490 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1491 if (len < 0)
1492 break;
1493
1494 len += sizeof(*cur);
1495 }
1496
1497 if (nvme_multi_css(ctrl) && !csi_seen) {
1498 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1499 info->nsid);
1500 status = -EINVAL;
1501 }
1502
1503free_data:
1504 kfree(data);
1505 return status;
1506}
1507
1508int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1509 struct nvme_id_ns **id)
1510{
1511 struct nvme_command c = { };
1512 int error;
1513
1514 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1515 c.identify.opcode = nvme_admin_identify;
1516 c.identify.nsid = cpu_to_le32(nsid);
1517 c.identify.cns = NVME_ID_CNS_NS;
1518
1519 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1520 if (!*id)
1521 return -ENOMEM;
1522
1523 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1524 if (error) {
1525 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1526 kfree(*id);
1527 }
1528 return error;
1529}
1530
1531static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1532 struct nvme_ns_info *info)
1533{
1534 struct nvme_ns_ids *ids = &info->ids;
1535 struct nvme_id_ns *id;
1536 int ret;
1537
1538 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1539 if (ret)
1540 return ret;
1541
1542 if (id->ncap == 0) {
1543 /* namespace not allocated or attached */
1544 info->is_removed = true;
1545 ret = -ENODEV;
1546 goto error;
1547 }
1548
1549 info->anagrpid = id->anagrpid;
1550 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1551 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1552 info->is_ready = true;
1553 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1554 dev_info(ctrl->device,
1555 "Ignoring bogus Namespace Identifiers\n");
1556 } else {
1557 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1558 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1559 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1560 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1561 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1562 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1563 }
1564
1565error:
1566 kfree(id);
1567 return ret;
1568}
1569
1570static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1571 struct nvme_ns_info *info)
1572{
1573 struct nvme_id_ns_cs_indep *id;
1574 struct nvme_command c = {
1575 .identify.opcode = nvme_admin_identify,
1576 .identify.nsid = cpu_to_le32(info->nsid),
1577 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1578 };
1579 int ret;
1580
1581 id = kmalloc(sizeof(*id), GFP_KERNEL);
1582 if (!id)
1583 return -ENOMEM;
1584
1585 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1586 if (!ret) {
1587 info->anagrpid = id->anagrpid;
1588 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1589 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1590 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1591 }
1592 kfree(id);
1593 return ret;
1594}
1595
1596static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1597 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1598{
1599 union nvme_result res = { 0 };
1600 struct nvme_command c = { };
1601 int ret;
1602
1603 c.features.opcode = op;
1604 c.features.fid = cpu_to_le32(fid);
1605 c.features.dword11 = cpu_to_le32(dword11);
1606
1607 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1608 buffer, buflen, NVME_QID_ANY, 0);
1609 if (ret >= 0 && result)
1610 *result = le32_to_cpu(res.u32);
1611 return ret;
1612}
1613
1614int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1615 unsigned int dword11, void *buffer, size_t buflen,
1616 u32 *result)
1617{
1618 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1619 buflen, result);
1620}
1621EXPORT_SYMBOL_GPL(nvme_set_features);
1622
1623int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1624 unsigned int dword11, void *buffer, size_t buflen,
1625 u32 *result)
1626{
1627 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1628 buflen, result);
1629}
1630EXPORT_SYMBOL_GPL(nvme_get_features);
1631
1632int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1633{
1634 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1635 u32 result;
1636 int status, nr_io_queues;
1637
1638 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1639 &result);
1640 if (status < 0)
1641 return status;
1642
1643 /*
1644 * Degraded controllers might return an error when setting the queue
1645 * count. We still want to be able to bring them online and offer
1646 * access to the admin queue, as that might be only way to fix them up.
1647 */
1648 if (status > 0) {
1649 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1650 *count = 0;
1651 } else {
1652 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1653 *count = min(*count, nr_io_queues);
1654 }
1655
1656 return 0;
1657}
1658EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1659
1660#define NVME_AEN_SUPPORTED \
1661 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1662 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1663
1664static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1665{
1666 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1667 int status;
1668
1669 if (!supported_aens)
1670 return;
1671
1672 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1673 NULL, 0, &result);
1674 if (status)
1675 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1676 supported_aens);
1677
1678 queue_work(nvme_wq, &ctrl->async_event_work);
1679}
1680
1681static int nvme_ns_open(struct nvme_ns *ns)
1682{
1683
1684 /* should never be called due to GENHD_FL_HIDDEN */
1685 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1686 goto fail;
1687 if (!nvme_get_ns(ns))
1688 goto fail;
1689 if (!try_module_get(ns->ctrl->ops->module))
1690 goto fail_put_ns;
1691
1692 return 0;
1693
1694fail_put_ns:
1695 nvme_put_ns(ns);
1696fail:
1697 return -ENXIO;
1698}
1699
1700static void nvme_ns_release(struct nvme_ns *ns)
1701{
1702
1703 module_put(ns->ctrl->ops->module);
1704 nvme_put_ns(ns);
1705}
1706
1707static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1708{
1709 return nvme_ns_open(disk->private_data);
1710}
1711
1712static void nvme_release(struct gendisk *disk)
1713{
1714 nvme_ns_release(disk->private_data);
1715}
1716
1717int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1718{
1719 /* some standard values */
1720 geo->heads = 1 << 6;
1721 geo->sectors = 1 << 5;
1722 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1723 return 0;
1724}
1725
1726#ifdef CONFIG_BLK_DEV_INTEGRITY
1727static void nvme_init_integrity(struct gendisk *disk,
1728 struct nvme_ns_head *head, u32 max_integrity_segments)
1729{
1730 struct blk_integrity integrity = { };
1731
1732 switch (head->pi_type) {
1733 case NVME_NS_DPS_PI_TYPE3:
1734 switch (head->guard_type) {
1735 case NVME_NVM_NS_16B_GUARD:
1736 integrity.profile = &t10_pi_type3_crc;
1737 integrity.tag_size = sizeof(u16) + sizeof(u32);
1738 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1739 break;
1740 case NVME_NVM_NS_64B_GUARD:
1741 integrity.profile = &ext_pi_type3_crc64;
1742 integrity.tag_size = sizeof(u16) + 6;
1743 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1744 break;
1745 default:
1746 integrity.profile = NULL;
1747 break;
1748 }
1749 break;
1750 case NVME_NS_DPS_PI_TYPE1:
1751 case NVME_NS_DPS_PI_TYPE2:
1752 switch (head->guard_type) {
1753 case NVME_NVM_NS_16B_GUARD:
1754 integrity.profile = &t10_pi_type1_crc;
1755 integrity.tag_size = sizeof(u16);
1756 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1757 break;
1758 case NVME_NVM_NS_64B_GUARD:
1759 integrity.profile = &ext_pi_type1_crc64;
1760 integrity.tag_size = sizeof(u16);
1761 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1762 break;
1763 default:
1764 integrity.profile = NULL;
1765 break;
1766 }
1767 break;
1768 default:
1769 integrity.profile = NULL;
1770 break;
1771 }
1772
1773 integrity.tuple_size = head->ms;
1774 integrity.pi_offset = head->pi_offset;
1775 blk_integrity_register(disk, &integrity);
1776 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1777}
1778#else
1779static void nvme_init_integrity(struct gendisk *disk,
1780 struct nvme_ns_head *head, u32 max_integrity_segments)
1781{
1782}
1783#endif /* CONFIG_BLK_DEV_INTEGRITY */
1784
1785static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk,
1786 struct nvme_ns_head *head)
1787{
1788 struct request_queue *queue = disk->queue;
1789 u32 max_discard_sectors;
1790
1791 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) {
1792 max_discard_sectors = nvme_lba_to_sect(head, ctrl->dmrsl);
1793 } else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
1794 max_discard_sectors = UINT_MAX;
1795 } else {
1796 blk_queue_max_discard_sectors(queue, 0);
1797 return;
1798 }
1799
1800 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1801 NVME_DSM_MAX_RANGES);
1802
1803 /*
1804 * If discard is already enabled, don't reset queue limits.
1805 *
1806 * This works around the fact that the block layer can't cope well with
1807 * updating the hardware limits when overridden through sysfs. This is
1808 * harmless because discard limits in NVMe are purely advisory.
1809 */
1810 if (queue->limits.max_discard_sectors)
1811 return;
1812
1813 blk_queue_max_discard_sectors(queue, max_discard_sectors);
1814 if (ctrl->dmrl)
1815 blk_queue_max_discard_segments(queue, ctrl->dmrl);
1816 else
1817 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
1818 queue->limits.discard_granularity = queue_logical_block_size(queue);
1819
1820 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1821 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1822}
1823
1824static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1825{
1826 return uuid_equal(&a->uuid, &b->uuid) &&
1827 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1828 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1829 a->csi == b->csi;
1830}
1831
1832static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head,
1833 struct nvme_id_ns *id)
1834{
1835 bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1836 unsigned lbaf = nvme_lbaf_index(id->flbas);
1837 struct nvme_command c = { };
1838 struct nvme_id_ns_nvm *nvm;
1839 int ret = 0;
1840 u32 elbaf;
1841
1842 head->pi_size = 0;
1843 head->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1844 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1845 head->pi_size = sizeof(struct t10_pi_tuple);
1846 head->guard_type = NVME_NVM_NS_16B_GUARD;
1847 goto set_pi;
1848 }
1849
1850 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1851 if (!nvm)
1852 return -ENOMEM;
1853
1854 c.identify.opcode = nvme_admin_identify;
1855 c.identify.nsid = cpu_to_le32(head->ns_id);
1856 c.identify.cns = NVME_ID_CNS_CS_NS;
1857 c.identify.csi = NVME_CSI_NVM;
1858
1859 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1860 if (ret)
1861 goto free_data;
1862
1863 elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1864
1865 /* no support for storage tag formats right now */
1866 if (nvme_elbaf_sts(elbaf))
1867 goto free_data;
1868
1869 head->guard_type = nvme_elbaf_guard_type(elbaf);
1870 switch (head->guard_type) {
1871 case NVME_NVM_NS_64B_GUARD:
1872 head->pi_size = sizeof(struct crc64_pi_tuple);
1873 break;
1874 case NVME_NVM_NS_16B_GUARD:
1875 head->pi_size = sizeof(struct t10_pi_tuple);
1876 break;
1877 default:
1878 break;
1879 }
1880
1881free_data:
1882 kfree(nvm);
1883set_pi:
1884 if (head->pi_size && head->ms >= head->pi_size)
1885 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1886 else
1887 head->pi_type = 0;
1888
1889 if (first)
1890 head->pi_offset = 0;
1891 else
1892 head->pi_offset = head->ms - head->pi_size;
1893
1894 return ret;
1895}
1896
1897static int nvme_configure_metadata(struct nvme_ctrl *ctrl,
1898 struct nvme_ns_head *head, struct nvme_id_ns *id)
1899{
1900 int ret;
1901
1902 ret = nvme_init_ms(ctrl, head, id);
1903 if (ret)
1904 return ret;
1905
1906 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1907 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1908 return 0;
1909
1910 if (ctrl->ops->flags & NVME_F_FABRICS) {
1911 /*
1912 * The NVMe over Fabrics specification only supports metadata as
1913 * part of the extended data LBA. We rely on HCA/HBA support to
1914 * remap the separate metadata buffer from the block layer.
1915 */
1916 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1917 return 0;
1918
1919 head->features |= NVME_NS_EXT_LBAS;
1920
1921 /*
1922 * The current fabrics transport drivers support namespace
1923 * metadata formats only if nvme_ns_has_pi() returns true.
1924 * Suppress support for all other formats so the namespace will
1925 * have a 0 capacity and not be usable through the block stack.
1926 *
1927 * Note, this check will need to be modified if any drivers
1928 * gain the ability to use other metadata formats.
1929 */
1930 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1931 head->features |= NVME_NS_METADATA_SUPPORTED;
1932 } else {
1933 /*
1934 * For PCIe controllers, we can't easily remap the separate
1935 * metadata buffer from the block layer and thus require a
1936 * separate metadata buffer for block layer metadata/PI support.
1937 * We allow extended LBAs for the passthrough interface, though.
1938 */
1939 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1940 head->features |= NVME_NS_EXT_LBAS;
1941 else
1942 head->features |= NVME_NS_METADATA_SUPPORTED;
1943 }
1944 return 0;
1945}
1946
1947static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1948 struct request_queue *q)
1949{
1950 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1951
1952 if (ctrl->max_hw_sectors) {
1953 u32 max_segments =
1954 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1955
1956 max_segments = min_not_zero(max_segments, ctrl->max_segments);
1957 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1958 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1959 }
1960 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1961 blk_queue_dma_alignment(q, 3);
1962 blk_queue_write_cache(q, vwc, vwc);
1963}
1964
1965static void nvme_update_disk_info(struct nvme_ctrl *ctrl, struct gendisk *disk,
1966 struct nvme_ns_head *head, struct nvme_id_ns *id)
1967{
1968 sector_t capacity = nvme_lba_to_sect(head, le64_to_cpu(id->nsze));
1969 u32 bs = 1U << head->lba_shift;
1970 u32 atomic_bs, phys_bs, io_opt = 0;
1971
1972 /*
1973 * The block layer can't support LBA sizes larger than the page size
1974 * or smaller than a sector size yet, so catch this early and don't
1975 * allow block I/O.
1976 */
1977 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
1978 capacity = 0;
1979 bs = (1 << 9);
1980 }
1981
1982 blk_integrity_unregister(disk);
1983
1984 atomic_bs = phys_bs = bs;
1985 if (id->nabo == 0) {
1986 /*
1987 * Bit 1 indicates whether NAWUPF is defined for this namespace
1988 * and whether it should be used instead of AWUPF. If NAWUPF ==
1989 * 0 then AWUPF must be used instead.
1990 */
1991 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1992 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1993 else
1994 atomic_bs = (1 + ctrl->subsys->awupf) * bs;
1995 }
1996
1997 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1998 /* NPWG = Namespace Preferred Write Granularity */
1999 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2000 /* NOWS = Namespace Optimal Write Size */
2001 io_opt = bs * (1 + le16_to_cpu(id->nows));
2002 }
2003
2004 blk_queue_logical_block_size(disk->queue, bs);
2005 /*
2006 * Linux filesystems assume writing a single physical block is
2007 * an atomic operation. Hence limit the physical block size to the
2008 * value of the Atomic Write Unit Power Fail parameter.
2009 */
2010 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
2011 blk_queue_io_min(disk->queue, phys_bs);
2012 blk_queue_io_opt(disk->queue, io_opt);
2013
2014 /*
2015 * Register a metadata profile for PI, or the plain non-integrity NVMe
2016 * metadata masquerading as Type 0 if supported, otherwise reject block
2017 * I/O to namespaces with metadata except when the namespace supports
2018 * PI, as it can strip/insert in that case.
2019 */
2020 if (head->ms) {
2021 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2022 (head->features & NVME_NS_METADATA_SUPPORTED))
2023 nvme_init_integrity(disk, head,
2024 ctrl->max_integrity_segments);
2025 else if (!nvme_ns_has_pi(head))
2026 capacity = 0;
2027 }
2028
2029 set_capacity_and_notify(disk, capacity);
2030
2031 nvme_config_discard(ctrl, disk, head);
2032 blk_queue_max_write_zeroes_sectors(disk->queue,
2033 ctrl->max_zeroes_sectors);
2034}
2035
2036static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2037{
2038 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2039}
2040
2041static inline bool nvme_first_scan(struct gendisk *disk)
2042{
2043 /* nvme_alloc_ns() scans the disk prior to adding it */
2044 return !disk_live(disk);
2045}
2046
2047static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
2048{
2049 struct nvme_ctrl *ctrl = ns->ctrl;
2050 u32 iob;
2051
2052 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2053 is_power_of_2(ctrl->max_hw_sectors))
2054 iob = ctrl->max_hw_sectors;
2055 else
2056 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2057
2058 if (!iob)
2059 return;
2060
2061 if (!is_power_of_2(iob)) {
2062 if (nvme_first_scan(ns->disk))
2063 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2064 ns->disk->disk_name, iob);
2065 return;
2066 }
2067
2068 if (blk_queue_is_zoned(ns->disk->queue)) {
2069 if (nvme_first_scan(ns->disk))
2070 pr_warn("%s: ignoring zoned namespace IO boundary\n",
2071 ns->disk->disk_name);
2072 return;
2073 }
2074
2075 blk_queue_chunk_sectors(ns->queue, iob);
2076}
2077
2078static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2079 struct nvme_ns_info *info)
2080{
2081 blk_mq_freeze_queue(ns->disk->queue);
2082 nvme_set_queue_limits(ns->ctrl, ns->queue);
2083 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2084 blk_mq_unfreeze_queue(ns->disk->queue);
2085
2086 if (nvme_ns_head_multipath(ns->head)) {
2087 blk_mq_freeze_queue(ns->head->disk->queue);
2088 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2089 nvme_mpath_revalidate_paths(ns);
2090 blk_stack_limits(&ns->head->disk->queue->limits,
2091 &ns->queue->limits, 0);
2092 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2093 blk_mq_unfreeze_queue(ns->head->disk->queue);
2094 }
2095
2096 /* Hide the block-interface for these devices */
2097 ns->disk->flags |= GENHD_FL_HIDDEN;
2098 set_bit(NVME_NS_READY, &ns->flags);
2099
2100 return 0;
2101}
2102
2103static int nvme_update_ns_info_block(struct nvme_ns *ns,
2104 struct nvme_ns_info *info)
2105{
2106 struct nvme_id_ns *id;
2107 unsigned lbaf;
2108 int ret;
2109
2110 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2111 if (ret)
2112 return ret;
2113
2114 if (id->ncap == 0) {
2115 /* namespace not allocated or attached */
2116 info->is_removed = true;
2117 ret = -ENODEV;
2118 goto error;
2119 }
2120
2121 blk_mq_freeze_queue(ns->disk->queue);
2122 lbaf = nvme_lbaf_index(id->flbas);
2123 ns->head->lba_shift = id->lbaf[lbaf].ds;
2124 ns->head->nuse = le64_to_cpu(id->nuse);
2125 nvme_set_queue_limits(ns->ctrl, ns->queue);
2126
2127 ret = nvme_configure_metadata(ns->ctrl, ns->head, id);
2128 if (ret < 0) {
2129 blk_mq_unfreeze_queue(ns->disk->queue);
2130 goto out;
2131 }
2132 nvme_set_chunk_sectors(ns, id);
2133 nvme_update_disk_info(ns->ctrl, ns->disk, ns->head, id);
2134
2135 if (ns->head->ids.csi == NVME_CSI_ZNS) {
2136 ret = nvme_update_zone_info(ns, lbaf);
2137 if (ret) {
2138 blk_mq_unfreeze_queue(ns->disk->queue);
2139 goto out;
2140 }
2141 }
2142
2143 /*
2144 * Only set the DEAC bit if the device guarantees that reads from
2145 * deallocated data return zeroes. While the DEAC bit does not
2146 * require that, it must be a no-op if reads from deallocated data
2147 * do not return zeroes.
2148 */
2149 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2150 ns->head->features |= NVME_NS_DEAC;
2151 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2152 set_bit(NVME_NS_READY, &ns->flags);
2153 blk_mq_unfreeze_queue(ns->disk->queue);
2154
2155 if (blk_queue_is_zoned(ns->queue)) {
2156 ret = nvme_revalidate_zones(ns);
2157 if (ret && !nvme_first_scan(ns->disk))
2158 goto out;
2159 }
2160
2161 if (nvme_ns_head_multipath(ns->head)) {
2162 blk_mq_freeze_queue(ns->head->disk->queue);
2163 nvme_update_disk_info(ns->ctrl, ns->head->disk, ns->head, id);
2164 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2165 nvme_mpath_revalidate_paths(ns);
2166 blk_stack_limits(&ns->head->disk->queue->limits,
2167 &ns->queue->limits, 0);
2168 disk_update_readahead(ns->head->disk);
2169 blk_mq_unfreeze_queue(ns->head->disk->queue);
2170 }
2171
2172 ret = 0;
2173out:
2174 /*
2175 * If probing fails due an unsupported feature, hide the block device,
2176 * but still allow other access.
2177 */
2178 if (ret == -ENODEV) {
2179 ns->disk->flags |= GENHD_FL_HIDDEN;
2180 set_bit(NVME_NS_READY, &ns->flags);
2181 ret = 0;
2182 }
2183
2184error:
2185 kfree(id);
2186 return ret;
2187}
2188
2189static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2190{
2191 switch (info->ids.csi) {
2192 case NVME_CSI_ZNS:
2193 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2194 dev_info(ns->ctrl->device,
2195 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2196 info->nsid);
2197 return nvme_update_ns_info_generic(ns, info);
2198 }
2199 return nvme_update_ns_info_block(ns, info);
2200 case NVME_CSI_NVM:
2201 return nvme_update_ns_info_block(ns, info);
2202 default:
2203 dev_info(ns->ctrl->device,
2204 "block device for nsid %u not supported (csi %u)\n",
2205 info->nsid, info->ids.csi);
2206 return nvme_update_ns_info_generic(ns, info);
2207 }
2208}
2209
2210#ifdef CONFIG_BLK_SED_OPAL
2211static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2212 bool send)
2213{
2214 struct nvme_ctrl *ctrl = data;
2215 struct nvme_command cmd = { };
2216
2217 if (send)
2218 cmd.common.opcode = nvme_admin_security_send;
2219 else
2220 cmd.common.opcode = nvme_admin_security_recv;
2221 cmd.common.nsid = 0;
2222 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2223 cmd.common.cdw11 = cpu_to_le32(len);
2224
2225 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2226 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2227}
2228
2229static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2230{
2231 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2232 if (!ctrl->opal_dev)
2233 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2234 else if (was_suspended)
2235 opal_unlock_from_suspend(ctrl->opal_dev);
2236 } else {
2237 free_opal_dev(ctrl->opal_dev);
2238 ctrl->opal_dev = NULL;
2239 }
2240}
2241#else
2242static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2243{
2244}
2245#endif /* CONFIG_BLK_SED_OPAL */
2246
2247#ifdef CONFIG_BLK_DEV_ZONED
2248static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2249 unsigned int nr_zones, report_zones_cb cb, void *data)
2250{
2251 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2252 data);
2253}
2254#else
2255#define nvme_report_zones NULL
2256#endif /* CONFIG_BLK_DEV_ZONED */
2257
2258const struct block_device_operations nvme_bdev_ops = {
2259 .owner = THIS_MODULE,
2260 .ioctl = nvme_ioctl,
2261 .compat_ioctl = blkdev_compat_ptr_ioctl,
2262 .open = nvme_open,
2263 .release = nvme_release,
2264 .getgeo = nvme_getgeo,
2265 .report_zones = nvme_report_zones,
2266 .pr_ops = &nvme_pr_ops,
2267};
2268
2269static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2270 u32 timeout, const char *op)
2271{
2272 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2273 u32 csts;
2274 int ret;
2275
2276 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2277 if (csts == ~0)
2278 return -ENODEV;
2279 if ((csts & mask) == val)
2280 break;
2281
2282 usleep_range(1000, 2000);
2283 if (fatal_signal_pending(current))
2284 return -EINTR;
2285 if (time_after(jiffies, timeout_jiffies)) {
2286 dev_err(ctrl->device,
2287 "Device not ready; aborting %s, CSTS=0x%x\n",
2288 op, csts);
2289 return -ENODEV;
2290 }
2291 }
2292
2293 return ret;
2294}
2295
2296int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2297{
2298 int ret;
2299
2300 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2301 if (shutdown)
2302 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2303 else
2304 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2305
2306 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2307 if (ret)
2308 return ret;
2309
2310 if (shutdown) {
2311 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2312 NVME_CSTS_SHST_CMPLT,
2313 ctrl->shutdown_timeout, "shutdown");
2314 }
2315 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2316 msleep(NVME_QUIRK_DELAY_AMOUNT);
2317 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2318 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2319}
2320EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2321
2322int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2323{
2324 unsigned dev_page_min;
2325 u32 timeout;
2326 int ret;
2327
2328 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2329 if (ret) {
2330 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2331 return ret;
2332 }
2333 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2334
2335 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2336 dev_err(ctrl->device,
2337 "Minimum device page size %u too large for host (%u)\n",
2338 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2339 return -ENODEV;
2340 }
2341
2342 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2343 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2344 else
2345 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2346
2347 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2348 ctrl->ctrl_config |= NVME_CC_CRIME;
2349
2350 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2351 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2352 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2353 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2354 if (ret)
2355 return ret;
2356
2357 /* Flush write to device (required if transport is PCI) */
2358 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2359 if (ret)
2360 return ret;
2361
2362 /* CAP value may change after initial CC write */
2363 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2364 if (ret)
2365 return ret;
2366
2367 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2368 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2369 u32 crto, ready_timeout;
2370
2371 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2372 if (ret) {
2373 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2374 ret);
2375 return ret;
2376 }
2377
2378 /*
2379 * CRTO should always be greater or equal to CAP.TO, but some
2380 * devices are known to get this wrong. Use the larger of the
2381 * two values.
2382 */
2383 if (ctrl->ctrl_config & NVME_CC_CRIME)
2384 ready_timeout = NVME_CRTO_CRIMT(crto);
2385 else
2386 ready_timeout = NVME_CRTO_CRWMT(crto);
2387
2388 if (ready_timeout < timeout)
2389 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2390 crto, ctrl->cap);
2391 else
2392 timeout = ready_timeout;
2393 }
2394
2395 ctrl->ctrl_config |= NVME_CC_ENABLE;
2396 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2397 if (ret)
2398 return ret;
2399 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2400 (timeout + 1) / 2, "initialisation");
2401}
2402EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2403
2404static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2405{
2406 __le64 ts;
2407 int ret;
2408
2409 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2410 return 0;
2411
2412 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2413 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2414 NULL);
2415 if (ret)
2416 dev_warn_once(ctrl->device,
2417 "could not set timestamp (%d)\n", ret);
2418 return ret;
2419}
2420
2421static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2422{
2423 struct nvme_feat_host_behavior *host;
2424 u8 acre = 0, lbafee = 0;
2425 int ret;
2426
2427 /* Don't bother enabling the feature if retry delay is not reported */
2428 if (ctrl->crdt[0])
2429 acre = NVME_ENABLE_ACRE;
2430 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2431 lbafee = NVME_ENABLE_LBAFEE;
2432
2433 if (!acre && !lbafee)
2434 return 0;
2435
2436 host = kzalloc(sizeof(*host), GFP_KERNEL);
2437 if (!host)
2438 return 0;
2439
2440 host->acre = acre;
2441 host->lbafee = lbafee;
2442 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2443 host, sizeof(*host), NULL);
2444 kfree(host);
2445 return ret;
2446}
2447
2448/*
2449 * The function checks whether the given total (exlat + enlat) latency of
2450 * a power state allows the latter to be used as an APST transition target.
2451 * It does so by comparing the latency to the primary and secondary latency
2452 * tolerances defined by module params. If there's a match, the corresponding
2453 * timeout value is returned and the matching tolerance index (1 or 2) is
2454 * reported.
2455 */
2456static bool nvme_apst_get_transition_time(u64 total_latency,
2457 u64 *transition_time, unsigned *last_index)
2458{
2459 if (total_latency <= apst_primary_latency_tol_us) {
2460 if (*last_index == 1)
2461 return false;
2462 *last_index = 1;
2463 *transition_time = apst_primary_timeout_ms;
2464 return true;
2465 }
2466 if (apst_secondary_timeout_ms &&
2467 total_latency <= apst_secondary_latency_tol_us) {
2468 if (*last_index <= 2)
2469 return false;
2470 *last_index = 2;
2471 *transition_time = apst_secondary_timeout_ms;
2472 return true;
2473 }
2474 return false;
2475}
2476
2477/*
2478 * APST (Autonomous Power State Transition) lets us program a table of power
2479 * state transitions that the controller will perform automatically.
2480 *
2481 * Depending on module params, one of the two supported techniques will be used:
2482 *
2483 * - If the parameters provide explicit timeouts and tolerances, they will be
2484 * used to build a table with up to 2 non-operational states to transition to.
2485 * The default parameter values were selected based on the values used by
2486 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2487 * regeneration of the APST table in the event of switching between external
2488 * and battery power, the timeouts and tolerances reflect a compromise
2489 * between values used by Microsoft for AC and battery scenarios.
2490 * - If not, we'll configure the table with a simple heuristic: we are willing
2491 * to spend at most 2% of the time transitioning between power states.
2492 * Therefore, when running in any given state, we will enter the next
2493 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2494 * microseconds, as long as that state's exit latency is under the requested
2495 * maximum latency.
2496 *
2497 * We will not autonomously enter any non-operational state for which the total
2498 * latency exceeds ps_max_latency_us.
2499 *
2500 * Users can set ps_max_latency_us to zero to turn off APST.
2501 */
2502static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2503{
2504 struct nvme_feat_auto_pst *table;
2505 unsigned apste = 0;
2506 u64 max_lat_us = 0;
2507 __le64 target = 0;
2508 int max_ps = -1;
2509 int state;
2510 int ret;
2511 unsigned last_lt_index = UINT_MAX;
2512
2513 /*
2514 * If APST isn't supported or if we haven't been initialized yet,
2515 * then don't do anything.
2516 */
2517 if (!ctrl->apsta)
2518 return 0;
2519
2520 if (ctrl->npss > 31) {
2521 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2522 return 0;
2523 }
2524
2525 table = kzalloc(sizeof(*table), GFP_KERNEL);
2526 if (!table)
2527 return 0;
2528
2529 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2530 /* Turn off APST. */
2531 dev_dbg(ctrl->device, "APST disabled\n");
2532 goto done;
2533 }
2534
2535 /*
2536 * Walk through all states from lowest- to highest-power.
2537 * According to the spec, lower-numbered states use more power. NPSS,
2538 * despite the name, is the index of the lowest-power state, not the
2539 * number of states.
2540 */
2541 for (state = (int)ctrl->npss; state >= 0; state--) {
2542 u64 total_latency_us, exit_latency_us, transition_ms;
2543
2544 if (target)
2545 table->entries[state] = target;
2546
2547 /*
2548 * Don't allow transitions to the deepest state if it's quirked
2549 * off.
2550 */
2551 if (state == ctrl->npss &&
2552 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2553 continue;
2554
2555 /*
2556 * Is this state a useful non-operational state for higher-power
2557 * states to autonomously transition to?
2558 */
2559 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2560 continue;
2561
2562 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2563 if (exit_latency_us > ctrl->ps_max_latency_us)
2564 continue;
2565
2566 total_latency_us = exit_latency_us +
2567 le32_to_cpu(ctrl->psd[state].entry_lat);
2568
2569 /*
2570 * This state is good. It can be used as the APST idle target
2571 * for higher power states.
2572 */
2573 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2574 if (!nvme_apst_get_transition_time(total_latency_us,
2575 &transition_ms, &last_lt_index))
2576 continue;
2577 } else {
2578 transition_ms = total_latency_us + 19;
2579 do_div(transition_ms, 20);
2580 if (transition_ms > (1 << 24) - 1)
2581 transition_ms = (1 << 24) - 1;
2582 }
2583
2584 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2585 if (max_ps == -1)
2586 max_ps = state;
2587 if (total_latency_us > max_lat_us)
2588 max_lat_us = total_latency_us;
2589 }
2590
2591 if (max_ps == -1)
2592 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2593 else
2594 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2595 max_ps, max_lat_us, (int)sizeof(*table), table);
2596 apste = 1;
2597
2598done:
2599 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2600 table, sizeof(*table), NULL);
2601 if (ret)
2602 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2603 kfree(table);
2604 return ret;
2605}
2606
2607static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2608{
2609 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2610 u64 latency;
2611
2612 switch (val) {
2613 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2614 case PM_QOS_LATENCY_ANY:
2615 latency = U64_MAX;
2616 break;
2617
2618 default:
2619 latency = val;
2620 }
2621
2622 if (ctrl->ps_max_latency_us != latency) {
2623 ctrl->ps_max_latency_us = latency;
2624 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2625 nvme_configure_apst(ctrl);
2626 }
2627}
2628
2629struct nvme_core_quirk_entry {
2630 /*
2631 * NVMe model and firmware strings are padded with spaces. For
2632 * simplicity, strings in the quirk table are padded with NULLs
2633 * instead.
2634 */
2635 u16 vid;
2636 const char *mn;
2637 const char *fr;
2638 unsigned long quirks;
2639};
2640
2641static const struct nvme_core_quirk_entry core_quirks[] = {
2642 {
2643 /*
2644 * This Toshiba device seems to die using any APST states. See:
2645 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2646 */
2647 .vid = 0x1179,
2648 .mn = "THNSF5256GPUK TOSHIBA",
2649 .quirks = NVME_QUIRK_NO_APST,
2650 },
2651 {
2652 /*
2653 * This LiteON CL1-3D*-Q11 firmware version has a race
2654 * condition associated with actions related to suspend to idle
2655 * LiteON has resolved the problem in future firmware
2656 */
2657 .vid = 0x14a4,
2658 .fr = "22301111",
2659 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2660 },
2661 {
2662 /*
2663 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2664 * aborts I/O during any load, but more easily reproducible
2665 * with discards (fstrim).
2666 *
2667 * The device is left in a state where it is also not possible
2668 * to use "nvme set-feature" to disable APST, but booting with
2669 * nvme_core.default_ps_max_latency=0 works.
2670 */
2671 .vid = 0x1e0f,
2672 .mn = "KCD6XVUL6T40",
2673 .quirks = NVME_QUIRK_NO_APST,
2674 },
2675 {
2676 /*
2677 * The external Samsung X5 SSD fails initialization without a
2678 * delay before checking if it is ready and has a whole set of
2679 * other problems. To make this even more interesting, it
2680 * shares the PCI ID with internal Samsung 970 Evo Plus that
2681 * does not need or want these quirks.
2682 */
2683 .vid = 0x144d,
2684 .mn = "Samsung Portable SSD X5",
2685 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2686 NVME_QUIRK_NO_DEEPEST_PS |
2687 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2688 }
2689};
2690
2691/* match is null-terminated but idstr is space-padded. */
2692static bool string_matches(const char *idstr, const char *match, size_t len)
2693{
2694 size_t matchlen;
2695
2696 if (!match)
2697 return true;
2698
2699 matchlen = strlen(match);
2700 WARN_ON_ONCE(matchlen > len);
2701
2702 if (memcmp(idstr, match, matchlen))
2703 return false;
2704
2705 for (; matchlen < len; matchlen++)
2706 if (idstr[matchlen] != ' ')
2707 return false;
2708
2709 return true;
2710}
2711
2712static bool quirk_matches(const struct nvme_id_ctrl *id,
2713 const struct nvme_core_quirk_entry *q)
2714{
2715 return q->vid == le16_to_cpu(id->vid) &&
2716 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2717 string_matches(id->fr, q->fr, sizeof(id->fr));
2718}
2719
2720static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2721 struct nvme_id_ctrl *id)
2722{
2723 size_t nqnlen;
2724 int off;
2725
2726 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2727 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2728 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2729 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2730 return;
2731 }
2732
2733 if (ctrl->vs >= NVME_VS(1, 2, 1))
2734 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2735 }
2736
2737 /*
2738 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2739 * Base Specification 2.0. It is slightly different from the format
2740 * specified there due to historic reasons, and we can't change it now.
2741 */
2742 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2743 "nqn.2014.08.org.nvmexpress:%04x%04x",
2744 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2745 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2746 off += sizeof(id->sn);
2747 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2748 off += sizeof(id->mn);
2749 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2750}
2751
2752static void nvme_release_subsystem(struct device *dev)
2753{
2754 struct nvme_subsystem *subsys =
2755 container_of(dev, struct nvme_subsystem, dev);
2756
2757 if (subsys->instance >= 0)
2758 ida_free(&nvme_instance_ida, subsys->instance);
2759 kfree(subsys);
2760}
2761
2762static void nvme_destroy_subsystem(struct kref *ref)
2763{
2764 struct nvme_subsystem *subsys =
2765 container_of(ref, struct nvme_subsystem, ref);
2766
2767 mutex_lock(&nvme_subsystems_lock);
2768 list_del(&subsys->entry);
2769 mutex_unlock(&nvme_subsystems_lock);
2770
2771 ida_destroy(&subsys->ns_ida);
2772 device_del(&subsys->dev);
2773 put_device(&subsys->dev);
2774}
2775
2776static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2777{
2778 kref_put(&subsys->ref, nvme_destroy_subsystem);
2779}
2780
2781static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2782{
2783 struct nvme_subsystem *subsys;
2784
2785 lockdep_assert_held(&nvme_subsystems_lock);
2786
2787 /*
2788 * Fail matches for discovery subsystems. This results
2789 * in each discovery controller bound to a unique subsystem.
2790 * This avoids issues with validating controller values
2791 * that can only be true when there is a single unique subsystem.
2792 * There may be multiple and completely independent entities
2793 * that provide discovery controllers.
2794 */
2795 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2796 return NULL;
2797
2798 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2799 if (strcmp(subsys->subnqn, subsysnqn))
2800 continue;
2801 if (!kref_get_unless_zero(&subsys->ref))
2802 continue;
2803 return subsys;
2804 }
2805
2806 return NULL;
2807}
2808
2809static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2810{
2811 return ctrl->opts && ctrl->opts->discovery_nqn;
2812}
2813
2814static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2815 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2816{
2817 struct nvme_ctrl *tmp;
2818
2819 lockdep_assert_held(&nvme_subsystems_lock);
2820
2821 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2822 if (nvme_state_terminal(tmp))
2823 continue;
2824
2825 if (tmp->cntlid == ctrl->cntlid) {
2826 dev_err(ctrl->device,
2827 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2828 ctrl->cntlid, dev_name(tmp->device),
2829 subsys->subnqn);
2830 return false;
2831 }
2832
2833 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2834 nvme_discovery_ctrl(ctrl))
2835 continue;
2836
2837 dev_err(ctrl->device,
2838 "Subsystem does not support multiple controllers\n");
2839 return false;
2840 }
2841
2842 return true;
2843}
2844
2845static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2846{
2847 struct nvme_subsystem *subsys, *found;
2848 int ret;
2849
2850 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2851 if (!subsys)
2852 return -ENOMEM;
2853
2854 subsys->instance = -1;
2855 mutex_init(&subsys->lock);
2856 kref_init(&subsys->ref);
2857 INIT_LIST_HEAD(&subsys->ctrls);
2858 INIT_LIST_HEAD(&subsys->nsheads);
2859 nvme_init_subnqn(subsys, ctrl, id);
2860 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2861 memcpy(subsys->model, id->mn, sizeof(subsys->model));
2862 subsys->vendor_id = le16_to_cpu(id->vid);
2863 subsys->cmic = id->cmic;
2864
2865 /* Versions prior to 1.4 don't necessarily report a valid type */
2866 if (id->cntrltype == NVME_CTRL_DISC ||
2867 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2868 subsys->subtype = NVME_NQN_DISC;
2869 else
2870 subsys->subtype = NVME_NQN_NVME;
2871
2872 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2873 dev_err(ctrl->device,
2874 "Subsystem %s is not a discovery controller",
2875 subsys->subnqn);
2876 kfree(subsys);
2877 return -EINVAL;
2878 }
2879 subsys->awupf = le16_to_cpu(id->awupf);
2880 nvme_mpath_default_iopolicy(subsys);
2881
2882 subsys->dev.class = nvme_subsys_class;
2883 subsys->dev.release = nvme_release_subsystem;
2884 subsys->dev.groups = nvme_subsys_attrs_groups;
2885 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2886 device_initialize(&subsys->dev);
2887
2888 mutex_lock(&nvme_subsystems_lock);
2889 found = __nvme_find_get_subsystem(subsys->subnqn);
2890 if (found) {
2891 put_device(&subsys->dev);
2892 subsys = found;
2893
2894 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2895 ret = -EINVAL;
2896 goto out_put_subsystem;
2897 }
2898 } else {
2899 ret = device_add(&subsys->dev);
2900 if (ret) {
2901 dev_err(ctrl->device,
2902 "failed to register subsystem device.\n");
2903 put_device(&subsys->dev);
2904 goto out_unlock;
2905 }
2906 ida_init(&subsys->ns_ida);
2907 list_add_tail(&subsys->entry, &nvme_subsystems);
2908 }
2909
2910 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2911 dev_name(ctrl->device));
2912 if (ret) {
2913 dev_err(ctrl->device,
2914 "failed to create sysfs link from subsystem.\n");
2915 goto out_put_subsystem;
2916 }
2917
2918 if (!found)
2919 subsys->instance = ctrl->instance;
2920 ctrl->subsys = subsys;
2921 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2922 mutex_unlock(&nvme_subsystems_lock);
2923 return 0;
2924
2925out_put_subsystem:
2926 nvme_put_subsystem(subsys);
2927out_unlock:
2928 mutex_unlock(&nvme_subsystems_lock);
2929 return ret;
2930}
2931
2932int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2933 void *log, size_t size, u64 offset)
2934{
2935 struct nvme_command c = { };
2936 u32 dwlen = nvme_bytes_to_numd(size);
2937
2938 c.get_log_page.opcode = nvme_admin_get_log_page;
2939 c.get_log_page.nsid = cpu_to_le32(nsid);
2940 c.get_log_page.lid = log_page;
2941 c.get_log_page.lsp = lsp;
2942 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2943 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2944 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2945 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2946 c.get_log_page.csi = csi;
2947
2948 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2949}
2950
2951static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2952 struct nvme_effects_log **log)
2953{
2954 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi);
2955 int ret;
2956
2957 if (cel)
2958 goto out;
2959
2960 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2961 if (!cel)
2962 return -ENOMEM;
2963
2964 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2965 cel, sizeof(*cel), 0);
2966 if (ret) {
2967 kfree(cel);
2968 return ret;
2969 }
2970
2971 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2972out:
2973 *log = cel;
2974 return 0;
2975}
2976
2977static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2978{
2979 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2980
2981 if (check_shl_overflow(1U, units + page_shift - 9, &val))
2982 return UINT_MAX;
2983 return val;
2984}
2985
2986static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2987{
2988 struct nvme_command c = { };
2989 struct nvme_id_ctrl_nvm *id;
2990 int ret;
2991
2992 /*
2993 * Even though NVMe spec explicitly states that MDTS is not applicable
2994 * to the write-zeroes, we are cautious and limit the size to the
2995 * controllers max_hw_sectors value, which is based on the MDTS field
2996 * and possibly other limiting factors.
2997 */
2998 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
2999 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3000 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3001 else
3002 ctrl->max_zeroes_sectors = 0;
3003
3004 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3005 nvme_ctrl_limited_cns(ctrl) ||
3006 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3007 return 0;
3008
3009 id = kzalloc(sizeof(*id), GFP_KERNEL);
3010 if (!id)
3011 return -ENOMEM;
3012
3013 c.identify.opcode = nvme_admin_identify;
3014 c.identify.cns = NVME_ID_CNS_CS_CTRL;
3015 c.identify.csi = NVME_CSI_NVM;
3016
3017 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3018 if (ret)
3019 goto free_data;
3020
3021 ctrl->dmrl = id->dmrl;
3022 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3023 if (id->wzsl)
3024 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3025
3026free_data:
3027 if (ret > 0)
3028 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3029 kfree(id);
3030 return ret;
3031}
3032
3033static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3034{
3035 struct nvme_effects_log *log = ctrl->effects;
3036
3037 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3038 NVME_CMD_EFFECTS_NCC |
3039 NVME_CMD_EFFECTS_CSE_MASK);
3040 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3041 NVME_CMD_EFFECTS_CSE_MASK);
3042
3043 /*
3044 * The spec says the result of a security receive command depends on
3045 * the previous security send command. As such, many vendors log this
3046 * command as one to submitted only when no other commands to the same
3047 * namespace are outstanding. The intention is to tell the host to
3048 * prevent mixing security send and receive.
3049 *
3050 * This driver can only enforce such exclusive access against IO
3051 * queues, though. We are not readily able to enforce such a rule for
3052 * two commands to the admin queue, which is the only queue that
3053 * matters for this command.
3054 *
3055 * Rather than blindly freezing the IO queues for this effect that
3056 * doesn't even apply to IO, mask it off.
3057 */
3058 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3059
3060 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3061 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3062 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3063}
3064
3065static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3066{
3067 int ret = 0;
3068
3069 if (ctrl->effects)
3070 return 0;
3071
3072 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3073 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3074 if (ret < 0)
3075 return ret;
3076 }
3077
3078 if (!ctrl->effects) {
3079 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3080 if (!ctrl->effects)
3081 return -ENOMEM;
3082 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3083 }
3084
3085 nvme_init_known_nvm_effects(ctrl);
3086 return 0;
3087}
3088
3089static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3090{
3091 /*
3092 * In fabrics we need to verify the cntlid matches the
3093 * admin connect
3094 */
3095 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3096 dev_err(ctrl->device,
3097 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3098 ctrl->cntlid, le16_to_cpu(id->cntlid));
3099 return -EINVAL;
3100 }
3101
3102 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3103 dev_err(ctrl->device,
3104 "keep-alive support is mandatory for fabrics\n");
3105 return -EINVAL;
3106 }
3107
3108 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3109 dev_err(ctrl->device,
3110 "I/O queue command capsule supported size %d < 4\n",
3111 ctrl->ioccsz);
3112 return -EINVAL;
3113 }
3114
3115 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3116 dev_err(ctrl->device,
3117 "I/O queue response capsule supported size %d < 1\n",
3118 ctrl->iorcsz);
3119 return -EINVAL;
3120 }
3121
3122 return 0;
3123}
3124
3125static int nvme_init_identify(struct nvme_ctrl *ctrl)
3126{
3127 struct nvme_id_ctrl *id;
3128 u32 max_hw_sectors;
3129 bool prev_apst_enabled;
3130 int ret;
3131
3132 ret = nvme_identify_ctrl(ctrl, &id);
3133 if (ret) {
3134 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3135 return -EIO;
3136 }
3137
3138 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3139 ctrl->cntlid = le16_to_cpu(id->cntlid);
3140
3141 if (!ctrl->identified) {
3142 unsigned int i;
3143
3144 /*
3145 * Check for quirks. Quirk can depend on firmware version,
3146 * so, in principle, the set of quirks present can change
3147 * across a reset. As a possible future enhancement, we
3148 * could re-scan for quirks every time we reinitialize
3149 * the device, but we'd have to make sure that the driver
3150 * behaves intelligently if the quirks change.
3151 */
3152 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3153 if (quirk_matches(id, &core_quirks[i]))
3154 ctrl->quirks |= core_quirks[i].quirks;
3155 }
3156
3157 ret = nvme_init_subsystem(ctrl, id);
3158 if (ret)
3159 goto out_free;
3160
3161 ret = nvme_init_effects(ctrl, id);
3162 if (ret)
3163 goto out_free;
3164 }
3165 memcpy(ctrl->subsys->firmware_rev, id->fr,
3166 sizeof(ctrl->subsys->firmware_rev));
3167
3168 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3169 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3170 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3171 }
3172
3173 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3174 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3175 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3176
3177 ctrl->oacs = le16_to_cpu(id->oacs);
3178 ctrl->oncs = le16_to_cpu(id->oncs);
3179 ctrl->mtfa = le16_to_cpu(id->mtfa);
3180 ctrl->oaes = le32_to_cpu(id->oaes);
3181 ctrl->wctemp = le16_to_cpu(id->wctemp);
3182 ctrl->cctemp = le16_to_cpu(id->cctemp);
3183
3184 atomic_set(&ctrl->abort_limit, id->acl + 1);
3185 ctrl->vwc = id->vwc;
3186 if (id->mdts)
3187 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3188 else
3189 max_hw_sectors = UINT_MAX;
3190 ctrl->max_hw_sectors =
3191 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3192
3193 nvme_set_queue_limits(ctrl, ctrl->admin_q);
3194 ctrl->sgls = le32_to_cpu(id->sgls);
3195 ctrl->kas = le16_to_cpu(id->kas);
3196 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3197 ctrl->ctratt = le32_to_cpu(id->ctratt);
3198
3199 ctrl->cntrltype = id->cntrltype;
3200 ctrl->dctype = id->dctype;
3201
3202 if (id->rtd3e) {
3203 /* us -> s */
3204 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3205
3206 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3207 shutdown_timeout, 60);
3208
3209 if (ctrl->shutdown_timeout != shutdown_timeout)
3210 dev_info(ctrl->device,
3211 "Shutdown timeout set to %u seconds\n",
3212 ctrl->shutdown_timeout);
3213 } else
3214 ctrl->shutdown_timeout = shutdown_timeout;
3215
3216 ctrl->npss = id->npss;
3217 ctrl->apsta = id->apsta;
3218 prev_apst_enabled = ctrl->apst_enabled;
3219 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3220 if (force_apst && id->apsta) {
3221 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3222 ctrl->apst_enabled = true;
3223 } else {
3224 ctrl->apst_enabled = false;
3225 }
3226 } else {
3227 ctrl->apst_enabled = id->apsta;
3228 }
3229 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3230
3231 if (ctrl->ops->flags & NVME_F_FABRICS) {
3232 ctrl->icdoff = le16_to_cpu(id->icdoff);
3233 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3234 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3235 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3236
3237 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3238 if (ret)
3239 goto out_free;
3240 } else {
3241 ctrl->hmpre = le32_to_cpu(id->hmpre);
3242 ctrl->hmmin = le32_to_cpu(id->hmmin);
3243 ctrl->hmminds = le32_to_cpu(id->hmminds);
3244 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3245 }
3246
3247 ret = nvme_mpath_init_identify(ctrl, id);
3248 if (ret < 0)
3249 goto out_free;
3250
3251 if (ctrl->apst_enabled && !prev_apst_enabled)
3252 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3253 else if (!ctrl->apst_enabled && prev_apst_enabled)
3254 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3255
3256out_free:
3257 kfree(id);
3258 return ret;
3259}
3260
3261/*
3262 * Initialize the cached copies of the Identify data and various controller
3263 * register in our nvme_ctrl structure. This should be called as soon as
3264 * the admin queue is fully up and running.
3265 */
3266int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3267{
3268 int ret;
3269
3270 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3271 if (ret) {
3272 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3273 return ret;
3274 }
3275
3276 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3277
3278 if (ctrl->vs >= NVME_VS(1, 1, 0))
3279 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3280
3281 ret = nvme_init_identify(ctrl);
3282 if (ret)
3283 return ret;
3284
3285 ret = nvme_configure_apst(ctrl);
3286 if (ret < 0)
3287 return ret;
3288
3289 ret = nvme_configure_timestamp(ctrl);
3290 if (ret < 0)
3291 return ret;
3292
3293 ret = nvme_configure_host_options(ctrl);
3294 if (ret < 0)
3295 return ret;
3296
3297 nvme_configure_opal(ctrl, was_suspended);
3298
3299 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3300 /*
3301 * Do not return errors unless we are in a controller reset,
3302 * the controller works perfectly fine without hwmon.
3303 */
3304 ret = nvme_hwmon_init(ctrl);
3305 if (ret == -EINTR)
3306 return ret;
3307 }
3308
3309 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3310 ctrl->identified = true;
3311
3312 nvme_start_keep_alive(ctrl);
3313
3314 return 0;
3315}
3316EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3317
3318static int nvme_dev_open(struct inode *inode, struct file *file)
3319{
3320 struct nvme_ctrl *ctrl =
3321 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3322
3323 switch (nvme_ctrl_state(ctrl)) {
3324 case NVME_CTRL_LIVE:
3325 break;
3326 default:
3327 return -EWOULDBLOCK;
3328 }
3329
3330 nvme_get_ctrl(ctrl);
3331 if (!try_module_get(ctrl->ops->module)) {
3332 nvme_put_ctrl(ctrl);
3333 return -EINVAL;
3334 }
3335
3336 file->private_data = ctrl;
3337 return 0;
3338}
3339
3340static int nvme_dev_release(struct inode *inode, struct file *file)
3341{
3342 struct nvme_ctrl *ctrl =
3343 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3344
3345 module_put(ctrl->ops->module);
3346 nvme_put_ctrl(ctrl);
3347 return 0;
3348}
3349
3350static const struct file_operations nvme_dev_fops = {
3351 .owner = THIS_MODULE,
3352 .open = nvme_dev_open,
3353 .release = nvme_dev_release,
3354 .unlocked_ioctl = nvme_dev_ioctl,
3355 .compat_ioctl = compat_ptr_ioctl,
3356 .uring_cmd = nvme_dev_uring_cmd,
3357};
3358
3359static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3360 unsigned nsid)
3361{
3362 struct nvme_ns_head *h;
3363
3364 lockdep_assert_held(&ctrl->subsys->lock);
3365
3366 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3367 /*
3368 * Private namespaces can share NSIDs under some conditions.
3369 * In that case we can't use the same ns_head for namespaces
3370 * with the same NSID.
3371 */
3372 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3373 continue;
3374 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3375 return h;
3376 }
3377
3378 return NULL;
3379}
3380
3381static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3382 struct nvme_ns_ids *ids)
3383{
3384 bool has_uuid = !uuid_is_null(&ids->uuid);
3385 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3386 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3387 struct nvme_ns_head *h;
3388
3389 lockdep_assert_held(&subsys->lock);
3390
3391 list_for_each_entry(h, &subsys->nsheads, entry) {
3392 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3393 return -EINVAL;
3394 if (has_nguid &&
3395 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3396 return -EINVAL;
3397 if (has_eui64 &&
3398 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3399 return -EINVAL;
3400 }
3401
3402 return 0;
3403}
3404
3405static void nvme_cdev_rel(struct device *dev)
3406{
3407 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3408}
3409
3410void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3411{
3412 cdev_device_del(cdev, cdev_device);
3413 put_device(cdev_device);
3414}
3415
3416int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3417 const struct file_operations *fops, struct module *owner)
3418{
3419 int minor, ret;
3420
3421 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3422 if (minor < 0)
3423 return minor;
3424 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3425 cdev_device->class = nvme_ns_chr_class;
3426 cdev_device->release = nvme_cdev_rel;
3427 device_initialize(cdev_device);
3428 cdev_init(cdev, fops);
3429 cdev->owner = owner;
3430 ret = cdev_device_add(cdev, cdev_device);
3431 if (ret)
3432 put_device(cdev_device);
3433
3434 return ret;
3435}
3436
3437static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3438{
3439 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3440}
3441
3442static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3443{
3444 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3445 return 0;
3446}
3447
3448static const struct file_operations nvme_ns_chr_fops = {
3449 .owner = THIS_MODULE,
3450 .open = nvme_ns_chr_open,
3451 .release = nvme_ns_chr_release,
3452 .unlocked_ioctl = nvme_ns_chr_ioctl,
3453 .compat_ioctl = compat_ptr_ioctl,
3454 .uring_cmd = nvme_ns_chr_uring_cmd,
3455 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3456};
3457
3458static int nvme_add_ns_cdev(struct nvme_ns *ns)
3459{
3460 int ret;
3461
3462 ns->cdev_device.parent = ns->ctrl->device;
3463 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3464 ns->ctrl->instance, ns->head->instance);
3465 if (ret)
3466 return ret;
3467
3468 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3469 ns->ctrl->ops->module);
3470}
3471
3472static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3473 struct nvme_ns_info *info)
3474{
3475 struct nvme_ns_head *head;
3476 size_t size = sizeof(*head);
3477 int ret = -ENOMEM;
3478
3479#ifdef CONFIG_NVME_MULTIPATH
3480 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3481#endif
3482
3483 head = kzalloc(size, GFP_KERNEL);
3484 if (!head)
3485 goto out;
3486 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3487 if (ret < 0)
3488 goto out_free_head;
3489 head->instance = ret;
3490 INIT_LIST_HEAD(&head->list);
3491 ret = init_srcu_struct(&head->srcu);
3492 if (ret)
3493 goto out_ida_remove;
3494 head->subsys = ctrl->subsys;
3495 head->ns_id = info->nsid;
3496 head->ids = info->ids;
3497 head->shared = info->is_shared;
3498 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3499 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3500 kref_init(&head->ref);
3501
3502 if (head->ids.csi) {
3503 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3504 if (ret)
3505 goto out_cleanup_srcu;
3506 } else
3507 head->effects = ctrl->effects;
3508
3509 ret = nvme_mpath_alloc_disk(ctrl, head);
3510 if (ret)
3511 goto out_cleanup_srcu;
3512
3513 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3514
3515 kref_get(&ctrl->subsys->ref);
3516
3517 return head;
3518out_cleanup_srcu:
3519 cleanup_srcu_struct(&head->srcu);
3520out_ida_remove:
3521 ida_free(&ctrl->subsys->ns_ida, head->instance);
3522out_free_head:
3523 kfree(head);
3524out:
3525 if (ret > 0)
3526 ret = blk_status_to_errno(nvme_error_status(ret));
3527 return ERR_PTR(ret);
3528}
3529
3530static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3531 struct nvme_ns_ids *ids)
3532{
3533 struct nvme_subsystem *s;
3534 int ret = 0;
3535
3536 /*
3537 * Note that this check is racy as we try to avoid holding the global
3538 * lock over the whole ns_head creation. But it is only intended as
3539 * a sanity check anyway.
3540 */
3541 mutex_lock(&nvme_subsystems_lock);
3542 list_for_each_entry(s, &nvme_subsystems, entry) {
3543 if (s == this)
3544 continue;
3545 mutex_lock(&s->lock);
3546 ret = nvme_subsys_check_duplicate_ids(s, ids);
3547 mutex_unlock(&s->lock);
3548 if (ret)
3549 break;
3550 }
3551 mutex_unlock(&nvme_subsystems_lock);
3552
3553 return ret;
3554}
3555
3556static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3557{
3558 struct nvme_ctrl *ctrl = ns->ctrl;
3559 struct nvme_ns_head *head = NULL;
3560 int ret;
3561
3562 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3563 if (ret) {
3564 /*
3565 * We've found two different namespaces on two different
3566 * subsystems that report the same ID. This is pretty nasty
3567 * for anything that actually requires unique device
3568 * identification. In the kernel we need this for multipathing,
3569 * and in user space the /dev/disk/by-id/ links rely on it.
3570 *
3571 * If the device also claims to be multi-path capable back off
3572 * here now and refuse the probe the second device as this is a
3573 * recipe for data corruption. If not this is probably a
3574 * cheap consumer device if on the PCIe bus, so let the user
3575 * proceed and use the shiny toy, but warn that with changing
3576 * probing order (which due to our async probing could just be
3577 * device taking longer to startup) the other device could show
3578 * up at any time.
3579 */
3580 nvme_print_device_info(ctrl);
3581 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3582 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3583 info->is_shared)) {
3584 dev_err(ctrl->device,
3585 "ignoring nsid %d because of duplicate IDs\n",
3586 info->nsid);
3587 return ret;
3588 }
3589
3590 dev_err(ctrl->device,
3591 "clearing duplicate IDs for nsid %d\n", info->nsid);
3592 dev_err(ctrl->device,
3593 "use of /dev/disk/by-id/ may cause data corruption\n");
3594 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3595 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3596 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3597 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3598 }
3599
3600 mutex_lock(&ctrl->subsys->lock);
3601 head = nvme_find_ns_head(ctrl, info->nsid);
3602 if (!head) {
3603 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3604 if (ret) {
3605 dev_err(ctrl->device,
3606 "duplicate IDs in subsystem for nsid %d\n",
3607 info->nsid);
3608 goto out_unlock;
3609 }
3610 head = nvme_alloc_ns_head(ctrl, info);
3611 if (IS_ERR(head)) {
3612 ret = PTR_ERR(head);
3613 goto out_unlock;
3614 }
3615 } else {
3616 ret = -EINVAL;
3617 if (!info->is_shared || !head->shared) {
3618 dev_err(ctrl->device,
3619 "Duplicate unshared namespace %d\n",
3620 info->nsid);
3621 goto out_put_ns_head;
3622 }
3623 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3624 dev_err(ctrl->device,
3625 "IDs don't match for shared namespace %d\n",
3626 info->nsid);
3627 goto out_put_ns_head;
3628 }
3629
3630 if (!multipath) {
3631 dev_warn(ctrl->device,
3632 "Found shared namespace %d, but multipathing not supported.\n",
3633 info->nsid);
3634 dev_warn_once(ctrl->device,
3635 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
3636 }
3637 }
3638
3639 list_add_tail_rcu(&ns->siblings, &head->list);
3640 ns->head = head;
3641 mutex_unlock(&ctrl->subsys->lock);
3642 return 0;
3643
3644out_put_ns_head:
3645 nvme_put_ns_head(head);
3646out_unlock:
3647 mutex_unlock(&ctrl->subsys->lock);
3648 return ret;
3649}
3650
3651struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3652{
3653 struct nvme_ns *ns, *ret = NULL;
3654
3655 down_read(&ctrl->namespaces_rwsem);
3656 list_for_each_entry(ns, &ctrl->namespaces, list) {
3657 if (ns->head->ns_id == nsid) {
3658 if (!nvme_get_ns(ns))
3659 continue;
3660 ret = ns;
3661 break;
3662 }
3663 if (ns->head->ns_id > nsid)
3664 break;
3665 }
3666 up_read(&ctrl->namespaces_rwsem);
3667 return ret;
3668}
3669EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3670
3671/*
3672 * Add the namespace to the controller list while keeping the list ordered.
3673 */
3674static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3675{
3676 struct nvme_ns *tmp;
3677
3678 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3679 if (tmp->head->ns_id < ns->head->ns_id) {
3680 list_add(&ns->list, &tmp->list);
3681 return;
3682 }
3683 }
3684 list_add(&ns->list, &ns->ctrl->namespaces);
3685}
3686
3687static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3688{
3689 struct nvme_ns *ns;
3690 struct gendisk *disk;
3691 int node = ctrl->numa_node;
3692
3693 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3694 if (!ns)
3695 return;
3696
3697 disk = blk_mq_alloc_disk(ctrl->tagset, ns);
3698 if (IS_ERR(disk))
3699 goto out_free_ns;
3700 disk->fops = &nvme_bdev_ops;
3701 disk->private_data = ns;
3702
3703 ns->disk = disk;
3704 ns->queue = disk->queue;
3705 ns->passthru_err_log_enabled = false;
3706
3707 if (ctrl->opts && ctrl->opts->data_digest)
3708 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3709
3710 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3711 if (ctrl->ops->supports_pci_p2pdma &&
3712 ctrl->ops->supports_pci_p2pdma(ctrl))
3713 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3714
3715 ns->ctrl = ctrl;
3716 kref_init(&ns->kref);
3717
3718 if (nvme_init_ns_head(ns, info))
3719 goto out_cleanup_disk;
3720
3721 /*
3722 * If multipathing is enabled, the device name for all disks and not
3723 * just those that represent shared namespaces needs to be based on the
3724 * subsystem instance. Using the controller instance for private
3725 * namespaces could lead to naming collisions between shared and private
3726 * namespaces if they don't use a common numbering scheme.
3727 *
3728 * If multipathing is not enabled, disk names must use the controller
3729 * instance as shared namespaces will show up as multiple block
3730 * devices.
3731 */
3732 if (nvme_ns_head_multipath(ns->head)) {
3733 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3734 ctrl->instance, ns->head->instance);
3735 disk->flags |= GENHD_FL_HIDDEN;
3736 } else if (multipath) {
3737 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3738 ns->head->instance);
3739 } else {
3740 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3741 ns->head->instance);
3742 }
3743
3744 if (nvme_update_ns_info(ns, info))
3745 goto out_unlink_ns;
3746
3747 down_write(&ctrl->namespaces_rwsem);
3748 /*
3749 * Ensure that no namespaces are added to the ctrl list after the queues
3750 * are frozen, thereby avoiding a deadlock between scan and reset.
3751 */
3752 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3753 up_write(&ctrl->namespaces_rwsem);
3754 goto out_unlink_ns;
3755 }
3756 nvme_ns_add_to_ctrl_list(ns);
3757 up_write(&ctrl->namespaces_rwsem);
3758 nvme_get_ctrl(ctrl);
3759
3760 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3761 goto out_cleanup_ns_from_list;
3762
3763 if (!nvme_ns_head_multipath(ns->head))
3764 nvme_add_ns_cdev(ns);
3765
3766 nvme_mpath_add_disk(ns, info->anagrpid);
3767 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3768
3769 /*
3770 * Set ns->disk->device->driver_data to ns so we can access
3771 * ns->logging_enabled in nvme_passthru_err_log_enabled_store() and
3772 * nvme_passthru_err_log_enabled_show().
3773 */
3774 dev_set_drvdata(disk_to_dev(ns->disk), ns);
3775
3776 return;
3777
3778 out_cleanup_ns_from_list:
3779 nvme_put_ctrl(ctrl);
3780 down_write(&ctrl->namespaces_rwsem);
3781 list_del_init(&ns->list);
3782 up_write(&ctrl->namespaces_rwsem);
3783 out_unlink_ns:
3784 mutex_lock(&ctrl->subsys->lock);
3785 list_del_rcu(&ns->siblings);
3786 if (list_empty(&ns->head->list))
3787 list_del_init(&ns->head->entry);
3788 mutex_unlock(&ctrl->subsys->lock);
3789 nvme_put_ns_head(ns->head);
3790 out_cleanup_disk:
3791 put_disk(disk);
3792 out_free_ns:
3793 kfree(ns);
3794}
3795
3796static void nvme_ns_remove(struct nvme_ns *ns)
3797{
3798 bool last_path = false;
3799
3800 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3801 return;
3802
3803 clear_bit(NVME_NS_READY, &ns->flags);
3804 set_capacity(ns->disk, 0);
3805 nvme_fault_inject_fini(&ns->fault_inject);
3806
3807 /*
3808 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3809 * this ns going back into current_path.
3810 */
3811 synchronize_srcu(&ns->head->srcu);
3812
3813 /* wait for concurrent submissions */
3814 if (nvme_mpath_clear_current_path(ns))
3815 synchronize_srcu(&ns->head->srcu);
3816
3817 mutex_lock(&ns->ctrl->subsys->lock);
3818 list_del_rcu(&ns->siblings);
3819 if (list_empty(&ns->head->list)) {
3820 list_del_init(&ns->head->entry);
3821 last_path = true;
3822 }
3823 mutex_unlock(&ns->ctrl->subsys->lock);
3824
3825 /* guarantee not available in head->list */
3826 synchronize_srcu(&ns->head->srcu);
3827
3828 if (!nvme_ns_head_multipath(ns->head))
3829 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3830 del_gendisk(ns->disk);
3831
3832 down_write(&ns->ctrl->namespaces_rwsem);
3833 list_del_init(&ns->list);
3834 up_write(&ns->ctrl->namespaces_rwsem);
3835
3836 if (last_path)
3837 nvme_mpath_shutdown_disk(ns->head);
3838 nvme_put_ns(ns);
3839}
3840
3841static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3842{
3843 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3844
3845 if (ns) {
3846 nvme_ns_remove(ns);
3847 nvme_put_ns(ns);
3848 }
3849}
3850
3851static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3852{
3853 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3854
3855 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3856 dev_err(ns->ctrl->device,
3857 "identifiers changed for nsid %d\n", ns->head->ns_id);
3858 goto out;
3859 }
3860
3861 ret = nvme_update_ns_info(ns, info);
3862out:
3863 /*
3864 * Only remove the namespace if we got a fatal error back from the
3865 * device, otherwise ignore the error and just move on.
3866 *
3867 * TODO: we should probably schedule a delayed retry here.
3868 */
3869 if (ret > 0 && (ret & NVME_SC_DNR))
3870 nvme_ns_remove(ns);
3871}
3872
3873static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3874{
3875 struct nvme_ns_info info = { .nsid = nsid };
3876 struct nvme_ns *ns;
3877 int ret;
3878
3879 if (nvme_identify_ns_descs(ctrl, &info))
3880 return;
3881
3882 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3883 dev_warn(ctrl->device,
3884 "command set not reported for nsid: %d\n", nsid);
3885 return;
3886 }
3887
3888 /*
3889 * If available try to use the Command Set Idependent Identify Namespace
3890 * data structure to find all the generic information that is needed to
3891 * set up a namespace. If not fall back to the legacy version.
3892 */
3893 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3894 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3895 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3896 else
3897 ret = nvme_ns_info_from_identify(ctrl, &info);
3898
3899 if (info.is_removed)
3900 nvme_ns_remove_by_nsid(ctrl, nsid);
3901
3902 /*
3903 * Ignore the namespace if it is not ready. We will get an AEN once it
3904 * becomes ready and restart the scan.
3905 */
3906 if (ret || !info.is_ready)
3907 return;
3908
3909 ns = nvme_find_get_ns(ctrl, nsid);
3910 if (ns) {
3911 nvme_validate_ns(ns, &info);
3912 nvme_put_ns(ns);
3913 } else {
3914 nvme_alloc_ns(ctrl, &info);
3915 }
3916}
3917
3918static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3919 unsigned nsid)
3920{
3921 struct nvme_ns *ns, *next;
3922 LIST_HEAD(rm_list);
3923
3924 down_write(&ctrl->namespaces_rwsem);
3925 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3926 if (ns->head->ns_id > nsid)
3927 list_move_tail(&ns->list, &rm_list);
3928 }
3929 up_write(&ctrl->namespaces_rwsem);
3930
3931 list_for_each_entry_safe(ns, next, &rm_list, list)
3932 nvme_ns_remove(ns);
3933
3934}
3935
3936static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3937{
3938 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3939 __le32 *ns_list;
3940 u32 prev = 0;
3941 int ret = 0, i;
3942
3943 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3944 if (!ns_list)
3945 return -ENOMEM;
3946
3947 for (;;) {
3948 struct nvme_command cmd = {
3949 .identify.opcode = nvme_admin_identify,
3950 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
3951 .identify.nsid = cpu_to_le32(prev),
3952 };
3953
3954 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3955 NVME_IDENTIFY_DATA_SIZE);
3956 if (ret) {
3957 dev_warn(ctrl->device,
3958 "Identify NS List failed (status=0x%x)\n", ret);
3959 goto free;
3960 }
3961
3962 for (i = 0; i < nr_entries; i++) {
3963 u32 nsid = le32_to_cpu(ns_list[i]);
3964
3965 if (!nsid) /* end of the list? */
3966 goto out;
3967 nvme_scan_ns(ctrl, nsid);
3968 while (++prev < nsid)
3969 nvme_ns_remove_by_nsid(ctrl, prev);
3970 }
3971 }
3972 out:
3973 nvme_remove_invalid_namespaces(ctrl, prev);
3974 free:
3975 kfree(ns_list);
3976 return ret;
3977}
3978
3979static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
3980{
3981 struct nvme_id_ctrl *id;
3982 u32 nn, i;
3983
3984 if (nvme_identify_ctrl(ctrl, &id))
3985 return;
3986 nn = le32_to_cpu(id->nn);
3987 kfree(id);
3988
3989 for (i = 1; i <= nn; i++)
3990 nvme_scan_ns(ctrl, i);
3991
3992 nvme_remove_invalid_namespaces(ctrl, nn);
3993}
3994
3995static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
3996{
3997 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
3998 __le32 *log;
3999 int error;
4000
4001 log = kzalloc(log_size, GFP_KERNEL);
4002 if (!log)
4003 return;
4004
4005 /*
4006 * We need to read the log to clear the AEN, but we don't want to rely
4007 * on it for the changed namespace information as userspace could have
4008 * raced with us in reading the log page, which could cause us to miss
4009 * updates.
4010 */
4011 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4012 NVME_CSI_NVM, log, log_size, 0);
4013 if (error)
4014 dev_warn(ctrl->device,
4015 "reading changed ns log failed: %d\n", error);
4016
4017 kfree(log);
4018}
4019
4020static void nvme_scan_work(struct work_struct *work)
4021{
4022 struct nvme_ctrl *ctrl =
4023 container_of(work, struct nvme_ctrl, scan_work);
4024 int ret;
4025
4026 /* No tagset on a live ctrl means IO queues could not created */
4027 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4028 return;
4029
4030 /*
4031 * Identify controller limits can change at controller reset due to
4032 * new firmware download, even though it is not common we cannot ignore
4033 * such scenario. Controller's non-mdts limits are reported in the unit
4034 * of logical blocks that is dependent on the format of attached
4035 * namespace. Hence re-read the limits at the time of ns allocation.
4036 */
4037 ret = nvme_init_non_mdts_limits(ctrl);
4038 if (ret < 0) {
4039 dev_warn(ctrl->device,
4040 "reading non-mdts-limits failed: %d\n", ret);
4041 return;
4042 }
4043
4044 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4045 dev_info(ctrl->device, "rescanning namespaces.\n");
4046 nvme_clear_changed_ns_log(ctrl);
4047 }
4048
4049 mutex_lock(&ctrl->scan_lock);
4050 if (nvme_ctrl_limited_cns(ctrl)) {
4051 nvme_scan_ns_sequential(ctrl);
4052 } else {
4053 /*
4054 * Fall back to sequential scan if DNR is set to handle broken
4055 * devices which should support Identify NS List (as per the VS
4056 * they report) but don't actually support it.
4057 */
4058 ret = nvme_scan_ns_list(ctrl);
4059 if (ret > 0 && ret & NVME_SC_DNR)
4060 nvme_scan_ns_sequential(ctrl);
4061 }
4062 mutex_unlock(&ctrl->scan_lock);
4063}
4064
4065/*
4066 * This function iterates the namespace list unlocked to allow recovery from
4067 * controller failure. It is up to the caller to ensure the namespace list is
4068 * not modified by scan work while this function is executing.
4069 */
4070void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4071{
4072 struct nvme_ns *ns, *next;
4073 LIST_HEAD(ns_list);
4074
4075 /*
4076 * make sure to requeue I/O to all namespaces as these
4077 * might result from the scan itself and must complete
4078 * for the scan_work to make progress
4079 */
4080 nvme_mpath_clear_ctrl_paths(ctrl);
4081
4082 /*
4083 * Unquiesce io queues so any pending IO won't hang, especially
4084 * those submitted from scan work
4085 */
4086 nvme_unquiesce_io_queues(ctrl);
4087
4088 /* prevent racing with ns scanning */
4089 flush_work(&ctrl->scan_work);
4090
4091 /*
4092 * The dead states indicates the controller was not gracefully
4093 * disconnected. In that case, we won't be able to flush any data while
4094 * removing the namespaces' disks; fail all the queues now to avoid
4095 * potentially having to clean up the failed sync later.
4096 */
4097 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4098 nvme_mark_namespaces_dead(ctrl);
4099
4100 /* this is a no-op when called from the controller reset handler */
4101 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4102
4103 down_write(&ctrl->namespaces_rwsem);
4104 list_splice_init(&ctrl->namespaces, &ns_list);
4105 up_write(&ctrl->namespaces_rwsem);
4106
4107 list_for_each_entry_safe(ns, next, &ns_list, list)
4108 nvme_ns_remove(ns);
4109}
4110EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4111
4112static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4113{
4114 const struct nvme_ctrl *ctrl =
4115 container_of(dev, struct nvme_ctrl, ctrl_device);
4116 struct nvmf_ctrl_options *opts = ctrl->opts;
4117 int ret;
4118
4119 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4120 if (ret)
4121 return ret;
4122
4123 if (opts) {
4124 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4125 if (ret)
4126 return ret;
4127
4128 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4129 opts->trsvcid ?: "none");
4130 if (ret)
4131 return ret;
4132
4133 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4134 opts->host_traddr ?: "none");
4135 if (ret)
4136 return ret;
4137
4138 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4139 opts->host_iface ?: "none");
4140 }
4141 return ret;
4142}
4143
4144static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4145{
4146 char *envp[2] = { envdata, NULL };
4147
4148 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4149}
4150
4151static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4152{
4153 char *envp[2] = { NULL, NULL };
4154 u32 aen_result = ctrl->aen_result;
4155
4156 ctrl->aen_result = 0;
4157 if (!aen_result)
4158 return;
4159
4160 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4161 if (!envp[0])
4162 return;
4163 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4164 kfree(envp[0]);
4165}
4166
4167static void nvme_async_event_work(struct work_struct *work)
4168{
4169 struct nvme_ctrl *ctrl =
4170 container_of(work, struct nvme_ctrl, async_event_work);
4171
4172 nvme_aen_uevent(ctrl);
4173
4174 /*
4175 * The transport drivers must guarantee AER submission here is safe by
4176 * flushing ctrl async_event_work after changing the controller state
4177 * from LIVE and before freeing the admin queue.
4178 */
4179 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4180 ctrl->ops->submit_async_event(ctrl);
4181}
4182
4183static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4184{
4185
4186 u32 csts;
4187
4188 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4189 return false;
4190
4191 if (csts == ~0)
4192 return false;
4193
4194 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4195}
4196
4197static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4198{
4199 struct nvme_fw_slot_info_log *log;
4200
4201 log = kmalloc(sizeof(*log), GFP_KERNEL);
4202 if (!log)
4203 return;
4204
4205 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4206 log, sizeof(*log), 0)) {
4207 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4208 goto out_free_log;
4209 }
4210
4211 if (log->afi & 0x70 || !(log->afi & 0x7)) {
4212 dev_info(ctrl->device,
4213 "Firmware is activated after next Controller Level Reset\n");
4214 goto out_free_log;
4215 }
4216
4217 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4218 sizeof(ctrl->subsys->firmware_rev));
4219
4220out_free_log:
4221 kfree(log);
4222}
4223
4224static void nvme_fw_act_work(struct work_struct *work)
4225{
4226 struct nvme_ctrl *ctrl = container_of(work,
4227 struct nvme_ctrl, fw_act_work);
4228 unsigned long fw_act_timeout;
4229
4230 nvme_auth_stop(ctrl);
4231
4232 if (ctrl->mtfa)
4233 fw_act_timeout = jiffies +
4234 msecs_to_jiffies(ctrl->mtfa * 100);
4235 else
4236 fw_act_timeout = jiffies +
4237 msecs_to_jiffies(admin_timeout * 1000);
4238
4239 nvme_quiesce_io_queues(ctrl);
4240 while (nvme_ctrl_pp_status(ctrl)) {
4241 if (time_after(jiffies, fw_act_timeout)) {
4242 dev_warn(ctrl->device,
4243 "Fw activation timeout, reset controller\n");
4244 nvme_try_sched_reset(ctrl);
4245 return;
4246 }
4247 msleep(100);
4248 }
4249
4250 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4251 return;
4252
4253 nvme_unquiesce_io_queues(ctrl);
4254 /* read FW slot information to clear the AER */
4255 nvme_get_fw_slot_info(ctrl);
4256
4257 queue_work(nvme_wq, &ctrl->async_event_work);
4258}
4259
4260static u32 nvme_aer_type(u32 result)
4261{
4262 return result & 0x7;
4263}
4264
4265static u32 nvme_aer_subtype(u32 result)
4266{
4267 return (result & 0xff00) >> 8;
4268}
4269
4270static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4271{
4272 u32 aer_notice_type = nvme_aer_subtype(result);
4273 bool requeue = true;
4274
4275 switch (aer_notice_type) {
4276 case NVME_AER_NOTICE_NS_CHANGED:
4277 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4278 nvme_queue_scan(ctrl);
4279 break;
4280 case NVME_AER_NOTICE_FW_ACT_STARTING:
4281 /*
4282 * We are (ab)using the RESETTING state to prevent subsequent
4283 * recovery actions from interfering with the controller's
4284 * firmware activation.
4285 */
4286 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4287 requeue = false;
4288 queue_work(nvme_wq, &ctrl->fw_act_work);
4289 }
4290 break;
4291#ifdef CONFIG_NVME_MULTIPATH
4292 case NVME_AER_NOTICE_ANA:
4293 if (!ctrl->ana_log_buf)
4294 break;
4295 queue_work(nvme_wq, &ctrl->ana_work);
4296 break;
4297#endif
4298 case NVME_AER_NOTICE_DISC_CHANGED:
4299 ctrl->aen_result = result;
4300 break;
4301 default:
4302 dev_warn(ctrl->device, "async event result %08x\n", result);
4303 }
4304 return requeue;
4305}
4306
4307static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4308{
4309 dev_warn(ctrl->device, "resetting controller due to AER\n");
4310 nvme_reset_ctrl(ctrl);
4311}
4312
4313void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4314 volatile union nvme_result *res)
4315{
4316 u32 result = le32_to_cpu(res->u32);
4317 u32 aer_type = nvme_aer_type(result);
4318 u32 aer_subtype = nvme_aer_subtype(result);
4319 bool requeue = true;
4320
4321 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4322 return;
4323
4324 trace_nvme_async_event(ctrl, result);
4325 switch (aer_type) {
4326 case NVME_AER_NOTICE:
4327 requeue = nvme_handle_aen_notice(ctrl, result);
4328 break;
4329 case NVME_AER_ERROR:
4330 /*
4331 * For a persistent internal error, don't run async_event_work
4332 * to submit a new AER. The controller reset will do it.
4333 */
4334 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4335 nvme_handle_aer_persistent_error(ctrl);
4336 return;
4337 }
4338 fallthrough;
4339 case NVME_AER_SMART:
4340 case NVME_AER_CSS:
4341 case NVME_AER_VS:
4342 ctrl->aen_result = result;
4343 break;
4344 default:
4345 break;
4346 }
4347
4348 if (requeue)
4349 queue_work(nvme_wq, &ctrl->async_event_work);
4350}
4351EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4352
4353int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4354 const struct blk_mq_ops *ops, unsigned int cmd_size)
4355{
4356 int ret;
4357
4358 memset(set, 0, sizeof(*set));
4359 set->ops = ops;
4360 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4361 if (ctrl->ops->flags & NVME_F_FABRICS)
4362 set->reserved_tags = NVMF_RESERVED_TAGS;
4363 set->numa_node = ctrl->numa_node;
4364 set->flags = BLK_MQ_F_NO_SCHED;
4365 if (ctrl->ops->flags & NVME_F_BLOCKING)
4366 set->flags |= BLK_MQ_F_BLOCKING;
4367 set->cmd_size = cmd_size;
4368 set->driver_data = ctrl;
4369 set->nr_hw_queues = 1;
4370 set->timeout = NVME_ADMIN_TIMEOUT;
4371 ret = blk_mq_alloc_tag_set(set);
4372 if (ret)
4373 return ret;
4374
4375 ctrl->admin_q = blk_mq_init_queue(set);
4376 if (IS_ERR(ctrl->admin_q)) {
4377 ret = PTR_ERR(ctrl->admin_q);
4378 goto out_free_tagset;
4379 }
4380
4381 if (ctrl->ops->flags & NVME_F_FABRICS) {
4382 ctrl->fabrics_q = blk_mq_init_queue(set);
4383 if (IS_ERR(ctrl->fabrics_q)) {
4384 ret = PTR_ERR(ctrl->fabrics_q);
4385 goto out_cleanup_admin_q;
4386 }
4387 }
4388
4389 ctrl->admin_tagset = set;
4390 return 0;
4391
4392out_cleanup_admin_q:
4393 blk_mq_destroy_queue(ctrl->admin_q);
4394 blk_put_queue(ctrl->admin_q);
4395out_free_tagset:
4396 blk_mq_free_tag_set(set);
4397 ctrl->admin_q = NULL;
4398 ctrl->fabrics_q = NULL;
4399 return ret;
4400}
4401EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4402
4403void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4404{
4405 blk_mq_destroy_queue(ctrl->admin_q);
4406 blk_put_queue(ctrl->admin_q);
4407 if (ctrl->ops->flags & NVME_F_FABRICS) {
4408 blk_mq_destroy_queue(ctrl->fabrics_q);
4409 blk_put_queue(ctrl->fabrics_q);
4410 }
4411 blk_mq_free_tag_set(ctrl->admin_tagset);
4412}
4413EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4414
4415int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4416 const struct blk_mq_ops *ops, unsigned int nr_maps,
4417 unsigned int cmd_size)
4418{
4419 int ret;
4420
4421 memset(set, 0, sizeof(*set));
4422 set->ops = ops;
4423 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4424 /*
4425 * Some Apple controllers requires tags to be unique across admin and
4426 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4427 */
4428 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4429 set->reserved_tags = NVME_AQ_DEPTH;
4430 else if (ctrl->ops->flags & NVME_F_FABRICS)
4431 set->reserved_tags = NVMF_RESERVED_TAGS;
4432 set->numa_node = ctrl->numa_node;
4433 set->flags = BLK_MQ_F_SHOULD_MERGE;
4434 if (ctrl->ops->flags & NVME_F_BLOCKING)
4435 set->flags |= BLK_MQ_F_BLOCKING;
4436 set->cmd_size = cmd_size,
4437 set->driver_data = ctrl;
4438 set->nr_hw_queues = ctrl->queue_count - 1;
4439 set->timeout = NVME_IO_TIMEOUT;
4440 set->nr_maps = nr_maps;
4441 ret = blk_mq_alloc_tag_set(set);
4442 if (ret)
4443 return ret;
4444
4445 if (ctrl->ops->flags & NVME_F_FABRICS) {
4446 ctrl->connect_q = blk_mq_init_queue(set);
4447 if (IS_ERR(ctrl->connect_q)) {
4448 ret = PTR_ERR(ctrl->connect_q);
4449 goto out_free_tag_set;
4450 }
4451 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4452 ctrl->connect_q);
4453 }
4454
4455 ctrl->tagset = set;
4456 return 0;
4457
4458out_free_tag_set:
4459 blk_mq_free_tag_set(set);
4460 ctrl->connect_q = NULL;
4461 return ret;
4462}
4463EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4464
4465void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4466{
4467 if (ctrl->ops->flags & NVME_F_FABRICS) {
4468 blk_mq_destroy_queue(ctrl->connect_q);
4469 blk_put_queue(ctrl->connect_q);
4470 }
4471 blk_mq_free_tag_set(ctrl->tagset);
4472}
4473EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4474
4475void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4476{
4477 nvme_mpath_stop(ctrl);
4478 nvme_auth_stop(ctrl);
4479 nvme_stop_keep_alive(ctrl);
4480 nvme_stop_failfast_work(ctrl);
4481 flush_work(&ctrl->async_event_work);
4482 cancel_work_sync(&ctrl->fw_act_work);
4483 if (ctrl->ops->stop_ctrl)
4484 ctrl->ops->stop_ctrl(ctrl);
4485}
4486EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4487
4488void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4489{
4490 nvme_enable_aen(ctrl);
4491
4492 /*
4493 * persistent discovery controllers need to send indication to userspace
4494 * to re-read the discovery log page to learn about possible changes
4495 * that were missed. We identify persistent discovery controllers by
4496 * checking that they started once before, hence are reconnecting back.
4497 */
4498 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4499 nvme_discovery_ctrl(ctrl))
4500 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4501
4502 if (ctrl->queue_count > 1) {
4503 nvme_queue_scan(ctrl);
4504 nvme_unquiesce_io_queues(ctrl);
4505 nvme_mpath_update(ctrl);
4506 }
4507
4508 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4509 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4510}
4511EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4512
4513void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4514{
4515 nvme_hwmon_exit(ctrl);
4516 nvme_fault_inject_fini(&ctrl->fault_inject);
4517 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4518 cdev_device_del(&ctrl->cdev, ctrl->device);
4519 nvme_put_ctrl(ctrl);
4520}
4521EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4522
4523static void nvme_free_cels(struct nvme_ctrl *ctrl)
4524{
4525 struct nvme_effects_log *cel;
4526 unsigned long i;
4527
4528 xa_for_each(&ctrl->cels, i, cel) {
4529 xa_erase(&ctrl->cels, i);
4530 kfree(cel);
4531 }
4532
4533 xa_destroy(&ctrl->cels);
4534}
4535
4536static void nvme_free_ctrl(struct device *dev)
4537{
4538 struct nvme_ctrl *ctrl =
4539 container_of(dev, struct nvme_ctrl, ctrl_device);
4540 struct nvme_subsystem *subsys = ctrl->subsys;
4541
4542 if (!subsys || ctrl->instance != subsys->instance)
4543 ida_free(&nvme_instance_ida, ctrl->instance);
4544 key_put(ctrl->tls_key);
4545 nvme_free_cels(ctrl);
4546 nvme_mpath_uninit(ctrl);
4547 nvme_auth_stop(ctrl);
4548 nvme_auth_free(ctrl);
4549 __free_page(ctrl->discard_page);
4550 free_opal_dev(ctrl->opal_dev);
4551
4552 if (subsys) {
4553 mutex_lock(&nvme_subsystems_lock);
4554 list_del(&ctrl->subsys_entry);
4555 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4556 mutex_unlock(&nvme_subsystems_lock);
4557 }
4558
4559 ctrl->ops->free_ctrl(ctrl);
4560
4561 if (subsys)
4562 nvme_put_subsystem(subsys);
4563}
4564
4565/*
4566 * Initialize a NVMe controller structures. This needs to be called during
4567 * earliest initialization so that we have the initialized structured around
4568 * during probing.
4569 */
4570int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4571 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4572{
4573 int ret;
4574
4575 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4576 ctrl->passthru_err_log_enabled = false;
4577 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4578 spin_lock_init(&ctrl->lock);
4579 mutex_init(&ctrl->scan_lock);
4580 INIT_LIST_HEAD(&ctrl->namespaces);
4581 xa_init(&ctrl->cels);
4582 init_rwsem(&ctrl->namespaces_rwsem);
4583 ctrl->dev = dev;
4584 ctrl->ops = ops;
4585 ctrl->quirks = quirks;
4586 ctrl->numa_node = NUMA_NO_NODE;
4587 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4588 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4589 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4590 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4591 init_waitqueue_head(&ctrl->state_wq);
4592
4593 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4594 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4595 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4596 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4597 ctrl->ka_last_check_time = jiffies;
4598
4599 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4600 PAGE_SIZE);
4601 ctrl->discard_page = alloc_page(GFP_KERNEL);
4602 if (!ctrl->discard_page) {
4603 ret = -ENOMEM;
4604 goto out;
4605 }
4606
4607 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4608 if (ret < 0)
4609 goto out;
4610 ctrl->instance = ret;
4611
4612 device_initialize(&ctrl->ctrl_device);
4613 ctrl->device = &ctrl->ctrl_device;
4614 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4615 ctrl->instance);
4616 ctrl->device->class = nvme_class;
4617 ctrl->device->parent = ctrl->dev;
4618 if (ops->dev_attr_groups)
4619 ctrl->device->groups = ops->dev_attr_groups;
4620 else
4621 ctrl->device->groups = nvme_dev_attr_groups;
4622 ctrl->device->release = nvme_free_ctrl;
4623 dev_set_drvdata(ctrl->device, ctrl);
4624 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4625 if (ret)
4626 goto out_release_instance;
4627
4628 nvme_get_ctrl(ctrl);
4629 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4630 ctrl->cdev.owner = ops->module;
4631 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4632 if (ret)
4633 goto out_free_name;
4634
4635 /*
4636 * Initialize latency tolerance controls. The sysfs files won't
4637 * be visible to userspace unless the device actually supports APST.
4638 */
4639 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4640 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4641 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4642
4643 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4644 nvme_mpath_init_ctrl(ctrl);
4645 ret = nvme_auth_init_ctrl(ctrl);
4646 if (ret)
4647 goto out_free_cdev;
4648
4649 return 0;
4650out_free_cdev:
4651 nvme_fault_inject_fini(&ctrl->fault_inject);
4652 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4653 cdev_device_del(&ctrl->cdev, ctrl->device);
4654out_free_name:
4655 nvme_put_ctrl(ctrl);
4656 kfree_const(ctrl->device->kobj.name);
4657out_release_instance:
4658 ida_free(&nvme_instance_ida, ctrl->instance);
4659out:
4660 if (ctrl->discard_page)
4661 __free_page(ctrl->discard_page);
4662 return ret;
4663}
4664EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4665
4666/* let I/O to all namespaces fail in preparation for surprise removal */
4667void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4668{
4669 struct nvme_ns *ns;
4670
4671 down_read(&ctrl->namespaces_rwsem);
4672 list_for_each_entry(ns, &ctrl->namespaces, list)
4673 blk_mark_disk_dead(ns->disk);
4674 up_read(&ctrl->namespaces_rwsem);
4675}
4676EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4677
4678void nvme_unfreeze(struct nvme_ctrl *ctrl)
4679{
4680 struct nvme_ns *ns;
4681
4682 down_read(&ctrl->namespaces_rwsem);
4683 list_for_each_entry(ns, &ctrl->namespaces, list)
4684 blk_mq_unfreeze_queue(ns->queue);
4685 up_read(&ctrl->namespaces_rwsem);
4686 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4687}
4688EXPORT_SYMBOL_GPL(nvme_unfreeze);
4689
4690int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4691{
4692 struct nvme_ns *ns;
4693
4694 down_read(&ctrl->namespaces_rwsem);
4695 list_for_each_entry(ns, &ctrl->namespaces, list) {
4696 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4697 if (timeout <= 0)
4698 break;
4699 }
4700 up_read(&ctrl->namespaces_rwsem);
4701 return timeout;
4702}
4703EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4704
4705void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4706{
4707 struct nvme_ns *ns;
4708
4709 down_read(&ctrl->namespaces_rwsem);
4710 list_for_each_entry(ns, &ctrl->namespaces, list)
4711 blk_mq_freeze_queue_wait(ns->queue);
4712 up_read(&ctrl->namespaces_rwsem);
4713}
4714EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4715
4716void nvme_start_freeze(struct nvme_ctrl *ctrl)
4717{
4718 struct nvme_ns *ns;
4719
4720 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4721 down_read(&ctrl->namespaces_rwsem);
4722 list_for_each_entry(ns, &ctrl->namespaces, list)
4723 blk_freeze_queue_start(ns->queue);
4724 up_read(&ctrl->namespaces_rwsem);
4725}
4726EXPORT_SYMBOL_GPL(nvme_start_freeze);
4727
4728void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4729{
4730 if (!ctrl->tagset)
4731 return;
4732 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4733 blk_mq_quiesce_tagset(ctrl->tagset);
4734 else
4735 blk_mq_wait_quiesce_done(ctrl->tagset);
4736}
4737EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4738
4739void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4740{
4741 if (!ctrl->tagset)
4742 return;
4743 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4744 blk_mq_unquiesce_tagset(ctrl->tagset);
4745}
4746EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4747
4748void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4749{
4750 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4751 blk_mq_quiesce_queue(ctrl->admin_q);
4752 else
4753 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4754}
4755EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4756
4757void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4758{
4759 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4760 blk_mq_unquiesce_queue(ctrl->admin_q);
4761}
4762EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4763
4764void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4765{
4766 struct nvme_ns *ns;
4767
4768 down_read(&ctrl->namespaces_rwsem);
4769 list_for_each_entry(ns, &ctrl->namespaces, list)
4770 blk_sync_queue(ns->queue);
4771 up_read(&ctrl->namespaces_rwsem);
4772}
4773EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4774
4775void nvme_sync_queues(struct nvme_ctrl *ctrl)
4776{
4777 nvme_sync_io_queues(ctrl);
4778 if (ctrl->admin_q)
4779 blk_sync_queue(ctrl->admin_q);
4780}
4781EXPORT_SYMBOL_GPL(nvme_sync_queues);
4782
4783struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4784{
4785 if (file->f_op != &nvme_dev_fops)
4786 return NULL;
4787 return file->private_data;
4788}
4789EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4790
4791/*
4792 * Check we didn't inadvertently grow the command structure sizes:
4793 */
4794static inline void _nvme_check_size(void)
4795{
4796 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4797 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4798 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4799 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4800 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4801 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4802 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4803 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4804 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4805 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4806 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4807 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4808 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4809 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4810 NVME_IDENTIFY_DATA_SIZE);
4811 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4812 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4813 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4814 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4815 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4816 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4817 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4818 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4819 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4820}
4821
4822
4823static int __init nvme_core_init(void)
4824{
4825 int result = -ENOMEM;
4826
4827 _nvme_check_size();
4828
4829 nvme_wq = alloc_workqueue("nvme-wq",
4830 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4831 if (!nvme_wq)
4832 goto out;
4833
4834 nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4835 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4836 if (!nvme_reset_wq)
4837 goto destroy_wq;
4838
4839 nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4840 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4841 if (!nvme_delete_wq)
4842 goto destroy_reset_wq;
4843
4844 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4845 NVME_MINORS, "nvme");
4846 if (result < 0)
4847 goto destroy_delete_wq;
4848
4849 nvme_class = class_create("nvme");
4850 if (IS_ERR(nvme_class)) {
4851 result = PTR_ERR(nvme_class);
4852 goto unregister_chrdev;
4853 }
4854 nvme_class->dev_uevent = nvme_class_uevent;
4855
4856 nvme_subsys_class = class_create("nvme-subsystem");
4857 if (IS_ERR(nvme_subsys_class)) {
4858 result = PTR_ERR(nvme_subsys_class);
4859 goto destroy_class;
4860 }
4861
4862 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4863 "nvme-generic");
4864 if (result < 0)
4865 goto destroy_subsys_class;
4866
4867 nvme_ns_chr_class = class_create("nvme-generic");
4868 if (IS_ERR(nvme_ns_chr_class)) {
4869 result = PTR_ERR(nvme_ns_chr_class);
4870 goto unregister_generic_ns;
4871 }
4872 result = nvme_init_auth();
4873 if (result)
4874 goto destroy_ns_chr;
4875 return 0;
4876
4877destroy_ns_chr:
4878 class_destroy(nvme_ns_chr_class);
4879unregister_generic_ns:
4880 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4881destroy_subsys_class:
4882 class_destroy(nvme_subsys_class);
4883destroy_class:
4884 class_destroy(nvme_class);
4885unregister_chrdev:
4886 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4887destroy_delete_wq:
4888 destroy_workqueue(nvme_delete_wq);
4889destroy_reset_wq:
4890 destroy_workqueue(nvme_reset_wq);
4891destroy_wq:
4892 destroy_workqueue(nvme_wq);
4893out:
4894 return result;
4895}
4896
4897static void __exit nvme_core_exit(void)
4898{
4899 nvme_exit_auth();
4900 class_destroy(nvme_ns_chr_class);
4901 class_destroy(nvme_subsys_class);
4902 class_destroy(nvme_class);
4903 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4904 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4905 destroy_workqueue(nvme_delete_wq);
4906 destroy_workqueue(nvme_reset_wq);
4907 destroy_workqueue(nvme_wq);
4908 ida_destroy(&nvme_ns_chr_minor_ida);
4909 ida_destroy(&nvme_instance_ida);
4910}
4911
4912MODULE_LICENSE("GPL");
4913MODULE_VERSION("1.0");
4914MODULE_DESCRIPTION("NVMe host core framework");
4915module_init(nvme_core_init);
4916module_exit(nvme_core_exit);
Linux 6.x block layer and io_uring tree(s)