| 1 | /* |
| 2 | * Copyright (c) 2013 Qualcomm Atheros, Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #include "ath9k.h" |
| 18 | |
| 19 | static void ath9k_tx99_stop(struct ath_softc *sc) |
| 20 | { |
| 21 | struct ath_hw *ah = sc->sc_ah; |
| 22 | struct ath_common *common = ath9k_hw_common(ah); |
| 23 | |
| 24 | ath_drain_all_txq(sc); |
| 25 | ath_startrecv(sc); |
| 26 | |
| 27 | ath9k_hw_set_interrupts(ah); |
| 28 | ath9k_hw_enable_interrupts(ah); |
| 29 | |
| 30 | ieee80211_wake_queues(sc->hw); |
| 31 | |
| 32 | kfree_skb(sc->tx99_skb); |
| 33 | sc->tx99_skb = NULL; |
| 34 | sc->tx99_state = false; |
| 35 | |
| 36 | ath9k_hw_tx99_stop(sc->sc_ah); |
| 37 | ath_dbg(common, XMIT, "TX99 stopped\n"); |
| 38 | } |
| 39 | |
| 40 | static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc) |
| 41 | { |
| 42 | static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24, |
| 43 | 0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50, |
| 44 | 0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1, |
| 45 | 0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18, |
| 46 | 0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8, |
| 47 | 0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84, |
| 48 | 0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3, |
| 49 | 0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0}; |
| 50 | u32 len = 1200; |
| 51 | struct ieee80211_tx_rate *rate; |
| 52 | struct ieee80211_hw *hw = sc->hw; |
| 53 | struct ath_hw *ah = sc->sc_ah; |
| 54 | struct ieee80211_hdr *hdr; |
| 55 | struct ieee80211_tx_info *tx_info; |
| 56 | struct sk_buff *skb; |
| 57 | struct ath_vif *avp; |
| 58 | |
| 59 | if (!sc->tx99_vif) |
| 60 | return NULL; |
| 61 | |
| 62 | avp = (struct ath_vif *)sc->tx99_vif->drv_priv; |
| 63 | |
| 64 | skb = alloc_skb(len, GFP_KERNEL); |
| 65 | if (!skb) |
| 66 | return NULL; |
| 67 | |
| 68 | skb_put(skb, len); |
| 69 | |
| 70 | memset(skb->data, 0, len); |
| 71 | |
| 72 | hdr = (struct ieee80211_hdr *)skb->data; |
| 73 | hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA); |
| 74 | hdr->duration_id = 0; |
| 75 | |
| 76 | memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN); |
| 77 | memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN); |
| 78 | memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); |
| 79 | |
| 80 | hdr->seq_ctrl |= cpu_to_le16(avp->seq_no); |
| 81 | |
| 82 | tx_info = IEEE80211_SKB_CB(skb); |
| 83 | memset(tx_info, 0, sizeof(*tx_info)); |
| 84 | rate = &tx_info->control.rates[0]; |
| 85 | tx_info->band = sc->cur_chan->chandef.chan->band; |
| 86 | tx_info->flags = IEEE80211_TX_CTL_NO_ACK; |
| 87 | tx_info->control.vif = sc->tx99_vif; |
| 88 | rate->count = 1; |
| 89 | if (ah->curchan && IS_CHAN_HT(ah->curchan)) { |
| 90 | rate->flags |= IEEE80211_TX_RC_MCS; |
| 91 | if (IS_CHAN_HT40(ah->curchan)) |
| 92 | rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; |
| 93 | } |
| 94 | |
| 95 | memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data)); |
| 96 | |
| 97 | return skb; |
| 98 | } |
| 99 | |
| 100 | static void ath9k_tx99_deinit(struct ath_softc *sc) |
| 101 | { |
| 102 | ath_reset(sc, NULL); |
| 103 | |
| 104 | ath9k_ps_wakeup(sc); |
| 105 | ath9k_tx99_stop(sc); |
| 106 | ath9k_ps_restore(sc); |
| 107 | } |
| 108 | |
| 109 | static int ath9k_tx99_init(struct ath_softc *sc) |
| 110 | { |
| 111 | struct ieee80211_hw *hw = sc->hw; |
| 112 | struct ath_hw *ah = sc->sc_ah; |
| 113 | struct ath_common *common = ath9k_hw_common(ah); |
| 114 | struct ath_tx_control txctl; |
| 115 | int r; |
| 116 | |
| 117 | if (test_bit(ATH_OP_INVALID, &common->op_flags)) { |
| 118 | ath_err(common, |
| 119 | "driver is in invalid state unable to use TX99"); |
| 120 | return -EINVAL; |
| 121 | } |
| 122 | |
| 123 | sc->tx99_skb = ath9k_build_tx99_skb(sc); |
| 124 | if (!sc->tx99_skb) |
| 125 | return -ENOMEM; |
| 126 | |
| 127 | memset(&txctl, 0, sizeof(txctl)); |
| 128 | txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; |
| 129 | |
| 130 | ath_reset(sc, NULL); |
| 131 | |
| 132 | ath9k_ps_wakeup(sc); |
| 133 | |
| 134 | ath9k_hw_disable_interrupts(ah); |
| 135 | atomic_set(&ah->intr_ref_cnt, -1); |
| 136 | ath_drain_all_txq(sc); |
| 137 | ath_stoprecv(sc); |
| 138 | |
| 139 | sc->tx99_state = true; |
| 140 | |
| 141 | ieee80211_stop_queues(hw); |
| 142 | |
| 143 | if (sc->tx99_power == MAX_RATE_POWER + 1) |
| 144 | sc->tx99_power = MAX_RATE_POWER; |
| 145 | |
| 146 | ath9k_hw_tx99_set_txpower(ah, sc->tx99_power); |
| 147 | r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl); |
| 148 | if (r) { |
| 149 | ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n"); |
| 150 | return r; |
| 151 | } |
| 152 | |
| 153 | ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n", |
| 154 | sc->tx99_power, |
| 155 | sc->tx99_power / 2); |
| 156 | |
| 157 | /* We leave the harware awake as it will be chugging on */ |
| 158 | |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | static ssize_t read_file_tx99(struct file *file, char __user *user_buf, |
| 163 | size_t count, loff_t *ppos) |
| 164 | { |
| 165 | struct ath_softc *sc = file->private_data; |
| 166 | char buf[3]; |
| 167 | unsigned int len; |
| 168 | |
| 169 | len = sprintf(buf, "%d\n", sc->tx99_state); |
| 170 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
| 171 | } |
| 172 | |
| 173 | static ssize_t write_file_tx99(struct file *file, const char __user *user_buf, |
| 174 | size_t count, loff_t *ppos) |
| 175 | { |
| 176 | struct ath_softc *sc = file->private_data; |
| 177 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
| 178 | char buf[32]; |
| 179 | bool start; |
| 180 | ssize_t len; |
| 181 | int r; |
| 182 | |
| 183 | if (sc->cur_chan->nvifs > 1) |
| 184 | return -EOPNOTSUPP; |
| 185 | |
| 186 | len = min(count, sizeof(buf) - 1); |
| 187 | if (copy_from_user(buf, user_buf, len)) |
| 188 | return -EFAULT; |
| 189 | |
| 190 | if (strtobool(buf, &start)) |
| 191 | return -EINVAL; |
| 192 | |
| 193 | if (start == sc->tx99_state) { |
| 194 | if (!start) |
| 195 | return count; |
| 196 | ath_dbg(common, XMIT, "Resetting TX99\n"); |
| 197 | ath9k_tx99_deinit(sc); |
| 198 | } |
| 199 | |
| 200 | if (!start) { |
| 201 | ath9k_tx99_deinit(sc); |
| 202 | return count; |
| 203 | } |
| 204 | |
| 205 | r = ath9k_tx99_init(sc); |
| 206 | if (r) |
| 207 | return r; |
| 208 | |
| 209 | return count; |
| 210 | } |
| 211 | |
| 212 | static const struct file_operations fops_tx99 = { |
| 213 | .read = read_file_tx99, |
| 214 | .write = write_file_tx99, |
| 215 | .open = simple_open, |
| 216 | .owner = THIS_MODULE, |
| 217 | .llseek = default_llseek, |
| 218 | }; |
| 219 | |
| 220 | static ssize_t read_file_tx99_power(struct file *file, |
| 221 | char __user *user_buf, |
| 222 | size_t count, loff_t *ppos) |
| 223 | { |
| 224 | struct ath_softc *sc = file->private_data; |
| 225 | char buf[32]; |
| 226 | unsigned int len; |
| 227 | |
| 228 | len = sprintf(buf, "%d (%d dBm)\n", |
| 229 | sc->tx99_power, |
| 230 | sc->tx99_power / 2); |
| 231 | |
| 232 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
| 233 | } |
| 234 | |
| 235 | static ssize_t write_file_tx99_power(struct file *file, |
| 236 | const char __user *user_buf, |
| 237 | size_t count, loff_t *ppos) |
| 238 | { |
| 239 | struct ath_softc *sc = file->private_data; |
| 240 | int r; |
| 241 | u8 tx_power; |
| 242 | |
| 243 | r = kstrtou8_from_user(user_buf, count, 0, &tx_power); |
| 244 | if (r) |
| 245 | return r; |
| 246 | |
| 247 | if (tx_power > MAX_RATE_POWER) |
| 248 | return -EINVAL; |
| 249 | |
| 250 | sc->tx99_power = tx_power; |
| 251 | |
| 252 | ath9k_ps_wakeup(sc); |
| 253 | ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power); |
| 254 | ath9k_ps_restore(sc); |
| 255 | |
| 256 | return count; |
| 257 | } |
| 258 | |
| 259 | static const struct file_operations fops_tx99_power = { |
| 260 | .read = read_file_tx99_power, |
| 261 | .write = write_file_tx99_power, |
| 262 | .open = simple_open, |
| 263 | .owner = THIS_MODULE, |
| 264 | .llseek = default_llseek, |
| 265 | }; |
| 266 | |
| 267 | void ath9k_tx99_init_debug(struct ath_softc *sc) |
| 268 | { |
| 269 | if (!AR_SREV_9300_20_OR_LATER(sc->sc_ah)) |
| 270 | return; |
| 271 | |
| 272 | debugfs_create_file("tx99", S_IRUSR | S_IWUSR, |
| 273 | sc->debug.debugfs_phy, sc, |
| 274 | &fops_tx99); |
| 275 | debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR, |
| 276 | sc->debug.debugfs_phy, sc, |
| 277 | &fops_tx99_power); |
| 278 | } |