[linux-2.6-block.git] / drivers / net / wireless / ath / ath9k / btcoex.c

/*
 * Copyright (c) 2009-2011 Atheros Communications Inc.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/export.h>
#include <linux/types.h>
#include "hw.h"

enum ath_bt_mode {
	ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
	ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
	ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
	ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
};

struct ath_btcoex_config {
	u8 bt_time_extend;
	bool bt_txstate_extend;
	bool bt_txframe_extend;
	enum ath_bt_mode bt_mode; /* coexistence mode */
	bool bt_quiet_collision;
	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	u8 bt_priority_time;
	u8 bt_first_slot_time;
	bool bt_hold_rx_clear;
	u8 wl_active_time;
	u8 wl_qc_time;
};

static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				    [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
};

static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
				 [AR9300_NUM_WLAN_WEIGHTS] = {
	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
};

void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	const struct ath_btcoex_config ath_bt_config = {
		.bt_time_extend = 0,
		.bt_txstate_extend = true,
		.bt_txframe_extend = true,
		.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
		.bt_quiet_collision = true,
		.bt_rxclear_polarity = true,
		.bt_priority_time = 2,
		.bt_first_slot_time = 5,
		.bt_hold_rx_clear = true,
		.wl_active_time = 0x20,
		.wl_qc_time = 0x20,
	};
	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
	u8 time_extend = ath_bt_config.bt_time_extend;
	u8 first_slot_time = ath_bt_config.bt_first_slot_time;

	if (AR_SREV_9300_20_OR_LATER(ah))
		rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;

	if (AR_SREV_SOC(ah)) {
		first_slot_time = 0x1d;
		time_extend = 0xa;

		btcoex_hw->bt_coex_mode3 =
			SM(ath_bt_config.wl_active_time, AR_BT_WL_ACTIVE_TIME) |
			SM(ath_bt_config.wl_qc_time, AR_BT_WL_QC_TIME);

		btcoex_hw->bt_coex_mode2 =
			AR_BT_PROTECT_BT_AFTER_WAKEUP |
			AR_BT_PHY_ERR_BT_COLL_ENABLE;
	}

	btcoex_hw->bt_coex_mode =
		(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
		SM(time_extend, AR_BT_TIME_EXTEND) |
		SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
		SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
		SM(ath_bt_config.bt_mode, AR_BT_MODE) |
		SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
		SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
		SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
		SM(first_slot_time, AR_BT_FIRST_SLOT_TIME) |
		SM(qnum, AR_BT_QCU_THRESH);

	btcoex_hw->bt_coex_mode2 |=
		SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
		SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
		AR_BT_DISABLE_BT_ANT;
}
EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);

static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
				     u8 btactive_gpio, u8 btpriority_gpio)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
	    btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
		return;

	btcoex_hw->btactive_gpio = btactive_gpio;
	btcoex_hw->wlanactive_gpio = wlanactive_gpio;
	btcoex_hw->btpriority_gpio = btpriority_gpio;
}

void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
{
	struct ath_common *common = ath9k_hw_common(ah);
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/*
	 * Check if BTCOEX is globally disabled.
	 */
	if (!common->btcoex_enabled) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
		return;
	}

	if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;

		ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
					 ATH_BTACTIVE_GPIO_9300,
					 ATH_BTPRIORITY_GPIO_9300);
	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
		if (AR_SREV_9285(ah))
			btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
		else
			btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;

		ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
					 ATH_BTACTIVE_GPIO_9280,
					 ATH_BTPRIORITY_GPIO_9285);
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);

void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* connect bt_active to baseband */
	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
		    (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
		     AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));

	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
		    AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);

	/* Set input mux for bt_active to gpio pin */
	if (!AR_SREV_SOC(ah))
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
			      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			      btcoex_hw->btactive_gpio);

	/* Configure the desired gpio port for input */
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
				 "ath9k-btactive");
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);

void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* btcoex 3-wire */
	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
			(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
			 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));

	/* Set input mux for bt_prority_async and
	 *                  bt_active_async to GPIO pins */
	if (!AR_SREV_SOC(ah)) {
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
			      AR_GPIO_INPUT_MUX1_BT_ACTIVE,
			      btcoex_hw->btactive_gpio);
		REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
			      AR_GPIO_INPUT_MUX1_BT_PRIORITY,
			      btcoex_hw->btpriority_gpio);
	}

	/* Configure the desired GPIO ports for input */
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
				 "ath9k-btactive");
	ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
				 "ath9k-btpriority");
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);

void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
	ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
	ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
}
EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);

void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
{
	ah->btcoex_hw.mci.ready = false;
	ah->btcoex_hw.mci.bt_state = 0;
	ah->btcoex_hw.mci.bt_ver_major = 3;
	ah->btcoex_hw.mci.bt_ver_minor = 0;
	ah->btcoex_hw.mci.bt_version_known = false;
	ah->btcoex_hw.mci.update_2g5g = true;
	ah->btcoex_hw.mci.is_2g = true;
	ah->btcoex_hw.mci.wlan_channels_update = false;
	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	ah->btcoex_hw.mci.query_bt = true;
	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	ah->btcoex_hw.mci.halted_bt_gpm = false;
	ah->btcoex_hw.mci.need_flush_btinfo = false;
	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	ah->btcoex_hw.mci.wlan_cal_done = 0;
	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);

static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	/* Configure the desired GPIO port for TX_FRAME output */
	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
				  "ath9k-wlanactive",
				  AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
}

/*
 * For AR9002, bt_weight/wlan_weight are used.
 * For AR9003 and above, stomp_type is used.
 */
void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
				u32 bt_weight,
				u32 wlan_weight,
				enum ath_stomp_type stomp_type)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	const u32 *weight = ar9003_wlan_weights[stomp_type];
	int i;

	if (!AR_SREV_9300_20_OR_LATER(ah)) {
		btcoex_hw->bt_coex_weights =
			SM(bt_weight, AR_BTCOEX_BT_WGHT) |
			SM(wlan_weight, AR_BTCOEX_WL_WGHT);
		return;
	}

	if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
		enum ath_stomp_type stype =
			((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
			 btcoex_hw->mci.stomp_ftp) ?
			ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
		weight = mci_wlan_weights[stype];
	}

	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
		btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
		btcoex_hw->wlan_weight[i] = weight[i];
		if (concur_tx && i) {
			btcoex_hw->wlan_weight[i] &=
				~(0xff << txprio_shift[i-1]);
			btcoex_hw->wlan_weight[i] |=
				(btcoex_hw->tx_prio[stomp_type] <<
				 txprio_shift[i-1]);
		}
	}

	/* Last WLAN weight has to be adjusted wrt tx priority */
	if (concur_tx) {
		btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
		btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
						      << txprio_shift[i-1]);
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);


static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	u32  val;
	int i;

	/*
	 * Program coex mode and weight registers to
	 * enable coex 3-wire
	 */
	if (AR_SREV_SOC(ah))
		REG_CLR_BIT(ah, AR_BT_COEX_MODE2, AR_BT_PHY_ERR_BT_COLL_ENABLE);

	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);

	if (AR_SREV_SOC(ah))
		REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3);

	if (AR_SREV_9300_20_OR_LATER(ah)) {
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
		REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
		for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
			REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
				  btcoex->bt_weight[i]);
	} else
		REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);

	if (AR_SREV_9271(ah)) {
		val = REG_READ(ah, 0x50040);
		val &= 0xFFFFFEFF;
		REG_WRITE(ah, 0x50040, val);
	}

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);

	ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
				  "ath9k-wlanactive",
				  AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
}

static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex->wlan_weight[i]);

	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	btcoex->enabled = true;
}

static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);

	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
		REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
			  btcoex_hw->wlan_weight[i]);
}

void ath9k_hw_btcoex_enable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;

	switch (ath9k_hw_get_btcoex_scheme(ah)) {
	case ATH_BTCOEX_CFG_NONE:
		return;
	case ATH_BTCOEX_CFG_2WIRE:
		ath9k_hw_btcoex_enable_2wire(ah);
		break;
	case ATH_BTCOEX_CFG_3WIRE:
		ath9k_hw_btcoex_enable_3wire(ah);
		break;
	case ATH_BTCOEX_CFG_MCI:
		ath9k_hw_btcoex_enable_mci(ah);
		break;
	}

	if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI &&
	    !AR_SREV_SOC(ah)) {
		REG_RMW(ah, AR_GPIO_PDPU(ah),
			(0x2 << (btcoex_hw->btactive_gpio * 2)),
			(0x3 << (btcoex_hw->btactive_gpio * 2)));
	}

	ah->btcoex_hw.enabled = true;
}
EXPORT_SYMBOL(ath9k_hw_btcoex_enable);

void ath9k_hw_btcoex_disable(struct ath_hw *ah)
{
	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	int i;

	btcoex_hw->enabled = false;

	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
		ath9k_hw_btcoex_disable_mci(ah);
		return;
	}

	if (!AR_SREV_9300_20_OR_LATER(ah))
		ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);

	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
				  NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
		REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
		REG_WRITE(ah, AR_BT_COEX_MODE2, 0);

		if (AR_SREV_9300_20_OR_LATER(ah)) {
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
			REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
			for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
				REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
		} else
			REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);

	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_disable);

/*
 * Configures appropriate weight based on stomp type.
 */
void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
			      enum ath_stomp_type stomp_type)
{
	if (AR_SREV_9300_20_OR_LATER(ah)) {
		ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
		return;
	}

	switch (stomp_type) {
	case ATH_BTCOEX_STOMP_ALL:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_ALL_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_LOW:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_LOW_WLAN_WGHT, 0);
		break;
	case ATH_BTCOEX_STOMP_NONE:
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_NONE_WLAN_WGHT, 0);
		break;
	default:
		ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
		break;
	}
}
EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);

void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
{
	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	int i;

	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
		btcoex->tx_prio[i] = stomp_txprio[i];
}
EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);
Commit	Line	Data
	1	/*
	2	* Copyright (c) 2009-2011 Atheros Communications Inc.
	3	*
	4	* Permission to use, copy, modify, and/or distribute this software for any
	5	* purpose with or without fee is hereby granted, provided that the above
	6	* copyright notice and this permission notice appear in all copies.
	7	*
	8	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	9	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	10	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	11	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	12	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	13	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	14	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	15	*/
	16
	17	#include <linux/export.h>
	18	#include <linux/types.h>
	19	#include "hw.h"
	20
	21	enum ath_bt_mode {
	22	ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
	23	ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
	24	ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
	25	ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
	26	};
	27
	28	struct ath_btcoex_config {
	29	u8 bt_time_extend;
	30	bool bt_txstate_extend;
	31	bool bt_txframe_extend;
	32	enum ath_bt_mode bt_mode; /* coexistence mode */
	33	bool bt_quiet_collision;
	34	bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
	35	u8 bt_priority_time;
	36	u8 bt_first_slot_time;
	37	bool bt_hold_rx_clear;
	38	u8 wl_active_time;
	39	u8 wl_qc_time;
	40	};
	41
	42	static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	43	[AR9300_NUM_WLAN_WEIGHTS] = {
	44	{ 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
	45	{ 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
	46	{ 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
	47	};
	48
	49	static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
	50	[AR9300_NUM_WLAN_WEIGHTS] = {
	51	{ 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
	52	{ 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
	53	{ 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
	54	{ 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
	55	{ 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
	56	};
	57
	58	void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
	59	{
	60	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	61	const struct ath_btcoex_config ath_bt_config = {
	62	.bt_time_extend = 0,
	63	.bt_txstate_extend = true,
	64	.bt_txframe_extend = true,
	65	.bt_mode = ATH_BT_COEX_MODE_SLOTTED,
	66	.bt_quiet_collision = true,
	67	.bt_rxclear_polarity = true,
	68	.bt_priority_time = 2,
	69	.bt_first_slot_time = 5,
	70	.bt_hold_rx_clear = true,
	71	.wl_active_time = 0x20,
	72	.wl_qc_time = 0x20,
	73	};
	74	bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
	75	u8 time_extend = ath_bt_config.bt_time_extend;
	76	u8 first_slot_time = ath_bt_config.bt_first_slot_time;
	77
	78	if (AR_SREV_9300_20_OR_LATER(ah))
	79	rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
	80
	81	if (AR_SREV_SOC(ah)) {
	82	first_slot_time = 0x1d;
	83	time_extend = 0xa;
	84
	85	btcoex_hw->bt_coex_mode3 =
	86	SM(ath_bt_config.wl_active_time, AR_BT_WL_ACTIVE_TIME) \|
	87	SM(ath_bt_config.wl_qc_time, AR_BT_WL_QC_TIME);
	88
	89	btcoex_hw->bt_coex_mode2 =
	90	AR_BT_PROTECT_BT_AFTER_WAKEUP \|
	91	AR_BT_PHY_ERR_BT_COLL_ENABLE;
	92	}
	93
	94	btcoex_hw->bt_coex_mode =
	95	(btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) \|
	96	SM(time_extend, AR_BT_TIME_EXTEND) \|
	97	SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) \|
	98	SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) \|
	99	SM(ath_bt_config.bt_mode, AR_BT_MODE) \|
	100	SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) \|
	101	SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) \|
	102	SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) \|
	103	SM(first_slot_time, AR_BT_FIRST_SLOT_TIME) \|
	104	SM(qnum, AR_BT_QCU_THRESH);
	105
	106	btcoex_hw->bt_coex_mode2 \|=
	107	SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) \|
	108	SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) \|
	109	AR_BT_DISABLE_BT_ANT;
	110	}
	111	EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
	112
	113	static void ath9k_hw_btcoex_pin_init(struct ath_hw *ah, u8 wlanactive_gpio,
	114	u8 btactive_gpio, u8 btpriority_gpio)
	115	{
	116	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	117
	118	if (btcoex_hw->scheme != ATH_BTCOEX_CFG_2WIRE &&
	119	btcoex_hw->scheme != ATH_BTCOEX_CFG_3WIRE)
	120	return;
	121
	122	btcoex_hw->btactive_gpio = btactive_gpio;
	123	btcoex_hw->wlanactive_gpio = wlanactive_gpio;
	124	btcoex_hw->btpriority_gpio = btpriority_gpio;
	125	}
	126
	127	void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
	128	{
	129	struct ath_common *common = ath9k_hw_common(ah);
	130	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	131
	132	/*
	133	* Check if BTCOEX is globally disabled.
	134	*/
	135	if (!common->btcoex_enabled) {
	136	btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
	137	return;
	138	}
	139
	140	if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
	141	btcoex_hw->scheme = ATH_BTCOEX_CFG_MCI;
	142	} else if (AR_SREV_9300_20_OR_LATER(ah)) {
	143	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	144
	145	ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9300,
	146	ATH_BTACTIVE_GPIO_9300,
	147	ATH_BTPRIORITY_GPIO_9300);
	148	} else if (AR_SREV_9280_20_OR_LATER(ah)) {
	149	if (AR_SREV_9285(ah))
	150	btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
	151	else
	152	btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
	153
	154	ath9k_hw_btcoex_pin_init(ah, ATH_WLANACTIVE_GPIO_9280,
	155	ATH_BTACTIVE_GPIO_9280,
	156	ATH_BTPRIORITY_GPIO_9285);
	157	}
	158	}
	159	EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
	160
	161	void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
	162	{
	163	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	164
	165	/* connect bt_active to baseband */
	166	REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
	167	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF \|
	168	AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
	169
	170	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
	171	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
	172
	173	/* Set input mux for bt_active to gpio pin */
	174	if (!AR_SREV_SOC(ah))
	175	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
	176	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
	177	btcoex_hw->btactive_gpio);
	178
	179	/* Configure the desired gpio port for input */
	180	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
	181	"ath9k-btactive");
	182	}
	183	EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
	184
	185	void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
	186	{
	187	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	188
	189	/* btcoex 3-wire */
	190	REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL(ah),
	191	(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB \|
	192	AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
	193
	194	/* Set input mux for bt_prority_async and
	195	* bt_active_async to GPIO pins */
	196	if (!AR_SREV_SOC(ah)) {
	197	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
	198	AR_GPIO_INPUT_MUX1_BT_ACTIVE,
	199	btcoex_hw->btactive_gpio);
	200	REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1(ah),
	201	AR_GPIO_INPUT_MUX1_BT_PRIORITY,
	202	btcoex_hw->btpriority_gpio);
	203	}
	204
	205	/* Configure the desired GPIO ports for input */
	206	ath9k_hw_gpio_request_in(ah, btcoex_hw->btactive_gpio,
	207	"ath9k-btactive");
	208	ath9k_hw_gpio_request_in(ah, btcoex_hw->btpriority_gpio,
	209	"ath9k-btpriority");
	210	}
	211	EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
	212
	213	void ath9k_hw_btcoex_deinit(struct ath_hw *ah)
	214	{
	215	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	216
	217	ath9k_hw_gpio_free(ah, btcoex_hw->btactive_gpio);
	218	ath9k_hw_gpio_free(ah, btcoex_hw->btpriority_gpio);
	219	ath9k_hw_gpio_free(ah, btcoex_hw->wlanactive_gpio);
	220	}
	221	EXPORT_SYMBOL(ath9k_hw_btcoex_deinit);
	222
	223	void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
	224	{
	225	ah->btcoex_hw.mci.ready = false;
	226	ah->btcoex_hw.mci.bt_state = 0;
	227	ah->btcoex_hw.mci.bt_ver_major = 3;
	228	ah->btcoex_hw.mci.bt_ver_minor = 0;
	229	ah->btcoex_hw.mci.bt_version_known = false;
	230	ah->btcoex_hw.mci.update_2g5g = true;
	231	ah->btcoex_hw.mci.is_2g = true;
	232	ah->btcoex_hw.mci.wlan_channels_update = false;
	233	ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
	234	ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
	235	ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
	236	ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
	237	ah->btcoex_hw.mci.query_bt = true;
	238	ah->btcoex_hw.mci.unhalt_bt_gpm = true;
	239	ah->btcoex_hw.mci.halted_bt_gpm = false;
	240	ah->btcoex_hw.mci.need_flush_btinfo = false;
	241	ah->btcoex_hw.mci.wlan_cal_seq = 0;
	242	ah->btcoex_hw.mci.wlan_cal_done = 0;
	243	ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
	244	}
	245	EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
	246
	247	static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
	248	{
	249	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	250
	251	/* Configure the desired GPIO port for TX_FRAME output */
	252	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
	253	"ath9k-wlanactive",
	254	AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
	255	}
	256
	257	/*
	258	* For AR9002, bt_weight/wlan_weight are used.
	259	* For AR9003 and above, stomp_type is used.
	260	*/
	261	void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
	262	u32 bt_weight,
	263	u32 wlan_weight,
	264	enum ath_stomp_type stomp_type)
	265	{
	266	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	267	struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
	268	u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
	269	bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
	270	const u32 *weight = ar9003_wlan_weights[stomp_type];
	271	int i;
	272
	273	if (!AR_SREV_9300_20_OR_LATER(ah)) {
	274	btcoex_hw->bt_coex_weights =
	275	SM(bt_weight, AR_BTCOEX_BT_WGHT) \|
	276	SM(wlan_weight, AR_BTCOEX_WL_WGHT);
	277	return;
	278	}
	279
	280	if (AR_SREV_9462(ah) \|\| AR_SREV_9565(ah)) {
	281	enum ath_stomp_type stype =
	282	((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
	283	btcoex_hw->mci.stomp_ftp) ?
	284	ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
	285	weight = mci_wlan_weights[stype];
	286	}
	287
	288	for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
	289	btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
	290	btcoex_hw->wlan_weight[i] = weight[i];
	291	if (concur_tx && i) {
	292	btcoex_hw->wlan_weight[i] &=
	293	~(0xff << txprio_shift[i-1]);
	294	btcoex_hw->wlan_weight[i] \|=
	295	(btcoex_hw->tx_prio[stomp_type] <<
	296	txprio_shift[i-1]);
	297	}
	298	}
	299
	300	/* Last WLAN weight has to be adjusted wrt tx priority */
	301	if (concur_tx) {
	302	btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
	303	btcoex_hw->wlan_weight[i-1] \|= (btcoex_hw->tx_prio[stomp_type]
	304	<< txprio_shift[i-1]);
	305	}
	306	}
	307	EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
	308
	309
	310	static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
	311	{
	312	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	313	u32 val;
	314	int i;
	315
	316	/*
	317	* Program coex mode and weight registers to
	318	* enable coex 3-wire
	319	*/
	320	if (AR_SREV_SOC(ah))
	321	REG_CLR_BIT(ah, AR_BT_COEX_MODE2, AR_BT_PHY_ERR_BT_COLL_ENABLE);
	322
	323	REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
	324	REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
	325
	326	if (AR_SREV_SOC(ah))
	327	REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3);
	328
	329	if (AR_SREV_9300_20_OR_LATER(ah)) {
	330	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
	331	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
	332	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	333	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
	334	btcoex->bt_weight[i]);
	335	} else
	336	REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
	337
	338	if (AR_SREV_9271(ah)) {
	339	val = REG_READ(ah, 0x50040);
	340	val &= 0xFFFFFEFF;
	341	REG_WRITE(ah, 0x50040, val);
	342	}
	343
	344	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	345	REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
	346
	347	ath9k_hw_gpio_request_out(ah, btcoex->wlanactive_gpio,
	348	"ath9k-wlanactive",
	349	AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
	350	}
	351
	352	static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
	353	{
	354	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	355	int i;
	356
	357	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	358	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	359	btcoex->wlan_weight[i]);
	360
	361	REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
	362	btcoex->enabled = true;
	363	}
	364
	365	static void ath9k_hw_btcoex_disable_mci(struct ath_hw *ah)
	366	{
	367	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	368	int i;
	369
	370	ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
	371
	372	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	373	REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
	374	btcoex_hw->wlan_weight[i]);
	375	}
	376
	377	void ath9k_hw_btcoex_enable(struct ath_hw *ah)
	378	{
	379	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	380
	381	switch (ath9k_hw_get_btcoex_scheme(ah)) {
	382	case ATH_BTCOEX_CFG_NONE:
	383	return;
	384	case ATH_BTCOEX_CFG_2WIRE:
	385	ath9k_hw_btcoex_enable_2wire(ah);
	386	break;
	387	case ATH_BTCOEX_CFG_3WIRE:
	388	ath9k_hw_btcoex_enable_3wire(ah);
	389	break;
	390	case ATH_BTCOEX_CFG_MCI:
	391	ath9k_hw_btcoex_enable_mci(ah);
	392	break;
	393	}
	394
	395	if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI &&
	396	!AR_SREV_SOC(ah)) {
	397	REG_RMW(ah, AR_GPIO_PDPU(ah),
	398	(0x2 << (btcoex_hw->btactive_gpio * 2)),
	399	(0x3 << (btcoex_hw->btactive_gpio * 2)));
	400	}
	401
	402	ah->btcoex_hw.enabled = true;
	403	}
	404	EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
	405
	406	void ath9k_hw_btcoex_disable(struct ath_hw *ah)
	407	{
	408	struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
	409	int i;
	410
	411	btcoex_hw->enabled = false;
	412
	413	if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_MCI) {
	414	ath9k_hw_btcoex_disable_mci(ah);
	415	return;
	416	}
	417
	418	if (!AR_SREV_9300_20_OR_LATER(ah))
	419	ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
	420
	421	ath9k_hw_gpio_request_out(ah, btcoex_hw->wlanactive_gpio,
	422	NULL, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
	423
	424	if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
	425	REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET \| AR_BT_MODE);
	426	REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
	427
	428	if (AR_SREV_9300_20_OR_LATER(ah)) {
	429	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
	430	REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
	431	for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
	432	REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
	433	} else
	434	REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
	435
	436	}
	437	}
	438	EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
	439
	440	/*
	441	* Configures appropriate weight based on stomp type.
	442	*/
	443	void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
	444	enum ath_stomp_type stomp_type)
	445	{
	446	if (AR_SREV_9300_20_OR_LATER(ah)) {
	447	ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
	448	return;
	449	}
	450
	451	switch (stomp_type) {
	452	case ATH_BTCOEX_STOMP_ALL:
	453	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	454	AR_STOMP_ALL_WLAN_WGHT, 0);
	455	break;
	456	case ATH_BTCOEX_STOMP_LOW:
	457	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	458	AR_STOMP_LOW_WLAN_WGHT, 0);
	459	break;
	460	case ATH_BTCOEX_STOMP_NONE:
	461	ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
	462	AR_STOMP_NONE_WLAN_WGHT, 0);
	463	break;
	464	default:
	465	ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
	466	break;
	467	}
	468	}
	469	EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
	470
	471	void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw ah, u8 stomp_txprio)
	472	{
	473	struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
	474	int i;
	475
	476	for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
	477	btcoex->tx_prio[i] = stomp_txprio[i];
	478	}
	479	EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);