| 1 | /* |
| 2 | * Davicom DM9000 Fast Ethernet driver for Linux. |
| 3 | * Copyright (C) 1997 Sten Wang |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation; either version 2 |
| 8 | * of the License, or (at your option) any later version. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. |
| 16 | * |
| 17 | * Additional updates, Copyright: |
| 18 | * Ben Dooks <ben@simtec.co.uk> |
| 19 | * Sascha Hauer <s.hauer@pengutronix.de> |
| 20 | */ |
| 21 | |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/ioport.h> |
| 24 | #include <linux/netdevice.h> |
| 25 | #include <linux/etherdevice.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/skbuff.h> |
| 28 | #include <linux/spinlock.h> |
| 29 | #include <linux/crc32.h> |
| 30 | #include <linux/mii.h> |
| 31 | #include <linux/ethtool.h> |
| 32 | #include <linux/dm9000.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/platform_device.h> |
| 35 | #include <linux/irq.h> |
| 36 | |
| 37 | #include <asm/delay.h> |
| 38 | #include <asm/irq.h> |
| 39 | #include <asm/io.h> |
| 40 | |
| 41 | #include "dm9000.h" |
| 42 | |
| 43 | /* Board/System/Debug information/definition ---------------- */ |
| 44 | |
| 45 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ |
| 46 | |
| 47 | #define CARDNAME "dm9000" |
| 48 | #define PFX CARDNAME ": " |
| 49 | #define DRV_VERSION "1.30" |
| 50 | |
| 51 | #ifdef CONFIG_BLACKFIN |
| 52 | #define readsb insb |
| 53 | #define readsw insw |
| 54 | #define readsl insl |
| 55 | #define writesb outsb |
| 56 | #define writesw outsw |
| 57 | #define writesl outsl |
| 58 | #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH |
| 59 | #else |
| 60 | #define DEFAULT_TRIGGER (0) |
| 61 | #endif |
| 62 | |
| 63 | /* |
| 64 | * Transmit timeout, default 5 seconds. |
| 65 | */ |
| 66 | static int watchdog = 5000; |
| 67 | module_param(watchdog, int, 0400); |
| 68 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); |
| 69 | |
| 70 | /* DM9000 register address locking. |
| 71 | * |
| 72 | * The DM9000 uses an address register to control where data written |
| 73 | * to the data register goes. This means that the address register |
| 74 | * must be preserved over interrupts or similar calls. |
| 75 | * |
| 76 | * During interrupt and other critical calls, a spinlock is used to |
| 77 | * protect the system, but the calls themselves save the address |
| 78 | * in the address register in case they are interrupting another |
| 79 | * access to the device. |
| 80 | * |
| 81 | * For general accesses a lock is provided so that calls which are |
| 82 | * allowed to sleep are serialised so that the address register does |
| 83 | * not need to be saved. This lock also serves to serialise access |
| 84 | * to the EEPROM and PHY access registers which are shared between |
| 85 | * these two devices. |
| 86 | */ |
| 87 | |
| 88 | /* Structure/enum declaration ------------------------------- */ |
| 89 | typedef struct board_info { |
| 90 | |
| 91 | void __iomem *io_addr; /* Register I/O base address */ |
| 92 | void __iomem *io_data; /* Data I/O address */ |
| 93 | u16 irq; /* IRQ */ |
| 94 | |
| 95 | u16 tx_pkt_cnt; |
| 96 | u16 queue_pkt_len; |
| 97 | u16 queue_start_addr; |
| 98 | u16 dbug_cnt; |
| 99 | u8 io_mode; /* 0:word, 2:byte */ |
| 100 | u8 phy_addr; |
| 101 | unsigned int flags; |
| 102 | unsigned int in_suspend :1; |
| 103 | |
| 104 | int debug_level; |
| 105 | |
| 106 | void (*inblk)(void __iomem *port, void *data, int length); |
| 107 | void (*outblk)(void __iomem *port, void *data, int length); |
| 108 | void (*dumpblk)(void __iomem *port, int length); |
| 109 | |
| 110 | struct device *dev; /* parent device */ |
| 111 | |
| 112 | struct resource *addr_res; /* resources found */ |
| 113 | struct resource *data_res; |
| 114 | struct resource *addr_req; /* resources requested */ |
| 115 | struct resource *data_req; |
| 116 | struct resource *irq_res; |
| 117 | |
| 118 | struct mutex addr_lock; /* phy and eeprom access lock */ |
| 119 | |
| 120 | spinlock_t lock; |
| 121 | |
| 122 | struct mii_if_info mii; |
| 123 | u32 msg_enable; |
| 124 | } board_info_t; |
| 125 | |
| 126 | /* debug code */ |
| 127 | |
| 128 | #define dm9000_dbg(db, lev, msg...) do { \ |
| 129 | if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \ |
| 130 | (lev) < db->debug_level) { \ |
| 131 | dev_dbg(db->dev, msg); \ |
| 132 | } \ |
| 133 | } while (0) |
| 134 | |
| 135 | static inline board_info_t *to_dm9000_board(struct net_device *dev) |
| 136 | { |
| 137 | return dev->priv; |
| 138 | } |
| 139 | |
| 140 | /* function declaration ------------------------------------- */ |
| 141 | static int dm9000_probe(struct platform_device *); |
| 142 | static int dm9000_open(struct net_device *); |
| 143 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); |
| 144 | static int dm9000_stop(struct net_device *); |
| 145 | |
| 146 | static void dm9000_init_dm9000(struct net_device *); |
| 147 | |
| 148 | static irqreturn_t dm9000_interrupt(int, void *); |
| 149 | |
| 150 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); |
| 151 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, |
| 152 | int value); |
| 153 | |
| 154 | static void dm9000_read_eeprom(board_info_t *, int addr, u8 *to); |
| 155 | static void dm9000_write_eeprom(board_info_t *, int addr, u8 *dp); |
| 156 | static void dm9000_rx(struct net_device *); |
| 157 | static void dm9000_hash_table(struct net_device *); |
| 158 | |
| 159 | /* DM9000 network board routine ---------------------------- */ |
| 160 | |
| 161 | static void |
| 162 | dm9000_reset(board_info_t * db) |
| 163 | { |
| 164 | dev_dbg(db->dev, "resetting device\n"); |
| 165 | |
| 166 | /* RESET device */ |
| 167 | writeb(DM9000_NCR, db->io_addr); |
| 168 | udelay(200); |
| 169 | writeb(NCR_RST, db->io_data); |
| 170 | udelay(200); |
| 171 | } |
| 172 | |
| 173 | /* |
| 174 | * Read a byte from I/O port |
| 175 | */ |
| 176 | static u8 |
| 177 | ior(board_info_t * db, int reg) |
| 178 | { |
| 179 | writeb(reg, db->io_addr); |
| 180 | return readb(db->io_data); |
| 181 | } |
| 182 | |
| 183 | /* |
| 184 | * Write a byte to I/O port |
| 185 | */ |
| 186 | |
| 187 | static void |
| 188 | iow(board_info_t * db, int reg, int value) |
| 189 | { |
| 190 | writeb(reg, db->io_addr); |
| 191 | writeb(value, db->io_data); |
| 192 | } |
| 193 | |
| 194 | /* routines for sending block to chip */ |
| 195 | |
| 196 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) |
| 197 | { |
| 198 | writesb(reg, data, count); |
| 199 | } |
| 200 | |
| 201 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) |
| 202 | { |
| 203 | writesw(reg, data, (count+1) >> 1); |
| 204 | } |
| 205 | |
| 206 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) |
| 207 | { |
| 208 | writesl(reg, data, (count+3) >> 2); |
| 209 | } |
| 210 | |
| 211 | /* input block from chip to memory */ |
| 212 | |
| 213 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) |
| 214 | { |
| 215 | readsb(reg, data, count); |
| 216 | } |
| 217 | |
| 218 | |
| 219 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) |
| 220 | { |
| 221 | readsw(reg, data, (count+1) >> 1); |
| 222 | } |
| 223 | |
| 224 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) |
| 225 | { |
| 226 | readsl(reg, data, (count+3) >> 2); |
| 227 | } |
| 228 | |
| 229 | /* dump block from chip to null */ |
| 230 | |
| 231 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) |
| 232 | { |
| 233 | int i; |
| 234 | int tmp; |
| 235 | |
| 236 | for (i = 0; i < count; i++) |
| 237 | tmp = readb(reg); |
| 238 | } |
| 239 | |
| 240 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) |
| 241 | { |
| 242 | int i; |
| 243 | int tmp; |
| 244 | |
| 245 | count = (count + 1) >> 1; |
| 246 | |
| 247 | for (i = 0; i < count; i++) |
| 248 | tmp = readw(reg); |
| 249 | } |
| 250 | |
| 251 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) |
| 252 | { |
| 253 | int i; |
| 254 | int tmp; |
| 255 | |
| 256 | count = (count + 3) >> 2; |
| 257 | |
| 258 | for (i = 0; i < count; i++) |
| 259 | tmp = readl(reg); |
| 260 | } |
| 261 | |
| 262 | /* dm9000_set_io |
| 263 | * |
| 264 | * select the specified set of io routines to use with the |
| 265 | * device |
| 266 | */ |
| 267 | |
| 268 | static void dm9000_set_io(struct board_info *db, int byte_width) |
| 269 | { |
| 270 | /* use the size of the data resource to work out what IO |
| 271 | * routines we want to use |
| 272 | */ |
| 273 | |
| 274 | switch (byte_width) { |
| 275 | case 1: |
| 276 | db->dumpblk = dm9000_dumpblk_8bit; |
| 277 | db->outblk = dm9000_outblk_8bit; |
| 278 | db->inblk = dm9000_inblk_8bit; |
| 279 | break; |
| 280 | |
| 281 | |
| 282 | case 3: |
| 283 | dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n"); |
| 284 | case 2: |
| 285 | db->dumpblk = dm9000_dumpblk_16bit; |
| 286 | db->outblk = dm9000_outblk_16bit; |
| 287 | db->inblk = dm9000_inblk_16bit; |
| 288 | break; |
| 289 | |
| 290 | case 4: |
| 291 | default: |
| 292 | db->dumpblk = dm9000_dumpblk_32bit; |
| 293 | db->outblk = dm9000_outblk_32bit; |
| 294 | db->inblk = dm9000_inblk_32bit; |
| 295 | break; |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | |
| 300 | /* Our watchdog timed out. Called by the networking layer */ |
| 301 | static void dm9000_timeout(struct net_device *dev) |
| 302 | { |
| 303 | board_info_t *db = (board_info_t *) dev->priv; |
| 304 | u8 reg_save; |
| 305 | unsigned long flags; |
| 306 | |
| 307 | /* Save previous register address */ |
| 308 | reg_save = readb(db->io_addr); |
| 309 | spin_lock_irqsave(&db->lock,flags); |
| 310 | |
| 311 | netif_stop_queue(dev); |
| 312 | dm9000_reset(db); |
| 313 | dm9000_init_dm9000(dev); |
| 314 | /* We can accept TX packets again */ |
| 315 | dev->trans_start = jiffies; |
| 316 | netif_wake_queue(dev); |
| 317 | |
| 318 | /* Restore previous register address */ |
| 319 | writeb(reg_save, db->io_addr); |
| 320 | spin_unlock_irqrestore(&db->lock,flags); |
| 321 | } |
| 322 | |
| 323 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 324 | /* |
| 325 | *Used by netconsole |
| 326 | */ |
| 327 | static void dm9000_poll_controller(struct net_device *dev) |
| 328 | { |
| 329 | disable_irq(dev->irq); |
| 330 | dm9000_interrupt(dev->irq,dev); |
| 331 | enable_irq(dev->irq); |
| 332 | } |
| 333 | #endif |
| 334 | |
| 335 | /* ethtool ops */ |
| 336 | |
| 337 | static void dm9000_get_drvinfo(struct net_device *dev, |
| 338 | struct ethtool_drvinfo *info) |
| 339 | { |
| 340 | board_info_t *dm = to_dm9000_board(dev); |
| 341 | |
| 342 | strcpy(info->driver, CARDNAME); |
| 343 | strcpy(info->version, DRV_VERSION); |
| 344 | strcpy(info->bus_info, to_platform_device(dm->dev)->name); |
| 345 | } |
| 346 | |
| 347 | static u32 dm9000_get_msglevel(struct net_device *dev) |
| 348 | { |
| 349 | board_info_t *dm = to_dm9000_board(dev); |
| 350 | |
| 351 | return dm->msg_enable; |
| 352 | } |
| 353 | |
| 354 | static void dm9000_set_msglevel(struct net_device *dev, u32 value) |
| 355 | { |
| 356 | board_info_t *dm = to_dm9000_board(dev); |
| 357 | |
| 358 | dm->msg_enable = value; |
| 359 | } |
| 360 | |
| 361 | static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 362 | { |
| 363 | board_info_t *dm = to_dm9000_board(dev); |
| 364 | |
| 365 | mii_ethtool_gset(&dm->mii, cmd); |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 370 | { |
| 371 | board_info_t *dm = to_dm9000_board(dev); |
| 372 | |
| 373 | return mii_ethtool_sset(&dm->mii, cmd); |
| 374 | } |
| 375 | |
| 376 | static int dm9000_nway_reset(struct net_device *dev) |
| 377 | { |
| 378 | board_info_t *dm = to_dm9000_board(dev); |
| 379 | return mii_nway_restart(&dm->mii); |
| 380 | } |
| 381 | |
| 382 | static u32 dm9000_get_link(struct net_device *dev) |
| 383 | { |
| 384 | board_info_t *dm = to_dm9000_board(dev); |
| 385 | return mii_link_ok(&dm->mii); |
| 386 | } |
| 387 | |
| 388 | #define DM_EEPROM_MAGIC (0x444D394B) |
| 389 | |
| 390 | static int dm9000_get_eeprom_len(struct net_device *dev) |
| 391 | { |
| 392 | return 128; |
| 393 | } |
| 394 | |
| 395 | static int dm9000_get_eeprom(struct net_device *dev, |
| 396 | struct ethtool_eeprom *ee, u8 *data) |
| 397 | { |
| 398 | board_info_t *dm = to_dm9000_board(dev); |
| 399 | int offset = ee->offset; |
| 400 | int len = ee->len; |
| 401 | int i; |
| 402 | |
| 403 | /* EEPROM access is aligned to two bytes */ |
| 404 | |
| 405 | if ((len & 1) != 0 || (offset & 1) != 0) |
| 406 | return -EINVAL; |
| 407 | |
| 408 | ee->magic = DM_EEPROM_MAGIC; |
| 409 | |
| 410 | for (i = 0; i < len; i += 2) |
| 411 | dm9000_read_eeprom(dm, (offset + i) / 2, data + i); |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | static int dm9000_set_eeprom(struct net_device *dev, |
| 417 | struct ethtool_eeprom *ee, u8 *data) |
| 418 | { |
| 419 | board_info_t *dm = to_dm9000_board(dev); |
| 420 | int offset = ee->offset; |
| 421 | int len = ee->len; |
| 422 | int i; |
| 423 | |
| 424 | /* EEPROM access is aligned to two bytes */ |
| 425 | |
| 426 | if ((len & 1) != 0 || (offset & 1) != 0) |
| 427 | return -EINVAL; |
| 428 | |
| 429 | if (ee->magic != DM_EEPROM_MAGIC) |
| 430 | return -EINVAL; |
| 431 | |
| 432 | for (i = 0; i < len; i += 2) |
| 433 | dm9000_write_eeprom(dm, (offset + i) / 2, data + i); |
| 434 | |
| 435 | return 0; |
| 436 | } |
| 437 | |
| 438 | static const struct ethtool_ops dm9000_ethtool_ops = { |
| 439 | .get_drvinfo = dm9000_get_drvinfo, |
| 440 | .get_settings = dm9000_get_settings, |
| 441 | .set_settings = dm9000_set_settings, |
| 442 | .get_msglevel = dm9000_get_msglevel, |
| 443 | .set_msglevel = dm9000_set_msglevel, |
| 444 | .nway_reset = dm9000_nway_reset, |
| 445 | .get_link = dm9000_get_link, |
| 446 | .get_eeprom_len = dm9000_get_eeprom_len, |
| 447 | .get_eeprom = dm9000_get_eeprom, |
| 448 | .set_eeprom = dm9000_set_eeprom, |
| 449 | }; |
| 450 | |
| 451 | |
| 452 | /* dm9000_release_board |
| 453 | * |
| 454 | * release a board, and any mapped resources |
| 455 | */ |
| 456 | |
| 457 | static void |
| 458 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) |
| 459 | { |
| 460 | if (db->data_res == NULL) { |
| 461 | if (db->addr_res != NULL) |
| 462 | release_mem_region((unsigned long)db->io_addr, 4); |
| 463 | return; |
| 464 | } |
| 465 | |
| 466 | /* unmap our resources */ |
| 467 | |
| 468 | iounmap(db->io_addr); |
| 469 | iounmap(db->io_data); |
| 470 | |
| 471 | /* release the resources */ |
| 472 | |
| 473 | if (db->data_req != NULL) { |
| 474 | release_resource(db->data_req); |
| 475 | kfree(db->data_req); |
| 476 | } |
| 477 | |
| 478 | if (db->addr_req != NULL) { |
| 479 | release_resource(db->addr_req); |
| 480 | kfree(db->addr_req); |
| 481 | } |
| 482 | } |
| 483 | |
| 484 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) |
| 485 | |
| 486 | /* |
| 487 | * Search DM9000 board, allocate space and register it |
| 488 | */ |
| 489 | static int |
| 490 | dm9000_probe(struct platform_device *pdev) |
| 491 | { |
| 492 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; |
| 493 | struct board_info *db; /* Point a board information structure */ |
| 494 | struct net_device *ndev; |
| 495 | unsigned long base; |
| 496 | int ret = 0; |
| 497 | int iosize; |
| 498 | int i; |
| 499 | u32 id_val; |
| 500 | |
| 501 | /* Init network device */ |
| 502 | ndev = alloc_etherdev(sizeof (struct board_info)); |
| 503 | if (!ndev) { |
| 504 | dev_err(&pdev->dev, "could not allocate device.\n"); |
| 505 | return -ENOMEM; |
| 506 | } |
| 507 | |
| 508 | SET_NETDEV_DEV(ndev, &pdev->dev); |
| 509 | |
| 510 | dev_dbg(&pdev->dev, "dm9000_probe()"); |
| 511 | |
| 512 | /* setup board info structure */ |
| 513 | db = (struct board_info *) ndev->priv; |
| 514 | memset(db, 0, sizeof (*db)); |
| 515 | |
| 516 | db->dev = &pdev->dev; |
| 517 | |
| 518 | spin_lock_init(&db->lock); |
| 519 | mutex_init(&db->addr_lock); |
| 520 | |
| 521 | if (pdev->num_resources < 2) { |
| 522 | ret = -ENODEV; |
| 523 | goto out; |
| 524 | } else if (pdev->num_resources == 2) { |
| 525 | base = pdev->resource[0].start; |
| 526 | |
| 527 | if (!request_mem_region(base, 4, ndev->name)) { |
| 528 | ret = -EBUSY; |
| 529 | goto out; |
| 530 | } |
| 531 | |
| 532 | ndev->base_addr = base; |
| 533 | ndev->irq = pdev->resource[1].start; |
| 534 | db->io_addr = (void __iomem *)base; |
| 535 | db->io_data = (void __iomem *)(base + 4); |
| 536 | |
| 537 | /* ensure at least we have a default set of IO routines */ |
| 538 | dm9000_set_io(db, 2); |
| 539 | |
| 540 | } else { |
| 541 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 542 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 543 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 544 | |
| 545 | if (db->addr_res == NULL || db->data_res == NULL || |
| 546 | db->irq_res == NULL) { |
| 547 | dev_err(db->dev, "insufficient resources\n"); |
| 548 | ret = -ENOENT; |
| 549 | goto out; |
| 550 | } |
| 551 | |
| 552 | i = res_size(db->addr_res); |
| 553 | db->addr_req = request_mem_region(db->addr_res->start, i, |
| 554 | pdev->name); |
| 555 | |
| 556 | if (db->addr_req == NULL) { |
| 557 | dev_err(db->dev, "cannot claim address reg area\n"); |
| 558 | ret = -EIO; |
| 559 | goto out; |
| 560 | } |
| 561 | |
| 562 | db->io_addr = ioremap(db->addr_res->start, i); |
| 563 | |
| 564 | if (db->io_addr == NULL) { |
| 565 | dev_err(db->dev, "failed to ioremap address reg\n"); |
| 566 | ret = -EINVAL; |
| 567 | goto out; |
| 568 | } |
| 569 | |
| 570 | iosize = res_size(db->data_res); |
| 571 | db->data_req = request_mem_region(db->data_res->start, iosize, |
| 572 | pdev->name); |
| 573 | |
| 574 | if (db->data_req == NULL) { |
| 575 | dev_err(db->dev, "cannot claim data reg area\n"); |
| 576 | ret = -EIO; |
| 577 | goto out; |
| 578 | } |
| 579 | |
| 580 | db->io_data = ioremap(db->data_res->start, iosize); |
| 581 | |
| 582 | if (db->io_data == NULL) { |
| 583 | dev_err(db->dev,"failed to ioremap data reg\n"); |
| 584 | ret = -EINVAL; |
| 585 | goto out; |
| 586 | } |
| 587 | |
| 588 | /* fill in parameters for net-dev structure */ |
| 589 | |
| 590 | ndev->base_addr = (unsigned long)db->io_addr; |
| 591 | ndev->irq = db->irq_res->start; |
| 592 | |
| 593 | /* ensure at least we have a default set of IO routines */ |
| 594 | dm9000_set_io(db, iosize); |
| 595 | } |
| 596 | |
| 597 | /* check to see if anything is being over-ridden */ |
| 598 | if (pdata != NULL) { |
| 599 | /* check to see if the driver wants to over-ride the |
| 600 | * default IO width */ |
| 601 | |
| 602 | if (pdata->flags & DM9000_PLATF_8BITONLY) |
| 603 | dm9000_set_io(db, 1); |
| 604 | |
| 605 | if (pdata->flags & DM9000_PLATF_16BITONLY) |
| 606 | dm9000_set_io(db, 2); |
| 607 | |
| 608 | if (pdata->flags & DM9000_PLATF_32BITONLY) |
| 609 | dm9000_set_io(db, 4); |
| 610 | |
| 611 | /* check to see if there are any IO routine |
| 612 | * over-rides */ |
| 613 | |
| 614 | if (pdata->inblk != NULL) |
| 615 | db->inblk = pdata->inblk; |
| 616 | |
| 617 | if (pdata->outblk != NULL) |
| 618 | db->outblk = pdata->outblk; |
| 619 | |
| 620 | if (pdata->dumpblk != NULL) |
| 621 | db->dumpblk = pdata->dumpblk; |
| 622 | |
| 623 | db->flags = pdata->flags; |
| 624 | } |
| 625 | |
| 626 | dm9000_reset(db); |
| 627 | |
| 628 | /* try two times, DM9000 sometimes gets the first read wrong */ |
| 629 | for (i = 0; i < 2; i++) { |
| 630 | id_val = ior(db, DM9000_VIDL); |
| 631 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; |
| 632 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; |
| 633 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; |
| 634 | |
| 635 | if (id_val == DM9000_ID) |
| 636 | break; |
| 637 | dev_err(db->dev, "read wrong id 0x%08x\n", id_val); |
| 638 | } |
| 639 | |
| 640 | if (id_val != DM9000_ID) { |
| 641 | dev_err(db->dev, "wrong id: 0x%08x\n", id_val); |
| 642 | ret = -ENODEV; |
| 643 | goto out; |
| 644 | } |
| 645 | |
| 646 | /* from this point we assume that we have found a DM9000 */ |
| 647 | |
| 648 | /* driver system function */ |
| 649 | ether_setup(ndev); |
| 650 | |
| 651 | ndev->open = &dm9000_open; |
| 652 | ndev->hard_start_xmit = &dm9000_start_xmit; |
| 653 | ndev->tx_timeout = &dm9000_timeout; |
| 654 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); |
| 655 | ndev->stop = &dm9000_stop; |
| 656 | ndev->set_multicast_list = &dm9000_hash_table; |
| 657 | ndev->ethtool_ops = &dm9000_ethtool_ops; |
| 658 | |
| 659 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 660 | ndev->poll_controller = &dm9000_poll_controller; |
| 661 | #endif |
| 662 | |
| 663 | db->msg_enable = NETIF_MSG_LINK; |
| 664 | db->mii.phy_id_mask = 0x1f; |
| 665 | db->mii.reg_num_mask = 0x1f; |
| 666 | db->mii.force_media = 0; |
| 667 | db->mii.full_duplex = 0; |
| 668 | db->mii.dev = ndev; |
| 669 | db->mii.mdio_read = dm9000_phy_read; |
| 670 | db->mii.mdio_write = dm9000_phy_write; |
| 671 | |
| 672 | /* try reading the node address from the attached EEPROM */ |
| 673 | for (i = 0; i < 6; i += 2) |
| 674 | dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i); |
| 675 | |
| 676 | if (!is_valid_ether_addr(ndev->dev_addr)) { |
| 677 | /* try reading from mac */ |
| 678 | |
| 679 | for (i = 0; i < 6; i++) |
| 680 | ndev->dev_addr[i] = ior(db, i+DM9000_PAR); |
| 681 | } |
| 682 | |
| 683 | if (!is_valid_ether_addr(ndev->dev_addr)) |
| 684 | dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please " |
| 685 | "set using ifconfig\n", ndev->name); |
| 686 | |
| 687 | platform_set_drvdata(pdev, ndev); |
| 688 | ret = register_netdev(ndev); |
| 689 | |
| 690 | if (ret == 0) { |
| 691 | DECLARE_MAC_BUF(mac); |
| 692 | printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n", |
| 693 | ndev->name, db->io_addr, db->io_data, ndev->irq, |
| 694 | print_mac(mac, ndev->dev_addr)); |
| 695 | } |
| 696 | return 0; |
| 697 | |
| 698 | out: |
| 699 | dev_err(db->dev, "not found (%d).\n", ret); |
| 700 | |
| 701 | dm9000_release_board(pdev, db); |
| 702 | free_netdev(ndev); |
| 703 | |
| 704 | return ret; |
| 705 | } |
| 706 | |
| 707 | /* |
| 708 | * Open the interface. |
| 709 | * The interface is opened whenever "ifconfig" actives it. |
| 710 | */ |
| 711 | static int |
| 712 | dm9000_open(struct net_device *dev) |
| 713 | { |
| 714 | board_info_t *db = (board_info_t *) dev->priv; |
| 715 | unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK; |
| 716 | |
| 717 | dev_dbg(db->dev, "entering %s\n", __func__); |
| 718 | |
| 719 | /* If there is no IRQ type specified, default to something that |
| 720 | * may work, and tell the user that this is a problem */ |
| 721 | |
| 722 | if (irqflags == IRQF_TRIGGER_NONE) { |
| 723 | dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n"); |
| 724 | irqflags = DEFAULT_TRIGGER; |
| 725 | } |
| 726 | |
| 727 | irqflags |= IRQF_SHARED; |
| 728 | |
| 729 | if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev)) |
| 730 | return -EAGAIN; |
| 731 | |
| 732 | /* Initialize DM9000 board */ |
| 733 | dm9000_reset(db); |
| 734 | dm9000_init_dm9000(dev); |
| 735 | |
| 736 | /* Init driver variable */ |
| 737 | db->dbug_cnt = 0; |
| 738 | |
| 739 | mii_check_media(&db->mii, netif_msg_link(db), 1); |
| 740 | netif_start_queue(dev); |
| 741 | |
| 742 | return 0; |
| 743 | } |
| 744 | |
| 745 | /* |
| 746 | * Initilize dm9000 board |
| 747 | */ |
| 748 | static void |
| 749 | dm9000_init_dm9000(struct net_device *dev) |
| 750 | { |
| 751 | board_info_t *db = (board_info_t *) dev->priv; |
| 752 | |
| 753 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
| 754 | |
| 755 | /* I/O mode */ |
| 756 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ |
| 757 | |
| 758 | /* GPIO0 on pre-activate PHY */ |
| 759 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ |
| 760 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ |
| 761 | iow(db, DM9000_GPR, 0); /* Enable PHY */ |
| 762 | |
| 763 | if (db->flags & DM9000_PLATF_EXT_PHY) |
| 764 | iow(db, DM9000_NCR, NCR_EXT_PHY); |
| 765 | |
| 766 | /* Program operating register */ |
| 767 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ |
| 768 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ |
| 769 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ |
| 770 | iow(db, DM9000_SMCR, 0); /* Special Mode */ |
| 771 | /* clear TX status */ |
| 772 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); |
| 773 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ |
| 774 | |
| 775 | /* Set address filter table */ |
| 776 | dm9000_hash_table(dev); |
| 777 | |
| 778 | /* Activate DM9000 */ |
| 779 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); |
| 780 | /* Enable TX/RX interrupt mask */ |
| 781 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); |
| 782 | |
| 783 | /* Init Driver variable */ |
| 784 | db->tx_pkt_cnt = 0; |
| 785 | db->queue_pkt_len = 0; |
| 786 | dev->trans_start = 0; |
| 787 | } |
| 788 | |
| 789 | /* |
| 790 | * Hardware start transmission. |
| 791 | * Send a packet to media from the upper layer. |
| 792 | */ |
| 793 | static int |
| 794 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 795 | { |
| 796 | unsigned long flags; |
| 797 | board_info_t *db = (board_info_t *) dev->priv; |
| 798 | |
| 799 | dm9000_dbg(db, 3, "%s:\n", __func__); |
| 800 | |
| 801 | if (db->tx_pkt_cnt > 1) |
| 802 | return 1; |
| 803 | |
| 804 | spin_lock_irqsave(&db->lock, flags); |
| 805 | |
| 806 | /* Move data to DM9000 TX RAM */ |
| 807 | writeb(DM9000_MWCMD, db->io_addr); |
| 808 | |
| 809 | (db->outblk)(db->io_data, skb->data, skb->len); |
| 810 | dev->stats.tx_bytes += skb->len; |
| 811 | |
| 812 | db->tx_pkt_cnt++; |
| 813 | /* TX control: First packet immediately send, second packet queue */ |
| 814 | if (db->tx_pkt_cnt == 1) { |
| 815 | /* Set TX length to DM9000 */ |
| 816 | iow(db, DM9000_TXPLL, skb->len & 0xff); |
| 817 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); |
| 818 | |
| 819 | /* Issue TX polling command */ |
| 820 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ |
| 821 | |
| 822 | dev->trans_start = jiffies; /* save the time stamp */ |
| 823 | } else { |
| 824 | /* Second packet */ |
| 825 | db->queue_pkt_len = skb->len; |
| 826 | netif_stop_queue(dev); |
| 827 | } |
| 828 | |
| 829 | spin_unlock_irqrestore(&db->lock, flags); |
| 830 | |
| 831 | /* free this SKB */ |
| 832 | dev_kfree_skb(skb); |
| 833 | |
| 834 | return 0; |
| 835 | } |
| 836 | |
| 837 | static void |
| 838 | dm9000_shutdown(struct net_device *dev) |
| 839 | { |
| 840 | board_info_t *db = (board_info_t *) dev->priv; |
| 841 | |
| 842 | /* RESET device */ |
| 843 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ |
| 844 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ |
| 845 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ |
| 846 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ |
| 847 | } |
| 848 | |
| 849 | /* |
| 850 | * Stop the interface. |
| 851 | * The interface is stopped when it is brought. |
| 852 | */ |
| 853 | static int |
| 854 | dm9000_stop(struct net_device *ndev) |
| 855 | { |
| 856 | board_info_t *db = (board_info_t *) ndev->priv; |
| 857 | |
| 858 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
| 859 | |
| 860 | netif_stop_queue(ndev); |
| 861 | netif_carrier_off(ndev); |
| 862 | |
| 863 | /* free interrupt */ |
| 864 | free_irq(ndev->irq, ndev); |
| 865 | |
| 866 | dm9000_shutdown(ndev); |
| 867 | |
| 868 | return 0; |
| 869 | } |
| 870 | |
| 871 | /* |
| 872 | * DM9000 interrupt handler |
| 873 | * receive the packet to upper layer, free the transmitted packet |
| 874 | */ |
| 875 | |
| 876 | static void |
| 877 | dm9000_tx_done(struct net_device *dev, board_info_t * db) |
| 878 | { |
| 879 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ |
| 880 | |
| 881 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { |
| 882 | /* One packet sent complete */ |
| 883 | db->tx_pkt_cnt--; |
| 884 | dev->stats.tx_packets++; |
| 885 | |
| 886 | /* Queue packet check & send */ |
| 887 | if (db->tx_pkt_cnt > 0) { |
| 888 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); |
| 889 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); |
| 890 | iow(db, DM9000_TCR, TCR_TXREQ); |
| 891 | dev->trans_start = jiffies; |
| 892 | } |
| 893 | netif_wake_queue(dev); |
| 894 | } |
| 895 | } |
| 896 | |
| 897 | static irqreturn_t |
| 898 | dm9000_interrupt(int irq, void *dev_id) |
| 899 | { |
| 900 | struct net_device *dev = dev_id; |
| 901 | board_info_t *db = (board_info_t *) dev->priv; |
| 902 | int int_status; |
| 903 | u8 reg_save; |
| 904 | |
| 905 | dm9000_dbg(db, 3, "entering %s\n", __func__); |
| 906 | |
| 907 | /* A real interrupt coming */ |
| 908 | |
| 909 | spin_lock(&db->lock); |
| 910 | |
| 911 | /* Save previous register address */ |
| 912 | reg_save = readb(db->io_addr); |
| 913 | |
| 914 | /* Disable all interrupts */ |
| 915 | iow(db, DM9000_IMR, IMR_PAR); |
| 916 | |
| 917 | /* Got DM9000 interrupt status */ |
| 918 | int_status = ior(db, DM9000_ISR); /* Got ISR */ |
| 919 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ |
| 920 | |
| 921 | /* Received the coming packet */ |
| 922 | if (int_status & ISR_PRS) |
| 923 | dm9000_rx(dev); |
| 924 | |
| 925 | /* Trnasmit Interrupt check */ |
| 926 | if (int_status & ISR_PTS) |
| 927 | dm9000_tx_done(dev, db); |
| 928 | |
| 929 | /* Re-enable interrupt mask */ |
| 930 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); |
| 931 | |
| 932 | /* Restore previous register address */ |
| 933 | writeb(reg_save, db->io_addr); |
| 934 | |
| 935 | spin_unlock(&db->lock); |
| 936 | |
| 937 | return IRQ_HANDLED; |
| 938 | } |
| 939 | |
| 940 | struct dm9000_rxhdr { |
| 941 | u8 RxPktReady; |
| 942 | u8 RxStatus; |
| 943 | u16 RxLen; |
| 944 | } __attribute__((__packed__)); |
| 945 | |
| 946 | /* |
| 947 | * Received a packet and pass to upper layer |
| 948 | */ |
| 949 | static void |
| 950 | dm9000_rx(struct net_device *dev) |
| 951 | { |
| 952 | board_info_t *db = (board_info_t *) dev->priv; |
| 953 | struct dm9000_rxhdr rxhdr; |
| 954 | struct sk_buff *skb; |
| 955 | u8 rxbyte, *rdptr; |
| 956 | bool GoodPacket; |
| 957 | int RxLen; |
| 958 | |
| 959 | /* Check packet ready or not */ |
| 960 | do { |
| 961 | ior(db, DM9000_MRCMDX); /* Dummy read */ |
| 962 | |
| 963 | /* Get most updated data */ |
| 964 | rxbyte = readb(db->io_data); |
| 965 | |
| 966 | /* Status check: this byte must be 0 or 1 */ |
| 967 | if (rxbyte > DM9000_PKT_RDY) { |
| 968 | dev_warn(db->dev, "status check fail: %d\n", rxbyte); |
| 969 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ |
| 970 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ |
| 971 | return; |
| 972 | } |
| 973 | |
| 974 | if (rxbyte != DM9000_PKT_RDY) |
| 975 | return; |
| 976 | |
| 977 | /* A packet ready now & Get status/length */ |
| 978 | GoodPacket = true; |
| 979 | writeb(DM9000_MRCMD, db->io_addr); |
| 980 | |
| 981 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); |
| 982 | |
| 983 | RxLen = le16_to_cpu(rxhdr.RxLen); |
| 984 | |
| 985 | /* Packet Status check */ |
| 986 | if (RxLen < 0x40) { |
| 987 | GoodPacket = false; |
| 988 | dev_dbg(db->dev, "Bad Packet received (runt)\n"); |
| 989 | } |
| 990 | |
| 991 | if (RxLen > DM9000_PKT_MAX) { |
| 992 | dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen); |
| 993 | } |
| 994 | |
| 995 | if (rxhdr.RxStatus & 0xbf) { |
| 996 | GoodPacket = false; |
| 997 | if (rxhdr.RxStatus & 0x01) { |
| 998 | dev_dbg(db->dev, "fifo error\n"); |
| 999 | dev->stats.rx_fifo_errors++; |
| 1000 | } |
| 1001 | if (rxhdr.RxStatus & 0x02) { |
| 1002 | dev_dbg(db->dev, "crc error\n"); |
| 1003 | dev->stats.rx_crc_errors++; |
| 1004 | } |
| 1005 | if (rxhdr.RxStatus & 0x80) { |
| 1006 | dev_dbg(db->dev, "length error\n"); |
| 1007 | dev->stats.rx_length_errors++; |
| 1008 | } |
| 1009 | } |
| 1010 | |
| 1011 | /* Move data from DM9000 */ |
| 1012 | if (GoodPacket |
| 1013 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { |
| 1014 | skb_reserve(skb, 2); |
| 1015 | rdptr = (u8 *) skb_put(skb, RxLen - 4); |
| 1016 | |
| 1017 | /* Read received packet from RX SRAM */ |
| 1018 | |
| 1019 | (db->inblk)(db->io_data, rdptr, RxLen); |
| 1020 | dev->stats.rx_bytes += RxLen; |
| 1021 | |
| 1022 | /* Pass to upper layer */ |
| 1023 | skb->protocol = eth_type_trans(skb, dev); |
| 1024 | netif_rx(skb); |
| 1025 | dev->stats.rx_packets++; |
| 1026 | |
| 1027 | } else { |
| 1028 | /* need to dump the packet's data */ |
| 1029 | |
| 1030 | (db->dumpblk)(db->io_data, RxLen); |
| 1031 | } |
| 1032 | } while (rxbyte == DM9000_PKT_RDY); |
| 1033 | } |
| 1034 | |
| 1035 | /* |
| 1036 | * Read a word data from EEPROM |
| 1037 | */ |
| 1038 | static void |
| 1039 | dm9000_read_eeprom(board_info_t *db, int offset, u8 *to) |
| 1040 | { |
| 1041 | unsigned long flags; |
| 1042 | |
| 1043 | mutex_lock(&db->addr_lock); |
| 1044 | |
| 1045 | spin_lock_irqsave(&db->lock, flags); |
| 1046 | |
| 1047 | iow(db, DM9000_EPAR, offset); |
| 1048 | iow(db, DM9000_EPCR, EPCR_ERPRR); |
| 1049 | |
| 1050 | spin_unlock_irqrestore(&db->lock, flags); |
| 1051 | |
| 1052 | mdelay(8); /* according to the datasheet 200us should be enough, |
| 1053 | but it doesn't work */ |
| 1054 | |
| 1055 | spin_lock_irqsave(&db->lock, flags); |
| 1056 | |
| 1057 | iow(db, DM9000_EPCR, 0x0); |
| 1058 | |
| 1059 | to[0] = ior(db, DM9000_EPDRL); |
| 1060 | to[1] = ior(db, DM9000_EPDRH); |
| 1061 | |
| 1062 | spin_unlock_irqrestore(&db->lock, flags); |
| 1063 | |
| 1064 | mutex_unlock(&db->addr_lock); |
| 1065 | } |
| 1066 | |
| 1067 | /* |
| 1068 | * Write a word data to SROM |
| 1069 | */ |
| 1070 | static void |
| 1071 | dm9000_write_eeprom(board_info_t *db, int offset, u8 *data) |
| 1072 | { |
| 1073 | unsigned long flags; |
| 1074 | |
| 1075 | mutex_lock(&db->addr_lock); |
| 1076 | |
| 1077 | spin_lock_irqsave(&db->lock, flags); |
| 1078 | iow(db, DM9000_EPAR, offset); |
| 1079 | iow(db, DM9000_EPDRH, data[1]); |
| 1080 | iow(db, DM9000_EPDRL, data[0]); |
| 1081 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); |
| 1082 | spin_unlock_irqrestore(&db->lock, flags); |
| 1083 | |
| 1084 | mdelay(8); /* same shit */ |
| 1085 | |
| 1086 | spin_lock_irqsave(&db->lock, flags); |
| 1087 | iow(db, DM9000_EPCR, 0); |
| 1088 | spin_unlock_irqrestore(&db->lock, flags); |
| 1089 | |
| 1090 | mutex_unlock(&db->addr_lock); |
| 1091 | } |
| 1092 | |
| 1093 | /* |
| 1094 | * Calculate the CRC valude of the Rx packet |
| 1095 | * flag = 1 : return the reverse CRC (for the received packet CRC) |
| 1096 | * 0 : return the normal CRC (for Hash Table index) |
| 1097 | */ |
| 1098 | |
| 1099 | static unsigned long |
| 1100 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) |
| 1101 | { |
| 1102 | |
| 1103 | u32 crc = ether_crc_le(Len, Data); |
| 1104 | |
| 1105 | if (flag) |
| 1106 | return ~crc; |
| 1107 | |
| 1108 | return crc; |
| 1109 | } |
| 1110 | |
| 1111 | /* |
| 1112 | * Set DM9000 multicast address |
| 1113 | */ |
| 1114 | static void |
| 1115 | dm9000_hash_table(struct net_device *dev) |
| 1116 | { |
| 1117 | board_info_t *db = (board_info_t *) dev->priv; |
| 1118 | struct dev_mc_list *mcptr = dev->mc_list; |
| 1119 | int mc_cnt = dev->mc_count; |
| 1120 | u32 hash_val; |
| 1121 | u16 i, oft, hash_table[4]; |
| 1122 | unsigned long flags; |
| 1123 | |
| 1124 | dm9000_dbg(db, 1, "entering %s\n", __func__); |
| 1125 | |
| 1126 | spin_lock_irqsave(&db->lock,flags); |
| 1127 | |
| 1128 | for (i = 0, oft = 0x10; i < 6; i++, oft++) |
| 1129 | iow(db, oft, dev->dev_addr[i]); |
| 1130 | |
| 1131 | /* Clear Hash Table */ |
| 1132 | for (i = 0; i < 4; i++) |
| 1133 | hash_table[i] = 0x0; |
| 1134 | |
| 1135 | /* broadcast address */ |
| 1136 | hash_table[3] = 0x8000; |
| 1137 | |
| 1138 | /* the multicast address in Hash Table : 64 bits */ |
| 1139 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { |
| 1140 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; |
| 1141 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); |
| 1142 | } |
| 1143 | |
| 1144 | /* Write the hash table to MAC MD table */ |
| 1145 | for (i = 0, oft = 0x16; i < 4; i++) { |
| 1146 | iow(db, oft++, hash_table[i] & 0xff); |
| 1147 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); |
| 1148 | } |
| 1149 | |
| 1150 | spin_unlock_irqrestore(&db->lock,flags); |
| 1151 | } |
| 1152 | |
| 1153 | |
| 1154 | /* |
| 1155 | * Sleep, either by using msleep() or if we are suspending, then |
| 1156 | * use mdelay() to sleep. |
| 1157 | */ |
| 1158 | static void dm9000_msleep(board_info_t *db, unsigned int ms) |
| 1159 | { |
| 1160 | if (db->in_suspend) |
| 1161 | mdelay(ms); |
| 1162 | else |
| 1163 | msleep(ms); |
| 1164 | } |
| 1165 | |
| 1166 | /* |
| 1167 | * Read a word from phyxcer |
| 1168 | */ |
| 1169 | static int |
| 1170 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) |
| 1171 | { |
| 1172 | board_info_t *db = (board_info_t *) dev->priv; |
| 1173 | unsigned long flags; |
| 1174 | unsigned int reg_save; |
| 1175 | int ret; |
| 1176 | |
| 1177 | mutex_lock(&db->addr_lock); |
| 1178 | |
| 1179 | spin_lock_irqsave(&db->lock,flags); |
| 1180 | |
| 1181 | /* Save previous register address */ |
| 1182 | reg_save = readb(db->io_addr); |
| 1183 | |
| 1184 | /* Fill the phyxcer register into REG_0C */ |
| 1185 | iow(db, DM9000_EPAR, DM9000_PHY | reg); |
| 1186 | |
| 1187 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ |
| 1188 | |
| 1189 | writeb(reg_save, db->io_addr); |
| 1190 | spin_unlock_irqrestore(&db->lock,flags); |
| 1191 | |
| 1192 | dm9000_msleep(db, 1); /* Wait read complete */ |
| 1193 | |
| 1194 | spin_lock_irqsave(&db->lock,flags); |
| 1195 | reg_save = readb(db->io_addr); |
| 1196 | |
| 1197 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ |
| 1198 | |
| 1199 | /* The read data keeps on REG_0D & REG_0E */ |
| 1200 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); |
| 1201 | |
| 1202 | /* restore the previous address */ |
| 1203 | writeb(reg_save, db->io_addr); |
| 1204 | spin_unlock_irqrestore(&db->lock,flags); |
| 1205 | |
| 1206 | mutex_unlock(&db->addr_lock); |
| 1207 | return ret; |
| 1208 | } |
| 1209 | |
| 1210 | /* |
| 1211 | * Write a word to phyxcer |
| 1212 | */ |
| 1213 | static void |
| 1214 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) |
| 1215 | { |
| 1216 | board_info_t *db = (board_info_t *) dev->priv; |
| 1217 | unsigned long flags; |
| 1218 | unsigned long reg_save; |
| 1219 | |
| 1220 | mutex_lock(&db->addr_lock); |
| 1221 | |
| 1222 | spin_lock_irqsave(&db->lock,flags); |
| 1223 | |
| 1224 | /* Save previous register address */ |
| 1225 | reg_save = readb(db->io_addr); |
| 1226 | |
| 1227 | /* Fill the phyxcer register into REG_0C */ |
| 1228 | iow(db, DM9000_EPAR, DM9000_PHY | reg); |
| 1229 | |
| 1230 | /* Fill the written data into REG_0D & REG_0E */ |
| 1231 | iow(db, DM9000_EPDRL, (value & 0xff)); |
| 1232 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); |
| 1233 | |
| 1234 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ |
| 1235 | |
| 1236 | writeb(reg_save, db->io_addr); |
| 1237 | spin_unlock_irqrestore(&db->lock, flags); |
| 1238 | |
| 1239 | dm9000_msleep(db, 1); /* Wait write complete */ |
| 1240 | |
| 1241 | spin_lock_irqsave(&db->lock,flags); |
| 1242 | reg_save = readb(db->io_addr); |
| 1243 | |
| 1244 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ |
| 1245 | |
| 1246 | /* restore the previous address */ |
| 1247 | writeb(reg_save, db->io_addr); |
| 1248 | |
| 1249 | spin_unlock_irqrestore(&db->lock, flags); |
| 1250 | mutex_unlock(&db->addr_lock); |
| 1251 | } |
| 1252 | |
| 1253 | static int |
| 1254 | dm9000_drv_suspend(struct platform_device *dev, pm_message_t state) |
| 1255 | { |
| 1256 | struct net_device *ndev = platform_get_drvdata(dev); |
| 1257 | board_info_t *db; |
| 1258 | |
| 1259 | if (ndev) { |
| 1260 | db = (board_info_t *) ndev->priv; |
| 1261 | db->in_suspend = 1; |
| 1262 | |
| 1263 | if (netif_running(ndev)) { |
| 1264 | netif_device_detach(ndev); |
| 1265 | dm9000_shutdown(ndev); |
| 1266 | } |
| 1267 | } |
| 1268 | return 0; |
| 1269 | } |
| 1270 | |
| 1271 | static int |
| 1272 | dm9000_drv_resume(struct platform_device *dev) |
| 1273 | { |
| 1274 | struct net_device *ndev = platform_get_drvdata(dev); |
| 1275 | board_info_t *db = (board_info_t *) ndev->priv; |
| 1276 | |
| 1277 | if (ndev) { |
| 1278 | |
| 1279 | if (netif_running(ndev)) { |
| 1280 | dm9000_reset(db); |
| 1281 | dm9000_init_dm9000(ndev); |
| 1282 | |
| 1283 | netif_device_attach(ndev); |
| 1284 | } |
| 1285 | |
| 1286 | db->in_suspend = 0; |
| 1287 | } |
| 1288 | return 0; |
| 1289 | } |
| 1290 | |
| 1291 | static int |
| 1292 | dm9000_drv_remove(struct platform_device *pdev) |
| 1293 | { |
| 1294 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 1295 | |
| 1296 | platform_set_drvdata(pdev, NULL); |
| 1297 | |
| 1298 | unregister_netdev(ndev); |
| 1299 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); |
| 1300 | free_netdev(ndev); /* free device structure */ |
| 1301 | |
| 1302 | dev_dbg(&pdev->dev, "released and freed device\n"); |
| 1303 | return 0; |
| 1304 | } |
| 1305 | |
| 1306 | static struct platform_driver dm9000_driver = { |
| 1307 | .driver = { |
| 1308 | .name = "dm9000", |
| 1309 | .owner = THIS_MODULE, |
| 1310 | }, |
| 1311 | .probe = dm9000_probe, |
| 1312 | .remove = dm9000_drv_remove, |
| 1313 | .suspend = dm9000_drv_suspend, |
| 1314 | .resume = dm9000_drv_resume, |
| 1315 | }; |
| 1316 | |
| 1317 | static int __init |
| 1318 | dm9000_init(void) |
| 1319 | { |
| 1320 | printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION); |
| 1321 | |
| 1322 | return platform_driver_register(&dm9000_driver); /* search board and register */ |
| 1323 | } |
| 1324 | |
| 1325 | static void __exit |
| 1326 | dm9000_cleanup(void) |
| 1327 | { |
| 1328 | platform_driver_unregister(&dm9000_driver); |
| 1329 | } |
| 1330 | |
| 1331 | module_init(dm9000_init); |
| 1332 | module_exit(dm9000_cleanup); |
| 1333 | |
| 1334 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); |
| 1335 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); |
| 1336 | MODULE_LICENSE("GPL"); |