| 1 | /* |
| 2 | * lpc_sch.c - LPC interface for Intel Poulsbo SCH |
| 3 | * |
| 4 | * LPC bridge function of the Intel SCH contains many other |
| 5 | * functional units, such as Interrupt controllers, Timers, |
| 6 | * Power Management, System Management, GPIO, RTC, and LPC |
| 7 | * Configuration Registers. |
| 8 | * |
| 9 | * Copyright (c) 2010 CompuLab Ltd |
| 10 | * Copyright (c) 2014 Intel Corp. |
| 11 | * Author: Denis Turischev <denis@compulab.co.il> |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify |
| 14 | * it under the terms of the GNU General Public License 2 as published |
| 15 | * by the Free Software Foundation. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | */ |
| 22 | |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/errno.h> |
| 26 | #include <linux/acpi.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/mfd/core.h> |
| 29 | |
| 30 | #define SMBASE 0x40 |
| 31 | #define SMBUS_IO_SIZE 64 |
| 32 | |
| 33 | #define GPIOBASE 0x44 |
| 34 | #define GPIO_IO_SIZE 64 |
| 35 | #define GPIO_IO_SIZE_CENTERTON 128 |
| 36 | |
| 37 | /* Intel Quark X1000 GPIO IRQ Number */ |
| 38 | #define GPIO_IRQ_QUARK_X1000 9 |
| 39 | |
| 40 | #define WDTBASE 0x84 |
| 41 | #define WDT_IO_SIZE 64 |
| 42 | |
| 43 | enum sch_chipsets { |
| 44 | LPC_SCH = 0, /* Intel Poulsbo SCH */ |
| 45 | LPC_ITC, /* Intel Tunnel Creek */ |
| 46 | LPC_CENTERTON, /* Intel Centerton */ |
| 47 | LPC_QUARK_X1000, /* Intel Quark X1000 */ |
| 48 | }; |
| 49 | |
| 50 | struct lpc_sch_info { |
| 51 | unsigned int io_size_smbus; |
| 52 | unsigned int io_size_gpio; |
| 53 | unsigned int io_size_wdt; |
| 54 | int irq_gpio; |
| 55 | }; |
| 56 | |
| 57 | static struct lpc_sch_info sch_chipset_info[] = { |
| 58 | [LPC_SCH] = { |
| 59 | .io_size_smbus = SMBUS_IO_SIZE, |
| 60 | .io_size_gpio = GPIO_IO_SIZE, |
| 61 | .irq_gpio = -1, |
| 62 | }, |
| 63 | [LPC_ITC] = { |
| 64 | .io_size_smbus = SMBUS_IO_SIZE, |
| 65 | .io_size_gpio = GPIO_IO_SIZE, |
| 66 | .io_size_wdt = WDT_IO_SIZE, |
| 67 | .irq_gpio = -1, |
| 68 | }, |
| 69 | [LPC_CENTERTON] = { |
| 70 | .io_size_smbus = SMBUS_IO_SIZE, |
| 71 | .io_size_gpio = GPIO_IO_SIZE_CENTERTON, |
| 72 | .io_size_wdt = WDT_IO_SIZE, |
| 73 | .irq_gpio = -1, |
| 74 | }, |
| 75 | [LPC_QUARK_X1000] = { |
| 76 | .io_size_gpio = GPIO_IO_SIZE, |
| 77 | .irq_gpio = GPIO_IRQ_QUARK_X1000, |
| 78 | .io_size_wdt = WDT_IO_SIZE, |
| 79 | }, |
| 80 | }; |
| 81 | |
| 82 | static const struct pci_device_id lpc_sch_ids[] = { |
| 83 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_LPC), LPC_SCH }, |
| 84 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ITC_LPC), LPC_ITC }, |
| 85 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_CENTERTON_ILB), LPC_CENTERTON }, |
| 86 | { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB), LPC_QUARK_X1000 }, |
| 87 | { 0, } |
| 88 | }; |
| 89 | MODULE_DEVICE_TABLE(pci, lpc_sch_ids); |
| 90 | |
| 91 | #define LPC_NO_RESOURCE 1 |
| 92 | #define LPC_SKIP_RESOURCE 2 |
| 93 | |
| 94 | static int lpc_sch_get_io(struct pci_dev *pdev, int where, const char *name, |
| 95 | struct resource *res, int size) |
| 96 | { |
| 97 | unsigned int base_addr_cfg; |
| 98 | unsigned short base_addr; |
| 99 | |
| 100 | if (size == 0) |
| 101 | return LPC_NO_RESOURCE; |
| 102 | |
| 103 | pci_read_config_dword(pdev, where, &base_addr_cfg); |
| 104 | base_addr = 0; |
| 105 | if (!(base_addr_cfg & (1 << 31))) |
| 106 | dev_warn(&pdev->dev, "Decode of the %s I/O range disabled\n", |
| 107 | name); |
| 108 | else |
| 109 | base_addr = (unsigned short)base_addr_cfg; |
| 110 | |
| 111 | if (base_addr == 0) { |
| 112 | dev_warn(&pdev->dev, "I/O space for %s uninitialized\n", name); |
| 113 | return LPC_SKIP_RESOURCE; |
| 114 | } |
| 115 | |
| 116 | res->start = base_addr; |
| 117 | res->end = base_addr + size - 1; |
| 118 | res->flags = IORESOURCE_IO; |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | static int lpc_sch_populate_cell(struct pci_dev *pdev, int where, |
| 124 | const char *name, int size, int irq, |
| 125 | int id, struct mfd_cell *cell) |
| 126 | { |
| 127 | struct resource *res; |
| 128 | int ret; |
| 129 | |
| 130 | res = devm_kcalloc(&pdev->dev, 2, sizeof(*res), GFP_KERNEL); |
| 131 | if (!res) |
| 132 | return -ENOMEM; |
| 133 | |
| 134 | ret = lpc_sch_get_io(pdev, where, name, res, size); |
| 135 | if (ret) |
| 136 | return ret; |
| 137 | |
| 138 | memset(cell, 0, sizeof(*cell)); |
| 139 | |
| 140 | cell->name = name; |
| 141 | cell->resources = res; |
| 142 | cell->num_resources = 1; |
| 143 | cell->ignore_resource_conflicts = true; |
| 144 | cell->id = id; |
| 145 | |
| 146 | /* Check if we need to add an IRQ resource */ |
| 147 | if (irq < 0) |
| 148 | return 0; |
| 149 | |
| 150 | res++; |
| 151 | |
| 152 | res->start = irq; |
| 153 | res->end = irq; |
| 154 | res->flags = IORESOURCE_IRQ; |
| 155 | |
| 156 | cell->num_resources++; |
| 157 | |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | static int lpc_sch_probe(struct pci_dev *dev, const struct pci_device_id *id) |
| 162 | { |
| 163 | struct mfd_cell lpc_sch_cells[3]; |
| 164 | struct lpc_sch_info *info = &sch_chipset_info[id->driver_data]; |
| 165 | unsigned int cells = 0; |
| 166 | int ret; |
| 167 | |
| 168 | ret = lpc_sch_populate_cell(dev, SMBASE, "isch_smbus", |
| 169 | info->io_size_smbus, -1, |
| 170 | id->device, &lpc_sch_cells[cells]); |
| 171 | if (ret < 0) |
| 172 | return ret; |
| 173 | if (ret == 0) |
| 174 | cells++; |
| 175 | |
| 176 | ret = lpc_sch_populate_cell(dev, GPIOBASE, "sch_gpio", |
| 177 | info->io_size_gpio, info->irq_gpio, |
| 178 | id->device, &lpc_sch_cells[cells]); |
| 179 | if (ret < 0) |
| 180 | return ret; |
| 181 | if (ret == 0) |
| 182 | cells++; |
| 183 | |
| 184 | ret = lpc_sch_populate_cell(dev, WDTBASE, "ie6xx_wdt", |
| 185 | info->io_size_wdt, -1, |
| 186 | id->device, &lpc_sch_cells[cells]); |
| 187 | if (ret < 0) |
| 188 | return ret; |
| 189 | if (ret == 0) |
| 190 | cells++; |
| 191 | |
| 192 | if (cells == 0) { |
| 193 | dev_err(&dev->dev, "All decode registers disabled.\n"); |
| 194 | return -ENODEV; |
| 195 | } |
| 196 | |
| 197 | return mfd_add_devices(&dev->dev, 0, lpc_sch_cells, cells, NULL, 0, NULL); |
| 198 | } |
| 199 | |
| 200 | static void lpc_sch_remove(struct pci_dev *dev) |
| 201 | { |
| 202 | mfd_remove_devices(&dev->dev); |
| 203 | } |
| 204 | |
| 205 | static struct pci_driver lpc_sch_driver = { |
| 206 | .name = "lpc_sch", |
| 207 | .id_table = lpc_sch_ids, |
| 208 | .probe = lpc_sch_probe, |
| 209 | .remove = lpc_sch_remove, |
| 210 | }; |
| 211 | |
| 212 | module_pci_driver(lpc_sch_driver); |
| 213 | |
| 214 | MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>"); |
| 215 | MODULE_DESCRIPTION("LPC interface for Intel Poulsbo SCH"); |
| 216 | MODULE_LICENSE("GPL"); |