[linux-2.6-block.git] / drivers / media / dvb-frontends / tda10021.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
    TDA10021  - Single Chip Cable Channel Receiver driver module
	       used on the Siemens DVB-C cards

    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
		   Support for TDA10021

*/

#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>

#include <media/dvb_frontend.h>
#include "tda1002x.h"


struct tda10021_state {
	struct i2c_adapter* i2c;
	/* configuration settings */
	const struct tda1002x_config* config;
	struct dvb_frontend frontend;

	u8 pwm;
	u8 reg0;
};


#if 0
#define dprintk(x...) printk(x)
#else
#define dprintk(x...)
#endif

static int verbose;

#define XIN 57840000UL

#define FIN (XIN >> 4)

static int tda10021_inittab_size = 0x40;
static u8 tda10021_inittab[0x40]=
{
	0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
	0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
	0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
	0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
	0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
	0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
	0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
	0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
};

static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	int ret;

	ret = i2c_transfer (state->i2c, &msg, 1);
	if (ret != 1)
		printk("DVB: TDA10021(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
			state->frontend.dvb->num, __func__, reg, data, ret);

	msleep(10);
	return (ret != 1) ? -EREMOTEIO : 0;
}

static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
{
	u8 b0 [] = { reg };
	u8 b1 [] = { 0 };
	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
				  { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	int ret;

	ret = i2c_transfer (state->i2c, msg, 2);
	// Don't print an error message if the id is read.
	if (ret != 2 && reg != 0x1a)
		printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
				__func__, ret);
	return b1[0];
}

//get access to tuner
static int lock_tuner(struct tda10021_state* state)
{
	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	{
		printk("tda10021: lock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

//release access from tuner
static int unlock_tuner(struct tda10021_state* state)
{
	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	{
		printk("tda10021: unlock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0,
			       enum fe_spectral_inversion inversion)
{
	reg0 |= state->reg0 & 0x63;

	if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
		reg0 &= ~0x20;
	else
		reg0 |= 0x20;

	_tda10021_writereg (state, 0x00, reg0 & 0xfe);
	_tda10021_writereg (state, 0x00, reg0 | 0x01);

	state->reg0 = reg0;
	return 0;
}

static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
{
	s32 BDR;
	s32 BDRI;
	s16 SFIL=0;
	u16 NDEC = 0;
	u32 tmp, ratio;

	if (symbolrate > XIN/2)
		symbolrate = XIN/2;
	if (symbolrate < 500000)
		symbolrate = 500000;

	if (symbolrate < XIN/16) NDEC = 1;
	if (symbolrate < XIN/32) NDEC = 2;
	if (symbolrate < XIN/64) NDEC = 3;

	if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
	if (symbolrate < (u32)(XIN/16))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
	if (symbolrate < (u32)(XIN/32))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
	if (symbolrate < (u32)(XIN/64))	 SFIL = 0;
	if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;

	symbolrate <<= NDEC;
	ratio = (symbolrate << 4) / FIN;
	tmp =  ((symbolrate << 4) % FIN) << 8;
	ratio = (ratio << 8) + tmp / FIN;
	tmp = (tmp % FIN) << 8;
	ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);

	BDR = ratio;
	BDRI = (((XIN << 5) / symbolrate) + 1) / 2;

	if (BDRI > 0xFF)
		BDRI = 0xFF;

	SFIL = (SFIL << 4) | tda10021_inittab[0x0E];

	NDEC = (NDEC << 6) | tda10021_inittab[0x03];

	_tda10021_writereg (state, 0x03, NDEC);
	_tda10021_writereg (state, 0x0a, BDR&0xff);
	_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
	_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);

	_tda10021_writereg (state, 0x0d, BDRI);
	_tda10021_writereg (state, 0x0e, SFIL);

	return 0;
}

static int tda10021_init (struct dvb_frontend *fe)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int i;

	dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);

	//_tda10021_writereg (fe, 0, 0);

	for (i=0; i<tda10021_inittab_size; i++)
		_tda10021_writereg (state, i, tda10021_inittab[i]);

	_tda10021_writereg (state, 0x34, state->pwm);

	//Comment by markus
	//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
	//0x2A[4] == BYPPLL -> Power down mode (default 1)
	//0x2A[5] == LCK -> PLL Lock Flag
	//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)

	//Activate PLL
	_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
	return 0;
}

struct qam_params {
	u8 conf, agcref, lthr, mseth, aref;
};

static int tda10021_set_parameters(struct dvb_frontend *fe)
{
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	u32 delsys  = c->delivery_system;
	unsigned qam = c->modulation;
	bool is_annex_c;
	u32 reg0x3d;
	struct tda10021_state* state = fe->demodulator_priv;
	static const struct qam_params qam_params[] = {
		/* Modulation  Conf  AGCref  LTHR  MSETH  AREF */
		[QPSK]	   = { 0x14, 0x78,   0x78, 0x8c,  0x96 },
		[QAM_16]   = { 0x00, 0x8c,   0x87, 0xa2,  0x91 },
		[QAM_32]   = { 0x04, 0x8c,   0x64, 0x74,  0x96 },
		[QAM_64]   = { 0x08, 0x6a,   0x46, 0x43,  0x6a },
		[QAM_128]  = { 0x0c, 0x78,   0x36, 0x34,  0x7e },
		[QAM_256]  = { 0x10, 0x5c,   0x26, 0x23,  0x6b },
	};

	switch (delsys) {
	case SYS_DVBC_ANNEX_A:
		is_annex_c = false;
		break;
	case SYS_DVBC_ANNEX_C:
		is_annex_c = true;
		break;
	default:
		return -EINVAL;
	}

	/*
	 * gcc optimizes the code below the same way as it would code:
	 *           "if (qam > 5) return -EINVAL;"
	 * Yet, the code is clearer, as it shows what QAM standards are
	 * supported by the driver, and avoids the usage of magic numbers on
	 * it.
	 */
	switch (qam) {
	case QPSK:
	case QAM_16:
	case QAM_32:
	case QAM_64:
	case QAM_128:
	case QAM_256:
		break;
	default:
		return -EINVAL;
	}

	if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
		return -EINVAL;

	/*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe);
		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	}

	tda10021_set_symbolrate(state, c->symbol_rate);
	_tda10021_writereg(state, 0x34, state->pwm);

	_tda10021_writereg(state, 0x01, qam_params[qam].agcref);
	_tda10021_writereg(state, 0x05, qam_params[qam].lthr);
	_tda10021_writereg(state, 0x08, qam_params[qam].mseth);
	_tda10021_writereg(state, 0x09, qam_params[qam].aref);

	/*
	 * Bit 0 == 0 means roll-off = 0.15 (Annex A)
	 *	 == 1 means roll-off = 0.13 (Annex C)
	 */
	reg0x3d = tda10021_readreg (state, 0x3d);
	if (is_annex_c)
		_tda10021_writereg (state, 0x3d, 0x01 | reg0x3d);
	else
		_tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
	tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);

	return 0;
}

static int tda10021_read_status(struct dvb_frontend *fe,
				enum fe_status *status)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int sync;

	*status = 0;
	//0x11[0] == EQALGO -> Equalizer algorithms state
	//0x11[1] == CARLOCK -> Carrier locked
	//0x11[2] == FSYNC -> Frame synchronisation
	//0x11[3] == FEL -> Front End locked
	//0x11[6] == NODVB -> DVB Mode Information
	sync = tda10021_readreg (state, 0x11);

	if (sync & 2)
		*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;

	if (sync & 4)
		*status |= FE_HAS_SYNC|FE_HAS_VITERBI;

	if (sync & 8)
		*status |= FE_HAS_LOCK;

	return 0;
}

static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u32 _ber = tda10021_readreg(state, 0x14) |
		(tda10021_readreg(state, 0x15) << 8) |
		((tda10021_readreg(state, 0x16) & 0x0f) << 16);
	_tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
					| (tda10021_inittab[0x10] & 0xc0));
	*ber = 10 * _ber;

	return 0;
}

static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u8 config = tda10021_readreg(state, 0x02);
	u8 gain = tda10021_readreg(state, 0x17);
	if (config & 0x02)
		/* the agc value is inverted */
		gain = ~gain;
	*strength = (gain << 8) | gain;

	return 0;
}

static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct tda10021_state* state = fe->demodulator_priv;

	u8 quality = ~tda10021_readreg(state, 0x18);
	*snr = (quality << 8) | quality;

	return 0;
}

static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
	struct tda10021_state* state = fe->demodulator_priv;

	*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
	if (*ucblocks == 0x7f)
		*ucblocks = 0xffffffff;

	/* reset uncorrected block counter */
	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);

	return 0;
}

static int tda10021_get_frontend(struct dvb_frontend *fe,
				 struct dtv_frontend_properties *p)
{
	struct tda10021_state* state = fe->demodulator_priv;
	int sync;
	s8 afc = 0;

	sync = tda10021_readreg(state, 0x11);
	afc = tda10021_readreg(state, 0x19);
	if (verbose) {
		/* AFC only valid when carrier has been recovered */
		printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
				  "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
			state->frontend.dvb->num, afc,
		       -((s32)p->symbol_rate * afc) >> 10);
	}

	p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
	p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;

	p->fec_inner = FEC_NONE;
	p->frequency = ((p->frequency + 31250) / 62500) * 62500;

	if (sync & 2)
		p->frequency -= ((s32)p->symbol_rate * afc) >> 10;

	return 0;
}

static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
	struct tda10021_state* state = fe->demodulator_priv;

	if (enable) {
		lock_tuner(state);
	} else {
		unlock_tuner(state);
	}
	return 0;
}

static int tda10021_sleep(struct dvb_frontend* fe)
{
	struct tda10021_state* state = fe->demodulator_priv;

	_tda10021_writereg (state, 0x1b, 0x02);  /* pdown ADC */
	_tda10021_writereg (state, 0x00, 0x80);  /* standby */

	return 0;
}

static void tda10021_release(struct dvb_frontend* fe)
{
	struct tda10021_state* state = fe->demodulator_priv;
	kfree(state);
}

static const struct dvb_frontend_ops tda10021_ops;

struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
				     struct i2c_adapter* i2c,
				     u8 pwm)
{
	struct tda10021_state* state = NULL;
	u8 id;

	/* allocate memory for the internal state */
	state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
	if (state == NULL) goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;
	state->pwm = pwm;
	state->reg0 = tda10021_inittab[0];

	/* check if the demod is there */
	id = tda10021_readreg(state, 0x1a);
	if ((id & 0xf0) != 0x70) goto error;

	/* Don't claim TDA10023 */
	if (id == 0x7d)
		goto error;

	printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
	       state->config->demod_address, id);

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static const struct dvb_frontend_ops tda10021_ops = {
	.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
	.info = {
		.name = "Philips TDA10021 DVB-C",
		.frequency_min_hz =  47 * MHz,
		.frequency_max_hz = 862 * MHz,
		.frequency_stepsize_hz = 62500,
		.symbol_rate_min = (XIN / 2) / 64,     /* SACLK/64 == (XIN/2)/64 */
		.symbol_rate_max = (XIN / 2) / 4,      /* SACLK/4 */
	#if 0
		.frequency_tolerance = ???,
		.symbol_rate_tolerance = ???,  /* ppm */  /* == 8% (spec p. 5) */
	#endif
		.caps = 0x400 | //FE_CAN_QAM_4
			FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
			FE_CAN_QAM_128 | FE_CAN_QAM_256 |
			FE_CAN_FEC_AUTO
	},

	.release = tda10021_release,

	.init = tda10021_init,
	.sleep = tda10021_sleep,
	.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,

	.set_frontend = tda10021_set_parameters,
	.get_frontend = tda10021_get_frontend,

	.read_status = tda10021_read_status,
	.read_ber = tda10021_read_ber,
	.read_signal_strength = tda10021_read_signal_strength,
	.read_snr = tda10021_read_snr,
	.read_ucblocks = tda10021_read_ucblocks,
};

module_param(verbose, int, 0644);
MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");

MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(tda10021_attach);
Commit	Line	Data
	1	// SPDX-License-Identifier: GPL-2.0-or-later
	2	/*
	3	TDA10021 - Single Chip Cable Channel Receiver driver module
	4	used on the Siemens DVB-C cards
	5
	6	Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
	7	Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
	8	Support for TDA10021
	9
	10	*/
	11
	12	#include <linux/delay.h>
	13	#include <linux/errno.h>
	14	#include <linux/init.h>
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/string.h>
	18	#include <linux/slab.h>
	19
	20	#include <media/dvb_frontend.h>
	21	#include "tda1002x.h"
	22
	23
	24	struct tda10021_state {
	25	struct i2c_adapter* i2c;
	26	/* configuration settings */
	27	const struct tda1002x_config* config;
	28	struct dvb_frontend frontend;
	29
	30	u8 pwm;
	31	u8 reg0;
	32	};
	33
	34
	35	#if 0
	36	#define dprintk(x...) printk(x)
	37	#else
	38	#define dprintk(x...)
	39	#endif
	40
	41	static int verbose;
	42
	43	#define XIN 57840000UL
	44
	45	#define FIN (XIN >> 4)
	46
	47	static int tda10021_inittab_size = 0x40;
	48	static u8 tda10021_inittab[0x40]=
	49	{
	50	0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
	51	0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
	52	0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
	53	0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
	54	0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
	55	0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
	56	0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
	57	0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
	58	};
	59
	60	static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
	61	{
	62	u8 buf[] = { reg, data };
	63	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	64	int ret;
	65
	66	ret = i2c_transfer (state->i2c, &msg, 1);
	67	if (ret != 1)
	68	printk("DVB: TDA10021(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
	69	state->frontend.dvb->num, __func__, reg, data, ret);
	70
	71	msleep(10);
	72	return (ret != 1) ? -EREMOTEIO : 0;
	73	}
	74
	75	static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
	76	{
	77	u8 b0 [] = { reg };
	78	u8 b1 [] = { 0 };
	79	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
	80	{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	81	int ret;
	82
	83	ret = i2c_transfer (state->i2c, msg, 2);
	84	// Don't print an error message if the id is read.
	85	if (ret != 2 && reg != 0x1a)
	86	printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
	87	__func__, ret);
	88	return b1[0];
	89	}
	90
	91	//get access to tuner
	92	static int lock_tuner(struct tda10021_state* state)
	93	{
	94	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] \| 0x80 };
	95	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	96
	97	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	98	{
	99	printk("tda10021: lock tuner fails\n");
	100	return -EREMOTEIO;
	101	}
	102	return 0;
	103	}
	104
	105	//release access from tuner
	106	static int unlock_tuner(struct tda10021_state* state)
	107	{
	108	u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
	109	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	110
	111	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	112	{
	113	printk("tda10021: unlock tuner fails\n");
	114	return -EREMOTEIO;
	115	}
	116	return 0;
	117	}
	118
	119	static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0,
	120	enum fe_spectral_inversion inversion)
	121	{
	122	reg0 \|= state->reg0 & 0x63;
	123
	124	if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
	125	reg0 &= ~0x20;
	126	else
	127	reg0 \|= 0x20;
	128
	129	_tda10021_writereg (state, 0x00, reg0 & 0xfe);
	130	_tda10021_writereg (state, 0x00, reg0 \| 0x01);
	131
	132	state->reg0 = reg0;
	133	return 0;
	134	}
	135
	136	static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
	137	{
	138	s32 BDR;
	139	s32 BDRI;
	140	s16 SFIL=0;
	141	u16 NDEC = 0;
	142	u32 tmp, ratio;
	143
	144	if (symbolrate > XIN/2)
	145	symbolrate = XIN/2;
	146	if (symbolrate < 500000)
	147	symbolrate = 500000;
	148
	149	if (symbolrate < XIN/16) NDEC = 1;
	150	if (symbolrate < XIN/32) NDEC = 2;
	151	if (symbolrate < XIN/64) NDEC = 3;
	152
	153	if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
	154	if (symbolrate < (u32)(XIN/16)) SFIL = 0;
	155	if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
	156	if (symbolrate < (u32)(XIN/32)) SFIL = 0;
	157	if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
	158	if (symbolrate < (u32)(XIN/64)) SFIL = 0;
	159	if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
	160
	161	symbolrate <<= NDEC;
	162	ratio = (symbolrate << 4) / FIN;
	163	tmp = ((symbolrate << 4) % FIN) << 8;
	164	ratio = (ratio << 8) + tmp / FIN;
	165	tmp = (tmp % FIN) << 8;
	166	ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);
	167
	168	BDR = ratio;
	169	BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
	170
	171	if (BDRI > 0xFF)
	172	BDRI = 0xFF;
	173
	174	SFIL = (SFIL << 4) \| tda10021_inittab[0x0E];
	175
	176	NDEC = (NDEC << 6) \| tda10021_inittab[0x03];
	177
	178	_tda10021_writereg (state, 0x03, NDEC);
	179	_tda10021_writereg (state, 0x0a, BDR&0xff);
	180	_tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
	181	_tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
	182
	183	_tda10021_writereg (state, 0x0d, BDRI);
	184	_tda10021_writereg (state, 0x0e, SFIL);
	185
	186	return 0;
	187	}
	188
	189	static int tda10021_init (struct dvb_frontend *fe)
	190	{
	191	struct tda10021_state* state = fe->demodulator_priv;
	192	int i;
	193
	194	dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
	195
	196	//_tda10021_writereg (fe, 0, 0);
	197
	198	for (i=0; i<tda10021_inittab_size; i++)
	199	_tda10021_writereg (state, i, tda10021_inittab[i]);
	200
	201	_tda10021_writereg (state, 0x34, state->pwm);
	202
	203	//Comment by markus
	204	//0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
	205	//0x2A[4] == BYPPLL -> Power down mode (default 1)
	206	//0x2A[5] == LCK -> PLL Lock Flag
	207	//0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
	208
	209	//Activate PLL
	210	_tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
	211	return 0;
	212	}
	213
	214	struct qam_params {
	215	u8 conf, agcref, lthr, mseth, aref;
	216	};
	217
	218	static int tda10021_set_parameters(struct dvb_frontend *fe)
	219	{
	220	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	221	u32 delsys = c->delivery_system;
	222	unsigned qam = c->modulation;
	223	bool is_annex_c;
	224	u32 reg0x3d;
	225	struct tda10021_state* state = fe->demodulator_priv;
	226	static const struct qam_params qam_params[] = {
	227	/* Modulation Conf AGCref LTHR MSETH AREF */
	228	[QPSK] = { 0x14, 0x78, 0x78, 0x8c, 0x96 },
	229	[QAM_16] = { 0x00, 0x8c, 0x87, 0xa2, 0x91 },
	230	[QAM_32] = { 0x04, 0x8c, 0x64, 0x74, 0x96 },
	231	[QAM_64] = { 0x08, 0x6a, 0x46, 0x43, 0x6a },
	232	[QAM_128] = { 0x0c, 0x78, 0x36, 0x34, 0x7e },
	233	[QAM_256] = { 0x10, 0x5c, 0x26, 0x23, 0x6b },
	234	};
	235
	236	switch (delsys) {
	237	case SYS_DVBC_ANNEX_A:
	238	is_annex_c = false;
	239	break;
	240	case SYS_DVBC_ANNEX_C:
	241	is_annex_c = true;
	242	break;
	243	default:
	244	return -EINVAL;
	245	}
	246
	247	/*
	248	* gcc optimizes the code below the same way as it would code:
	249	* "if (qam > 5) return -EINVAL;"
	250	* Yet, the code is clearer, as it shows what QAM standards are
	251	* supported by the driver, and avoids the usage of magic numbers on
	252	* it.
	253	*/
	254	switch (qam) {
	255	case QPSK:
	256	case QAM_16:
	257	case QAM_32:
	258	case QAM_64:
	259	case QAM_128:
	260	case QAM_256:
	261	break;
	262	default:
	263	return -EINVAL;
	264	}
	265
	266	if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF)
	267	return -EINVAL;
	268
	269	/printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);/
	270
	271	if (fe->ops.tuner_ops.set_params) {
	272	fe->ops.tuner_ops.set_params(fe);
	273	if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	274	}
	275
	276	tda10021_set_symbolrate(state, c->symbol_rate);
	277	_tda10021_writereg(state, 0x34, state->pwm);
	278
	279	_tda10021_writereg(state, 0x01, qam_params[qam].agcref);
	280	_tda10021_writereg(state, 0x05, qam_params[qam].lthr);
	281	_tda10021_writereg(state, 0x08, qam_params[qam].mseth);
	282	_tda10021_writereg(state, 0x09, qam_params[qam].aref);
	283
	284	/*
	285	* Bit 0 == 0 means roll-off = 0.15 (Annex A)
	286	* == 1 means roll-off = 0.13 (Annex C)
	287	*/
	288	reg0x3d = tda10021_readreg (state, 0x3d);
	289	if (is_annex_c)
	290	_tda10021_writereg (state, 0x3d, 0x01 \| reg0x3d);
	291	else
	292	_tda10021_writereg (state, 0x3d, 0xfe & reg0x3d);
	293	tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion);
	294
	295	return 0;
	296	}
	297
	298	static int tda10021_read_status(struct dvb_frontend *fe,
	299	enum fe_status *status)
	300	{
	301	struct tda10021_state* state = fe->demodulator_priv;
	302	int sync;
	303
	304	*status = 0;
	305	//0x11[0] == EQALGO -> Equalizer algorithms state
	306	//0x11[1] == CARLOCK -> Carrier locked
	307	//0x11[2] == FSYNC -> Frame synchronisation
	308	//0x11[3] == FEL -> Front End locked
	309	//0x11[6] == NODVB -> DVB Mode Information
	310	sync = tda10021_readreg (state, 0x11);
	311
	312	if (sync & 2)
	313	*status \|= FE_HAS_SIGNAL\|FE_HAS_CARRIER;
	314
	315	if (sync & 4)
	316	*status \|= FE_HAS_SYNC\|FE_HAS_VITERBI;
	317
	318	if (sync & 8)
	319	*status \|= FE_HAS_LOCK;
	320
	321	return 0;
	322	}
	323
	324	static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
	325	{
	326	struct tda10021_state* state = fe->demodulator_priv;
	327
	328	u32 _ber = tda10021_readreg(state, 0x14) \|
	329	(tda10021_readreg(state, 0x15) << 8) \|
	330	((tda10021_readreg(state, 0x16) & 0x0f) << 16);
	331	_tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
	332	\| (tda10021_inittab[0x10] & 0xc0));
	333	ber = 10 _ber;
	334
	335	return 0;
	336	}
	337
	338	static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
	339	{
	340	struct tda10021_state* state = fe->demodulator_priv;
	341
	342	u8 config = tda10021_readreg(state, 0x02);
	343	u8 gain = tda10021_readreg(state, 0x17);
	344	if (config & 0x02)
	345	/* the agc value is inverted */
	346	gain = ~gain;
	347	*strength = (gain << 8) \| gain;
	348
	349	return 0;
	350	}
	351
	352	static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
	353	{
	354	struct tda10021_state* state = fe->demodulator_priv;
	355
	356	u8 quality = ~tda10021_readreg(state, 0x18);
	357	*snr = (quality << 8) \| quality;
	358
	359	return 0;
	360	}
	361
	362	static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
	363	{
	364	struct tda10021_state* state = fe->demodulator_priv;
	365
	366	*ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
	367	if (*ucblocks == 0x7f)
	368	*ucblocks = 0xffffffff;
	369
	370	/* reset uncorrected block counter */
	371	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
	372	_tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
	373
	374	return 0;
	375	}
	376
	377	static int tda10021_get_frontend(struct dvb_frontend *fe,
	378	struct dtv_frontend_properties *p)
	379	{
	380	struct tda10021_state* state = fe->demodulator_priv;
	381	int sync;
	382	s8 afc = 0;
	383
	384	sync = tda10021_readreg(state, 0x11);
	385	afc = tda10021_readreg(state, 0x19);
	386	if (verbose) {
	387	/* AFC only valid when carrier has been recovered */
	388	printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
	389	"DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
	390	state->frontend.dvb->num, afc,
	391	-((s32)p->symbol_rate * afc) >> 10);
	392	}
	393
	394	p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
	395	p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
	396
	397	p->fec_inner = FEC_NONE;
	398	p->frequency = ((p->frequency + 31250) / 62500) * 62500;
	399
	400	if (sync & 2)
	401	p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
	402
	403	return 0;
	404	}
	405
	406	static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
	407	{
	408	struct tda10021_state* state = fe->demodulator_priv;
	409
	410	if (enable) {
	411	lock_tuner(state);
	412	} else {
	413	unlock_tuner(state);
	414	}
	415	return 0;
	416	}
	417
	418	static int tda10021_sleep(struct dvb_frontend* fe)
	419	{
	420	struct tda10021_state* state = fe->demodulator_priv;
	421
	422	_tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
	423	_tda10021_writereg (state, 0x00, 0x80); /* standby */
	424
	425	return 0;
	426	}
	427
	428	static void tda10021_release(struct dvb_frontend* fe)
	429	{
	430	struct tda10021_state* state = fe->demodulator_priv;
	431	kfree(state);
	432	}
	433
	434	static const struct dvb_frontend_ops tda10021_ops;
	435
	436	struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
	437	struct i2c_adapter* i2c,
	438	u8 pwm)
	439	{
	440	struct tda10021_state* state = NULL;
	441	u8 id;
	442
	443	/* allocate memory for the internal state */
	444	state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
	445	if (state == NULL) goto error;
	446
	447	/* setup the state */
	448	state->config = config;
	449	state->i2c = i2c;
	450	state->pwm = pwm;
	451	state->reg0 = tda10021_inittab[0];
	452
	453	/* check if the demod is there */
	454	id = tda10021_readreg(state, 0x1a);
	455	if ((id & 0xf0) != 0x70) goto error;
	456
	457	/* Don't claim TDA10023 */
	458	if (id == 0x7d)
	459	goto error;
	460
	461	printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
	462	state->config->demod_address, id);
	463
	464	/* create dvb_frontend */
	465	memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
	466	state->frontend.demodulator_priv = state;
	467	return &state->frontend;
	468
	469	error:
	470	kfree(state);
	471	return NULL;
	472	}
	473
	474	static const struct dvb_frontend_ops tda10021_ops = {
	475	.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
	476	.info = {
	477	.name = "Philips TDA10021 DVB-C",
	478	.frequency_min_hz = 47 * MHz,
	479	.frequency_max_hz = 862 * MHz,
	480	.frequency_stepsize_hz = 62500,
	481	.symbol_rate_min = (XIN / 2) / 64, /* SACLK/64 == (XIN/2)/64 */
	482	.symbol_rate_max = (XIN / 2) / 4, /* SACLK/4 */
	483	#if 0
	484	.frequency_tolerance = ???,
	485	.symbol_rate_tolerance = ???, /* ppm / / == 8% (spec p. 5) */
	486	#endif
	487	.caps = 0x400 \| //FE_CAN_QAM_4
	488	FE_CAN_QAM_16 \| FE_CAN_QAM_32 \| FE_CAN_QAM_64 \|
	489	FE_CAN_QAM_128 \| FE_CAN_QAM_256 \|
	490	FE_CAN_FEC_AUTO
	491	},
	492
	493	.release = tda10021_release,
	494
	495	.init = tda10021_init,
	496	.sleep = tda10021_sleep,
	497	.i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
	498
	499	.set_frontend = tda10021_set_parameters,
	500	.get_frontend = tda10021_get_frontend,
	501
	502	.read_status = tda10021_read_status,
	503	.read_ber = tda10021_read_ber,
	504	.read_signal_strength = tda10021_read_signal_strength,
	505	.read_snr = tda10021_read_snr,
	506	.read_ucblocks = tda10021_read_ucblocks,
	507	};
	508
	509	module_param(verbose, int, 0644);
	510	MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
	511
	512	MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
	513	MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
	514	MODULE_LICENSE("GPL");
	515
	516	EXPORT_SYMBOL(tda10021_attach);