projects / linux-2.6-block.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Merge branch 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / hwmon / w83627hf.c
... / ...
CommitLineData
1/*
2 w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
8 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23*/
24
25/*
26 Supports following chips:
27
28 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
29 w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
30 w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
31 w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
32 w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
33 w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
34
35 For other winbond chips, and for i2c support in the above chips,
36 use w83781d.c.
37
38 Note: automatic ("cruise") fan control for 697, 637 & 627thf not
39 supported yet.
40*/
41
42#include <linux/module.h>
43#include <linux/init.h>
44#include <linux/slab.h>
45#include <linux/jiffies.h>
46#include <linux/platform_device.h>
47#include <linux/hwmon.h>
48#include <linux/hwmon-sysfs.h>
49#include <linux/hwmon-vid.h>
50#include <linux/err.h>
51#include <linux/mutex.h>
52#include <linux/ioport.h>
53#include <linux/acpi.h>
54#include <linux/io.h>
55#include "lm75.h"
56
57static struct platform_device *pdev;
58
59#define DRVNAME "w83627hf"
60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61
62struct w83627hf_sio_data {
63 enum chips type;
64 int sioaddr;
65};
66
67static u8 force_i2c = 0x1f;
68module_param(force_i2c, byte, 0);
69MODULE_PARM_DESC(force_i2c,
70 "Initialize the i2c address of the sensors");
71
72static int init = 1;
73module_param(init, bool, 0);
74MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
75
76static unsigned short force_id;
77module_param(force_id, ushort, 0);
78MODULE_PARM_DESC(force_id, "Override the detected device ID");
79
80/* modified from kernel/include/traps.c */
81#define DEV 0x07 /* Register: Logical device select */
82
83/* logical device numbers for superio_select (below) */
84#define W83627HF_LD_FDC 0x00
85#define W83627HF_LD_PRT 0x01
86#define W83627HF_LD_UART1 0x02
87#define W83627HF_LD_UART2 0x03
88#define W83627HF_LD_KBC 0x05
89#define W83627HF_LD_CIR 0x06 /* w83627hf only */
90#define W83627HF_LD_GAME 0x07
91#define W83627HF_LD_MIDI 0x07
92#define W83627HF_LD_GPIO1 0x07
93#define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
94#define W83627HF_LD_GPIO2 0x08
95#define W83627HF_LD_GPIO3 0x09
96#define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
97#define W83627HF_LD_ACPI 0x0a
98#define W83627HF_LD_HWM 0x0b
99
100#define DEVID 0x20 /* Register: Device ID */
101
102#define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
103#define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
104#define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
105
106#define W83687THF_VID_EN 0x29 /* w83687thf only */
107#define W83687THF_VID_CFG 0xF0 /* w83687thf only */
108#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
109
110static inline void
111superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
112{
113 outb(reg, sio->sioaddr);
114 outb(val, sio->sioaddr + 1);
115}
116
117static inline int
118superio_inb(struct w83627hf_sio_data *sio, int reg)
119{
120 outb(reg, sio->sioaddr);
121 return inb(sio->sioaddr + 1);
122}
123
124static inline void
125superio_select(struct w83627hf_sio_data *sio, int ld)
126{
127 outb(DEV, sio->sioaddr);
128 outb(ld, sio->sioaddr + 1);
129}
130
131static inline void
132superio_enter(struct w83627hf_sio_data *sio)
133{
134 outb(0x87, sio->sioaddr);
135 outb(0x87, sio->sioaddr);
136}
137
138static inline void
139superio_exit(struct w83627hf_sio_data *sio)
140{
141 outb(0xAA, sio->sioaddr);
142}
143
144#define W627_DEVID 0x52
145#define W627THF_DEVID 0x82
146#define W697_DEVID 0x60
147#define W637_DEVID 0x70
148#define W687THF_DEVID 0x85
149#define WINB_ACT_REG 0x30
150#define WINB_BASE_REG 0x60
151/* Constants specified below */
152
153/* Alignment of the base address */
154#define WINB_ALIGNMENT ~7
155
156/* Offset & size of I/O region we are interested in */
157#define WINB_REGION_OFFSET 5
158#define WINB_REGION_SIZE 2
159
160/* Where are the sensors address/data registers relative to the region offset */
161#define W83781D_ADDR_REG_OFFSET 0
162#define W83781D_DATA_REG_OFFSET 1
163
164/* The W83781D registers */
165/* The W83782D registers for nr=7,8 are in bank 5 */
166#define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
167 (0x554 + (((nr) - 7) * 2)))
168#define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
169 (0x555 + (((nr) - 7) * 2)))
170#define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
171 (0x550 + (nr) - 7))
172
173/* nr:0-2 for fans:1-3 */
174#define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
175#define W83627HF_REG_FAN(nr) (0x28 + (nr))
176
177#define W83627HF_REG_TEMP2_CONFIG 0x152
178#define W83627HF_REG_TEMP3_CONFIG 0x252
179/* these are zero-based, unlike config constants above */
180static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
181static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
182static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
183
184#define W83781D_REG_BANK 0x4E
185
186#define W83781D_REG_CONFIG 0x40
187#define W83781D_REG_ALARM1 0x459
188#define W83781D_REG_ALARM2 0x45A
189#define W83781D_REG_ALARM3 0x45B
190
191#define W83781D_REG_BEEP_CONFIG 0x4D
192#define W83781D_REG_BEEP_INTS1 0x56
193#define W83781D_REG_BEEP_INTS2 0x57
194#define W83781D_REG_BEEP_INTS3 0x453
195
196#define W83781D_REG_VID_FANDIV 0x47
197
198#define W83781D_REG_CHIPID 0x49
199#define W83781D_REG_WCHIPID 0x58
200#define W83781D_REG_CHIPMAN 0x4F
201#define W83781D_REG_PIN 0x4B
202
203#define W83781D_REG_VBAT 0x5D
204
205#define W83627HF_REG_PWM1 0x5A
206#define W83627HF_REG_PWM2 0x5B
207
208static const u8 W83627THF_REG_PWM_ENABLE[] = {
209 0x04, /* FAN 1 mode */
210 0x04, /* FAN 2 mode */
211 0x12, /* FAN AUX mode */
212};
213static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
214
215#define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
216#define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
217#define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
218
219#define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
220
221static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
222static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
223 W83627THF_REG_PWM3 };
224#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
225 regpwm_627hf[nr] : regpwm[nr])
226
227#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
228
229#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
230#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
231#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
232
233static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
234 W83637HF_REG_PWM_FREQ2,
235 W83637HF_REG_PWM_FREQ3 };
236
237#define W83627HF_BASE_PWM_FREQ 46870
238
239#define W83781D_REG_I2C_ADDR 0x48
240#define W83781D_REG_I2C_SUBADDR 0x4A
241
242/* Sensor selection */
243#define W83781D_REG_SCFG1 0x5D
244static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
245#define W83781D_REG_SCFG2 0x59
246static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
247#define W83781D_DEFAULT_BETA 3435
248
249/* Conversions. Limit checking is only done on the TO_REG
250 variants. Note that you should be a bit careful with which arguments
251 these macros are called: arguments may be evaluated more than once.
252 Fixing this is just not worth it. */
253#define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
254#define IN_FROM_REG(val) ((val) * 16)
255
256static inline u8 FAN_TO_REG(long rpm, int div)
257{
258 if (rpm == 0)
259 return 255;
260 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
261 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
262 254);
263}
264
265#define TEMP_MIN (-128000)
266#define TEMP_MAX ( 127000)
267
268/* TEMP: 0.001C/bit (-128C to +127C)
269 REG: 1C/bit, two's complement */
270static u8 TEMP_TO_REG(long temp)
271{
272 int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
273 ntemp += (ntemp<0 ? -500 : 500);
274 return (u8)(ntemp / 1000);
275}
276
277static int TEMP_FROM_REG(u8 reg)
278{
279 return (s8)reg * 1000;
280}
281
282#define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
283
284#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
285
286static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
287{
288 unsigned long freq;
289 freq = W83627HF_BASE_PWM_FREQ >> reg;
290 return freq;
291}
292static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
293{
294 u8 i;
295 /* Only 5 dividers (1 2 4 8 16)
296 Search for the nearest available frequency */
297 for (i = 0; i < 4; i++) {
298 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
299 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
300 break;
301 }
302 return i;
303}
304
305static inline unsigned long pwm_freq_from_reg(u8 reg)
306{
307 /* Clock bit 8 -> 180 kHz or 24 MHz */
308 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
309
310 reg &= 0x7f;
311 /* This should not happen but anyway... */
312 if (reg == 0)
313 reg++;
314 return (clock / (reg << 8));
315}
316static inline u8 pwm_freq_to_reg(unsigned long val)
317{
318 /* Minimum divider value is 0x01 and maximum is 0x7F */
319 if (val >= 93750) /* The highest we can do */
320 return 0x01;
321 if (val >= 720) /* Use 24 MHz clock */
322 return (24000000UL / (val << 8));
323 if (val < 6) /* The lowest we can do */
324 return 0xFF;
325 else /* Use 180 kHz clock */
326 return (0x80 | (180000UL / (val << 8)));
327}
328
329#define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
330#define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
331
332#define DIV_FROM_REG(val) (1 << (val))
333
334static inline u8 DIV_TO_REG(long val)
335{
336 int i;
337 val = SENSORS_LIMIT(val, 1, 128) >> 1;
338 for (i = 0; i < 7; i++) {
339 if (val == 0)
340 break;
341 val >>= 1;
342 }
343 return ((u8) i);
344}
345
346/* For each registered chip, we need to keep some data in memory.
347 The structure is dynamically allocated. */
348struct w83627hf_data {
349 unsigned short addr;
350 const char *name;
351 struct device *hwmon_dev;
352 struct mutex lock;
353 enum chips type;
354
355 struct mutex update_lock;
356 char valid; /* !=0 if following fields are valid */
357 unsigned long last_updated; /* In jiffies */
358
359 u8 in[9]; /* Register value */
360 u8 in_max[9]; /* Register value */
361 u8 in_min[9]; /* Register value */
362 u8 fan[3]; /* Register value */
363 u8 fan_min[3]; /* Register value */
364 u16 temp[3]; /* Register value */
365 u16 temp_max[3]; /* Register value */
366 u16 temp_max_hyst[3]; /* Register value */
367 u8 fan_div[3]; /* Register encoding, shifted right */
368 u8 vid; /* Register encoding, combined */
369 u32 alarms; /* Register encoding, combined */
370 u32 beep_mask; /* Register encoding, combined */
371 u8 pwm[3]; /* Register value */
372 u8 pwm_enable[3]; /* 1 = manual
373 2 = thermal cruise (also called SmartFan I)
374 3 = fan speed cruise */
375 u8 pwm_freq[3]; /* Register value */
376 u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
377 4 = thermistor */
378 u8 vrm;
379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
380};
381
382
383static int w83627hf_probe(struct platform_device *pdev);
384static int __devexit w83627hf_remove(struct platform_device *pdev);
385
386static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
387static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
388static void w83627hf_update_fan_div(struct w83627hf_data *data);
389static struct w83627hf_data *w83627hf_update_device(struct device *dev);
390static void w83627hf_init_device(struct platform_device *pdev);
391
392static struct platform_driver w83627hf_driver = {
393 .driver = {
394 .owner = THIS_MODULE,
395 .name = DRVNAME,
396 },
397 .probe = w83627hf_probe,
398 .remove = __devexit_p(w83627hf_remove),
399};
400
401static ssize_t
402show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
403{
404 int nr = to_sensor_dev_attr(devattr)->index;
405 struct w83627hf_data *data = w83627hf_update_device(dev);
406 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
407}
408static ssize_t
409show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
410{
411 int nr = to_sensor_dev_attr(devattr)->index;
412 struct w83627hf_data *data = w83627hf_update_device(dev);
413 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
414}
415static ssize_t
416show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
417{
418 int nr = to_sensor_dev_attr(devattr)->index;
419 struct w83627hf_data *data = w83627hf_update_device(dev);
420 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
421}
422static ssize_t
423store_in_min(struct device *dev, struct device_attribute *devattr,
424 const char *buf, size_t count)
425{
426 int nr = to_sensor_dev_attr(devattr)->index;
427 struct w83627hf_data *data = dev_get_drvdata(dev);
428 long val = simple_strtol(buf, NULL, 10);
429
430 mutex_lock(&data->update_lock);
431 data->in_min[nr] = IN_TO_REG(val);
432 w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
433 mutex_unlock(&data->update_lock);
434 return count;
435}
436static ssize_t
437store_in_max(struct device *dev, struct device_attribute *devattr,
438 const char *buf, size_t count)
439{
440 int nr = to_sensor_dev_attr(devattr)->index;
441 struct w83627hf_data *data = dev_get_drvdata(dev);
442 long val = simple_strtol(buf, NULL, 10);
443
444 mutex_lock(&data->update_lock);
445 data->in_max[nr] = IN_TO_REG(val);
446 w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
447 mutex_unlock(&data->update_lock);
448 return count;
449}
450#define sysfs_vin_decl(offset) \
451static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
452 show_in_input, NULL, offset); \
453static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
454 show_in_min, store_in_min, offset); \
455static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
456 show_in_max, store_in_max, offset);
457
458sysfs_vin_decl(1);
459sysfs_vin_decl(2);
460sysfs_vin_decl(3);
461sysfs_vin_decl(4);
462sysfs_vin_decl(5);
463sysfs_vin_decl(6);
464sysfs_vin_decl(7);
465sysfs_vin_decl(8);
466
467/* use a different set of functions for in0 */
468static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
469{
470 long in0;
471
472 if ((data->vrm_ovt & 0x01) &&
473 (w83627thf == data->type || w83637hf == data->type
474 || w83687thf == data->type))
475
476 /* use VRM9 calculation */
477 in0 = (long)((reg * 488 + 70000 + 50) / 100);
478 else
479 /* use VRM8 (standard) calculation */
480 in0 = (long)IN_FROM_REG(reg);
481
482 return sprintf(buf,"%ld\n", in0);
483}
484
485static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
486{
487 struct w83627hf_data *data = w83627hf_update_device(dev);
488 return show_in_0(data, buf, data->in[0]);
489}
490
491static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
492{
493 struct w83627hf_data *data = w83627hf_update_device(dev);
494 return show_in_0(data, buf, data->in_min[0]);
495}
496
497static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
498{
499 struct w83627hf_data *data = w83627hf_update_device(dev);
500 return show_in_0(data, buf, data->in_max[0]);
501}
502
503static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
504 const char *buf, size_t count)
505{
506 struct w83627hf_data *data = dev_get_drvdata(dev);
507 u32 val;
508
509 val = simple_strtoul(buf, NULL, 10);
510
511 mutex_lock(&data->update_lock);
512
513 if ((data->vrm_ovt & 0x01) &&
514 (w83627thf == data->type || w83637hf == data->type
515 || w83687thf == data->type))
516
517 /* use VRM9 calculation */
518 data->in_min[0] =
519 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
520 255);
521 else
522 /* use VRM8 (standard) calculation */
523 data->in_min[0] = IN_TO_REG(val);
524
525 w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
526 mutex_unlock(&data->update_lock);
527 return count;
528}
529
530static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
531 const char *buf, size_t count)
532{
533 struct w83627hf_data *data = dev_get_drvdata(dev);
534 u32 val;
535
536 val = simple_strtoul(buf, NULL, 10);
537
538 mutex_lock(&data->update_lock);
539
540 if ((data->vrm_ovt & 0x01) &&
541 (w83627thf == data->type || w83637hf == data->type
542 || w83687thf == data->type))
543
544 /* use VRM9 calculation */
545 data->in_max[0] =
546 SENSORS_LIMIT(((val * 100) - 70000 + 244) / 488, 0,
547 255);
548 else
549 /* use VRM8 (standard) calculation */
550 data->in_max[0] = IN_TO_REG(val);
551
552 w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
553 mutex_unlock(&data->update_lock);
554 return count;
555}
556
557static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
558static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
559 show_regs_in_min0, store_regs_in_min0);
560static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
561 show_regs_in_max0, store_regs_in_max0);
562
563static ssize_t
564show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
565{
566 int nr = to_sensor_dev_attr(devattr)->index;
567 struct w83627hf_data *data = w83627hf_update_device(dev);
568 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
569 (long)DIV_FROM_REG(data->fan_div[nr])));
570}
571static ssize_t
572show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
573{
574 int nr = to_sensor_dev_attr(devattr)->index;
575 struct w83627hf_data *data = w83627hf_update_device(dev);
576 return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
577 (long)DIV_FROM_REG(data->fan_div[nr])));
578}
579static ssize_t
580store_fan_min(struct device *dev, struct device_attribute *devattr,
581 const char *buf, size_t count)
582{
583 int nr = to_sensor_dev_attr(devattr)->index;
584 struct w83627hf_data *data = dev_get_drvdata(dev);
585 u32 val = simple_strtoul(buf, NULL, 10);
586
587 mutex_lock(&data->update_lock);
588 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
589 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
590 data->fan_min[nr]);
591
592 mutex_unlock(&data->update_lock);
593 return count;
594}
595#define sysfs_fan_decl(offset) \
596static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
597 show_fan_input, NULL, offset - 1); \
598static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
599 show_fan_min, store_fan_min, offset - 1);
600
601sysfs_fan_decl(1);
602sysfs_fan_decl(2);
603sysfs_fan_decl(3);
604
605static ssize_t
606show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
607{
608 int nr = to_sensor_dev_attr(devattr)->index;
609 struct w83627hf_data *data = w83627hf_update_device(dev);
610
611 u16 tmp = data->temp[nr];
612 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
613 : (long) TEMP_FROM_REG(tmp));
614}
615
616static ssize_t
617show_temp_max(struct device *dev, struct device_attribute *devattr,
618 char *buf)
619{
620 int nr = to_sensor_dev_attr(devattr)->index;
621 struct w83627hf_data *data = w83627hf_update_device(dev);
622
623 u16 tmp = data->temp_max[nr];
624 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
625 : (long) TEMP_FROM_REG(tmp));
626}
627
628static ssize_t
629show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
630 char *buf)
631{
632 int nr = to_sensor_dev_attr(devattr)->index;
633 struct w83627hf_data *data = w83627hf_update_device(dev);
634
635 u16 tmp = data->temp_max_hyst[nr];
636 return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
637 : (long) TEMP_FROM_REG(tmp));
638}
639
640static ssize_t
641store_temp_max(struct device *dev, struct device_attribute *devattr,
642 const char *buf, size_t count)
643{
644 int nr = to_sensor_dev_attr(devattr)->index;
645 struct w83627hf_data *data = dev_get_drvdata(dev);
646 long val = simple_strtol(buf, NULL, 10);
647 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
648
649 mutex_lock(&data->update_lock);
650 data->temp_max[nr] = tmp;
651 w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
652 mutex_unlock(&data->update_lock);
653 return count;
654}
655
656static ssize_t
657store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
658 const char *buf, size_t count)
659{
660 int nr = to_sensor_dev_attr(devattr)->index;
661 struct w83627hf_data *data = dev_get_drvdata(dev);
662 long val = simple_strtol(buf, NULL, 10);
663 u16 tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
664
665 mutex_lock(&data->update_lock);
666 data->temp_max_hyst[nr] = tmp;
667 w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
668 mutex_unlock(&data->update_lock);
669 return count;
670}
671
672#define sysfs_temp_decl(offset) \
673static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
674 show_temp, NULL, offset - 1); \
675static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
676 show_temp_max, store_temp_max, offset - 1); \
677static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
678 show_temp_max_hyst, store_temp_max_hyst, offset - 1);
679
680sysfs_temp_decl(1);
681sysfs_temp_decl(2);
682sysfs_temp_decl(3);
683
684static ssize_t
685show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
686{
687 struct w83627hf_data *data = w83627hf_update_device(dev);
688 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
689}
690static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
691
692static ssize_t
693show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
694{
695 struct w83627hf_data *data = dev_get_drvdata(dev);
696 return sprintf(buf, "%ld\n", (long) data->vrm);
697}
698static ssize_t
699store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
700{
701 struct w83627hf_data *data = dev_get_drvdata(dev);
702 u32 val;
703
704 val = simple_strtoul(buf, NULL, 10);
705 data->vrm = val;
706
707 return count;
708}
709static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
710
711static ssize_t
712show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
713{
714 struct w83627hf_data *data = w83627hf_update_device(dev);
715 return sprintf(buf, "%ld\n", (long) data->alarms);
716}
717static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
718
719static ssize_t
720show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
721{
722 struct w83627hf_data *data = w83627hf_update_device(dev);
723 int bitnr = to_sensor_dev_attr(attr)->index;
724 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
725}
726static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
727static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
728static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
729static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
730static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
731static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
732static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
733static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
734static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
735static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
736static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
737static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
738static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
739static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
740static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
741
742static ssize_t
743show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
744{
745 struct w83627hf_data *data = w83627hf_update_device(dev);
746 return sprintf(buf, "%ld\n",
747 (long)BEEP_MASK_FROM_REG(data->beep_mask));
748}
749
750static ssize_t
751store_beep_mask(struct device *dev, struct device_attribute *attr,
752 const char *buf, size_t count)
753{
754 struct w83627hf_data *data = dev_get_drvdata(dev);
755 unsigned long val;
756
757 val = simple_strtoul(buf, NULL, 10);
758
759 mutex_lock(&data->update_lock);
760
761 /* preserve beep enable */
762 data->beep_mask = (data->beep_mask & 0x8000)
763 | BEEP_MASK_TO_REG(val);
764 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
765 data->beep_mask & 0xff);
766 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
767 ((data->beep_mask) >> 16) & 0xff);
768 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
769 (data->beep_mask >> 8) & 0xff);
770
771 mutex_unlock(&data->update_lock);
772 return count;
773}
774
775static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
776 show_beep_mask, store_beep_mask);
777
778static ssize_t
779show_beep(struct device *dev, struct device_attribute *attr, char *buf)
780{
781 struct w83627hf_data *data = w83627hf_update_device(dev);
782 int bitnr = to_sensor_dev_attr(attr)->index;
783 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
784}
785
786static ssize_t
787store_beep(struct device *dev, struct device_attribute *attr,
788 const char *buf, size_t count)
789{
790 struct w83627hf_data *data = dev_get_drvdata(dev);
791 int bitnr = to_sensor_dev_attr(attr)->index;
792 unsigned long bit;
793 u8 reg;
794
795 bit = simple_strtoul(buf, NULL, 10);
796 if (bit & ~1)
797 return -EINVAL;
798
799 mutex_lock(&data->update_lock);
800 if (bit)
801 data->beep_mask |= (1 << bitnr);
802 else
803 data->beep_mask &= ~(1 << bitnr);
804
805 if (bitnr < 8) {
806 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
807 if (bit)
808 reg |= (1 << bitnr);
809 else
810 reg &= ~(1 << bitnr);
811 w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
812 } else if (bitnr < 16) {
813 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
814 if (bit)
815 reg |= (1 << (bitnr - 8));
816 else
817 reg &= ~(1 << (bitnr - 8));
818 w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
819 } else {
820 reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
821 if (bit)
822 reg |= (1 << (bitnr - 16));
823 else
824 reg &= ~(1 << (bitnr - 16));
825 w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
826 }
827 mutex_unlock(&data->update_lock);
828
829 return count;
830}
831
832static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
833 show_beep, store_beep, 0);
834static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
835 show_beep, store_beep, 1);
836static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
837 show_beep, store_beep, 2);
838static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
839 show_beep, store_beep, 3);
840static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
841 show_beep, store_beep, 8);
842static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
843 show_beep, store_beep, 9);
844static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
845 show_beep, store_beep, 10);
846static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
847 show_beep, store_beep, 16);
848static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
849 show_beep, store_beep, 17);
850static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
851 show_beep, store_beep, 6);
852static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
853 show_beep, store_beep, 7);
854static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
855 show_beep, store_beep, 11);
856static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
857 show_beep, store_beep, 4);
858static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
859 show_beep, store_beep, 5);
860static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
861 show_beep, store_beep, 13);
862static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
863 show_beep, store_beep, 15);
864
865static ssize_t
866show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
867{
868 int nr = to_sensor_dev_attr(devattr)->index;
869 struct w83627hf_data *data = w83627hf_update_device(dev);
870 return sprintf(buf, "%ld\n",
871 (long) DIV_FROM_REG(data->fan_div[nr]));
872}
873/* Note: we save and restore the fan minimum here, because its value is
874 determined in part by the fan divisor. This follows the principle of
875 least surprise; the user doesn't expect the fan minimum to change just
876 because the divisor changed. */
877static ssize_t
878store_fan_div(struct device *dev, struct device_attribute *devattr,
879 const char *buf, size_t count)
880{
881 int nr = to_sensor_dev_attr(devattr)->index;
882 struct w83627hf_data *data = dev_get_drvdata(dev);
883 unsigned long min;
884 u8 reg;
885 unsigned long val = simple_strtoul(buf, NULL, 10);
886
887 mutex_lock(&data->update_lock);
888
889 /* Save fan_min */
890 min = FAN_FROM_REG(data->fan_min[nr],
891 DIV_FROM_REG(data->fan_div[nr]));
892
893 data->fan_div[nr] = DIV_TO_REG(val);
894
895 reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
896 & (nr==0 ? 0xcf : 0x3f))
897 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
898 w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
899
900 reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
901 & ~(1 << (5 + nr)))
902 | ((data->fan_div[nr] & 0x04) << (3 + nr));
903 w83627hf_write_value(data, W83781D_REG_VBAT, reg);
904
905 /* Restore fan_min */
906 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
907 w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
908
909 mutex_unlock(&data->update_lock);
910 return count;
911}
912
913static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
914 show_fan_div, store_fan_div, 0);
915static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
916 show_fan_div, store_fan_div, 1);
917static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
918 show_fan_div, store_fan_div, 2);
919
920static ssize_t
921show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
922{
923 int nr = to_sensor_dev_attr(devattr)->index;
924 struct w83627hf_data *data = w83627hf_update_device(dev);
925 return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
926}
927
928static ssize_t
929store_pwm(struct device *dev, struct device_attribute *devattr,
930 const char *buf, size_t count)
931{
932 int nr = to_sensor_dev_attr(devattr)->index;
933 struct w83627hf_data *data = dev_get_drvdata(dev);
934 u32 val = simple_strtoul(buf, NULL, 10);
935
936 mutex_lock(&data->update_lock);
937
938 if (data->type == w83627thf) {
939 /* bits 0-3 are reserved in 627THF */
940 data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
941 w83627hf_write_value(data,
942 W836X7HF_REG_PWM(data->type, nr),
943 data->pwm[nr] |
944 (w83627hf_read_value(data,
945 W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
946 } else {
947 data->pwm[nr] = PWM_TO_REG(val);
948 w83627hf_write_value(data,
949 W836X7HF_REG_PWM(data->type, nr),
950 data->pwm[nr]);
951 }
952
953 mutex_unlock(&data->update_lock);
954 return count;
955}
956
957static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
958static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
959static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
960
961static ssize_t
962show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
963{
964 int nr = to_sensor_dev_attr(devattr)->index;
965 struct w83627hf_data *data = w83627hf_update_device(dev);
966 return sprintf(buf, "%d\n", data->pwm_enable[nr]);
967}
968
969static ssize_t
970store_pwm_enable(struct device *dev, struct device_attribute *devattr,
971 const char *buf, size_t count)
972{
973 int nr = to_sensor_dev_attr(devattr)->index;
974 struct w83627hf_data *data = dev_get_drvdata(dev);
975 unsigned long val = simple_strtoul(buf, NULL, 10);
976 u8 reg;
977
978 if (!val || (val > 3)) /* modes 1, 2 and 3 are supported */
979 return -EINVAL;
980 mutex_lock(&data->update_lock);
981 data->pwm_enable[nr] = val;
982 reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
983 reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
984 reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
985 w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
986 mutex_unlock(&data->update_lock);
987 return count;
988}
989
990static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
991 store_pwm_enable, 0);
992static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
993 store_pwm_enable, 1);
994static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
995 store_pwm_enable, 2);
996
997static ssize_t
998show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
999{
1000 int nr = to_sensor_dev_attr(devattr)->index;
1001 struct w83627hf_data *data = w83627hf_update_device(dev);
1002 if (data->type == w83627hf)
1003 return sprintf(buf, "%ld\n",
1004 pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
1005 else
1006 return sprintf(buf, "%ld\n",
1007 pwm_freq_from_reg(data->pwm_freq[nr]));
1008}
1009
1010static ssize_t
1011store_pwm_freq(struct device *dev, struct device_attribute *devattr,
1012 const char *buf, size_t count)
1013{
1014 int nr = to_sensor_dev_attr(devattr)->index;
1015 struct w83627hf_data *data = dev_get_drvdata(dev);
1016 static const u8 mask[]={0xF8, 0x8F};
1017 u32 val;
1018
1019 val = simple_strtoul(buf, NULL, 10);
1020
1021 mutex_lock(&data->update_lock);
1022
1023 if (data->type == w83627hf) {
1024 data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
1025 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
1026 (data->pwm_freq[nr] << (nr*4)) |
1027 (w83627hf_read_value(data,
1028 W83627HF_REG_PWM_FREQ) & mask[nr]));
1029 } else {
1030 data->pwm_freq[nr] = pwm_freq_to_reg(val);
1031 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
1032 data->pwm_freq[nr]);
1033 }
1034
1035 mutex_unlock(&data->update_lock);
1036 return count;
1037}
1038
1039static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
1040 show_pwm_freq, store_pwm_freq, 0);
1041static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
1042 show_pwm_freq, store_pwm_freq, 1);
1043static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
1044 show_pwm_freq, store_pwm_freq, 2);
1045
1046static ssize_t
1047show_temp_type(struct device *dev, struct device_attribute *devattr,
1048 char *buf)
1049{
1050 int nr = to_sensor_dev_attr(devattr)->index;
1051 struct w83627hf_data *data = w83627hf_update_device(dev);
1052 return sprintf(buf, "%ld\n", (long) data->sens[nr]);
1053}
1054
1055static ssize_t
1056store_temp_type(struct device *dev, struct device_attribute *devattr,
1057 const char *buf, size_t count)
1058{
1059 int nr = to_sensor_dev_attr(devattr)->index;
1060 struct w83627hf_data *data = dev_get_drvdata(dev);
1061 u32 val, tmp;
1062
1063 val = simple_strtoul(buf, NULL, 10);
1064
1065 mutex_lock(&data->update_lock);
1066
1067 switch (val) {
1068 case 1: /* PII/Celeron diode */
1069 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1070 w83627hf_write_value(data, W83781D_REG_SCFG1,
1071 tmp | BIT_SCFG1[nr]);
1072 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1073 w83627hf_write_value(data, W83781D_REG_SCFG2,
1074 tmp | BIT_SCFG2[nr]);
1075 data->sens[nr] = val;
1076 break;
1077 case 2: /* 3904 */
1078 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1079 w83627hf_write_value(data, W83781D_REG_SCFG1,
1080 tmp | BIT_SCFG1[nr]);
1081 tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
1082 w83627hf_write_value(data, W83781D_REG_SCFG2,
1083 tmp & ~BIT_SCFG2[nr]);
1084 data->sens[nr] = val;
1085 break;
1086 case W83781D_DEFAULT_BETA:
1087 dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1088 "instead\n", W83781D_DEFAULT_BETA);
1089 /* fall through */
1090 case 4: /* thermistor */
1091 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1092 w83627hf_write_value(data, W83781D_REG_SCFG1,
1093 tmp & ~BIT_SCFG1[nr]);
1094 data->sens[nr] = val;
1095 break;
1096 default:
1097 dev_err(dev,
1098 "Invalid sensor type %ld; must be 1, 2, or 4\n",
1099 (long) val);
1100 break;
1101 }
1102
1103 mutex_unlock(&data->update_lock);
1104 return count;
1105}
1106
1107#define sysfs_temp_type(offset) \
1108static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
1109 show_temp_type, store_temp_type, offset - 1);
1110
1111sysfs_temp_type(1);
1112sysfs_temp_type(2);
1113sysfs_temp_type(3);
1114
1115static ssize_t
1116show_name(struct device *dev, struct device_attribute *devattr, char *buf)
1117{
1118 struct w83627hf_data *data = dev_get_drvdata(dev);
1119
1120 return sprintf(buf, "%s\n", data->name);
1121}
1122static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1123
1124static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1125 struct w83627hf_sio_data *sio_data)
1126{
1127 int err = -ENODEV;
1128 u16 val;
1129
1130 static const __initdata char *names[] = {
1131 "W83627HF",
1132 "W83627THF",
1133 "W83697HF",
1134 "W83637HF",
1135 "W83687THF",
1136 };
1137
1138 superio_enter(sio_data);
1139 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1140 switch (val) {
1141 case W627_DEVID:
1142 sio_data->type = w83627hf;
1143 break;
1144 case W627THF_DEVID:
1145 sio_data->type = w83627thf;
1146 break;
1147 case W697_DEVID:
1148 sio_data->type = w83697hf;
1149 break;
1150 case W637_DEVID:
1151 sio_data->type = w83637hf;
1152 break;
1153 case W687THF_DEVID:
1154 sio_data->type = w83687thf;
1155 break;
1156 case 0xff: /* No device at all */
1157 goto exit;
1158 default:
1159 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
1160 goto exit;
1161 }
1162
1163 superio_select(sio_data, W83627HF_LD_HWM);
1164 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1165 superio_inb(sio_data, WINB_BASE_REG + 1);
1166 *addr = val & WINB_ALIGNMENT;
1167 if (*addr == 0) {
1168 printk(KERN_WARNING DRVNAME ": Base address not set, "
1169 "skipping\n");
1170 goto exit;
1171 }
1172
1173 val = superio_inb(sio_data, WINB_ACT_REG);
1174 if (!(val & 0x01)) {
1175 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1176 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1177 }
1178
1179 err = 0;
1180 sio_data->sioaddr = sioaddr;
1181 pr_info(DRVNAME ": Found %s chip at %#x\n",
1182 names[sio_data->type], *addr);
1183
1184 exit:
1185 superio_exit(sio_data);
1186 return err;
1187}
1188
1189#define VIN_UNIT_ATTRS(_X_) \
1190 &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
1191 &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
1192 &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
1193 &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
1194 &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
1195
1196#define FAN_UNIT_ATTRS(_X_) \
1197 &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
1198 &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
1199 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
1200 &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
1201 &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
1202
1203#define TEMP_UNIT_ATTRS(_X_) \
1204 &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
1205 &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
1206 &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
1207 &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
1208 &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
1209 &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
1210
1211static struct attribute *w83627hf_attributes[] = {
1212 &dev_attr_in0_input.attr,
1213 &dev_attr_in0_min.attr,
1214 &dev_attr_in0_max.attr,
1215 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1216 &sensor_dev_attr_in0_beep.dev_attr.attr,
1217 VIN_UNIT_ATTRS(2),
1218 VIN_UNIT_ATTRS(3),
1219 VIN_UNIT_ATTRS(4),
1220 VIN_UNIT_ATTRS(7),
1221 VIN_UNIT_ATTRS(8),
1222
1223 FAN_UNIT_ATTRS(1),
1224 FAN_UNIT_ATTRS(2),
1225
1226 TEMP_UNIT_ATTRS(1),
1227 TEMP_UNIT_ATTRS(2),
1228
1229 &dev_attr_alarms.attr,
1230 &sensor_dev_attr_beep_enable.dev_attr.attr,
1231 &dev_attr_beep_mask.attr,
1232
1233 &sensor_dev_attr_pwm1.dev_attr.attr,
1234 &sensor_dev_attr_pwm2.dev_attr.attr,
1235 &dev_attr_name.attr,
1236 NULL
1237};
1238
1239static const struct attribute_group w83627hf_group = {
1240 .attrs = w83627hf_attributes,
1241};
1242
1243static struct attribute *w83627hf_attributes_opt[] = {
1244 VIN_UNIT_ATTRS(1),
1245 VIN_UNIT_ATTRS(5),
1246 VIN_UNIT_ATTRS(6),
1247
1248 FAN_UNIT_ATTRS(3),
1249 TEMP_UNIT_ATTRS(3),
1250 &sensor_dev_attr_pwm3.dev_attr.attr,
1251
1252 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1253 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1254 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1255
1256 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1257 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1258 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1259
1260 NULL
1261};
1262
1263static const struct attribute_group w83627hf_group_opt = {
1264 .attrs = w83627hf_attributes_opt,
1265};
1266
1267static int __devinit w83627hf_probe(struct platform_device *pdev)
1268{
1269 struct device *dev = &pdev->dev;
1270 struct w83627hf_sio_data *sio_data = dev->platform_data;
1271 struct w83627hf_data *data;
1272 struct resource *res;
1273 int err, i;
1274
1275 static const char *names[] = {
1276 "w83627hf",
1277 "w83627thf",
1278 "w83697hf",
1279 "w83637hf",
1280 "w83687thf",
1281 };
1282
1283 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1284 if (!request_region(res->start, WINB_REGION_SIZE, DRVNAME)) {
1285 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1286 (unsigned long)res->start,
1287 (unsigned long)(res->start + WINB_REGION_SIZE - 1));
1288 err = -EBUSY;
1289 goto ERROR0;
1290 }
1291
1292 if (!(data = kzalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1293 err = -ENOMEM;
1294 goto ERROR1;
1295 }
1296 data->addr = res->start;
1297 data->type = sio_data->type;
1298 data->name = names[sio_data->type];
1299 mutex_init(&data->lock);
1300 mutex_init(&data->update_lock);
1301 platform_set_drvdata(pdev, data);
1302
1303 /* Initialize the chip */
1304 w83627hf_init_device(pdev);
1305
1306 /* A few vars need to be filled upon startup */
1307 for (i = 0; i <= 2; i++)
1308 data->fan_min[i] = w83627hf_read_value(
1309 data, W83627HF_REG_FAN_MIN(i));
1310 w83627hf_update_fan_div(data);
1311
1312 /* Register common device attributes */
1313 if ((err = sysfs_create_group(&dev->kobj, &w83627hf_group)))
1314 goto ERROR3;
1315
1316 /* Register chip-specific device attributes */
1317 if (data->type == w83627hf || data->type == w83697hf)
1318 if ((err = device_create_file(dev,
1319 &sensor_dev_attr_in5_input.dev_attr))
1320 || (err = device_create_file(dev,
1321 &sensor_dev_attr_in5_min.dev_attr))
1322 || (err = device_create_file(dev,
1323 &sensor_dev_attr_in5_max.dev_attr))
1324 || (err = device_create_file(dev,
1325 &sensor_dev_attr_in5_alarm.dev_attr))
1326 || (err = device_create_file(dev,
1327 &sensor_dev_attr_in5_beep.dev_attr))
1328 || (err = device_create_file(dev,
1329 &sensor_dev_attr_in6_input.dev_attr))
1330 || (err = device_create_file(dev,
1331 &sensor_dev_attr_in6_min.dev_attr))
1332 || (err = device_create_file(dev,
1333 &sensor_dev_attr_in6_max.dev_attr))
1334 || (err = device_create_file(dev,
1335 &sensor_dev_attr_in6_alarm.dev_attr))
1336 || (err = device_create_file(dev,
1337 &sensor_dev_attr_in6_beep.dev_attr))
1338 || (err = device_create_file(dev,
1339 &sensor_dev_attr_pwm1_freq.dev_attr))
1340 || (err = device_create_file(dev,
1341 &sensor_dev_attr_pwm2_freq.dev_attr)))
1342 goto ERROR4;
1343
1344 if (data->type != w83697hf)
1345 if ((err = device_create_file(dev,
1346 &sensor_dev_attr_in1_input.dev_attr))
1347 || (err = device_create_file(dev,
1348 &sensor_dev_attr_in1_min.dev_attr))
1349 || (err = device_create_file(dev,
1350 &sensor_dev_attr_in1_max.dev_attr))
1351 || (err = device_create_file(dev,
1352 &sensor_dev_attr_in1_alarm.dev_attr))
1353 || (err = device_create_file(dev,
1354 &sensor_dev_attr_in1_beep.dev_attr))
1355 || (err = device_create_file(dev,
1356 &sensor_dev_attr_fan3_input.dev_attr))
1357 || (err = device_create_file(dev,
1358 &sensor_dev_attr_fan3_min.dev_attr))
1359 || (err = device_create_file(dev,
1360 &sensor_dev_attr_fan3_div.dev_attr))
1361 || (err = device_create_file(dev,
1362 &sensor_dev_attr_fan3_alarm.dev_attr))
1363 || (err = device_create_file(dev,
1364 &sensor_dev_attr_fan3_beep.dev_attr))
1365 || (err = device_create_file(dev,
1366 &sensor_dev_attr_temp3_input.dev_attr))
1367 || (err = device_create_file(dev,
1368 &sensor_dev_attr_temp3_max.dev_attr))
1369 || (err = device_create_file(dev,
1370 &sensor_dev_attr_temp3_max_hyst.dev_attr))
1371 || (err = device_create_file(dev,
1372 &sensor_dev_attr_temp3_alarm.dev_attr))
1373 || (err = device_create_file(dev,
1374 &sensor_dev_attr_temp3_beep.dev_attr))
1375 || (err = device_create_file(dev,
1376 &sensor_dev_attr_temp3_type.dev_attr)))
1377 goto ERROR4;
1378
1379 if (data->type != w83697hf && data->vid != 0xff) {
1380 /* Convert VID to voltage based on VRM */
1381 data->vrm = vid_which_vrm();
1382
1383 if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
1384 || (err = device_create_file(dev, &dev_attr_vrm)))
1385 goto ERROR4;
1386 }
1387
1388 if (data->type == w83627thf || data->type == w83637hf
1389 || data->type == w83687thf)
1390 if ((err = device_create_file(dev,
1391 &sensor_dev_attr_pwm3.dev_attr)))
1392 goto ERROR4;
1393
1394 if (data->type == w83637hf || data->type == w83687thf)
1395 if ((err = device_create_file(dev,
1396 &sensor_dev_attr_pwm1_freq.dev_attr))
1397 || (err = device_create_file(dev,
1398 &sensor_dev_attr_pwm2_freq.dev_attr))
1399 || (err = device_create_file(dev,
1400 &sensor_dev_attr_pwm3_freq.dev_attr)))
1401 goto ERROR4;
1402
1403 if (data->type != w83627hf)
1404 if ((err = device_create_file(dev,
1405 &sensor_dev_attr_pwm1_enable.dev_attr))
1406 || (err = device_create_file(dev,
1407 &sensor_dev_attr_pwm2_enable.dev_attr)))
1408 goto ERROR4;
1409
1410 if (data->type == w83627thf || data->type == w83637hf
1411 || data->type == w83687thf)
1412 if ((err = device_create_file(dev,
1413 &sensor_dev_attr_pwm3_enable.dev_attr)))
1414 goto ERROR4;
1415
1416 data->hwmon_dev = hwmon_device_register(dev);
1417 if (IS_ERR(data->hwmon_dev)) {
1418 err = PTR_ERR(data->hwmon_dev);
1419 goto ERROR4;
1420 }
1421
1422 return 0;
1423
1424 ERROR4:
1425 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1426 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1427 ERROR3:
1428 platform_set_drvdata(pdev, NULL);
1429 kfree(data);
1430 ERROR1:
1431 release_region(res->start, WINB_REGION_SIZE);
1432 ERROR0:
1433 return err;
1434}
1435
1436static int __devexit w83627hf_remove(struct platform_device *pdev)
1437{
1438 struct w83627hf_data *data = platform_get_drvdata(pdev);
1439 struct resource *res;
1440
1441 hwmon_device_unregister(data->hwmon_dev);
1442
1443 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1444 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1445 platform_set_drvdata(pdev, NULL);
1446 kfree(data);
1447
1448 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1449 release_region(res->start, WINB_REGION_SIZE);
1450
1451 return 0;
1452}
1453
1454
1455/* Registers 0x50-0x5f are banked */
1456static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
1457{
1458 if ((reg & 0x00f0) == 0x50) {
1459 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1460 outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
1461 }
1462}
1463
1464/* Not strictly necessary, but play it safe for now */
1465static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
1466{
1467 if (reg & 0xff00) {
1468 outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
1469 outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
1470 }
1471}
1472
1473static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1474{
1475 int res, word_sized;
1476
1477 mutex_lock(&data->lock);
1478 word_sized = (((reg & 0xff00) == 0x100)
1479 || ((reg & 0xff00) == 0x200))
1480 && (((reg & 0x00ff) == 0x50)
1481 || ((reg & 0x00ff) == 0x53)
1482 || ((reg & 0x00ff) == 0x55));
1483 w83627hf_set_bank(data, reg);
1484 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1485 res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
1486 if (word_sized) {
1487 outb_p((reg & 0xff) + 1,
1488 data->addr + W83781D_ADDR_REG_OFFSET);
1489 res =
1490 (res << 8) + inb_p(data->addr +
1491 W83781D_DATA_REG_OFFSET);
1492 }
1493 w83627hf_reset_bank(data, reg);
1494 mutex_unlock(&data->lock);
1495 return res;
1496}
1497
1498static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1499{
1500 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1501 int res = 0xff, sel;
1502
1503 superio_enter(sio_data);
1504 superio_select(sio_data, W83627HF_LD_GPIO5);
1505
1506 /* Make sure these GPIO pins are enabled */
1507 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1508 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1509 goto exit;
1510 }
1511
1512 /* Make sure the pins are configured for input
1513 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1514 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1515 if ((sel & 0x1f) != 0x1f) {
1516 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1517 "function\n");
1518 goto exit;
1519 }
1520
1521 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1522 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1523
1524exit:
1525 superio_exit(sio_data);
1526 return res;
1527}
1528
1529static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1530{
1531 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1532 int res = 0xff;
1533
1534 superio_enter(sio_data);
1535 superio_select(sio_data, W83627HF_LD_HWM);
1536
1537 /* Make sure these GPIO pins are enabled */
1538 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1539 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1540 goto exit;
1541 }
1542
1543 /* Make sure the pins are configured for input */
1544 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1545 dev_dbg(&pdev->dev, "VID configured as output, "
1546 "no VID function\n");
1547 goto exit;
1548 }
1549
1550 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1551
1552exit:
1553 superio_exit(sio_data);
1554 return res;
1555}
1556
1557static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
1558{
1559 int word_sized;
1560
1561 mutex_lock(&data->lock);
1562 word_sized = (((reg & 0xff00) == 0x100)
1563 || ((reg & 0xff00) == 0x200))
1564 && (((reg & 0x00ff) == 0x53)
1565 || ((reg & 0x00ff) == 0x55));
1566 w83627hf_set_bank(data, reg);
1567 outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
1568 if (word_sized) {
1569 outb_p(value >> 8,
1570 data->addr + W83781D_DATA_REG_OFFSET);
1571 outb_p((reg & 0xff) + 1,
1572 data->addr + W83781D_ADDR_REG_OFFSET);
1573 }
1574 outb_p(value & 0xff,
1575 data->addr + W83781D_DATA_REG_OFFSET);
1576 w83627hf_reset_bank(data, reg);
1577 mutex_unlock(&data->lock);
1578 return 0;
1579}
1580
1581static void __devinit w83627hf_init_device(struct platform_device *pdev)
1582{
1583 struct w83627hf_data *data = platform_get_drvdata(pdev);
1584 int i;
1585 enum chips type = data->type;
1586 u8 tmp;
1587
1588 /* Minimize conflicts with other winbond i2c-only clients... */
1589 /* disable i2c subclients... how to disable main i2c client?? */
1590 /* force i2c address to relatively uncommon address */
1591 w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
1592 w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
1593
1594 /* Read VID only once */
1595 if (type == w83627hf || type == w83637hf) {
1596 int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1597 int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
1598 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1599 } else if (type == w83627thf) {
1600 data->vid = w83627thf_read_gpio5(pdev);
1601 } else if (type == w83687thf) {
1602 data->vid = w83687thf_read_vid(pdev);
1603 }
1604
1605 /* Read VRM & OVT Config only once */
1606 if (type == w83627thf || type == w83637hf || type == w83687thf) {
1607 data->vrm_ovt =
1608 w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
1609 }
1610
1611 tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1612 for (i = 1; i <= 3; i++) {
1613 if (!(tmp & BIT_SCFG1[i - 1])) {
1614 data->sens[i - 1] = 4;
1615 } else {
1616 if (w83627hf_read_value
1617 (data,
1618 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1619 data->sens[i - 1] = 1;
1620 else
1621 data->sens[i - 1] = 2;
1622 }
1623 if ((type == w83697hf) && (i == 2))
1624 break;
1625 }
1626
1627 if(init) {
1628 /* Enable temp2 */
1629 tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
1630 if (tmp & 0x01) {
1631 dev_warn(&pdev->dev, "Enabling temp2, readings "
1632 "might not make sense\n");
1633 w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
1634 tmp & 0xfe);
1635 }
1636
1637 /* Enable temp3 */
1638 if (type != w83697hf) {
1639 tmp = w83627hf_read_value(data,
1640 W83627HF_REG_TEMP3_CONFIG);
1641 if (tmp & 0x01) {
1642 dev_warn(&pdev->dev, "Enabling temp3, "
1643 "readings might not make sense\n");
1644 w83627hf_write_value(data,
1645 W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
1646 }
1647 }
1648 }
1649
1650 /* Start monitoring */
1651 w83627hf_write_value(data, W83781D_REG_CONFIG,
1652 (w83627hf_read_value(data,
1653 W83781D_REG_CONFIG) & 0xf7)
1654 | 0x01);
1655
1656 /* Enable VBAT monitoring if needed */
1657 tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
1658 if (!(tmp & 0x01))
1659 w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
1660}
1661
1662static void w83627hf_update_fan_div(struct w83627hf_data *data)
1663{
1664 int reg;
1665
1666 reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
1667 data->fan_div[0] = (reg >> 4) & 0x03;
1668 data->fan_div[1] = (reg >> 6) & 0x03;
1669 if (data->type != w83697hf) {
1670 data->fan_div[2] = (w83627hf_read_value(data,
1671 W83781D_REG_PIN) >> 6) & 0x03;
1672 }
1673 reg = w83627hf_read_value(data, W83781D_REG_VBAT);
1674 data->fan_div[0] |= (reg >> 3) & 0x04;
1675 data->fan_div[1] |= (reg >> 4) & 0x04;
1676 if (data->type != w83697hf)
1677 data->fan_div[2] |= (reg >> 5) & 0x04;
1678}
1679
1680static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1681{
1682 struct w83627hf_data *data = dev_get_drvdata(dev);
1683 int i, num_temps = (data->type == w83697hf) ? 2 : 3;
1684 int num_pwms = (data->type == w83697hf) ? 2 : 3;
1685
1686 mutex_lock(&data->update_lock);
1687
1688 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1689 || !data->valid) {
1690 for (i = 0; i <= 8; i++) {
1691 /* skip missing sensors */
1692 if (((data->type == w83697hf) && (i == 1)) ||
1693 ((data->type != w83627hf && data->type != w83697hf)
1694 && (i == 5 || i == 6)))
1695 continue;
1696 data->in[i] =
1697 w83627hf_read_value(data, W83781D_REG_IN(i));
1698 data->in_min[i] =
1699 w83627hf_read_value(data,
1700 W83781D_REG_IN_MIN(i));
1701 data->in_max[i] =
1702 w83627hf_read_value(data,
1703 W83781D_REG_IN_MAX(i));
1704 }
1705 for (i = 0; i <= 2; i++) {
1706 data->fan[i] =
1707 w83627hf_read_value(data, W83627HF_REG_FAN(i));
1708 data->fan_min[i] =
1709 w83627hf_read_value(data,
1710 W83627HF_REG_FAN_MIN(i));
1711 }
1712 for (i = 0; i <= 2; i++) {
1713 u8 tmp = w83627hf_read_value(data,
1714 W836X7HF_REG_PWM(data->type, i));
1715 /* bits 0-3 are reserved in 627THF */
1716 if (data->type == w83627thf)
1717 tmp &= 0xf0;
1718 data->pwm[i] = tmp;
1719 if (i == 1 &&
1720 (data->type == w83627hf || data->type == w83697hf))
1721 break;
1722 }
1723 if (data->type == w83627hf) {
1724 u8 tmp = w83627hf_read_value(data,
1725 W83627HF_REG_PWM_FREQ);
1726 data->pwm_freq[0] = tmp & 0x07;
1727 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1728 } else if (data->type != w83627thf) {
1729 for (i = 1; i <= 3; i++) {
1730 data->pwm_freq[i - 1] =
1731 w83627hf_read_value(data,
1732 W83637HF_REG_PWM_FREQ[i - 1]);
1733 if (i == 2 && (data->type == w83697hf))
1734 break;
1735 }
1736 }
1737 if (data->type != w83627hf) {
1738 for (i = 0; i < num_pwms; i++) {
1739 u8 tmp = w83627hf_read_value(data,
1740 W83627THF_REG_PWM_ENABLE[i]);
1741 data->pwm_enable[i] =
1742 ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
1743 & 0x03) + 1;
1744 }
1745 }
1746 for (i = 0; i < num_temps; i++) {
1747 data->temp[i] = w83627hf_read_value(
1748 data, w83627hf_reg_temp[i]);
1749 data->temp_max[i] = w83627hf_read_value(
1750 data, w83627hf_reg_temp_over[i]);
1751 data->temp_max_hyst[i] = w83627hf_read_value(
1752 data, w83627hf_reg_temp_hyst[i]);
1753 }
1754
1755 w83627hf_update_fan_div(data);
1756
1757 data->alarms =
1758 w83627hf_read_value(data, W83781D_REG_ALARM1) |
1759 (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
1760 (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
1761 i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
1762 data->beep_mask = (i << 8) |
1763 w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
1764 w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
1765 data->last_updated = jiffies;
1766 data->valid = 1;
1767 }
1768
1769 mutex_unlock(&data->update_lock);
1770
1771 return data;
1772}
1773
1774static int __init w83627hf_device_add(unsigned short address,
1775 const struct w83627hf_sio_data *sio_data)
1776{
1777 struct resource res = {
1778 .start = address + WINB_REGION_OFFSET,
1779 .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
1780 .name = DRVNAME,
1781 .flags = IORESOURCE_IO,
1782 };
1783 int err;
1784
1785 err = acpi_check_resource_conflict(&res);
1786 if (err)
1787 goto exit;
1788
1789 pdev = platform_device_alloc(DRVNAME, address);
1790 if (!pdev) {
1791 err = -ENOMEM;
1792 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1793 goto exit;
1794 }
1795
1796 err = platform_device_add_resources(pdev, &res, 1);
1797 if (err) {
1798 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1799 "(%d)\n", err);
1800 goto exit_device_put;
1801 }
1802
1803 err = platform_device_add_data(pdev, sio_data,
1804 sizeof(struct w83627hf_sio_data));
1805 if (err) {
1806 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1807 goto exit_device_put;
1808 }
1809
1810 err = platform_device_add(pdev);
1811 if (err) {
1812 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1813 err);
1814 goto exit_device_put;
1815 }
1816
1817 return 0;
1818
1819exit_device_put:
1820 platform_device_put(pdev);
1821exit:
1822 return err;
1823}
1824
1825static int __init sensors_w83627hf_init(void)
1826{
1827 int err;
1828 unsigned short address;
1829 struct w83627hf_sio_data sio_data;
1830
1831 if (w83627hf_find(0x2e, &address, &sio_data)
1832 && w83627hf_find(0x4e, &address, &sio_data))
1833 return -ENODEV;
1834
1835 err = platform_driver_register(&w83627hf_driver);
1836 if (err)
1837 goto exit;
1838
1839 /* Sets global pdev as a side effect */
1840 err = w83627hf_device_add(address, &sio_data);
1841 if (err)
1842 goto exit_driver;
1843
1844 return 0;
1845
1846exit_driver:
1847 platform_driver_unregister(&w83627hf_driver);
1848exit:
1849 return err;
1850}
1851
1852static void __exit sensors_w83627hf_exit(void)
1853{
1854 platform_device_unregister(pdev);
1855 platform_driver_unregister(&w83627hf_driver);
1856}
1857
1858MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1859 "Philip Edelbrock <phil@netroedge.com>, "
1860 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1861MODULE_DESCRIPTION("W83627HF driver");
1862MODULE_LICENSE("GPL");
1863
1864module_init(sensors_w83627hf_init);
1865module_exit(sensors_w83627hf_exit);
Linux 6.x block layer and io_uring tree(s)