drm/nouveau: share fence structures between nv10+ and nv50 implementations
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nv10_fence.c
... / ...
CommitLineData
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24
25#include <core/object.h>
26#include <core/class.h>
27
28#include "nouveau_drm.h"
29#include "nouveau_dma.h"
30#include "nv10_fence.h"
31
32int
33nv10_fence_emit(struct nouveau_fence *fence)
34{
35 struct nouveau_channel *chan = fence->channel;
36 int ret = RING_SPACE(chan, 2);
37 if (ret == 0) {
38 BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
39 OUT_RING (chan, fence->sequence);
40 FIRE_RING (chan);
41 }
42 return ret;
43}
44
45
46static int
47nv10_fence_sync(struct nouveau_fence *fence,
48 struct nouveau_channel *prev, struct nouveau_channel *chan)
49{
50 return -ENODEV;
51}
52
53int
54nv17_fence_sync(struct nouveau_fence *fence,
55 struct nouveau_channel *prev, struct nouveau_channel *chan)
56{
57 struct nv10_fence_priv *priv = chan->drm->fence;
58 u32 value;
59 int ret;
60
61 if (!mutex_trylock(&prev->cli->mutex))
62 return -EBUSY;
63
64 spin_lock(&priv->lock);
65 value = priv->sequence;
66 priv->sequence += 2;
67 spin_unlock(&priv->lock);
68
69 ret = RING_SPACE(prev, 5);
70 if (!ret) {
71 BEGIN_NV04(prev, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
72 OUT_RING (prev, NvSema);
73 OUT_RING (prev, 0);
74 OUT_RING (prev, value + 0);
75 OUT_RING (prev, value + 1);
76 FIRE_RING (prev);
77 }
78
79 if (!ret && !(ret = RING_SPACE(chan, 5))) {
80 BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 4);
81 OUT_RING (chan, NvSema);
82 OUT_RING (chan, 0);
83 OUT_RING (chan, value + 1);
84 OUT_RING (chan, value + 2);
85 FIRE_RING (chan);
86 }
87
88 mutex_unlock(&prev->cli->mutex);
89 return 0;
90}
91
92u32
93nv10_fence_read(struct nouveau_channel *chan)
94{
95 return nv_ro32(chan->object, 0x0048);
96}
97
98void
99nv10_fence_context_del(struct nouveau_channel *chan)
100{
101 struct nv10_fence_chan *fctx = chan->fence;
102 nouveau_fence_context_del(&fctx->base);
103 chan->fence = NULL;
104 kfree(fctx);
105}
106
107static int
108nv10_fence_context_new(struct nouveau_channel *chan)
109{
110 struct nv10_fence_priv *priv = chan->drm->fence;
111 struct nv10_fence_chan *fctx;
112 int ret = 0;
113
114 fctx = chan->fence = kzalloc(sizeof(*fctx), GFP_KERNEL);
115 if (!fctx)
116 return -ENOMEM;
117
118 nouveau_fence_context_new(&fctx->base);
119
120 if (priv->bo) {
121 struct ttm_mem_reg *mem = &priv->bo->bo.mem;
122 struct nouveau_object *object;
123 u32 start = mem->start * PAGE_SIZE;
124 u32 limit = mem->start + mem->size - 1;
125
126 ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
127 NvSema, 0x0002,
128 &(struct nv_dma_class) {
129 .flags = NV_DMA_TARGET_VRAM |
130 NV_DMA_ACCESS_RDWR,
131 .start = start,
132 .limit = limit,
133 }, sizeof(struct nv_dma_class),
134 &object);
135 }
136
137 if (ret)
138 nv10_fence_context_del(chan);
139 return ret;
140}
141
142void
143nv10_fence_destroy(struct nouveau_drm *drm)
144{
145 struct nv10_fence_priv *priv = drm->fence;
146 nouveau_bo_unmap(priv->bo);
147 if (priv->bo)
148 nouveau_bo_unpin(priv->bo);
149 nouveau_bo_ref(NULL, &priv->bo);
150 drm->fence = NULL;
151 kfree(priv);
152}
153
154void nv17_fence_resume(struct nouveau_drm *drm)
155{
156 struct nv10_fence_priv *priv = drm->fence;
157
158 nouveau_bo_wr32(priv->bo, 0, priv->sequence);
159}
160
161int
162nv10_fence_create(struct nouveau_drm *drm)
163{
164 struct nv10_fence_priv *priv;
165 int ret = 0;
166
167 priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
168 if (!priv)
169 return -ENOMEM;
170
171 priv->base.dtor = nv10_fence_destroy;
172 priv->base.context_new = nv10_fence_context_new;
173 priv->base.context_del = nv10_fence_context_del;
174 priv->base.emit = nv10_fence_emit;
175 priv->base.read = nv10_fence_read;
176 priv->base.sync = nv10_fence_sync;
177 spin_lock_init(&priv->lock);
178
179 if (nv_device(drm->device)->chipset >= 0x17) {
180 ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
181 0, 0x0000, NULL, &priv->bo);
182 if (!ret) {
183 ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM);
184 if (!ret) {
185 ret = nouveau_bo_map(priv->bo);
186 if (ret)
187 nouveau_bo_unpin(priv->bo);
188 }
189 if (ret)
190 nouveau_bo_ref(NULL, &priv->bo);
191 }
192
193 if (ret == 0) {
194 nouveau_bo_wr32(priv->bo, 0x000, 0x00000000);
195 priv->base.sync = nv17_fence_sync;
196 priv->base.resume = nv17_fence_resume;
197 }
198 }
199
200 if (ret)
201 nv10_fence_destroy(drm);
202 return ret;
203}