| 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | # |
| 3 | # DMA engine configuration |
| 4 | # |
| 5 | |
| 6 | menuconfig DMADEVICES |
| 7 | bool "DMA Engine support" |
| 8 | depends on HAS_DMA |
| 9 | help |
| 10 | DMA engines can do asynchronous data transfers without |
| 11 | involving the host CPU. Currently, this framework can be |
| 12 | used to offload memory copies in the network stack and |
| 13 | RAID operations in the MD driver. This menu only presents |
| 14 | DMA Device drivers supported by the configured arch, it may |
| 15 | be empty in some cases. |
| 16 | |
| 17 | config DMADEVICES_DEBUG |
| 18 | bool "DMA Engine debugging" |
| 19 | depends on DMADEVICES != n |
| 20 | help |
| 21 | This is an option for use by developers; most people should |
| 22 | say N here. This enables DMA engine core and driver debugging. |
| 23 | |
| 24 | config DMADEVICES_VDEBUG |
| 25 | bool "DMA Engine verbose debugging" |
| 26 | depends on DMADEVICES_DEBUG != n |
| 27 | help |
| 28 | This is an option for use by developers; most people should |
| 29 | say N here. This enables deeper (more verbose) debugging of |
| 30 | the DMA engine core and drivers. |
| 31 | |
| 32 | |
| 33 | if DMADEVICES |
| 34 | |
| 35 | comment "DMA Devices" |
| 36 | |
| 37 | #core |
| 38 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 39 | bool |
| 40 | |
| 41 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 42 | bool |
| 43 | |
| 44 | config DMA_ENGINE |
| 45 | bool |
| 46 | |
| 47 | config DMA_VIRTUAL_CHANNELS |
| 48 | tristate |
| 49 | |
| 50 | config DMA_ACPI |
| 51 | def_bool y |
| 52 | depends on ACPI |
| 53 | |
| 54 | config DMA_OF |
| 55 | def_bool y |
| 56 | depends on OF |
| 57 | select DMA_ENGINE |
| 58 | |
| 59 | #devices |
| 60 | config ALTERA_MSGDMA |
| 61 | tristate "Altera / Intel mSGDMA Engine" |
| 62 | depends on HAS_IOMEM |
| 63 | select DMA_ENGINE |
| 64 | help |
| 65 | Enable support for Altera / Intel mSGDMA controller. |
| 66 | |
| 67 | config AMBA_PL08X |
| 68 | bool "ARM PrimeCell PL080 or PL081 support" |
| 69 | depends on ARM_AMBA |
| 70 | select DMA_ENGINE |
| 71 | select DMA_VIRTUAL_CHANNELS |
| 72 | help |
| 73 | Say yes if your platform has a PL08x DMAC device which can |
| 74 | provide DMA engine support. This includes the original ARM |
| 75 | PL080 and PL081, Samsungs PL080 derivative and Faraday |
| 76 | Technology's FTDMAC020 PL080 derivative. |
| 77 | |
| 78 | config AMCC_PPC440SPE_ADMA |
| 79 | tristate "AMCC PPC440SPe ADMA support" |
| 80 | depends on 440SPe || 440SP |
| 81 | select DMA_ENGINE |
| 82 | select DMA_ENGINE_RAID |
| 83 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 84 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 85 | help |
| 86 | Enable support for the AMCC PPC440SPe RAID engines. |
| 87 | |
| 88 | config APPLE_ADMAC |
| 89 | tristate "Apple ADMAC support" |
| 90 | depends on ARCH_APPLE || COMPILE_TEST |
| 91 | select DMA_ENGINE |
| 92 | default ARCH_APPLE |
| 93 | help |
| 94 | Enable support for Audio DMA Controller found on Apple Silicon SoCs. |
| 95 | |
| 96 | config ARM_DMA350 |
| 97 | tristate "Arm DMA-350 support" |
| 98 | depends on ARM || ARM64 || COMPILE_TEST |
| 99 | select DMA_ENGINE |
| 100 | select DMA_VIRTUAL_CHANNELS |
| 101 | help |
| 102 | Enable support for the Arm DMA-350 controller. |
| 103 | |
| 104 | config AT_HDMAC |
| 105 | tristate "Atmel AHB DMA support" |
| 106 | depends on ARCH_AT91 |
| 107 | select DMA_ENGINE |
| 108 | select DMA_VIRTUAL_CHANNELS |
| 109 | help |
| 110 | Support the Atmel AHB DMA controller. |
| 111 | |
| 112 | config AT_XDMAC |
| 113 | tristate "Atmel XDMA support" |
| 114 | depends on ARCH_AT91 |
| 115 | select DMA_ENGINE |
| 116 | help |
| 117 | Support the Atmel XDMA controller. |
| 118 | |
| 119 | config AXI_DMAC |
| 120 | tristate "Analog Devices AXI-DMAC DMA support" |
| 121 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST |
| 122 | select DMA_ENGINE |
| 123 | select DMA_VIRTUAL_CHANNELS |
| 124 | select REGMAP_MMIO |
| 125 | help |
| 126 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
| 127 | controller is often used in Analog Devices' reference designs for FPGA |
| 128 | platforms. |
| 129 | |
| 130 | config BCM_SBA_RAID |
| 131 | tristate "Broadcom SBA RAID engine support" |
| 132 | depends on ARM64 || COMPILE_TEST |
| 133 | depends on MAILBOX && RAID6_PQ |
| 134 | select DMA_ENGINE |
| 135 | select DMA_ENGINE_RAID |
| 136 | select ASYNC_TX_DISABLE_XOR_VAL_DMA |
| 137 | select ASYNC_TX_DISABLE_PQ_VAL_DMA |
| 138 | default m if ARCH_BCM_IPROC |
| 139 | help |
| 140 | Enable support for Broadcom SBA RAID Engine. The SBA RAID |
| 141 | engine is available on most of the Broadcom iProc SoCs. It |
| 142 | has the capability to offload memcpy, xor and pq computation |
| 143 | for raid5/6. |
| 144 | |
| 145 | config DMA_BCM2835 |
| 146 | tristate "BCM2835 DMA engine support" |
| 147 | depends on ARCH_BCM2835 |
| 148 | select DMA_ENGINE |
| 149 | select DMA_VIRTUAL_CHANNELS |
| 150 | |
| 151 | config DMA_JZ4780 |
| 152 | tristate "JZ4780 DMA support" |
| 153 | depends on MIPS || COMPILE_TEST |
| 154 | select DMA_ENGINE |
| 155 | select DMA_VIRTUAL_CHANNELS |
| 156 | help |
| 157 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
| 158 | If you have a board based on such a SoC and wish to use DMA for |
| 159 | devices which can use the DMA controller, say Y or M here. |
| 160 | |
| 161 | config DMA_SA11X0 |
| 162 | tristate "SA-11x0 DMA support" |
| 163 | depends on ARCH_SA1100 || COMPILE_TEST |
| 164 | select DMA_ENGINE |
| 165 | select DMA_VIRTUAL_CHANNELS |
| 166 | help |
| 167 | Support the DMA engine found on Intel StrongARM SA-1100 and |
| 168 | SA-1110 SoCs. This DMA engine can only be used with on-chip |
| 169 | devices. |
| 170 | |
| 171 | config DMA_SUN4I |
| 172 | tristate "Allwinner A10 DMA SoCs support" |
| 173 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNIV |
| 174 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNIV) |
| 175 | select DMA_ENGINE |
| 176 | select DMA_VIRTUAL_CHANNELS |
| 177 | help |
| 178 | Enable support for the DMA controller present in the sun4i, |
| 179 | sun5i and sun7i Allwinner ARM SoCs. |
| 180 | |
| 181 | config DMA_SUN6I |
| 182 | tristate "Allwinner A31 SoCs DMA support" |
| 183 | depends on ARCH_SUNXI || COMPILE_TEST |
| 184 | depends on RESET_CONTROLLER |
| 185 | select DMA_ENGINE |
| 186 | select DMA_VIRTUAL_CHANNELS |
| 187 | help |
| 188 | Support for the DMA engine first found in Allwinner A31 SoCs. |
| 189 | |
| 190 | config DW_AXI_DMAC |
| 191 | tristate "Synopsys DesignWare AXI DMA support" |
| 192 | depends on OF |
| 193 | depends on HAS_IOMEM |
| 194 | select DMA_ENGINE |
| 195 | select DMA_VIRTUAL_CHANNELS |
| 196 | help |
| 197 | Enable support for Synopsys DesignWare AXI DMA controller. |
| 198 | NOTE: This driver wasn't tested on 64 bit platform because |
| 199 | of lack 64 bit platform with Synopsys DW AXI DMAC. |
| 200 | |
| 201 | config EP93XX_DMA |
| 202 | bool "Cirrus Logic EP93xx DMA support" |
| 203 | depends on ARCH_EP93XX || COMPILE_TEST |
| 204 | select DMA_ENGINE |
| 205 | help |
| 206 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. |
| 207 | |
| 208 | config FSL_DMA |
| 209 | tristate "Freescale Elo series DMA support" |
| 210 | depends on FSL_SOC |
| 211 | select DMA_ENGINE |
| 212 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 213 | help |
| 214 | Enable support for the Freescale Elo series DMA controllers. |
| 215 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the |
| 216 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on |
| 217 | some Txxx and Bxxx parts. |
| 218 | |
| 219 | config FSL_EDMA |
| 220 | tristate "Freescale eDMA engine support" |
| 221 | depends on OF |
| 222 | depends on HAS_IOMEM |
| 223 | select DMA_ENGINE |
| 224 | select DMA_VIRTUAL_CHANNELS |
| 225 | help |
| 226 | Support the Freescale eDMA engine with programmable channel |
| 227 | multiplexing capability for DMA request sources(slot). |
| 228 | This module can be found on Freescale Vybrid and LS-1 SoCs. |
| 229 | |
| 230 | config FSL_QDMA |
| 231 | tristate "NXP Layerscape qDMA engine support" |
| 232 | depends on ARM || ARM64 |
| 233 | select DMA_ENGINE |
| 234 | select DMA_VIRTUAL_CHANNELS |
| 235 | select DMA_ENGINE_RAID |
| 236 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 237 | help |
| 238 | Support the NXP Layerscape qDMA engine with command queue and legacy mode. |
| 239 | Channel virtualization is supported through enqueuing of DMA jobs to, |
| 240 | or dequeuing DMA jobs from, different work queues. |
| 241 | This module can be found on NXP Layerscape SoCs. |
| 242 | The qdma driver only work on SoCs with a DPAA hardware block. |
| 243 | |
| 244 | config FSL_RAID |
| 245 | tristate "Freescale RAID engine Support" |
| 246 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 247 | select DMA_ENGINE |
| 248 | select DMA_ENGINE_RAID |
| 249 | help |
| 250 | Enable support for Freescale RAID Engine. RAID Engine is |
| 251 | available on some QorIQ SoCs (like P5020/P5040). It has |
| 252 | the capability to offload memcpy, xor and pq computation |
| 253 | for raid5/6. |
| 254 | |
| 255 | config HISI_DMA |
| 256 | tristate "HiSilicon DMA Engine support" |
| 257 | depends on ARCH_HISI || COMPILE_TEST |
| 258 | depends on PCI_MSI |
| 259 | select DMA_ENGINE |
| 260 | select DMA_VIRTUAL_CHANNELS |
| 261 | help |
| 262 | Support HiSilicon Kunpeng DMA engine. |
| 263 | |
| 264 | config IMG_MDC_DMA |
| 265 | tristate "IMG MDC support" |
| 266 | depends on MIPS || COMPILE_TEST |
| 267 | depends on MFD_SYSCON |
| 268 | select DMA_ENGINE |
| 269 | select DMA_VIRTUAL_CHANNELS |
| 270 | help |
| 271 | Enable support for the IMG multi-threaded DMA controller (MDC). |
| 272 | |
| 273 | config IMX_DMA |
| 274 | tristate "i.MX DMA support" |
| 275 | depends on ARCH_MXC |
| 276 | select DMA_ENGINE |
| 277 | help |
| 278 | Support the i.MX DMA engine. This engine is integrated into |
| 279 | Freescale i.MX1/21/27 chips. |
| 280 | |
| 281 | config IMX_SDMA |
| 282 | tristate "i.MX SDMA support" |
| 283 | depends on ARCH_MXC |
| 284 | select DMA_ENGINE |
| 285 | select DMA_VIRTUAL_CHANNELS |
| 286 | help |
| 287 | Support the i.MX SDMA engine. This engine is integrated into |
| 288 | Freescale i.MX25/31/35/51/53/6 chips. |
| 289 | |
| 290 | config INTEL_IDMA64 |
| 291 | tristate "Intel integrated DMA 64-bit support" |
| 292 | depends on HAS_IOMEM |
| 293 | select DMA_ENGINE |
| 294 | select DMA_VIRTUAL_CHANNELS |
| 295 | help |
| 296 | Enable DMA support for Intel Low Power Subsystem such as found on |
| 297 | Intel Skylake PCH. |
| 298 | |
| 299 | config INTEL_IDXD_BUS |
| 300 | tristate |
| 301 | default INTEL_IDXD |
| 302 | |
| 303 | config INTEL_IDXD |
| 304 | tristate "Intel Data Accelerators support" |
| 305 | depends on PCI && X86_64 && !UML |
| 306 | depends on PCI_MSI |
| 307 | depends on PCI_PASID |
| 308 | depends on SBITMAP |
| 309 | select DMA_ENGINE |
| 310 | help |
| 311 | Enable support for the Intel(R) data accelerators present |
| 312 | in Intel Xeon CPU. |
| 313 | |
| 314 | Say Y if you have such a platform. |
| 315 | |
| 316 | If unsure, say N. |
| 317 | |
| 318 | config INTEL_IDXD_COMPAT |
| 319 | bool "Legacy behavior for idxd driver" |
| 320 | depends on PCI && X86_64 |
| 321 | select INTEL_IDXD_BUS |
| 322 | help |
| 323 | Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior. |
| 324 | The old behavior performed driver bind/unbind for device and wq |
| 325 | devices all under the dsa driver. The compat driver will emulate |
| 326 | the legacy behavior in order to allow existing support apps (i.e. |
| 327 | accel-config) to continue function. It is expected that accel-config |
| 328 | v3.2 and earlier will need the compat mode. A distro with later |
| 329 | accel-config version can disable this compat config. |
| 330 | |
| 331 | Say Y if you have old applications that require such behavior. |
| 332 | |
| 333 | If unsure, say N. |
| 334 | |
| 335 | # Config symbol that collects all the dependencies that's necessary to |
| 336 | # support shared virtual memory for the devices supported by idxd. |
| 337 | config INTEL_IDXD_SVM |
| 338 | bool "Accelerator Shared Virtual Memory Support" |
| 339 | depends on INTEL_IDXD |
| 340 | depends on INTEL_IOMMU_SVM |
| 341 | depends on PCI_PRI |
| 342 | depends on PCI_PASID |
| 343 | depends on PCI_IOV |
| 344 | |
| 345 | config INTEL_IDXD_PERFMON |
| 346 | bool "Intel Data Accelerators performance monitor support" |
| 347 | depends on INTEL_IDXD |
| 348 | help |
| 349 | Enable performance monitor (pmu) support for the Intel(R) |
| 350 | data accelerators present in Intel Xeon CPU. With this |
| 351 | enabled, perf can be used to monitor the DSA (Intel Data |
| 352 | Streaming Accelerator) events described in the Intel DSA |
| 353 | spec. |
| 354 | |
| 355 | If unsure, say N. |
| 356 | |
| 357 | config INTEL_IOATDMA |
| 358 | tristate "Intel I/OAT DMA support" |
| 359 | depends on PCI && X86_64 && !UML |
| 360 | select DMA_ENGINE |
| 361 | select DMA_ENGINE_RAID |
| 362 | select DCA |
| 363 | help |
| 364 | Enable support for the Intel(R) I/OAT DMA engine present |
| 365 | in recent Intel Xeon chipsets. |
| 366 | |
| 367 | Say Y here if you have such a chipset. |
| 368 | |
| 369 | If unsure, say N. |
| 370 | |
| 371 | config K3_DMA |
| 372 | tristate "Hisilicon K3 DMA support" |
| 373 | depends on ARCH_HISI || COMPILE_TEST |
| 374 | select DMA_ENGINE |
| 375 | select DMA_VIRTUAL_CHANNELS |
| 376 | help |
| 377 | Support the DMA engine for Hisilicon K3 platform |
| 378 | devices. |
| 379 | |
| 380 | config LOONGSON1_APB_DMA |
| 381 | tristate "Loongson1 APB DMA support" |
| 382 | depends on MACH_LOONGSON32 || COMPILE_TEST |
| 383 | select DMA_ENGINE |
| 384 | select DMA_VIRTUAL_CHANNELS |
| 385 | help |
| 386 | This selects support for the APB DMA controller in Loongson1 SoCs, |
| 387 | which is required by Loongson1 NAND and audio support. |
| 388 | |
| 389 | config LOONGSON2_APB_DMA |
| 390 | tristate "Loongson2 APB DMA support" |
| 391 | depends on LOONGARCH || COMPILE_TEST |
| 392 | select DMA_ENGINE |
| 393 | select DMA_VIRTUAL_CHANNELS |
| 394 | help |
| 395 | Support for the Loongson2 APB DMA controller driver. The |
| 396 | DMA controller is having single DMA channel which can be |
| 397 | configured for different peripherals like audio, nand, sdio |
| 398 | etc which is in APB bus. |
| 399 | |
| 400 | This DMA controller transfers data from memory to peripheral fifo. |
| 401 | It does not support memory to memory data transfer. |
| 402 | |
| 403 | config LPC18XX_DMAMUX |
| 404 | bool "NXP LPC18xx/43xx DMA MUX for PL080" |
| 405 | depends on ARCH_LPC18XX || COMPILE_TEST |
| 406 | depends on OF && AMBA_PL08X |
| 407 | select MFD_SYSCON |
| 408 | help |
| 409 | Enable support for DMA on NXP LPC18xx/43xx platforms |
| 410 | with PL080 and multiplexed DMA request lines. |
| 411 | |
| 412 | config LPC32XX_DMAMUX |
| 413 | bool "NXP LPC32xx DMA MUX for PL080" |
| 414 | depends on ARCH_LPC32XX || COMPILE_TEST |
| 415 | depends on OF && AMBA_PL08X |
| 416 | select MFD_SYSCON |
| 417 | help |
| 418 | Support for PL080 multiplexed DMA request lines on |
| 419 | LPC32XX platrofm. |
| 420 | |
| 421 | config MCF_EDMA |
| 422 | tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs" |
| 423 | depends on M5441x || (COMPILE_TEST && FSL_EDMA=n) |
| 424 | select DMA_ENGINE |
| 425 | select DMA_VIRTUAL_CHANNELS |
| 426 | help |
| 427 | Support the Freescale ColdFire eDMA engine, 64-channel |
| 428 | implementation that performs complex data transfers with |
| 429 | minimal intervention from a host processor. |
| 430 | This module can be found on Freescale ColdFire mcf5441x SoCs. |
| 431 | |
| 432 | config MILBEAUT_HDMAC |
| 433 | tristate "Milbeaut AHB DMA support" |
| 434 | depends on ARCH_MILBEAUT || COMPILE_TEST |
| 435 | depends on OF |
| 436 | select DMA_ENGINE |
| 437 | select DMA_VIRTUAL_CHANNELS |
| 438 | help |
| 439 | Say yes here to support the Socionext Milbeaut |
| 440 | HDMAC device. |
| 441 | |
| 442 | config MILBEAUT_XDMAC |
| 443 | tristate "Milbeaut AXI DMA support" |
| 444 | depends on ARCH_MILBEAUT || COMPILE_TEST |
| 445 | depends on OF |
| 446 | select DMA_ENGINE |
| 447 | select DMA_VIRTUAL_CHANNELS |
| 448 | help |
| 449 | Say yes here to support the Socionext Milbeaut |
| 450 | XDMAC device. |
| 451 | |
| 452 | config MMP_PDMA |
| 453 | tristate "MMP PDMA support" |
| 454 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
| 455 | select DMA_ENGINE |
| 456 | help |
| 457 | Support the MMP PDMA engine for PXA and MMP platform. |
| 458 | |
| 459 | config MMP_TDMA |
| 460 | tristate "MMP Two-Channel DMA support" |
| 461 | depends on ARCH_MMP || COMPILE_TEST |
| 462 | select DMA_ENGINE |
| 463 | select GENERIC_ALLOCATOR |
| 464 | help |
| 465 | Support the MMP Two-Channel DMA engine. |
| 466 | This engine used for MMP Audio DMA and pxa910 SQU. |
| 467 | |
| 468 | config MOXART_DMA |
| 469 | tristate "MOXART DMA support" |
| 470 | depends on ARCH_MOXART |
| 471 | select DMA_ENGINE |
| 472 | select DMA_VIRTUAL_CHANNELS |
| 473 | help |
| 474 | Enable support for the MOXA ART SoC DMA controller. |
| 475 | |
| 476 | Say Y here if you enabled MMP ADMA, otherwise say N. |
| 477 | |
| 478 | config MPC512X_DMA |
| 479 | tristate "Freescale MPC512x built-in DMA engine support" |
| 480 | depends on PPC_MPC512x || PPC_MPC831x |
| 481 | select DMA_ENGINE |
| 482 | help |
| 483 | Enable support for the Freescale MPC512x built-in DMA engine. |
| 484 | |
| 485 | config MV_XOR |
| 486 | bool "Marvell XOR engine support" |
| 487 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
| 488 | select DMA_ENGINE |
| 489 | select DMA_ENGINE_RAID |
| 490 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 491 | help |
| 492 | Enable support for the Marvell XOR engine. |
| 493 | |
| 494 | config MV_XOR_V2 |
| 495 | bool "Marvell XOR engine version 2 support " |
| 496 | depends on ARM64 |
| 497 | select DMA_ENGINE |
| 498 | select DMA_ENGINE_RAID |
| 499 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 500 | select GENERIC_MSI_IRQ |
| 501 | help |
| 502 | Enable support for the Marvell version 2 XOR engine. |
| 503 | |
| 504 | This engine provides acceleration for copy, XOR and RAID6 |
| 505 | operations, and is available on Marvell Armada 7K and 8K |
| 506 | platforms. |
| 507 | |
| 508 | config MXS_DMA |
| 509 | bool "MXS DMA support" |
| 510 | depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
| 511 | select STMP_DEVICE |
| 512 | select DMA_ENGINE |
| 513 | help |
| 514 | Support the MXS DMA engine. This engine including APBH-DMA |
| 515 | and APBX-DMA is integrated into some Freescale chips. |
| 516 | |
| 517 | config NBPFAXI_DMA |
| 518 | tristate "Renesas Type-AXI NBPF DMA support" |
| 519 | select DMA_ENGINE |
| 520 | depends on ARM || COMPILE_TEST |
| 521 | help |
| 522 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
| 523 | |
| 524 | config OWL_DMA |
| 525 | tristate "Actions Semi Owl SoCs DMA support" |
| 526 | depends on ARCH_ACTIONS |
| 527 | select DMA_ENGINE |
| 528 | select DMA_VIRTUAL_CHANNELS |
| 529 | help |
| 530 | Enable support for the Actions Semi Owl SoCs DMA controller. |
| 531 | |
| 532 | config PCH_DMA |
| 533 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
| 534 | depends on PCI && (X86_32 || COMPILE_TEST) |
| 535 | select DMA_ENGINE |
| 536 | help |
| 537 | Enable support for Intel EG20T PCH DMA engine. |
| 538 | |
| 539 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
| 540 | Output Hub), ML7213, ML7223 and ML7831. |
| 541 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is |
| 542 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. |
| 543 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. |
| 544 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. |
| 545 | |
| 546 | config PL330_DMA |
| 547 | tristate "DMA API Driver for PL330" |
| 548 | select DMA_ENGINE |
| 549 | depends on ARM_AMBA |
| 550 | help |
| 551 | Select if your platform has one or more PL330 DMACs. |
| 552 | You need to provide platform specific settings via |
| 553 | platform_data for a dma-pl330 device. |
| 554 | |
| 555 | config PXA_DMA |
| 556 | bool "PXA DMA support" |
| 557 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
| 558 | select DMA_ENGINE |
| 559 | select DMA_VIRTUAL_CHANNELS |
| 560 | help |
| 561 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
| 562 | platform. The internal DMA IP of all PXA variants is supported, with |
| 563 | 16 to 32 channels for peripheral to memory or memory to memory |
| 564 | transfers. |
| 565 | |
| 566 | config PLX_DMA |
| 567 | tristate "PLX ExpressLane PEX Switch DMA Engine Support" |
| 568 | depends on PCI |
| 569 | select DMA_ENGINE |
| 570 | help |
| 571 | Some PLX ExpressLane PCI Switches support additional DMA engines. |
| 572 | These are exposed via extra functions on the switch's |
| 573 | upstream port. Each function exposes one DMA channel. |
| 574 | |
| 575 | config STE_DMA40 |
| 576 | bool "ST-Ericsson DMA40 support" |
| 577 | depends on ARCH_U8500 |
| 578 | select DMA_ENGINE |
| 579 | select SRAM |
| 580 | help |
| 581 | Support for ST-Ericsson DMA40 controller |
| 582 | |
| 583 | config ST_FDMA |
| 584 | tristate "ST FDMA dmaengine support" |
| 585 | depends on ARCH_STI |
| 586 | depends on REMOTEPROC |
| 587 | select ST_SLIM_REMOTEPROC |
| 588 | select DMA_ENGINE |
| 589 | select DMA_VIRTUAL_CHANNELS |
| 590 | help |
| 591 | Enable support for ST FDMA controller. |
| 592 | It supports 16 independent DMA channels, accepts up to 32 DMA requests |
| 593 | |
| 594 | Say Y here if you have such a chipset. |
| 595 | If unsure, say N. |
| 596 | |
| 597 | config SPRD_DMA |
| 598 | tristate "Spreadtrum DMA support" |
| 599 | depends on ARCH_SPRD || COMPILE_TEST |
| 600 | select DMA_ENGINE |
| 601 | select DMA_VIRTUAL_CHANNELS |
| 602 | help |
| 603 | Enable support for the on-chip DMA controller on Spreadtrum platform. |
| 604 | |
| 605 | config TXX9_DMAC |
| 606 | tristate "Toshiba TXx9 SoC DMA support" |
| 607 | depends on MACH_TX49XX |
| 608 | select DMA_ENGINE |
| 609 | help |
| 610 | Support the TXx9 SoC internal DMA controller. This can be |
| 611 | integrated in chips such as the Toshiba TX4927/38/39. |
| 612 | |
| 613 | config TEGRA186_GPC_DMA |
| 614 | tristate "NVIDIA Tegra GPC DMA support" |
| 615 | depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT |
| 616 | depends on IOMMU_API |
| 617 | select DMA_ENGINE |
| 618 | select DMA_VIRTUAL_CHANNELS |
| 619 | help |
| 620 | Support for the NVIDIA Tegra General Purpose Central DMA controller. |
| 621 | The DMA controller has multiple DMA channels which can be configured |
| 622 | for different peripherals like UART, SPI, etc which are on APB bus. |
| 623 | This DMA controller transfers data from memory to peripheral FIFO |
| 624 | or vice versa. It also supports memory to memory data transfer. |
| 625 | |
| 626 | config TEGRA20_APB_DMA |
| 627 | tristate "NVIDIA Tegra20 APB DMA support" |
| 628 | depends on ARCH_TEGRA || COMPILE_TEST |
| 629 | select DMA_ENGINE |
| 630 | help |
| 631 | Support for the NVIDIA Tegra20 APB DMA controller driver. The |
| 632 | DMA controller is having multiple DMA channel which can be |
| 633 | configured for different peripherals like audio, UART, SPI, |
| 634 | I2C etc which is in APB bus. |
| 635 | This DMA controller transfers data from memory to peripheral fifo |
| 636 | or vice versa. It does not support memory to memory data transfer. |
| 637 | |
| 638 | config TEGRA210_ADMA |
| 639 | tristate "NVIDIA Tegra210 ADMA support" |
| 640 | depends on (ARCH_TEGRA || COMPILE_TEST) |
| 641 | select DMA_ENGINE |
| 642 | select DMA_VIRTUAL_CHANNELS |
| 643 | help |
| 644 | Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA |
| 645 | controller driver. The DMA controller has multiple DMA channels |
| 646 | and is used to service various audio clients in the Tegra210 |
| 647 | audio processing engine (APE). This DMA controller transfers |
| 648 | data from memory to peripheral and vice versa. It does not |
| 649 | support memory to memory data transfer. |
| 650 | |
| 651 | config TIMB_DMA |
| 652 | tristate "Timberdale FPGA DMA support" |
| 653 | depends on MFD_TIMBERDALE || COMPILE_TEST |
| 654 | select DMA_ENGINE |
| 655 | help |
| 656 | Enable support for the Timberdale FPGA DMA engine. |
| 657 | |
| 658 | config UNIPHIER_MDMAC |
| 659 | tristate "UniPhier MIO DMAC" |
| 660 | depends on ARCH_UNIPHIER || COMPILE_TEST |
| 661 | depends on OF |
| 662 | select DMA_ENGINE |
| 663 | select DMA_VIRTUAL_CHANNELS |
| 664 | help |
| 665 | Enable support for the MIO DMAC (Media I/O DMA controller) on the |
| 666 | UniPhier platform. This DMA controller is used as the external |
| 667 | DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs. |
| 668 | |
| 669 | config UNIPHIER_XDMAC |
| 670 | tristate "UniPhier XDMAC support" |
| 671 | depends on ARCH_UNIPHIER || COMPILE_TEST |
| 672 | depends on OF |
| 673 | select DMA_ENGINE |
| 674 | select DMA_VIRTUAL_CHANNELS |
| 675 | help |
| 676 | Enable support for the XDMAC (external DMA controller) on the |
| 677 | UniPhier platform. This DMA controller can transfer data from |
| 678 | memory to memory, memory to peripheral and peripheral to memory. |
| 679 | |
| 680 | config XGENE_DMA |
| 681 | tristate "APM X-Gene DMA support" |
| 682 | depends on ARCH_XGENE || COMPILE_TEST |
| 683 | select DMA_ENGINE |
| 684 | select DMA_ENGINE_RAID |
| 685 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 686 | help |
| 687 | Enable support for the APM X-Gene SoC DMA engine. |
| 688 | |
| 689 | config XILINX_DMA |
| 690 | tristate "Xilinx AXI DMAS Engine" |
| 691 | depends on HAS_IOMEM |
| 692 | select DMA_ENGINE |
| 693 | help |
| 694 | Enable support for Xilinx AXI VDMA Soft IP. |
| 695 | |
| 696 | AXI VDMA engine provides high-bandwidth direct memory access |
| 697 | between memory and AXI4-Stream video type target |
| 698 | peripherals including peripherals which support AXI4- |
| 699 | Stream Video Protocol. It has two stream interfaces/ |
| 700 | channels, Memory Mapped to Stream (MM2S) and Stream to |
| 701 | Memory Mapped (S2MM) for the data transfers. |
| 702 | AXI CDMA engine provides high-bandwidth direct memory access |
| 703 | between a memory-mapped source address and a memory-mapped |
| 704 | destination address. |
| 705 | AXI DMA engine provides high-bandwidth one dimensional direct |
| 706 | memory access between memory and AXI4-Stream target peripherals. |
| 707 | AXI MCDMA engine provides high-bandwidth direct memory access |
| 708 | between memory and AXI4-Stream target peripherals. It provides |
| 709 | the scatter gather interface with multiple channels independent |
| 710 | configuration support. |
| 711 | |
| 712 | config XILINX_XDMA |
| 713 | tristate "Xilinx DMA/Bridge Subsystem DMA Engine" |
| 714 | depends on HAS_IOMEM |
| 715 | select DMA_ENGINE |
| 716 | select DMA_VIRTUAL_CHANNELS |
| 717 | select REGMAP_MMIO |
| 718 | help |
| 719 | Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA |
| 720 | provides high performance block data movement between Host memory |
| 721 | and the DMA subsystem. These direct memory transfers can be both in |
| 722 | the Host to Card (H2C) and Card to Host (C2H) transfers. |
| 723 | The core also provides up to 16 user interrupt wires that generate |
| 724 | interrupts to the host. |
| 725 | |
| 726 | config XILINX_ZYNQMP_DMA |
| 727 | tristate "Xilinx ZynqMP DMA Engine" |
| 728 | depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST |
| 729 | select DMA_ENGINE |
| 730 | help |
| 731 | Enable support for Xilinx ZynqMP DMA controller. |
| 732 | |
| 733 | config XILINX_ZYNQMP_DPDMA |
| 734 | tristate "Xilinx DPDMA Engine" |
| 735 | depends on HAS_IOMEM && OF |
| 736 | select DMA_ENGINE |
| 737 | select DMA_VIRTUAL_CHANNELS |
| 738 | help |
| 739 | Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option |
| 740 | if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The |
| 741 | driver provides the dmaengine required by the DisplayPort subsystem |
| 742 | display driver. |
| 743 | |
| 744 | # driver files |
| 745 | source "drivers/dma/amd/Kconfig" |
| 746 | |
| 747 | source "drivers/dma/bestcomm/Kconfig" |
| 748 | |
| 749 | source "drivers/dma/mediatek/Kconfig" |
| 750 | |
| 751 | source "drivers/dma/qcom/Kconfig" |
| 752 | |
| 753 | source "drivers/dma/dw/Kconfig" |
| 754 | |
| 755 | source "drivers/dma/dw-edma/Kconfig" |
| 756 | |
| 757 | source "drivers/dma/hsu/Kconfig" |
| 758 | |
| 759 | source "drivers/dma/sf-pdma/Kconfig" |
| 760 | |
| 761 | source "drivers/dma/sh/Kconfig" |
| 762 | |
| 763 | source "drivers/dma/ti/Kconfig" |
| 764 | |
| 765 | source "drivers/dma/fsl-dpaa2-qdma/Kconfig" |
| 766 | |
| 767 | source "drivers/dma/lgm/Kconfig" |
| 768 | |
| 769 | source "drivers/dma/stm32/Kconfig" |
| 770 | |
| 771 | # clients |
| 772 | comment "DMA Clients" |
| 773 | depends on DMA_ENGINE |
| 774 | |
| 775 | config ASYNC_TX_DMA |
| 776 | bool "Async_tx: Offload support for the async_tx api" |
| 777 | depends on DMA_ENGINE |
| 778 | help |
| 779 | This allows the async_tx api to take advantage of offload engines for |
| 780 | memcpy, memset, xor, and raid6 p+q operations. If your platform has |
| 781 | a dma engine that can perform raid operations and you have enabled |
| 782 | MD_RAID456 say Y. |
| 783 | |
| 784 | If unsure, say N. |
| 785 | |
| 786 | config DMATEST |
| 787 | tristate "DMA Test client" |
| 788 | depends on DMA_ENGINE |
| 789 | select DMA_ENGINE_RAID |
| 790 | help |
| 791 | Simple DMA test client. Say N unless you're debugging a |
| 792 | DMA Device driver. |
| 793 | |
| 794 | config DMA_ENGINE_RAID |
| 795 | bool |
| 796 | |
| 797 | endif |