| 1 | /* |
| 2 | * Copyright (C) 2014-2017 Broadcom |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/types.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/sysfs.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/string.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/list.h> |
| 24 | #include <linux/of.h> |
| 25 | #include <linux/bitops.h> |
| 26 | #include <linux/pm.h> |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/kdebug.h> |
| 29 | #include <linux/notifier.h> |
| 30 | |
| 31 | #ifdef CONFIG_MIPS |
| 32 | #include <asm/traps.h> |
| 33 | #endif |
| 34 | |
| 35 | #define ARB_ERR_CAP_CLEAR (1 << 0) |
| 36 | #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12) |
| 37 | #define ARB_ERR_CAP_STATUS_TEA (1 << 11) |
| 38 | #define ARB_ERR_CAP_STATUS_WRITE (1 << 1) |
| 39 | #define ARB_ERR_CAP_STATUS_VALID (1 << 0) |
| 40 | |
| 41 | enum { |
| 42 | ARB_TIMER, |
| 43 | ARB_ERR_CAP_CLR, |
| 44 | ARB_ERR_CAP_HI_ADDR, |
| 45 | ARB_ERR_CAP_ADDR, |
| 46 | ARB_ERR_CAP_STATUS, |
| 47 | ARB_ERR_CAP_MASTER, |
| 48 | }; |
| 49 | |
| 50 | static const int gisb_offsets_bcm7038[] = { |
| 51 | [ARB_TIMER] = 0x00c, |
| 52 | [ARB_ERR_CAP_CLR] = 0x0c4, |
| 53 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 54 | [ARB_ERR_CAP_ADDR] = 0x0c8, |
| 55 | [ARB_ERR_CAP_STATUS] = 0x0d0, |
| 56 | [ARB_ERR_CAP_MASTER] = -1, |
| 57 | }; |
| 58 | |
| 59 | static const int gisb_offsets_bcm7400[] = { |
| 60 | [ARB_TIMER] = 0x00c, |
| 61 | [ARB_ERR_CAP_CLR] = 0x0c8, |
| 62 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 63 | [ARB_ERR_CAP_ADDR] = 0x0cc, |
| 64 | [ARB_ERR_CAP_STATUS] = 0x0d4, |
| 65 | [ARB_ERR_CAP_MASTER] = 0x0d8, |
| 66 | }; |
| 67 | |
| 68 | static const int gisb_offsets_bcm7435[] = { |
| 69 | [ARB_TIMER] = 0x00c, |
| 70 | [ARB_ERR_CAP_CLR] = 0x168, |
| 71 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 72 | [ARB_ERR_CAP_ADDR] = 0x16c, |
| 73 | [ARB_ERR_CAP_STATUS] = 0x174, |
| 74 | [ARB_ERR_CAP_MASTER] = 0x178, |
| 75 | }; |
| 76 | |
| 77 | static const int gisb_offsets_bcm7445[] = { |
| 78 | [ARB_TIMER] = 0x008, |
| 79 | [ARB_ERR_CAP_CLR] = 0x7e4, |
| 80 | [ARB_ERR_CAP_HI_ADDR] = 0x7e8, |
| 81 | [ARB_ERR_CAP_ADDR] = 0x7ec, |
| 82 | [ARB_ERR_CAP_STATUS] = 0x7f4, |
| 83 | [ARB_ERR_CAP_MASTER] = 0x7f8, |
| 84 | }; |
| 85 | |
| 86 | struct brcmstb_gisb_arb_device { |
| 87 | void __iomem *base; |
| 88 | const int *gisb_offsets; |
| 89 | bool big_endian; |
| 90 | struct mutex lock; |
| 91 | struct list_head next; |
| 92 | u32 valid_mask; |
| 93 | const char *master_names[sizeof(u32) * BITS_PER_BYTE]; |
| 94 | u32 saved_timeout; |
| 95 | }; |
| 96 | |
| 97 | static LIST_HEAD(brcmstb_gisb_arb_device_list); |
| 98 | |
| 99 | static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) |
| 100 | { |
| 101 | int offset = gdev->gisb_offsets[reg]; |
| 102 | |
| 103 | if (offset < 0) { |
| 104 | /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */ |
| 105 | if (reg == ARB_ERR_CAP_MASTER) |
| 106 | return 1; |
| 107 | else |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | if (gdev->big_endian) |
| 112 | return ioread32be(gdev->base + offset); |
| 113 | else |
| 114 | return ioread32(gdev->base + offset); |
| 115 | } |
| 116 | |
| 117 | static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev) |
| 118 | { |
| 119 | u64 value; |
| 120 | |
| 121 | value = gisb_read(gdev, ARB_ERR_CAP_ADDR); |
| 122 | value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32; |
| 123 | |
| 124 | return value; |
| 125 | } |
| 126 | |
| 127 | static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) |
| 128 | { |
| 129 | int offset = gdev->gisb_offsets[reg]; |
| 130 | |
| 131 | if (offset == -1) |
| 132 | return; |
| 133 | |
| 134 | if (gdev->big_endian) |
| 135 | iowrite32be(val, gdev->base + offset); |
| 136 | else |
| 137 | iowrite32(val, gdev->base + offset); |
| 138 | } |
| 139 | |
| 140 | static ssize_t gisb_arb_get_timeout(struct device *dev, |
| 141 | struct device_attribute *attr, |
| 142 | char *buf) |
| 143 | { |
| 144 | struct platform_device *pdev = to_platform_device(dev); |
| 145 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 146 | u32 timeout; |
| 147 | |
| 148 | mutex_lock(&gdev->lock); |
| 149 | timeout = gisb_read(gdev, ARB_TIMER); |
| 150 | mutex_unlock(&gdev->lock); |
| 151 | |
| 152 | return sprintf(buf, "%d", timeout); |
| 153 | } |
| 154 | |
| 155 | static ssize_t gisb_arb_set_timeout(struct device *dev, |
| 156 | struct device_attribute *attr, |
| 157 | const char *buf, size_t count) |
| 158 | { |
| 159 | struct platform_device *pdev = to_platform_device(dev); |
| 160 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 161 | int val, ret; |
| 162 | |
| 163 | ret = kstrtoint(buf, 10, &val); |
| 164 | if (ret < 0) |
| 165 | return ret; |
| 166 | |
| 167 | if (val == 0 || val >= 0xffffffff) |
| 168 | return -EINVAL; |
| 169 | |
| 170 | mutex_lock(&gdev->lock); |
| 171 | gisb_write(gdev, val, ARB_TIMER); |
| 172 | mutex_unlock(&gdev->lock); |
| 173 | |
| 174 | return count; |
| 175 | } |
| 176 | |
| 177 | static const char * |
| 178 | brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev, |
| 179 | u32 masters) |
| 180 | { |
| 181 | u32 mask = gdev->valid_mask & masters; |
| 182 | |
| 183 | if (hweight_long(mask) != 1) |
| 184 | return NULL; |
| 185 | |
| 186 | return gdev->master_names[ffs(mask) - 1]; |
| 187 | } |
| 188 | |
| 189 | static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev, |
| 190 | const char *reason) |
| 191 | { |
| 192 | u32 cap_status; |
| 193 | u64 arb_addr; |
| 194 | u32 master; |
| 195 | const char *m_name; |
| 196 | char m_fmt[11]; |
| 197 | |
| 198 | cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); |
| 199 | |
| 200 | /* Invalid captured address, bail out */ |
| 201 | if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) |
| 202 | return 1; |
| 203 | |
| 204 | /* Read the address and master */ |
| 205 | arb_addr = gisb_read_address(gdev); |
| 206 | master = gisb_read(gdev, ARB_ERR_CAP_MASTER); |
| 207 | |
| 208 | m_name = brcmstb_gisb_master_to_str(gdev, master); |
| 209 | if (!m_name) { |
| 210 | snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master); |
| 211 | m_name = m_fmt; |
| 212 | } |
| 213 | |
| 214 | pr_crit("%s: %s at 0x%llx [%c %s], core: %s\n", |
| 215 | __func__, reason, arb_addr, |
| 216 | cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R', |
| 217 | cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "", |
| 218 | m_name); |
| 219 | |
| 220 | /* clear the GISB error */ |
| 221 | gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR); |
| 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | |
| 226 | #ifdef CONFIG_MIPS |
| 227 | static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup) |
| 228 | { |
| 229 | int ret = 0; |
| 230 | struct brcmstb_gisb_arb_device *gdev; |
| 231 | u32 cap_status; |
| 232 | |
| 233 | list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) { |
| 234 | cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); |
| 235 | |
| 236 | /* Invalid captured address, bail out */ |
| 237 | if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) { |
| 238 | is_fixup = 1; |
| 239 | goto out; |
| 240 | } |
| 241 | |
| 242 | ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error"); |
| 243 | } |
| 244 | out: |
| 245 | return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL; |
| 246 | } |
| 247 | #endif |
| 248 | |
| 249 | static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) |
| 250 | { |
| 251 | brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); |
| 252 | |
| 253 | return IRQ_HANDLED; |
| 254 | } |
| 255 | |
| 256 | static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id) |
| 257 | { |
| 258 | brcmstb_gisb_arb_decode_addr(dev_id, "target abort"); |
| 259 | |
| 260 | return IRQ_HANDLED; |
| 261 | } |
| 262 | |
| 263 | /* |
| 264 | * Dump out gisb errors on die or panic. |
| 265 | */ |
| 266 | static int dump_gisb_error(struct notifier_block *self, unsigned long v, |
| 267 | void *p); |
| 268 | |
| 269 | static struct notifier_block gisb_die_notifier = { |
| 270 | .notifier_call = dump_gisb_error, |
| 271 | }; |
| 272 | |
| 273 | static struct notifier_block gisb_panic_notifier = { |
| 274 | .notifier_call = dump_gisb_error, |
| 275 | }; |
| 276 | |
| 277 | static int dump_gisb_error(struct notifier_block *self, unsigned long v, |
| 278 | void *p) |
| 279 | { |
| 280 | struct brcmstb_gisb_arb_device *gdev; |
| 281 | const char *reason = "panic"; |
| 282 | |
| 283 | if (self == &gisb_die_notifier) |
| 284 | reason = "die"; |
| 285 | |
| 286 | /* iterate over each GISB arb registered handlers */ |
| 287 | list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) |
| 288 | brcmstb_gisb_arb_decode_addr(gdev, reason); |
| 289 | |
| 290 | return NOTIFY_DONE; |
| 291 | } |
| 292 | |
| 293 | static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO, |
| 294 | gisb_arb_get_timeout, gisb_arb_set_timeout); |
| 295 | |
| 296 | static struct attribute *gisb_arb_sysfs_attrs[] = { |
| 297 | &dev_attr_gisb_arb_timeout.attr, |
| 298 | NULL, |
| 299 | }; |
| 300 | |
| 301 | static struct attribute_group gisb_arb_sysfs_attr_group = { |
| 302 | .attrs = gisb_arb_sysfs_attrs, |
| 303 | }; |
| 304 | |
| 305 | static const struct of_device_id brcmstb_gisb_arb_of_match[] = { |
| 306 | { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 }, |
| 307 | { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 }, |
| 308 | { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 }, |
| 309 | { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 }, |
| 310 | { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 }, |
| 311 | { }, |
| 312 | }; |
| 313 | |
| 314 | static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) |
| 315 | { |
| 316 | struct device_node *dn = pdev->dev.of_node; |
| 317 | struct brcmstb_gisb_arb_device *gdev; |
| 318 | const struct of_device_id *of_id; |
| 319 | struct resource *r; |
| 320 | int err, timeout_irq, tea_irq; |
| 321 | unsigned int num_masters, j = 0; |
| 322 | int i, first, last; |
| 323 | |
| 324 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 325 | timeout_irq = platform_get_irq(pdev, 0); |
| 326 | tea_irq = platform_get_irq(pdev, 1); |
| 327 | |
| 328 | gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL); |
| 329 | if (!gdev) |
| 330 | return -ENOMEM; |
| 331 | |
| 332 | mutex_init(&gdev->lock); |
| 333 | INIT_LIST_HEAD(&gdev->next); |
| 334 | |
| 335 | gdev->base = devm_ioremap_resource(&pdev->dev, r); |
| 336 | if (IS_ERR(gdev->base)) |
| 337 | return PTR_ERR(gdev->base); |
| 338 | |
| 339 | of_id = of_match_node(brcmstb_gisb_arb_of_match, dn); |
| 340 | if (!of_id) { |
| 341 | pr_err("failed to look up compatible string\n"); |
| 342 | return -EINVAL; |
| 343 | } |
| 344 | gdev->gisb_offsets = of_id->data; |
| 345 | gdev->big_endian = of_device_is_big_endian(dn); |
| 346 | |
| 347 | err = devm_request_irq(&pdev->dev, timeout_irq, |
| 348 | brcmstb_gisb_timeout_handler, 0, pdev->name, |
| 349 | gdev); |
| 350 | if (err < 0) |
| 351 | return err; |
| 352 | |
| 353 | err = devm_request_irq(&pdev->dev, tea_irq, |
| 354 | brcmstb_gisb_tea_handler, 0, pdev->name, |
| 355 | gdev); |
| 356 | if (err < 0) |
| 357 | return err; |
| 358 | |
| 359 | /* If we do not have a valid mask, assume all masters are enabled */ |
| 360 | if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask", |
| 361 | &gdev->valid_mask)) |
| 362 | gdev->valid_mask = 0xffffffff; |
| 363 | |
| 364 | /* Proceed with reading the litteral names if we agree on the |
| 365 | * number of masters |
| 366 | */ |
| 367 | num_masters = of_property_count_strings(dn, |
| 368 | "brcm,gisb-arb-master-names"); |
| 369 | if (hweight_long(gdev->valid_mask) == num_masters) { |
| 370 | first = ffs(gdev->valid_mask) - 1; |
| 371 | last = fls(gdev->valid_mask) - 1; |
| 372 | |
| 373 | for (i = first; i < last; i++) { |
| 374 | if (!(gdev->valid_mask & BIT(i))) |
| 375 | continue; |
| 376 | |
| 377 | of_property_read_string_index(dn, |
| 378 | "brcm,gisb-arb-master-names", j, |
| 379 | &gdev->master_names[i]); |
| 380 | j++; |
| 381 | } |
| 382 | } |
| 383 | |
| 384 | err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group); |
| 385 | if (err) |
| 386 | return err; |
| 387 | |
| 388 | platform_set_drvdata(pdev, gdev); |
| 389 | |
| 390 | list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); |
| 391 | |
| 392 | #ifdef CONFIG_MIPS |
| 393 | board_be_handler = brcmstb_bus_error_handler; |
| 394 | #endif |
| 395 | |
| 396 | if (list_is_singular(&brcmstb_gisb_arb_device_list)) { |
| 397 | register_die_notifier(&gisb_die_notifier); |
| 398 | atomic_notifier_chain_register(&panic_notifier_list, |
| 399 | &gisb_panic_notifier); |
| 400 | } |
| 401 | |
| 402 | dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n", |
| 403 | gdev->base, timeout_irq, tea_irq); |
| 404 | |
| 405 | return 0; |
| 406 | } |
| 407 | |
| 408 | #ifdef CONFIG_PM_SLEEP |
| 409 | static int brcmstb_gisb_arb_suspend(struct device *dev) |
| 410 | { |
| 411 | struct platform_device *pdev = to_platform_device(dev); |
| 412 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 413 | |
| 414 | gdev->saved_timeout = gisb_read(gdev, ARB_TIMER); |
| 415 | |
| 416 | return 0; |
| 417 | } |
| 418 | |
| 419 | /* Make sure we provide the same timeout value that was configured before, and |
| 420 | * do this before the GISB timeout interrupt handler has any chance to run. |
| 421 | */ |
| 422 | static int brcmstb_gisb_arb_resume_noirq(struct device *dev) |
| 423 | { |
| 424 | struct platform_device *pdev = to_platform_device(dev); |
| 425 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 426 | |
| 427 | gisb_write(gdev, gdev->saved_timeout, ARB_TIMER); |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | #else |
| 432 | #define brcmstb_gisb_arb_suspend NULL |
| 433 | #define brcmstb_gisb_arb_resume_noirq NULL |
| 434 | #endif |
| 435 | |
| 436 | static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = { |
| 437 | .suspend = brcmstb_gisb_arb_suspend, |
| 438 | .resume_noirq = brcmstb_gisb_arb_resume_noirq, |
| 439 | }; |
| 440 | |
| 441 | static struct platform_driver brcmstb_gisb_arb_driver = { |
| 442 | .driver = { |
| 443 | .name = "brcm-gisb-arb", |
| 444 | .of_match_table = brcmstb_gisb_arb_of_match, |
| 445 | .pm = &brcmstb_gisb_arb_pm_ops, |
| 446 | }, |
| 447 | }; |
| 448 | |
| 449 | static int __init brcm_gisb_driver_init(void) |
| 450 | { |
| 451 | return platform_driver_probe(&brcmstb_gisb_arb_driver, |
| 452 | brcmstb_gisb_arb_probe); |
| 453 | } |
| 454 | |
| 455 | module_init(brcm_gisb_driver_init); |