| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* |
| 3 | * |
| 4 | * Bluetooth support for Intel devices |
| 5 | * |
| 6 | * Copyright (C) 2015 Intel Corporation |
| 7 | */ |
| 8 | |
| 9 | /* List of tlv type */ |
| 10 | enum { |
| 11 | INTEL_TLV_CNVI_TOP = 0x10, |
| 12 | INTEL_TLV_CNVR_TOP, |
| 13 | INTEL_TLV_CNVI_BT, |
| 14 | INTEL_TLV_CNVR_BT, |
| 15 | INTEL_TLV_CNVI_OTP, |
| 16 | INTEL_TLV_CNVR_OTP, |
| 17 | INTEL_TLV_DEV_REV_ID, |
| 18 | INTEL_TLV_USB_VENDOR_ID, |
| 19 | INTEL_TLV_USB_PRODUCT_ID, |
| 20 | INTEL_TLV_PCIE_VENDOR_ID, |
| 21 | INTEL_TLV_PCIE_DEVICE_ID, |
| 22 | INTEL_TLV_PCIE_SUBSYSTEM_ID, |
| 23 | INTEL_TLV_IMAGE_TYPE, |
| 24 | INTEL_TLV_TIME_STAMP, |
| 25 | INTEL_TLV_BUILD_TYPE, |
| 26 | INTEL_TLV_BUILD_NUM, |
| 27 | INTEL_TLV_FW_BUILD_PRODUCT, |
| 28 | INTEL_TLV_FW_BUILD_HW, |
| 29 | INTEL_TLV_FW_STEP, |
| 30 | INTEL_TLV_BT_SPEC, |
| 31 | INTEL_TLV_MFG_NAME, |
| 32 | INTEL_TLV_HCI_REV, |
| 33 | INTEL_TLV_LMP_SUBVER, |
| 34 | INTEL_TLV_OTP_PATCH_VER, |
| 35 | INTEL_TLV_SECURE_BOOT, |
| 36 | INTEL_TLV_KEY_FROM_HDR, |
| 37 | INTEL_TLV_OTP_LOCK, |
| 38 | INTEL_TLV_API_LOCK, |
| 39 | INTEL_TLV_DEBUG_LOCK, |
| 40 | INTEL_TLV_MIN_FW, |
| 41 | INTEL_TLV_LIMITED_CCE, |
| 42 | INTEL_TLV_SBE_TYPE, |
| 43 | INTEL_TLV_OTP_BDADDR, |
| 44 | INTEL_TLV_UNLOCKED_STATE, |
| 45 | INTEL_TLV_GIT_SHA1, |
| 46 | INTEL_TLV_FW_ID = 0x50 |
| 47 | }; |
| 48 | |
| 49 | struct intel_tlv { |
| 50 | u8 type; |
| 51 | u8 len; |
| 52 | u8 val[]; |
| 53 | } __packed; |
| 54 | |
| 55 | #define BTINTEL_CNVI_BLAZARI 0x900 |
| 56 | #define BTINTEL_CNVI_BLAZARIW 0x901 |
| 57 | #define BTINTEL_CNVI_GAP 0x910 |
| 58 | #define BTINTEL_CNVI_BLAZARU 0x930 |
| 59 | #define BTINTEL_CNVI_SCP 0xA00 |
| 60 | |
| 61 | /* CNVR */ |
| 62 | #define BTINTEL_CNVR_FMP2 0x910 |
| 63 | |
| 64 | #define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */ |
| 65 | #define BTINTEL_IMG_IML 0x02 /* Intermediate image */ |
| 66 | #define BTINTEL_IMG_OP 0x03 /* Operational image */ |
| 67 | |
| 68 | #define BTINTEL_FWID_MAXLEN 64 |
| 69 | |
| 70 | struct intel_version_tlv { |
| 71 | u32 cnvi_top; |
| 72 | u32 cnvr_top; |
| 73 | u32 cnvi_bt; |
| 74 | u32 cnvr_bt; |
| 75 | u16 dev_rev_id; |
| 76 | u8 img_type; |
| 77 | u16 timestamp; |
| 78 | u8 build_type; |
| 79 | u32 build_num; |
| 80 | u8 secure_boot; |
| 81 | u8 otp_lock; |
| 82 | u8 api_lock; |
| 83 | u8 debug_lock; |
| 84 | u8 min_fw_build_nn; |
| 85 | u8 min_fw_build_cw; |
| 86 | u8 min_fw_build_yy; |
| 87 | u8 limited_cce; |
| 88 | u8 sbe_type; |
| 89 | u32 git_sha1; |
| 90 | u8 fw_id[BTINTEL_FWID_MAXLEN]; |
| 91 | bdaddr_t otp_bd_addr; |
| 92 | }; |
| 93 | |
| 94 | struct intel_version { |
| 95 | u8 status; |
| 96 | u8 hw_platform; |
| 97 | u8 hw_variant; |
| 98 | u8 hw_revision; |
| 99 | u8 fw_variant; |
| 100 | u8 fw_revision; |
| 101 | u8 fw_build_num; |
| 102 | u8 fw_build_ww; |
| 103 | u8 fw_build_yy; |
| 104 | u8 fw_patch_num; |
| 105 | } __packed; |
| 106 | |
| 107 | struct intel_boot_params { |
| 108 | __u8 status; |
| 109 | __u8 otp_format; |
| 110 | __u8 otp_content; |
| 111 | __u8 otp_patch; |
| 112 | __le16 dev_revid; |
| 113 | __u8 secure_boot; |
| 114 | __u8 key_from_hdr; |
| 115 | __u8 key_type; |
| 116 | __u8 otp_lock; |
| 117 | __u8 api_lock; |
| 118 | __u8 debug_lock; |
| 119 | bdaddr_t otp_bdaddr; |
| 120 | __u8 min_fw_build_nn; |
| 121 | __u8 min_fw_build_cw; |
| 122 | __u8 min_fw_build_yy; |
| 123 | __u8 limited_cce; |
| 124 | __u8 unlocked_state; |
| 125 | } __packed; |
| 126 | |
| 127 | struct intel_bootup { |
| 128 | __u8 zero; |
| 129 | __u8 num_cmds; |
| 130 | __u8 source; |
| 131 | __u8 reset_type; |
| 132 | __u8 reset_reason; |
| 133 | __u8 ddc_status; |
| 134 | } __packed; |
| 135 | |
| 136 | struct intel_secure_send_result { |
| 137 | __u8 result; |
| 138 | __le16 opcode; |
| 139 | __u8 status; |
| 140 | } __packed; |
| 141 | |
| 142 | struct intel_reset { |
| 143 | __u8 reset_type; |
| 144 | __u8 patch_enable; |
| 145 | __u8 ddc_reload; |
| 146 | __u8 boot_option; |
| 147 | __le32 boot_param; |
| 148 | } __packed; |
| 149 | |
| 150 | struct intel_debug_features { |
| 151 | __u8 page1[16]; |
| 152 | } __packed; |
| 153 | |
| 154 | struct intel_offload_use_cases { |
| 155 | __u8 status; |
| 156 | __u8 preset[8]; |
| 157 | } __packed; |
| 158 | |
| 159 | #define INTEL_OP_PPAG_CMD 0xFE0B |
| 160 | struct hci_ppag_enable_cmd { |
| 161 | __le32 ppag_enable_flags; |
| 162 | } __packed; |
| 163 | |
| 164 | #define INTEL_TLV_TYPE_ID 0x01 |
| 165 | |
| 166 | #define INTEL_TLV_SYSTEM_EXCEPTION 0x00 |
| 167 | #define INTEL_TLV_FATAL_EXCEPTION 0x01 |
| 168 | #define INTEL_TLV_DEBUG_EXCEPTION 0x02 |
| 169 | #define INTEL_TLV_TEST_EXCEPTION 0xDE |
| 170 | |
| 171 | struct btintel_cp_ddc_write { |
| 172 | u8 len; |
| 173 | __le16 id; |
| 174 | u8 data[]; |
| 175 | } __packed; |
| 176 | |
| 177 | /* Bluetooth SAR feature (BRDS), Revision 1 */ |
| 178 | struct btintel_sar_inc_pwr { |
| 179 | u8 revision; |
| 180 | u32 bt_sar_bios; /* Mode of SAR control to be used, 1:enabled in bios */ |
| 181 | u32 inc_power_mode; /* Increased power mode */ |
| 182 | u8 sar_2400_chain_a; /* Sar power restriction LB */ |
| 183 | u8 br; |
| 184 | u8 edr2; |
| 185 | u8 edr3; |
| 186 | u8 le; |
| 187 | u8 le_2mhz; |
| 188 | u8 le_lr; |
| 189 | }; |
| 190 | |
| 191 | #define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8)) |
| 192 | #define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16)) |
| 193 | #define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff) |
| 194 | #define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24) |
| 195 | #define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) | (s)))) |
| 196 | |
| 197 | enum { |
| 198 | INTEL_BOOTLOADER, |
| 199 | INTEL_DOWNLOADING, |
| 200 | INTEL_FIRMWARE_LOADED, |
| 201 | INTEL_FIRMWARE_FAILED, |
| 202 | INTEL_BOOTING, |
| 203 | INTEL_BROKEN_INITIAL_NCMD, |
| 204 | INTEL_BROKEN_SHUTDOWN_LED, |
| 205 | INTEL_ROM_LEGACY, |
| 206 | INTEL_ROM_LEGACY_NO_WBS_SUPPORT, |
| 207 | INTEL_ACPI_RESET_ACTIVE, |
| 208 | INTEL_WAIT_FOR_D0, |
| 209 | |
| 210 | __INTEL_NUM_FLAGS, |
| 211 | }; |
| 212 | |
| 213 | struct btintel_data { |
| 214 | DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS); |
| 215 | int (*acpi_reset_method)(struct hci_dev *hdev); |
| 216 | }; |
| 217 | |
| 218 | #define btintel_set_flag(hdev, nr) \ |
| 219 | do { \ |
| 220 | struct btintel_data *intel = hci_get_priv((hdev)); \ |
| 221 | set_bit((nr), intel->flags); \ |
| 222 | } while (0) |
| 223 | |
| 224 | #define btintel_clear_flag(hdev, nr) \ |
| 225 | do { \ |
| 226 | struct btintel_data *intel = hci_get_priv((hdev)); \ |
| 227 | clear_bit((nr), intel->flags); \ |
| 228 | } while (0) |
| 229 | |
| 230 | #define btintel_wake_up_flag(hdev, nr) \ |
| 231 | do { \ |
| 232 | struct btintel_data *intel = hci_get_priv((hdev)); \ |
| 233 | wake_up_bit(intel->flags, (nr)); \ |
| 234 | } while (0) |
| 235 | |
| 236 | #define btintel_get_flag(hdev) \ |
| 237 | (((struct btintel_data *)hci_get_priv(hdev))->flags) |
| 238 | |
| 239 | #define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev)) |
| 240 | #define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev)) |
| 241 | #define btintel_wait_on_flag_timeout(hdev, nr, m, to) \ |
| 242 | wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to) |
| 243 | |
| 244 | #if IS_ENABLED(CONFIG_BT_INTEL) || IS_ENABLED(CONFIG_BT_INTEL_PCIE) |
| 245 | |
| 246 | int btintel_check_bdaddr(struct hci_dev *hdev); |
| 247 | int btintel_enter_mfg(struct hci_dev *hdev); |
| 248 | int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched); |
| 249 | int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); |
| 250 | int btintel_set_diag(struct hci_dev *hdev, bool enable); |
| 251 | |
| 252 | int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver); |
| 253 | int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name); |
| 254 | int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug); |
| 255 | int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver); |
| 256 | struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read, |
| 257 | u16 opcode_write); |
| 258 | int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param); |
| 259 | int btintel_read_boot_params(struct hci_dev *hdev, |
| 260 | struct intel_boot_params *params); |
| 261 | int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver, |
| 262 | const struct firmware *fw, u32 *boot_param); |
| 263 | int btintel_configure_setup(struct hci_dev *hdev, const char *driver_name); |
| 264 | int btintel_recv_event(struct hci_dev *hdev, struct sk_buff *skb); |
| 265 | void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len); |
| 266 | void btintel_secure_send_result(struct hci_dev *hdev, |
| 267 | const void *ptr, unsigned int len); |
| 268 | int btintel_set_quality_report(struct hci_dev *hdev, bool enable); |
| 269 | int btintel_version_info_tlv(struct hci_dev *hdev, |
| 270 | struct intel_version_tlv *version); |
| 271 | int btintel_parse_version_tlv(struct hci_dev *hdev, |
| 272 | struct intel_version_tlv *version, |
| 273 | struct sk_buff *skb); |
| 274 | void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant); |
| 275 | int btintel_bootloader_setup_tlv(struct hci_dev *hdev, |
| 276 | struct intel_version_tlv *ver); |
| 277 | int btintel_shutdown_combined(struct hci_dev *hdev); |
| 278 | void btintel_hw_error(struct hci_dev *hdev, u8 code); |
| 279 | void btintel_print_fseq_info(struct hci_dev *hdev); |
| 280 | #else |
| 281 | |
| 282 | static inline int btintel_check_bdaddr(struct hci_dev *hdev) |
| 283 | { |
| 284 | return -EOPNOTSUPP; |
| 285 | } |
| 286 | |
| 287 | static inline int btintel_enter_mfg(struct hci_dev *hdev) |
| 288 | { |
| 289 | return -EOPNOTSUPP; |
| 290 | } |
| 291 | |
| 292 | static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched) |
| 293 | { |
| 294 | return -EOPNOTSUPP; |
| 295 | } |
| 296 | |
| 297 | static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) |
| 298 | { |
| 299 | return -EOPNOTSUPP; |
| 300 | } |
| 301 | |
| 302 | static inline int btintel_set_diag(struct hci_dev *hdev, bool enable) |
| 303 | { |
| 304 | return -EOPNOTSUPP; |
| 305 | } |
| 306 | |
| 307 | static inline int btintel_version_info(struct hci_dev *hdev, |
| 308 | struct intel_version *ver) |
| 309 | { |
| 310 | return -EOPNOTSUPP; |
| 311 | } |
| 312 | |
| 313 | static inline int btintel_load_ddc_config(struct hci_dev *hdev, |
| 314 | const char *ddc_name) |
| 315 | { |
| 316 | return -EOPNOTSUPP; |
| 317 | } |
| 318 | |
| 319 | static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug) |
| 320 | { |
| 321 | return -EOPNOTSUPP; |
| 322 | } |
| 323 | |
| 324 | static inline int btintel_read_version(struct hci_dev *hdev, |
| 325 | struct intel_version *ver) |
| 326 | { |
| 327 | return -EOPNOTSUPP; |
| 328 | } |
| 329 | |
| 330 | static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev, |
| 331 | u16 opcode_read, |
| 332 | u16 opcode_write) |
| 333 | { |
| 334 | return ERR_PTR(-EINVAL); |
| 335 | } |
| 336 | |
| 337 | static inline int btintel_send_intel_reset(struct hci_dev *hdev, |
| 338 | u32 reset_param) |
| 339 | { |
| 340 | return -EOPNOTSUPP; |
| 341 | } |
| 342 | |
| 343 | static inline int btintel_read_boot_params(struct hci_dev *hdev, |
| 344 | struct intel_boot_params *params) |
| 345 | { |
| 346 | return -EOPNOTSUPP; |
| 347 | } |
| 348 | |
| 349 | static inline int btintel_download_firmware(struct hci_dev *dev, |
| 350 | const struct firmware *fw, |
| 351 | u32 *boot_param) |
| 352 | { |
| 353 | return -EOPNOTSUPP; |
| 354 | } |
| 355 | |
| 356 | static inline int btintel_configure_setup(struct hci_dev *hdev, |
| 357 | const char *driver_name) |
| 358 | { |
| 359 | return -ENODEV; |
| 360 | } |
| 361 | |
| 362 | static inline void btintel_bootup(struct hci_dev *hdev, |
| 363 | const void *ptr, unsigned int len) |
| 364 | { |
| 365 | } |
| 366 | |
| 367 | static inline void btintel_secure_send_result(struct hci_dev *hdev, |
| 368 | const void *ptr, unsigned int len) |
| 369 | { |
| 370 | } |
| 371 | |
| 372 | static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable) |
| 373 | { |
| 374 | return -ENODEV; |
| 375 | } |
| 376 | |
| 377 | static inline int btintel_version_info_tlv(struct hci_dev *hdev, |
| 378 | struct intel_version_tlv *version) |
| 379 | { |
| 380 | return -EOPNOTSUPP; |
| 381 | } |
| 382 | |
| 383 | static inline int btintel_parse_version_tlv(struct hci_dev *hdev, |
| 384 | struct intel_version_tlv *version, |
| 385 | struct sk_buff *skb) |
| 386 | { |
| 387 | return -EOPNOTSUPP; |
| 388 | } |
| 389 | |
| 390 | static inline void btintel_set_msft_opcode(struct hci_dev *hdev, u8 hw_variant) |
| 391 | |
| 392 | { |
| 393 | } |
| 394 | |
| 395 | static inline int btintel_bootloader_setup_tlv(struct hci_dev *hdev, |
| 396 | struct intel_version_tlv *ver) |
| 397 | { |
| 398 | return -ENODEV; |
| 399 | } |
| 400 | |
| 401 | static inline int btintel_shutdown_combined(struct hci_dev *hdev) |
| 402 | { |
| 403 | return -ENODEV; |
| 404 | } |
| 405 | |
| 406 | static inline void btintel_hw_error(struct hci_dev *hdev, u8 code) |
| 407 | { |
| 408 | } |
| 409 | |
| 410 | static inline void btintel_print_fseq_info(struct hci_dev *hdev) |
| 411 | { |
| 412 | } |
| 413 | #endif |