| 1 | /* |
| 2 | * NVM Express device driver |
| 3 | * Copyright (c) 2011-2014, Intel Corporation. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/nvme.h> |
| 16 | #include <linux/bitops.h> |
| 17 | #include <linux/blkdev.h> |
| 18 | #include <linux/blk-mq.h> |
| 19 | #include <linux/cpu.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/fs.h> |
| 23 | #include <linux/genhd.h> |
| 24 | #include <linux/hdreg.h> |
| 25 | #include <linux/idr.h> |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/io.h> |
| 29 | #include <linux/kdev_t.h> |
| 30 | #include <linux/kthread.h> |
| 31 | #include <linux/kernel.h> |
| 32 | #include <linux/mm.h> |
| 33 | #include <linux/module.h> |
| 34 | #include <linux/moduleparam.h> |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/poison.h> |
| 37 | #include <linux/ptrace.h> |
| 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/types.h> |
| 41 | #include <scsi/sg.h> |
| 42 | #include <asm-generic/io-64-nonatomic-lo-hi.h> |
| 43 | |
| 44 | #define NVME_Q_DEPTH 1024 |
| 45 | #define NVME_AQ_DEPTH 64 |
| 46 | #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) |
| 47 | #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) |
| 48 | #define ADMIN_TIMEOUT (admin_timeout * HZ) |
| 49 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) |
| 50 | #define IOD_TIMEOUT (retry_time * HZ) |
| 51 | |
| 52 | static unsigned char admin_timeout = 60; |
| 53 | module_param(admin_timeout, byte, 0644); |
| 54 | MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); |
| 55 | |
| 56 | unsigned char nvme_io_timeout = 30; |
| 57 | module_param_named(io_timeout, nvme_io_timeout, byte, 0644); |
| 58 | MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); |
| 59 | |
| 60 | static unsigned char retry_time = 30; |
| 61 | module_param(retry_time, byte, 0644); |
| 62 | MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O"); |
| 63 | |
| 64 | static unsigned char shutdown_timeout = 5; |
| 65 | module_param(shutdown_timeout, byte, 0644); |
| 66 | MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); |
| 67 | |
| 68 | static int nvme_major; |
| 69 | module_param(nvme_major, int, 0); |
| 70 | |
| 71 | static int use_threaded_interrupts; |
| 72 | module_param(use_threaded_interrupts, int, 0); |
| 73 | |
| 74 | static DEFINE_SPINLOCK(dev_list_lock); |
| 75 | static LIST_HEAD(dev_list); |
| 76 | static struct task_struct *nvme_thread; |
| 77 | static struct workqueue_struct *nvme_workq; |
| 78 | static wait_queue_head_t nvme_kthread_wait; |
| 79 | static struct notifier_block nvme_nb; |
| 80 | |
| 81 | static void nvme_reset_failed_dev(struct work_struct *ws); |
| 82 | static int nvme_process_cq(struct nvme_queue *nvmeq); |
| 83 | |
| 84 | struct async_cmd_info { |
| 85 | struct kthread_work work; |
| 86 | struct kthread_worker *worker; |
| 87 | struct request *req; |
| 88 | u32 result; |
| 89 | int status; |
| 90 | void *ctx; |
| 91 | }; |
| 92 | |
| 93 | /* |
| 94 | * An NVM Express queue. Each device has at least two (one for admin |
| 95 | * commands and one for I/O commands). |
| 96 | */ |
| 97 | struct nvme_queue { |
| 98 | struct llist_node node; |
| 99 | struct device *q_dmadev; |
| 100 | struct nvme_dev *dev; |
| 101 | char irqname[24]; /* nvme4294967295-65535\0 */ |
| 102 | spinlock_t q_lock; |
| 103 | struct nvme_command *sq_cmds; |
| 104 | volatile struct nvme_completion *cqes; |
| 105 | dma_addr_t sq_dma_addr; |
| 106 | dma_addr_t cq_dma_addr; |
| 107 | u32 __iomem *q_db; |
| 108 | u16 q_depth; |
| 109 | u16 cq_vector; |
| 110 | u16 sq_head; |
| 111 | u16 sq_tail; |
| 112 | u16 cq_head; |
| 113 | u16 qid; |
| 114 | u8 cq_phase; |
| 115 | u8 cqe_seen; |
| 116 | struct async_cmd_info cmdinfo; |
| 117 | struct blk_mq_hw_ctx *hctx; |
| 118 | }; |
| 119 | |
| 120 | /* |
| 121 | * Check we didin't inadvertently grow the command struct |
| 122 | */ |
| 123 | static inline void _nvme_check_size(void) |
| 124 | { |
| 125 | BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); |
| 126 | BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); |
| 127 | BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); |
| 128 | BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); |
| 129 | BUILD_BUG_ON(sizeof(struct nvme_features) != 64); |
| 130 | BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); |
| 131 | BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); |
| 132 | BUILD_BUG_ON(sizeof(struct nvme_command) != 64); |
| 133 | BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); |
| 134 | BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); |
| 135 | BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); |
| 136 | BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); |
| 137 | } |
| 138 | |
| 139 | typedef void (*nvme_completion_fn)(struct nvme_queue *, void *, |
| 140 | struct nvme_completion *); |
| 141 | |
| 142 | struct nvme_cmd_info { |
| 143 | nvme_completion_fn fn; |
| 144 | void *ctx; |
| 145 | int aborted; |
| 146 | struct nvme_queue *nvmeq; |
| 147 | }; |
| 148 | |
| 149 | static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 150 | unsigned int hctx_idx) |
| 151 | { |
| 152 | struct nvme_dev *dev = data; |
| 153 | struct nvme_queue *nvmeq = dev->queues[0]; |
| 154 | |
| 155 | WARN_ON(nvmeq->hctx); |
| 156 | nvmeq->hctx = hctx; |
| 157 | hctx->driver_data = nvmeq; |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | static int nvme_admin_init_request(void *data, struct request *req, |
| 162 | unsigned int hctx_idx, unsigned int rq_idx, |
| 163 | unsigned int numa_node) |
| 164 | { |
| 165 | struct nvme_dev *dev = data; |
| 166 | struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req); |
| 167 | struct nvme_queue *nvmeq = dev->queues[0]; |
| 168 | |
| 169 | BUG_ON(!nvmeq); |
| 170 | cmd->nvmeq = nvmeq; |
| 171 | return 0; |
| 172 | } |
| 173 | |
| 174 | static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) |
| 175 | { |
| 176 | struct nvme_queue *nvmeq = hctx->driver_data; |
| 177 | |
| 178 | nvmeq->hctx = NULL; |
| 179 | } |
| 180 | |
| 181 | static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 182 | unsigned int hctx_idx) |
| 183 | { |
| 184 | struct nvme_dev *dev = data; |
| 185 | struct nvme_queue *nvmeq = dev->queues[ |
| 186 | (hctx_idx % dev->queue_count) + 1]; |
| 187 | |
| 188 | if (!nvmeq->hctx) |
| 189 | nvmeq->hctx = hctx; |
| 190 | |
| 191 | /* nvmeq queues are shared between namespaces. We assume here that |
| 192 | * blk-mq map the tags so they match up with the nvme queue tags. */ |
| 193 | WARN_ON(nvmeq->hctx->tags != hctx->tags); |
| 194 | |
| 195 | hctx->driver_data = nvmeq; |
| 196 | return 0; |
| 197 | } |
| 198 | |
| 199 | static int nvme_init_request(void *data, struct request *req, |
| 200 | unsigned int hctx_idx, unsigned int rq_idx, |
| 201 | unsigned int numa_node) |
| 202 | { |
| 203 | struct nvme_dev *dev = data; |
| 204 | struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req); |
| 205 | struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; |
| 206 | |
| 207 | BUG_ON(!nvmeq); |
| 208 | cmd->nvmeq = nvmeq; |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx, |
| 213 | nvme_completion_fn handler) |
| 214 | { |
| 215 | cmd->fn = handler; |
| 216 | cmd->ctx = ctx; |
| 217 | cmd->aborted = 0; |
| 218 | blk_mq_start_request(blk_mq_rq_from_pdu(cmd)); |
| 219 | } |
| 220 | |
| 221 | /* Special values must be less than 0x1000 */ |
| 222 | #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA) |
| 223 | #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE) |
| 224 | #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE) |
| 225 | #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE) |
| 226 | |
| 227 | static void special_completion(struct nvme_queue *nvmeq, void *ctx, |
| 228 | struct nvme_completion *cqe) |
| 229 | { |
| 230 | if (ctx == CMD_CTX_CANCELLED) |
| 231 | return; |
| 232 | if (ctx == CMD_CTX_COMPLETED) { |
| 233 | dev_warn(nvmeq->q_dmadev, |
| 234 | "completed id %d twice on queue %d\n", |
| 235 | cqe->command_id, le16_to_cpup(&cqe->sq_id)); |
| 236 | return; |
| 237 | } |
| 238 | if (ctx == CMD_CTX_INVALID) { |
| 239 | dev_warn(nvmeq->q_dmadev, |
| 240 | "invalid id %d completed on queue %d\n", |
| 241 | cqe->command_id, le16_to_cpup(&cqe->sq_id)); |
| 242 | return; |
| 243 | } |
| 244 | dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx); |
| 245 | } |
| 246 | |
| 247 | static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn) |
| 248 | { |
| 249 | void *ctx; |
| 250 | |
| 251 | if (fn) |
| 252 | *fn = cmd->fn; |
| 253 | ctx = cmd->ctx; |
| 254 | cmd->fn = special_completion; |
| 255 | cmd->ctx = CMD_CTX_CANCELLED; |
| 256 | return ctx; |
| 257 | } |
| 258 | |
| 259 | static void async_req_completion(struct nvme_queue *nvmeq, void *ctx, |
| 260 | struct nvme_completion *cqe) |
| 261 | { |
| 262 | struct request *req = ctx; |
| 263 | |
| 264 | u32 result = le32_to_cpup(&cqe->result); |
| 265 | u16 status = le16_to_cpup(&cqe->status) >> 1; |
| 266 | |
| 267 | if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) |
| 268 | ++nvmeq->dev->event_limit; |
| 269 | if (status == NVME_SC_SUCCESS) |
| 270 | dev_warn(nvmeq->q_dmadev, |
| 271 | "async event result %08x\n", result); |
| 272 | |
| 273 | blk_mq_free_hctx_request(nvmeq->hctx, req); |
| 274 | } |
| 275 | |
| 276 | static void abort_completion(struct nvme_queue *nvmeq, void *ctx, |
| 277 | struct nvme_completion *cqe) |
| 278 | { |
| 279 | struct request *req = ctx; |
| 280 | |
| 281 | u16 status = le16_to_cpup(&cqe->status) >> 1; |
| 282 | u32 result = le32_to_cpup(&cqe->result); |
| 283 | |
| 284 | blk_mq_free_hctx_request(nvmeq->hctx, req); |
| 285 | |
| 286 | dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result); |
| 287 | ++nvmeq->dev->abort_limit; |
| 288 | } |
| 289 | |
| 290 | static void async_completion(struct nvme_queue *nvmeq, void *ctx, |
| 291 | struct nvme_completion *cqe) |
| 292 | { |
| 293 | struct async_cmd_info *cmdinfo = ctx; |
| 294 | cmdinfo->result = le32_to_cpup(&cqe->result); |
| 295 | cmdinfo->status = le16_to_cpup(&cqe->status) >> 1; |
| 296 | queue_kthread_work(cmdinfo->worker, &cmdinfo->work); |
| 297 | blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req); |
| 298 | } |
| 299 | |
| 300 | static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq, |
| 301 | unsigned int tag) |
| 302 | { |
| 303 | struct blk_mq_hw_ctx *hctx = nvmeq->hctx; |
| 304 | struct request *req = blk_mq_tag_to_rq(hctx->tags, tag); |
| 305 | |
| 306 | return blk_mq_rq_to_pdu(req); |
| 307 | } |
| 308 | |
| 309 | /* |
| 310 | * Called with local interrupts disabled and the q_lock held. May not sleep. |
| 311 | */ |
| 312 | static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag, |
| 313 | nvme_completion_fn *fn) |
| 314 | { |
| 315 | struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag); |
| 316 | void *ctx; |
| 317 | if (tag >= nvmeq->q_depth) { |
| 318 | *fn = special_completion; |
| 319 | return CMD_CTX_INVALID; |
| 320 | } |
| 321 | if (fn) |
| 322 | *fn = cmd->fn; |
| 323 | ctx = cmd->ctx; |
| 324 | cmd->fn = special_completion; |
| 325 | cmd->ctx = CMD_CTX_COMPLETED; |
| 326 | return ctx; |
| 327 | } |
| 328 | |
| 329 | /** |
| 330 | * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell |
| 331 | * @nvmeq: The queue to use |
| 332 | * @cmd: The command to send |
| 333 | * |
| 334 | * Safe to use from interrupt context |
| 335 | */ |
| 336 | static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd) |
| 337 | { |
| 338 | u16 tail = nvmeq->sq_tail; |
| 339 | |
| 340 | memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); |
| 341 | if (++tail == nvmeq->q_depth) |
| 342 | tail = 0; |
| 343 | writel(tail, nvmeq->q_db); |
| 344 | nvmeq->sq_tail = tail; |
| 345 | |
| 346 | return 0; |
| 347 | } |
| 348 | |
| 349 | static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd) |
| 350 | { |
| 351 | unsigned long flags; |
| 352 | int ret; |
| 353 | spin_lock_irqsave(&nvmeq->q_lock, flags); |
| 354 | ret = __nvme_submit_cmd(nvmeq, cmd); |
| 355 | spin_unlock_irqrestore(&nvmeq->q_lock, flags); |
| 356 | return ret; |
| 357 | } |
| 358 | |
| 359 | static __le64 **iod_list(struct nvme_iod *iod) |
| 360 | { |
| 361 | return ((void *)iod) + iod->offset; |
| 362 | } |
| 363 | |
| 364 | /* |
| 365 | * Will slightly overestimate the number of pages needed. This is OK |
| 366 | * as it only leads to a small amount of wasted memory for the lifetime of |
| 367 | * the I/O. |
| 368 | */ |
| 369 | static int nvme_npages(unsigned size, struct nvme_dev *dev) |
| 370 | { |
| 371 | unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size); |
| 372 | return DIV_ROUND_UP(8 * nprps, dev->page_size - 8); |
| 373 | } |
| 374 | |
| 375 | static struct nvme_iod * |
| 376 | nvme_alloc_iod(unsigned nseg, unsigned nbytes, struct nvme_dev *dev, gfp_t gfp) |
| 377 | { |
| 378 | struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) + |
| 379 | sizeof(__le64 *) * nvme_npages(nbytes, dev) + |
| 380 | sizeof(struct scatterlist) * nseg, gfp); |
| 381 | |
| 382 | if (iod) { |
| 383 | iod->offset = offsetof(struct nvme_iod, sg[nseg]); |
| 384 | iod->npages = -1; |
| 385 | iod->length = nbytes; |
| 386 | iod->nents = 0; |
| 387 | iod->first_dma = 0ULL; |
| 388 | } |
| 389 | |
| 390 | return iod; |
| 391 | } |
| 392 | |
| 393 | void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod) |
| 394 | { |
| 395 | const int last_prp = dev->page_size / 8 - 1; |
| 396 | int i; |
| 397 | __le64 **list = iod_list(iod); |
| 398 | dma_addr_t prp_dma = iod->first_dma; |
| 399 | |
| 400 | if (iod->npages == 0) |
| 401 | dma_pool_free(dev->prp_small_pool, list[0], prp_dma); |
| 402 | for (i = 0; i < iod->npages; i++) { |
| 403 | __le64 *prp_list = list[i]; |
| 404 | dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); |
| 405 | dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); |
| 406 | prp_dma = next_prp_dma; |
| 407 | } |
| 408 | kfree(iod); |
| 409 | } |
| 410 | |
| 411 | static int nvme_error_status(u16 status) |
| 412 | { |
| 413 | switch (status & 0x7ff) { |
| 414 | case NVME_SC_SUCCESS: |
| 415 | return 0; |
| 416 | case NVME_SC_CAP_EXCEEDED: |
| 417 | return -ENOSPC; |
| 418 | default: |
| 419 | return -EIO; |
| 420 | } |
| 421 | } |
| 422 | |
| 423 | static void req_completion(struct nvme_queue *nvmeq, void *ctx, |
| 424 | struct nvme_completion *cqe) |
| 425 | { |
| 426 | struct nvme_iod *iod = ctx; |
| 427 | struct request *req = iod->private; |
| 428 | struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req); |
| 429 | |
| 430 | u16 status = le16_to_cpup(&cqe->status) >> 1; |
| 431 | |
| 432 | if (unlikely(status)) { |
| 433 | if (!(status & NVME_SC_DNR || blk_noretry_request(req)) |
| 434 | && (jiffies - req->start_time) < req->timeout) { |
| 435 | blk_mq_requeue_request(req); |
| 436 | blk_mq_kick_requeue_list(req->q); |
| 437 | return; |
| 438 | } |
| 439 | req->errors = nvme_error_status(status); |
| 440 | } else |
| 441 | req->errors = 0; |
| 442 | |
| 443 | if (cmd_rq->aborted) |
| 444 | dev_warn(&nvmeq->dev->pci_dev->dev, |
| 445 | "completing aborted command with status:%04x\n", |
| 446 | status); |
| 447 | |
| 448 | if (iod->nents) |
| 449 | dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents, |
| 450 | rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 451 | nvme_free_iod(nvmeq->dev, iod); |
| 452 | |
| 453 | blk_mq_complete_request(req); |
| 454 | } |
| 455 | |
| 456 | /* length is in bytes. gfp flags indicates whether we may sleep. */ |
| 457 | int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len, |
| 458 | gfp_t gfp) |
| 459 | { |
| 460 | struct dma_pool *pool; |
| 461 | int length = total_len; |
| 462 | struct scatterlist *sg = iod->sg; |
| 463 | int dma_len = sg_dma_len(sg); |
| 464 | u64 dma_addr = sg_dma_address(sg); |
| 465 | int offset = offset_in_page(dma_addr); |
| 466 | __le64 *prp_list; |
| 467 | __le64 **list = iod_list(iod); |
| 468 | dma_addr_t prp_dma; |
| 469 | int nprps, i; |
| 470 | u32 page_size = dev->page_size; |
| 471 | |
| 472 | length -= (page_size - offset); |
| 473 | if (length <= 0) |
| 474 | return total_len; |
| 475 | |
| 476 | dma_len -= (page_size - offset); |
| 477 | if (dma_len) { |
| 478 | dma_addr += (page_size - offset); |
| 479 | } else { |
| 480 | sg = sg_next(sg); |
| 481 | dma_addr = sg_dma_address(sg); |
| 482 | dma_len = sg_dma_len(sg); |
| 483 | } |
| 484 | |
| 485 | if (length <= page_size) { |
| 486 | iod->first_dma = dma_addr; |
| 487 | return total_len; |
| 488 | } |
| 489 | |
| 490 | nprps = DIV_ROUND_UP(length, page_size); |
| 491 | if (nprps <= (256 / 8)) { |
| 492 | pool = dev->prp_small_pool; |
| 493 | iod->npages = 0; |
| 494 | } else { |
| 495 | pool = dev->prp_page_pool; |
| 496 | iod->npages = 1; |
| 497 | } |
| 498 | |
| 499 | prp_list = dma_pool_alloc(pool, gfp, &prp_dma); |
| 500 | if (!prp_list) { |
| 501 | iod->first_dma = dma_addr; |
| 502 | iod->npages = -1; |
| 503 | return (total_len - length) + page_size; |
| 504 | } |
| 505 | list[0] = prp_list; |
| 506 | iod->first_dma = prp_dma; |
| 507 | i = 0; |
| 508 | for (;;) { |
| 509 | if (i == page_size >> 3) { |
| 510 | __le64 *old_prp_list = prp_list; |
| 511 | prp_list = dma_pool_alloc(pool, gfp, &prp_dma); |
| 512 | if (!prp_list) |
| 513 | return total_len - length; |
| 514 | list[iod->npages++] = prp_list; |
| 515 | prp_list[0] = old_prp_list[i - 1]; |
| 516 | old_prp_list[i - 1] = cpu_to_le64(prp_dma); |
| 517 | i = 1; |
| 518 | } |
| 519 | prp_list[i++] = cpu_to_le64(dma_addr); |
| 520 | dma_len -= page_size; |
| 521 | dma_addr += page_size; |
| 522 | length -= page_size; |
| 523 | if (length <= 0) |
| 524 | break; |
| 525 | if (dma_len > 0) |
| 526 | continue; |
| 527 | BUG_ON(dma_len < 0); |
| 528 | sg = sg_next(sg); |
| 529 | dma_addr = sg_dma_address(sg); |
| 530 | dma_len = sg_dma_len(sg); |
| 531 | } |
| 532 | |
| 533 | return total_len; |
| 534 | } |
| 535 | |
| 536 | /* |
| 537 | * We reuse the small pool to allocate the 16-byte range here as it is not |
| 538 | * worth having a special pool for these or additional cases to handle freeing |
| 539 | * the iod. |
| 540 | */ |
| 541 | static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns, |
| 542 | struct request *req, struct nvme_iod *iod) |
| 543 | { |
| 544 | struct nvme_dsm_range *range = |
| 545 | (struct nvme_dsm_range *)iod_list(iod)[0]; |
| 546 | struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail]; |
| 547 | |
| 548 | range->cattr = cpu_to_le32(0); |
| 549 | range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift); |
| 550 | range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); |
| 551 | |
| 552 | memset(cmnd, 0, sizeof(*cmnd)); |
| 553 | cmnd->dsm.opcode = nvme_cmd_dsm; |
| 554 | cmnd->dsm.command_id = req->tag; |
| 555 | cmnd->dsm.nsid = cpu_to_le32(ns->ns_id); |
| 556 | cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma); |
| 557 | cmnd->dsm.nr = 0; |
| 558 | cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); |
| 559 | |
| 560 | if (++nvmeq->sq_tail == nvmeq->q_depth) |
| 561 | nvmeq->sq_tail = 0; |
| 562 | writel(nvmeq->sq_tail, nvmeq->q_db); |
| 563 | } |
| 564 | |
| 565 | static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns, |
| 566 | int cmdid) |
| 567 | { |
| 568 | struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail]; |
| 569 | |
| 570 | memset(cmnd, 0, sizeof(*cmnd)); |
| 571 | cmnd->common.opcode = nvme_cmd_flush; |
| 572 | cmnd->common.command_id = cmdid; |
| 573 | cmnd->common.nsid = cpu_to_le32(ns->ns_id); |
| 574 | |
| 575 | if (++nvmeq->sq_tail == nvmeq->q_depth) |
| 576 | nvmeq->sq_tail = 0; |
| 577 | writel(nvmeq->sq_tail, nvmeq->q_db); |
| 578 | } |
| 579 | |
| 580 | static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod, |
| 581 | struct nvme_ns *ns) |
| 582 | { |
| 583 | struct request *req = iod->private; |
| 584 | struct nvme_command *cmnd; |
| 585 | u16 control = 0; |
| 586 | u32 dsmgmt = 0; |
| 587 | |
| 588 | if (req->cmd_flags & REQ_FUA) |
| 589 | control |= NVME_RW_FUA; |
| 590 | if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) |
| 591 | control |= NVME_RW_LR; |
| 592 | |
| 593 | if (req->cmd_flags & REQ_RAHEAD) |
| 594 | dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; |
| 595 | |
| 596 | cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail]; |
| 597 | memset(cmnd, 0, sizeof(*cmnd)); |
| 598 | |
| 599 | cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); |
| 600 | cmnd->rw.command_id = req->tag; |
| 601 | cmnd->rw.nsid = cpu_to_le32(ns->ns_id); |
| 602 | cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); |
| 603 | cmnd->rw.prp2 = cpu_to_le64(iod->first_dma); |
| 604 | cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); |
| 605 | cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); |
| 606 | cmnd->rw.control = cpu_to_le16(control); |
| 607 | cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); |
| 608 | |
| 609 | if (++nvmeq->sq_tail == nvmeq->q_depth) |
| 610 | nvmeq->sq_tail = 0; |
| 611 | writel(nvmeq->sq_tail, nvmeq->q_db); |
| 612 | |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, |
| 617 | const struct blk_mq_queue_data *bd) |
| 618 | { |
| 619 | struct nvme_ns *ns = hctx->queue->queuedata; |
| 620 | struct nvme_queue *nvmeq = hctx->driver_data; |
| 621 | struct request *req = bd->rq; |
| 622 | struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req); |
| 623 | struct nvme_iod *iod; |
| 624 | int psegs = req->nr_phys_segments; |
| 625 | enum dma_data_direction dma_dir; |
| 626 | unsigned size = !(req->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(req) : |
| 627 | sizeof(struct nvme_dsm_range); |
| 628 | |
| 629 | iod = nvme_alloc_iod(psegs, size, ns->dev, GFP_ATOMIC); |
| 630 | if (!iod) |
| 631 | return BLK_MQ_RQ_QUEUE_BUSY; |
| 632 | |
| 633 | iod->private = req; |
| 634 | |
| 635 | if (req->cmd_flags & REQ_DISCARD) { |
| 636 | void *range; |
| 637 | /* |
| 638 | * We reuse the small pool to allocate the 16-byte range here |
| 639 | * as it is not worth having a special pool for these or |
| 640 | * additional cases to handle freeing the iod. |
| 641 | */ |
| 642 | range = dma_pool_alloc(nvmeq->dev->prp_small_pool, |
| 643 | GFP_ATOMIC, |
| 644 | &iod->first_dma); |
| 645 | if (!range) |
| 646 | goto retry_cmd; |
| 647 | iod_list(iod)[0] = (__le64 *)range; |
| 648 | iod->npages = 0; |
| 649 | } else if (psegs) { |
| 650 | dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE; |
| 651 | |
| 652 | sg_init_table(iod->sg, psegs); |
| 653 | iod->nents = blk_rq_map_sg(req->q, req, iod->sg); |
| 654 | if (!iod->nents) |
| 655 | goto error_cmd; |
| 656 | |
| 657 | if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir)) |
| 658 | goto retry_cmd; |
| 659 | |
| 660 | if (blk_rq_bytes(req) != |
| 661 | nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) { |
| 662 | dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, |
| 663 | iod->nents, dma_dir); |
| 664 | goto retry_cmd; |
| 665 | } |
| 666 | } |
| 667 | |
| 668 | nvme_set_info(cmd, iod, req_completion); |
| 669 | spin_lock_irq(&nvmeq->q_lock); |
| 670 | if (req->cmd_flags & REQ_DISCARD) |
| 671 | nvme_submit_discard(nvmeq, ns, req, iod); |
| 672 | else if (req->cmd_flags & REQ_FLUSH) |
| 673 | nvme_submit_flush(nvmeq, ns, req->tag); |
| 674 | else |
| 675 | nvme_submit_iod(nvmeq, iod, ns); |
| 676 | |
| 677 | nvme_process_cq(nvmeq); |
| 678 | spin_unlock_irq(&nvmeq->q_lock); |
| 679 | return BLK_MQ_RQ_QUEUE_OK; |
| 680 | |
| 681 | error_cmd: |
| 682 | nvme_free_iod(nvmeq->dev, iod); |
| 683 | return BLK_MQ_RQ_QUEUE_ERROR; |
| 684 | retry_cmd: |
| 685 | nvme_free_iod(nvmeq->dev, iod); |
| 686 | return BLK_MQ_RQ_QUEUE_BUSY; |
| 687 | } |
| 688 | |
| 689 | static int nvme_process_cq(struct nvme_queue *nvmeq) |
| 690 | { |
| 691 | u16 head, phase; |
| 692 | |
| 693 | head = nvmeq->cq_head; |
| 694 | phase = nvmeq->cq_phase; |
| 695 | |
| 696 | for (;;) { |
| 697 | void *ctx; |
| 698 | nvme_completion_fn fn; |
| 699 | struct nvme_completion cqe = nvmeq->cqes[head]; |
| 700 | if ((le16_to_cpu(cqe.status) & 1) != phase) |
| 701 | break; |
| 702 | nvmeq->sq_head = le16_to_cpu(cqe.sq_head); |
| 703 | if (++head == nvmeq->q_depth) { |
| 704 | head = 0; |
| 705 | phase = !phase; |
| 706 | } |
| 707 | ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn); |
| 708 | fn(nvmeq, ctx, &cqe); |
| 709 | } |
| 710 | |
| 711 | /* If the controller ignores the cq head doorbell and continuously |
| 712 | * writes to the queue, it is theoretically possible to wrap around |
| 713 | * the queue twice and mistakenly return IRQ_NONE. Linux only |
| 714 | * requires that 0.1% of your interrupts are handled, so this isn't |
| 715 | * a big problem. |
| 716 | */ |
| 717 | if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) |
| 718 | return 0; |
| 719 | |
| 720 | writel(head, nvmeq->q_db + nvmeq->dev->db_stride); |
| 721 | nvmeq->cq_head = head; |
| 722 | nvmeq->cq_phase = phase; |
| 723 | |
| 724 | nvmeq->cqe_seen = 1; |
| 725 | return 1; |
| 726 | } |
| 727 | |
| 728 | /* Admin queue isn't initialized as a request queue. If at some point this |
| 729 | * happens anyway, make sure to notify the user */ |
| 730 | static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx, |
| 731 | const struct blk_mq_queue_data *bd) |
| 732 | { |
| 733 | WARN_ON_ONCE(1); |
| 734 | return BLK_MQ_RQ_QUEUE_ERROR; |
| 735 | } |
| 736 | |
| 737 | static irqreturn_t nvme_irq(int irq, void *data) |
| 738 | { |
| 739 | irqreturn_t result; |
| 740 | struct nvme_queue *nvmeq = data; |
| 741 | spin_lock(&nvmeq->q_lock); |
| 742 | nvme_process_cq(nvmeq); |
| 743 | result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; |
| 744 | nvmeq->cqe_seen = 0; |
| 745 | spin_unlock(&nvmeq->q_lock); |
| 746 | return result; |
| 747 | } |
| 748 | |
| 749 | static irqreturn_t nvme_irq_check(int irq, void *data) |
| 750 | { |
| 751 | struct nvme_queue *nvmeq = data; |
| 752 | struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head]; |
| 753 | if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase) |
| 754 | return IRQ_NONE; |
| 755 | return IRQ_WAKE_THREAD; |
| 756 | } |
| 757 | |
| 758 | static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info * |
| 759 | cmd_info) |
| 760 | { |
| 761 | spin_lock_irq(&nvmeq->q_lock); |
| 762 | cancel_cmd_info(cmd_info, NULL); |
| 763 | spin_unlock_irq(&nvmeq->q_lock); |
| 764 | } |
| 765 | |
| 766 | struct sync_cmd_info { |
| 767 | struct task_struct *task; |
| 768 | u32 result; |
| 769 | int status; |
| 770 | }; |
| 771 | |
| 772 | static void sync_completion(struct nvme_queue *nvmeq, void *ctx, |
| 773 | struct nvme_completion *cqe) |
| 774 | { |
| 775 | struct sync_cmd_info *cmdinfo = ctx; |
| 776 | cmdinfo->result = le32_to_cpup(&cqe->result); |
| 777 | cmdinfo->status = le16_to_cpup(&cqe->status) >> 1; |
| 778 | wake_up_process(cmdinfo->task); |
| 779 | } |
| 780 | |
| 781 | /* |
| 782 | * Returns 0 on success. If the result is negative, it's a Linux error code; |
| 783 | * if the result is positive, it's an NVM Express status code |
| 784 | */ |
| 785 | static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd, |
| 786 | u32 *result, unsigned timeout) |
| 787 | { |
| 788 | int ret; |
| 789 | struct sync_cmd_info cmdinfo; |
| 790 | struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req); |
| 791 | struct nvme_queue *nvmeq = cmd_rq->nvmeq; |
| 792 | |
| 793 | cmdinfo.task = current; |
| 794 | cmdinfo.status = -EINTR; |
| 795 | |
| 796 | cmd->common.command_id = req->tag; |
| 797 | |
| 798 | nvme_set_info(cmd_rq, &cmdinfo, sync_completion); |
| 799 | |
| 800 | set_current_state(TASK_KILLABLE); |
| 801 | ret = nvme_submit_cmd(nvmeq, cmd); |
| 802 | if (ret) { |
| 803 | nvme_finish_cmd(nvmeq, req->tag, NULL); |
| 804 | set_current_state(TASK_RUNNING); |
| 805 | } |
| 806 | ret = schedule_timeout(timeout); |
| 807 | |
| 808 | /* |
| 809 | * Ensure that sync_completion has either run, or that it will |
| 810 | * never run. |
| 811 | */ |
| 812 | nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req)); |
| 813 | |
| 814 | /* |
| 815 | * We never got the completion |
| 816 | */ |
| 817 | if (cmdinfo.status == -EINTR) |
| 818 | return -EINTR; |
| 819 | |
| 820 | if (result) |
| 821 | *result = cmdinfo.result; |
| 822 | |
| 823 | return cmdinfo.status; |
| 824 | } |
| 825 | |
| 826 | static int nvme_submit_async_admin_req(struct nvme_dev *dev) |
| 827 | { |
| 828 | struct nvme_queue *nvmeq = dev->queues[0]; |
| 829 | struct nvme_command c; |
| 830 | struct nvme_cmd_info *cmd_info; |
| 831 | struct request *req; |
| 832 | |
| 833 | req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false); |
| 834 | if (IS_ERR(req)) |
| 835 | return PTR_ERR(req); |
| 836 | |
| 837 | req->cmd_flags |= REQ_NO_TIMEOUT; |
| 838 | cmd_info = blk_mq_rq_to_pdu(req); |
| 839 | nvme_set_info(cmd_info, req, async_req_completion); |
| 840 | |
| 841 | memset(&c, 0, sizeof(c)); |
| 842 | c.common.opcode = nvme_admin_async_event; |
| 843 | c.common.command_id = req->tag; |
| 844 | |
| 845 | return __nvme_submit_cmd(nvmeq, &c); |
| 846 | } |
| 847 | |
| 848 | static int nvme_submit_admin_async_cmd(struct nvme_dev *dev, |
| 849 | struct nvme_command *cmd, |
| 850 | struct async_cmd_info *cmdinfo, unsigned timeout) |
| 851 | { |
| 852 | struct nvme_queue *nvmeq = dev->queues[0]; |
| 853 | struct request *req; |
| 854 | struct nvme_cmd_info *cmd_rq; |
| 855 | |
| 856 | req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false); |
| 857 | if (IS_ERR(req)) |
| 858 | return PTR_ERR(req); |
| 859 | |
| 860 | req->timeout = timeout; |
| 861 | cmd_rq = blk_mq_rq_to_pdu(req); |
| 862 | cmdinfo->req = req; |
| 863 | nvme_set_info(cmd_rq, cmdinfo, async_completion); |
| 864 | cmdinfo->status = -EINTR; |
| 865 | |
| 866 | cmd->common.command_id = req->tag; |
| 867 | |
| 868 | return nvme_submit_cmd(nvmeq, cmd); |
| 869 | } |
| 870 | |
| 871 | static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd, |
| 872 | u32 *result, unsigned timeout) |
| 873 | { |
| 874 | int res; |
| 875 | struct request *req; |
| 876 | |
| 877 | req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false); |
| 878 | if (IS_ERR(req)) |
| 879 | return PTR_ERR(req); |
| 880 | res = nvme_submit_sync_cmd(req, cmd, result, timeout); |
| 881 | blk_mq_free_request(req); |
| 882 | return res; |
| 883 | } |
| 884 | |
| 885 | int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd, |
| 886 | u32 *result) |
| 887 | { |
| 888 | return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT); |
| 889 | } |
| 890 | |
| 891 | int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns, |
| 892 | struct nvme_command *cmd, u32 *result) |
| 893 | { |
| 894 | int res; |
| 895 | struct request *req; |
| 896 | |
| 897 | req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT), |
| 898 | false); |
| 899 | if (IS_ERR(req)) |
| 900 | return PTR_ERR(req); |
| 901 | res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT); |
| 902 | blk_mq_free_request(req); |
| 903 | return res; |
| 904 | } |
| 905 | |
| 906 | static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) |
| 907 | { |
| 908 | struct nvme_command c; |
| 909 | |
| 910 | memset(&c, 0, sizeof(c)); |
| 911 | c.delete_queue.opcode = opcode; |
| 912 | c.delete_queue.qid = cpu_to_le16(id); |
| 913 | |
| 914 | return nvme_submit_admin_cmd(dev, &c, NULL); |
| 915 | } |
| 916 | |
| 917 | static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, |
| 918 | struct nvme_queue *nvmeq) |
| 919 | { |
| 920 | struct nvme_command c; |
| 921 | int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; |
| 922 | |
| 923 | memset(&c, 0, sizeof(c)); |
| 924 | c.create_cq.opcode = nvme_admin_create_cq; |
| 925 | c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); |
| 926 | c.create_cq.cqid = cpu_to_le16(qid); |
| 927 | c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); |
| 928 | c.create_cq.cq_flags = cpu_to_le16(flags); |
| 929 | c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); |
| 930 | |
| 931 | return nvme_submit_admin_cmd(dev, &c, NULL); |
| 932 | } |
| 933 | |
| 934 | static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, |
| 935 | struct nvme_queue *nvmeq) |
| 936 | { |
| 937 | struct nvme_command c; |
| 938 | int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM; |
| 939 | |
| 940 | memset(&c, 0, sizeof(c)); |
| 941 | c.create_sq.opcode = nvme_admin_create_sq; |
| 942 | c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); |
| 943 | c.create_sq.sqid = cpu_to_le16(qid); |
| 944 | c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); |
| 945 | c.create_sq.sq_flags = cpu_to_le16(flags); |
| 946 | c.create_sq.cqid = cpu_to_le16(qid); |
| 947 | |
| 948 | return nvme_submit_admin_cmd(dev, &c, NULL); |
| 949 | } |
| 950 | |
| 951 | static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) |
| 952 | { |
| 953 | return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); |
| 954 | } |
| 955 | |
| 956 | static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) |
| 957 | { |
| 958 | return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); |
| 959 | } |
| 960 | |
| 961 | int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns, |
| 962 | dma_addr_t dma_addr) |
| 963 | { |
| 964 | struct nvme_command c; |
| 965 | |
| 966 | memset(&c, 0, sizeof(c)); |
| 967 | c.identify.opcode = nvme_admin_identify; |
| 968 | c.identify.nsid = cpu_to_le32(nsid); |
| 969 | c.identify.prp1 = cpu_to_le64(dma_addr); |
| 970 | c.identify.cns = cpu_to_le32(cns); |
| 971 | |
| 972 | return nvme_submit_admin_cmd(dev, &c, NULL); |
| 973 | } |
| 974 | |
| 975 | int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, |
| 976 | dma_addr_t dma_addr, u32 *result) |
| 977 | { |
| 978 | struct nvme_command c; |
| 979 | |
| 980 | memset(&c, 0, sizeof(c)); |
| 981 | c.features.opcode = nvme_admin_get_features; |
| 982 | c.features.nsid = cpu_to_le32(nsid); |
| 983 | c.features.prp1 = cpu_to_le64(dma_addr); |
| 984 | c.features.fid = cpu_to_le32(fid); |
| 985 | |
| 986 | return nvme_submit_admin_cmd(dev, &c, result); |
| 987 | } |
| 988 | |
| 989 | int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11, |
| 990 | dma_addr_t dma_addr, u32 *result) |
| 991 | { |
| 992 | struct nvme_command c; |
| 993 | |
| 994 | memset(&c, 0, sizeof(c)); |
| 995 | c.features.opcode = nvme_admin_set_features; |
| 996 | c.features.prp1 = cpu_to_le64(dma_addr); |
| 997 | c.features.fid = cpu_to_le32(fid); |
| 998 | c.features.dword11 = cpu_to_le32(dword11); |
| 999 | |
| 1000 | return nvme_submit_admin_cmd(dev, &c, result); |
| 1001 | } |
| 1002 | |
| 1003 | /** |
| 1004 | * nvme_abort_req - Attempt aborting a request |
| 1005 | * |
| 1006 | * Schedule controller reset if the command was already aborted once before and |
| 1007 | * still hasn't been returned to the driver, or if this is the admin queue. |
| 1008 | */ |
| 1009 | static void nvme_abort_req(struct request *req) |
| 1010 | { |
| 1011 | struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req); |
| 1012 | struct nvme_queue *nvmeq = cmd_rq->nvmeq; |
| 1013 | struct nvme_dev *dev = nvmeq->dev; |
| 1014 | struct request *abort_req; |
| 1015 | struct nvme_cmd_info *abort_cmd; |
| 1016 | struct nvme_command cmd; |
| 1017 | |
| 1018 | if (!nvmeq->qid || cmd_rq->aborted) { |
| 1019 | if (work_busy(&dev->reset_work)) |
| 1020 | return; |
| 1021 | list_del_init(&dev->node); |
| 1022 | dev_warn(&dev->pci_dev->dev, |
| 1023 | "I/O %d QID %d timeout, reset controller\n", |
| 1024 | req->tag, nvmeq->qid); |
| 1025 | dev->reset_workfn = nvme_reset_failed_dev; |
| 1026 | queue_work(nvme_workq, &dev->reset_work); |
| 1027 | return; |
| 1028 | } |
| 1029 | |
| 1030 | if (!dev->abort_limit) |
| 1031 | return; |
| 1032 | |
| 1033 | abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, |
| 1034 | false); |
| 1035 | if (IS_ERR(abort_req)) |
| 1036 | return; |
| 1037 | |
| 1038 | abort_cmd = blk_mq_rq_to_pdu(abort_req); |
| 1039 | nvme_set_info(abort_cmd, abort_req, abort_completion); |
| 1040 | |
| 1041 | memset(&cmd, 0, sizeof(cmd)); |
| 1042 | cmd.abort.opcode = nvme_admin_abort_cmd; |
| 1043 | cmd.abort.cid = req->tag; |
| 1044 | cmd.abort.sqid = cpu_to_le16(nvmeq->qid); |
| 1045 | cmd.abort.command_id = abort_req->tag; |
| 1046 | |
| 1047 | --dev->abort_limit; |
| 1048 | cmd_rq->aborted = 1; |
| 1049 | |
| 1050 | dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag, |
| 1051 | nvmeq->qid); |
| 1052 | if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) { |
| 1053 | dev_warn(nvmeq->q_dmadev, |
| 1054 | "Could not abort I/O %d QID %d", |
| 1055 | req->tag, nvmeq->qid); |
| 1056 | blk_mq_free_request(abort_req); |
| 1057 | } |
| 1058 | } |
| 1059 | |
| 1060 | static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx, |
| 1061 | struct request *req, void *data, bool reserved) |
| 1062 | { |
| 1063 | struct nvme_queue *nvmeq = data; |
| 1064 | void *ctx; |
| 1065 | nvme_completion_fn fn; |
| 1066 | struct nvme_cmd_info *cmd; |
| 1067 | static struct nvme_completion cqe = { |
| 1068 | .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1), |
| 1069 | }; |
| 1070 | |
| 1071 | cmd = blk_mq_rq_to_pdu(req); |
| 1072 | |
| 1073 | if (cmd->ctx == CMD_CTX_CANCELLED) |
| 1074 | return; |
| 1075 | |
| 1076 | dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n", |
| 1077 | req->tag, nvmeq->qid); |
| 1078 | ctx = cancel_cmd_info(cmd, &fn); |
| 1079 | fn(nvmeq, ctx, &cqe); |
| 1080 | } |
| 1081 | |
| 1082 | static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) |
| 1083 | { |
| 1084 | struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req); |
| 1085 | struct nvme_queue *nvmeq = cmd->nvmeq; |
| 1086 | |
| 1087 | dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag, |
| 1088 | nvmeq->qid); |
| 1089 | |
| 1090 | if (!nvmeq->dev->initialized) { |
| 1091 | /* |
| 1092 | * Force cancelled command frees the request, which requires we |
| 1093 | * return BLK_EH_NOT_HANDLED. |
| 1094 | */ |
| 1095 | nvme_cancel_queue_ios(nvmeq->hctx, req, nvmeq, reserved); |
| 1096 | return BLK_EH_NOT_HANDLED; |
| 1097 | } |
| 1098 | nvme_abort_req(req); |
| 1099 | |
| 1100 | /* |
| 1101 | * The aborted req will be completed on receiving the abort req. |
| 1102 | * We enable the timer again. If hit twice, it'll cause a device reset, |
| 1103 | * as the device then is in a faulty state. |
| 1104 | */ |
| 1105 | return BLK_EH_RESET_TIMER; |
| 1106 | } |
| 1107 | |
| 1108 | static void nvme_free_queue(struct nvme_queue *nvmeq) |
| 1109 | { |
| 1110 | dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), |
| 1111 | (void *)nvmeq->cqes, nvmeq->cq_dma_addr); |
| 1112 | dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), |
| 1113 | nvmeq->sq_cmds, nvmeq->sq_dma_addr); |
| 1114 | kfree(nvmeq); |
| 1115 | } |
| 1116 | |
| 1117 | static void nvme_free_queues(struct nvme_dev *dev, int lowest) |
| 1118 | { |
| 1119 | LLIST_HEAD(q_list); |
| 1120 | struct nvme_queue *nvmeq, *next; |
| 1121 | struct llist_node *entry; |
| 1122 | int i; |
| 1123 | |
| 1124 | for (i = dev->queue_count - 1; i >= lowest; i--) { |
| 1125 | struct nvme_queue *nvmeq = dev->queues[i]; |
| 1126 | llist_add(&nvmeq->node, &q_list); |
| 1127 | dev->queue_count--; |
| 1128 | dev->queues[i] = NULL; |
| 1129 | } |
| 1130 | synchronize_rcu(); |
| 1131 | entry = llist_del_all(&q_list); |
| 1132 | llist_for_each_entry_safe(nvmeq, next, entry, node) |
| 1133 | nvme_free_queue(nvmeq); |
| 1134 | } |
| 1135 | |
| 1136 | /** |
| 1137 | * nvme_suspend_queue - put queue into suspended state |
| 1138 | * @nvmeq - queue to suspend |
| 1139 | */ |
| 1140 | static int nvme_suspend_queue(struct nvme_queue *nvmeq) |
| 1141 | { |
| 1142 | int vector; |
| 1143 | |
| 1144 | spin_lock_irq(&nvmeq->q_lock); |
| 1145 | if (nvmeq->cq_vector == -1) { |
| 1146 | spin_unlock_irq(&nvmeq->q_lock); |
| 1147 | return 1; |
| 1148 | } |
| 1149 | vector = nvmeq->dev->entry[nvmeq->cq_vector].vector; |
| 1150 | nvmeq->dev->online_queues--; |
| 1151 | nvmeq->cq_vector = -1; |
| 1152 | spin_unlock_irq(&nvmeq->q_lock); |
| 1153 | |
| 1154 | irq_set_affinity_hint(vector, NULL); |
| 1155 | free_irq(vector, nvmeq); |
| 1156 | |
| 1157 | return 0; |
| 1158 | } |
| 1159 | |
| 1160 | static void nvme_clear_queue(struct nvme_queue *nvmeq) |
| 1161 | { |
| 1162 | struct blk_mq_hw_ctx *hctx = nvmeq->hctx; |
| 1163 | |
| 1164 | spin_lock_irq(&nvmeq->q_lock); |
| 1165 | nvme_process_cq(nvmeq); |
| 1166 | if (hctx && hctx->tags) |
| 1167 | blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq); |
| 1168 | spin_unlock_irq(&nvmeq->q_lock); |
| 1169 | } |
| 1170 | |
| 1171 | static void nvme_disable_queue(struct nvme_dev *dev, int qid) |
| 1172 | { |
| 1173 | struct nvme_queue *nvmeq = dev->queues[qid]; |
| 1174 | |
| 1175 | if (!nvmeq) |
| 1176 | return; |
| 1177 | if (nvme_suspend_queue(nvmeq)) |
| 1178 | return; |
| 1179 | |
| 1180 | /* Don't tell the adapter to delete the admin queue. |
| 1181 | * Don't tell a removed adapter to delete IO queues. */ |
| 1182 | if (qid && readl(&dev->bar->csts) != -1) { |
| 1183 | adapter_delete_sq(dev, qid); |
| 1184 | adapter_delete_cq(dev, qid); |
| 1185 | } |
| 1186 | nvme_clear_queue(nvmeq); |
| 1187 | } |
| 1188 | |
| 1189 | static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, |
| 1190 | int depth) |
| 1191 | { |
| 1192 | struct device *dmadev = &dev->pci_dev->dev; |
| 1193 | struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL); |
| 1194 | if (!nvmeq) |
| 1195 | return NULL; |
| 1196 | |
| 1197 | nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth), |
| 1198 | &nvmeq->cq_dma_addr, GFP_KERNEL); |
| 1199 | if (!nvmeq->cqes) |
| 1200 | goto free_nvmeq; |
| 1201 | |
| 1202 | nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth), |
| 1203 | &nvmeq->sq_dma_addr, GFP_KERNEL); |
| 1204 | if (!nvmeq->sq_cmds) |
| 1205 | goto free_cqdma; |
| 1206 | |
| 1207 | nvmeq->q_dmadev = dmadev; |
| 1208 | nvmeq->dev = dev; |
| 1209 | snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", |
| 1210 | dev->instance, qid); |
| 1211 | spin_lock_init(&nvmeq->q_lock); |
| 1212 | nvmeq->cq_head = 0; |
| 1213 | nvmeq->cq_phase = 1; |
| 1214 | nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; |
| 1215 | nvmeq->q_depth = depth; |
| 1216 | nvmeq->qid = qid; |
| 1217 | dev->queue_count++; |
| 1218 | dev->queues[qid] = nvmeq; |
| 1219 | |
| 1220 | return nvmeq; |
| 1221 | |
| 1222 | free_cqdma: |
| 1223 | dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes, |
| 1224 | nvmeq->cq_dma_addr); |
| 1225 | free_nvmeq: |
| 1226 | kfree(nvmeq); |
| 1227 | return NULL; |
| 1228 | } |
| 1229 | |
| 1230 | static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq, |
| 1231 | const char *name) |
| 1232 | { |
| 1233 | if (use_threaded_interrupts) |
| 1234 | return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector, |
| 1235 | nvme_irq_check, nvme_irq, IRQF_SHARED, |
| 1236 | name, nvmeq); |
| 1237 | return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq, |
| 1238 | IRQF_SHARED, name, nvmeq); |
| 1239 | } |
| 1240 | |
| 1241 | static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) |
| 1242 | { |
| 1243 | struct nvme_dev *dev = nvmeq->dev; |
| 1244 | |
| 1245 | spin_lock_irq(&nvmeq->q_lock); |
| 1246 | nvmeq->sq_tail = 0; |
| 1247 | nvmeq->cq_head = 0; |
| 1248 | nvmeq->cq_phase = 1; |
| 1249 | nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; |
| 1250 | memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); |
| 1251 | dev->online_queues++; |
| 1252 | spin_unlock_irq(&nvmeq->q_lock); |
| 1253 | } |
| 1254 | |
| 1255 | static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) |
| 1256 | { |
| 1257 | struct nvme_dev *dev = nvmeq->dev; |
| 1258 | int result; |
| 1259 | |
| 1260 | nvmeq->cq_vector = qid - 1; |
| 1261 | result = adapter_alloc_cq(dev, qid, nvmeq); |
| 1262 | if (result < 0) |
| 1263 | return result; |
| 1264 | |
| 1265 | result = adapter_alloc_sq(dev, qid, nvmeq); |
| 1266 | if (result < 0) |
| 1267 | goto release_cq; |
| 1268 | |
| 1269 | result = queue_request_irq(dev, nvmeq, nvmeq->irqname); |
| 1270 | if (result < 0) |
| 1271 | goto release_sq; |
| 1272 | |
| 1273 | nvme_init_queue(nvmeq, qid); |
| 1274 | return result; |
| 1275 | |
| 1276 | release_sq: |
| 1277 | adapter_delete_sq(dev, qid); |
| 1278 | release_cq: |
| 1279 | adapter_delete_cq(dev, qid); |
| 1280 | return result; |
| 1281 | } |
| 1282 | |
| 1283 | static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled) |
| 1284 | { |
| 1285 | unsigned long timeout; |
| 1286 | u32 bit = enabled ? NVME_CSTS_RDY : 0; |
| 1287 | |
| 1288 | timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; |
| 1289 | |
| 1290 | while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) { |
| 1291 | msleep(100); |
| 1292 | if (fatal_signal_pending(current)) |
| 1293 | return -EINTR; |
| 1294 | if (time_after(jiffies, timeout)) { |
| 1295 | dev_err(&dev->pci_dev->dev, |
| 1296 | "Device not ready; aborting %s\n", enabled ? |
| 1297 | "initialisation" : "reset"); |
| 1298 | return -ENODEV; |
| 1299 | } |
| 1300 | } |
| 1301 | |
| 1302 | return 0; |
| 1303 | } |
| 1304 | |
| 1305 | /* |
| 1306 | * If the device has been passed off to us in an enabled state, just clear |
| 1307 | * the enabled bit. The spec says we should set the 'shutdown notification |
| 1308 | * bits', but doing so may cause the device to complete commands to the |
| 1309 | * admin queue ... and we don't know what memory that might be pointing at! |
| 1310 | */ |
| 1311 | static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap) |
| 1312 | { |
| 1313 | dev->ctrl_config &= ~NVME_CC_SHN_MASK; |
| 1314 | dev->ctrl_config &= ~NVME_CC_ENABLE; |
| 1315 | writel(dev->ctrl_config, &dev->bar->cc); |
| 1316 | |
| 1317 | return nvme_wait_ready(dev, cap, false); |
| 1318 | } |
| 1319 | |
| 1320 | static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap) |
| 1321 | { |
| 1322 | dev->ctrl_config &= ~NVME_CC_SHN_MASK; |
| 1323 | dev->ctrl_config |= NVME_CC_ENABLE; |
| 1324 | writel(dev->ctrl_config, &dev->bar->cc); |
| 1325 | |
| 1326 | return nvme_wait_ready(dev, cap, true); |
| 1327 | } |
| 1328 | |
| 1329 | static int nvme_shutdown_ctrl(struct nvme_dev *dev) |
| 1330 | { |
| 1331 | unsigned long timeout; |
| 1332 | |
| 1333 | dev->ctrl_config &= ~NVME_CC_SHN_MASK; |
| 1334 | dev->ctrl_config |= NVME_CC_SHN_NORMAL; |
| 1335 | |
| 1336 | writel(dev->ctrl_config, &dev->bar->cc); |
| 1337 | |
| 1338 | timeout = SHUTDOWN_TIMEOUT + jiffies; |
| 1339 | while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) != |
| 1340 | NVME_CSTS_SHST_CMPLT) { |
| 1341 | msleep(100); |
| 1342 | if (fatal_signal_pending(current)) |
| 1343 | return -EINTR; |
| 1344 | if (time_after(jiffies, timeout)) { |
| 1345 | dev_err(&dev->pci_dev->dev, |
| 1346 | "Device shutdown incomplete; abort shutdown\n"); |
| 1347 | return -ENODEV; |
| 1348 | } |
| 1349 | } |
| 1350 | |
| 1351 | return 0; |
| 1352 | } |
| 1353 | |
| 1354 | static struct blk_mq_ops nvme_mq_admin_ops = { |
| 1355 | .queue_rq = nvme_admin_queue_rq, |
| 1356 | .map_queue = blk_mq_map_queue, |
| 1357 | .init_hctx = nvme_admin_init_hctx, |
| 1358 | .exit_hctx = nvme_exit_hctx, |
| 1359 | .init_request = nvme_admin_init_request, |
| 1360 | .timeout = nvme_timeout, |
| 1361 | }; |
| 1362 | |
| 1363 | static struct blk_mq_ops nvme_mq_ops = { |
| 1364 | .queue_rq = nvme_queue_rq, |
| 1365 | .map_queue = blk_mq_map_queue, |
| 1366 | .init_hctx = nvme_init_hctx, |
| 1367 | .exit_hctx = nvme_exit_hctx, |
| 1368 | .init_request = nvme_init_request, |
| 1369 | .timeout = nvme_timeout, |
| 1370 | }; |
| 1371 | |
| 1372 | static int nvme_alloc_admin_tags(struct nvme_dev *dev) |
| 1373 | { |
| 1374 | if (!dev->admin_q) { |
| 1375 | dev->admin_tagset.ops = &nvme_mq_admin_ops; |
| 1376 | dev->admin_tagset.nr_hw_queues = 1; |
| 1377 | dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1; |
| 1378 | dev->admin_tagset.timeout = ADMIN_TIMEOUT; |
| 1379 | dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev); |
| 1380 | dev->admin_tagset.cmd_size = sizeof(struct nvme_cmd_info); |
| 1381 | dev->admin_tagset.driver_data = dev; |
| 1382 | |
| 1383 | if (blk_mq_alloc_tag_set(&dev->admin_tagset)) |
| 1384 | return -ENOMEM; |
| 1385 | |
| 1386 | dev->admin_q = blk_mq_init_queue(&dev->admin_tagset); |
| 1387 | if (IS_ERR(dev->admin_q)) { |
| 1388 | blk_mq_free_tag_set(&dev->admin_tagset); |
| 1389 | return -ENOMEM; |
| 1390 | } |
| 1391 | } |
| 1392 | |
| 1393 | return 0; |
| 1394 | } |
| 1395 | |
| 1396 | static void nvme_free_admin_tags(struct nvme_dev *dev) |
| 1397 | { |
| 1398 | if (dev->admin_q) |
| 1399 | blk_mq_free_tag_set(&dev->admin_tagset); |
| 1400 | } |
| 1401 | |
| 1402 | static int nvme_configure_admin_queue(struct nvme_dev *dev) |
| 1403 | { |
| 1404 | int result; |
| 1405 | u32 aqa; |
| 1406 | u64 cap = readq(&dev->bar->cap); |
| 1407 | struct nvme_queue *nvmeq; |
| 1408 | unsigned page_shift = PAGE_SHIFT; |
| 1409 | unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12; |
| 1410 | unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12; |
| 1411 | |
| 1412 | if (page_shift < dev_page_min) { |
| 1413 | dev_err(&dev->pci_dev->dev, |
| 1414 | "Minimum device page size (%u) too large for " |
| 1415 | "host (%u)\n", 1 << dev_page_min, |
| 1416 | 1 << page_shift); |
| 1417 | return -ENODEV; |
| 1418 | } |
| 1419 | if (page_shift > dev_page_max) { |
| 1420 | dev_info(&dev->pci_dev->dev, |
| 1421 | "Device maximum page size (%u) smaller than " |
| 1422 | "host (%u); enabling work-around\n", |
| 1423 | 1 << dev_page_max, 1 << page_shift); |
| 1424 | page_shift = dev_page_max; |
| 1425 | } |
| 1426 | |
| 1427 | result = nvme_disable_ctrl(dev, cap); |
| 1428 | if (result < 0) |
| 1429 | return result; |
| 1430 | |
| 1431 | nvmeq = dev->queues[0]; |
| 1432 | if (!nvmeq) { |
| 1433 | nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); |
| 1434 | if (!nvmeq) |
| 1435 | return -ENOMEM; |
| 1436 | } |
| 1437 | |
| 1438 | aqa = nvmeq->q_depth - 1; |
| 1439 | aqa |= aqa << 16; |
| 1440 | |
| 1441 | dev->page_size = 1 << page_shift; |
| 1442 | |
| 1443 | dev->ctrl_config = NVME_CC_CSS_NVM; |
| 1444 | dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; |
| 1445 | dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE; |
| 1446 | dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; |
| 1447 | |
| 1448 | writel(aqa, &dev->bar->aqa); |
| 1449 | writeq(nvmeq->sq_dma_addr, &dev->bar->asq); |
| 1450 | writeq(nvmeq->cq_dma_addr, &dev->bar->acq); |
| 1451 | |
| 1452 | result = nvme_enable_ctrl(dev, cap); |
| 1453 | if (result) |
| 1454 | goto free_nvmeq; |
| 1455 | |
| 1456 | result = nvme_alloc_admin_tags(dev); |
| 1457 | if (result) |
| 1458 | goto free_nvmeq; |
| 1459 | |
| 1460 | nvmeq->cq_vector = 0; |
| 1461 | result = queue_request_irq(dev, nvmeq, nvmeq->irqname); |
| 1462 | if (result) |
| 1463 | goto free_tags; |
| 1464 | |
| 1465 | return result; |
| 1466 | |
| 1467 | free_tags: |
| 1468 | nvme_free_admin_tags(dev); |
| 1469 | free_nvmeq: |
| 1470 | nvme_free_queues(dev, 0); |
| 1471 | return result; |
| 1472 | } |
| 1473 | |
| 1474 | struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write, |
| 1475 | unsigned long addr, unsigned length) |
| 1476 | { |
| 1477 | int i, err, count, nents, offset; |
| 1478 | struct scatterlist *sg; |
| 1479 | struct page **pages; |
| 1480 | struct nvme_iod *iod; |
| 1481 | |
| 1482 | if (addr & 3) |
| 1483 | return ERR_PTR(-EINVAL); |
| 1484 | if (!length || length > INT_MAX - PAGE_SIZE) |
| 1485 | return ERR_PTR(-EINVAL); |
| 1486 | |
| 1487 | offset = offset_in_page(addr); |
| 1488 | count = DIV_ROUND_UP(offset + length, PAGE_SIZE); |
| 1489 | pages = kcalloc(count, sizeof(*pages), GFP_KERNEL); |
| 1490 | if (!pages) |
| 1491 | return ERR_PTR(-ENOMEM); |
| 1492 | |
| 1493 | err = get_user_pages_fast(addr, count, 1, pages); |
| 1494 | if (err < count) { |
| 1495 | count = err; |
| 1496 | err = -EFAULT; |
| 1497 | goto put_pages; |
| 1498 | } |
| 1499 | |
| 1500 | err = -ENOMEM; |
| 1501 | iod = nvme_alloc_iod(count, length, dev, GFP_KERNEL); |
| 1502 | if (!iod) |
| 1503 | goto put_pages; |
| 1504 | |
| 1505 | sg = iod->sg; |
| 1506 | sg_init_table(sg, count); |
| 1507 | for (i = 0; i < count; i++) { |
| 1508 | sg_set_page(&sg[i], pages[i], |
| 1509 | min_t(unsigned, length, PAGE_SIZE - offset), |
| 1510 | offset); |
| 1511 | length -= (PAGE_SIZE - offset); |
| 1512 | offset = 0; |
| 1513 | } |
| 1514 | sg_mark_end(&sg[i - 1]); |
| 1515 | iod->nents = count; |
| 1516 | |
| 1517 | nents = dma_map_sg(&dev->pci_dev->dev, sg, count, |
| 1518 | write ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1519 | if (!nents) |
| 1520 | goto free_iod; |
| 1521 | |
| 1522 | kfree(pages); |
| 1523 | return iod; |
| 1524 | |
| 1525 | free_iod: |
| 1526 | kfree(iod); |
| 1527 | put_pages: |
| 1528 | for (i = 0; i < count; i++) |
| 1529 | put_page(pages[i]); |
| 1530 | kfree(pages); |
| 1531 | return ERR_PTR(err); |
| 1532 | } |
| 1533 | |
| 1534 | void nvme_unmap_user_pages(struct nvme_dev *dev, int write, |
| 1535 | struct nvme_iod *iod) |
| 1536 | { |
| 1537 | int i; |
| 1538 | |
| 1539 | dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents, |
| 1540 | write ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1541 | |
| 1542 | for (i = 0; i < iod->nents; i++) |
| 1543 | put_page(sg_page(&iod->sg[i])); |
| 1544 | } |
| 1545 | |
| 1546 | static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) |
| 1547 | { |
| 1548 | struct nvme_dev *dev = ns->dev; |
| 1549 | struct nvme_user_io io; |
| 1550 | struct nvme_command c; |
| 1551 | unsigned length, meta_len; |
| 1552 | int status, i; |
| 1553 | struct nvme_iod *iod, *meta_iod = NULL; |
| 1554 | dma_addr_t meta_dma_addr; |
| 1555 | void *meta, *uninitialized_var(meta_mem); |
| 1556 | |
| 1557 | if (copy_from_user(&io, uio, sizeof(io))) |
| 1558 | return -EFAULT; |
| 1559 | length = (io.nblocks + 1) << ns->lba_shift; |
| 1560 | meta_len = (io.nblocks + 1) * ns->ms; |
| 1561 | |
| 1562 | if (meta_len && ((io.metadata & 3) || !io.metadata)) |
| 1563 | return -EINVAL; |
| 1564 | |
| 1565 | switch (io.opcode) { |
| 1566 | case nvme_cmd_write: |
| 1567 | case nvme_cmd_read: |
| 1568 | case nvme_cmd_compare: |
| 1569 | iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length); |
| 1570 | break; |
| 1571 | default: |
| 1572 | return -EINVAL; |
| 1573 | } |
| 1574 | |
| 1575 | if (IS_ERR(iod)) |
| 1576 | return PTR_ERR(iod); |
| 1577 | |
| 1578 | memset(&c, 0, sizeof(c)); |
| 1579 | c.rw.opcode = io.opcode; |
| 1580 | c.rw.flags = io.flags; |
| 1581 | c.rw.nsid = cpu_to_le32(ns->ns_id); |
| 1582 | c.rw.slba = cpu_to_le64(io.slba); |
| 1583 | c.rw.length = cpu_to_le16(io.nblocks); |
| 1584 | c.rw.control = cpu_to_le16(io.control); |
| 1585 | c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); |
| 1586 | c.rw.reftag = cpu_to_le32(io.reftag); |
| 1587 | c.rw.apptag = cpu_to_le16(io.apptag); |
| 1588 | c.rw.appmask = cpu_to_le16(io.appmask); |
| 1589 | |
| 1590 | if (meta_len) { |
| 1591 | meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata, |
| 1592 | meta_len); |
| 1593 | if (IS_ERR(meta_iod)) { |
| 1594 | status = PTR_ERR(meta_iod); |
| 1595 | meta_iod = NULL; |
| 1596 | goto unmap; |
| 1597 | } |
| 1598 | |
| 1599 | meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len, |
| 1600 | &meta_dma_addr, GFP_KERNEL); |
| 1601 | if (!meta_mem) { |
| 1602 | status = -ENOMEM; |
| 1603 | goto unmap; |
| 1604 | } |
| 1605 | |
| 1606 | if (io.opcode & 1) { |
| 1607 | int meta_offset = 0; |
| 1608 | |
| 1609 | for (i = 0; i < meta_iod->nents; i++) { |
| 1610 | meta = kmap_atomic(sg_page(&meta_iod->sg[i])) + |
| 1611 | meta_iod->sg[i].offset; |
| 1612 | memcpy(meta_mem + meta_offset, meta, |
| 1613 | meta_iod->sg[i].length); |
| 1614 | kunmap_atomic(meta); |
| 1615 | meta_offset += meta_iod->sg[i].length; |
| 1616 | } |
| 1617 | } |
| 1618 | |
| 1619 | c.rw.metadata = cpu_to_le64(meta_dma_addr); |
| 1620 | } |
| 1621 | |
| 1622 | length = nvme_setup_prps(dev, iod, length, GFP_KERNEL); |
| 1623 | c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); |
| 1624 | c.rw.prp2 = cpu_to_le64(iod->first_dma); |
| 1625 | |
| 1626 | if (length != (io.nblocks + 1) << ns->lba_shift) |
| 1627 | status = -ENOMEM; |
| 1628 | else |
| 1629 | status = nvme_submit_io_cmd(dev, ns, &c, NULL); |
| 1630 | |
| 1631 | if (meta_len) { |
| 1632 | if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) { |
| 1633 | int meta_offset = 0; |
| 1634 | |
| 1635 | for (i = 0; i < meta_iod->nents; i++) { |
| 1636 | meta = kmap_atomic(sg_page(&meta_iod->sg[i])) + |
| 1637 | meta_iod->sg[i].offset; |
| 1638 | memcpy(meta, meta_mem + meta_offset, |
| 1639 | meta_iod->sg[i].length); |
| 1640 | kunmap_atomic(meta); |
| 1641 | meta_offset += meta_iod->sg[i].length; |
| 1642 | } |
| 1643 | } |
| 1644 | |
| 1645 | dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem, |
| 1646 | meta_dma_addr); |
| 1647 | } |
| 1648 | |
| 1649 | unmap: |
| 1650 | nvme_unmap_user_pages(dev, io.opcode & 1, iod); |
| 1651 | nvme_free_iod(dev, iod); |
| 1652 | |
| 1653 | if (meta_iod) { |
| 1654 | nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod); |
| 1655 | nvme_free_iod(dev, meta_iod); |
| 1656 | } |
| 1657 | |
| 1658 | return status; |
| 1659 | } |
| 1660 | |
| 1661 | static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns, |
| 1662 | struct nvme_passthru_cmd __user *ucmd) |
| 1663 | { |
| 1664 | struct nvme_passthru_cmd cmd; |
| 1665 | struct nvme_command c; |
| 1666 | int status, length; |
| 1667 | struct nvme_iod *uninitialized_var(iod); |
| 1668 | unsigned timeout; |
| 1669 | |
| 1670 | if (!capable(CAP_SYS_ADMIN)) |
| 1671 | return -EACCES; |
| 1672 | if (copy_from_user(&cmd, ucmd, sizeof(cmd))) |
| 1673 | return -EFAULT; |
| 1674 | |
| 1675 | memset(&c, 0, sizeof(c)); |
| 1676 | c.common.opcode = cmd.opcode; |
| 1677 | c.common.flags = cmd.flags; |
| 1678 | c.common.nsid = cpu_to_le32(cmd.nsid); |
| 1679 | c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); |
| 1680 | c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); |
| 1681 | c.common.cdw10[0] = cpu_to_le32(cmd.cdw10); |
| 1682 | c.common.cdw10[1] = cpu_to_le32(cmd.cdw11); |
| 1683 | c.common.cdw10[2] = cpu_to_le32(cmd.cdw12); |
| 1684 | c.common.cdw10[3] = cpu_to_le32(cmd.cdw13); |
| 1685 | c.common.cdw10[4] = cpu_to_le32(cmd.cdw14); |
| 1686 | c.common.cdw10[5] = cpu_to_le32(cmd.cdw15); |
| 1687 | |
| 1688 | length = cmd.data_len; |
| 1689 | if (cmd.data_len) { |
| 1690 | iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr, |
| 1691 | length); |
| 1692 | if (IS_ERR(iod)) |
| 1693 | return PTR_ERR(iod); |
| 1694 | length = nvme_setup_prps(dev, iod, length, GFP_KERNEL); |
| 1695 | c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); |
| 1696 | c.common.prp2 = cpu_to_le64(iod->first_dma); |
| 1697 | } |
| 1698 | |
| 1699 | timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) : |
| 1700 | ADMIN_TIMEOUT; |
| 1701 | |
| 1702 | if (length != cmd.data_len) |
| 1703 | status = -ENOMEM; |
| 1704 | else if (ns) { |
| 1705 | struct request *req; |
| 1706 | |
| 1707 | req = blk_mq_alloc_request(ns->queue, WRITE, |
| 1708 | (GFP_KERNEL|__GFP_WAIT), false); |
| 1709 | if (IS_ERR(req)) |
| 1710 | status = PTR_ERR(req); |
| 1711 | else { |
| 1712 | status = nvme_submit_sync_cmd(req, &c, &cmd.result, |
| 1713 | timeout); |
| 1714 | blk_mq_free_request(req); |
| 1715 | } |
| 1716 | } else |
| 1717 | status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout); |
| 1718 | |
| 1719 | if (cmd.data_len) { |
| 1720 | nvme_unmap_user_pages(dev, cmd.opcode & 1, iod); |
| 1721 | nvme_free_iod(dev, iod); |
| 1722 | } |
| 1723 | |
| 1724 | if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result, |
| 1725 | sizeof(cmd.result))) |
| 1726 | status = -EFAULT; |
| 1727 | |
| 1728 | return status; |
| 1729 | } |
| 1730 | |
| 1731 | static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, |
| 1732 | unsigned long arg) |
| 1733 | { |
| 1734 | struct nvme_ns *ns = bdev->bd_disk->private_data; |
| 1735 | |
| 1736 | switch (cmd) { |
| 1737 | case NVME_IOCTL_ID: |
| 1738 | force_successful_syscall_return(); |
| 1739 | return ns->ns_id; |
| 1740 | case NVME_IOCTL_ADMIN_CMD: |
| 1741 | return nvme_user_cmd(ns->dev, NULL, (void __user *)arg); |
| 1742 | case NVME_IOCTL_IO_CMD: |
| 1743 | return nvme_user_cmd(ns->dev, ns, (void __user *)arg); |
| 1744 | case NVME_IOCTL_SUBMIT_IO: |
| 1745 | return nvme_submit_io(ns, (void __user *)arg); |
| 1746 | case SG_GET_VERSION_NUM: |
| 1747 | return nvme_sg_get_version_num((void __user *)arg); |
| 1748 | case SG_IO: |
| 1749 | return nvme_sg_io(ns, (void __user *)arg); |
| 1750 | default: |
| 1751 | return -ENOTTY; |
| 1752 | } |
| 1753 | } |
| 1754 | |
| 1755 | #ifdef CONFIG_COMPAT |
| 1756 | static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode, |
| 1757 | unsigned int cmd, unsigned long arg) |
| 1758 | { |
| 1759 | switch (cmd) { |
| 1760 | case SG_IO: |
| 1761 | return -ENOIOCTLCMD; |
| 1762 | } |
| 1763 | return nvme_ioctl(bdev, mode, cmd, arg); |
| 1764 | } |
| 1765 | #else |
| 1766 | #define nvme_compat_ioctl NULL |
| 1767 | #endif |
| 1768 | |
| 1769 | static int nvme_open(struct block_device *bdev, fmode_t mode) |
| 1770 | { |
| 1771 | int ret = 0; |
| 1772 | struct nvme_ns *ns; |
| 1773 | |
| 1774 | spin_lock(&dev_list_lock); |
| 1775 | ns = bdev->bd_disk->private_data; |
| 1776 | if (!ns) |
| 1777 | ret = -ENXIO; |
| 1778 | else if (!kref_get_unless_zero(&ns->dev->kref)) |
| 1779 | ret = -ENXIO; |
| 1780 | spin_unlock(&dev_list_lock); |
| 1781 | |
| 1782 | return ret; |
| 1783 | } |
| 1784 | |
| 1785 | static void nvme_free_dev(struct kref *kref); |
| 1786 | |
| 1787 | static void nvme_release(struct gendisk *disk, fmode_t mode) |
| 1788 | { |
| 1789 | struct nvme_ns *ns = disk->private_data; |
| 1790 | struct nvme_dev *dev = ns->dev; |
| 1791 | |
| 1792 | kref_put(&dev->kref, nvme_free_dev); |
| 1793 | } |
| 1794 | |
| 1795 | static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo) |
| 1796 | { |
| 1797 | /* some standard values */ |
| 1798 | geo->heads = 1 << 6; |
| 1799 | geo->sectors = 1 << 5; |
| 1800 | geo->cylinders = get_capacity(bd->bd_disk) >> 11; |
| 1801 | return 0; |
| 1802 | } |
| 1803 | |
| 1804 | static int nvme_revalidate_disk(struct gendisk *disk) |
| 1805 | { |
| 1806 | struct nvme_ns *ns = disk->private_data; |
| 1807 | struct nvme_dev *dev = ns->dev; |
| 1808 | struct nvme_id_ns *id; |
| 1809 | dma_addr_t dma_addr; |
| 1810 | int lbaf; |
| 1811 | |
| 1812 | id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr, |
| 1813 | GFP_KERNEL); |
| 1814 | if (!id) { |
| 1815 | dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n", |
| 1816 | __func__); |
| 1817 | return 0; |
| 1818 | } |
| 1819 | |
| 1820 | if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) |
| 1821 | goto free; |
| 1822 | |
| 1823 | lbaf = id->flbas & 0xf; |
| 1824 | ns->lba_shift = id->lbaf[lbaf].ds; |
| 1825 | |
| 1826 | blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); |
| 1827 | set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9)); |
| 1828 | free: |
| 1829 | dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr); |
| 1830 | return 0; |
| 1831 | } |
| 1832 | |
| 1833 | static const struct block_device_operations nvme_fops = { |
| 1834 | .owner = THIS_MODULE, |
| 1835 | .ioctl = nvme_ioctl, |
| 1836 | .compat_ioctl = nvme_compat_ioctl, |
| 1837 | .open = nvme_open, |
| 1838 | .release = nvme_release, |
| 1839 | .getgeo = nvme_getgeo, |
| 1840 | .revalidate_disk= nvme_revalidate_disk, |
| 1841 | }; |
| 1842 | |
| 1843 | static int nvme_kthread(void *data) |
| 1844 | { |
| 1845 | struct nvme_dev *dev, *next; |
| 1846 | |
| 1847 | while (!kthread_should_stop()) { |
| 1848 | set_current_state(TASK_INTERRUPTIBLE); |
| 1849 | spin_lock(&dev_list_lock); |
| 1850 | list_for_each_entry_safe(dev, next, &dev_list, node) { |
| 1851 | int i; |
| 1852 | if (readl(&dev->bar->csts) & NVME_CSTS_CFS && |
| 1853 | dev->initialized) { |
| 1854 | if (work_busy(&dev->reset_work)) |
| 1855 | continue; |
| 1856 | list_del_init(&dev->node); |
| 1857 | dev_warn(&dev->pci_dev->dev, |
| 1858 | "Failed status: %x, reset controller\n", |
| 1859 | readl(&dev->bar->csts)); |
| 1860 | dev->reset_workfn = nvme_reset_failed_dev; |
| 1861 | queue_work(nvme_workq, &dev->reset_work); |
| 1862 | continue; |
| 1863 | } |
| 1864 | for (i = 0; i < dev->queue_count; i++) { |
| 1865 | struct nvme_queue *nvmeq = dev->queues[i]; |
| 1866 | if (!nvmeq) |
| 1867 | continue; |
| 1868 | spin_lock_irq(&nvmeq->q_lock); |
| 1869 | nvme_process_cq(nvmeq); |
| 1870 | |
| 1871 | while ((i == 0) && (dev->event_limit > 0)) { |
| 1872 | if (nvme_submit_async_admin_req(dev)) |
| 1873 | break; |
| 1874 | dev->event_limit--; |
| 1875 | } |
| 1876 | spin_unlock_irq(&nvmeq->q_lock); |
| 1877 | } |
| 1878 | } |
| 1879 | spin_unlock(&dev_list_lock); |
| 1880 | schedule_timeout(round_jiffies_relative(HZ)); |
| 1881 | } |
| 1882 | return 0; |
| 1883 | } |
| 1884 | |
| 1885 | static void nvme_config_discard(struct nvme_ns *ns) |
| 1886 | { |
| 1887 | u32 logical_block_size = queue_logical_block_size(ns->queue); |
| 1888 | ns->queue->limits.discard_zeroes_data = 0; |
| 1889 | ns->queue->limits.discard_alignment = logical_block_size; |
| 1890 | ns->queue->limits.discard_granularity = logical_block_size; |
| 1891 | ns->queue->limits.max_discard_sectors = 0xffffffff; |
| 1892 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue); |
| 1893 | } |
| 1894 | |
| 1895 | static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid, |
| 1896 | struct nvme_id_ns *id, struct nvme_lba_range_type *rt) |
| 1897 | { |
| 1898 | struct nvme_ns *ns; |
| 1899 | struct gendisk *disk; |
| 1900 | int node = dev_to_node(&dev->pci_dev->dev); |
| 1901 | int lbaf; |
| 1902 | |
| 1903 | if (rt->attributes & NVME_LBART_ATTRIB_HIDE) |
| 1904 | return NULL; |
| 1905 | |
| 1906 | ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); |
| 1907 | if (!ns) |
| 1908 | return NULL; |
| 1909 | ns->queue = blk_mq_init_queue(&dev->tagset); |
| 1910 | if (IS_ERR(ns->queue)) |
| 1911 | goto out_free_ns; |
| 1912 | queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue); |
| 1913 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue); |
| 1914 | queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue); |
| 1915 | ns->dev = dev; |
| 1916 | ns->queue->queuedata = ns; |
| 1917 | |
| 1918 | disk = alloc_disk_node(0, node); |
| 1919 | if (!disk) |
| 1920 | goto out_free_queue; |
| 1921 | |
| 1922 | ns->ns_id = nsid; |
| 1923 | ns->disk = disk; |
| 1924 | lbaf = id->flbas & 0xf; |
| 1925 | ns->lba_shift = id->lbaf[lbaf].ds; |
| 1926 | ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); |
| 1927 | blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); |
| 1928 | if (dev->max_hw_sectors) |
| 1929 | blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors); |
| 1930 | if (dev->stripe_size) |
| 1931 | blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9); |
| 1932 | if (dev->vwc & NVME_CTRL_VWC_PRESENT) |
| 1933 | blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA); |
| 1934 | |
| 1935 | disk->major = nvme_major; |
| 1936 | disk->first_minor = 0; |
| 1937 | disk->fops = &nvme_fops; |
| 1938 | disk->private_data = ns; |
| 1939 | disk->queue = ns->queue; |
| 1940 | disk->driverfs_dev = &dev->pci_dev->dev; |
| 1941 | disk->flags = GENHD_FL_EXT_DEVT; |
| 1942 | sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid); |
| 1943 | set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9)); |
| 1944 | |
| 1945 | if (dev->oncs & NVME_CTRL_ONCS_DSM) |
| 1946 | nvme_config_discard(ns); |
| 1947 | |
| 1948 | return ns; |
| 1949 | |
| 1950 | out_free_queue: |
| 1951 | blk_cleanup_queue(ns->queue); |
| 1952 | out_free_ns: |
| 1953 | kfree(ns); |
| 1954 | return NULL; |
| 1955 | } |
| 1956 | |
| 1957 | static void nvme_create_io_queues(struct nvme_dev *dev) |
| 1958 | { |
| 1959 | unsigned i; |
| 1960 | |
| 1961 | for (i = dev->queue_count; i <= dev->max_qid; i++) |
| 1962 | if (!nvme_alloc_queue(dev, i, dev->q_depth)) |
| 1963 | break; |
| 1964 | |
| 1965 | for (i = dev->online_queues; i <= dev->queue_count - 1; i++) |
| 1966 | if (nvme_create_queue(dev->queues[i], i)) |
| 1967 | break; |
| 1968 | } |
| 1969 | |
| 1970 | static int set_queue_count(struct nvme_dev *dev, int count) |
| 1971 | { |
| 1972 | int status; |
| 1973 | u32 result; |
| 1974 | u32 q_count = (count - 1) | ((count - 1) << 16); |
| 1975 | |
| 1976 | status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0, |
| 1977 | &result); |
| 1978 | if (status < 0) |
| 1979 | return status; |
| 1980 | if (status > 0) { |
| 1981 | dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n", |
| 1982 | status); |
| 1983 | return 0; |
| 1984 | } |
| 1985 | return min(result & 0xffff, result >> 16) + 1; |
| 1986 | } |
| 1987 | |
| 1988 | static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) |
| 1989 | { |
| 1990 | return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); |
| 1991 | } |
| 1992 | |
| 1993 | static int nvme_setup_io_queues(struct nvme_dev *dev) |
| 1994 | { |
| 1995 | struct nvme_queue *adminq = dev->queues[0]; |
| 1996 | struct pci_dev *pdev = dev->pci_dev; |
| 1997 | int result, i, vecs, nr_io_queues, size; |
| 1998 | |
| 1999 | nr_io_queues = num_possible_cpus(); |
| 2000 | result = set_queue_count(dev, nr_io_queues); |
| 2001 | if (result <= 0) |
| 2002 | return result; |
| 2003 | if (result < nr_io_queues) |
| 2004 | nr_io_queues = result; |
| 2005 | |
| 2006 | size = db_bar_size(dev, nr_io_queues); |
| 2007 | if (size > 8192) { |
| 2008 | iounmap(dev->bar); |
| 2009 | do { |
| 2010 | dev->bar = ioremap(pci_resource_start(pdev, 0), size); |
| 2011 | if (dev->bar) |
| 2012 | break; |
| 2013 | if (!--nr_io_queues) |
| 2014 | return -ENOMEM; |
| 2015 | size = db_bar_size(dev, nr_io_queues); |
| 2016 | } while (1); |
| 2017 | dev->dbs = ((void __iomem *)dev->bar) + 4096; |
| 2018 | adminq->q_db = dev->dbs; |
| 2019 | } |
| 2020 | |
| 2021 | /* Deregister the admin queue's interrupt */ |
| 2022 | free_irq(dev->entry[0].vector, adminq); |
| 2023 | |
| 2024 | /* |
| 2025 | * If we enable msix early due to not intx, disable it again before |
| 2026 | * setting up the full range we need. |
| 2027 | */ |
| 2028 | if (!pdev->irq) |
| 2029 | pci_disable_msix(pdev); |
| 2030 | |
| 2031 | for (i = 0; i < nr_io_queues; i++) |
| 2032 | dev->entry[i].entry = i; |
| 2033 | vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues); |
| 2034 | if (vecs < 0) { |
| 2035 | vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32)); |
| 2036 | if (vecs < 0) { |
| 2037 | vecs = 1; |
| 2038 | } else { |
| 2039 | for (i = 0; i < vecs; i++) |
| 2040 | dev->entry[i].vector = i + pdev->irq; |
| 2041 | } |
| 2042 | } |
| 2043 | |
| 2044 | /* |
| 2045 | * Should investigate if there's a performance win from allocating |
| 2046 | * more queues than interrupt vectors; it might allow the submission |
| 2047 | * path to scale better, even if the receive path is limited by the |
| 2048 | * number of interrupts. |
| 2049 | */ |
| 2050 | nr_io_queues = vecs; |
| 2051 | dev->max_qid = nr_io_queues; |
| 2052 | |
| 2053 | result = queue_request_irq(dev, adminq, adminq->irqname); |
| 2054 | if (result) |
| 2055 | goto free_queues; |
| 2056 | |
| 2057 | /* Free previously allocated queues that are no longer usable */ |
| 2058 | nvme_free_queues(dev, nr_io_queues + 1); |
| 2059 | nvme_create_io_queues(dev); |
| 2060 | |
| 2061 | return 0; |
| 2062 | |
| 2063 | free_queues: |
| 2064 | nvme_free_queues(dev, 1); |
| 2065 | return result; |
| 2066 | } |
| 2067 | |
| 2068 | /* |
| 2069 | * Return: error value if an error occurred setting up the queues or calling |
| 2070 | * Identify Device. 0 if these succeeded, even if adding some of the |
| 2071 | * namespaces failed. At the moment, these failures are silent. TBD which |
| 2072 | * failures should be reported. |
| 2073 | */ |
| 2074 | static int nvme_dev_add(struct nvme_dev *dev) |
| 2075 | { |
| 2076 | struct pci_dev *pdev = dev->pci_dev; |
| 2077 | int res; |
| 2078 | unsigned nn, i; |
| 2079 | struct nvme_ns *ns; |
| 2080 | struct nvme_id_ctrl *ctrl; |
| 2081 | struct nvme_id_ns *id_ns; |
| 2082 | void *mem; |
| 2083 | dma_addr_t dma_addr; |
| 2084 | int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12; |
| 2085 | |
| 2086 | mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL); |
| 2087 | if (!mem) |
| 2088 | return -ENOMEM; |
| 2089 | |
| 2090 | res = nvme_identify(dev, 0, 1, dma_addr); |
| 2091 | if (res) { |
| 2092 | dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res); |
| 2093 | res = -EIO; |
| 2094 | goto out; |
| 2095 | } |
| 2096 | |
| 2097 | ctrl = mem; |
| 2098 | nn = le32_to_cpup(&ctrl->nn); |
| 2099 | dev->oncs = le16_to_cpup(&ctrl->oncs); |
| 2100 | dev->abort_limit = ctrl->acl + 1; |
| 2101 | dev->vwc = ctrl->vwc; |
| 2102 | dev->event_limit = min(ctrl->aerl + 1, 8); |
| 2103 | memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn)); |
| 2104 | memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn)); |
| 2105 | memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr)); |
| 2106 | if (ctrl->mdts) |
| 2107 | dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9); |
| 2108 | if ((pdev->vendor == PCI_VENDOR_ID_INTEL) && |
| 2109 | (pdev->device == 0x0953) && ctrl->vs[3]) { |
| 2110 | unsigned int max_hw_sectors; |
| 2111 | |
| 2112 | dev->stripe_size = 1 << (ctrl->vs[3] + shift); |
| 2113 | max_hw_sectors = dev->stripe_size >> (shift - 9); |
| 2114 | if (dev->max_hw_sectors) { |
| 2115 | dev->max_hw_sectors = min(max_hw_sectors, |
| 2116 | dev->max_hw_sectors); |
| 2117 | } else |
| 2118 | dev->max_hw_sectors = max_hw_sectors; |
| 2119 | } |
| 2120 | |
| 2121 | dev->tagset.ops = &nvme_mq_ops; |
| 2122 | dev->tagset.nr_hw_queues = dev->online_queues - 1; |
| 2123 | dev->tagset.timeout = NVME_IO_TIMEOUT; |
| 2124 | dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev); |
| 2125 | dev->tagset.queue_depth = |
| 2126 | min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; |
| 2127 | dev->tagset.cmd_size = sizeof(struct nvme_cmd_info); |
| 2128 | dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; |
| 2129 | dev->tagset.driver_data = dev; |
| 2130 | |
| 2131 | if (blk_mq_alloc_tag_set(&dev->tagset)) |
| 2132 | goto out; |
| 2133 | |
| 2134 | id_ns = mem; |
| 2135 | for (i = 1; i <= nn; i++) { |
| 2136 | res = nvme_identify(dev, i, 0, dma_addr); |
| 2137 | if (res) |
| 2138 | continue; |
| 2139 | |
| 2140 | if (id_ns->ncap == 0) |
| 2141 | continue; |
| 2142 | |
| 2143 | res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i, |
| 2144 | dma_addr + 4096, NULL); |
| 2145 | if (res) |
| 2146 | memset(mem + 4096, 0, 4096); |
| 2147 | |
| 2148 | ns = nvme_alloc_ns(dev, i, mem, mem + 4096); |
| 2149 | if (ns) |
| 2150 | list_add_tail(&ns->list, &dev->namespaces); |
| 2151 | } |
| 2152 | list_for_each_entry(ns, &dev->namespaces, list) |
| 2153 | add_disk(ns->disk); |
| 2154 | res = 0; |
| 2155 | |
| 2156 | out: |
| 2157 | dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr); |
| 2158 | return res; |
| 2159 | } |
| 2160 | |
| 2161 | static int nvme_dev_map(struct nvme_dev *dev) |
| 2162 | { |
| 2163 | u64 cap; |
| 2164 | int bars, result = -ENOMEM; |
| 2165 | struct pci_dev *pdev = dev->pci_dev; |
| 2166 | |
| 2167 | if (pci_enable_device_mem(pdev)) |
| 2168 | return result; |
| 2169 | |
| 2170 | dev->entry[0].vector = pdev->irq; |
| 2171 | pci_set_master(pdev); |
| 2172 | bars = pci_select_bars(pdev, IORESOURCE_MEM); |
| 2173 | if (!bars) |
| 2174 | goto disable_pci; |
| 2175 | |
| 2176 | if (pci_request_selected_regions(pdev, bars, "nvme")) |
| 2177 | goto disable_pci; |
| 2178 | |
| 2179 | if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) && |
| 2180 | dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) |
| 2181 | goto disable; |
| 2182 | |
| 2183 | dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); |
| 2184 | if (!dev->bar) |
| 2185 | goto disable; |
| 2186 | |
| 2187 | if (readl(&dev->bar->csts) == -1) { |
| 2188 | result = -ENODEV; |
| 2189 | goto unmap; |
| 2190 | } |
| 2191 | |
| 2192 | /* |
| 2193 | * Some devices don't advertse INTx interrupts, pre-enable a single |
| 2194 | * MSIX vec for setup. We'll adjust this later. |
| 2195 | */ |
| 2196 | if (!pdev->irq) { |
| 2197 | result = pci_enable_msix(pdev, dev->entry, 1); |
| 2198 | if (result < 0) |
| 2199 | goto unmap; |
| 2200 | } |
| 2201 | |
| 2202 | cap = readq(&dev->bar->cap); |
| 2203 | dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); |
| 2204 | dev->db_stride = 1 << NVME_CAP_STRIDE(cap); |
| 2205 | dev->dbs = ((void __iomem *)dev->bar) + 4096; |
| 2206 | |
| 2207 | return 0; |
| 2208 | |
| 2209 | unmap: |
| 2210 | iounmap(dev->bar); |
| 2211 | dev->bar = NULL; |
| 2212 | disable: |
| 2213 | pci_release_regions(pdev); |
| 2214 | disable_pci: |
| 2215 | pci_disable_device(pdev); |
| 2216 | return result; |
| 2217 | } |
| 2218 | |
| 2219 | static void nvme_dev_unmap(struct nvme_dev *dev) |
| 2220 | { |
| 2221 | if (dev->pci_dev->msi_enabled) |
| 2222 | pci_disable_msi(dev->pci_dev); |
| 2223 | else if (dev->pci_dev->msix_enabled) |
| 2224 | pci_disable_msix(dev->pci_dev); |
| 2225 | |
| 2226 | if (dev->bar) { |
| 2227 | iounmap(dev->bar); |
| 2228 | dev->bar = NULL; |
| 2229 | pci_release_regions(dev->pci_dev); |
| 2230 | } |
| 2231 | |
| 2232 | if (pci_is_enabled(dev->pci_dev)) |
| 2233 | pci_disable_device(dev->pci_dev); |
| 2234 | } |
| 2235 | |
| 2236 | struct nvme_delq_ctx { |
| 2237 | struct task_struct *waiter; |
| 2238 | struct kthread_worker *worker; |
| 2239 | atomic_t refcount; |
| 2240 | }; |
| 2241 | |
| 2242 | static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev) |
| 2243 | { |
| 2244 | dq->waiter = current; |
| 2245 | mb(); |
| 2246 | |
| 2247 | for (;;) { |
| 2248 | set_current_state(TASK_KILLABLE); |
| 2249 | if (!atomic_read(&dq->refcount)) |
| 2250 | break; |
| 2251 | if (!schedule_timeout(ADMIN_TIMEOUT) || |
| 2252 | fatal_signal_pending(current)) { |
| 2253 | set_current_state(TASK_RUNNING); |
| 2254 | |
| 2255 | nvme_disable_ctrl(dev, readq(&dev->bar->cap)); |
| 2256 | nvme_disable_queue(dev, 0); |
| 2257 | |
| 2258 | send_sig(SIGKILL, dq->worker->task, 1); |
| 2259 | flush_kthread_worker(dq->worker); |
| 2260 | return; |
| 2261 | } |
| 2262 | } |
| 2263 | set_current_state(TASK_RUNNING); |
| 2264 | } |
| 2265 | |
| 2266 | static void nvme_put_dq(struct nvme_delq_ctx *dq) |
| 2267 | { |
| 2268 | atomic_dec(&dq->refcount); |
| 2269 | if (dq->waiter) |
| 2270 | wake_up_process(dq->waiter); |
| 2271 | } |
| 2272 | |
| 2273 | static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq) |
| 2274 | { |
| 2275 | atomic_inc(&dq->refcount); |
| 2276 | return dq; |
| 2277 | } |
| 2278 | |
| 2279 | static void nvme_del_queue_end(struct nvme_queue *nvmeq) |
| 2280 | { |
| 2281 | struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx; |
| 2282 | |
| 2283 | nvme_clear_queue(nvmeq); |
| 2284 | nvme_put_dq(dq); |
| 2285 | } |
| 2286 | |
| 2287 | static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode, |
| 2288 | kthread_work_func_t fn) |
| 2289 | { |
| 2290 | struct nvme_command c; |
| 2291 | |
| 2292 | memset(&c, 0, sizeof(c)); |
| 2293 | c.delete_queue.opcode = opcode; |
| 2294 | c.delete_queue.qid = cpu_to_le16(nvmeq->qid); |
| 2295 | |
| 2296 | init_kthread_work(&nvmeq->cmdinfo.work, fn); |
| 2297 | return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo, |
| 2298 | ADMIN_TIMEOUT); |
| 2299 | } |
| 2300 | |
| 2301 | static void nvme_del_cq_work_handler(struct kthread_work *work) |
| 2302 | { |
| 2303 | struct nvme_queue *nvmeq = container_of(work, struct nvme_queue, |
| 2304 | cmdinfo.work); |
| 2305 | nvme_del_queue_end(nvmeq); |
| 2306 | } |
| 2307 | |
| 2308 | static int nvme_delete_cq(struct nvme_queue *nvmeq) |
| 2309 | { |
| 2310 | return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq, |
| 2311 | nvme_del_cq_work_handler); |
| 2312 | } |
| 2313 | |
| 2314 | static void nvme_del_sq_work_handler(struct kthread_work *work) |
| 2315 | { |
| 2316 | struct nvme_queue *nvmeq = container_of(work, struct nvme_queue, |
| 2317 | cmdinfo.work); |
| 2318 | int status = nvmeq->cmdinfo.status; |
| 2319 | |
| 2320 | if (!status) |
| 2321 | status = nvme_delete_cq(nvmeq); |
| 2322 | if (status) |
| 2323 | nvme_del_queue_end(nvmeq); |
| 2324 | } |
| 2325 | |
| 2326 | static int nvme_delete_sq(struct nvme_queue *nvmeq) |
| 2327 | { |
| 2328 | return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq, |
| 2329 | nvme_del_sq_work_handler); |
| 2330 | } |
| 2331 | |
| 2332 | static void nvme_del_queue_start(struct kthread_work *work) |
| 2333 | { |
| 2334 | struct nvme_queue *nvmeq = container_of(work, struct nvme_queue, |
| 2335 | cmdinfo.work); |
| 2336 | allow_signal(SIGKILL); |
| 2337 | if (nvme_delete_sq(nvmeq)) |
| 2338 | nvme_del_queue_end(nvmeq); |
| 2339 | } |
| 2340 | |
| 2341 | static void nvme_disable_io_queues(struct nvme_dev *dev) |
| 2342 | { |
| 2343 | int i; |
| 2344 | DEFINE_KTHREAD_WORKER_ONSTACK(worker); |
| 2345 | struct nvme_delq_ctx dq; |
| 2346 | struct task_struct *kworker_task = kthread_run(kthread_worker_fn, |
| 2347 | &worker, "nvme%d", dev->instance); |
| 2348 | |
| 2349 | if (IS_ERR(kworker_task)) { |
| 2350 | dev_err(&dev->pci_dev->dev, |
| 2351 | "Failed to create queue del task\n"); |
| 2352 | for (i = dev->queue_count - 1; i > 0; i--) |
| 2353 | nvme_disable_queue(dev, i); |
| 2354 | return; |
| 2355 | } |
| 2356 | |
| 2357 | dq.waiter = NULL; |
| 2358 | atomic_set(&dq.refcount, 0); |
| 2359 | dq.worker = &worker; |
| 2360 | for (i = dev->queue_count - 1; i > 0; i--) { |
| 2361 | struct nvme_queue *nvmeq = dev->queues[i]; |
| 2362 | |
| 2363 | if (nvme_suspend_queue(nvmeq)) |
| 2364 | continue; |
| 2365 | nvmeq->cmdinfo.ctx = nvme_get_dq(&dq); |
| 2366 | nvmeq->cmdinfo.worker = dq.worker; |
| 2367 | init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start); |
| 2368 | queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work); |
| 2369 | } |
| 2370 | nvme_wait_dq(&dq, dev); |
| 2371 | kthread_stop(kworker_task); |
| 2372 | } |
| 2373 | |
| 2374 | /* |
| 2375 | * Remove the node from the device list and check |
| 2376 | * for whether or not we need to stop the nvme_thread. |
| 2377 | */ |
| 2378 | static void nvme_dev_list_remove(struct nvme_dev *dev) |
| 2379 | { |
| 2380 | struct task_struct *tmp = NULL; |
| 2381 | |
| 2382 | spin_lock(&dev_list_lock); |
| 2383 | list_del_init(&dev->node); |
| 2384 | if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) { |
| 2385 | tmp = nvme_thread; |
| 2386 | nvme_thread = NULL; |
| 2387 | } |
| 2388 | spin_unlock(&dev_list_lock); |
| 2389 | |
| 2390 | if (tmp) |
| 2391 | kthread_stop(tmp); |
| 2392 | } |
| 2393 | |
| 2394 | static void nvme_dev_shutdown(struct nvme_dev *dev) |
| 2395 | { |
| 2396 | int i; |
| 2397 | u32 csts = -1; |
| 2398 | |
| 2399 | dev->initialized = 0; |
| 2400 | nvme_dev_list_remove(dev); |
| 2401 | |
| 2402 | if (dev->bar) |
| 2403 | csts = readl(&dev->bar->csts); |
| 2404 | if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) { |
| 2405 | for (i = dev->queue_count - 1; i >= 0; i--) { |
| 2406 | struct nvme_queue *nvmeq = dev->queues[i]; |
| 2407 | nvme_suspend_queue(nvmeq); |
| 2408 | nvme_clear_queue(nvmeq); |
| 2409 | } |
| 2410 | } else { |
| 2411 | nvme_disable_io_queues(dev); |
| 2412 | nvme_shutdown_ctrl(dev); |
| 2413 | nvme_disable_queue(dev, 0); |
| 2414 | } |
| 2415 | nvme_dev_unmap(dev); |
| 2416 | } |
| 2417 | |
| 2418 | static void nvme_dev_remove_admin(struct nvme_dev *dev) |
| 2419 | { |
| 2420 | if (dev->admin_q && !blk_queue_dying(dev->admin_q)) |
| 2421 | blk_cleanup_queue(dev->admin_q); |
| 2422 | } |
| 2423 | |
| 2424 | static void nvme_dev_remove(struct nvme_dev *dev) |
| 2425 | { |
| 2426 | struct nvme_ns *ns; |
| 2427 | |
| 2428 | list_for_each_entry(ns, &dev->namespaces, list) { |
| 2429 | if (ns->disk->flags & GENHD_FL_UP) |
| 2430 | del_gendisk(ns->disk); |
| 2431 | if (!blk_queue_dying(ns->queue)) |
| 2432 | blk_cleanup_queue(ns->queue); |
| 2433 | } |
| 2434 | } |
| 2435 | |
| 2436 | static int nvme_setup_prp_pools(struct nvme_dev *dev) |
| 2437 | { |
| 2438 | struct device *dmadev = &dev->pci_dev->dev; |
| 2439 | dev->prp_page_pool = dma_pool_create("prp list page", dmadev, |
| 2440 | PAGE_SIZE, PAGE_SIZE, 0); |
| 2441 | if (!dev->prp_page_pool) |
| 2442 | return -ENOMEM; |
| 2443 | |
| 2444 | /* Optimisation for I/Os between 4k and 128k */ |
| 2445 | dev->prp_small_pool = dma_pool_create("prp list 256", dmadev, |
| 2446 | 256, 256, 0); |
| 2447 | if (!dev->prp_small_pool) { |
| 2448 | dma_pool_destroy(dev->prp_page_pool); |
| 2449 | return -ENOMEM; |
| 2450 | } |
| 2451 | return 0; |
| 2452 | } |
| 2453 | |
| 2454 | static void nvme_release_prp_pools(struct nvme_dev *dev) |
| 2455 | { |
| 2456 | dma_pool_destroy(dev->prp_page_pool); |
| 2457 | dma_pool_destroy(dev->prp_small_pool); |
| 2458 | } |
| 2459 | |
| 2460 | static DEFINE_IDA(nvme_instance_ida); |
| 2461 | |
| 2462 | static int nvme_set_instance(struct nvme_dev *dev) |
| 2463 | { |
| 2464 | int instance, error; |
| 2465 | |
| 2466 | do { |
| 2467 | if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL)) |
| 2468 | return -ENODEV; |
| 2469 | |
| 2470 | spin_lock(&dev_list_lock); |
| 2471 | error = ida_get_new(&nvme_instance_ida, &instance); |
| 2472 | spin_unlock(&dev_list_lock); |
| 2473 | } while (error == -EAGAIN); |
| 2474 | |
| 2475 | if (error) |
| 2476 | return -ENODEV; |
| 2477 | |
| 2478 | dev->instance = instance; |
| 2479 | return 0; |
| 2480 | } |
| 2481 | |
| 2482 | static void nvme_release_instance(struct nvme_dev *dev) |
| 2483 | { |
| 2484 | spin_lock(&dev_list_lock); |
| 2485 | ida_remove(&nvme_instance_ida, dev->instance); |
| 2486 | spin_unlock(&dev_list_lock); |
| 2487 | } |
| 2488 | |
| 2489 | static void nvme_free_namespaces(struct nvme_dev *dev) |
| 2490 | { |
| 2491 | struct nvme_ns *ns, *next; |
| 2492 | |
| 2493 | list_for_each_entry_safe(ns, next, &dev->namespaces, list) { |
| 2494 | list_del(&ns->list); |
| 2495 | |
| 2496 | spin_lock(&dev_list_lock); |
| 2497 | ns->disk->private_data = NULL; |
| 2498 | spin_unlock(&dev_list_lock); |
| 2499 | |
| 2500 | put_disk(ns->disk); |
| 2501 | kfree(ns); |
| 2502 | } |
| 2503 | } |
| 2504 | |
| 2505 | static void nvme_free_dev(struct kref *kref) |
| 2506 | { |
| 2507 | struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref); |
| 2508 | |
| 2509 | pci_dev_put(dev->pci_dev); |
| 2510 | nvme_free_namespaces(dev); |
| 2511 | nvme_release_instance(dev); |
| 2512 | blk_mq_free_tag_set(&dev->tagset); |
| 2513 | kfree(dev->queues); |
| 2514 | kfree(dev->entry); |
| 2515 | kfree(dev); |
| 2516 | } |
| 2517 | |
| 2518 | static int nvme_dev_open(struct inode *inode, struct file *f) |
| 2519 | { |
| 2520 | struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev, |
| 2521 | miscdev); |
| 2522 | kref_get(&dev->kref); |
| 2523 | f->private_data = dev; |
| 2524 | return 0; |
| 2525 | } |
| 2526 | |
| 2527 | static int nvme_dev_release(struct inode *inode, struct file *f) |
| 2528 | { |
| 2529 | struct nvme_dev *dev = f->private_data; |
| 2530 | kref_put(&dev->kref, nvme_free_dev); |
| 2531 | return 0; |
| 2532 | } |
| 2533 | |
| 2534 | static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg) |
| 2535 | { |
| 2536 | struct nvme_dev *dev = f->private_data; |
| 2537 | struct nvme_ns *ns; |
| 2538 | |
| 2539 | switch (cmd) { |
| 2540 | case NVME_IOCTL_ADMIN_CMD: |
| 2541 | return nvme_user_cmd(dev, NULL, (void __user *)arg); |
| 2542 | case NVME_IOCTL_IO_CMD: |
| 2543 | if (list_empty(&dev->namespaces)) |
| 2544 | return -ENOTTY; |
| 2545 | ns = list_first_entry(&dev->namespaces, struct nvme_ns, list); |
| 2546 | return nvme_user_cmd(dev, ns, (void __user *)arg); |
| 2547 | default: |
| 2548 | return -ENOTTY; |
| 2549 | } |
| 2550 | } |
| 2551 | |
| 2552 | static const struct file_operations nvme_dev_fops = { |
| 2553 | .owner = THIS_MODULE, |
| 2554 | .open = nvme_dev_open, |
| 2555 | .release = nvme_dev_release, |
| 2556 | .unlocked_ioctl = nvme_dev_ioctl, |
| 2557 | .compat_ioctl = nvme_dev_ioctl, |
| 2558 | }; |
| 2559 | |
| 2560 | static void nvme_set_irq_hints(struct nvme_dev *dev) |
| 2561 | { |
| 2562 | struct nvme_queue *nvmeq; |
| 2563 | int i; |
| 2564 | |
| 2565 | for (i = 0; i < dev->online_queues; i++) { |
| 2566 | nvmeq = dev->queues[i]; |
| 2567 | |
| 2568 | if (!nvmeq->hctx) |
| 2569 | continue; |
| 2570 | |
| 2571 | irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector, |
| 2572 | nvmeq->hctx->cpumask); |
| 2573 | } |
| 2574 | } |
| 2575 | |
| 2576 | static int nvme_dev_start(struct nvme_dev *dev) |
| 2577 | { |
| 2578 | int result; |
| 2579 | bool start_thread = false; |
| 2580 | |
| 2581 | result = nvme_dev_map(dev); |
| 2582 | if (result) |
| 2583 | return result; |
| 2584 | |
| 2585 | result = nvme_configure_admin_queue(dev); |
| 2586 | if (result) |
| 2587 | goto unmap; |
| 2588 | |
| 2589 | spin_lock(&dev_list_lock); |
| 2590 | if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) { |
| 2591 | start_thread = true; |
| 2592 | nvme_thread = NULL; |
| 2593 | } |
| 2594 | list_add(&dev->node, &dev_list); |
| 2595 | spin_unlock(&dev_list_lock); |
| 2596 | |
| 2597 | if (start_thread) { |
| 2598 | nvme_thread = kthread_run(nvme_kthread, NULL, "nvme"); |
| 2599 | wake_up_all(&nvme_kthread_wait); |
| 2600 | } else |
| 2601 | wait_event_killable(nvme_kthread_wait, nvme_thread); |
| 2602 | |
| 2603 | if (IS_ERR_OR_NULL(nvme_thread)) { |
| 2604 | result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR; |
| 2605 | goto disable; |
| 2606 | } |
| 2607 | |
| 2608 | nvme_init_queue(dev->queues[0], 0); |
| 2609 | |
| 2610 | result = nvme_setup_io_queues(dev); |
| 2611 | if (result) |
| 2612 | goto disable; |
| 2613 | |
| 2614 | nvme_set_irq_hints(dev); |
| 2615 | |
| 2616 | return result; |
| 2617 | |
| 2618 | disable: |
| 2619 | nvme_disable_queue(dev, 0); |
| 2620 | nvme_dev_list_remove(dev); |
| 2621 | unmap: |
| 2622 | nvme_dev_unmap(dev); |
| 2623 | return result; |
| 2624 | } |
| 2625 | |
| 2626 | static int nvme_remove_dead_ctrl(void *arg) |
| 2627 | { |
| 2628 | struct nvme_dev *dev = (struct nvme_dev *)arg; |
| 2629 | struct pci_dev *pdev = dev->pci_dev; |
| 2630 | |
| 2631 | if (pci_get_drvdata(pdev)) |
| 2632 | pci_stop_and_remove_bus_device_locked(pdev); |
| 2633 | kref_put(&dev->kref, nvme_free_dev); |
| 2634 | return 0; |
| 2635 | } |
| 2636 | |
| 2637 | static void nvme_remove_disks(struct work_struct *ws) |
| 2638 | { |
| 2639 | struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work); |
| 2640 | |
| 2641 | nvme_free_queues(dev, 1); |
| 2642 | nvme_dev_remove(dev); |
| 2643 | } |
| 2644 | |
| 2645 | static int nvme_dev_resume(struct nvme_dev *dev) |
| 2646 | { |
| 2647 | int ret; |
| 2648 | |
| 2649 | ret = nvme_dev_start(dev); |
| 2650 | if (ret) |
| 2651 | return ret; |
| 2652 | if (dev->online_queues < 2) { |
| 2653 | spin_lock(&dev_list_lock); |
| 2654 | dev->reset_workfn = nvme_remove_disks; |
| 2655 | queue_work(nvme_workq, &dev->reset_work); |
| 2656 | spin_unlock(&dev_list_lock); |
| 2657 | } |
| 2658 | dev->initialized = 1; |
| 2659 | return 0; |
| 2660 | } |
| 2661 | |
| 2662 | static void nvme_dev_reset(struct nvme_dev *dev) |
| 2663 | { |
| 2664 | nvme_dev_shutdown(dev); |
| 2665 | if (nvme_dev_resume(dev)) { |
| 2666 | dev_warn(&dev->pci_dev->dev, "Device failed to resume\n"); |
| 2667 | kref_get(&dev->kref); |
| 2668 | if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d", |
| 2669 | dev->instance))) { |
| 2670 | dev_err(&dev->pci_dev->dev, |
| 2671 | "Failed to start controller remove task\n"); |
| 2672 | kref_put(&dev->kref, nvme_free_dev); |
| 2673 | } |
| 2674 | } |
| 2675 | } |
| 2676 | |
| 2677 | static void nvme_reset_failed_dev(struct work_struct *ws) |
| 2678 | { |
| 2679 | struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work); |
| 2680 | nvme_dev_reset(dev); |
| 2681 | } |
| 2682 | |
| 2683 | static void nvme_reset_workfn(struct work_struct *work) |
| 2684 | { |
| 2685 | struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); |
| 2686 | dev->reset_workfn(work); |
| 2687 | } |
| 2688 | |
| 2689 | static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 2690 | { |
| 2691 | int node, result = -ENOMEM; |
| 2692 | struct nvme_dev *dev; |
| 2693 | |
| 2694 | node = dev_to_node(&pdev->dev); |
| 2695 | if (node == NUMA_NO_NODE) |
| 2696 | set_dev_node(&pdev->dev, 0); |
| 2697 | |
| 2698 | dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); |
| 2699 | if (!dev) |
| 2700 | return -ENOMEM; |
| 2701 | dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry), |
| 2702 | GFP_KERNEL, node); |
| 2703 | if (!dev->entry) |
| 2704 | goto free; |
| 2705 | dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), |
| 2706 | GFP_KERNEL, node); |
| 2707 | if (!dev->queues) |
| 2708 | goto free; |
| 2709 | |
| 2710 | INIT_LIST_HEAD(&dev->namespaces); |
| 2711 | dev->reset_workfn = nvme_reset_failed_dev; |
| 2712 | INIT_WORK(&dev->reset_work, nvme_reset_workfn); |
| 2713 | dev->pci_dev = pci_dev_get(pdev); |
| 2714 | pci_set_drvdata(pdev, dev); |
| 2715 | result = nvme_set_instance(dev); |
| 2716 | if (result) |
| 2717 | goto put_pci; |
| 2718 | |
| 2719 | result = nvme_setup_prp_pools(dev); |
| 2720 | if (result) |
| 2721 | goto release; |
| 2722 | |
| 2723 | kref_init(&dev->kref); |
| 2724 | result = nvme_dev_start(dev); |
| 2725 | if (result) |
| 2726 | goto release_pools; |
| 2727 | |
| 2728 | if (dev->online_queues > 1) |
| 2729 | result = nvme_dev_add(dev); |
| 2730 | if (result) |
| 2731 | goto shutdown; |
| 2732 | |
| 2733 | scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance); |
| 2734 | dev->miscdev.minor = MISC_DYNAMIC_MINOR; |
| 2735 | dev->miscdev.parent = &pdev->dev; |
| 2736 | dev->miscdev.name = dev->name; |
| 2737 | dev->miscdev.fops = &nvme_dev_fops; |
| 2738 | result = misc_register(&dev->miscdev); |
| 2739 | if (result) |
| 2740 | goto remove; |
| 2741 | |
| 2742 | nvme_set_irq_hints(dev); |
| 2743 | |
| 2744 | dev->initialized = 1; |
| 2745 | return 0; |
| 2746 | |
| 2747 | remove: |
| 2748 | nvme_dev_remove(dev); |
| 2749 | nvme_dev_remove_admin(dev); |
| 2750 | nvme_free_namespaces(dev); |
| 2751 | shutdown: |
| 2752 | nvme_dev_shutdown(dev); |
| 2753 | release_pools: |
| 2754 | nvme_free_queues(dev, 0); |
| 2755 | nvme_release_prp_pools(dev); |
| 2756 | release: |
| 2757 | nvme_release_instance(dev); |
| 2758 | put_pci: |
| 2759 | pci_dev_put(dev->pci_dev); |
| 2760 | free: |
| 2761 | kfree(dev->queues); |
| 2762 | kfree(dev->entry); |
| 2763 | kfree(dev); |
| 2764 | return result; |
| 2765 | } |
| 2766 | |
| 2767 | static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) |
| 2768 | { |
| 2769 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2770 | |
| 2771 | if (prepare) |
| 2772 | nvme_dev_shutdown(dev); |
| 2773 | else |
| 2774 | nvme_dev_resume(dev); |
| 2775 | } |
| 2776 | |
| 2777 | static void nvme_shutdown(struct pci_dev *pdev) |
| 2778 | { |
| 2779 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2780 | nvme_dev_shutdown(dev); |
| 2781 | } |
| 2782 | |
| 2783 | static void nvme_remove(struct pci_dev *pdev) |
| 2784 | { |
| 2785 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2786 | |
| 2787 | spin_lock(&dev_list_lock); |
| 2788 | list_del_init(&dev->node); |
| 2789 | spin_unlock(&dev_list_lock); |
| 2790 | |
| 2791 | pci_set_drvdata(pdev, NULL); |
| 2792 | flush_work(&dev->reset_work); |
| 2793 | misc_deregister(&dev->miscdev); |
| 2794 | nvme_dev_remove(dev); |
| 2795 | nvme_dev_shutdown(dev); |
| 2796 | nvme_dev_remove_admin(dev); |
| 2797 | nvme_free_queues(dev, 0); |
| 2798 | nvme_free_admin_tags(dev); |
| 2799 | nvme_release_prp_pools(dev); |
| 2800 | kref_put(&dev->kref, nvme_free_dev); |
| 2801 | } |
| 2802 | |
| 2803 | /* These functions are yet to be implemented */ |
| 2804 | #define nvme_error_detected NULL |
| 2805 | #define nvme_dump_registers NULL |
| 2806 | #define nvme_link_reset NULL |
| 2807 | #define nvme_slot_reset NULL |
| 2808 | #define nvme_error_resume NULL |
| 2809 | |
| 2810 | #ifdef CONFIG_PM_SLEEP |
| 2811 | static int nvme_suspend(struct device *dev) |
| 2812 | { |
| 2813 | struct pci_dev *pdev = to_pci_dev(dev); |
| 2814 | struct nvme_dev *ndev = pci_get_drvdata(pdev); |
| 2815 | |
| 2816 | nvme_dev_shutdown(ndev); |
| 2817 | return 0; |
| 2818 | } |
| 2819 | |
| 2820 | static int nvme_resume(struct device *dev) |
| 2821 | { |
| 2822 | struct pci_dev *pdev = to_pci_dev(dev); |
| 2823 | struct nvme_dev *ndev = pci_get_drvdata(pdev); |
| 2824 | |
| 2825 | if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) { |
| 2826 | ndev->reset_workfn = nvme_reset_failed_dev; |
| 2827 | queue_work(nvme_workq, &ndev->reset_work); |
| 2828 | } |
| 2829 | return 0; |
| 2830 | } |
| 2831 | #endif |
| 2832 | |
| 2833 | static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); |
| 2834 | |
| 2835 | static const struct pci_error_handlers nvme_err_handler = { |
| 2836 | .error_detected = nvme_error_detected, |
| 2837 | .mmio_enabled = nvme_dump_registers, |
| 2838 | .link_reset = nvme_link_reset, |
| 2839 | .slot_reset = nvme_slot_reset, |
| 2840 | .resume = nvme_error_resume, |
| 2841 | .reset_notify = nvme_reset_notify, |
| 2842 | }; |
| 2843 | |
| 2844 | /* Move to pci_ids.h later */ |
| 2845 | #define PCI_CLASS_STORAGE_EXPRESS 0x010802 |
| 2846 | |
| 2847 | static const struct pci_device_id nvme_id_table[] = { |
| 2848 | { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, |
| 2849 | { 0, } |
| 2850 | }; |
| 2851 | MODULE_DEVICE_TABLE(pci, nvme_id_table); |
| 2852 | |
| 2853 | static struct pci_driver nvme_driver = { |
| 2854 | .name = "nvme", |
| 2855 | .id_table = nvme_id_table, |
| 2856 | .probe = nvme_probe, |
| 2857 | .remove = nvme_remove, |
| 2858 | .shutdown = nvme_shutdown, |
| 2859 | .driver = { |
| 2860 | .pm = &nvme_dev_pm_ops, |
| 2861 | }, |
| 2862 | .err_handler = &nvme_err_handler, |
| 2863 | }; |
| 2864 | |
| 2865 | static int __init nvme_init(void) |
| 2866 | { |
| 2867 | int result; |
| 2868 | |
| 2869 | init_waitqueue_head(&nvme_kthread_wait); |
| 2870 | |
| 2871 | nvme_workq = create_singlethread_workqueue("nvme"); |
| 2872 | if (!nvme_workq) |
| 2873 | return -ENOMEM; |
| 2874 | |
| 2875 | result = register_blkdev(nvme_major, "nvme"); |
| 2876 | if (result < 0) |
| 2877 | goto kill_workq; |
| 2878 | else if (result > 0) |
| 2879 | nvme_major = result; |
| 2880 | |
| 2881 | result = pci_register_driver(&nvme_driver); |
| 2882 | if (result) |
| 2883 | goto unregister_blkdev; |
| 2884 | return 0; |
| 2885 | |
| 2886 | unregister_blkdev: |
| 2887 | unregister_blkdev(nvme_major, "nvme"); |
| 2888 | kill_workq: |
| 2889 | destroy_workqueue(nvme_workq); |
| 2890 | return result; |
| 2891 | } |
| 2892 | |
| 2893 | static void __exit nvme_exit(void) |
| 2894 | { |
| 2895 | pci_unregister_driver(&nvme_driver); |
| 2896 | unregister_hotcpu_notifier(&nvme_nb); |
| 2897 | unregister_blkdev(nvme_major, "nvme"); |
| 2898 | destroy_workqueue(nvme_workq); |
| 2899 | BUG_ON(nvme_thread && !IS_ERR(nvme_thread)); |
| 2900 | _nvme_check_size(); |
| 2901 | } |
| 2902 | |
| 2903 | MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); |
| 2904 | MODULE_LICENSE("GPL"); |
| 2905 | MODULE_VERSION("1.0"); |
| 2906 | module_init(nvme_init); |
| 2907 | module_exit(nvme_exit); |