| 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // |
| 3 | // Register map access API |
| 4 | // |
| 5 | // Copyright 2011 Wolfson Microelectronics plc |
| 6 | // |
| 7 | // Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 8 | |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include <linux/export.h> |
| 12 | #include <linux/mutex.h> |
| 13 | #include <linux/err.h> |
| 14 | #include <linux/property.h> |
| 15 | #include <linux/rbtree.h> |
| 16 | #include <linux/sched.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/log2.h> |
| 19 | #include <linux/hwspinlock.h> |
| 20 | #include <asm/unaligned.h> |
| 21 | |
| 22 | #define CREATE_TRACE_POINTS |
| 23 | #include "trace.h" |
| 24 | |
| 25 | #include "internal.h" |
| 26 | |
| 27 | /* |
| 28 | * Sometimes for failures during very early init the trace |
| 29 | * infrastructure isn't available early enough to be used. For this |
| 30 | * sort of problem defining LOG_DEVICE will add printks for basic |
| 31 | * register I/O on a specific device. |
| 32 | */ |
| 33 | #undef LOG_DEVICE |
| 34 | |
| 35 | #ifdef LOG_DEVICE |
| 36 | static inline bool regmap_should_log(struct regmap *map) |
| 37 | { |
| 38 | return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0); |
| 39 | } |
| 40 | #else |
| 41 | static inline bool regmap_should_log(struct regmap *map) { return false; } |
| 42 | #endif |
| 43 | |
| 44 | |
| 45 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
| 46 | unsigned int mask, unsigned int val, |
| 47 | bool *change, bool force_write); |
| 48 | |
| 49 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
| 50 | unsigned int *val); |
| 51 | static int _regmap_bus_read(void *context, unsigned int reg, |
| 52 | unsigned int *val); |
| 53 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
| 54 | unsigned int val); |
| 55 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
| 56 | unsigned int val); |
| 57 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
| 58 | unsigned int val); |
| 59 | |
| 60 | bool regmap_reg_in_ranges(unsigned int reg, |
| 61 | const struct regmap_range *ranges, |
| 62 | unsigned int nranges) |
| 63 | { |
| 64 | const struct regmap_range *r; |
| 65 | int i; |
| 66 | |
| 67 | for (i = 0, r = ranges; i < nranges; i++, r++) |
| 68 | if (regmap_reg_in_range(reg, r)) |
| 69 | return true; |
| 70 | return false; |
| 71 | } |
| 72 | EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); |
| 73 | |
| 74 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
| 75 | const struct regmap_access_table *table) |
| 76 | { |
| 77 | /* Check "no ranges" first */ |
| 78 | if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) |
| 79 | return false; |
| 80 | |
| 81 | /* In case zero "yes ranges" are supplied, any reg is OK */ |
| 82 | if (!table->n_yes_ranges) |
| 83 | return true; |
| 84 | |
| 85 | return regmap_reg_in_ranges(reg, table->yes_ranges, |
| 86 | table->n_yes_ranges); |
| 87 | } |
| 88 | EXPORT_SYMBOL_GPL(regmap_check_range_table); |
| 89 | |
| 90 | bool regmap_writeable(struct regmap *map, unsigned int reg) |
| 91 | { |
| 92 | if (map->max_register_is_set && reg > map->max_register) |
| 93 | return false; |
| 94 | |
| 95 | if (map->writeable_reg) |
| 96 | return map->writeable_reg(map->dev, reg); |
| 97 | |
| 98 | if (map->wr_table) |
| 99 | return regmap_check_range_table(map, reg, map->wr_table); |
| 100 | |
| 101 | return true; |
| 102 | } |
| 103 | |
| 104 | bool regmap_cached(struct regmap *map, unsigned int reg) |
| 105 | { |
| 106 | int ret; |
| 107 | unsigned int val; |
| 108 | |
| 109 | if (map->cache_type == REGCACHE_NONE) |
| 110 | return false; |
| 111 | |
| 112 | if (!map->cache_ops) |
| 113 | return false; |
| 114 | |
| 115 | if (map->max_register_is_set && reg > map->max_register) |
| 116 | return false; |
| 117 | |
| 118 | map->lock(map->lock_arg); |
| 119 | ret = regcache_read(map, reg, &val); |
| 120 | map->unlock(map->lock_arg); |
| 121 | if (ret) |
| 122 | return false; |
| 123 | |
| 124 | return true; |
| 125 | } |
| 126 | |
| 127 | bool regmap_readable(struct regmap *map, unsigned int reg) |
| 128 | { |
| 129 | if (!map->reg_read) |
| 130 | return false; |
| 131 | |
| 132 | if (map->max_register_is_set && reg > map->max_register) |
| 133 | return false; |
| 134 | |
| 135 | if (map->format.format_write) |
| 136 | return false; |
| 137 | |
| 138 | if (map->readable_reg) |
| 139 | return map->readable_reg(map->dev, reg); |
| 140 | |
| 141 | if (map->rd_table) |
| 142 | return regmap_check_range_table(map, reg, map->rd_table); |
| 143 | |
| 144 | return true; |
| 145 | } |
| 146 | |
| 147 | bool regmap_volatile(struct regmap *map, unsigned int reg) |
| 148 | { |
| 149 | if (!map->format.format_write && !regmap_readable(map, reg)) |
| 150 | return false; |
| 151 | |
| 152 | if (map->volatile_reg) |
| 153 | return map->volatile_reg(map->dev, reg); |
| 154 | |
| 155 | if (map->volatile_table) |
| 156 | return regmap_check_range_table(map, reg, map->volatile_table); |
| 157 | |
| 158 | if (map->cache_ops) |
| 159 | return false; |
| 160 | else |
| 161 | return true; |
| 162 | } |
| 163 | |
| 164 | bool regmap_precious(struct regmap *map, unsigned int reg) |
| 165 | { |
| 166 | if (!regmap_readable(map, reg)) |
| 167 | return false; |
| 168 | |
| 169 | if (map->precious_reg) |
| 170 | return map->precious_reg(map->dev, reg); |
| 171 | |
| 172 | if (map->precious_table) |
| 173 | return regmap_check_range_table(map, reg, map->precious_table); |
| 174 | |
| 175 | return false; |
| 176 | } |
| 177 | |
| 178 | bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) |
| 179 | { |
| 180 | if (map->writeable_noinc_reg) |
| 181 | return map->writeable_noinc_reg(map->dev, reg); |
| 182 | |
| 183 | if (map->wr_noinc_table) |
| 184 | return regmap_check_range_table(map, reg, map->wr_noinc_table); |
| 185 | |
| 186 | return true; |
| 187 | } |
| 188 | |
| 189 | bool regmap_readable_noinc(struct regmap *map, unsigned int reg) |
| 190 | { |
| 191 | if (map->readable_noinc_reg) |
| 192 | return map->readable_noinc_reg(map->dev, reg); |
| 193 | |
| 194 | if (map->rd_noinc_table) |
| 195 | return regmap_check_range_table(map, reg, map->rd_noinc_table); |
| 196 | |
| 197 | return true; |
| 198 | } |
| 199 | |
| 200 | static bool regmap_volatile_range(struct regmap *map, unsigned int reg, |
| 201 | size_t num) |
| 202 | { |
| 203 | unsigned int i; |
| 204 | |
| 205 | for (i = 0; i < num; i++) |
| 206 | if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) |
| 207 | return false; |
| 208 | |
| 209 | return true; |
| 210 | } |
| 211 | |
| 212 | static void regmap_format_12_20_write(struct regmap *map, |
| 213 | unsigned int reg, unsigned int val) |
| 214 | { |
| 215 | u8 *out = map->work_buf; |
| 216 | |
| 217 | out[0] = reg >> 4; |
| 218 | out[1] = (reg << 4) | (val >> 16); |
| 219 | out[2] = val >> 8; |
| 220 | out[3] = val; |
| 221 | } |
| 222 | |
| 223 | |
| 224 | static void regmap_format_2_6_write(struct regmap *map, |
| 225 | unsigned int reg, unsigned int val) |
| 226 | { |
| 227 | u8 *out = map->work_buf; |
| 228 | |
| 229 | *out = (reg << 6) | val; |
| 230 | } |
| 231 | |
| 232 | static void regmap_format_4_12_write(struct regmap *map, |
| 233 | unsigned int reg, unsigned int val) |
| 234 | { |
| 235 | __be16 *out = map->work_buf; |
| 236 | *out = cpu_to_be16((reg << 12) | val); |
| 237 | } |
| 238 | |
| 239 | static void regmap_format_7_9_write(struct regmap *map, |
| 240 | unsigned int reg, unsigned int val) |
| 241 | { |
| 242 | __be16 *out = map->work_buf; |
| 243 | *out = cpu_to_be16((reg << 9) | val); |
| 244 | } |
| 245 | |
| 246 | static void regmap_format_7_17_write(struct regmap *map, |
| 247 | unsigned int reg, unsigned int val) |
| 248 | { |
| 249 | u8 *out = map->work_buf; |
| 250 | |
| 251 | out[2] = val; |
| 252 | out[1] = val >> 8; |
| 253 | out[0] = (val >> 16) | (reg << 1); |
| 254 | } |
| 255 | |
| 256 | static void regmap_format_10_14_write(struct regmap *map, |
| 257 | unsigned int reg, unsigned int val) |
| 258 | { |
| 259 | u8 *out = map->work_buf; |
| 260 | |
| 261 | out[2] = val; |
| 262 | out[1] = (val >> 8) | (reg << 6); |
| 263 | out[0] = reg >> 2; |
| 264 | } |
| 265 | |
| 266 | static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) |
| 267 | { |
| 268 | u8 *b = buf; |
| 269 | |
| 270 | b[0] = val << shift; |
| 271 | } |
| 272 | |
| 273 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
| 274 | { |
| 275 | put_unaligned_be16(val << shift, buf); |
| 276 | } |
| 277 | |
| 278 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) |
| 279 | { |
| 280 | put_unaligned_le16(val << shift, buf); |
| 281 | } |
| 282 | |
| 283 | static void regmap_format_16_native(void *buf, unsigned int val, |
| 284 | unsigned int shift) |
| 285 | { |
| 286 | u16 v = val << shift; |
| 287 | |
| 288 | memcpy(buf, &v, sizeof(v)); |
| 289 | } |
| 290 | |
| 291 | static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift) |
| 292 | { |
| 293 | put_unaligned_be24(val << shift, buf); |
| 294 | } |
| 295 | |
| 296 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
| 297 | { |
| 298 | put_unaligned_be32(val << shift, buf); |
| 299 | } |
| 300 | |
| 301 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) |
| 302 | { |
| 303 | put_unaligned_le32(val << shift, buf); |
| 304 | } |
| 305 | |
| 306 | static void regmap_format_32_native(void *buf, unsigned int val, |
| 307 | unsigned int shift) |
| 308 | { |
| 309 | u32 v = val << shift; |
| 310 | |
| 311 | memcpy(buf, &v, sizeof(v)); |
| 312 | } |
| 313 | |
| 314 | static void regmap_parse_inplace_noop(void *buf) |
| 315 | { |
| 316 | } |
| 317 | |
| 318 | static unsigned int regmap_parse_8(const void *buf) |
| 319 | { |
| 320 | const u8 *b = buf; |
| 321 | |
| 322 | return b[0]; |
| 323 | } |
| 324 | |
| 325 | static unsigned int regmap_parse_16_be(const void *buf) |
| 326 | { |
| 327 | return get_unaligned_be16(buf); |
| 328 | } |
| 329 | |
| 330 | static unsigned int regmap_parse_16_le(const void *buf) |
| 331 | { |
| 332 | return get_unaligned_le16(buf); |
| 333 | } |
| 334 | |
| 335 | static void regmap_parse_16_be_inplace(void *buf) |
| 336 | { |
| 337 | u16 v = get_unaligned_be16(buf); |
| 338 | |
| 339 | memcpy(buf, &v, sizeof(v)); |
| 340 | } |
| 341 | |
| 342 | static void regmap_parse_16_le_inplace(void *buf) |
| 343 | { |
| 344 | u16 v = get_unaligned_le16(buf); |
| 345 | |
| 346 | memcpy(buf, &v, sizeof(v)); |
| 347 | } |
| 348 | |
| 349 | static unsigned int regmap_parse_16_native(const void *buf) |
| 350 | { |
| 351 | u16 v; |
| 352 | |
| 353 | memcpy(&v, buf, sizeof(v)); |
| 354 | return v; |
| 355 | } |
| 356 | |
| 357 | static unsigned int regmap_parse_24_be(const void *buf) |
| 358 | { |
| 359 | return get_unaligned_be24(buf); |
| 360 | } |
| 361 | |
| 362 | static unsigned int regmap_parse_32_be(const void *buf) |
| 363 | { |
| 364 | return get_unaligned_be32(buf); |
| 365 | } |
| 366 | |
| 367 | static unsigned int regmap_parse_32_le(const void *buf) |
| 368 | { |
| 369 | return get_unaligned_le32(buf); |
| 370 | } |
| 371 | |
| 372 | static void regmap_parse_32_be_inplace(void *buf) |
| 373 | { |
| 374 | u32 v = get_unaligned_be32(buf); |
| 375 | |
| 376 | memcpy(buf, &v, sizeof(v)); |
| 377 | } |
| 378 | |
| 379 | static void regmap_parse_32_le_inplace(void *buf) |
| 380 | { |
| 381 | u32 v = get_unaligned_le32(buf); |
| 382 | |
| 383 | memcpy(buf, &v, sizeof(v)); |
| 384 | } |
| 385 | |
| 386 | static unsigned int regmap_parse_32_native(const void *buf) |
| 387 | { |
| 388 | u32 v; |
| 389 | |
| 390 | memcpy(&v, buf, sizeof(v)); |
| 391 | return v; |
| 392 | } |
| 393 | |
| 394 | static void regmap_lock_hwlock(void *__map) |
| 395 | { |
| 396 | struct regmap *map = __map; |
| 397 | |
| 398 | hwspin_lock_timeout(map->hwlock, UINT_MAX); |
| 399 | } |
| 400 | |
| 401 | static void regmap_lock_hwlock_irq(void *__map) |
| 402 | { |
| 403 | struct regmap *map = __map; |
| 404 | |
| 405 | hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); |
| 406 | } |
| 407 | |
| 408 | static void regmap_lock_hwlock_irqsave(void *__map) |
| 409 | { |
| 410 | struct regmap *map = __map; |
| 411 | |
| 412 | hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, |
| 413 | &map->spinlock_flags); |
| 414 | } |
| 415 | |
| 416 | static void regmap_unlock_hwlock(void *__map) |
| 417 | { |
| 418 | struct regmap *map = __map; |
| 419 | |
| 420 | hwspin_unlock(map->hwlock); |
| 421 | } |
| 422 | |
| 423 | static void regmap_unlock_hwlock_irq(void *__map) |
| 424 | { |
| 425 | struct regmap *map = __map; |
| 426 | |
| 427 | hwspin_unlock_irq(map->hwlock); |
| 428 | } |
| 429 | |
| 430 | static void regmap_unlock_hwlock_irqrestore(void *__map) |
| 431 | { |
| 432 | struct regmap *map = __map; |
| 433 | |
| 434 | hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); |
| 435 | } |
| 436 | |
| 437 | static void regmap_lock_unlock_none(void *__map) |
| 438 | { |
| 439 | |
| 440 | } |
| 441 | |
| 442 | static void regmap_lock_mutex(void *__map) |
| 443 | { |
| 444 | struct regmap *map = __map; |
| 445 | mutex_lock(&map->mutex); |
| 446 | } |
| 447 | |
| 448 | static void regmap_unlock_mutex(void *__map) |
| 449 | { |
| 450 | struct regmap *map = __map; |
| 451 | mutex_unlock(&map->mutex); |
| 452 | } |
| 453 | |
| 454 | static void regmap_lock_spinlock(void *__map) |
| 455 | __acquires(&map->spinlock) |
| 456 | { |
| 457 | struct regmap *map = __map; |
| 458 | unsigned long flags; |
| 459 | |
| 460 | spin_lock_irqsave(&map->spinlock, flags); |
| 461 | map->spinlock_flags = flags; |
| 462 | } |
| 463 | |
| 464 | static void regmap_unlock_spinlock(void *__map) |
| 465 | __releases(&map->spinlock) |
| 466 | { |
| 467 | struct regmap *map = __map; |
| 468 | spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); |
| 469 | } |
| 470 | |
| 471 | static void regmap_lock_raw_spinlock(void *__map) |
| 472 | __acquires(&map->raw_spinlock) |
| 473 | { |
| 474 | struct regmap *map = __map; |
| 475 | unsigned long flags; |
| 476 | |
| 477 | raw_spin_lock_irqsave(&map->raw_spinlock, flags); |
| 478 | map->raw_spinlock_flags = flags; |
| 479 | } |
| 480 | |
| 481 | static void regmap_unlock_raw_spinlock(void *__map) |
| 482 | __releases(&map->raw_spinlock) |
| 483 | { |
| 484 | struct regmap *map = __map; |
| 485 | raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags); |
| 486 | } |
| 487 | |
| 488 | static void dev_get_regmap_release(struct device *dev, void *res) |
| 489 | { |
| 490 | /* |
| 491 | * We don't actually have anything to do here; the goal here |
| 492 | * is not to manage the regmap but to provide a simple way to |
| 493 | * get the regmap back given a struct device. |
| 494 | */ |
| 495 | } |
| 496 | |
| 497 | static bool _regmap_range_add(struct regmap *map, |
| 498 | struct regmap_range_node *data) |
| 499 | { |
| 500 | struct rb_root *root = &map->range_tree; |
| 501 | struct rb_node **new = &(root->rb_node), *parent = NULL; |
| 502 | |
| 503 | while (*new) { |
| 504 | struct regmap_range_node *this = |
| 505 | rb_entry(*new, struct regmap_range_node, node); |
| 506 | |
| 507 | parent = *new; |
| 508 | if (data->range_max < this->range_min) |
| 509 | new = &((*new)->rb_left); |
| 510 | else if (data->range_min > this->range_max) |
| 511 | new = &((*new)->rb_right); |
| 512 | else |
| 513 | return false; |
| 514 | } |
| 515 | |
| 516 | rb_link_node(&data->node, parent, new); |
| 517 | rb_insert_color(&data->node, root); |
| 518 | |
| 519 | return true; |
| 520 | } |
| 521 | |
| 522 | static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, |
| 523 | unsigned int reg) |
| 524 | { |
| 525 | struct rb_node *node = map->range_tree.rb_node; |
| 526 | |
| 527 | while (node) { |
| 528 | struct regmap_range_node *this = |
| 529 | rb_entry(node, struct regmap_range_node, node); |
| 530 | |
| 531 | if (reg < this->range_min) |
| 532 | node = node->rb_left; |
| 533 | else if (reg > this->range_max) |
| 534 | node = node->rb_right; |
| 535 | else |
| 536 | return this; |
| 537 | } |
| 538 | |
| 539 | return NULL; |
| 540 | } |
| 541 | |
| 542 | static void regmap_range_exit(struct regmap *map) |
| 543 | { |
| 544 | struct rb_node *next; |
| 545 | struct regmap_range_node *range_node; |
| 546 | |
| 547 | next = rb_first(&map->range_tree); |
| 548 | while (next) { |
| 549 | range_node = rb_entry(next, struct regmap_range_node, node); |
| 550 | next = rb_next(&range_node->node); |
| 551 | rb_erase(&range_node->node, &map->range_tree); |
| 552 | kfree(range_node); |
| 553 | } |
| 554 | |
| 555 | kfree(map->selector_work_buf); |
| 556 | } |
| 557 | |
| 558 | static int regmap_set_name(struct regmap *map, const struct regmap_config *config) |
| 559 | { |
| 560 | if (config->name) { |
| 561 | const char *name = kstrdup_const(config->name, GFP_KERNEL); |
| 562 | |
| 563 | if (!name) |
| 564 | return -ENOMEM; |
| 565 | |
| 566 | kfree_const(map->name); |
| 567 | map->name = name; |
| 568 | } |
| 569 | |
| 570 | return 0; |
| 571 | } |
| 572 | |
| 573 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
| 574 | const struct regmap_config *config) |
| 575 | { |
| 576 | struct regmap **m; |
| 577 | int ret; |
| 578 | |
| 579 | map->dev = dev; |
| 580 | |
| 581 | ret = regmap_set_name(map, config); |
| 582 | if (ret) |
| 583 | return ret; |
| 584 | |
| 585 | regmap_debugfs_exit(map); |
| 586 | regmap_debugfs_init(map); |
| 587 | |
| 588 | /* Add a devres resource for dev_get_regmap() */ |
| 589 | m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); |
| 590 | if (!m) { |
| 591 | regmap_debugfs_exit(map); |
| 592 | return -ENOMEM; |
| 593 | } |
| 594 | *m = map; |
| 595 | devres_add(dev, m); |
| 596 | |
| 597 | return 0; |
| 598 | } |
| 599 | EXPORT_SYMBOL_GPL(regmap_attach_dev); |
| 600 | |
| 601 | static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, |
| 602 | const struct regmap_config *config) |
| 603 | { |
| 604 | enum regmap_endian endian; |
| 605 | |
| 606 | /* Retrieve the endianness specification from the regmap config */ |
| 607 | endian = config->reg_format_endian; |
| 608 | |
| 609 | /* If the regmap config specified a non-default value, use that */ |
| 610 | if (endian != REGMAP_ENDIAN_DEFAULT) |
| 611 | return endian; |
| 612 | |
| 613 | /* Retrieve the endianness specification from the bus config */ |
| 614 | if (bus && bus->reg_format_endian_default) |
| 615 | endian = bus->reg_format_endian_default; |
| 616 | |
| 617 | /* If the bus specified a non-default value, use that */ |
| 618 | if (endian != REGMAP_ENDIAN_DEFAULT) |
| 619 | return endian; |
| 620 | |
| 621 | /* Use this if no other value was found */ |
| 622 | return REGMAP_ENDIAN_BIG; |
| 623 | } |
| 624 | |
| 625 | enum regmap_endian regmap_get_val_endian(struct device *dev, |
| 626 | const struct regmap_bus *bus, |
| 627 | const struct regmap_config *config) |
| 628 | { |
| 629 | struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
| 630 | enum regmap_endian endian; |
| 631 | |
| 632 | /* Retrieve the endianness specification from the regmap config */ |
| 633 | endian = config->val_format_endian; |
| 634 | |
| 635 | /* If the regmap config specified a non-default value, use that */ |
| 636 | if (endian != REGMAP_ENDIAN_DEFAULT) |
| 637 | return endian; |
| 638 | |
| 639 | /* If the firmware node exist try to get endianness from it */ |
| 640 | if (fwnode_property_read_bool(fwnode, "big-endian")) |
| 641 | endian = REGMAP_ENDIAN_BIG; |
| 642 | else if (fwnode_property_read_bool(fwnode, "little-endian")) |
| 643 | endian = REGMAP_ENDIAN_LITTLE; |
| 644 | else if (fwnode_property_read_bool(fwnode, "native-endian")) |
| 645 | endian = REGMAP_ENDIAN_NATIVE; |
| 646 | |
| 647 | /* If the endianness was specified in fwnode, use that */ |
| 648 | if (endian != REGMAP_ENDIAN_DEFAULT) |
| 649 | return endian; |
| 650 | |
| 651 | /* Retrieve the endianness specification from the bus config */ |
| 652 | if (bus && bus->val_format_endian_default) |
| 653 | endian = bus->val_format_endian_default; |
| 654 | |
| 655 | /* If the bus specified a non-default value, use that */ |
| 656 | if (endian != REGMAP_ENDIAN_DEFAULT) |
| 657 | return endian; |
| 658 | |
| 659 | /* Use this if no other value was found */ |
| 660 | return REGMAP_ENDIAN_BIG; |
| 661 | } |
| 662 | EXPORT_SYMBOL_GPL(regmap_get_val_endian); |
| 663 | |
| 664 | struct regmap *__regmap_init(struct device *dev, |
| 665 | const struct regmap_bus *bus, |
| 666 | void *bus_context, |
| 667 | const struct regmap_config *config, |
| 668 | struct lock_class_key *lock_key, |
| 669 | const char *lock_name) |
| 670 | { |
| 671 | struct regmap *map; |
| 672 | int ret = -EINVAL; |
| 673 | enum regmap_endian reg_endian, val_endian; |
| 674 | int i, j; |
| 675 | |
| 676 | if (!config) |
| 677 | goto err; |
| 678 | |
| 679 | map = kzalloc(sizeof(*map), GFP_KERNEL); |
| 680 | if (map == NULL) { |
| 681 | ret = -ENOMEM; |
| 682 | goto err; |
| 683 | } |
| 684 | |
| 685 | ret = regmap_set_name(map, config); |
| 686 | if (ret) |
| 687 | goto err_map; |
| 688 | |
| 689 | ret = -EINVAL; /* Later error paths rely on this */ |
| 690 | |
| 691 | if (config->disable_locking) { |
| 692 | map->lock = map->unlock = regmap_lock_unlock_none; |
| 693 | map->can_sleep = config->can_sleep; |
| 694 | regmap_debugfs_disable(map); |
| 695 | } else if (config->lock && config->unlock) { |
| 696 | map->lock = config->lock; |
| 697 | map->unlock = config->unlock; |
| 698 | map->lock_arg = config->lock_arg; |
| 699 | map->can_sleep = config->can_sleep; |
| 700 | } else if (config->use_hwlock) { |
| 701 | map->hwlock = hwspin_lock_request_specific(config->hwlock_id); |
| 702 | if (!map->hwlock) { |
| 703 | ret = -ENXIO; |
| 704 | goto err_name; |
| 705 | } |
| 706 | |
| 707 | switch (config->hwlock_mode) { |
| 708 | case HWLOCK_IRQSTATE: |
| 709 | map->lock = regmap_lock_hwlock_irqsave; |
| 710 | map->unlock = regmap_unlock_hwlock_irqrestore; |
| 711 | break; |
| 712 | case HWLOCK_IRQ: |
| 713 | map->lock = regmap_lock_hwlock_irq; |
| 714 | map->unlock = regmap_unlock_hwlock_irq; |
| 715 | break; |
| 716 | default: |
| 717 | map->lock = regmap_lock_hwlock; |
| 718 | map->unlock = regmap_unlock_hwlock; |
| 719 | break; |
| 720 | } |
| 721 | |
| 722 | map->lock_arg = map; |
| 723 | } else { |
| 724 | if ((bus && bus->fast_io) || |
| 725 | config->fast_io) { |
| 726 | if (config->use_raw_spinlock) { |
| 727 | raw_spin_lock_init(&map->raw_spinlock); |
| 728 | map->lock = regmap_lock_raw_spinlock; |
| 729 | map->unlock = regmap_unlock_raw_spinlock; |
| 730 | lockdep_set_class_and_name(&map->raw_spinlock, |
| 731 | lock_key, lock_name); |
| 732 | } else { |
| 733 | spin_lock_init(&map->spinlock); |
| 734 | map->lock = regmap_lock_spinlock; |
| 735 | map->unlock = regmap_unlock_spinlock; |
| 736 | lockdep_set_class_and_name(&map->spinlock, |
| 737 | lock_key, lock_name); |
| 738 | } |
| 739 | } else { |
| 740 | mutex_init(&map->mutex); |
| 741 | map->lock = regmap_lock_mutex; |
| 742 | map->unlock = regmap_unlock_mutex; |
| 743 | map->can_sleep = true; |
| 744 | lockdep_set_class_and_name(&map->mutex, |
| 745 | lock_key, lock_name); |
| 746 | } |
| 747 | map->lock_arg = map; |
| 748 | } |
| 749 | |
| 750 | /* |
| 751 | * When we write in fast-paths with regmap_bulk_write() don't allocate |
| 752 | * scratch buffers with sleeping allocations. |
| 753 | */ |
| 754 | if ((bus && bus->fast_io) || config->fast_io) |
| 755 | map->alloc_flags = GFP_ATOMIC; |
| 756 | else |
| 757 | map->alloc_flags = GFP_KERNEL; |
| 758 | |
| 759 | map->reg_base = config->reg_base; |
| 760 | |
| 761 | map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); |
| 762 | map->format.pad_bytes = config->pad_bits / 8; |
| 763 | map->format.reg_shift = config->reg_shift; |
| 764 | map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); |
| 765 | map->format.buf_size = DIV_ROUND_UP(config->reg_bits + |
| 766 | config->val_bits + config->pad_bits, 8); |
| 767 | map->reg_shift = config->pad_bits % 8; |
| 768 | if (config->reg_stride) |
| 769 | map->reg_stride = config->reg_stride; |
| 770 | else |
| 771 | map->reg_stride = 1; |
| 772 | if (is_power_of_2(map->reg_stride)) |
| 773 | map->reg_stride_order = ilog2(map->reg_stride); |
| 774 | else |
| 775 | map->reg_stride_order = -1; |
| 776 | map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read)); |
| 777 | map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write)); |
| 778 | map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write)); |
| 779 | if (bus) { |
| 780 | map->max_raw_read = bus->max_raw_read; |
| 781 | map->max_raw_write = bus->max_raw_write; |
| 782 | } else if (config->max_raw_read && config->max_raw_write) { |
| 783 | map->max_raw_read = config->max_raw_read; |
| 784 | map->max_raw_write = config->max_raw_write; |
| 785 | } |
| 786 | map->dev = dev; |
| 787 | map->bus = bus; |
| 788 | map->bus_context = bus_context; |
| 789 | map->max_register = config->max_register; |
| 790 | map->max_register_is_set = map->max_register ?: config->max_register_is_0; |
| 791 | map->wr_table = config->wr_table; |
| 792 | map->rd_table = config->rd_table; |
| 793 | map->volatile_table = config->volatile_table; |
| 794 | map->precious_table = config->precious_table; |
| 795 | map->wr_noinc_table = config->wr_noinc_table; |
| 796 | map->rd_noinc_table = config->rd_noinc_table; |
| 797 | map->writeable_reg = config->writeable_reg; |
| 798 | map->readable_reg = config->readable_reg; |
| 799 | map->volatile_reg = config->volatile_reg; |
| 800 | map->precious_reg = config->precious_reg; |
| 801 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
| 802 | map->readable_noinc_reg = config->readable_noinc_reg; |
| 803 | map->cache_type = config->cache_type; |
| 804 | |
| 805 | spin_lock_init(&map->async_lock); |
| 806 | INIT_LIST_HEAD(&map->async_list); |
| 807 | INIT_LIST_HEAD(&map->async_free); |
| 808 | init_waitqueue_head(&map->async_waitq); |
| 809 | |
| 810 | if (config->read_flag_mask || |
| 811 | config->write_flag_mask || |
| 812 | config->zero_flag_mask) { |
| 813 | map->read_flag_mask = config->read_flag_mask; |
| 814 | map->write_flag_mask = config->write_flag_mask; |
| 815 | } else if (bus) { |
| 816 | map->read_flag_mask = bus->read_flag_mask; |
| 817 | } |
| 818 | |
| 819 | if (config && config->read && config->write) { |
| 820 | map->reg_read = _regmap_bus_read; |
| 821 | if (config->reg_update_bits) |
| 822 | map->reg_update_bits = config->reg_update_bits; |
| 823 | |
| 824 | /* Bulk read/write */ |
| 825 | map->read = config->read; |
| 826 | map->write = config->write; |
| 827 | |
| 828 | reg_endian = REGMAP_ENDIAN_NATIVE; |
| 829 | val_endian = REGMAP_ENDIAN_NATIVE; |
| 830 | } else if (!bus) { |
| 831 | map->reg_read = config->reg_read; |
| 832 | map->reg_write = config->reg_write; |
| 833 | map->reg_update_bits = config->reg_update_bits; |
| 834 | |
| 835 | map->defer_caching = false; |
| 836 | goto skip_format_initialization; |
| 837 | } else if (!bus->read || !bus->write) { |
| 838 | map->reg_read = _regmap_bus_reg_read; |
| 839 | map->reg_write = _regmap_bus_reg_write; |
| 840 | map->reg_update_bits = bus->reg_update_bits; |
| 841 | |
| 842 | map->defer_caching = false; |
| 843 | goto skip_format_initialization; |
| 844 | } else { |
| 845 | map->reg_read = _regmap_bus_read; |
| 846 | map->reg_update_bits = bus->reg_update_bits; |
| 847 | /* Bulk read/write */ |
| 848 | map->read = bus->read; |
| 849 | map->write = bus->write; |
| 850 | |
| 851 | reg_endian = regmap_get_reg_endian(bus, config); |
| 852 | val_endian = regmap_get_val_endian(dev, bus, config); |
| 853 | } |
| 854 | |
| 855 | switch (config->reg_bits + map->reg_shift) { |
| 856 | case 2: |
| 857 | switch (config->val_bits) { |
| 858 | case 6: |
| 859 | map->format.format_write = regmap_format_2_6_write; |
| 860 | break; |
| 861 | default: |
| 862 | goto err_hwlock; |
| 863 | } |
| 864 | break; |
| 865 | |
| 866 | case 4: |
| 867 | switch (config->val_bits) { |
| 868 | case 12: |
| 869 | map->format.format_write = regmap_format_4_12_write; |
| 870 | break; |
| 871 | default: |
| 872 | goto err_hwlock; |
| 873 | } |
| 874 | break; |
| 875 | |
| 876 | case 7: |
| 877 | switch (config->val_bits) { |
| 878 | case 9: |
| 879 | map->format.format_write = regmap_format_7_9_write; |
| 880 | break; |
| 881 | case 17: |
| 882 | map->format.format_write = regmap_format_7_17_write; |
| 883 | break; |
| 884 | default: |
| 885 | goto err_hwlock; |
| 886 | } |
| 887 | break; |
| 888 | |
| 889 | case 10: |
| 890 | switch (config->val_bits) { |
| 891 | case 14: |
| 892 | map->format.format_write = regmap_format_10_14_write; |
| 893 | break; |
| 894 | default: |
| 895 | goto err_hwlock; |
| 896 | } |
| 897 | break; |
| 898 | |
| 899 | case 12: |
| 900 | switch (config->val_bits) { |
| 901 | case 20: |
| 902 | map->format.format_write = regmap_format_12_20_write; |
| 903 | break; |
| 904 | default: |
| 905 | goto err_hwlock; |
| 906 | } |
| 907 | break; |
| 908 | |
| 909 | case 8: |
| 910 | map->format.format_reg = regmap_format_8; |
| 911 | break; |
| 912 | |
| 913 | case 16: |
| 914 | switch (reg_endian) { |
| 915 | case REGMAP_ENDIAN_BIG: |
| 916 | map->format.format_reg = regmap_format_16_be; |
| 917 | break; |
| 918 | case REGMAP_ENDIAN_LITTLE: |
| 919 | map->format.format_reg = regmap_format_16_le; |
| 920 | break; |
| 921 | case REGMAP_ENDIAN_NATIVE: |
| 922 | map->format.format_reg = regmap_format_16_native; |
| 923 | break; |
| 924 | default: |
| 925 | goto err_hwlock; |
| 926 | } |
| 927 | break; |
| 928 | |
| 929 | case 24: |
| 930 | switch (reg_endian) { |
| 931 | case REGMAP_ENDIAN_BIG: |
| 932 | map->format.format_reg = regmap_format_24_be; |
| 933 | break; |
| 934 | default: |
| 935 | goto err_hwlock; |
| 936 | } |
| 937 | break; |
| 938 | |
| 939 | case 32: |
| 940 | switch (reg_endian) { |
| 941 | case REGMAP_ENDIAN_BIG: |
| 942 | map->format.format_reg = regmap_format_32_be; |
| 943 | break; |
| 944 | case REGMAP_ENDIAN_LITTLE: |
| 945 | map->format.format_reg = regmap_format_32_le; |
| 946 | break; |
| 947 | case REGMAP_ENDIAN_NATIVE: |
| 948 | map->format.format_reg = regmap_format_32_native; |
| 949 | break; |
| 950 | default: |
| 951 | goto err_hwlock; |
| 952 | } |
| 953 | break; |
| 954 | |
| 955 | default: |
| 956 | goto err_hwlock; |
| 957 | } |
| 958 | |
| 959 | if (val_endian == REGMAP_ENDIAN_NATIVE) |
| 960 | map->format.parse_inplace = regmap_parse_inplace_noop; |
| 961 | |
| 962 | switch (config->val_bits) { |
| 963 | case 8: |
| 964 | map->format.format_val = regmap_format_8; |
| 965 | map->format.parse_val = regmap_parse_8; |
| 966 | map->format.parse_inplace = regmap_parse_inplace_noop; |
| 967 | break; |
| 968 | case 16: |
| 969 | switch (val_endian) { |
| 970 | case REGMAP_ENDIAN_BIG: |
| 971 | map->format.format_val = regmap_format_16_be; |
| 972 | map->format.parse_val = regmap_parse_16_be; |
| 973 | map->format.parse_inplace = regmap_parse_16_be_inplace; |
| 974 | break; |
| 975 | case REGMAP_ENDIAN_LITTLE: |
| 976 | map->format.format_val = regmap_format_16_le; |
| 977 | map->format.parse_val = regmap_parse_16_le; |
| 978 | map->format.parse_inplace = regmap_parse_16_le_inplace; |
| 979 | break; |
| 980 | case REGMAP_ENDIAN_NATIVE: |
| 981 | map->format.format_val = regmap_format_16_native; |
| 982 | map->format.parse_val = regmap_parse_16_native; |
| 983 | break; |
| 984 | default: |
| 985 | goto err_hwlock; |
| 986 | } |
| 987 | break; |
| 988 | case 24: |
| 989 | switch (val_endian) { |
| 990 | case REGMAP_ENDIAN_BIG: |
| 991 | map->format.format_val = regmap_format_24_be; |
| 992 | map->format.parse_val = regmap_parse_24_be; |
| 993 | break; |
| 994 | default: |
| 995 | goto err_hwlock; |
| 996 | } |
| 997 | break; |
| 998 | case 32: |
| 999 | switch (val_endian) { |
| 1000 | case REGMAP_ENDIAN_BIG: |
| 1001 | map->format.format_val = regmap_format_32_be; |
| 1002 | map->format.parse_val = regmap_parse_32_be; |
| 1003 | map->format.parse_inplace = regmap_parse_32_be_inplace; |
| 1004 | break; |
| 1005 | case REGMAP_ENDIAN_LITTLE: |
| 1006 | map->format.format_val = regmap_format_32_le; |
| 1007 | map->format.parse_val = regmap_parse_32_le; |
| 1008 | map->format.parse_inplace = regmap_parse_32_le_inplace; |
| 1009 | break; |
| 1010 | case REGMAP_ENDIAN_NATIVE: |
| 1011 | map->format.format_val = regmap_format_32_native; |
| 1012 | map->format.parse_val = regmap_parse_32_native; |
| 1013 | break; |
| 1014 | default: |
| 1015 | goto err_hwlock; |
| 1016 | } |
| 1017 | break; |
| 1018 | } |
| 1019 | |
| 1020 | if (map->format.format_write) { |
| 1021 | if ((reg_endian != REGMAP_ENDIAN_BIG) || |
| 1022 | (val_endian != REGMAP_ENDIAN_BIG)) |
| 1023 | goto err_hwlock; |
| 1024 | map->use_single_write = true; |
| 1025 | } |
| 1026 | |
| 1027 | if (!map->format.format_write && |
| 1028 | !(map->format.format_reg && map->format.format_val)) |
| 1029 | goto err_hwlock; |
| 1030 | |
| 1031 | map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); |
| 1032 | if (map->work_buf == NULL) { |
| 1033 | ret = -ENOMEM; |
| 1034 | goto err_hwlock; |
| 1035 | } |
| 1036 | |
| 1037 | if (map->format.format_write) { |
| 1038 | map->defer_caching = false; |
| 1039 | map->reg_write = _regmap_bus_formatted_write; |
| 1040 | } else if (map->format.format_val) { |
| 1041 | map->defer_caching = true; |
| 1042 | map->reg_write = _regmap_bus_raw_write; |
| 1043 | } |
| 1044 | |
| 1045 | skip_format_initialization: |
| 1046 | |
| 1047 | map->range_tree = RB_ROOT; |
| 1048 | for (i = 0; i < config->num_ranges; i++) { |
| 1049 | const struct regmap_range_cfg *range_cfg = &config->ranges[i]; |
| 1050 | struct regmap_range_node *new; |
| 1051 | |
| 1052 | /* Sanity check */ |
| 1053 | if (range_cfg->range_max < range_cfg->range_min) { |
| 1054 | dev_err(map->dev, "Invalid range %d: %d < %d\n", i, |
| 1055 | range_cfg->range_max, range_cfg->range_min); |
| 1056 | goto err_range; |
| 1057 | } |
| 1058 | |
| 1059 | if (range_cfg->range_max > map->max_register) { |
| 1060 | dev_err(map->dev, "Invalid range %d: %d > %d\n", i, |
| 1061 | range_cfg->range_max, map->max_register); |
| 1062 | goto err_range; |
| 1063 | } |
| 1064 | |
| 1065 | if (range_cfg->selector_reg > map->max_register) { |
| 1066 | dev_err(map->dev, |
| 1067 | "Invalid range %d: selector out of map\n", i); |
| 1068 | goto err_range; |
| 1069 | } |
| 1070 | |
| 1071 | if (range_cfg->window_len == 0) { |
| 1072 | dev_err(map->dev, "Invalid range %d: window_len 0\n", |
| 1073 | i); |
| 1074 | goto err_range; |
| 1075 | } |
| 1076 | |
| 1077 | /* Make sure, that this register range has no selector |
| 1078 | or data window within its boundary */ |
| 1079 | for (j = 0; j < config->num_ranges; j++) { |
| 1080 | unsigned int sel_reg = config->ranges[j].selector_reg; |
| 1081 | unsigned int win_min = config->ranges[j].window_start; |
| 1082 | unsigned int win_max = win_min + |
| 1083 | config->ranges[j].window_len - 1; |
| 1084 | |
| 1085 | /* Allow data window inside its own virtual range */ |
| 1086 | if (j == i) |
| 1087 | continue; |
| 1088 | |
| 1089 | if (range_cfg->range_min <= sel_reg && |
| 1090 | sel_reg <= range_cfg->range_max) { |
| 1091 | dev_err(map->dev, |
| 1092 | "Range %d: selector for %d in window\n", |
| 1093 | i, j); |
| 1094 | goto err_range; |
| 1095 | } |
| 1096 | |
| 1097 | if (!(win_max < range_cfg->range_min || |
| 1098 | win_min > range_cfg->range_max)) { |
| 1099 | dev_err(map->dev, |
| 1100 | "Range %d: window for %d in window\n", |
| 1101 | i, j); |
| 1102 | goto err_range; |
| 1103 | } |
| 1104 | } |
| 1105 | |
| 1106 | new = kzalloc(sizeof(*new), GFP_KERNEL); |
| 1107 | if (new == NULL) { |
| 1108 | ret = -ENOMEM; |
| 1109 | goto err_range; |
| 1110 | } |
| 1111 | |
| 1112 | new->map = map; |
| 1113 | new->name = range_cfg->name; |
| 1114 | new->range_min = range_cfg->range_min; |
| 1115 | new->range_max = range_cfg->range_max; |
| 1116 | new->selector_reg = range_cfg->selector_reg; |
| 1117 | new->selector_mask = range_cfg->selector_mask; |
| 1118 | new->selector_shift = range_cfg->selector_shift; |
| 1119 | new->window_start = range_cfg->window_start; |
| 1120 | new->window_len = range_cfg->window_len; |
| 1121 | |
| 1122 | if (!_regmap_range_add(map, new)) { |
| 1123 | dev_err(map->dev, "Failed to add range %d\n", i); |
| 1124 | kfree(new); |
| 1125 | goto err_range; |
| 1126 | } |
| 1127 | |
| 1128 | if (map->selector_work_buf == NULL) { |
| 1129 | map->selector_work_buf = |
| 1130 | kzalloc(map->format.buf_size, GFP_KERNEL); |
| 1131 | if (map->selector_work_buf == NULL) { |
| 1132 | ret = -ENOMEM; |
| 1133 | goto err_range; |
| 1134 | } |
| 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | ret = regcache_init(map, config); |
| 1139 | if (ret != 0) |
| 1140 | goto err_range; |
| 1141 | |
| 1142 | if (dev) { |
| 1143 | ret = regmap_attach_dev(dev, map, config); |
| 1144 | if (ret != 0) |
| 1145 | goto err_regcache; |
| 1146 | } else { |
| 1147 | regmap_debugfs_init(map); |
| 1148 | } |
| 1149 | |
| 1150 | return map; |
| 1151 | |
| 1152 | err_regcache: |
| 1153 | regcache_exit(map); |
| 1154 | err_range: |
| 1155 | regmap_range_exit(map); |
| 1156 | kfree(map->work_buf); |
| 1157 | err_hwlock: |
| 1158 | if (map->hwlock) |
| 1159 | hwspin_lock_free(map->hwlock); |
| 1160 | err_name: |
| 1161 | kfree_const(map->name); |
| 1162 | err_map: |
| 1163 | kfree(map); |
| 1164 | err: |
| 1165 | return ERR_PTR(ret); |
| 1166 | } |
| 1167 | EXPORT_SYMBOL_GPL(__regmap_init); |
| 1168 | |
| 1169 | static void devm_regmap_release(struct device *dev, void *res) |
| 1170 | { |
| 1171 | regmap_exit(*(struct regmap **)res); |
| 1172 | } |
| 1173 | |
| 1174 | struct regmap *__devm_regmap_init(struct device *dev, |
| 1175 | const struct regmap_bus *bus, |
| 1176 | void *bus_context, |
| 1177 | const struct regmap_config *config, |
| 1178 | struct lock_class_key *lock_key, |
| 1179 | const char *lock_name) |
| 1180 | { |
| 1181 | struct regmap **ptr, *regmap; |
| 1182 | |
| 1183 | ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); |
| 1184 | if (!ptr) |
| 1185 | return ERR_PTR(-ENOMEM); |
| 1186 | |
| 1187 | regmap = __regmap_init(dev, bus, bus_context, config, |
| 1188 | lock_key, lock_name); |
| 1189 | if (!IS_ERR(regmap)) { |
| 1190 | *ptr = regmap; |
| 1191 | devres_add(dev, ptr); |
| 1192 | } else { |
| 1193 | devres_free(ptr); |
| 1194 | } |
| 1195 | |
| 1196 | return regmap; |
| 1197 | } |
| 1198 | EXPORT_SYMBOL_GPL(__devm_regmap_init); |
| 1199 | |
| 1200 | static void regmap_field_init(struct regmap_field *rm_field, |
| 1201 | struct regmap *regmap, struct reg_field reg_field) |
| 1202 | { |
| 1203 | rm_field->regmap = regmap; |
| 1204 | rm_field->reg = reg_field.reg; |
| 1205 | rm_field->shift = reg_field.lsb; |
| 1206 | rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); |
| 1207 | |
| 1208 | WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n"); |
| 1209 | |
| 1210 | rm_field->id_size = reg_field.id_size; |
| 1211 | rm_field->id_offset = reg_field.id_offset; |
| 1212 | } |
| 1213 | |
| 1214 | /** |
| 1215 | * devm_regmap_field_alloc() - Allocate and initialise a register field. |
| 1216 | * |
| 1217 | * @dev: Device that will be interacted with |
| 1218 | * @regmap: regmap bank in which this register field is located. |
| 1219 | * @reg_field: Register field with in the bank. |
| 1220 | * |
| 1221 | * The return value will be an ERR_PTR() on error or a valid pointer |
| 1222 | * to a struct regmap_field. The regmap_field will be automatically freed |
| 1223 | * by the device management code. |
| 1224 | */ |
| 1225 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, |
| 1226 | struct regmap *regmap, struct reg_field reg_field) |
| 1227 | { |
| 1228 | struct regmap_field *rm_field = devm_kzalloc(dev, |
| 1229 | sizeof(*rm_field), GFP_KERNEL); |
| 1230 | if (!rm_field) |
| 1231 | return ERR_PTR(-ENOMEM); |
| 1232 | |
| 1233 | regmap_field_init(rm_field, regmap, reg_field); |
| 1234 | |
| 1235 | return rm_field; |
| 1236 | |
| 1237 | } |
| 1238 | EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); |
| 1239 | |
| 1240 | |
| 1241 | /** |
| 1242 | * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field. |
| 1243 | * |
| 1244 | * @regmap: regmap bank in which this register field is located. |
| 1245 | * @rm_field: regmap register fields within the bank. |
| 1246 | * @reg_field: Register fields within the bank. |
| 1247 | * @num_fields: Number of register fields. |
| 1248 | * |
| 1249 | * The return value will be an -ENOMEM on error or zero for success. |
| 1250 | * Newly allocated regmap_fields should be freed by calling |
| 1251 | * regmap_field_bulk_free() |
| 1252 | */ |
| 1253 | int regmap_field_bulk_alloc(struct regmap *regmap, |
| 1254 | struct regmap_field **rm_field, |
| 1255 | const struct reg_field *reg_field, |
| 1256 | int num_fields) |
| 1257 | { |
| 1258 | struct regmap_field *rf; |
| 1259 | int i; |
| 1260 | |
| 1261 | rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL); |
| 1262 | if (!rf) |
| 1263 | return -ENOMEM; |
| 1264 | |
| 1265 | for (i = 0; i < num_fields; i++) { |
| 1266 | regmap_field_init(&rf[i], regmap, reg_field[i]); |
| 1267 | rm_field[i] = &rf[i]; |
| 1268 | } |
| 1269 | |
| 1270 | return 0; |
| 1271 | } |
| 1272 | EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc); |
| 1273 | |
| 1274 | /** |
| 1275 | * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register |
| 1276 | * fields. |
| 1277 | * |
| 1278 | * @dev: Device that will be interacted with |
| 1279 | * @regmap: regmap bank in which this register field is located. |
| 1280 | * @rm_field: regmap register fields within the bank. |
| 1281 | * @reg_field: Register fields within the bank. |
| 1282 | * @num_fields: Number of register fields. |
| 1283 | * |
| 1284 | * The return value will be an -ENOMEM on error or zero for success. |
| 1285 | * Newly allocated regmap_fields will be automatically freed by the |
| 1286 | * device management code. |
| 1287 | */ |
| 1288 | int devm_regmap_field_bulk_alloc(struct device *dev, |
| 1289 | struct regmap *regmap, |
| 1290 | struct regmap_field **rm_field, |
| 1291 | const struct reg_field *reg_field, |
| 1292 | int num_fields) |
| 1293 | { |
| 1294 | struct regmap_field *rf; |
| 1295 | int i; |
| 1296 | |
| 1297 | rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL); |
| 1298 | if (!rf) |
| 1299 | return -ENOMEM; |
| 1300 | |
| 1301 | for (i = 0; i < num_fields; i++) { |
| 1302 | regmap_field_init(&rf[i], regmap, reg_field[i]); |
| 1303 | rm_field[i] = &rf[i]; |
| 1304 | } |
| 1305 | |
| 1306 | return 0; |
| 1307 | } |
| 1308 | EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc); |
| 1309 | |
| 1310 | /** |
| 1311 | * regmap_field_bulk_free() - Free register field allocated using |
| 1312 | * regmap_field_bulk_alloc. |
| 1313 | * |
| 1314 | * @field: regmap fields which should be freed. |
| 1315 | */ |
| 1316 | void regmap_field_bulk_free(struct regmap_field *field) |
| 1317 | { |
| 1318 | kfree(field); |
| 1319 | } |
| 1320 | EXPORT_SYMBOL_GPL(regmap_field_bulk_free); |
| 1321 | |
| 1322 | /** |
| 1323 | * devm_regmap_field_bulk_free() - Free a bulk register field allocated using |
| 1324 | * devm_regmap_field_bulk_alloc. |
| 1325 | * |
| 1326 | * @dev: Device that will be interacted with |
| 1327 | * @field: regmap field which should be freed. |
| 1328 | * |
| 1329 | * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually |
| 1330 | * drivers need not call this function, as the memory allocated via devm |
| 1331 | * will be freed as per device-driver life-cycle. |
| 1332 | */ |
| 1333 | void devm_regmap_field_bulk_free(struct device *dev, |
| 1334 | struct regmap_field *field) |
| 1335 | { |
| 1336 | devm_kfree(dev, field); |
| 1337 | } |
| 1338 | EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free); |
| 1339 | |
| 1340 | /** |
| 1341 | * devm_regmap_field_free() - Free a register field allocated using |
| 1342 | * devm_regmap_field_alloc. |
| 1343 | * |
| 1344 | * @dev: Device that will be interacted with |
| 1345 | * @field: regmap field which should be freed. |
| 1346 | * |
| 1347 | * Free register field allocated using devm_regmap_field_alloc(). Usually |
| 1348 | * drivers need not call this function, as the memory allocated via devm |
| 1349 | * will be freed as per device-driver life-cyle. |
| 1350 | */ |
| 1351 | void devm_regmap_field_free(struct device *dev, |
| 1352 | struct regmap_field *field) |
| 1353 | { |
| 1354 | devm_kfree(dev, field); |
| 1355 | } |
| 1356 | EXPORT_SYMBOL_GPL(devm_regmap_field_free); |
| 1357 | |
| 1358 | /** |
| 1359 | * regmap_field_alloc() - Allocate and initialise a register field. |
| 1360 | * |
| 1361 | * @regmap: regmap bank in which this register field is located. |
| 1362 | * @reg_field: Register field with in the bank. |
| 1363 | * |
| 1364 | * The return value will be an ERR_PTR() on error or a valid pointer |
| 1365 | * to a struct regmap_field. The regmap_field should be freed by the |
| 1366 | * user once its finished working with it using regmap_field_free(). |
| 1367 | */ |
| 1368 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, |
| 1369 | struct reg_field reg_field) |
| 1370 | { |
| 1371 | struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); |
| 1372 | |
| 1373 | if (!rm_field) |
| 1374 | return ERR_PTR(-ENOMEM); |
| 1375 | |
| 1376 | regmap_field_init(rm_field, regmap, reg_field); |
| 1377 | |
| 1378 | return rm_field; |
| 1379 | } |
| 1380 | EXPORT_SYMBOL_GPL(regmap_field_alloc); |
| 1381 | |
| 1382 | /** |
| 1383 | * regmap_field_free() - Free register field allocated using |
| 1384 | * regmap_field_alloc. |
| 1385 | * |
| 1386 | * @field: regmap field which should be freed. |
| 1387 | */ |
| 1388 | void regmap_field_free(struct regmap_field *field) |
| 1389 | { |
| 1390 | kfree(field); |
| 1391 | } |
| 1392 | EXPORT_SYMBOL_GPL(regmap_field_free); |
| 1393 | |
| 1394 | /** |
| 1395 | * regmap_reinit_cache() - Reinitialise the current register cache |
| 1396 | * |
| 1397 | * @map: Register map to operate on. |
| 1398 | * @config: New configuration. Only the cache data will be used. |
| 1399 | * |
| 1400 | * Discard any existing register cache for the map and initialize a |
| 1401 | * new cache. This can be used to restore the cache to defaults or to |
| 1402 | * update the cache configuration to reflect runtime discovery of the |
| 1403 | * hardware. |
| 1404 | * |
| 1405 | * No explicit locking is done here, the user needs to ensure that |
| 1406 | * this function will not race with other calls to regmap. |
| 1407 | */ |
| 1408 | int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) |
| 1409 | { |
| 1410 | int ret; |
| 1411 | |
| 1412 | regcache_exit(map); |
| 1413 | regmap_debugfs_exit(map); |
| 1414 | |
| 1415 | map->max_register = config->max_register; |
| 1416 | map->max_register_is_set = map->max_register ?: config->max_register_is_0; |
| 1417 | map->writeable_reg = config->writeable_reg; |
| 1418 | map->readable_reg = config->readable_reg; |
| 1419 | map->volatile_reg = config->volatile_reg; |
| 1420 | map->precious_reg = config->precious_reg; |
| 1421 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
| 1422 | map->readable_noinc_reg = config->readable_noinc_reg; |
| 1423 | map->cache_type = config->cache_type; |
| 1424 | |
| 1425 | ret = regmap_set_name(map, config); |
| 1426 | if (ret) |
| 1427 | return ret; |
| 1428 | |
| 1429 | regmap_debugfs_init(map); |
| 1430 | |
| 1431 | map->cache_bypass = false; |
| 1432 | map->cache_only = false; |
| 1433 | |
| 1434 | return regcache_init(map, config); |
| 1435 | } |
| 1436 | EXPORT_SYMBOL_GPL(regmap_reinit_cache); |
| 1437 | |
| 1438 | /** |
| 1439 | * regmap_exit() - Free a previously allocated register map |
| 1440 | * |
| 1441 | * @map: Register map to operate on. |
| 1442 | */ |
| 1443 | void regmap_exit(struct regmap *map) |
| 1444 | { |
| 1445 | struct regmap_async *async; |
| 1446 | |
| 1447 | regcache_exit(map); |
| 1448 | |
| 1449 | regmap_debugfs_exit(map); |
| 1450 | regmap_range_exit(map); |
| 1451 | if (map->bus && map->bus->free_context) |
| 1452 | map->bus->free_context(map->bus_context); |
| 1453 | kfree(map->work_buf); |
| 1454 | while (!list_empty(&map->async_free)) { |
| 1455 | async = list_first_entry_or_null(&map->async_free, |
| 1456 | struct regmap_async, |
| 1457 | list); |
| 1458 | list_del(&async->list); |
| 1459 | kfree(async->work_buf); |
| 1460 | kfree(async); |
| 1461 | } |
| 1462 | if (map->hwlock) |
| 1463 | hwspin_lock_free(map->hwlock); |
| 1464 | if (map->lock == regmap_lock_mutex) |
| 1465 | mutex_destroy(&map->mutex); |
| 1466 | kfree_const(map->name); |
| 1467 | kfree(map->patch); |
| 1468 | if (map->bus && map->bus->free_on_exit) |
| 1469 | kfree(map->bus); |
| 1470 | kfree(map); |
| 1471 | } |
| 1472 | EXPORT_SYMBOL_GPL(regmap_exit); |
| 1473 | |
| 1474 | static int dev_get_regmap_match(struct device *dev, void *res, void *data) |
| 1475 | { |
| 1476 | struct regmap **r = res; |
| 1477 | if (!r || !*r) { |
| 1478 | WARN_ON(!r || !*r); |
| 1479 | return 0; |
| 1480 | } |
| 1481 | |
| 1482 | /* If the user didn't specify a name match any */ |
| 1483 | if (data) |
| 1484 | return (*r)->name && !strcmp((*r)->name, data); |
| 1485 | else |
| 1486 | return 1; |
| 1487 | } |
| 1488 | |
| 1489 | /** |
| 1490 | * dev_get_regmap() - Obtain the regmap (if any) for a device |
| 1491 | * |
| 1492 | * @dev: Device to retrieve the map for |
| 1493 | * @name: Optional name for the register map, usually NULL. |
| 1494 | * |
| 1495 | * Returns the regmap for the device if one is present, or NULL. If |
| 1496 | * name is specified then it must match the name specified when |
| 1497 | * registering the device, if it is NULL then the first regmap found |
| 1498 | * will be used. Devices with multiple register maps are very rare, |
| 1499 | * generic code should normally not need to specify a name. |
| 1500 | */ |
| 1501 | struct regmap *dev_get_regmap(struct device *dev, const char *name) |
| 1502 | { |
| 1503 | struct regmap **r = devres_find(dev, dev_get_regmap_release, |
| 1504 | dev_get_regmap_match, (void *)name); |
| 1505 | |
| 1506 | if (!r) |
| 1507 | return NULL; |
| 1508 | return *r; |
| 1509 | } |
| 1510 | EXPORT_SYMBOL_GPL(dev_get_regmap); |
| 1511 | |
| 1512 | /** |
| 1513 | * regmap_get_device() - Obtain the device from a regmap |
| 1514 | * |
| 1515 | * @map: Register map to operate on. |
| 1516 | * |
| 1517 | * Returns the underlying device that the regmap has been created for. |
| 1518 | */ |
| 1519 | struct device *regmap_get_device(struct regmap *map) |
| 1520 | { |
| 1521 | return map->dev; |
| 1522 | } |
| 1523 | EXPORT_SYMBOL_GPL(regmap_get_device); |
| 1524 | |
| 1525 | static int _regmap_select_page(struct regmap *map, unsigned int *reg, |
| 1526 | struct regmap_range_node *range, |
| 1527 | unsigned int val_num) |
| 1528 | { |
| 1529 | void *orig_work_buf; |
| 1530 | unsigned int win_offset; |
| 1531 | unsigned int win_page; |
| 1532 | bool page_chg; |
| 1533 | int ret; |
| 1534 | |
| 1535 | win_offset = (*reg - range->range_min) % range->window_len; |
| 1536 | win_page = (*reg - range->range_min) / range->window_len; |
| 1537 | |
| 1538 | if (val_num > 1) { |
| 1539 | /* Bulk write shouldn't cross range boundary */ |
| 1540 | if (*reg + val_num - 1 > range->range_max) |
| 1541 | return -EINVAL; |
| 1542 | |
| 1543 | /* ... or single page boundary */ |
| 1544 | if (val_num > range->window_len - win_offset) |
| 1545 | return -EINVAL; |
| 1546 | } |
| 1547 | |
| 1548 | /* It is possible to have selector register inside data window. |
| 1549 | In that case, selector register is located on every page and |
| 1550 | it needs no page switching, when accessed alone. */ |
| 1551 | if (val_num > 1 || |
| 1552 | range->window_start + win_offset != range->selector_reg) { |
| 1553 | /* Use separate work_buf during page switching */ |
| 1554 | orig_work_buf = map->work_buf; |
| 1555 | map->work_buf = map->selector_work_buf; |
| 1556 | |
| 1557 | ret = _regmap_update_bits(map, range->selector_reg, |
| 1558 | range->selector_mask, |
| 1559 | win_page << range->selector_shift, |
| 1560 | &page_chg, false); |
| 1561 | |
| 1562 | map->work_buf = orig_work_buf; |
| 1563 | |
| 1564 | if (ret != 0) |
| 1565 | return ret; |
| 1566 | } |
| 1567 | |
| 1568 | *reg = range->window_start + win_offset; |
| 1569 | |
| 1570 | return 0; |
| 1571 | } |
| 1572 | |
| 1573 | static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, |
| 1574 | unsigned long mask) |
| 1575 | { |
| 1576 | u8 *buf; |
| 1577 | int i; |
| 1578 | |
| 1579 | if (!mask || !map->work_buf) |
| 1580 | return; |
| 1581 | |
| 1582 | buf = map->work_buf; |
| 1583 | |
| 1584 | for (i = 0; i < max_bytes; i++) |
| 1585 | buf[i] |= (mask >> (8 * i)) & 0xff; |
| 1586 | } |
| 1587 | |
| 1588 | static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg) |
| 1589 | { |
| 1590 | reg += map->reg_base; |
| 1591 | |
| 1592 | if (map->format.reg_shift > 0) |
| 1593 | reg >>= map->format.reg_shift; |
| 1594 | else if (map->format.reg_shift < 0) |
| 1595 | reg <<= -(map->format.reg_shift); |
| 1596 | |
| 1597 | return reg; |
| 1598 | } |
| 1599 | |
| 1600 | static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, |
| 1601 | const void *val, size_t val_len, bool noinc) |
| 1602 | { |
| 1603 | struct regmap_range_node *range; |
| 1604 | unsigned long flags; |
| 1605 | void *work_val = map->work_buf + map->format.reg_bytes + |
| 1606 | map->format.pad_bytes; |
| 1607 | void *buf; |
| 1608 | int ret = -ENOTSUPP; |
| 1609 | size_t len; |
| 1610 | int i; |
| 1611 | |
| 1612 | /* Check for unwritable or noinc registers in range |
| 1613 | * before we start |
| 1614 | */ |
| 1615 | if (!regmap_writeable_noinc(map, reg)) { |
| 1616 | for (i = 0; i < val_len / map->format.val_bytes; i++) { |
| 1617 | unsigned int element = |
| 1618 | reg + regmap_get_offset(map, i); |
| 1619 | if (!regmap_writeable(map, element) || |
| 1620 | regmap_writeable_noinc(map, element)) |
| 1621 | return -EINVAL; |
| 1622 | } |
| 1623 | } |
| 1624 | |
| 1625 | if (!map->cache_bypass && map->format.parse_val) { |
| 1626 | unsigned int ival, offset; |
| 1627 | int val_bytes = map->format.val_bytes; |
| 1628 | |
| 1629 | /* Cache the last written value for noinc writes */ |
| 1630 | i = noinc ? val_len - val_bytes : 0; |
| 1631 | for (; i < val_len; i += val_bytes) { |
| 1632 | ival = map->format.parse_val(val + i); |
| 1633 | offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes); |
| 1634 | ret = regcache_write(map, reg + offset, ival); |
| 1635 | if (ret) { |
| 1636 | dev_err(map->dev, |
| 1637 | "Error in caching of register: %x ret: %d\n", |
| 1638 | reg + offset, ret); |
| 1639 | return ret; |
| 1640 | } |
| 1641 | } |
| 1642 | if (map->cache_only) { |
| 1643 | map->cache_dirty = true; |
| 1644 | return 0; |
| 1645 | } |
| 1646 | } |
| 1647 | |
| 1648 | range = _regmap_range_lookup(map, reg); |
| 1649 | if (range) { |
| 1650 | int val_num = val_len / map->format.val_bytes; |
| 1651 | int win_offset = (reg - range->range_min) % range->window_len; |
| 1652 | int win_residue = range->window_len - win_offset; |
| 1653 | |
| 1654 | /* If the write goes beyond the end of the window split it */ |
| 1655 | while (val_num > win_residue) { |
| 1656 | dev_dbg(map->dev, "Writing window %d/%zu\n", |
| 1657 | win_residue, val_len / map->format.val_bytes); |
| 1658 | ret = _regmap_raw_write_impl(map, reg, val, |
| 1659 | win_residue * |
| 1660 | map->format.val_bytes, noinc); |
| 1661 | if (ret != 0) |
| 1662 | return ret; |
| 1663 | |
| 1664 | reg += win_residue; |
| 1665 | val_num -= win_residue; |
| 1666 | val += win_residue * map->format.val_bytes; |
| 1667 | val_len -= win_residue * map->format.val_bytes; |
| 1668 | |
| 1669 | win_offset = (reg - range->range_min) % |
| 1670 | range->window_len; |
| 1671 | win_residue = range->window_len - win_offset; |
| 1672 | } |
| 1673 | |
| 1674 | ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num); |
| 1675 | if (ret != 0) |
| 1676 | return ret; |
| 1677 | } |
| 1678 | |
| 1679 | reg = regmap_reg_addr(map, reg); |
| 1680 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
| 1681 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
| 1682 | map->write_flag_mask); |
| 1683 | |
| 1684 | /* |
| 1685 | * Essentially all I/O mechanisms will be faster with a single |
| 1686 | * buffer to write. Since register syncs often generate raw |
| 1687 | * writes of single registers optimise that case. |
| 1688 | */ |
| 1689 | if (val != work_val && val_len == map->format.val_bytes) { |
| 1690 | memcpy(work_val, val, map->format.val_bytes); |
| 1691 | val = work_val; |
| 1692 | } |
| 1693 | |
| 1694 | if (map->async && map->bus && map->bus->async_write) { |
| 1695 | struct regmap_async *async; |
| 1696 | |
| 1697 | trace_regmap_async_write_start(map, reg, val_len); |
| 1698 | |
| 1699 | spin_lock_irqsave(&map->async_lock, flags); |
| 1700 | async = list_first_entry_or_null(&map->async_free, |
| 1701 | struct regmap_async, |
| 1702 | list); |
| 1703 | if (async) |
| 1704 | list_del(&async->list); |
| 1705 | spin_unlock_irqrestore(&map->async_lock, flags); |
| 1706 | |
| 1707 | if (!async) { |
| 1708 | async = map->bus->async_alloc(); |
| 1709 | if (!async) |
| 1710 | return -ENOMEM; |
| 1711 | |
| 1712 | async->work_buf = kzalloc(map->format.buf_size, |
| 1713 | GFP_KERNEL | GFP_DMA); |
| 1714 | if (!async->work_buf) { |
| 1715 | kfree(async); |
| 1716 | return -ENOMEM; |
| 1717 | } |
| 1718 | } |
| 1719 | |
| 1720 | async->map = map; |
| 1721 | |
| 1722 | /* If the caller supplied the value we can use it safely. */ |
| 1723 | memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + |
| 1724 | map->format.reg_bytes + map->format.val_bytes); |
| 1725 | |
| 1726 | spin_lock_irqsave(&map->async_lock, flags); |
| 1727 | list_add_tail(&async->list, &map->async_list); |
| 1728 | spin_unlock_irqrestore(&map->async_lock, flags); |
| 1729 | |
| 1730 | if (val != work_val) |
| 1731 | ret = map->bus->async_write(map->bus_context, |
| 1732 | async->work_buf, |
| 1733 | map->format.reg_bytes + |
| 1734 | map->format.pad_bytes, |
| 1735 | val, val_len, async); |
| 1736 | else |
| 1737 | ret = map->bus->async_write(map->bus_context, |
| 1738 | async->work_buf, |
| 1739 | map->format.reg_bytes + |
| 1740 | map->format.pad_bytes + |
| 1741 | val_len, NULL, 0, async); |
| 1742 | |
| 1743 | if (ret != 0) { |
| 1744 | dev_err(map->dev, "Failed to schedule write: %d\n", |
| 1745 | ret); |
| 1746 | |
| 1747 | spin_lock_irqsave(&map->async_lock, flags); |
| 1748 | list_move(&async->list, &map->async_free); |
| 1749 | spin_unlock_irqrestore(&map->async_lock, flags); |
| 1750 | } |
| 1751 | |
| 1752 | return ret; |
| 1753 | } |
| 1754 | |
| 1755 | trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); |
| 1756 | |
| 1757 | /* If we're doing a single register write we can probably just |
| 1758 | * send the work_buf directly, otherwise try to do a gather |
| 1759 | * write. |
| 1760 | */ |
| 1761 | if (val == work_val) |
| 1762 | ret = map->write(map->bus_context, map->work_buf, |
| 1763 | map->format.reg_bytes + |
| 1764 | map->format.pad_bytes + |
| 1765 | val_len); |
| 1766 | else if (map->bus && map->bus->gather_write) |
| 1767 | ret = map->bus->gather_write(map->bus_context, map->work_buf, |
| 1768 | map->format.reg_bytes + |
| 1769 | map->format.pad_bytes, |
| 1770 | val, val_len); |
| 1771 | else |
| 1772 | ret = -ENOTSUPP; |
| 1773 | |
| 1774 | /* If that didn't work fall back on linearising by hand. */ |
| 1775 | if (ret == -ENOTSUPP) { |
| 1776 | len = map->format.reg_bytes + map->format.pad_bytes + val_len; |
| 1777 | buf = kzalloc(len, GFP_KERNEL); |
| 1778 | if (!buf) |
| 1779 | return -ENOMEM; |
| 1780 | |
| 1781 | memcpy(buf, map->work_buf, map->format.reg_bytes); |
| 1782 | memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, |
| 1783 | val, val_len); |
| 1784 | ret = map->write(map->bus_context, buf, len); |
| 1785 | |
| 1786 | kfree(buf); |
| 1787 | } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { |
| 1788 | /* regcache_drop_region() takes lock that we already have, |
| 1789 | * thus call map->cache_ops->drop() directly |
| 1790 | */ |
| 1791 | if (map->cache_ops && map->cache_ops->drop) |
| 1792 | map->cache_ops->drop(map, reg, reg + 1); |
| 1793 | } |
| 1794 | |
| 1795 | trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); |
| 1796 | |
| 1797 | return ret; |
| 1798 | } |
| 1799 | |
| 1800 | /** |
| 1801 | * regmap_can_raw_write - Test if regmap_raw_write() is supported |
| 1802 | * |
| 1803 | * @map: Map to check. |
| 1804 | */ |
| 1805 | bool regmap_can_raw_write(struct regmap *map) |
| 1806 | { |
| 1807 | return map->write && map->format.format_val && map->format.format_reg; |
| 1808 | } |
| 1809 | EXPORT_SYMBOL_GPL(regmap_can_raw_write); |
| 1810 | |
| 1811 | /** |
| 1812 | * regmap_get_raw_read_max - Get the maximum size we can read |
| 1813 | * |
| 1814 | * @map: Map to check. |
| 1815 | */ |
| 1816 | size_t regmap_get_raw_read_max(struct regmap *map) |
| 1817 | { |
| 1818 | return map->max_raw_read; |
| 1819 | } |
| 1820 | EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); |
| 1821 | |
| 1822 | /** |
| 1823 | * regmap_get_raw_write_max - Get the maximum size we can read |
| 1824 | * |
| 1825 | * @map: Map to check. |
| 1826 | */ |
| 1827 | size_t regmap_get_raw_write_max(struct regmap *map) |
| 1828 | { |
| 1829 | return map->max_raw_write; |
| 1830 | } |
| 1831 | EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); |
| 1832 | |
| 1833 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
| 1834 | unsigned int val) |
| 1835 | { |
| 1836 | int ret; |
| 1837 | struct regmap_range_node *range; |
| 1838 | struct regmap *map = context; |
| 1839 | |
| 1840 | WARN_ON(!map->format.format_write); |
| 1841 | |
| 1842 | range = _regmap_range_lookup(map, reg); |
| 1843 | if (range) { |
| 1844 | ret = _regmap_select_page(map, ®, range, 1); |
| 1845 | if (ret != 0) |
| 1846 | return ret; |
| 1847 | } |
| 1848 | |
| 1849 | reg = regmap_reg_addr(map, reg); |
| 1850 | map->format.format_write(map, reg, val); |
| 1851 | |
| 1852 | trace_regmap_hw_write_start(map, reg, 1); |
| 1853 | |
| 1854 | ret = map->write(map->bus_context, map->work_buf, map->format.buf_size); |
| 1855 | |
| 1856 | trace_regmap_hw_write_done(map, reg, 1); |
| 1857 | |
| 1858 | return ret; |
| 1859 | } |
| 1860 | |
| 1861 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
| 1862 | unsigned int val) |
| 1863 | { |
| 1864 | struct regmap *map = context; |
| 1865 | struct regmap_range_node *range; |
| 1866 | int ret; |
| 1867 | |
| 1868 | range = _regmap_range_lookup(map, reg); |
| 1869 | if (range) { |
| 1870 | ret = _regmap_select_page(map, ®, range, 1); |
| 1871 | if (ret != 0) |
| 1872 | return ret; |
| 1873 | } |
| 1874 | |
| 1875 | reg = regmap_reg_addr(map, reg); |
| 1876 | return map->bus->reg_write(map->bus_context, reg, val); |
| 1877 | } |
| 1878 | |
| 1879 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
| 1880 | unsigned int val) |
| 1881 | { |
| 1882 | struct regmap *map = context; |
| 1883 | |
| 1884 | WARN_ON(!map->format.format_val); |
| 1885 | |
| 1886 | map->format.format_val(map->work_buf + map->format.reg_bytes |
| 1887 | + map->format.pad_bytes, val, 0); |
| 1888 | return _regmap_raw_write_impl(map, reg, |
| 1889 | map->work_buf + |
| 1890 | map->format.reg_bytes + |
| 1891 | map->format.pad_bytes, |
| 1892 | map->format.val_bytes, |
| 1893 | false); |
| 1894 | } |
| 1895 | |
| 1896 | static inline void *_regmap_map_get_context(struct regmap *map) |
| 1897 | { |
| 1898 | return (map->bus || (!map->bus && map->read)) ? map : map->bus_context; |
| 1899 | } |
| 1900 | |
| 1901 | int _regmap_write(struct regmap *map, unsigned int reg, |
| 1902 | unsigned int val) |
| 1903 | { |
| 1904 | int ret; |
| 1905 | void *context = _regmap_map_get_context(map); |
| 1906 | |
| 1907 | if (!regmap_writeable(map, reg)) |
| 1908 | return -EIO; |
| 1909 | |
| 1910 | if (!map->cache_bypass && !map->defer_caching) { |
| 1911 | ret = regcache_write(map, reg, val); |
| 1912 | if (ret != 0) |
| 1913 | return ret; |
| 1914 | if (map->cache_only) { |
| 1915 | map->cache_dirty = true; |
| 1916 | return 0; |
| 1917 | } |
| 1918 | } |
| 1919 | |
| 1920 | ret = map->reg_write(context, reg, val); |
| 1921 | if (ret == 0) { |
| 1922 | if (regmap_should_log(map)) |
| 1923 | dev_info(map->dev, "%x <= %x\n", reg, val); |
| 1924 | |
| 1925 | trace_regmap_reg_write(map, reg, val); |
| 1926 | } |
| 1927 | |
| 1928 | return ret; |
| 1929 | } |
| 1930 | |
| 1931 | /** |
| 1932 | * regmap_write() - Write a value to a single register |
| 1933 | * |
| 1934 | * @map: Register map to write to |
| 1935 | * @reg: Register to write to |
| 1936 | * @val: Value to be written |
| 1937 | * |
| 1938 | * A value of zero will be returned on success, a negative errno will |
| 1939 | * be returned in error cases. |
| 1940 | */ |
| 1941 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) |
| 1942 | { |
| 1943 | int ret; |
| 1944 | |
| 1945 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 1946 | return -EINVAL; |
| 1947 | |
| 1948 | map->lock(map->lock_arg); |
| 1949 | |
| 1950 | ret = _regmap_write(map, reg, val); |
| 1951 | |
| 1952 | map->unlock(map->lock_arg); |
| 1953 | |
| 1954 | return ret; |
| 1955 | } |
| 1956 | EXPORT_SYMBOL_GPL(regmap_write); |
| 1957 | |
| 1958 | /** |
| 1959 | * regmap_write_async() - Write a value to a single register asynchronously |
| 1960 | * |
| 1961 | * @map: Register map to write to |
| 1962 | * @reg: Register to write to |
| 1963 | * @val: Value to be written |
| 1964 | * |
| 1965 | * A value of zero will be returned on success, a negative errno will |
| 1966 | * be returned in error cases. |
| 1967 | */ |
| 1968 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) |
| 1969 | { |
| 1970 | int ret; |
| 1971 | |
| 1972 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 1973 | return -EINVAL; |
| 1974 | |
| 1975 | map->lock(map->lock_arg); |
| 1976 | |
| 1977 | map->async = true; |
| 1978 | |
| 1979 | ret = _regmap_write(map, reg, val); |
| 1980 | |
| 1981 | map->async = false; |
| 1982 | |
| 1983 | map->unlock(map->lock_arg); |
| 1984 | |
| 1985 | return ret; |
| 1986 | } |
| 1987 | EXPORT_SYMBOL_GPL(regmap_write_async); |
| 1988 | |
| 1989 | int _regmap_raw_write(struct regmap *map, unsigned int reg, |
| 1990 | const void *val, size_t val_len, bool noinc) |
| 1991 | { |
| 1992 | size_t val_bytes = map->format.val_bytes; |
| 1993 | size_t val_count = val_len / val_bytes; |
| 1994 | size_t chunk_count, chunk_bytes; |
| 1995 | size_t chunk_regs = val_count; |
| 1996 | int ret, i; |
| 1997 | |
| 1998 | if (!val_count) |
| 1999 | return -EINVAL; |
| 2000 | |
| 2001 | if (map->use_single_write) |
| 2002 | chunk_regs = 1; |
| 2003 | else if (map->max_raw_write && val_len > map->max_raw_write) |
| 2004 | chunk_regs = map->max_raw_write / val_bytes; |
| 2005 | |
| 2006 | chunk_count = val_count / chunk_regs; |
| 2007 | chunk_bytes = chunk_regs * val_bytes; |
| 2008 | |
| 2009 | /* Write as many bytes as possible with chunk_size */ |
| 2010 | for (i = 0; i < chunk_count; i++) { |
| 2011 | ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc); |
| 2012 | if (ret) |
| 2013 | return ret; |
| 2014 | |
| 2015 | reg += regmap_get_offset(map, chunk_regs); |
| 2016 | val += chunk_bytes; |
| 2017 | val_len -= chunk_bytes; |
| 2018 | } |
| 2019 | |
| 2020 | /* Write remaining bytes */ |
| 2021 | if (val_len) |
| 2022 | ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc); |
| 2023 | |
| 2024 | return ret; |
| 2025 | } |
| 2026 | |
| 2027 | /** |
| 2028 | * regmap_raw_write() - Write raw values to one or more registers |
| 2029 | * |
| 2030 | * @map: Register map to write to |
| 2031 | * @reg: Initial register to write to |
| 2032 | * @val: Block of data to be written, laid out for direct transmission to the |
| 2033 | * device |
| 2034 | * @val_len: Length of data pointed to by val. |
| 2035 | * |
| 2036 | * This function is intended to be used for things like firmware |
| 2037 | * download where a large block of data needs to be transferred to the |
| 2038 | * device. No formatting will be done on the data provided. |
| 2039 | * |
| 2040 | * A value of zero will be returned on success, a negative errno will |
| 2041 | * be returned in error cases. |
| 2042 | */ |
| 2043 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
| 2044 | const void *val, size_t val_len) |
| 2045 | { |
| 2046 | int ret; |
| 2047 | |
| 2048 | if (!regmap_can_raw_write(map)) |
| 2049 | return -EINVAL; |
| 2050 | if (val_len % map->format.val_bytes) |
| 2051 | return -EINVAL; |
| 2052 | |
| 2053 | map->lock(map->lock_arg); |
| 2054 | |
| 2055 | ret = _regmap_raw_write(map, reg, val, val_len, false); |
| 2056 | |
| 2057 | map->unlock(map->lock_arg); |
| 2058 | |
| 2059 | return ret; |
| 2060 | } |
| 2061 | EXPORT_SYMBOL_GPL(regmap_raw_write); |
| 2062 | |
| 2063 | static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg, |
| 2064 | void *val, unsigned int val_len, bool write) |
| 2065 | { |
| 2066 | size_t val_bytes = map->format.val_bytes; |
| 2067 | size_t val_count = val_len / val_bytes; |
| 2068 | unsigned int lastval; |
| 2069 | u8 *u8p; |
| 2070 | u16 *u16p; |
| 2071 | u32 *u32p; |
| 2072 | int ret; |
| 2073 | int i; |
| 2074 | |
| 2075 | switch (val_bytes) { |
| 2076 | case 1: |
| 2077 | u8p = val; |
| 2078 | if (write) |
| 2079 | lastval = (unsigned int)u8p[val_count - 1]; |
| 2080 | break; |
| 2081 | case 2: |
| 2082 | u16p = val; |
| 2083 | if (write) |
| 2084 | lastval = (unsigned int)u16p[val_count - 1]; |
| 2085 | break; |
| 2086 | case 4: |
| 2087 | u32p = val; |
| 2088 | if (write) |
| 2089 | lastval = (unsigned int)u32p[val_count - 1]; |
| 2090 | break; |
| 2091 | default: |
| 2092 | return -EINVAL; |
| 2093 | } |
| 2094 | |
| 2095 | /* |
| 2096 | * Update the cache with the last value we write, the rest is just |
| 2097 | * gone down in the hardware FIFO. We can't cache FIFOs. This makes |
| 2098 | * sure a single read from the cache will work. |
| 2099 | */ |
| 2100 | if (write) { |
| 2101 | if (!map->cache_bypass && !map->defer_caching) { |
| 2102 | ret = regcache_write(map, reg, lastval); |
| 2103 | if (ret != 0) |
| 2104 | return ret; |
| 2105 | if (map->cache_only) { |
| 2106 | map->cache_dirty = true; |
| 2107 | return 0; |
| 2108 | } |
| 2109 | } |
| 2110 | ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count); |
| 2111 | } else { |
| 2112 | ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count); |
| 2113 | } |
| 2114 | |
| 2115 | if (!ret && regmap_should_log(map)) { |
| 2116 | dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>"); |
| 2117 | for (i = 0; i < val_count; i++) { |
| 2118 | switch (val_bytes) { |
| 2119 | case 1: |
| 2120 | pr_cont("%x", u8p[i]); |
| 2121 | break; |
| 2122 | case 2: |
| 2123 | pr_cont("%x", u16p[i]); |
| 2124 | break; |
| 2125 | case 4: |
| 2126 | pr_cont("%x", u32p[i]); |
| 2127 | break; |
| 2128 | default: |
| 2129 | break; |
| 2130 | } |
| 2131 | if (i == (val_count - 1)) |
| 2132 | pr_cont("]\n"); |
| 2133 | else |
| 2134 | pr_cont(","); |
| 2135 | } |
| 2136 | } |
| 2137 | |
| 2138 | return 0; |
| 2139 | } |
| 2140 | |
| 2141 | /** |
| 2142 | * regmap_noinc_write(): Write data to a register without incrementing the |
| 2143 | * register number |
| 2144 | * |
| 2145 | * @map: Register map to write to |
| 2146 | * @reg: Register to write to |
| 2147 | * @val: Pointer to data buffer |
| 2148 | * @val_len: Length of output buffer in bytes. |
| 2149 | * |
| 2150 | * The regmap API usually assumes that bulk bus write operations will write a |
| 2151 | * range of registers. Some devices have certain registers for which a write |
| 2152 | * operation can write to an internal FIFO. |
| 2153 | * |
| 2154 | * The target register must be volatile but registers after it can be |
| 2155 | * completely unrelated cacheable registers. |
| 2156 | * |
| 2157 | * This will attempt multiple writes as required to write val_len bytes. |
| 2158 | * |
| 2159 | * A value of zero will be returned on success, a negative errno will be |
| 2160 | * returned in error cases. |
| 2161 | */ |
| 2162 | int regmap_noinc_write(struct regmap *map, unsigned int reg, |
| 2163 | const void *val, size_t val_len) |
| 2164 | { |
| 2165 | size_t write_len; |
| 2166 | int ret; |
| 2167 | |
| 2168 | if (!map->write && !(map->bus && map->bus->reg_noinc_write)) |
| 2169 | return -EINVAL; |
| 2170 | if (val_len % map->format.val_bytes) |
| 2171 | return -EINVAL; |
| 2172 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2173 | return -EINVAL; |
| 2174 | if (val_len == 0) |
| 2175 | return -EINVAL; |
| 2176 | |
| 2177 | map->lock(map->lock_arg); |
| 2178 | |
| 2179 | if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { |
| 2180 | ret = -EINVAL; |
| 2181 | goto out_unlock; |
| 2182 | } |
| 2183 | |
| 2184 | /* |
| 2185 | * Use the accelerated operation if we can. The val drops the const |
| 2186 | * typing in order to facilitate code reuse in regmap_noinc_readwrite(). |
| 2187 | */ |
| 2188 | if (map->bus->reg_noinc_write) { |
| 2189 | ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true); |
| 2190 | goto out_unlock; |
| 2191 | } |
| 2192 | |
| 2193 | while (val_len) { |
| 2194 | if (map->max_raw_write && map->max_raw_write < val_len) |
| 2195 | write_len = map->max_raw_write; |
| 2196 | else |
| 2197 | write_len = val_len; |
| 2198 | ret = _regmap_raw_write(map, reg, val, write_len, true); |
| 2199 | if (ret) |
| 2200 | goto out_unlock; |
| 2201 | val = ((u8 *)val) + write_len; |
| 2202 | val_len -= write_len; |
| 2203 | } |
| 2204 | |
| 2205 | out_unlock: |
| 2206 | map->unlock(map->lock_arg); |
| 2207 | return ret; |
| 2208 | } |
| 2209 | EXPORT_SYMBOL_GPL(regmap_noinc_write); |
| 2210 | |
| 2211 | /** |
| 2212 | * regmap_field_update_bits_base() - Perform a read/modify/write cycle a |
| 2213 | * register field. |
| 2214 | * |
| 2215 | * @field: Register field to write to |
| 2216 | * @mask: Bitmask to change |
| 2217 | * @val: Value to be written |
| 2218 | * @change: Boolean indicating if a write was done |
| 2219 | * @async: Boolean indicating asynchronously |
| 2220 | * @force: Boolean indicating use force update |
| 2221 | * |
| 2222 | * Perform a read/modify/write cycle on the register field with change, |
| 2223 | * async, force option. |
| 2224 | * |
| 2225 | * A value of zero will be returned on success, a negative errno will |
| 2226 | * be returned in error cases. |
| 2227 | */ |
| 2228 | int regmap_field_update_bits_base(struct regmap_field *field, |
| 2229 | unsigned int mask, unsigned int val, |
| 2230 | bool *change, bool async, bool force) |
| 2231 | { |
| 2232 | mask = (mask << field->shift) & field->mask; |
| 2233 | |
| 2234 | return regmap_update_bits_base(field->regmap, field->reg, |
| 2235 | mask, val << field->shift, |
| 2236 | change, async, force); |
| 2237 | } |
| 2238 | EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); |
| 2239 | |
| 2240 | /** |
| 2241 | * regmap_field_test_bits() - Check if all specified bits are set in a |
| 2242 | * register field. |
| 2243 | * |
| 2244 | * @field: Register field to operate on |
| 2245 | * @bits: Bits to test |
| 2246 | * |
| 2247 | * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the |
| 2248 | * tested bits is not set and 1 if all tested bits are set. |
| 2249 | */ |
| 2250 | int regmap_field_test_bits(struct regmap_field *field, unsigned int bits) |
| 2251 | { |
| 2252 | unsigned int val, ret; |
| 2253 | |
| 2254 | ret = regmap_field_read(field, &val); |
| 2255 | if (ret) |
| 2256 | return ret; |
| 2257 | |
| 2258 | return (val & bits) == bits; |
| 2259 | } |
| 2260 | EXPORT_SYMBOL_GPL(regmap_field_test_bits); |
| 2261 | |
| 2262 | /** |
| 2263 | * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a |
| 2264 | * register field with port ID |
| 2265 | * |
| 2266 | * @field: Register field to write to |
| 2267 | * @id: port ID |
| 2268 | * @mask: Bitmask to change |
| 2269 | * @val: Value to be written |
| 2270 | * @change: Boolean indicating if a write was done |
| 2271 | * @async: Boolean indicating asynchronously |
| 2272 | * @force: Boolean indicating use force update |
| 2273 | * |
| 2274 | * A value of zero will be returned on success, a negative errno will |
| 2275 | * be returned in error cases. |
| 2276 | */ |
| 2277 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
| 2278 | unsigned int mask, unsigned int val, |
| 2279 | bool *change, bool async, bool force) |
| 2280 | { |
| 2281 | if (id >= field->id_size) |
| 2282 | return -EINVAL; |
| 2283 | |
| 2284 | mask = (mask << field->shift) & field->mask; |
| 2285 | |
| 2286 | return regmap_update_bits_base(field->regmap, |
| 2287 | field->reg + (field->id_offset * id), |
| 2288 | mask, val << field->shift, |
| 2289 | change, async, force); |
| 2290 | } |
| 2291 | EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); |
| 2292 | |
| 2293 | /** |
| 2294 | * regmap_bulk_write() - Write multiple registers to the device |
| 2295 | * |
| 2296 | * @map: Register map to write to |
| 2297 | * @reg: First register to be write from |
| 2298 | * @val: Block of data to be written, in native register size for device |
| 2299 | * @val_count: Number of registers to write |
| 2300 | * |
| 2301 | * This function is intended to be used for writing a large block of |
| 2302 | * data to the device either in single transfer or multiple transfer. |
| 2303 | * |
| 2304 | * A value of zero will be returned on success, a negative errno will |
| 2305 | * be returned in error cases. |
| 2306 | */ |
| 2307 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
| 2308 | size_t val_count) |
| 2309 | { |
| 2310 | int ret = 0, i; |
| 2311 | size_t val_bytes = map->format.val_bytes; |
| 2312 | |
| 2313 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2314 | return -EINVAL; |
| 2315 | |
| 2316 | /* |
| 2317 | * Some devices don't support bulk write, for them we have a series of |
| 2318 | * single write operations. |
| 2319 | */ |
| 2320 | if (!map->write || !map->format.parse_inplace) { |
| 2321 | map->lock(map->lock_arg); |
| 2322 | for (i = 0; i < val_count; i++) { |
| 2323 | unsigned int ival; |
| 2324 | |
| 2325 | switch (val_bytes) { |
| 2326 | case 1: |
| 2327 | ival = *(u8 *)(val + (i * val_bytes)); |
| 2328 | break; |
| 2329 | case 2: |
| 2330 | ival = *(u16 *)(val + (i * val_bytes)); |
| 2331 | break; |
| 2332 | case 4: |
| 2333 | ival = *(u32 *)(val + (i * val_bytes)); |
| 2334 | break; |
| 2335 | default: |
| 2336 | ret = -EINVAL; |
| 2337 | goto out; |
| 2338 | } |
| 2339 | |
| 2340 | ret = _regmap_write(map, |
| 2341 | reg + regmap_get_offset(map, i), |
| 2342 | ival); |
| 2343 | if (ret != 0) |
| 2344 | goto out; |
| 2345 | } |
| 2346 | out: |
| 2347 | map->unlock(map->lock_arg); |
| 2348 | } else { |
| 2349 | void *wval; |
| 2350 | |
| 2351 | wval = kmemdup_array(val, val_count, val_bytes, map->alloc_flags); |
| 2352 | if (!wval) |
| 2353 | return -ENOMEM; |
| 2354 | |
| 2355 | for (i = 0; i < val_count * val_bytes; i += val_bytes) |
| 2356 | map->format.parse_inplace(wval + i); |
| 2357 | |
| 2358 | ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); |
| 2359 | |
| 2360 | kfree(wval); |
| 2361 | } |
| 2362 | |
| 2363 | if (!ret) |
| 2364 | trace_regmap_bulk_write(map, reg, val, val_bytes * val_count); |
| 2365 | |
| 2366 | return ret; |
| 2367 | } |
| 2368 | EXPORT_SYMBOL_GPL(regmap_bulk_write); |
| 2369 | |
| 2370 | /* |
| 2371 | * _regmap_raw_multi_reg_write() |
| 2372 | * |
| 2373 | * the (register,newvalue) pairs in regs have not been formatted, but |
| 2374 | * they are all in the same page and have been changed to being page |
| 2375 | * relative. The page register has been written if that was necessary. |
| 2376 | */ |
| 2377 | static int _regmap_raw_multi_reg_write(struct regmap *map, |
| 2378 | const struct reg_sequence *regs, |
| 2379 | size_t num_regs) |
| 2380 | { |
| 2381 | int ret; |
| 2382 | void *buf; |
| 2383 | int i; |
| 2384 | u8 *u8; |
| 2385 | size_t val_bytes = map->format.val_bytes; |
| 2386 | size_t reg_bytes = map->format.reg_bytes; |
| 2387 | size_t pad_bytes = map->format.pad_bytes; |
| 2388 | size_t pair_size = reg_bytes + pad_bytes + val_bytes; |
| 2389 | size_t len = pair_size * num_regs; |
| 2390 | |
| 2391 | if (!len) |
| 2392 | return -EINVAL; |
| 2393 | |
| 2394 | buf = kzalloc(len, GFP_KERNEL); |
| 2395 | if (!buf) |
| 2396 | return -ENOMEM; |
| 2397 | |
| 2398 | /* We have to linearise by hand. */ |
| 2399 | |
| 2400 | u8 = buf; |
| 2401 | |
| 2402 | for (i = 0; i < num_regs; i++) { |
| 2403 | unsigned int reg = regs[i].reg; |
| 2404 | unsigned int val = regs[i].def; |
| 2405 | trace_regmap_hw_write_start(map, reg, 1); |
| 2406 | reg = regmap_reg_addr(map, reg); |
| 2407 | map->format.format_reg(u8, reg, map->reg_shift); |
| 2408 | u8 += reg_bytes + pad_bytes; |
| 2409 | map->format.format_val(u8, val, 0); |
| 2410 | u8 += val_bytes; |
| 2411 | } |
| 2412 | u8 = buf; |
| 2413 | *u8 |= map->write_flag_mask; |
| 2414 | |
| 2415 | ret = map->write(map->bus_context, buf, len); |
| 2416 | |
| 2417 | kfree(buf); |
| 2418 | |
| 2419 | for (i = 0; i < num_regs; i++) { |
| 2420 | int reg = regs[i].reg; |
| 2421 | trace_regmap_hw_write_done(map, reg, 1); |
| 2422 | } |
| 2423 | return ret; |
| 2424 | } |
| 2425 | |
| 2426 | static unsigned int _regmap_register_page(struct regmap *map, |
| 2427 | unsigned int reg, |
| 2428 | struct regmap_range_node *range) |
| 2429 | { |
| 2430 | unsigned int win_page = (reg - range->range_min) / range->window_len; |
| 2431 | |
| 2432 | return win_page; |
| 2433 | } |
| 2434 | |
| 2435 | static int _regmap_range_multi_paged_reg_write(struct regmap *map, |
| 2436 | struct reg_sequence *regs, |
| 2437 | size_t num_regs) |
| 2438 | { |
| 2439 | int ret; |
| 2440 | int i, n; |
| 2441 | struct reg_sequence *base; |
| 2442 | unsigned int this_page = 0; |
| 2443 | unsigned int page_change = 0; |
| 2444 | /* |
| 2445 | * the set of registers are not neccessarily in order, but |
| 2446 | * since the order of write must be preserved this algorithm |
| 2447 | * chops the set each time the page changes. This also applies |
| 2448 | * if there is a delay required at any point in the sequence. |
| 2449 | */ |
| 2450 | base = regs; |
| 2451 | for (i = 0, n = 0; i < num_regs; i++, n++) { |
| 2452 | unsigned int reg = regs[i].reg; |
| 2453 | struct regmap_range_node *range; |
| 2454 | |
| 2455 | range = _regmap_range_lookup(map, reg); |
| 2456 | if (range) { |
| 2457 | unsigned int win_page = _regmap_register_page(map, reg, |
| 2458 | range); |
| 2459 | |
| 2460 | if (i == 0) |
| 2461 | this_page = win_page; |
| 2462 | if (win_page != this_page) { |
| 2463 | this_page = win_page; |
| 2464 | page_change = 1; |
| 2465 | } |
| 2466 | } |
| 2467 | |
| 2468 | /* If we have both a page change and a delay make sure to |
| 2469 | * write the regs and apply the delay before we change the |
| 2470 | * page. |
| 2471 | */ |
| 2472 | |
| 2473 | if (page_change || regs[i].delay_us) { |
| 2474 | |
| 2475 | /* For situations where the first write requires |
| 2476 | * a delay we need to make sure we don't call |
| 2477 | * raw_multi_reg_write with n=0 |
| 2478 | * This can't occur with page breaks as we |
| 2479 | * never write on the first iteration |
| 2480 | */ |
| 2481 | if (regs[i].delay_us && i == 0) |
| 2482 | n = 1; |
| 2483 | |
| 2484 | ret = _regmap_raw_multi_reg_write(map, base, n); |
| 2485 | if (ret != 0) |
| 2486 | return ret; |
| 2487 | |
| 2488 | if (regs[i].delay_us) { |
| 2489 | if (map->can_sleep) |
| 2490 | fsleep(regs[i].delay_us); |
| 2491 | else |
| 2492 | udelay(regs[i].delay_us); |
| 2493 | } |
| 2494 | |
| 2495 | base += n; |
| 2496 | n = 0; |
| 2497 | |
| 2498 | if (page_change) { |
| 2499 | ret = _regmap_select_page(map, |
| 2500 | &base[n].reg, |
| 2501 | range, 1); |
| 2502 | if (ret != 0) |
| 2503 | return ret; |
| 2504 | |
| 2505 | page_change = 0; |
| 2506 | } |
| 2507 | |
| 2508 | } |
| 2509 | |
| 2510 | } |
| 2511 | if (n > 0) |
| 2512 | return _regmap_raw_multi_reg_write(map, base, n); |
| 2513 | return 0; |
| 2514 | } |
| 2515 | |
| 2516 | static int _regmap_multi_reg_write(struct regmap *map, |
| 2517 | const struct reg_sequence *regs, |
| 2518 | size_t num_regs) |
| 2519 | { |
| 2520 | int i; |
| 2521 | int ret; |
| 2522 | |
| 2523 | if (!map->can_multi_write) { |
| 2524 | for (i = 0; i < num_regs; i++) { |
| 2525 | ret = _regmap_write(map, regs[i].reg, regs[i].def); |
| 2526 | if (ret != 0) |
| 2527 | return ret; |
| 2528 | |
| 2529 | if (regs[i].delay_us) { |
| 2530 | if (map->can_sleep) |
| 2531 | fsleep(regs[i].delay_us); |
| 2532 | else |
| 2533 | udelay(regs[i].delay_us); |
| 2534 | } |
| 2535 | } |
| 2536 | return 0; |
| 2537 | } |
| 2538 | |
| 2539 | if (!map->format.parse_inplace) |
| 2540 | return -EINVAL; |
| 2541 | |
| 2542 | if (map->writeable_reg) |
| 2543 | for (i = 0; i < num_regs; i++) { |
| 2544 | int reg = regs[i].reg; |
| 2545 | if (!map->writeable_reg(map->dev, reg)) |
| 2546 | return -EINVAL; |
| 2547 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2548 | return -EINVAL; |
| 2549 | } |
| 2550 | |
| 2551 | if (!map->cache_bypass) { |
| 2552 | for (i = 0; i < num_regs; i++) { |
| 2553 | unsigned int val = regs[i].def; |
| 2554 | unsigned int reg = regs[i].reg; |
| 2555 | ret = regcache_write(map, reg, val); |
| 2556 | if (ret) { |
| 2557 | dev_err(map->dev, |
| 2558 | "Error in caching of register: %x ret: %d\n", |
| 2559 | reg, ret); |
| 2560 | return ret; |
| 2561 | } |
| 2562 | } |
| 2563 | if (map->cache_only) { |
| 2564 | map->cache_dirty = true; |
| 2565 | return 0; |
| 2566 | } |
| 2567 | } |
| 2568 | |
| 2569 | WARN_ON(!map->bus); |
| 2570 | |
| 2571 | for (i = 0; i < num_regs; i++) { |
| 2572 | unsigned int reg = regs[i].reg; |
| 2573 | struct regmap_range_node *range; |
| 2574 | |
| 2575 | /* Coalesce all the writes between a page break or a delay |
| 2576 | * in a sequence |
| 2577 | */ |
| 2578 | range = _regmap_range_lookup(map, reg); |
| 2579 | if (range || regs[i].delay_us) { |
| 2580 | size_t len = sizeof(struct reg_sequence)*num_regs; |
| 2581 | struct reg_sequence *base = kmemdup(regs, len, |
| 2582 | GFP_KERNEL); |
| 2583 | if (!base) |
| 2584 | return -ENOMEM; |
| 2585 | ret = _regmap_range_multi_paged_reg_write(map, base, |
| 2586 | num_regs); |
| 2587 | kfree(base); |
| 2588 | |
| 2589 | return ret; |
| 2590 | } |
| 2591 | } |
| 2592 | return _regmap_raw_multi_reg_write(map, regs, num_regs); |
| 2593 | } |
| 2594 | |
| 2595 | /** |
| 2596 | * regmap_multi_reg_write() - Write multiple registers to the device |
| 2597 | * |
| 2598 | * @map: Register map to write to |
| 2599 | * @regs: Array of structures containing register,value to be written |
| 2600 | * @num_regs: Number of registers to write |
| 2601 | * |
| 2602 | * Write multiple registers to the device where the set of register, value |
| 2603 | * pairs are supplied in any order, possibly not all in a single range. |
| 2604 | * |
| 2605 | * The 'normal' block write mode will send ultimately send data on the |
| 2606 | * target bus as R,V1,V2,V3,..,Vn where successively higher registers are |
| 2607 | * addressed. However, this alternative block multi write mode will send |
| 2608 | * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device |
| 2609 | * must of course support the mode. |
| 2610 | * |
| 2611 | * A value of zero will be returned on success, a negative errno will be |
| 2612 | * returned in error cases. |
| 2613 | */ |
| 2614 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
| 2615 | int num_regs) |
| 2616 | { |
| 2617 | int ret; |
| 2618 | |
| 2619 | map->lock(map->lock_arg); |
| 2620 | |
| 2621 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
| 2622 | |
| 2623 | map->unlock(map->lock_arg); |
| 2624 | |
| 2625 | return ret; |
| 2626 | } |
| 2627 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write); |
| 2628 | |
| 2629 | /** |
| 2630 | * regmap_multi_reg_write_bypassed() - Write multiple registers to the |
| 2631 | * device but not the cache |
| 2632 | * |
| 2633 | * @map: Register map to write to |
| 2634 | * @regs: Array of structures containing register,value to be written |
| 2635 | * @num_regs: Number of registers to write |
| 2636 | * |
| 2637 | * Write multiple registers to the device but not the cache where the set |
| 2638 | * of register are supplied in any order. |
| 2639 | * |
| 2640 | * This function is intended to be used for writing a large block of data |
| 2641 | * atomically to the device in single transfer for those I2C client devices |
| 2642 | * that implement this alternative block write mode. |
| 2643 | * |
| 2644 | * A value of zero will be returned on success, a negative errno will |
| 2645 | * be returned in error cases. |
| 2646 | */ |
| 2647 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
| 2648 | const struct reg_sequence *regs, |
| 2649 | int num_regs) |
| 2650 | { |
| 2651 | int ret; |
| 2652 | bool bypass; |
| 2653 | |
| 2654 | map->lock(map->lock_arg); |
| 2655 | |
| 2656 | bypass = map->cache_bypass; |
| 2657 | map->cache_bypass = true; |
| 2658 | |
| 2659 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
| 2660 | |
| 2661 | map->cache_bypass = bypass; |
| 2662 | |
| 2663 | map->unlock(map->lock_arg); |
| 2664 | |
| 2665 | return ret; |
| 2666 | } |
| 2667 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); |
| 2668 | |
| 2669 | /** |
| 2670 | * regmap_raw_write_async() - Write raw values to one or more registers |
| 2671 | * asynchronously |
| 2672 | * |
| 2673 | * @map: Register map to write to |
| 2674 | * @reg: Initial register to write to |
| 2675 | * @val: Block of data to be written, laid out for direct transmission to the |
| 2676 | * device. Must be valid until regmap_async_complete() is called. |
| 2677 | * @val_len: Length of data pointed to by val. |
| 2678 | * |
| 2679 | * This function is intended to be used for things like firmware |
| 2680 | * download where a large block of data needs to be transferred to the |
| 2681 | * device. No formatting will be done on the data provided. |
| 2682 | * |
| 2683 | * If supported by the underlying bus the write will be scheduled |
| 2684 | * asynchronously, helping maximise I/O speed on higher speed buses |
| 2685 | * like SPI. regmap_async_complete() can be called to ensure that all |
| 2686 | * asynchrnous writes have been completed. |
| 2687 | * |
| 2688 | * A value of zero will be returned on success, a negative errno will |
| 2689 | * be returned in error cases. |
| 2690 | */ |
| 2691 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
| 2692 | const void *val, size_t val_len) |
| 2693 | { |
| 2694 | int ret; |
| 2695 | |
| 2696 | if (val_len % map->format.val_bytes) |
| 2697 | return -EINVAL; |
| 2698 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2699 | return -EINVAL; |
| 2700 | |
| 2701 | map->lock(map->lock_arg); |
| 2702 | |
| 2703 | map->async = true; |
| 2704 | |
| 2705 | ret = _regmap_raw_write(map, reg, val, val_len, false); |
| 2706 | |
| 2707 | map->async = false; |
| 2708 | |
| 2709 | map->unlock(map->lock_arg); |
| 2710 | |
| 2711 | return ret; |
| 2712 | } |
| 2713 | EXPORT_SYMBOL_GPL(regmap_raw_write_async); |
| 2714 | |
| 2715 | static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
| 2716 | unsigned int val_len, bool noinc) |
| 2717 | { |
| 2718 | struct regmap_range_node *range; |
| 2719 | int ret; |
| 2720 | |
| 2721 | if (!map->read) |
| 2722 | return -EINVAL; |
| 2723 | |
| 2724 | range = _regmap_range_lookup(map, reg); |
| 2725 | if (range) { |
| 2726 | ret = _regmap_select_page(map, ®, range, |
| 2727 | noinc ? 1 : val_len / map->format.val_bytes); |
| 2728 | if (ret != 0) |
| 2729 | return ret; |
| 2730 | } |
| 2731 | |
| 2732 | reg = regmap_reg_addr(map, reg); |
| 2733 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
| 2734 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
| 2735 | map->read_flag_mask); |
| 2736 | trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); |
| 2737 | |
| 2738 | ret = map->read(map->bus_context, map->work_buf, |
| 2739 | map->format.reg_bytes + map->format.pad_bytes, |
| 2740 | val, val_len); |
| 2741 | |
| 2742 | trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); |
| 2743 | |
| 2744 | return ret; |
| 2745 | } |
| 2746 | |
| 2747 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
| 2748 | unsigned int *val) |
| 2749 | { |
| 2750 | struct regmap *map = context; |
| 2751 | struct regmap_range_node *range; |
| 2752 | int ret; |
| 2753 | |
| 2754 | range = _regmap_range_lookup(map, reg); |
| 2755 | if (range) { |
| 2756 | ret = _regmap_select_page(map, ®, range, 1); |
| 2757 | if (ret != 0) |
| 2758 | return ret; |
| 2759 | } |
| 2760 | |
| 2761 | reg = regmap_reg_addr(map, reg); |
| 2762 | return map->bus->reg_read(map->bus_context, reg, val); |
| 2763 | } |
| 2764 | |
| 2765 | static int _regmap_bus_read(void *context, unsigned int reg, |
| 2766 | unsigned int *val) |
| 2767 | { |
| 2768 | int ret; |
| 2769 | struct regmap *map = context; |
| 2770 | void *work_val = map->work_buf + map->format.reg_bytes + |
| 2771 | map->format.pad_bytes; |
| 2772 | |
| 2773 | if (!map->format.parse_val) |
| 2774 | return -EINVAL; |
| 2775 | |
| 2776 | ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false); |
| 2777 | if (ret == 0) |
| 2778 | *val = map->format.parse_val(work_val); |
| 2779 | |
| 2780 | return ret; |
| 2781 | } |
| 2782 | |
| 2783 | static int _regmap_read(struct regmap *map, unsigned int reg, |
| 2784 | unsigned int *val) |
| 2785 | { |
| 2786 | int ret; |
| 2787 | void *context = _regmap_map_get_context(map); |
| 2788 | |
| 2789 | if (!map->cache_bypass) { |
| 2790 | ret = regcache_read(map, reg, val); |
| 2791 | if (ret == 0) |
| 2792 | return 0; |
| 2793 | } |
| 2794 | |
| 2795 | if (map->cache_only) |
| 2796 | return -EBUSY; |
| 2797 | |
| 2798 | if (!regmap_readable(map, reg)) |
| 2799 | return -EIO; |
| 2800 | |
| 2801 | ret = map->reg_read(context, reg, val); |
| 2802 | if (ret == 0) { |
| 2803 | if (regmap_should_log(map)) |
| 2804 | dev_info(map->dev, "%x => %x\n", reg, *val); |
| 2805 | |
| 2806 | trace_regmap_reg_read(map, reg, *val); |
| 2807 | |
| 2808 | if (!map->cache_bypass) |
| 2809 | regcache_write(map, reg, *val); |
| 2810 | } |
| 2811 | |
| 2812 | return ret; |
| 2813 | } |
| 2814 | |
| 2815 | /** |
| 2816 | * regmap_read() - Read a value from a single register |
| 2817 | * |
| 2818 | * @map: Register map to read from |
| 2819 | * @reg: Register to be read from |
| 2820 | * @val: Pointer to store read value |
| 2821 | * |
| 2822 | * A value of zero will be returned on success, a negative errno will |
| 2823 | * be returned in error cases. |
| 2824 | */ |
| 2825 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) |
| 2826 | { |
| 2827 | int ret; |
| 2828 | |
| 2829 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2830 | return -EINVAL; |
| 2831 | |
| 2832 | map->lock(map->lock_arg); |
| 2833 | |
| 2834 | ret = _regmap_read(map, reg, val); |
| 2835 | |
| 2836 | map->unlock(map->lock_arg); |
| 2837 | |
| 2838 | return ret; |
| 2839 | } |
| 2840 | EXPORT_SYMBOL_GPL(regmap_read); |
| 2841 | |
| 2842 | /** |
| 2843 | * regmap_read_bypassed() - Read a value from a single register direct |
| 2844 | * from the device, bypassing the cache |
| 2845 | * |
| 2846 | * @map: Register map to read from |
| 2847 | * @reg: Register to be read from |
| 2848 | * @val: Pointer to store read value |
| 2849 | * |
| 2850 | * A value of zero will be returned on success, a negative errno will |
| 2851 | * be returned in error cases. |
| 2852 | */ |
| 2853 | int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val) |
| 2854 | { |
| 2855 | int ret; |
| 2856 | bool bypass, cache_only; |
| 2857 | |
| 2858 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2859 | return -EINVAL; |
| 2860 | |
| 2861 | map->lock(map->lock_arg); |
| 2862 | |
| 2863 | bypass = map->cache_bypass; |
| 2864 | cache_only = map->cache_only; |
| 2865 | map->cache_bypass = true; |
| 2866 | map->cache_only = false; |
| 2867 | |
| 2868 | ret = _regmap_read(map, reg, val); |
| 2869 | |
| 2870 | map->cache_bypass = bypass; |
| 2871 | map->cache_only = cache_only; |
| 2872 | |
| 2873 | map->unlock(map->lock_arg); |
| 2874 | |
| 2875 | return ret; |
| 2876 | } |
| 2877 | EXPORT_SYMBOL_GPL(regmap_read_bypassed); |
| 2878 | |
| 2879 | /** |
| 2880 | * regmap_raw_read() - Read raw data from the device |
| 2881 | * |
| 2882 | * @map: Register map to read from |
| 2883 | * @reg: First register to be read from |
| 2884 | * @val: Pointer to store read value |
| 2885 | * @val_len: Size of data to read |
| 2886 | * |
| 2887 | * A value of zero will be returned on success, a negative errno will |
| 2888 | * be returned in error cases. |
| 2889 | */ |
| 2890 | int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
| 2891 | size_t val_len) |
| 2892 | { |
| 2893 | size_t val_bytes = map->format.val_bytes; |
| 2894 | size_t val_count = val_len / val_bytes; |
| 2895 | unsigned int v; |
| 2896 | int ret, i; |
| 2897 | |
| 2898 | if (val_len % map->format.val_bytes) |
| 2899 | return -EINVAL; |
| 2900 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 2901 | return -EINVAL; |
| 2902 | if (val_count == 0) |
| 2903 | return -EINVAL; |
| 2904 | |
| 2905 | map->lock(map->lock_arg); |
| 2906 | |
| 2907 | if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || |
| 2908 | map->cache_type == REGCACHE_NONE) { |
| 2909 | size_t chunk_count, chunk_bytes; |
| 2910 | size_t chunk_regs = val_count; |
| 2911 | |
| 2912 | if (!map->cache_bypass && map->cache_only) { |
| 2913 | ret = -EBUSY; |
| 2914 | goto out; |
| 2915 | } |
| 2916 | |
| 2917 | if (!map->read) { |
| 2918 | ret = -ENOTSUPP; |
| 2919 | goto out; |
| 2920 | } |
| 2921 | |
| 2922 | if (map->use_single_read) |
| 2923 | chunk_regs = 1; |
| 2924 | else if (map->max_raw_read && val_len > map->max_raw_read) |
| 2925 | chunk_regs = map->max_raw_read / val_bytes; |
| 2926 | |
| 2927 | chunk_count = val_count / chunk_regs; |
| 2928 | chunk_bytes = chunk_regs * val_bytes; |
| 2929 | |
| 2930 | /* Read bytes that fit into whole chunks */ |
| 2931 | for (i = 0; i < chunk_count; i++) { |
| 2932 | ret = _regmap_raw_read(map, reg, val, chunk_bytes, false); |
| 2933 | if (ret != 0) |
| 2934 | goto out; |
| 2935 | |
| 2936 | reg += regmap_get_offset(map, chunk_regs); |
| 2937 | val += chunk_bytes; |
| 2938 | val_len -= chunk_bytes; |
| 2939 | } |
| 2940 | |
| 2941 | /* Read remaining bytes */ |
| 2942 | if (val_len) { |
| 2943 | ret = _regmap_raw_read(map, reg, val, val_len, false); |
| 2944 | if (ret != 0) |
| 2945 | goto out; |
| 2946 | } |
| 2947 | } else { |
| 2948 | /* Otherwise go word by word for the cache; should be low |
| 2949 | * cost as we expect to hit the cache. |
| 2950 | */ |
| 2951 | for (i = 0; i < val_count; i++) { |
| 2952 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), |
| 2953 | &v); |
| 2954 | if (ret != 0) |
| 2955 | goto out; |
| 2956 | |
| 2957 | map->format.format_val(val + (i * val_bytes), v, 0); |
| 2958 | } |
| 2959 | } |
| 2960 | |
| 2961 | out: |
| 2962 | map->unlock(map->lock_arg); |
| 2963 | |
| 2964 | return ret; |
| 2965 | } |
| 2966 | EXPORT_SYMBOL_GPL(regmap_raw_read); |
| 2967 | |
| 2968 | /** |
| 2969 | * regmap_noinc_read(): Read data from a register without incrementing the |
| 2970 | * register number |
| 2971 | * |
| 2972 | * @map: Register map to read from |
| 2973 | * @reg: Register to read from |
| 2974 | * @val: Pointer to data buffer |
| 2975 | * @val_len: Length of output buffer in bytes. |
| 2976 | * |
| 2977 | * The regmap API usually assumes that bulk read operations will read a |
| 2978 | * range of registers. Some devices have certain registers for which a read |
| 2979 | * operation read will read from an internal FIFO. |
| 2980 | * |
| 2981 | * The target register must be volatile but registers after it can be |
| 2982 | * completely unrelated cacheable registers. |
| 2983 | * |
| 2984 | * This will attempt multiple reads as required to read val_len bytes. |
| 2985 | * |
| 2986 | * A value of zero will be returned on success, a negative errno will be |
| 2987 | * returned in error cases. |
| 2988 | */ |
| 2989 | int regmap_noinc_read(struct regmap *map, unsigned int reg, |
| 2990 | void *val, size_t val_len) |
| 2991 | { |
| 2992 | size_t read_len; |
| 2993 | int ret; |
| 2994 | |
| 2995 | if (!map->read) |
| 2996 | return -ENOTSUPP; |
| 2997 | |
| 2998 | if (val_len % map->format.val_bytes) |
| 2999 | return -EINVAL; |
| 3000 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 3001 | return -EINVAL; |
| 3002 | if (val_len == 0) |
| 3003 | return -EINVAL; |
| 3004 | |
| 3005 | map->lock(map->lock_arg); |
| 3006 | |
| 3007 | if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { |
| 3008 | ret = -EINVAL; |
| 3009 | goto out_unlock; |
| 3010 | } |
| 3011 | |
| 3012 | /* |
| 3013 | * We have not defined the FIFO semantics for cache, as the |
| 3014 | * cache is just one value deep. Should we return the last |
| 3015 | * written value? Just avoid this by always reading the FIFO |
| 3016 | * even when using cache. Cache only will not work. |
| 3017 | */ |
| 3018 | if (!map->cache_bypass && map->cache_only) { |
| 3019 | ret = -EBUSY; |
| 3020 | goto out_unlock; |
| 3021 | } |
| 3022 | |
| 3023 | /* Use the accelerated operation if we can */ |
| 3024 | if (map->bus->reg_noinc_read) { |
| 3025 | ret = regmap_noinc_readwrite(map, reg, val, val_len, false); |
| 3026 | goto out_unlock; |
| 3027 | } |
| 3028 | |
| 3029 | while (val_len) { |
| 3030 | if (map->max_raw_read && map->max_raw_read < val_len) |
| 3031 | read_len = map->max_raw_read; |
| 3032 | else |
| 3033 | read_len = val_len; |
| 3034 | ret = _regmap_raw_read(map, reg, val, read_len, true); |
| 3035 | if (ret) |
| 3036 | goto out_unlock; |
| 3037 | val = ((u8 *)val) + read_len; |
| 3038 | val_len -= read_len; |
| 3039 | } |
| 3040 | |
| 3041 | out_unlock: |
| 3042 | map->unlock(map->lock_arg); |
| 3043 | return ret; |
| 3044 | } |
| 3045 | EXPORT_SYMBOL_GPL(regmap_noinc_read); |
| 3046 | |
| 3047 | /** |
| 3048 | * regmap_field_read(): Read a value to a single register field |
| 3049 | * |
| 3050 | * @field: Register field to read from |
| 3051 | * @val: Pointer to store read value |
| 3052 | * |
| 3053 | * A value of zero will be returned on success, a negative errno will |
| 3054 | * be returned in error cases. |
| 3055 | */ |
| 3056 | int regmap_field_read(struct regmap_field *field, unsigned int *val) |
| 3057 | { |
| 3058 | int ret; |
| 3059 | unsigned int reg_val; |
| 3060 | ret = regmap_read(field->regmap, field->reg, ®_val); |
| 3061 | if (ret != 0) |
| 3062 | return ret; |
| 3063 | |
| 3064 | reg_val &= field->mask; |
| 3065 | reg_val >>= field->shift; |
| 3066 | *val = reg_val; |
| 3067 | |
| 3068 | return ret; |
| 3069 | } |
| 3070 | EXPORT_SYMBOL_GPL(regmap_field_read); |
| 3071 | |
| 3072 | /** |
| 3073 | * regmap_fields_read() - Read a value to a single register field with port ID |
| 3074 | * |
| 3075 | * @field: Register field to read from |
| 3076 | * @id: port ID |
| 3077 | * @val: Pointer to store read value |
| 3078 | * |
| 3079 | * A value of zero will be returned on success, a negative errno will |
| 3080 | * be returned in error cases. |
| 3081 | */ |
| 3082 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
| 3083 | unsigned int *val) |
| 3084 | { |
| 3085 | int ret; |
| 3086 | unsigned int reg_val; |
| 3087 | |
| 3088 | if (id >= field->id_size) |
| 3089 | return -EINVAL; |
| 3090 | |
| 3091 | ret = regmap_read(field->regmap, |
| 3092 | field->reg + (field->id_offset * id), |
| 3093 | ®_val); |
| 3094 | if (ret != 0) |
| 3095 | return ret; |
| 3096 | |
| 3097 | reg_val &= field->mask; |
| 3098 | reg_val >>= field->shift; |
| 3099 | *val = reg_val; |
| 3100 | |
| 3101 | return ret; |
| 3102 | } |
| 3103 | EXPORT_SYMBOL_GPL(regmap_fields_read); |
| 3104 | |
| 3105 | static int _regmap_bulk_read(struct regmap *map, unsigned int reg, |
| 3106 | unsigned int *regs, void *val, size_t val_count) |
| 3107 | { |
| 3108 | u32 *u32 = val; |
| 3109 | u16 *u16 = val; |
| 3110 | u8 *u8 = val; |
| 3111 | int ret, i; |
| 3112 | |
| 3113 | map->lock(map->lock_arg); |
| 3114 | |
| 3115 | for (i = 0; i < val_count; i++) { |
| 3116 | unsigned int ival; |
| 3117 | |
| 3118 | if (regs) { |
| 3119 | if (!IS_ALIGNED(regs[i], map->reg_stride)) { |
| 3120 | ret = -EINVAL; |
| 3121 | goto out; |
| 3122 | } |
| 3123 | ret = _regmap_read(map, regs[i], &ival); |
| 3124 | } else { |
| 3125 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), &ival); |
| 3126 | } |
| 3127 | if (ret != 0) |
| 3128 | goto out; |
| 3129 | |
| 3130 | switch (map->format.val_bytes) { |
| 3131 | case 4: |
| 3132 | u32[i] = ival; |
| 3133 | break; |
| 3134 | case 2: |
| 3135 | u16[i] = ival; |
| 3136 | break; |
| 3137 | case 1: |
| 3138 | u8[i] = ival; |
| 3139 | break; |
| 3140 | default: |
| 3141 | ret = -EINVAL; |
| 3142 | goto out; |
| 3143 | } |
| 3144 | } |
| 3145 | out: |
| 3146 | map->unlock(map->lock_arg); |
| 3147 | return ret; |
| 3148 | } |
| 3149 | |
| 3150 | /** |
| 3151 | * regmap_bulk_read() - Read multiple sequential registers from the device |
| 3152 | * |
| 3153 | * @map: Register map to read from |
| 3154 | * @reg: First register to be read from |
| 3155 | * @val: Pointer to store read value, in native register size for device |
| 3156 | * @val_count: Number of registers to read |
| 3157 | * |
| 3158 | * A value of zero will be returned on success, a negative errno will |
| 3159 | * be returned in error cases. |
| 3160 | */ |
| 3161 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, |
| 3162 | size_t val_count) |
| 3163 | { |
| 3164 | int ret, i; |
| 3165 | size_t val_bytes = map->format.val_bytes; |
| 3166 | bool vol = regmap_volatile_range(map, reg, val_count); |
| 3167 | |
| 3168 | if (!IS_ALIGNED(reg, map->reg_stride)) |
| 3169 | return -EINVAL; |
| 3170 | if (val_count == 0) |
| 3171 | return -EINVAL; |
| 3172 | |
| 3173 | if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { |
| 3174 | ret = regmap_raw_read(map, reg, val, val_bytes * val_count); |
| 3175 | if (ret != 0) |
| 3176 | return ret; |
| 3177 | |
| 3178 | for (i = 0; i < val_count * val_bytes; i += val_bytes) |
| 3179 | map->format.parse_inplace(val + i); |
| 3180 | } else { |
| 3181 | ret = _regmap_bulk_read(map, reg, NULL, val, val_count); |
| 3182 | } |
| 3183 | if (!ret) |
| 3184 | trace_regmap_bulk_read(map, reg, val, val_bytes * val_count); |
| 3185 | return ret; |
| 3186 | } |
| 3187 | EXPORT_SYMBOL_GPL(regmap_bulk_read); |
| 3188 | |
| 3189 | /** |
| 3190 | * regmap_multi_reg_read() - Read multiple non-sequential registers from the device |
| 3191 | * |
| 3192 | * @map: Register map to read from |
| 3193 | * @regs: Array of registers to read from |
| 3194 | * @val: Pointer to store read value, in native register size for device |
| 3195 | * @val_count: Number of registers to read |
| 3196 | * |
| 3197 | * A value of zero will be returned on success, a negative errno will |
| 3198 | * be returned in error cases. |
| 3199 | */ |
| 3200 | int regmap_multi_reg_read(struct regmap *map, unsigned int *regs, void *val, |
| 3201 | size_t val_count) |
| 3202 | { |
| 3203 | if (val_count == 0) |
| 3204 | return -EINVAL; |
| 3205 | |
| 3206 | return _regmap_bulk_read(map, 0, regs, val, val_count); |
| 3207 | } |
| 3208 | EXPORT_SYMBOL_GPL(regmap_multi_reg_read); |
| 3209 | |
| 3210 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
| 3211 | unsigned int mask, unsigned int val, |
| 3212 | bool *change, bool force_write) |
| 3213 | { |
| 3214 | int ret; |
| 3215 | unsigned int tmp, orig; |
| 3216 | |
| 3217 | if (change) |
| 3218 | *change = false; |
| 3219 | |
| 3220 | if (regmap_volatile(map, reg) && map->reg_update_bits) { |
| 3221 | reg = regmap_reg_addr(map, reg); |
| 3222 | ret = map->reg_update_bits(map->bus_context, reg, mask, val); |
| 3223 | if (ret == 0 && change) |
| 3224 | *change = true; |
| 3225 | } else { |
| 3226 | ret = _regmap_read(map, reg, &orig); |
| 3227 | if (ret != 0) |
| 3228 | return ret; |
| 3229 | |
| 3230 | tmp = orig & ~mask; |
| 3231 | tmp |= val & mask; |
| 3232 | |
| 3233 | if (force_write || (tmp != orig) || map->force_write_field) { |
| 3234 | ret = _regmap_write(map, reg, tmp); |
| 3235 | if (ret == 0 && change) |
| 3236 | *change = true; |
| 3237 | } |
| 3238 | } |
| 3239 | |
| 3240 | return ret; |
| 3241 | } |
| 3242 | |
| 3243 | /** |
| 3244 | * regmap_update_bits_base() - Perform a read/modify/write cycle on a register |
| 3245 | * |
| 3246 | * @map: Register map to update |
| 3247 | * @reg: Register to update |
| 3248 | * @mask: Bitmask to change |
| 3249 | * @val: New value for bitmask |
| 3250 | * @change: Boolean indicating if a write was done |
| 3251 | * @async: Boolean indicating asynchronously |
| 3252 | * @force: Boolean indicating use force update |
| 3253 | * |
| 3254 | * Perform a read/modify/write cycle on a register map with change, async, force |
| 3255 | * options. |
| 3256 | * |
| 3257 | * If async is true: |
| 3258 | * |
| 3259 | * With most buses the read must be done synchronously so this is most useful |
| 3260 | * for devices with a cache which do not need to interact with the hardware to |
| 3261 | * determine the current register value. |
| 3262 | * |
| 3263 | * Returns zero for success, a negative number on error. |
| 3264 | */ |
| 3265 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
| 3266 | unsigned int mask, unsigned int val, |
| 3267 | bool *change, bool async, bool force) |
| 3268 | { |
| 3269 | int ret; |
| 3270 | |
| 3271 | map->lock(map->lock_arg); |
| 3272 | |
| 3273 | map->async = async; |
| 3274 | |
| 3275 | ret = _regmap_update_bits(map, reg, mask, val, change, force); |
| 3276 | |
| 3277 | map->async = false; |
| 3278 | |
| 3279 | map->unlock(map->lock_arg); |
| 3280 | |
| 3281 | return ret; |
| 3282 | } |
| 3283 | EXPORT_SYMBOL_GPL(regmap_update_bits_base); |
| 3284 | |
| 3285 | /** |
| 3286 | * regmap_test_bits() - Check if all specified bits are set in a register. |
| 3287 | * |
| 3288 | * @map: Register map to operate on |
| 3289 | * @reg: Register to read from |
| 3290 | * @bits: Bits to test |
| 3291 | * |
| 3292 | * Returns 0 if at least one of the tested bits is not set, 1 if all tested |
| 3293 | * bits are set and a negative error number if the underlying regmap_read() |
| 3294 | * fails. |
| 3295 | */ |
| 3296 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) |
| 3297 | { |
| 3298 | unsigned int val, ret; |
| 3299 | |
| 3300 | ret = regmap_read(map, reg, &val); |
| 3301 | if (ret) |
| 3302 | return ret; |
| 3303 | |
| 3304 | return (val & bits) == bits; |
| 3305 | } |
| 3306 | EXPORT_SYMBOL_GPL(regmap_test_bits); |
| 3307 | |
| 3308 | void regmap_async_complete_cb(struct regmap_async *async, int ret) |
| 3309 | { |
| 3310 | struct regmap *map = async->map; |
| 3311 | bool wake; |
| 3312 | |
| 3313 | trace_regmap_async_io_complete(map); |
| 3314 | |
| 3315 | spin_lock(&map->async_lock); |
| 3316 | list_move(&async->list, &map->async_free); |
| 3317 | wake = list_empty(&map->async_list); |
| 3318 | |
| 3319 | if (ret != 0) |
| 3320 | map->async_ret = ret; |
| 3321 | |
| 3322 | spin_unlock(&map->async_lock); |
| 3323 | |
| 3324 | if (wake) |
| 3325 | wake_up(&map->async_waitq); |
| 3326 | } |
| 3327 | EXPORT_SYMBOL_GPL(regmap_async_complete_cb); |
| 3328 | |
| 3329 | static int regmap_async_is_done(struct regmap *map) |
| 3330 | { |
| 3331 | unsigned long flags; |
| 3332 | int ret; |
| 3333 | |
| 3334 | spin_lock_irqsave(&map->async_lock, flags); |
| 3335 | ret = list_empty(&map->async_list); |
| 3336 | spin_unlock_irqrestore(&map->async_lock, flags); |
| 3337 | |
| 3338 | return ret; |
| 3339 | } |
| 3340 | |
| 3341 | /** |
| 3342 | * regmap_async_complete - Ensure all asynchronous I/O has completed. |
| 3343 | * |
| 3344 | * @map: Map to operate on. |
| 3345 | * |
| 3346 | * Blocks until any pending asynchronous I/O has completed. Returns |
| 3347 | * an error code for any failed I/O operations. |
| 3348 | */ |
| 3349 | int regmap_async_complete(struct regmap *map) |
| 3350 | { |
| 3351 | unsigned long flags; |
| 3352 | int ret; |
| 3353 | |
| 3354 | /* Nothing to do with no async support */ |
| 3355 | if (!map->bus || !map->bus->async_write) |
| 3356 | return 0; |
| 3357 | |
| 3358 | trace_regmap_async_complete_start(map); |
| 3359 | |
| 3360 | wait_event(map->async_waitq, regmap_async_is_done(map)); |
| 3361 | |
| 3362 | spin_lock_irqsave(&map->async_lock, flags); |
| 3363 | ret = map->async_ret; |
| 3364 | map->async_ret = 0; |
| 3365 | spin_unlock_irqrestore(&map->async_lock, flags); |
| 3366 | |
| 3367 | trace_regmap_async_complete_done(map); |
| 3368 | |
| 3369 | return ret; |
| 3370 | } |
| 3371 | EXPORT_SYMBOL_GPL(regmap_async_complete); |
| 3372 | |
| 3373 | /** |
| 3374 | * regmap_register_patch - Register and apply register updates to be applied |
| 3375 | * on device initialistion |
| 3376 | * |
| 3377 | * @map: Register map to apply updates to. |
| 3378 | * @regs: Values to update. |
| 3379 | * @num_regs: Number of entries in regs. |
| 3380 | * |
| 3381 | * Register a set of register updates to be applied to the device |
| 3382 | * whenever the device registers are synchronised with the cache and |
| 3383 | * apply them immediately. Typically this is used to apply |
| 3384 | * corrections to be applied to the device defaults on startup, such |
| 3385 | * as the updates some vendors provide to undocumented registers. |
| 3386 | * |
| 3387 | * The caller must ensure that this function cannot be called |
| 3388 | * concurrently with either itself or regcache_sync(). |
| 3389 | */ |
| 3390 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
| 3391 | int num_regs) |
| 3392 | { |
| 3393 | struct reg_sequence *p; |
| 3394 | int ret; |
| 3395 | bool bypass; |
| 3396 | |
| 3397 | if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", |
| 3398 | num_regs)) |
| 3399 | return 0; |
| 3400 | |
| 3401 | p = krealloc(map->patch, |
| 3402 | sizeof(struct reg_sequence) * (map->patch_regs + num_regs), |
| 3403 | GFP_KERNEL); |
| 3404 | if (p) { |
| 3405 | memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); |
| 3406 | map->patch = p; |
| 3407 | map->patch_regs += num_regs; |
| 3408 | } else { |
| 3409 | return -ENOMEM; |
| 3410 | } |
| 3411 | |
| 3412 | map->lock(map->lock_arg); |
| 3413 | |
| 3414 | bypass = map->cache_bypass; |
| 3415 | |
| 3416 | map->cache_bypass = true; |
| 3417 | map->async = true; |
| 3418 | |
| 3419 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
| 3420 | |
| 3421 | map->async = false; |
| 3422 | map->cache_bypass = bypass; |
| 3423 | |
| 3424 | map->unlock(map->lock_arg); |
| 3425 | |
| 3426 | regmap_async_complete(map); |
| 3427 | |
| 3428 | return ret; |
| 3429 | } |
| 3430 | EXPORT_SYMBOL_GPL(regmap_register_patch); |
| 3431 | |
| 3432 | /** |
| 3433 | * regmap_get_val_bytes() - Report the size of a register value |
| 3434 | * |
| 3435 | * @map: Register map to operate on. |
| 3436 | * |
| 3437 | * Report the size of a register value, mainly intended to for use by |
| 3438 | * generic infrastructure built on top of regmap. |
| 3439 | */ |
| 3440 | int regmap_get_val_bytes(struct regmap *map) |
| 3441 | { |
| 3442 | if (map->format.format_write) |
| 3443 | return -EINVAL; |
| 3444 | |
| 3445 | return map->format.val_bytes; |
| 3446 | } |
| 3447 | EXPORT_SYMBOL_GPL(regmap_get_val_bytes); |
| 3448 | |
| 3449 | /** |
| 3450 | * regmap_get_max_register() - Report the max register value |
| 3451 | * |
| 3452 | * @map: Register map to operate on. |
| 3453 | * |
| 3454 | * Report the max register value, mainly intended to for use by |
| 3455 | * generic infrastructure built on top of regmap. |
| 3456 | */ |
| 3457 | int regmap_get_max_register(struct regmap *map) |
| 3458 | { |
| 3459 | return map->max_register_is_set ? map->max_register : -EINVAL; |
| 3460 | } |
| 3461 | EXPORT_SYMBOL_GPL(regmap_get_max_register); |
| 3462 | |
| 3463 | /** |
| 3464 | * regmap_get_reg_stride() - Report the register address stride |
| 3465 | * |
| 3466 | * @map: Register map to operate on. |
| 3467 | * |
| 3468 | * Report the register address stride, mainly intended to for use by |
| 3469 | * generic infrastructure built on top of regmap. |
| 3470 | */ |
| 3471 | int regmap_get_reg_stride(struct regmap *map) |
| 3472 | { |
| 3473 | return map->reg_stride; |
| 3474 | } |
| 3475 | EXPORT_SYMBOL_GPL(regmap_get_reg_stride); |
| 3476 | |
| 3477 | /** |
| 3478 | * regmap_might_sleep() - Returns whether a regmap access might sleep. |
| 3479 | * |
| 3480 | * @map: Register map to operate on. |
| 3481 | * |
| 3482 | * Returns true if an access to the register might sleep, else false. |
| 3483 | */ |
| 3484 | bool regmap_might_sleep(struct regmap *map) |
| 3485 | { |
| 3486 | return map->can_sleep; |
| 3487 | } |
| 3488 | EXPORT_SYMBOL_GPL(regmap_might_sleep); |
| 3489 | |
| 3490 | int regmap_parse_val(struct regmap *map, const void *buf, |
| 3491 | unsigned int *val) |
| 3492 | { |
| 3493 | if (!map->format.parse_val) |
| 3494 | return -EINVAL; |
| 3495 | |
| 3496 | *val = map->format.parse_val(buf); |
| 3497 | |
| 3498 | return 0; |
| 3499 | } |
| 3500 | EXPORT_SYMBOL_GPL(regmap_parse_val); |
| 3501 | |
| 3502 | static int __init regmap_initcall(void) |
| 3503 | { |
| 3504 | regmap_debugfs_initcall(); |
| 3505 | |
| 3506 | return 0; |
| 3507 | } |
| 3508 | postcore_initcall(regmap_initcall); |