| 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * AHCI SATA platform library |
| 4 | * |
| 5 | * Copyright 2004-2005 Red Hat, Inc. |
| 6 | * Jeff Garzik <jgarzik@pobox.com> |
| 7 | * Copyright 2010 MontaVista Software, LLC. |
| 8 | * Anton Vorontsov <avorontsov@ru.mvista.com> |
| 9 | */ |
| 10 | |
| 11 | #include <linux/clk.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/gfp.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/pm.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/device.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/libata.h> |
| 20 | #include <linux/ahci_platform.h> |
| 21 | #include <linux/phy/phy.h> |
| 22 | #include <linux/pm_runtime.h> |
| 23 | #include <linux/of_platform.h> |
| 24 | #include <linux/reset.h> |
| 25 | #include "ahci.h" |
| 26 | |
| 27 | static void ahci_host_stop(struct ata_host *host); |
| 28 | |
| 29 | struct ata_port_operations ahci_platform_ops = { |
| 30 | .inherits = &ahci_ops, |
| 31 | .host_stop = ahci_host_stop, |
| 32 | }; |
| 33 | EXPORT_SYMBOL_GPL(ahci_platform_ops); |
| 34 | |
| 35 | /** |
| 36 | * ahci_platform_enable_phys - Enable PHYs |
| 37 | * @hpriv: host private area to store config values |
| 38 | * |
| 39 | * This function enables all the PHYs found in hpriv->phys, if any. |
| 40 | * If a PHY fails to be enabled, it disables all the PHYs already |
| 41 | * enabled in reverse order and returns an error. |
| 42 | * |
| 43 | * RETURNS: |
| 44 | * 0 on success otherwise a negative error code |
| 45 | */ |
| 46 | int ahci_platform_enable_phys(struct ahci_host_priv *hpriv) |
| 47 | { |
| 48 | int rc, i; |
| 49 | |
| 50 | for (i = 0; i < hpriv->nports; i++) { |
| 51 | rc = phy_init(hpriv->phys[i]); |
| 52 | if (rc) |
| 53 | goto disable_phys; |
| 54 | |
| 55 | rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); |
| 56 | if (rc) { |
| 57 | phy_exit(hpriv->phys[i]); |
| 58 | goto disable_phys; |
| 59 | } |
| 60 | |
| 61 | rc = phy_power_on(hpriv->phys[i]); |
| 62 | if (rc) { |
| 63 | phy_exit(hpriv->phys[i]); |
| 64 | goto disable_phys; |
| 65 | } |
| 66 | } |
| 67 | |
| 68 | return 0; |
| 69 | |
| 70 | disable_phys: |
| 71 | while (--i >= 0) { |
| 72 | phy_power_off(hpriv->phys[i]); |
| 73 | phy_exit(hpriv->phys[i]); |
| 74 | } |
| 75 | return rc; |
| 76 | } |
| 77 | EXPORT_SYMBOL_GPL(ahci_platform_enable_phys); |
| 78 | |
| 79 | /** |
| 80 | * ahci_platform_disable_phys - Disable PHYs |
| 81 | * @hpriv: host private area to store config values |
| 82 | * |
| 83 | * This function disables all PHYs found in hpriv->phys. |
| 84 | */ |
| 85 | void ahci_platform_disable_phys(struct ahci_host_priv *hpriv) |
| 86 | { |
| 87 | int i; |
| 88 | |
| 89 | for (i = 0; i < hpriv->nports; i++) { |
| 90 | phy_power_off(hpriv->phys[i]); |
| 91 | phy_exit(hpriv->phys[i]); |
| 92 | } |
| 93 | } |
| 94 | EXPORT_SYMBOL_GPL(ahci_platform_disable_phys); |
| 95 | |
| 96 | /** |
| 97 | * ahci_platform_find_clk - Find platform clock |
| 98 | * @hpriv: host private area to store config values |
| 99 | * @con_id: clock connection ID |
| 100 | * |
| 101 | * This function returns a pointer to the clock descriptor of the clock with |
| 102 | * the passed ID. |
| 103 | * |
| 104 | * RETURNS: |
| 105 | * Pointer to the clock descriptor on success otherwise NULL |
| 106 | */ |
| 107 | struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, const char *con_id) |
| 108 | { |
| 109 | int i; |
| 110 | |
| 111 | for (i = 0; i < hpriv->n_clks; i++) { |
| 112 | if (!strcmp(hpriv->clks[i].id, con_id)) |
| 113 | return hpriv->clks[i].clk; |
| 114 | } |
| 115 | |
| 116 | return NULL; |
| 117 | } |
| 118 | EXPORT_SYMBOL_GPL(ahci_platform_find_clk); |
| 119 | |
| 120 | /** |
| 121 | * ahci_platform_enable_clks - Enable platform clocks |
| 122 | * @hpriv: host private area to store config values |
| 123 | * |
| 124 | * This function enables all the clks found for the AHCI device. |
| 125 | * |
| 126 | * RETURNS: |
| 127 | * 0 on success otherwise a negative error code |
| 128 | */ |
| 129 | int ahci_platform_enable_clks(struct ahci_host_priv *hpriv) |
| 130 | { |
| 131 | return clk_bulk_prepare_enable(hpriv->n_clks, hpriv->clks); |
| 132 | } |
| 133 | EXPORT_SYMBOL_GPL(ahci_platform_enable_clks); |
| 134 | |
| 135 | /** |
| 136 | * ahci_platform_disable_clks - Disable platform clocks |
| 137 | * @hpriv: host private area to store config values |
| 138 | * |
| 139 | * This function disables all the clocks enabled before |
| 140 | * (bulk-clocks-disable function is supposed to do that in reverse |
| 141 | * from the enabling procedure order). |
| 142 | */ |
| 143 | void ahci_platform_disable_clks(struct ahci_host_priv *hpriv) |
| 144 | { |
| 145 | clk_bulk_disable_unprepare(hpriv->n_clks, hpriv->clks); |
| 146 | } |
| 147 | EXPORT_SYMBOL_GPL(ahci_platform_disable_clks); |
| 148 | |
| 149 | /** |
| 150 | * ahci_platform_deassert_rsts - Deassert/trigger platform resets |
| 151 | * @hpriv: host private area to store config values |
| 152 | * |
| 153 | * This function deasserts or triggers all the reset lines found for |
| 154 | * the AHCI device. |
| 155 | * |
| 156 | * RETURNS: |
| 157 | * 0 on success otherwise a negative error code |
| 158 | */ |
| 159 | int ahci_platform_deassert_rsts(struct ahci_host_priv *hpriv) |
| 160 | { |
| 161 | if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER) |
| 162 | return reset_control_reset(hpriv->rsts); |
| 163 | |
| 164 | return reset_control_deassert(hpriv->rsts); |
| 165 | } |
| 166 | EXPORT_SYMBOL_GPL(ahci_platform_deassert_rsts); |
| 167 | |
| 168 | /** |
| 169 | * ahci_platform_assert_rsts - Assert/rearm platform resets |
| 170 | * @hpriv: host private area to store config values |
| 171 | * |
| 172 | * This function asserts or rearms (for self-deasserting resets) all |
| 173 | * the reset controls found for the AHCI device. |
| 174 | * |
| 175 | * RETURNS: |
| 176 | * 0 on success otherwise a negative error code |
| 177 | */ |
| 178 | int ahci_platform_assert_rsts(struct ahci_host_priv *hpriv) |
| 179 | { |
| 180 | if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER) |
| 181 | return reset_control_rearm(hpriv->rsts); |
| 182 | |
| 183 | return reset_control_assert(hpriv->rsts); |
| 184 | } |
| 185 | EXPORT_SYMBOL_GPL(ahci_platform_assert_rsts); |
| 186 | |
| 187 | /** |
| 188 | * ahci_platform_enable_regulators - Enable regulators |
| 189 | * @hpriv: host private area to store config values |
| 190 | * |
| 191 | * This function enables all the regulators found in controller and |
| 192 | * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it |
| 193 | * disables all the regulators already enabled in reverse order and |
| 194 | * returns an error. |
| 195 | * |
| 196 | * RETURNS: |
| 197 | * 0 on success otherwise a negative error code |
| 198 | */ |
| 199 | int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv) |
| 200 | { |
| 201 | int rc, i; |
| 202 | |
| 203 | rc = regulator_enable(hpriv->ahci_regulator); |
| 204 | if (rc) |
| 205 | return rc; |
| 206 | |
| 207 | rc = regulator_enable(hpriv->phy_regulator); |
| 208 | if (rc) |
| 209 | goto disable_ahci_pwrs; |
| 210 | |
| 211 | for (i = 0; i < hpriv->nports; i++) { |
| 212 | if (!hpriv->target_pwrs[i]) |
| 213 | continue; |
| 214 | |
| 215 | rc = regulator_enable(hpriv->target_pwrs[i]); |
| 216 | if (rc) |
| 217 | goto disable_target_pwrs; |
| 218 | } |
| 219 | |
| 220 | return 0; |
| 221 | |
| 222 | disable_target_pwrs: |
| 223 | while (--i >= 0) |
| 224 | if (hpriv->target_pwrs[i]) |
| 225 | regulator_disable(hpriv->target_pwrs[i]); |
| 226 | |
| 227 | regulator_disable(hpriv->phy_regulator); |
| 228 | disable_ahci_pwrs: |
| 229 | regulator_disable(hpriv->ahci_regulator); |
| 230 | return rc; |
| 231 | } |
| 232 | EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators); |
| 233 | |
| 234 | /** |
| 235 | * ahci_platform_disable_regulators - Disable regulators |
| 236 | * @hpriv: host private area to store config values |
| 237 | * |
| 238 | * This function disables all regulators found in hpriv->target_pwrs and |
| 239 | * AHCI controller. |
| 240 | */ |
| 241 | void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv) |
| 242 | { |
| 243 | int i; |
| 244 | |
| 245 | for (i = 0; i < hpriv->nports; i++) { |
| 246 | if (!hpriv->target_pwrs[i]) |
| 247 | continue; |
| 248 | regulator_disable(hpriv->target_pwrs[i]); |
| 249 | } |
| 250 | |
| 251 | regulator_disable(hpriv->ahci_regulator); |
| 252 | regulator_disable(hpriv->phy_regulator); |
| 253 | } |
| 254 | EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators); |
| 255 | /** |
| 256 | * ahci_platform_enable_resources - Enable platform resources |
| 257 | * @hpriv: host private area to store config values |
| 258 | * |
| 259 | * This function enables all ahci_platform managed resources in the |
| 260 | * following order: |
| 261 | * 1) Regulator |
| 262 | * 2) Clocks (through ahci_platform_enable_clks) |
| 263 | * 3) Resets |
| 264 | * 4) Phys |
| 265 | * |
| 266 | * If resource enabling fails at any point the previous enabled resources |
| 267 | * are disabled in reverse order. |
| 268 | * |
| 269 | * RETURNS: |
| 270 | * 0 on success otherwise a negative error code |
| 271 | */ |
| 272 | int ahci_platform_enable_resources(struct ahci_host_priv *hpriv) |
| 273 | { |
| 274 | int rc; |
| 275 | |
| 276 | rc = ahci_platform_enable_regulators(hpriv); |
| 277 | if (rc) |
| 278 | return rc; |
| 279 | |
| 280 | rc = ahci_platform_enable_clks(hpriv); |
| 281 | if (rc) |
| 282 | goto disable_regulator; |
| 283 | |
| 284 | rc = ahci_platform_deassert_rsts(hpriv); |
| 285 | if (rc) |
| 286 | goto disable_clks; |
| 287 | |
| 288 | rc = ahci_platform_enable_phys(hpriv); |
| 289 | if (rc) |
| 290 | goto disable_rsts; |
| 291 | |
| 292 | return 0; |
| 293 | |
| 294 | disable_rsts: |
| 295 | ahci_platform_assert_rsts(hpriv); |
| 296 | |
| 297 | disable_clks: |
| 298 | ahci_platform_disable_clks(hpriv); |
| 299 | |
| 300 | disable_regulator: |
| 301 | ahci_platform_disable_regulators(hpriv); |
| 302 | |
| 303 | return rc; |
| 304 | } |
| 305 | EXPORT_SYMBOL_GPL(ahci_platform_enable_resources); |
| 306 | |
| 307 | /** |
| 308 | * ahci_platform_disable_resources - Disable platform resources |
| 309 | * @hpriv: host private area to store config values |
| 310 | * |
| 311 | * This function disables all ahci_platform managed resources in the |
| 312 | * following order: |
| 313 | * 1) Phys |
| 314 | * 2) Resets |
| 315 | * 3) Clocks (through ahci_platform_disable_clks) |
| 316 | * 4) Regulator |
| 317 | */ |
| 318 | void ahci_platform_disable_resources(struct ahci_host_priv *hpriv) |
| 319 | { |
| 320 | ahci_platform_disable_phys(hpriv); |
| 321 | |
| 322 | ahci_platform_assert_rsts(hpriv); |
| 323 | |
| 324 | ahci_platform_disable_clks(hpriv); |
| 325 | |
| 326 | ahci_platform_disable_regulators(hpriv); |
| 327 | } |
| 328 | EXPORT_SYMBOL_GPL(ahci_platform_disable_resources); |
| 329 | |
| 330 | static void ahci_platform_put_resources(struct device *dev, void *res) |
| 331 | { |
| 332 | struct ahci_host_priv *hpriv = res; |
| 333 | int c; |
| 334 | |
| 335 | if (hpriv->got_runtime_pm) { |
| 336 | pm_runtime_put_sync(dev); |
| 337 | pm_runtime_disable(dev); |
| 338 | } |
| 339 | |
| 340 | /* |
| 341 | * The regulators are tied to child node device and not to the |
| 342 | * SATA device itself. So we can't use devm for automatically |
| 343 | * releasing them. We have to do it manually here. |
| 344 | */ |
| 345 | for (c = 0; c < hpriv->nports; c++) |
| 346 | if (hpriv->target_pwrs && hpriv->target_pwrs[c]) |
| 347 | regulator_put(hpriv->target_pwrs[c]); |
| 348 | |
| 349 | kfree(hpriv->target_pwrs); |
| 350 | } |
| 351 | |
| 352 | static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, |
| 353 | struct device *dev, struct device_node *node) |
| 354 | { |
| 355 | int rc; |
| 356 | |
| 357 | hpriv->phys[port] = devm_of_phy_get(dev, node, NULL); |
| 358 | |
| 359 | if (!IS_ERR(hpriv->phys[port])) |
| 360 | return 0; |
| 361 | |
| 362 | rc = PTR_ERR(hpriv->phys[port]); |
| 363 | switch (rc) { |
| 364 | case -ENOSYS: |
| 365 | /* No PHY support. Check if PHY is required. */ |
| 366 | if (of_find_property(node, "phys", NULL)) { |
| 367 | dev_err(dev, |
| 368 | "couldn't get PHY in node %pOFn: ENOSYS\n", |
| 369 | node); |
| 370 | break; |
| 371 | } |
| 372 | fallthrough; |
| 373 | case -ENODEV: |
| 374 | /* continue normally */ |
| 375 | hpriv->phys[port] = NULL; |
| 376 | rc = 0; |
| 377 | break; |
| 378 | case -EPROBE_DEFER: |
| 379 | /* Do not complain yet */ |
| 380 | break; |
| 381 | |
| 382 | default: |
| 383 | dev_err(dev, |
| 384 | "couldn't get PHY in node %pOFn: %d\n", |
| 385 | node, rc); |
| 386 | |
| 387 | break; |
| 388 | } |
| 389 | |
| 390 | return rc; |
| 391 | } |
| 392 | |
| 393 | static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port, |
| 394 | struct device *dev) |
| 395 | { |
| 396 | struct regulator *target_pwr; |
| 397 | int rc = 0; |
| 398 | |
| 399 | target_pwr = regulator_get(dev, "target"); |
| 400 | |
| 401 | if (!IS_ERR(target_pwr)) |
| 402 | hpriv->target_pwrs[port] = target_pwr; |
| 403 | else |
| 404 | rc = PTR_ERR(target_pwr); |
| 405 | |
| 406 | return rc; |
| 407 | } |
| 408 | |
| 409 | static int ahci_platform_get_firmware(struct ahci_host_priv *hpriv, |
| 410 | struct device *dev) |
| 411 | { |
| 412 | struct device_node *child; |
| 413 | u32 port; |
| 414 | |
| 415 | if (!of_property_read_u32(dev->of_node, "hba-cap", &hpriv->saved_cap)) |
| 416 | hpriv->saved_cap &= (HOST_CAP_SSS | HOST_CAP_MPS); |
| 417 | |
| 418 | of_property_read_u32(dev->of_node, |
| 419 | "ports-implemented", &hpriv->saved_port_map); |
| 420 | |
| 421 | for_each_child_of_node(dev->of_node, child) { |
| 422 | if (!of_device_is_available(child)) |
| 423 | continue; |
| 424 | |
| 425 | if (of_property_read_u32(child, "reg", &port)) { |
| 426 | of_node_put(child); |
| 427 | return -EINVAL; |
| 428 | } |
| 429 | |
| 430 | if (!of_property_read_u32(child, "hba-port-cap", &hpriv->saved_port_cap[port])) |
| 431 | hpriv->saved_port_cap[port] &= PORT_CMD_CAP; |
| 432 | } |
| 433 | |
| 434 | return 0; |
| 435 | } |
| 436 | |
| 437 | /** |
| 438 | * ahci_platform_get_resources - Get platform resources |
| 439 | * @pdev: platform device to get resources for |
| 440 | * @flags: bitmap representing the resource to get |
| 441 | * |
| 442 | * This function allocates an ahci_host_priv struct, and gets the following |
| 443 | * resources, storing a reference to them inside the returned struct: |
| 444 | * |
| 445 | * 1) mmio registers (IORESOURCE_MEM 0, mandatory) |
| 446 | * 2) regulator for controlling the targets power (optional) |
| 447 | * regulator for controlling the AHCI controller (optional) |
| 448 | * 3) all clocks specified in the devicetree node, or a single |
| 449 | * clock for non-OF platforms (optional) |
| 450 | * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional) |
| 451 | * 5) phys (optional) |
| 452 | * |
| 453 | * RETURNS: |
| 454 | * The allocated ahci_host_priv on success, otherwise an ERR_PTR value |
| 455 | */ |
| 456 | struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, |
| 457 | unsigned int flags) |
| 458 | { |
| 459 | int child_nodes, rc = -ENOMEM, enabled_ports = 0; |
| 460 | struct device *dev = &pdev->dev; |
| 461 | struct ahci_host_priv *hpriv; |
| 462 | struct device_node *child; |
| 463 | u32 mask_port_map = 0; |
| 464 | |
| 465 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) |
| 466 | return ERR_PTR(-ENOMEM); |
| 467 | |
| 468 | hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv), |
| 469 | GFP_KERNEL); |
| 470 | if (!hpriv) |
| 471 | goto err_out; |
| 472 | |
| 473 | devres_add(dev, hpriv); |
| 474 | |
| 475 | /* |
| 476 | * If the DT provided an "ahci" named resource, use it. Otherwise, |
| 477 | * fallback to using the default first resource for the device node. |
| 478 | */ |
| 479 | if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "ahci")) |
| 480 | hpriv->mmio = devm_platform_ioremap_resource_byname(pdev, "ahci"); |
| 481 | else |
| 482 | hpriv->mmio = devm_platform_ioremap_resource(pdev, 0); |
| 483 | if (IS_ERR(hpriv->mmio)) { |
| 484 | rc = PTR_ERR(hpriv->mmio); |
| 485 | goto err_out; |
| 486 | } |
| 487 | |
| 488 | /* |
| 489 | * Bulk clocks getting procedure can fail to find any clock due to |
| 490 | * running on a non-OF platform or due to the clocks being defined in |
| 491 | * bypass of the DT firmware (like da850, spear13xx). In that case we |
| 492 | * fallback to getting a single clock source right from the dev clocks |
| 493 | * list. |
| 494 | */ |
| 495 | rc = devm_clk_bulk_get_all(dev, &hpriv->clks); |
| 496 | if (rc < 0) |
| 497 | goto err_out; |
| 498 | |
| 499 | if (rc > 0) { |
| 500 | /* Got clocks in bulk */ |
| 501 | hpriv->n_clks = rc; |
| 502 | } else { |
| 503 | /* |
| 504 | * No clock bulk found: fallback to manually getting |
| 505 | * the optional clock. |
| 506 | */ |
| 507 | hpriv->clks = devm_kzalloc(dev, sizeof(*hpriv->clks), GFP_KERNEL); |
| 508 | if (!hpriv->clks) { |
| 509 | rc = -ENOMEM; |
| 510 | goto err_out; |
| 511 | } |
| 512 | hpriv->clks->clk = devm_clk_get_optional(dev, NULL); |
| 513 | if (IS_ERR(hpriv->clks->clk)) { |
| 514 | rc = PTR_ERR(hpriv->clks->clk); |
| 515 | goto err_out; |
| 516 | } else if (hpriv->clks->clk) { |
| 517 | hpriv->clks->id = "ahci"; |
| 518 | hpriv->n_clks = 1; |
| 519 | } |
| 520 | } |
| 521 | |
| 522 | hpriv->ahci_regulator = devm_regulator_get(dev, "ahci"); |
| 523 | if (IS_ERR(hpriv->ahci_regulator)) { |
| 524 | rc = PTR_ERR(hpriv->ahci_regulator); |
| 525 | if (rc != 0) |
| 526 | goto err_out; |
| 527 | } |
| 528 | |
| 529 | hpriv->phy_regulator = devm_regulator_get(dev, "phy"); |
| 530 | if (IS_ERR(hpriv->phy_regulator)) { |
| 531 | rc = PTR_ERR(hpriv->phy_regulator); |
| 532 | goto err_out; |
| 533 | } |
| 534 | |
| 535 | if (flags & AHCI_PLATFORM_GET_RESETS) { |
| 536 | hpriv->rsts = devm_reset_control_array_get_optional_shared(dev); |
| 537 | if (IS_ERR(hpriv->rsts)) { |
| 538 | rc = PTR_ERR(hpriv->rsts); |
| 539 | goto err_out; |
| 540 | } |
| 541 | |
| 542 | hpriv->f_rsts = flags & AHCI_PLATFORM_RST_TRIGGER; |
| 543 | } |
| 544 | |
| 545 | /* |
| 546 | * Too many sub-nodes most likely means having something wrong with |
| 547 | * the firmware. |
| 548 | */ |
| 549 | child_nodes = of_get_child_count(dev->of_node); |
| 550 | if (child_nodes > AHCI_MAX_PORTS) { |
| 551 | rc = -EINVAL; |
| 552 | goto err_out; |
| 553 | } |
| 554 | |
| 555 | /* |
| 556 | * If no sub-node was found, we still need to set nports to |
| 557 | * one in order to be able to use the |
| 558 | * ahci_platform_[en|dis]able_[phys|regulators] functions. |
| 559 | */ |
| 560 | if (child_nodes) |
| 561 | hpriv->nports = child_nodes; |
| 562 | else |
| 563 | hpriv->nports = 1; |
| 564 | |
| 565 | hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL); |
| 566 | if (!hpriv->phys) { |
| 567 | rc = -ENOMEM; |
| 568 | goto err_out; |
| 569 | } |
| 570 | /* |
| 571 | * We cannot use devm_ here, since ahci_platform_put_resources() uses |
| 572 | * target_pwrs after devm_ have freed memory |
| 573 | */ |
| 574 | hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL); |
| 575 | if (!hpriv->target_pwrs) { |
| 576 | rc = -ENOMEM; |
| 577 | goto err_out; |
| 578 | } |
| 579 | |
| 580 | if (child_nodes) { |
| 581 | for_each_child_of_node(dev->of_node, child) { |
| 582 | u32 port; |
| 583 | struct platform_device *port_dev __maybe_unused; |
| 584 | |
| 585 | if (!of_device_is_available(child)) |
| 586 | continue; |
| 587 | |
| 588 | if (of_property_read_u32(child, "reg", &port)) { |
| 589 | rc = -EINVAL; |
| 590 | of_node_put(child); |
| 591 | goto err_out; |
| 592 | } |
| 593 | |
| 594 | if (port >= hpriv->nports) { |
| 595 | dev_warn(dev, "invalid port number %d\n", port); |
| 596 | continue; |
| 597 | } |
| 598 | mask_port_map |= BIT(port); |
| 599 | |
| 600 | #ifdef CONFIG_OF_ADDRESS |
| 601 | of_platform_device_create(child, NULL, NULL); |
| 602 | |
| 603 | port_dev = of_find_device_by_node(child); |
| 604 | |
| 605 | if (port_dev) { |
| 606 | rc = ahci_platform_get_regulator(hpriv, port, |
| 607 | &port_dev->dev); |
| 608 | if (rc == -EPROBE_DEFER) { |
| 609 | of_node_put(child); |
| 610 | goto err_out; |
| 611 | } |
| 612 | } |
| 613 | #endif |
| 614 | |
| 615 | rc = ahci_platform_get_phy(hpriv, port, dev, child); |
| 616 | if (rc) { |
| 617 | of_node_put(child); |
| 618 | goto err_out; |
| 619 | } |
| 620 | |
| 621 | enabled_ports++; |
| 622 | } |
| 623 | if (!enabled_ports) { |
| 624 | dev_warn(dev, "No port enabled\n"); |
| 625 | rc = -ENODEV; |
| 626 | goto err_out; |
| 627 | } |
| 628 | |
| 629 | if (!hpriv->mask_port_map) |
| 630 | hpriv->mask_port_map = mask_port_map; |
| 631 | } else { |
| 632 | /* |
| 633 | * If no sub-node was found, keep this for device tree |
| 634 | * compatibility |
| 635 | */ |
| 636 | rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node); |
| 637 | if (rc) |
| 638 | goto err_out; |
| 639 | |
| 640 | rc = ahci_platform_get_regulator(hpriv, 0, dev); |
| 641 | if (rc == -EPROBE_DEFER) |
| 642 | goto err_out; |
| 643 | } |
| 644 | |
| 645 | /* |
| 646 | * Retrieve firmware-specific flags which then will be used to set |
| 647 | * the HW-init fields of HBA and its ports |
| 648 | */ |
| 649 | rc = ahci_platform_get_firmware(hpriv, dev); |
| 650 | if (rc) |
| 651 | goto err_out; |
| 652 | |
| 653 | pm_runtime_enable(dev); |
| 654 | pm_runtime_get_sync(dev); |
| 655 | hpriv->got_runtime_pm = true; |
| 656 | |
| 657 | devres_remove_group(dev, NULL); |
| 658 | return hpriv; |
| 659 | |
| 660 | err_out: |
| 661 | devres_release_group(dev, NULL); |
| 662 | return ERR_PTR(rc); |
| 663 | } |
| 664 | EXPORT_SYMBOL_GPL(ahci_platform_get_resources); |
| 665 | |
| 666 | /** |
| 667 | * ahci_platform_init_host - Bring up an ahci-platform host |
| 668 | * @pdev: platform device pointer for the host |
| 669 | * @hpriv: ahci-host private data for the host |
| 670 | * @pi_template: template for the ata_port_info to use |
| 671 | * @sht: scsi_host_template to use when registering |
| 672 | * |
| 673 | * This function does all the usual steps needed to bring up an |
| 674 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
| 675 | * must be initialized / enabled before calling this. |
| 676 | * |
| 677 | * RETURNS: |
| 678 | * 0 on success otherwise a negative error code |
| 679 | */ |
| 680 | int ahci_platform_init_host(struct platform_device *pdev, |
| 681 | struct ahci_host_priv *hpriv, |
| 682 | const struct ata_port_info *pi_template, |
| 683 | struct scsi_host_template *sht) |
| 684 | { |
| 685 | struct device *dev = &pdev->dev; |
| 686 | struct ata_port_info pi = *pi_template; |
| 687 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
| 688 | struct ata_host *host; |
| 689 | int i, irq, n_ports, rc; |
| 690 | |
| 691 | irq = platform_get_irq(pdev, 0); |
| 692 | if (irq < 0) |
| 693 | return irq; |
| 694 | if (!irq) |
| 695 | return -EINVAL; |
| 696 | |
| 697 | hpriv->irq = irq; |
| 698 | |
| 699 | /* prepare host */ |
| 700 | pi.private_data = (void *)(unsigned long)hpriv->flags; |
| 701 | |
| 702 | ahci_save_initial_config(dev, hpriv); |
| 703 | |
| 704 | if (hpriv->cap & HOST_CAP_NCQ) |
| 705 | pi.flags |= ATA_FLAG_NCQ; |
| 706 | |
| 707 | if (hpriv->cap & HOST_CAP_PMP) |
| 708 | pi.flags |= ATA_FLAG_PMP; |
| 709 | |
| 710 | ahci_set_em_messages(hpriv, &pi); |
| 711 | |
| 712 | /* CAP.NP sometimes indicate the index of the last enabled |
| 713 | * port, at other times, that of the last possible port, so |
| 714 | * determining the maximum port number requires looking at |
| 715 | * both CAP.NP and port_map. |
| 716 | */ |
| 717 | n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); |
| 718 | |
| 719 | host = ata_host_alloc_pinfo(dev, ppi, n_ports); |
| 720 | if (!host) |
| 721 | return -ENOMEM; |
| 722 | |
| 723 | host->private_data = hpriv; |
| 724 | |
| 725 | if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) |
| 726 | host->flags |= ATA_HOST_PARALLEL_SCAN; |
| 727 | else |
| 728 | dev_info(dev, "SSS flag set, parallel bus scan disabled\n"); |
| 729 | |
| 730 | if (pi.flags & ATA_FLAG_EM) |
| 731 | ahci_reset_em(host); |
| 732 | |
| 733 | for (i = 0; i < host->n_ports; i++) { |
| 734 | struct ata_port *ap = host->ports[i]; |
| 735 | |
| 736 | ata_port_desc(ap, "mmio %pR", |
| 737 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); |
| 738 | ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80); |
| 739 | |
| 740 | /* set enclosure management message type */ |
| 741 | if (ap->flags & ATA_FLAG_EM) |
| 742 | ap->em_message_type = hpriv->em_msg_type; |
| 743 | |
| 744 | /* disabled/not-implemented port */ |
| 745 | if (!(hpriv->port_map & (1 << i))) |
| 746 | ap->ops = &ata_dummy_port_ops; |
| 747 | } |
| 748 | |
| 749 | if (hpriv->cap & HOST_CAP_64) { |
| 750 | rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); |
| 751 | if (rc) { |
| 752 | dev_err(dev, "Failed to enable 64-bit DMA.\n"); |
| 753 | return rc; |
| 754 | } |
| 755 | } |
| 756 | |
| 757 | rc = ahci_reset_controller(host); |
| 758 | if (rc) |
| 759 | return rc; |
| 760 | |
| 761 | ahci_init_controller(host); |
| 762 | ahci_print_info(host, "platform"); |
| 763 | |
| 764 | return ahci_host_activate(host, sht); |
| 765 | } |
| 766 | EXPORT_SYMBOL_GPL(ahci_platform_init_host); |
| 767 | |
| 768 | static void ahci_host_stop(struct ata_host *host) |
| 769 | { |
| 770 | struct ahci_host_priv *hpriv = host->private_data; |
| 771 | |
| 772 | ahci_platform_disable_resources(hpriv); |
| 773 | } |
| 774 | |
| 775 | /** |
| 776 | * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports |
| 777 | * @pdev: platform device pointer for the host |
| 778 | * |
| 779 | * This function is called during system shutdown and performs the minimal |
| 780 | * deconfiguration required to ensure that an ahci_platform host cannot |
| 781 | * corrupt or otherwise interfere with a new kernel being started with kexec. |
| 782 | */ |
| 783 | void ahci_platform_shutdown(struct platform_device *pdev) |
| 784 | { |
| 785 | struct ata_host *host = platform_get_drvdata(pdev); |
| 786 | struct ahci_host_priv *hpriv = host->private_data; |
| 787 | void __iomem *mmio = hpriv->mmio; |
| 788 | int i; |
| 789 | |
| 790 | for (i = 0; i < host->n_ports; i++) { |
| 791 | struct ata_port *ap = host->ports[i]; |
| 792 | |
| 793 | /* Disable port interrupts */ |
| 794 | if (ap->ops->freeze) |
| 795 | ap->ops->freeze(ap); |
| 796 | |
| 797 | /* Stop the port DMA engines */ |
| 798 | if (ap->ops->port_stop) |
| 799 | ap->ops->port_stop(ap); |
| 800 | } |
| 801 | |
| 802 | /* Disable and clear host interrupts */ |
| 803 | writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL); |
| 804 | readl(mmio + HOST_CTL); /* flush */ |
| 805 | writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT); |
| 806 | } |
| 807 | EXPORT_SYMBOL_GPL(ahci_platform_shutdown); |
| 808 | |
| 809 | #ifdef CONFIG_PM_SLEEP |
| 810 | /** |
| 811 | * ahci_platform_suspend_host - Suspend an ahci-platform host |
| 812 | * @dev: device pointer for the host |
| 813 | * |
| 814 | * This function does all the usual steps needed to suspend an |
| 815 | * ahci-platform host, note any necessary resources (ie clks, phys, etc.) |
| 816 | * must be disabled after calling this. |
| 817 | * |
| 818 | * RETURNS: |
| 819 | * 0 on success otherwise a negative error code |
| 820 | */ |
| 821 | int ahci_platform_suspend_host(struct device *dev) |
| 822 | { |
| 823 | struct ata_host *host = dev_get_drvdata(dev); |
| 824 | struct ahci_host_priv *hpriv = host->private_data; |
| 825 | void __iomem *mmio = hpriv->mmio; |
| 826 | u32 ctl; |
| 827 | |
| 828 | if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { |
| 829 | dev_err(dev, "firmware update required for suspend/resume\n"); |
| 830 | return -EIO; |
| 831 | } |
| 832 | |
| 833 | /* |
| 834 | * AHCI spec rev1.1 section 8.3.3: |
| 835 | * Software must disable interrupts prior to requesting a |
| 836 | * transition of the HBA to D3 state. |
| 837 | */ |
| 838 | ctl = readl(mmio + HOST_CTL); |
| 839 | ctl &= ~HOST_IRQ_EN; |
| 840 | writel(ctl, mmio + HOST_CTL); |
| 841 | readl(mmio + HOST_CTL); /* flush */ |
| 842 | |
| 843 | if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) |
| 844 | ahci_platform_disable_phys(hpriv); |
| 845 | |
| 846 | ata_host_suspend(host, PMSG_SUSPEND); |
| 847 | return 0; |
| 848 | } |
| 849 | EXPORT_SYMBOL_GPL(ahci_platform_suspend_host); |
| 850 | |
| 851 | /** |
| 852 | * ahci_platform_resume_host - Resume an ahci-platform host |
| 853 | * @dev: device pointer for the host |
| 854 | * |
| 855 | * This function does all the usual steps needed to resume an ahci-platform |
| 856 | * host, note any necessary resources (ie clks, phys, etc.) must be |
| 857 | * initialized / enabled before calling this. |
| 858 | * |
| 859 | * RETURNS: |
| 860 | * 0 on success otherwise a negative error code |
| 861 | */ |
| 862 | int ahci_platform_resume_host(struct device *dev) |
| 863 | { |
| 864 | struct ata_host *host = dev_get_drvdata(dev); |
| 865 | struct ahci_host_priv *hpriv = host->private_data; |
| 866 | int rc; |
| 867 | |
| 868 | if (dev->power.power_state.event == PM_EVENT_SUSPEND) { |
| 869 | rc = ahci_reset_controller(host); |
| 870 | if (rc) |
| 871 | return rc; |
| 872 | |
| 873 | ahci_init_controller(host); |
| 874 | } |
| 875 | |
| 876 | if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS) |
| 877 | ahci_platform_enable_phys(hpriv); |
| 878 | |
| 879 | ata_host_resume(host); |
| 880 | |
| 881 | return 0; |
| 882 | } |
| 883 | EXPORT_SYMBOL_GPL(ahci_platform_resume_host); |
| 884 | |
| 885 | /** |
| 886 | * ahci_platform_suspend - Suspend an ahci-platform device |
| 887 | * @dev: the platform device to suspend |
| 888 | * |
| 889 | * This function suspends the host associated with the device, followed by |
| 890 | * disabling all the resources of the device. |
| 891 | * |
| 892 | * RETURNS: |
| 893 | * 0 on success otherwise a negative error code |
| 894 | */ |
| 895 | int ahci_platform_suspend(struct device *dev) |
| 896 | { |
| 897 | struct ata_host *host = dev_get_drvdata(dev); |
| 898 | struct ahci_host_priv *hpriv = host->private_data; |
| 899 | int rc; |
| 900 | |
| 901 | rc = ahci_platform_suspend_host(dev); |
| 902 | if (rc) |
| 903 | return rc; |
| 904 | |
| 905 | ahci_platform_disable_resources(hpriv); |
| 906 | |
| 907 | return 0; |
| 908 | } |
| 909 | EXPORT_SYMBOL_GPL(ahci_platform_suspend); |
| 910 | |
| 911 | /** |
| 912 | * ahci_platform_resume - Resume an ahci-platform device |
| 913 | * @dev: the platform device to resume |
| 914 | * |
| 915 | * This function enables all the resources of the device followed by |
| 916 | * resuming the host associated with the device. |
| 917 | * |
| 918 | * RETURNS: |
| 919 | * 0 on success otherwise a negative error code |
| 920 | */ |
| 921 | int ahci_platform_resume(struct device *dev) |
| 922 | { |
| 923 | struct ata_host *host = dev_get_drvdata(dev); |
| 924 | struct ahci_host_priv *hpriv = host->private_data; |
| 925 | int rc; |
| 926 | |
| 927 | rc = ahci_platform_enable_resources(hpriv); |
| 928 | if (rc) |
| 929 | return rc; |
| 930 | |
| 931 | rc = ahci_platform_resume_host(dev); |
| 932 | if (rc) |
| 933 | goto disable_resources; |
| 934 | |
| 935 | /* We resumed so update PM runtime state */ |
| 936 | pm_runtime_disable(dev); |
| 937 | pm_runtime_set_active(dev); |
| 938 | pm_runtime_enable(dev); |
| 939 | |
| 940 | return 0; |
| 941 | |
| 942 | disable_resources: |
| 943 | ahci_platform_disable_resources(hpriv); |
| 944 | |
| 945 | return rc; |
| 946 | } |
| 947 | EXPORT_SYMBOL_GPL(ahci_platform_resume); |
| 948 | #endif |
| 949 | |
| 950 | MODULE_DESCRIPTION("AHCI SATA platform library"); |
| 951 | MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); |
| 952 | MODULE_LICENSE("GPL"); |