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Merge tag 'mm-hotfixes-stable-2025-07-11-16-16' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-block.git] / drivers / acpi / processor_idle.c
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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
12 */
13#define pr_fmt(fmt) "ACPI: " fmt
14
15#include <linux/module.h>
16#include <linux/acpi.h>
17#include <linux/dmi.h>
18#include <linux/sched.h> /* need_resched() */
19#include <linux/tick.h>
20#include <linux/cpuidle.h>
21#include <linux/cpu.h>
22#include <linux/minmax.h>
23#include <linux/perf_event.h>
24#include <acpi/processor.h>
25#include <linux/context_tracking.h>
26
27#include "internal.h"
28
29/*
30 * Include the apic definitions for x86 to have the APIC timer related defines
31 * available also for UP (on SMP it gets magically included via linux/smp.h).
32 * asm/acpi.h is not an option, as it would require more include magic. Also
33 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
34 */
35#ifdef CONFIG_X86
36#include <asm/apic.h>
37#include <asm/cpu.h>
38#endif
39
40#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
41
42static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
43module_param(max_cstate, uint, 0400);
44static bool nocst __read_mostly;
45module_param(nocst, bool, 0400);
46static bool bm_check_disable __read_mostly;
47module_param(bm_check_disable, bool, 0400);
48
49static unsigned int latency_factor __read_mostly = 2;
50module_param(latency_factor, uint, 0644);
51
52static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
53
54struct cpuidle_driver acpi_idle_driver = {
55 .name = "acpi_idle",
56 .owner = THIS_MODULE,
57};
58
59#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
60void acpi_idle_rescan_dead_smt_siblings(void)
61{
62 if (cpuidle_get_driver() == &acpi_idle_driver)
63 arch_cpu_rescan_dead_smt_siblings();
64}
65
66static
67DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
68
69static int disabled_by_idle_boot_param(void)
70{
71 return boot_option_idle_override == IDLE_POLL ||
72 boot_option_idle_override == IDLE_HALT;
73}
74
75/*
76 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
77 * For now disable this. Probably a bug somewhere else.
78 *
79 * To skip this limit, boot/load with a large max_cstate limit.
80 */
81static int set_max_cstate(const struct dmi_system_id *id)
82{
83 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
84 return 0;
85
86 pr_notice("%s detected - limiting to C%ld max_cstate."
87 " Override with \"processor.max_cstate=%d\"\n", id->ident,
88 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
89
90 max_cstate = (long)id->driver_data;
91
92 return 0;
93}
94
95static const struct dmi_system_id processor_power_dmi_table[] = {
96 { set_max_cstate, "Clevo 5600D", {
97 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
98 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
99 (void *)2},
100 { set_max_cstate, "Pavilion zv5000", {
101 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
102 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
103 (void *)1},
104 { set_max_cstate, "Asus L8400B", {
105 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
106 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
107 (void *)1},
108 {},
109};
110
111
112/*
113 * Callers should disable interrupts before the call and enable
114 * interrupts after return.
115 */
116static void __cpuidle acpi_safe_halt(void)
117{
118 if (!tif_need_resched()) {
119 raw_safe_halt();
120 raw_local_irq_disable();
121 }
122}
123
124#ifdef ARCH_APICTIMER_STOPS_ON_C3
125
126/*
127 * Some BIOS implementations switch to C3 in the published C2 state.
128 * This seems to be a common problem on AMD boxen, but other vendors
129 * are affected too. We pick the most conservative approach: we assume
130 * that the local APIC stops in both C2 and C3.
131 */
132static void lapic_timer_check_state(int state, struct acpi_processor *pr,
133 struct acpi_processor_cx *cx)
134{
135 struct acpi_processor_power *pwr = &pr->power;
136 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
137
138 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
139 return;
140
141 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
142 type = ACPI_STATE_C1;
143
144 /*
145 * Check, if one of the previous states already marked the lapic
146 * unstable
147 */
148 if (pwr->timer_broadcast_on_state < state)
149 return;
150
151 if (cx->type >= type)
152 pr->power.timer_broadcast_on_state = state;
153}
154
155static void __lapic_timer_propagate_broadcast(void *arg)
156{
157 struct acpi_processor *pr = arg;
158
159 if (pr->power.timer_broadcast_on_state < INT_MAX)
160 tick_broadcast_enable();
161 else
162 tick_broadcast_disable();
163}
164
165static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
166{
167 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
168 (void *)pr, 1);
169}
170
171/* Power(C) State timer broadcast control */
172static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
173 struct acpi_processor_cx *cx)
174{
175 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
176}
177
178#else
179
180static void lapic_timer_check_state(int state, struct acpi_processor *pr,
181 struct acpi_processor_cx *cstate) { }
182static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
183
184static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
185 struct acpi_processor_cx *cx)
186{
187 return false;
188}
189
190#endif
191
192#if defined(CONFIG_X86)
193static void tsc_check_state(int state)
194{
195 switch (boot_cpu_data.x86_vendor) {
196 case X86_VENDOR_HYGON:
197 case X86_VENDOR_AMD:
198 case X86_VENDOR_INTEL:
199 case X86_VENDOR_CENTAUR:
200 case X86_VENDOR_ZHAOXIN:
201 /*
202 * AMD Fam10h TSC will tick in all
203 * C/P/S0/S1 states when this bit is set.
204 */
205 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
206 return;
207 fallthrough;
208 default:
209 /* TSC could halt in idle, so notify users */
210 if (state > ACPI_STATE_C1)
211 mark_tsc_unstable("TSC halts in idle");
212 }
213}
214#else
215static void tsc_check_state(int state) { return; }
216#endif
217
218static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
219{
220
221 if (!pr->pblk)
222 return -ENODEV;
223
224 /* if info is obtained from pblk/fadt, type equals state */
225 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
226 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
227
228#ifndef CONFIG_HOTPLUG_CPU
229 /*
230 * Check for P_LVL2_UP flag before entering C2 and above on
231 * an SMP system.
232 */
233 if ((num_online_cpus() > 1) &&
234 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
235 return -ENODEV;
236#endif
237
238 /* determine C2 and C3 address from pblk */
239 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
240 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
241
242 /* determine latencies from FADT */
243 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
244 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
245
246 /*
247 * FADT specified C2 latency must be less than or equal to
248 * 100 microseconds.
249 */
250 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
251 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
252 acpi_gbl_FADT.c2_latency);
253 /* invalidate C2 */
254 pr->power.states[ACPI_STATE_C2].address = 0;
255 }
256
257 /*
258 * FADT supplied C3 latency must be less than or equal to
259 * 1000 microseconds.
260 */
261 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
262 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
263 acpi_gbl_FADT.c3_latency);
264 /* invalidate C3 */
265 pr->power.states[ACPI_STATE_C3].address = 0;
266 }
267
268 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
269 pr->power.states[ACPI_STATE_C2].address,
270 pr->power.states[ACPI_STATE_C3].address);
271
272 snprintf(pr->power.states[ACPI_STATE_C2].desc,
273 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
274 pr->power.states[ACPI_STATE_C2].address);
275 snprintf(pr->power.states[ACPI_STATE_C3].desc,
276 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
277 pr->power.states[ACPI_STATE_C3].address);
278
279 if (!pr->power.states[ACPI_STATE_C2].address &&
280 !pr->power.states[ACPI_STATE_C3].address)
281 return -ENODEV;
282
283 return 0;
284}
285
286static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
287{
288 if (!pr->power.states[ACPI_STATE_C1].valid) {
289 /* set the first C-State to C1 */
290 /* all processors need to support C1 */
291 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
292 pr->power.states[ACPI_STATE_C1].valid = 1;
293 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
294
295 snprintf(pr->power.states[ACPI_STATE_C1].desc,
296 ACPI_CX_DESC_LEN, "ACPI HLT");
297 }
298 /* the C0 state only exists as a filler in our array */
299 pr->power.states[ACPI_STATE_C0].valid = 1;
300 return 0;
301}
302
303static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
304{
305 int ret;
306
307 if (nocst)
308 return -ENODEV;
309
310 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
311 if (ret)
312 return ret;
313
314 if (!pr->power.count)
315 return -EFAULT;
316
317 pr->flags.has_cst = 1;
318 return 0;
319}
320
321static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
322 struct acpi_processor_cx *cx)
323{
324 static int bm_check_flag = -1;
325 static int bm_control_flag = -1;
326
327
328 if (!cx->address)
329 return;
330
331 /*
332 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
333 * DMA transfers are used by any ISA device to avoid livelock.
334 * Note that we could disable Type-F DMA (as recommended by
335 * the erratum), but this is known to disrupt certain ISA
336 * devices thus we take the conservative approach.
337 */
338 if (errata.piix4.fdma) {
339 acpi_handle_debug(pr->handle,
340 "C3 not supported on PIIX4 with Type-F DMA\n");
341 return;
342 }
343
344 /* All the logic here assumes flags.bm_check is same across all CPUs */
345 if (bm_check_flag == -1) {
346 /* Determine whether bm_check is needed based on CPU */
347 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
348 bm_check_flag = pr->flags.bm_check;
349 bm_control_flag = pr->flags.bm_control;
350 } else {
351 pr->flags.bm_check = bm_check_flag;
352 pr->flags.bm_control = bm_control_flag;
353 }
354
355 if (pr->flags.bm_check) {
356 if (!pr->flags.bm_control) {
357 if (pr->flags.has_cst != 1) {
358 /* bus mastering control is necessary */
359 acpi_handle_debug(pr->handle,
360 "C3 support requires BM control\n");
361 return;
362 } else {
363 /* Here we enter C3 without bus mastering */
364 acpi_handle_debug(pr->handle,
365 "C3 support without BM control\n");
366 }
367 }
368 } else {
369 /*
370 * WBINVD should be set in fadt, for C3 state to be
371 * supported on when bm_check is not required.
372 */
373 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
374 acpi_handle_debug(pr->handle,
375 "Cache invalidation should work properly"
376 " for C3 to be enabled on SMP systems\n");
377 return;
378 }
379 }
380
381 /*
382 * Otherwise we've met all of our C3 requirements.
383 * Normalize the C3 latency to expidite policy. Enable
384 * checking of bus mastering status (bm_check) so we can
385 * use this in our C3 policy
386 */
387 cx->valid = 1;
388
389 /*
390 * On older chipsets, BM_RLD needs to be set
391 * in order for Bus Master activity to wake the
392 * system from C3. Newer chipsets handle DMA
393 * during C3 automatically and BM_RLD is a NOP.
394 * In either case, the proper way to
395 * handle BM_RLD is to set it and leave it set.
396 */
397 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
398}
399
400static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length)
401{
402 int i, j, k;
403
404 for (i = 1; i < length; i++) {
405 if (!states[i].valid)
406 continue;
407
408 for (j = i - 1, k = i; j >= 0; j--) {
409 if (!states[j].valid)
410 continue;
411
412 if (states[j].latency > states[k].latency)
413 swap(states[j].latency, states[k].latency);
414
415 k = j;
416 }
417 }
418}
419
420static int acpi_processor_power_verify(struct acpi_processor *pr)
421{
422 unsigned int i;
423 unsigned int working = 0;
424 unsigned int last_latency = 0;
425 unsigned int last_type = 0;
426 bool buggy_latency = false;
427
428 pr->power.timer_broadcast_on_state = INT_MAX;
429
430 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
431 struct acpi_processor_cx *cx = &pr->power.states[i];
432
433 switch (cx->type) {
434 case ACPI_STATE_C1:
435 cx->valid = 1;
436 break;
437
438 case ACPI_STATE_C2:
439 if (!cx->address)
440 break;
441 cx->valid = 1;
442 break;
443
444 case ACPI_STATE_C3:
445 acpi_processor_power_verify_c3(pr, cx);
446 break;
447 }
448 if (!cx->valid)
449 continue;
450 if (cx->type >= last_type && cx->latency < last_latency)
451 buggy_latency = true;
452 last_latency = cx->latency;
453 last_type = cx->type;
454
455 lapic_timer_check_state(i, pr, cx);
456 tsc_check_state(cx->type);
457 working++;
458 }
459
460 if (buggy_latency) {
461 pr_notice("FW issue: working around C-state latencies out of order\n");
462 acpi_cst_latency_sort(&pr->power.states[1], max_cstate);
463 }
464
465 lapic_timer_propagate_broadcast(pr);
466
467 return working;
468}
469
470static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
471{
472 int result;
473
474 /* NOTE: the idle thread may not be running while calling
475 * this function */
476
477 /* Zero initialize all the C-states info. */
478 memset(pr->power.states, 0, sizeof(pr->power.states));
479
480 result = acpi_processor_get_power_info_cst(pr);
481 if (result == -ENODEV)
482 result = acpi_processor_get_power_info_fadt(pr);
483
484 if (result)
485 return result;
486
487 acpi_processor_get_power_info_default(pr);
488
489 pr->power.count = acpi_processor_power_verify(pr);
490 pr->flags.power = 1;
491
492 return 0;
493}
494
495/**
496 * acpi_idle_bm_check - checks if bus master activity was detected
497 */
498static int acpi_idle_bm_check(void)
499{
500 u32 bm_status = 0;
501
502 if (bm_check_disable)
503 return 0;
504
505 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
506 if (bm_status)
507 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
508 /*
509 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
510 * the true state of bus mastering activity; forcing us to
511 * manually check the BMIDEA bit of each IDE channel.
512 */
513 else if (errata.piix4.bmisx) {
514 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
515 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
516 bm_status = 1;
517 }
518 return bm_status;
519}
520
521static __cpuidle void io_idle(unsigned long addr)
522{
523 /* IO port based C-state */
524 inb(addr);
525
526#ifdef CONFIG_X86
527 /* No delay is needed if we are in guest */
528 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
529 return;
530 /*
531 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
532 * not this code. Assume that any Intel systems using this
533 * are ancient and may need the dummy wait. This also assumes
534 * that the motivating chipset issue was Intel-only.
535 */
536 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
537 return;
538#endif
539 /*
540 * Dummy wait op - must do something useless after P_LVL2 read
541 * because chipsets cannot guarantee that STPCLK# signal gets
542 * asserted in time to freeze execution properly
543 *
544 * This workaround has been in place since the original ACPI
545 * implementation was merged, circa 2002.
546 *
547 * If a profile is pointing to this instruction, please first
548 * consider moving your system to a more modern idle
549 * mechanism.
550 */
551 inl(acpi_gbl_FADT.xpm_timer_block.address);
552}
553
554/**
555 * acpi_idle_do_entry - enter idle state using the appropriate method
556 * @cx: cstate data
557 *
558 * Caller disables interrupt before call and enables interrupt after return.
559 */
560static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
561{
562 perf_lopwr_cb(true);
563
564 if (cx->entry_method == ACPI_CSTATE_FFH) {
565 /* Call into architectural FFH based C-state */
566 acpi_processor_ffh_cstate_enter(cx);
567 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
568 acpi_safe_halt();
569 } else {
570 io_idle(cx->address);
571 }
572
573 perf_lopwr_cb(false);
574}
575
576/**
577 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
578 * @dev: the target CPU
579 * @index: the index of suggested state
580 */
581static void acpi_idle_play_dead(struct cpuidle_device *dev, int index)
582{
583 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
584
585 ACPI_FLUSH_CPU_CACHE();
586
587 while (1) {
588
589 if (cx->entry_method == ACPI_CSTATE_HALT)
590 raw_safe_halt();
591 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
592 io_idle(cx->address);
593 } else if (cx->entry_method == ACPI_CSTATE_FFH) {
594 acpi_processor_ffh_play_dead(cx);
595 } else
596 return;
597 }
598}
599
600static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
601{
602 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
603 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
604}
605
606static int c3_cpu_count;
607static DEFINE_RAW_SPINLOCK(c3_lock);
608
609/**
610 * acpi_idle_enter_bm - enters C3 with proper BM handling
611 * @drv: cpuidle driver
612 * @pr: Target processor
613 * @cx: Target state context
614 * @index: index of target state
615 */
616static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
617 struct acpi_processor *pr,
618 struct acpi_processor_cx *cx,
619 int index)
620{
621 static struct acpi_processor_cx safe_cx = {
622 .entry_method = ACPI_CSTATE_HALT,
623 };
624
625 /*
626 * disable bus master
627 * bm_check implies we need ARB_DIS
628 * bm_control implies whether we can do ARB_DIS
629 *
630 * That leaves a case where bm_check is set and bm_control is not set.
631 * In that case we cannot do much, we enter C3 without doing anything.
632 */
633 bool dis_bm = pr->flags.bm_control;
634
635 instrumentation_begin();
636
637 /* If we can skip BM, demote to a safe state. */
638 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
639 dis_bm = false;
640 index = drv->safe_state_index;
641 if (index >= 0) {
642 cx = this_cpu_read(acpi_cstate[index]);
643 } else {
644 cx = &safe_cx;
645 index = -EBUSY;
646 }
647 }
648
649 if (dis_bm) {
650 raw_spin_lock(&c3_lock);
651 c3_cpu_count++;
652 /* Disable bus master arbitration when all CPUs are in C3 */
653 if (c3_cpu_count == num_online_cpus())
654 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
655 raw_spin_unlock(&c3_lock);
656 }
657
658 ct_cpuidle_enter();
659
660 acpi_idle_do_entry(cx);
661
662 ct_cpuidle_exit();
663
664 /* Re-enable bus master arbitration */
665 if (dis_bm) {
666 raw_spin_lock(&c3_lock);
667 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
668 c3_cpu_count--;
669 raw_spin_unlock(&c3_lock);
670 }
671
672 instrumentation_end();
673
674 return index;
675}
676
677static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
678 struct cpuidle_driver *drv, int index)
679{
680 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
681 struct acpi_processor *pr;
682
683 pr = __this_cpu_read(processors);
684 if (unlikely(!pr))
685 return -EINVAL;
686
687 if (cx->type != ACPI_STATE_C1) {
688 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
689 return acpi_idle_enter_bm(drv, pr, cx, index);
690
691 /* C2 to C1 demotion. */
692 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
693 index = ACPI_IDLE_STATE_START;
694 cx = per_cpu(acpi_cstate[index], dev->cpu);
695 }
696 }
697
698 if (cx->type == ACPI_STATE_C3)
699 ACPI_FLUSH_CPU_CACHE();
700
701 acpi_idle_do_entry(cx);
702
703 return index;
704}
705
706static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
707 struct cpuidle_driver *drv, int index)
708{
709 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
710
711 if (cx->type == ACPI_STATE_C3) {
712 struct acpi_processor *pr = __this_cpu_read(processors);
713
714 if (unlikely(!pr))
715 return 0;
716
717 if (pr->flags.bm_check) {
718 u8 bm_sts_skip = cx->bm_sts_skip;
719
720 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
721 cx->bm_sts_skip = 1;
722 acpi_idle_enter_bm(drv, pr, cx, index);
723 cx->bm_sts_skip = bm_sts_skip;
724
725 return 0;
726 } else {
727 ACPI_FLUSH_CPU_CACHE();
728 }
729 }
730 acpi_idle_do_entry(cx);
731
732 return 0;
733}
734
735static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
736 struct cpuidle_device *dev)
737{
738 int i, count = ACPI_IDLE_STATE_START;
739 struct acpi_processor_cx *cx;
740 struct cpuidle_state *state;
741
742 if (max_cstate == 0)
743 max_cstate = 1;
744
745 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
746 state = &acpi_idle_driver.states[count];
747 cx = &pr->power.states[i];
748
749 if (!cx->valid)
750 continue;
751
752 per_cpu(acpi_cstate[count], dev->cpu) = cx;
753
754 if (lapic_timer_needs_broadcast(pr, cx))
755 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
756
757 if (cx->type == ACPI_STATE_C3) {
758 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
759 if (pr->flags.bm_check)
760 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
761 }
762
763 count++;
764 if (count == CPUIDLE_STATE_MAX)
765 break;
766 }
767
768 if (!count)
769 return -EINVAL;
770
771 return 0;
772}
773
774static int acpi_processor_setup_cstates(struct acpi_processor *pr)
775{
776 int i, count;
777 struct acpi_processor_cx *cx;
778 struct cpuidle_state *state;
779 struct cpuidle_driver *drv = &acpi_idle_driver;
780
781 if (max_cstate == 0)
782 max_cstate = 1;
783
784 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
785 cpuidle_poll_state_init(drv);
786 count = 1;
787 } else {
788 count = 0;
789 }
790
791 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
792 cx = &pr->power.states[i];
793
794 if (!cx->valid)
795 continue;
796
797 state = &drv->states[count];
798 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
799 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
800 state->exit_latency = cx->latency;
801 state->target_residency = cx->latency * latency_factor;
802 state->enter = acpi_idle_enter;
803
804 state->flags = 0;
805
806 state->enter_dead = acpi_idle_play_dead;
807
808 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2)
809 drv->safe_state_index = count;
810
811 /*
812 * Halt-induced C1 is not good for ->enter_s2idle, because it
813 * re-enables interrupts on exit. Moreover, C1 is generally not
814 * particularly interesting from the suspend-to-idle angle, so
815 * avoid C1 and the situations in which we may need to fall back
816 * to it altogether.
817 */
818 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
819 state->enter_s2idle = acpi_idle_enter_s2idle;
820
821 count++;
822 if (count == CPUIDLE_STATE_MAX)
823 break;
824 }
825
826 drv->state_count = count;
827
828 if (!count)
829 return -EINVAL;
830
831 return 0;
832}
833
834static inline void acpi_processor_cstate_first_run_checks(void)
835{
836 static int first_run;
837
838 if (first_run)
839 return;
840 dmi_check_system(processor_power_dmi_table);
841 max_cstate = acpi_processor_cstate_check(max_cstate);
842 if (max_cstate < ACPI_C_STATES_MAX)
843 pr_notice("processor limited to max C-state %d\n", max_cstate);
844
845 first_run++;
846
847 if (nocst)
848 return;
849
850 acpi_processor_claim_cst_control();
851}
852#else
853
854static inline int disabled_by_idle_boot_param(void) { return 0; }
855static inline void acpi_processor_cstate_first_run_checks(void) { }
856static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
857{
858 return -ENODEV;
859}
860
861static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
862 struct cpuidle_device *dev)
863{
864 return -EINVAL;
865}
866
867static int acpi_processor_setup_cstates(struct acpi_processor *pr)
868{
869 return -EINVAL;
870}
871
872#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
873
874struct acpi_lpi_states_array {
875 unsigned int size;
876 unsigned int composite_states_size;
877 struct acpi_lpi_state *entries;
878 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
879};
880
881static int obj_get_integer(union acpi_object *obj, u32 *value)
882{
883 if (obj->type != ACPI_TYPE_INTEGER)
884 return -EINVAL;
885
886 *value = obj->integer.value;
887 return 0;
888}
889
890static int acpi_processor_evaluate_lpi(acpi_handle handle,
891 struct acpi_lpi_states_array *info)
892{
893 acpi_status status;
894 int ret = 0;
895 int pkg_count, state_idx = 1, loop;
896 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
897 union acpi_object *lpi_data;
898 struct acpi_lpi_state *lpi_state;
899
900 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
901 if (ACPI_FAILURE(status)) {
902 acpi_handle_debug(handle, "No _LPI, giving up\n");
903 return -ENODEV;
904 }
905
906 lpi_data = buffer.pointer;
907
908 /* There must be at least 4 elements = 3 elements + 1 package */
909 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
910 lpi_data->package.count < 4) {
911 pr_debug("not enough elements in _LPI\n");
912 ret = -ENODATA;
913 goto end;
914 }
915
916 pkg_count = lpi_data->package.elements[2].integer.value;
917
918 /* Validate number of power states. */
919 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
920 pr_debug("count given by _LPI is not valid\n");
921 ret = -ENODATA;
922 goto end;
923 }
924
925 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
926 if (!lpi_state) {
927 ret = -ENOMEM;
928 goto end;
929 }
930
931 info->size = pkg_count;
932 info->entries = lpi_state;
933
934 /* LPI States start at index 3 */
935 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
936 union acpi_object *element, *pkg_elem, *obj;
937
938 element = &lpi_data->package.elements[loop];
939 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
940 continue;
941
942 pkg_elem = element->package.elements;
943
944 obj = pkg_elem + 6;
945 if (obj->type == ACPI_TYPE_BUFFER) {
946 struct acpi_power_register *reg;
947
948 reg = (struct acpi_power_register *)obj->buffer.pointer;
949 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
950 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
951 continue;
952
953 lpi_state->address = reg->address;
954 lpi_state->entry_method =
955 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
956 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
957 } else if (obj->type == ACPI_TYPE_INTEGER) {
958 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
959 lpi_state->address = obj->integer.value;
960 } else {
961 continue;
962 }
963
964 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
965
966 obj = pkg_elem + 9;
967 if (obj->type == ACPI_TYPE_STRING)
968 strscpy(lpi_state->desc, obj->string.pointer,
969 ACPI_CX_DESC_LEN);
970
971 lpi_state->index = state_idx;
972 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
973 pr_debug("No min. residency found, assuming 10 us\n");
974 lpi_state->min_residency = 10;
975 }
976
977 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
978 pr_debug("No wakeup residency found, assuming 10 us\n");
979 lpi_state->wake_latency = 10;
980 }
981
982 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
983 lpi_state->flags = 0;
984
985 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
986 lpi_state->arch_flags = 0;
987
988 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
989 lpi_state->res_cnt_freq = 1;
990
991 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
992 lpi_state->enable_parent_state = 0;
993 }
994
995 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
996end:
997 kfree(buffer.pointer);
998 return ret;
999}
1000
1001/*
1002 * flat_state_cnt - the number of composite LPI states after the process of flattening
1003 */
1004static int flat_state_cnt;
1005
1006/**
1007 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1008 *
1009 * @local: local LPI state
1010 * @parent: parent LPI state
1011 * @result: composite LPI state
1012 */
1013static bool combine_lpi_states(struct acpi_lpi_state *local,
1014 struct acpi_lpi_state *parent,
1015 struct acpi_lpi_state *result)
1016{
1017 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1018 if (!parent->address) /* 0 means autopromotable */
1019 return false;
1020 result->address = local->address + parent->address;
1021 } else {
1022 result->address = parent->address;
1023 }
1024
1025 result->min_residency = max(local->min_residency, parent->min_residency);
1026 result->wake_latency = local->wake_latency + parent->wake_latency;
1027 result->enable_parent_state = parent->enable_parent_state;
1028 result->entry_method = local->entry_method;
1029
1030 result->flags = parent->flags;
1031 result->arch_flags = parent->arch_flags;
1032 result->index = parent->index;
1033
1034 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1035 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1036 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1037 return true;
1038}
1039
1040#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1041
1042static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1043 struct acpi_lpi_state *t)
1044{
1045 curr_level->composite_states[curr_level->composite_states_size++] = t;
1046}
1047
1048static int flatten_lpi_states(struct acpi_processor *pr,
1049 struct acpi_lpi_states_array *curr_level,
1050 struct acpi_lpi_states_array *prev_level)
1051{
1052 int i, j, state_count = curr_level->size;
1053 struct acpi_lpi_state *p, *t = curr_level->entries;
1054
1055 curr_level->composite_states_size = 0;
1056 for (j = 0; j < state_count; j++, t++) {
1057 struct acpi_lpi_state *flpi;
1058
1059 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1060 continue;
1061
1062 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1063 pr_warn("Limiting number of LPI states to max (%d)\n",
1064 ACPI_PROCESSOR_MAX_POWER);
1065 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1066 break;
1067 }
1068
1069 flpi = &pr->power.lpi_states[flat_state_cnt];
1070
1071 if (!prev_level) { /* leaf/processor node */
1072 memcpy(flpi, t, sizeof(*t));
1073 stash_composite_state(curr_level, flpi);
1074 flat_state_cnt++;
1075 continue;
1076 }
1077
1078 for (i = 0; i < prev_level->composite_states_size; i++) {
1079 p = prev_level->composite_states[i];
1080 if (t->index <= p->enable_parent_state &&
1081 combine_lpi_states(p, t, flpi)) {
1082 stash_composite_state(curr_level, flpi);
1083 flat_state_cnt++;
1084 flpi++;
1085 }
1086 }
1087 }
1088
1089 kfree(curr_level->entries);
1090 return 0;
1091}
1092
1093int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1094{
1095 return -EOPNOTSUPP;
1096}
1097
1098static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1099{
1100 int ret, i;
1101 acpi_status status;
1102 acpi_handle handle = pr->handle, pr_ahandle;
1103 struct acpi_device *d = NULL;
1104 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1105
1106 /* make sure our architecture has support */
1107 ret = acpi_processor_ffh_lpi_probe(pr->id);
1108 if (ret == -EOPNOTSUPP)
1109 return ret;
1110
1111 if (!osc_pc_lpi_support_confirmed)
1112 return -EOPNOTSUPP;
1113
1114 if (!acpi_has_method(handle, "_LPI"))
1115 return -EINVAL;
1116
1117 flat_state_cnt = 0;
1118 prev = &info[0];
1119 curr = &info[1];
1120 handle = pr->handle;
1121 ret = acpi_processor_evaluate_lpi(handle, prev);
1122 if (ret)
1123 return ret;
1124 flatten_lpi_states(pr, prev, NULL);
1125
1126 status = acpi_get_parent(handle, &pr_ahandle);
1127 while (ACPI_SUCCESS(status)) {
1128 d = acpi_fetch_acpi_dev(pr_ahandle);
1129 if (!d)
1130 break;
1131
1132 handle = pr_ahandle;
1133
1134 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1135 break;
1136
1137 /* can be optional ? */
1138 if (!acpi_has_method(handle, "_LPI"))
1139 break;
1140
1141 ret = acpi_processor_evaluate_lpi(handle, curr);
1142 if (ret)
1143 break;
1144
1145 /* flatten all the LPI states in this level of hierarchy */
1146 flatten_lpi_states(pr, curr, prev);
1147
1148 tmp = prev, prev = curr, curr = tmp;
1149
1150 status = acpi_get_parent(handle, &pr_ahandle);
1151 }
1152
1153 pr->power.count = flat_state_cnt;
1154 /* reset the index after flattening */
1155 for (i = 0; i < pr->power.count; i++)
1156 pr->power.lpi_states[i].index = i;
1157
1158 /* Tell driver that _LPI is supported. */
1159 pr->flags.has_lpi = 1;
1160 pr->flags.power = 1;
1161
1162 return 0;
1163}
1164
1165int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1166{
1167 return -ENODEV;
1168}
1169
1170/**
1171 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1172 * @dev: the target CPU
1173 * @drv: cpuidle driver containing cpuidle state info
1174 * @index: index of target state
1175 *
1176 * Return: 0 for success or negative value for error
1177 */
1178static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1179 struct cpuidle_driver *drv, int index)
1180{
1181 struct acpi_processor *pr;
1182 struct acpi_lpi_state *lpi;
1183
1184 pr = __this_cpu_read(processors);
1185
1186 if (unlikely(!pr))
1187 return -EINVAL;
1188
1189 lpi = &pr->power.lpi_states[index];
1190 if (lpi->entry_method == ACPI_CSTATE_FFH)
1191 return acpi_processor_ffh_lpi_enter(lpi);
1192
1193 return -EINVAL;
1194}
1195
1196static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1197{
1198 int i;
1199 struct acpi_lpi_state *lpi;
1200 struct cpuidle_state *state;
1201 struct cpuidle_driver *drv = &acpi_idle_driver;
1202
1203 if (!pr->flags.has_lpi)
1204 return -EOPNOTSUPP;
1205
1206 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1207 lpi = &pr->power.lpi_states[i];
1208
1209 state = &drv->states[i];
1210 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1211 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1212 state->exit_latency = lpi->wake_latency;
1213 state->target_residency = lpi->min_residency;
1214 state->flags |= arch_get_idle_state_flags(lpi->arch_flags);
1215 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH)
1216 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
1217 state->enter = acpi_idle_lpi_enter;
1218 drv->safe_state_index = i;
1219 }
1220
1221 drv->state_count = i;
1222
1223 return 0;
1224}
1225
1226/**
1227 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1228 * global state data i.e. idle routines
1229 *
1230 * @pr: the ACPI processor
1231 */
1232static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1233{
1234 int i;
1235 struct cpuidle_driver *drv = &acpi_idle_driver;
1236
1237 if (!pr->flags.power_setup_done || !pr->flags.power)
1238 return -EINVAL;
1239
1240 drv->safe_state_index = -1;
1241 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1242 drv->states[i].name[0] = '\0';
1243 drv->states[i].desc[0] = '\0';
1244 }
1245
1246 if (pr->flags.has_lpi)
1247 return acpi_processor_setup_lpi_states(pr);
1248
1249 return acpi_processor_setup_cstates(pr);
1250}
1251
1252/**
1253 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1254 * device i.e. per-cpu data
1255 *
1256 * @pr: the ACPI processor
1257 * @dev : the cpuidle device
1258 */
1259static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1260 struct cpuidle_device *dev)
1261{
1262 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1263 return -EINVAL;
1264
1265 dev->cpu = pr->id;
1266 if (pr->flags.has_lpi)
1267 return acpi_processor_ffh_lpi_probe(pr->id);
1268
1269 return acpi_processor_setup_cpuidle_cx(pr, dev);
1270}
1271
1272static int acpi_processor_get_power_info(struct acpi_processor *pr)
1273{
1274 int ret;
1275
1276 ret = acpi_processor_get_lpi_info(pr);
1277 if (ret)
1278 ret = acpi_processor_get_cstate_info(pr);
1279
1280 return ret;
1281}
1282
1283int acpi_processor_hotplug(struct acpi_processor *pr)
1284{
1285 int ret = 0;
1286 struct cpuidle_device *dev;
1287
1288 if (disabled_by_idle_boot_param())
1289 return 0;
1290
1291 if (!pr->flags.power_setup_done)
1292 return -ENODEV;
1293
1294 dev = per_cpu(acpi_cpuidle_device, pr->id);
1295 cpuidle_pause_and_lock();
1296 cpuidle_disable_device(dev);
1297 ret = acpi_processor_get_power_info(pr);
1298 if (!ret && pr->flags.power) {
1299 acpi_processor_setup_cpuidle_dev(pr, dev);
1300 ret = cpuidle_enable_device(dev);
1301 }
1302 cpuidle_resume_and_unlock();
1303
1304 return ret;
1305}
1306
1307int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1308{
1309 int cpu;
1310 struct acpi_processor *_pr;
1311 struct cpuidle_device *dev;
1312
1313 if (disabled_by_idle_boot_param())
1314 return 0;
1315
1316 if (!pr->flags.power_setup_done)
1317 return -ENODEV;
1318
1319 /*
1320 * FIXME: Design the ACPI notification to make it once per
1321 * system instead of once per-cpu. This condition is a hack
1322 * to make the code that updates C-States be called once.
1323 */
1324
1325 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1326
1327 /* Protect against cpu-hotplug */
1328 cpus_read_lock();
1329 cpuidle_pause_and_lock();
1330
1331 /* Disable all cpuidle devices */
1332 for_each_online_cpu(cpu) {
1333 _pr = per_cpu(processors, cpu);
1334 if (!_pr || !_pr->flags.power_setup_done)
1335 continue;
1336 dev = per_cpu(acpi_cpuidle_device, cpu);
1337 cpuidle_disable_device(dev);
1338 }
1339
1340 /* Populate Updated C-state information */
1341 acpi_processor_get_power_info(pr);
1342 acpi_processor_setup_cpuidle_states(pr);
1343
1344 /* Enable all cpuidle devices */
1345 for_each_online_cpu(cpu) {
1346 _pr = per_cpu(processors, cpu);
1347 if (!_pr || !_pr->flags.power_setup_done)
1348 continue;
1349 acpi_processor_get_power_info(_pr);
1350 if (_pr->flags.power) {
1351 dev = per_cpu(acpi_cpuidle_device, cpu);
1352 acpi_processor_setup_cpuidle_dev(_pr, dev);
1353 cpuidle_enable_device(dev);
1354 }
1355 }
1356 cpuidle_resume_and_unlock();
1357 cpus_read_unlock();
1358 }
1359
1360 return 0;
1361}
1362
1363static int acpi_processor_registered;
1364
1365int acpi_processor_power_init(struct acpi_processor *pr)
1366{
1367 int retval;
1368 struct cpuidle_device *dev;
1369
1370 if (disabled_by_idle_boot_param())
1371 return 0;
1372
1373 acpi_processor_cstate_first_run_checks();
1374
1375 if (!acpi_processor_get_power_info(pr))
1376 pr->flags.power_setup_done = 1;
1377
1378 /*
1379 * Install the idle handler if processor power management is supported.
1380 * Note that we use previously set idle handler will be used on
1381 * platforms that only support C1.
1382 */
1383 if (pr->flags.power) {
1384 /* Register acpi_idle_driver if not already registered */
1385 if (!acpi_processor_registered) {
1386 acpi_processor_setup_cpuidle_states(pr);
1387 retval = cpuidle_register_driver(&acpi_idle_driver);
1388 if (retval)
1389 return retval;
1390 pr_debug("%s registered with cpuidle\n",
1391 acpi_idle_driver.name);
1392 }
1393
1394 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1395 if (!dev)
1396 return -ENOMEM;
1397 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1398
1399 acpi_processor_setup_cpuidle_dev(pr, dev);
1400
1401 /* Register per-cpu cpuidle_device. Cpuidle driver
1402 * must already be registered before registering device
1403 */
1404 retval = cpuidle_register_device(dev);
1405 if (retval) {
1406 if (acpi_processor_registered == 0)
1407 cpuidle_unregister_driver(&acpi_idle_driver);
1408 return retval;
1409 }
1410 acpi_processor_registered++;
1411 }
1412 return 0;
1413}
1414
1415int acpi_processor_power_exit(struct acpi_processor *pr)
1416{
1417 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1418
1419 if (disabled_by_idle_boot_param())
1420 return 0;
1421
1422 if (pr->flags.power) {
1423 cpuidle_unregister_device(dev);
1424 acpi_processor_registered--;
1425 if (acpi_processor_registered == 0)
1426 cpuidle_unregister_driver(&acpi_idle_driver);
1427
1428 kfree(dev);
1429 }
1430
1431 pr->flags.power_setup_done = 0;
1432 return 0;
1433}
Linux 6.x block layer and io_uring tree(s)