[linux-2.6-block.git] / arch / x86 / include / asm / rwsem.h

/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
 *
 * Written by David Howells (dhowells@redhat.com).
 *
 * Derived from asm-x86/semaphore.h
 *
 *
 * The MSW of the count is the negated number of active writers and waiting
 * lockers, and the LSW is the total number of active locks
 *
 * The lock count is initialized to 0 (no active and no waiting lockers).
 *
 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
 * uncontended lock. This can be determined because XADD returns the old value.
 * Readers increment by 1 and see a positive value when uncontended, negative
 * if there are writers (and maybe) readers waiting (in which case it goes to
 * sleep).
 *
 * The value of WAITING_BIAS supports up to 32766 waiting processes. This can
 * be extended to 65534 by manually checking the whole MSW rather than relying
 * on the S flag.
 *
 * The value of ACTIVE_BIAS supports up to 65535 active processes.
 *
 * This should be totally fair - if anything is waiting, a process that wants a
 * lock will go to the back of the queue. When the currently active lock is
 * released, if there's a writer at the front of the queue, then that and only
 * that will be woken up; if there's a bunch of consecutive readers at the
 * front, then they'll all be woken up, but no other readers will be.
 */

#ifndef _ASM_X86_RWSEM_H
#define _ASM_X86_RWSEM_H

#ifndef _LINUX_RWSEM_H
#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
#endif

#ifdef __KERNEL__
#include <asm/asm.h>

/*
 * The bias values and the counter type limits the number of
 * potential readers/writers to 32767 for 32 bits and 2147483647
 * for 64 bits.
 */

#ifdef CONFIG_X86_64
# define RWSEM_ACTIVE_MASK		0xffffffffL
#else
# define RWSEM_ACTIVE_MASK		0x0000ffffL
#endif

#define RWSEM_UNLOCKED_VALUE		0x00000000L
#define RWSEM_ACTIVE_BIAS		0x00000001L
#define RWSEM_WAITING_BIAS		(-RWSEM_ACTIVE_MASK-1)
#define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS
#define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)

/*
 * lock for reading
 */
static inline void __down_read(struct rw_semaphore *sem)
{
	asm volatile("# beginning down_read\n\t"
		     LOCK_PREFIX _ASM_INC "(%1)\n\t"
		     /* adds 0x00000001 */
		     "  jns        1f\n"
		     "  call call_rwsem_down_read_failed\n"
		     "1:\n\t"
		     "# ending down_read\n\t"
		     : "+m" (sem->count)
		     : "a" (sem)
		     : "memory", "cc");
}

/*
 * trylock for reading -- returns 1 if successful, 0 if contention
 */
static inline int __down_read_trylock(struct rw_semaphore *sem)
{
	long result, tmp;
	asm volatile("# beginning __down_read_trylock\n\t"
		     "  mov          %0,%1\n\t"
		     "1:\n\t"
		     "  mov          %1,%2\n\t"
		     "  add          %3,%2\n\t"
		     "  jle	     2f\n\t"
		     LOCK_PREFIX "  cmpxchg  %2,%0\n\t"
		     "  jnz	     1b\n\t"
		     "2:\n\t"
		     "# ending __down_read_trylock\n\t"
		     : "+m" (sem->count), "=&a" (result), "=&r" (tmp)
		     : "i" (RWSEM_ACTIVE_READ_BIAS)
		     : "memory", "cc");
	return result >= 0 ? 1 : 0;
}

/*
 * lock for writing
 */
#define ____down_write(sem, slow_path)			\
({							\
	long tmp;					\
	struct rw_semaphore* ret;			\
	asm volatile("# beginning down_write\n\t"	\
		     LOCK_PREFIX "  xadd      %1,(%3)\n\t"	\
		     /* adds 0xffff0001, returns the old value */ \
		     "  test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" \
		     /* was the active mask 0 before? */\
		     "  jz        1f\n"			\
		     "  call " slow_path "\n"		\
		     "1:\n"				\
		     "# ending down_write"		\
		     : "+m" (sem->count), "=d" (tmp), "=a" (ret)	\
		     : "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS) \
		     : "memory", "cc");			\
	ret;						\
})

static inline void __down_write(struct rw_semaphore *sem)
{
	____down_write(sem, "call_rwsem_down_write_failed");
}

static inline int __down_write_killable(struct rw_semaphore *sem)
{
	if (IS_ERR(____down_write(sem, "call_rwsem_down_write_failed_killable")))
		return -EINTR;

	return 0;
}

/*
 * trylock for writing -- returns 1 if successful, 0 if contention
 */
static inline int __down_write_trylock(struct rw_semaphore *sem)
{
	long result, tmp;
	asm volatile("# beginning __down_write_trylock\n\t"
		     "  mov          %0,%1\n\t"
		     "1:\n\t"
		     "  test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t"
		     /* was the active mask 0 before? */
		     "  jnz          2f\n\t"
		     "  mov          %1,%2\n\t"
		     "  add          %3,%2\n\t"
		     LOCK_PREFIX "  cmpxchg  %2,%0\n\t"
		     "  jnz	     1b\n\t"
		     "2:\n\t"
		     "  sete         %b1\n\t"
		     "  movzbl       %b1, %k1\n\t"
		     "# ending __down_write_trylock\n\t"
		     : "+m" (sem->count), "=&a" (result), "=&r" (tmp)
		     : "er" (RWSEM_ACTIVE_WRITE_BIAS)
		     : "memory", "cc");
	return result;
}

/*
 * unlock after reading
 */
static inline void __up_read(struct rw_semaphore *sem)
{
	long tmp;
	asm volatile("# beginning __up_read\n\t"
		     LOCK_PREFIX "  xadd      %1,(%2)\n\t"
		     /* subtracts 1, returns the old value */
		     "  jns        1f\n\t"
		     "  call call_rwsem_wake\n" /* expects old value in %edx */
		     "1:\n"
		     "# ending __up_read\n"
		     : "+m" (sem->count), "=d" (tmp)
		     : "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS)
		     : "memory", "cc");
}

/*
 * unlock after writing
 */
static inline void __up_write(struct rw_semaphore *sem)
{
	long tmp;
	asm volatile("# beginning __up_write\n\t"
		     LOCK_PREFIX "  xadd      %1,(%2)\n\t"
		     /* subtracts 0xffff0001, returns the old value */
		     "  jns        1f\n\t"
		     "  call call_rwsem_wake\n" /* expects old value in %edx */
		     "1:\n\t"
		     "# ending __up_write\n"
		     : "+m" (sem->count), "=d" (tmp)
		     : "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
		     : "memory", "cc");
}

/*
 * downgrade write lock to read lock
 */
static inline void __downgrade_write(struct rw_semaphore *sem)
{
	asm volatile("# beginning __downgrade_write\n\t"
		     LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
		     /*
		      * transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
		      *     0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
		      */
		     "  jns       1f\n\t"
		     "  call call_rwsem_downgrade_wake\n"
		     "1:\n\t"
		     "# ending __downgrade_write\n"
		     : "+m" (sem->count)
		     : "a" (sem), "er" (-RWSEM_WAITING_BIAS)
		     : "memory", "cc");
}

/*
 * implement atomic add functionality
 */
static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
{
	asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
		     : "+m" (sem->count)
		     : "er" (delta));
}

/*
 * implement exchange and add functionality
 */
static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
{
	return delta + xadd(&sem->count, delta);
}

#endif /* __KERNEL__ */
#endif /* _ASM_X86_RWSEM_H */
Commit	Line	Data
	1	/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
	2	*
	3	* Written by David Howells (dhowells@redhat.com).
	4	*
	5	* Derived from asm-x86/semaphore.h
	6	*
	7	*
	8	* The MSW of the count is the negated number of active writers and waiting
	9	* lockers, and the LSW is the total number of active locks
	10	*
	11	* The lock count is initialized to 0 (no active and no waiting lockers).
	12	*
	13	* When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
	14	* uncontended lock. This can be determined because XADD returns the old value.
	15	* Readers increment by 1 and see a positive value when uncontended, negative
	16	* if there are writers (and maybe) readers waiting (in which case it goes to
	17	* sleep).
	18	*
	19	* The value of WAITING_BIAS supports up to 32766 waiting processes. This can
	20	* be extended to 65534 by manually checking the whole MSW rather than relying
	21	* on the S flag.
	22	*
	23	* The value of ACTIVE_BIAS supports up to 65535 active processes.
	24	*
	25	* This should be totally fair - if anything is waiting, a process that wants a
	26	* lock will go to the back of the queue. When the currently active lock is
	27	* released, if there's a writer at the front of the queue, then that and only
	28	* that will be woken up; if there's a bunch of consecutive readers at the
	29	* front, then they'll all be woken up, but no other readers will be.
	30	*/
	31
	32	#ifndef _ASM_X86_RWSEM_H
	33	#define _ASM_X86_RWSEM_H
	34
	35	#ifndef _LINUX_RWSEM_H
	36	#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
	37	#endif
	38
	39	#ifdef __KERNEL__
	40	#include <asm/asm.h>
	41
	42	/*
	43	* The bias values and the counter type limits the number of
	44	* potential readers/writers to 32767 for 32 bits and 2147483647
	45	* for 64 bits.
	46	*/
	47
	48	#ifdef CONFIG_X86_64
	49	# define RWSEM_ACTIVE_MASK 0xffffffffL
	50	#else
	51	# define RWSEM_ACTIVE_MASK 0x0000ffffL
	52	#endif
	53
	54	#define RWSEM_UNLOCKED_VALUE 0x00000000L
	55	#define RWSEM_ACTIVE_BIAS 0x00000001L
	56	#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
	57	#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
	58	#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
	59
	60	/*
	61	* lock for reading
	62	*/
	63	static inline void __down_read(struct rw_semaphore *sem)
	64	{
	65	asm volatile("# beginning down_read\n\t"
	66	LOCK_PREFIX _ASM_INC "(%1)\n\t"
	67	/* adds 0x00000001 */
	68	" jns 1f\n"
	69	" call call_rwsem_down_read_failed\n"
	70	"1:\n\t"
	71	"# ending down_read\n\t"
	72	: "+m" (sem->count)
	73	: "a" (sem)
	74	: "memory", "cc");
	75	}
	76
	77	/*
	78	* trylock for reading -- returns 1 if successful, 0 if contention
	79	*/
	80	static inline int __down_read_trylock(struct rw_semaphore *sem)
	81	{
	82	long result, tmp;
	83	asm volatile("# beginning __down_read_trylock\n\t"
	84	" mov %0,%1\n\t"
	85	"1:\n\t"
	86	" mov %1,%2\n\t"
	87	" add %3,%2\n\t"
	88	" jle 2f\n\t"
	89	LOCK_PREFIX " cmpxchg %2,%0\n\t"
	90	" jnz 1b\n\t"
	91	"2:\n\t"
	92	"# ending __down_read_trylock\n\t"
	93	: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
	94	: "i" (RWSEM_ACTIVE_READ_BIAS)
	95	: "memory", "cc");
	96	return result >= 0 ? 1 : 0;
	97	}
	98
	99	/*
	100	* lock for writing
	101	*/
	102	#define ____down_write(sem, slow_path) \
	103	({ \
	104	long tmp; \
	105	struct rw_semaphore* ret; \
	106	asm volatile("# beginning down_write\n\t" \
	107	LOCK_PREFIX " xadd %1,(%3)\n\t" \
	108	/* adds 0xffff0001, returns the old value */ \
	109	" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t" \
	110	/* was the active mask 0 before? */\
	111	" jz 1f\n" \
	112	" call " slow_path "\n" \
	113	"1:\n" \
	114	"# ending down_write" \
	115	: "+m" (sem->count), "=d" (tmp), "=a" (ret) \
	116	: "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS) \
	117	: "memory", "cc"); \
	118	ret; \
	119	})
	120
	121	static inline void __down_write(struct rw_semaphore *sem)
	122	{
	123	____down_write(sem, "call_rwsem_down_write_failed");
	124	}
	125
	126	static inline int __down_write_killable(struct rw_semaphore *sem)
	127	{
	128	if (IS_ERR(____down_write(sem, "call_rwsem_down_write_failed_killable")))
	129	return -EINTR;
	130
	131	return 0;
	132	}
	133
	134	/*
	135	* trylock for writing -- returns 1 if successful, 0 if contention
	136	*/
	137	static inline int __down_write_trylock(struct rw_semaphore *sem)
	138	{
	139	long result, tmp;
	140	asm volatile("# beginning __down_write_trylock\n\t"
	141	" mov %0,%1\n\t"
	142	"1:\n\t"
	143	" test " __ASM_SEL(%w1,%k1) "," __ASM_SEL(%w1,%k1) "\n\t"
	144	/* was the active mask 0 before? */
	145	" jnz 2f\n\t"
	146	" mov %1,%2\n\t"
	147	" add %3,%2\n\t"
	148	LOCK_PREFIX " cmpxchg %2,%0\n\t"
	149	" jnz 1b\n\t"
	150	"2:\n\t"
	151	" sete %b1\n\t"
	152	" movzbl %b1, %k1\n\t"
	153	"# ending __down_write_trylock\n\t"
	154	: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
	155	: "er" (RWSEM_ACTIVE_WRITE_BIAS)
	156	: "memory", "cc");
	157	return result;
	158	}
	159
	160	/*
	161	* unlock after reading
	162	*/
	163	static inline void __up_read(struct rw_semaphore *sem)
	164	{
	165	long tmp;
	166	asm volatile("# beginning __up_read\n\t"
	167	LOCK_PREFIX " xadd %1,(%2)\n\t"
	168	/* subtracts 1, returns the old value */
	169	" jns 1f\n\t"
	170	" call call_rwsem_wake\n" /* expects old value in %edx */
	171	"1:\n"
	172	"# ending __up_read\n"
	173	: "+m" (sem->count), "=d" (tmp)
	174	: "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS)
	175	: "memory", "cc");
	176	}
	177
	178	/*
	179	* unlock after writing
	180	*/
	181	static inline void __up_write(struct rw_semaphore *sem)
	182	{
	183	long tmp;
	184	asm volatile("# beginning __up_write\n\t"
	185	LOCK_PREFIX " xadd %1,(%2)\n\t"
	186	/* subtracts 0xffff0001, returns the old value */
	187	" jns 1f\n\t"
	188	" call call_rwsem_wake\n" /* expects old value in %edx */
	189	"1:\n\t"
	190	"# ending __up_write\n"
	191	: "+m" (sem->count), "=d" (tmp)
	192	: "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
	193	: "memory", "cc");
	194	}
	195
	196	/*
	197	* downgrade write lock to read lock
	198	*/
	199	static inline void __downgrade_write(struct rw_semaphore *sem)
	200	{
	201	asm volatile("# beginning __downgrade_write\n\t"
	202	LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
	203	/*
	204	* transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
	205	* 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
	206	*/
	207	" jns 1f\n\t"
	208	" call call_rwsem_downgrade_wake\n"
	209	"1:\n\t"
	210	"# ending __downgrade_write\n"
	211	: "+m" (sem->count)
	212	: "a" (sem), "er" (-RWSEM_WAITING_BIAS)
	213	: "memory", "cc");
	214	}
	215
	216	/*
	217	* implement atomic add functionality
	218	*/
	219	static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
	220	{
	221	asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
	222	: "+m" (sem->count)
	223	: "er" (delta));
	224	}
	225
	226	/*
	227	* implement exchange and add functionality
	228	*/
	229	static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
	230	{
	231	return delta + xadd(&sem->count, delta);
	232	}
	233
	234	#endif /* __KERNEL__ */
	235	#endif /* _ASM_X86_RWSEM_H */