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KVM: nVMX: restore host state in nested_vmx_vmexit for VMFail
[linux-2.6-block.git] / arch / x86 / include / asm / kvm_host.h
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/mmu_notifier.h>
17#include <linux/tracepoint.h>
18#include <linux/cpumask.h>
19#include <linux/irq_work.h>
20#include <linux/irq.h>
21
22#include <linux/kvm.h>
23#include <linux/kvm_para.h>
24#include <linux/kvm_types.h>
25#include <linux/perf_event.h>
26#include <linux/pvclock_gtod.h>
27#include <linux/clocksource.h>
28#include <linux/irqbypass.h>
29#include <linux/hyperv.h>
30
31#include <asm/apic.h>
32#include <asm/pvclock-abi.h>
33#include <asm/desc.h>
34#include <asm/mtrr.h>
35#include <asm/msr-index.h>
36#include <asm/asm.h>
37#include <asm/kvm_page_track.h>
38#include <asm/hyperv-tlfs.h>
39
40#define KVM_MAX_VCPUS 288
41#define KVM_SOFT_MAX_VCPUS 240
42#define KVM_MAX_VCPU_ID 1023
43#define KVM_USER_MEM_SLOTS 509
44/* memory slots that are not exposed to userspace */
45#define KVM_PRIVATE_MEM_SLOTS 3
46#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
47
48#define KVM_HALT_POLL_NS_DEFAULT 200000
49
50#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
51
52/* x86-specific vcpu->requests bit members */
53#define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
54#define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
55#define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
56#define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
57#define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
58#define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
59#define KVM_REQ_EVENT KVM_ARCH_REQ(6)
60#define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
61#define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
62#define KVM_REQ_NMI KVM_ARCH_REQ(9)
63#define KVM_REQ_PMU KVM_ARCH_REQ(10)
64#define KVM_REQ_PMI KVM_ARCH_REQ(11)
65#define KVM_REQ_SMI KVM_ARCH_REQ(12)
66#define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
67#define KVM_REQ_MCLOCK_INPROGRESS \
68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69#define KVM_REQ_SCAN_IOAPIC \
70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
71#define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
72#define KVM_REQ_APIC_PAGE_RELOAD \
73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74#define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
75#define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
76#define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
77#define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
78#define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
79#define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
80#define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
81
82#define CR0_RESERVED_BITS \
83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
86
87#define CR4_RESERVED_BITS \
88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
94
95#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
96
97
98
99#define INVALID_PAGE (~(hpa_t)0)
100#define VALID_PAGE(x) ((x) != INVALID_PAGE)
101
102#define UNMAPPED_GVA (~(gpa_t)0)
103
104/* KVM Hugepage definitions for x86 */
105#define KVM_NR_PAGE_SIZES 3
106#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
107#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
108#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
109#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
110#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
111
112static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
113{
114 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
115 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
116 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
117}
118
119#define KVM_PERMILLE_MMU_PAGES 20
120#define KVM_MIN_ALLOC_MMU_PAGES 64
121#define KVM_MMU_HASH_SHIFT 12
122#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
123#define KVM_MIN_FREE_MMU_PAGES 5
124#define KVM_REFILL_PAGES 25
125#define KVM_MAX_CPUID_ENTRIES 80
126#define KVM_NR_FIXED_MTRR_REGION 88
127#define KVM_NR_VAR_MTRR 8
128
129#define ASYNC_PF_PER_VCPU 64
130
131enum kvm_reg {
132 VCPU_REGS_RAX = 0,
133 VCPU_REGS_RCX = 1,
134 VCPU_REGS_RDX = 2,
135 VCPU_REGS_RBX = 3,
136 VCPU_REGS_RSP = 4,
137 VCPU_REGS_RBP = 5,
138 VCPU_REGS_RSI = 6,
139 VCPU_REGS_RDI = 7,
140#ifdef CONFIG_X86_64
141 VCPU_REGS_R8 = 8,
142 VCPU_REGS_R9 = 9,
143 VCPU_REGS_R10 = 10,
144 VCPU_REGS_R11 = 11,
145 VCPU_REGS_R12 = 12,
146 VCPU_REGS_R13 = 13,
147 VCPU_REGS_R14 = 14,
148 VCPU_REGS_R15 = 15,
149#endif
150 VCPU_REGS_RIP,
151 NR_VCPU_REGS
152};
153
154enum kvm_reg_ex {
155 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
156 VCPU_EXREG_CR3,
157 VCPU_EXREG_RFLAGS,
158 VCPU_EXREG_SEGMENTS,
159};
160
161enum {
162 VCPU_SREG_ES,
163 VCPU_SREG_CS,
164 VCPU_SREG_SS,
165 VCPU_SREG_DS,
166 VCPU_SREG_FS,
167 VCPU_SREG_GS,
168 VCPU_SREG_TR,
169 VCPU_SREG_LDTR,
170};
171
172#include <asm/kvm_emulate.h>
173
174#define KVM_NR_MEM_OBJS 40
175
176#define KVM_NR_DB_REGS 4
177
178#define DR6_BD (1 << 13)
179#define DR6_BS (1 << 14)
180#define DR6_BT (1 << 15)
181#define DR6_RTM (1 << 16)
182#define DR6_FIXED_1 0xfffe0ff0
183#define DR6_INIT 0xffff0ff0
184#define DR6_VOLATILE 0x0001e00f
185
186#define DR7_BP_EN_MASK 0x000000ff
187#define DR7_GE (1 << 9)
188#define DR7_GD (1 << 13)
189#define DR7_FIXED_1 0x00000400
190#define DR7_VOLATILE 0xffff2bff
191
192#define PFERR_PRESENT_BIT 0
193#define PFERR_WRITE_BIT 1
194#define PFERR_USER_BIT 2
195#define PFERR_RSVD_BIT 3
196#define PFERR_FETCH_BIT 4
197#define PFERR_PK_BIT 5
198#define PFERR_GUEST_FINAL_BIT 32
199#define PFERR_GUEST_PAGE_BIT 33
200
201#define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
202#define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
203#define PFERR_USER_MASK (1U << PFERR_USER_BIT)
204#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
205#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
206#define PFERR_PK_MASK (1U << PFERR_PK_BIT)
207#define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
208#define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
209
210#define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
211 PFERR_WRITE_MASK | \
212 PFERR_PRESENT_MASK)
213
214/*
215 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or
216 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting
217 * with the SVE bit in EPT PTEs.
218 */
219#define SPTE_SPECIAL_MASK (1ULL << 62)
220
221/* apic attention bits */
222#define KVM_APIC_CHECK_VAPIC 0
223/*
224 * The following bit is set with PV-EOI, unset on EOI.
225 * We detect PV-EOI changes by guest by comparing
226 * this bit with PV-EOI in guest memory.
227 * See the implementation in apic_update_pv_eoi.
228 */
229#define KVM_APIC_PV_EOI_PENDING 1
230
231struct kvm_kernel_irq_routing_entry;
232
233/*
234 * We don't want allocation failures within the mmu code, so we preallocate
235 * enough memory for a single page fault in a cache.
236 */
237struct kvm_mmu_memory_cache {
238 int nobjs;
239 void *objects[KVM_NR_MEM_OBJS];
240};
241
242/*
243 * the pages used as guest page table on soft mmu are tracked by
244 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
245 * by indirect shadow page can not be more than 15 bits.
246 *
247 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access,
248 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
249 */
250union kvm_mmu_page_role {
251 unsigned word;
252 struct {
253 unsigned level:4;
254 unsigned cr4_pae:1;
255 unsigned quadrant:2;
256 unsigned direct:1;
257 unsigned access:3;
258 unsigned invalid:1;
259 unsigned nxe:1;
260 unsigned cr0_wp:1;
261 unsigned smep_andnot_wp:1;
262 unsigned smap_andnot_wp:1;
263 unsigned ad_disabled:1;
264 unsigned guest_mode:1;
265 unsigned :6;
266
267 /*
268 * This is left at the top of the word so that
269 * kvm_memslots_for_spte_role can extract it with a
270 * simple shift. While there is room, give it a whole
271 * byte so it is also faster to load it from memory.
272 */
273 unsigned smm:8;
274 };
275};
276
277struct kvm_rmap_head {
278 unsigned long val;
279};
280
281struct kvm_mmu_page {
282 struct list_head link;
283 struct hlist_node hash_link;
284
285 /*
286 * The following two entries are used to key the shadow page in the
287 * hash table.
288 */
289 gfn_t gfn;
290 union kvm_mmu_page_role role;
291
292 u64 *spt;
293 /* hold the gfn of each spte inside spt */
294 gfn_t *gfns;
295 bool unsync;
296 int root_count; /* Currently serving as active root */
297 unsigned int unsync_children;
298 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
299
300 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
301 unsigned long mmu_valid_gen;
302
303 DECLARE_BITMAP(unsync_child_bitmap, 512);
304
305#ifdef CONFIG_X86_32
306 /*
307 * Used out of the mmu-lock to avoid reading spte values while an
308 * update is in progress; see the comments in __get_spte_lockless().
309 */
310 int clear_spte_count;
311#endif
312
313 /* Number of writes since the last time traversal visited this page. */
314 atomic_t write_flooding_count;
315};
316
317struct kvm_pio_request {
318 unsigned long count;
319 int in;
320 int port;
321 int size;
322};
323
324#define PT64_ROOT_MAX_LEVEL 5
325
326struct rsvd_bits_validate {
327 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
328 u64 bad_mt_xwr;
329};
330
331struct kvm_mmu_root_info {
332 gpa_t cr3;
333 hpa_t hpa;
334};
335
336#define KVM_MMU_ROOT_INFO_INVALID \
337 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
338
339#define KVM_MMU_NUM_PREV_ROOTS 3
340
341/*
342 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
343 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
344 * current mmu mode.
345 */
346struct kvm_mmu {
347 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
348 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
349 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
350 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
351 bool prefault);
352 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
353 struct x86_exception *fault);
354 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
355 struct x86_exception *exception);
356 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
357 struct x86_exception *exception);
358 int (*sync_page)(struct kvm_vcpu *vcpu,
359 struct kvm_mmu_page *sp);
360 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
361 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
362 u64 *spte, const void *pte);
363 hpa_t root_hpa;
364 union kvm_mmu_page_role base_role;
365 u8 root_level;
366 u8 shadow_root_level;
367 u8 ept_ad;
368 bool direct_map;
369 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
370
371 /*
372 * Bitmap; bit set = permission fault
373 * Byte index: page fault error code [4:1]
374 * Bit index: pte permissions in ACC_* format
375 */
376 u8 permissions[16];
377
378 /*
379 * The pkru_mask indicates if protection key checks are needed. It
380 * consists of 16 domains indexed by page fault error code bits [4:1],
381 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
382 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
383 */
384 u32 pkru_mask;
385
386 u64 *pae_root;
387 u64 *lm_root;
388
389 /*
390 * check zero bits on shadow page table entries, these
391 * bits include not only hardware reserved bits but also
392 * the bits spte never used.
393 */
394 struct rsvd_bits_validate shadow_zero_check;
395
396 struct rsvd_bits_validate guest_rsvd_check;
397
398 /* Can have large pages at levels 2..last_nonleaf_level-1. */
399 u8 last_nonleaf_level;
400
401 bool nx;
402
403 u64 pdptrs[4]; /* pae */
404};
405
406enum pmc_type {
407 KVM_PMC_GP = 0,
408 KVM_PMC_FIXED,
409};
410
411struct kvm_pmc {
412 enum pmc_type type;
413 u8 idx;
414 u64 counter;
415 u64 eventsel;
416 struct perf_event *perf_event;
417 struct kvm_vcpu *vcpu;
418};
419
420struct kvm_pmu {
421 unsigned nr_arch_gp_counters;
422 unsigned nr_arch_fixed_counters;
423 unsigned available_event_types;
424 u64 fixed_ctr_ctrl;
425 u64 global_ctrl;
426 u64 global_status;
427 u64 global_ovf_ctrl;
428 u64 counter_bitmask[2];
429 u64 global_ctrl_mask;
430 u64 reserved_bits;
431 u8 version;
432 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
433 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
434 struct irq_work irq_work;
435 u64 reprogram_pmi;
436};
437
438struct kvm_pmu_ops;
439
440enum {
441 KVM_DEBUGREG_BP_ENABLED = 1,
442 KVM_DEBUGREG_WONT_EXIT = 2,
443 KVM_DEBUGREG_RELOAD = 4,
444};
445
446struct kvm_mtrr_range {
447 u64 base;
448 u64 mask;
449 struct list_head node;
450};
451
452struct kvm_mtrr {
453 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
454 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
455 u64 deftype;
456
457 struct list_head head;
458};
459
460/* Hyper-V SynIC timer */
461struct kvm_vcpu_hv_stimer {
462 struct hrtimer timer;
463 int index;
464 u64 config;
465 u64 count;
466 u64 exp_time;
467 struct hv_message msg;
468 bool msg_pending;
469};
470
471/* Hyper-V synthetic interrupt controller (SynIC)*/
472struct kvm_vcpu_hv_synic {
473 u64 version;
474 u64 control;
475 u64 msg_page;
476 u64 evt_page;
477 atomic64_t sint[HV_SYNIC_SINT_COUNT];
478 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
479 DECLARE_BITMAP(auto_eoi_bitmap, 256);
480 DECLARE_BITMAP(vec_bitmap, 256);
481 bool active;
482 bool dont_zero_synic_pages;
483};
484
485/* Hyper-V per vcpu emulation context */
486struct kvm_vcpu_hv {
487 u32 vp_index;
488 u64 hv_vapic;
489 s64 runtime_offset;
490 struct kvm_vcpu_hv_synic synic;
491 struct kvm_hyperv_exit exit;
492 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
493 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
494 cpumask_t tlb_lush;
495};
496
497struct kvm_vcpu_arch {
498 /*
499 * rip and regs accesses must go through
500 * kvm_{register,rip}_{read,write} functions.
501 */
502 unsigned long regs[NR_VCPU_REGS];
503 u32 regs_avail;
504 u32 regs_dirty;
505
506 unsigned long cr0;
507 unsigned long cr0_guest_owned_bits;
508 unsigned long cr2;
509 unsigned long cr3;
510 unsigned long cr4;
511 unsigned long cr4_guest_owned_bits;
512 unsigned long cr8;
513 u32 pkru;
514 u32 hflags;
515 u64 efer;
516 u64 apic_base;
517 struct kvm_lapic *apic; /* kernel irqchip context */
518 bool apicv_active;
519 bool load_eoi_exitmap_pending;
520 DECLARE_BITMAP(ioapic_handled_vectors, 256);
521 unsigned long apic_attention;
522 int32_t apic_arb_prio;
523 int mp_state;
524 u64 ia32_misc_enable_msr;
525 u64 smbase;
526 u64 smi_count;
527 bool tpr_access_reporting;
528 u64 ia32_xss;
529 u64 microcode_version;
530
531 /*
532 * Paging state of the vcpu
533 *
534 * If the vcpu runs in guest mode with two level paging this still saves
535 * the paging mode of the l1 guest. This context is always used to
536 * handle faults.
537 */
538 struct kvm_mmu mmu;
539
540 /*
541 * Paging state of an L2 guest (used for nested npt)
542 *
543 * This context will save all necessary information to walk page tables
544 * of the an L2 guest. This context is only initialized for page table
545 * walking and not for faulting since we never handle l2 page faults on
546 * the host.
547 */
548 struct kvm_mmu nested_mmu;
549
550 /*
551 * Pointer to the mmu context currently used for
552 * gva_to_gpa translations.
553 */
554 struct kvm_mmu *walk_mmu;
555
556 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
557 struct kvm_mmu_memory_cache mmu_page_cache;
558 struct kvm_mmu_memory_cache mmu_page_header_cache;
559
560 /*
561 * QEMU userspace and the guest each have their own FPU state.
562 * In vcpu_run, we switch between the user and guest FPU contexts.
563 * While running a VCPU, the VCPU thread will have the guest FPU
564 * context.
565 *
566 * Note that while the PKRU state lives inside the fpu registers,
567 * it is switched out separately at VMENTER and VMEXIT time. The
568 * "guest_fpu" state here contains the guest FPU context, with the
569 * host PRKU bits.
570 */
571 struct fpu user_fpu;
572 struct fpu guest_fpu;
573
574 u64 xcr0;
575 u64 guest_supported_xcr0;
576 u32 guest_xstate_size;
577
578 struct kvm_pio_request pio;
579 void *pio_data;
580
581 u8 event_exit_inst_len;
582
583 struct kvm_queued_exception {
584 bool pending;
585 bool injected;
586 bool has_error_code;
587 u8 nr;
588 u32 error_code;
589 u8 nested_apf;
590 } exception;
591
592 struct kvm_queued_interrupt {
593 bool injected;
594 bool soft;
595 u8 nr;
596 } interrupt;
597
598 int halt_request; /* real mode on Intel only */
599
600 int cpuid_nent;
601 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
602
603 int maxphyaddr;
604
605 /* emulate context */
606
607 struct x86_emulate_ctxt emulate_ctxt;
608 bool emulate_regs_need_sync_to_vcpu;
609 bool emulate_regs_need_sync_from_vcpu;
610 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
611
612 gpa_t time;
613 struct pvclock_vcpu_time_info hv_clock;
614 unsigned int hw_tsc_khz;
615 struct gfn_to_hva_cache pv_time;
616 bool pv_time_enabled;
617 /* set guest stopped flag in pvclock flags field */
618 bool pvclock_set_guest_stopped_request;
619
620 struct {
621 u64 msr_val;
622 u64 last_steal;
623 struct gfn_to_hva_cache stime;
624 struct kvm_steal_time steal;
625 } st;
626
627 u64 tsc_offset;
628 u64 last_guest_tsc;
629 u64 last_host_tsc;
630 u64 tsc_offset_adjustment;
631 u64 this_tsc_nsec;
632 u64 this_tsc_write;
633 u64 this_tsc_generation;
634 bool tsc_catchup;
635 bool tsc_always_catchup;
636 s8 virtual_tsc_shift;
637 u32 virtual_tsc_mult;
638 u32 virtual_tsc_khz;
639 s64 ia32_tsc_adjust_msr;
640 u64 tsc_scaling_ratio;
641
642 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
643 unsigned nmi_pending; /* NMI queued after currently running handler */
644 bool nmi_injected; /* Trying to inject an NMI this entry */
645 bool smi_pending; /* SMI queued after currently running handler */
646
647 struct kvm_mtrr mtrr_state;
648 u64 pat;
649
650 unsigned switch_db_regs;
651 unsigned long db[KVM_NR_DB_REGS];
652 unsigned long dr6;
653 unsigned long dr7;
654 unsigned long eff_db[KVM_NR_DB_REGS];
655 unsigned long guest_debug_dr7;
656 u64 msr_platform_info;
657 u64 msr_misc_features_enables;
658
659 u64 mcg_cap;
660 u64 mcg_status;
661 u64 mcg_ctl;
662 u64 mcg_ext_ctl;
663 u64 *mce_banks;
664
665 /* Cache MMIO info */
666 u64 mmio_gva;
667 unsigned access;
668 gfn_t mmio_gfn;
669 u64 mmio_gen;
670
671 struct kvm_pmu pmu;
672
673 /* used for guest single stepping over the given code position */
674 unsigned long singlestep_rip;
675
676 struct kvm_vcpu_hv hyperv;
677
678 cpumask_var_t wbinvd_dirty_mask;
679
680 unsigned long last_retry_eip;
681 unsigned long last_retry_addr;
682
683 struct {
684 bool halted;
685 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
686 struct gfn_to_hva_cache data;
687 u64 msr_val;
688 u32 id;
689 bool send_user_only;
690 u32 host_apf_reason;
691 unsigned long nested_apf_token;
692 bool delivery_as_pf_vmexit;
693 } apf;
694
695 /* OSVW MSRs (AMD only) */
696 struct {
697 u64 length;
698 u64 status;
699 } osvw;
700
701 struct {
702 u64 msr_val;
703 struct gfn_to_hva_cache data;
704 } pv_eoi;
705
706 /*
707 * Indicate whether the access faults on its page table in guest
708 * which is set when fix page fault and used to detect unhandeable
709 * instruction.
710 */
711 bool write_fault_to_shadow_pgtable;
712
713 /* set at EPT violation at this point */
714 unsigned long exit_qualification;
715
716 /* pv related host specific info */
717 struct {
718 bool pv_unhalted;
719 } pv;
720
721 int pending_ioapic_eoi;
722 int pending_external_vector;
723
724 /* GPA available */
725 bool gpa_available;
726 gpa_t gpa_val;
727
728 /* be preempted when it's in kernel-mode(cpl=0) */
729 bool preempted_in_kernel;
730
731 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
732 bool l1tf_flush_l1d;
733};
734
735struct kvm_lpage_info {
736 int disallow_lpage;
737};
738
739struct kvm_arch_memory_slot {
740 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
741 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
742 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
743};
744
745/*
746 * We use as the mode the number of bits allocated in the LDR for the
747 * logical processor ID. It happens that these are all powers of two.
748 * This makes it is very easy to detect cases where the APICs are
749 * configured for multiple modes; in that case, we cannot use the map and
750 * hence cannot use kvm_irq_delivery_to_apic_fast either.
751 */
752#define KVM_APIC_MODE_XAPIC_CLUSTER 4
753#define KVM_APIC_MODE_XAPIC_FLAT 8
754#define KVM_APIC_MODE_X2APIC 16
755
756struct kvm_apic_map {
757 struct rcu_head rcu;
758 u8 mode;
759 u32 max_apic_id;
760 union {
761 struct kvm_lapic *xapic_flat_map[8];
762 struct kvm_lapic *xapic_cluster_map[16][4];
763 };
764 struct kvm_lapic *phys_map[];
765};
766
767/* Hyper-V emulation context */
768struct kvm_hv {
769 struct mutex hv_lock;
770 u64 hv_guest_os_id;
771 u64 hv_hypercall;
772 u64 hv_tsc_page;
773
774 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
775 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
776 u64 hv_crash_ctl;
777
778 HV_REFERENCE_TSC_PAGE tsc_ref;
779
780 struct idr conn_to_evt;
781
782 u64 hv_reenlightenment_control;
783 u64 hv_tsc_emulation_control;
784 u64 hv_tsc_emulation_status;
785};
786
787enum kvm_irqchip_mode {
788 KVM_IRQCHIP_NONE,
789 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
790 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
791};
792
793struct kvm_arch {
794 unsigned int n_used_mmu_pages;
795 unsigned int n_requested_mmu_pages;
796 unsigned int n_max_mmu_pages;
797 unsigned int indirect_shadow_pages;
798 unsigned long mmu_valid_gen;
799 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
800 /*
801 * Hash table of struct kvm_mmu_page.
802 */
803 struct list_head active_mmu_pages;
804 struct list_head zapped_obsolete_pages;
805 struct kvm_page_track_notifier_node mmu_sp_tracker;
806 struct kvm_page_track_notifier_head track_notifier_head;
807
808 struct list_head assigned_dev_head;
809 struct iommu_domain *iommu_domain;
810 bool iommu_noncoherent;
811#define __KVM_HAVE_ARCH_NONCOHERENT_DMA
812 atomic_t noncoherent_dma_count;
813#define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
814 atomic_t assigned_device_count;
815 struct kvm_pic *vpic;
816 struct kvm_ioapic *vioapic;
817 struct kvm_pit *vpit;
818 atomic_t vapics_in_nmi_mode;
819 struct mutex apic_map_lock;
820 struct kvm_apic_map *apic_map;
821
822 bool apic_access_page_done;
823
824 gpa_t wall_clock;
825
826 bool mwait_in_guest;
827 bool hlt_in_guest;
828 bool pause_in_guest;
829
830 unsigned long irq_sources_bitmap;
831 s64 kvmclock_offset;
832 raw_spinlock_t tsc_write_lock;
833 u64 last_tsc_nsec;
834 u64 last_tsc_write;
835 u32 last_tsc_khz;
836 u64 cur_tsc_nsec;
837 u64 cur_tsc_write;
838 u64 cur_tsc_offset;
839 u64 cur_tsc_generation;
840 int nr_vcpus_matched_tsc;
841
842 spinlock_t pvclock_gtod_sync_lock;
843 bool use_master_clock;
844 u64 master_kernel_ns;
845 u64 master_cycle_now;
846 struct delayed_work kvmclock_update_work;
847 struct delayed_work kvmclock_sync_work;
848
849 struct kvm_xen_hvm_config xen_hvm_config;
850
851 /* reads protected by irq_srcu, writes by irq_lock */
852 struct hlist_head mask_notifier_list;
853
854 struct kvm_hv hyperv;
855
856 #ifdef CONFIG_KVM_MMU_AUDIT
857 int audit_point;
858 #endif
859
860 bool backwards_tsc_observed;
861 bool boot_vcpu_runs_old_kvmclock;
862 u32 bsp_vcpu_id;
863
864 u64 disabled_quirks;
865
866 enum kvm_irqchip_mode irqchip_mode;
867 u8 nr_reserved_ioapic_pins;
868
869 bool disabled_lapic_found;
870
871 bool x2apic_format;
872 bool x2apic_broadcast_quirk_disabled;
873
874 bool guest_can_read_msr_platform_info;
875};
876
877struct kvm_vm_stat {
878 ulong mmu_shadow_zapped;
879 ulong mmu_pte_write;
880 ulong mmu_pte_updated;
881 ulong mmu_pde_zapped;
882 ulong mmu_flooded;
883 ulong mmu_recycled;
884 ulong mmu_cache_miss;
885 ulong mmu_unsync;
886 ulong remote_tlb_flush;
887 ulong lpages;
888 ulong max_mmu_page_hash_collisions;
889};
890
891struct kvm_vcpu_stat {
892 u64 pf_fixed;
893 u64 pf_guest;
894 u64 tlb_flush;
895 u64 invlpg;
896
897 u64 exits;
898 u64 io_exits;
899 u64 mmio_exits;
900 u64 signal_exits;
901 u64 irq_window_exits;
902 u64 nmi_window_exits;
903 u64 l1d_flush;
904 u64 halt_exits;
905 u64 halt_successful_poll;
906 u64 halt_attempted_poll;
907 u64 halt_poll_invalid;
908 u64 halt_wakeup;
909 u64 request_irq_exits;
910 u64 irq_exits;
911 u64 host_state_reload;
912 u64 fpu_reload;
913 u64 insn_emulation;
914 u64 insn_emulation_fail;
915 u64 hypercalls;
916 u64 irq_injections;
917 u64 nmi_injections;
918 u64 req_event;
919};
920
921struct x86_instruction_info;
922
923struct msr_data {
924 bool host_initiated;
925 u32 index;
926 u64 data;
927};
928
929struct kvm_lapic_irq {
930 u32 vector;
931 u16 delivery_mode;
932 u16 dest_mode;
933 bool level;
934 u16 trig_mode;
935 u32 shorthand;
936 u32 dest_id;
937 bool msi_redir_hint;
938};
939
940struct kvm_x86_ops {
941 int (*cpu_has_kvm_support)(void); /* __init */
942 int (*disabled_by_bios)(void); /* __init */
943 int (*hardware_enable)(void);
944 void (*hardware_disable)(void);
945 void (*check_processor_compatibility)(void *rtn);
946 int (*hardware_setup)(void); /* __init */
947 void (*hardware_unsetup)(void); /* __exit */
948 bool (*cpu_has_accelerated_tpr)(void);
949 bool (*has_emulated_msr)(int index);
950 void (*cpuid_update)(struct kvm_vcpu *vcpu);
951
952 struct kvm *(*vm_alloc)(void);
953 void (*vm_free)(struct kvm *);
954 int (*vm_init)(struct kvm *kvm);
955 void (*vm_destroy)(struct kvm *kvm);
956
957 /* Create, but do not attach this VCPU */
958 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
959 void (*vcpu_free)(struct kvm_vcpu *vcpu);
960 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
961
962 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
963 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
964 void (*vcpu_put)(struct kvm_vcpu *vcpu);
965
966 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
967 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
968 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
969 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
970 void (*get_segment)(struct kvm_vcpu *vcpu,
971 struct kvm_segment *var, int seg);
972 int (*get_cpl)(struct kvm_vcpu *vcpu);
973 void (*set_segment)(struct kvm_vcpu *vcpu,
974 struct kvm_segment *var, int seg);
975 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
976 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
977 void (*decache_cr3)(struct kvm_vcpu *vcpu);
978 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
979 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
980 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
981 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
982 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
983 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
984 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
985 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
986 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
987 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
988 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
989 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
990 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
991 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
992 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
993 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
994
995 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
996 int (*tlb_remote_flush)(struct kvm *kvm);
997
998 /*
999 * Flush any TLB entries associated with the given GVA.
1000 * Does not need to flush GPA->HPA mappings.
1001 * Can potentially get non-canonical addresses through INVLPGs, which
1002 * the implementation may choose to ignore if appropriate.
1003 */
1004 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1005
1006 void (*run)(struct kvm_vcpu *vcpu);
1007 int (*handle_exit)(struct kvm_vcpu *vcpu);
1008 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1009 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1010 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1011 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1012 unsigned char *hypercall_addr);
1013 void (*set_irq)(struct kvm_vcpu *vcpu);
1014 void (*set_nmi)(struct kvm_vcpu *vcpu);
1015 void (*queue_exception)(struct kvm_vcpu *vcpu);
1016 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1017 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1018 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1019 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1020 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1021 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1022 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1023 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1024 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1025 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1026 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1027 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1028 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1029 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1030 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1031 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1032 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1033 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1034 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1035 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1036 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1037 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1038 int (*get_lpage_level)(void);
1039 bool (*rdtscp_supported)(void);
1040 bool (*invpcid_supported)(void);
1041
1042 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1043
1044 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1045
1046 bool (*has_wbinvd_exit)(void);
1047
1048 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1049 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1050
1051 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1052
1053 int (*check_intercept)(struct kvm_vcpu *vcpu,
1054 struct x86_instruction_info *info,
1055 enum x86_intercept_stage stage);
1056 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
1057 bool (*mpx_supported)(void);
1058 bool (*xsaves_supported)(void);
1059 bool (*umip_emulated)(void);
1060
1061 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
1062 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1063
1064 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1065
1066 /*
1067 * Arch-specific dirty logging hooks. These hooks are only supposed to
1068 * be valid if the specific arch has hardware-accelerated dirty logging
1069 * mechanism. Currently only for PML on VMX.
1070 *
1071 * - slot_enable_log_dirty:
1072 * called when enabling log dirty mode for the slot.
1073 * - slot_disable_log_dirty:
1074 * called when disabling log dirty mode for the slot.
1075 * also called when slot is created with log dirty disabled.
1076 * - flush_log_dirty:
1077 * called before reporting dirty_bitmap to userspace.
1078 * - enable_log_dirty_pt_masked:
1079 * called when reenabling log dirty for the GFNs in the mask after
1080 * corresponding bits are cleared in slot->dirty_bitmap.
1081 */
1082 void (*slot_enable_log_dirty)(struct kvm *kvm,
1083 struct kvm_memory_slot *slot);
1084 void (*slot_disable_log_dirty)(struct kvm *kvm,
1085 struct kvm_memory_slot *slot);
1086 void (*flush_log_dirty)(struct kvm *kvm);
1087 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1088 struct kvm_memory_slot *slot,
1089 gfn_t offset, unsigned long mask);
1090 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1091
1092 /* pmu operations of sub-arch */
1093 const struct kvm_pmu_ops *pmu_ops;
1094
1095 /*
1096 * Architecture specific hooks for vCPU blocking due to
1097 * HLT instruction.
1098 * Returns for .pre_block():
1099 * - 0 means continue to block the vCPU.
1100 * - 1 means we cannot block the vCPU since some event
1101 * happens during this period, such as, 'ON' bit in
1102 * posted-interrupts descriptor is set.
1103 */
1104 int (*pre_block)(struct kvm_vcpu *vcpu);
1105 void (*post_block)(struct kvm_vcpu *vcpu);
1106
1107 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1108 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1109
1110 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1111 uint32_t guest_irq, bool set);
1112 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1113
1114 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc);
1115 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1116
1117 void (*setup_mce)(struct kvm_vcpu *vcpu);
1118
1119 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1120 struct kvm_nested_state __user *user_kvm_nested_state,
1121 unsigned user_data_size);
1122 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1123 struct kvm_nested_state __user *user_kvm_nested_state,
1124 struct kvm_nested_state *kvm_state);
1125 void (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1126
1127 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1128 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1129 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase);
1130 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1131
1132 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1133 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1134 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1135
1136 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1137};
1138
1139struct kvm_arch_async_pf {
1140 u32 token;
1141 gfn_t gfn;
1142 unsigned long cr3;
1143 bool direct_map;
1144};
1145
1146extern struct kvm_x86_ops *kvm_x86_ops;
1147
1148#define __KVM_HAVE_ARCH_VM_ALLOC
1149static inline struct kvm *kvm_arch_alloc_vm(void)
1150{
1151 return kvm_x86_ops->vm_alloc();
1152}
1153
1154static inline void kvm_arch_free_vm(struct kvm *kvm)
1155{
1156 return kvm_x86_ops->vm_free(kvm);
1157}
1158
1159#define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1160static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1161{
1162 if (kvm_x86_ops->tlb_remote_flush &&
1163 !kvm_x86_ops->tlb_remote_flush(kvm))
1164 return 0;
1165 else
1166 return -ENOTSUPP;
1167}
1168
1169int kvm_mmu_module_init(void);
1170void kvm_mmu_module_exit(void);
1171
1172void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1173int kvm_mmu_create(struct kvm_vcpu *vcpu);
1174void kvm_mmu_setup(struct kvm_vcpu *vcpu);
1175void kvm_mmu_init_vm(struct kvm *kvm);
1176void kvm_mmu_uninit_vm(struct kvm *kvm);
1177void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1178 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1179 u64 acc_track_mask, u64 me_mask);
1180
1181void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1182void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1183 struct kvm_memory_slot *memslot);
1184void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1185 const struct kvm_memory_slot *memslot);
1186void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1187 struct kvm_memory_slot *memslot);
1188void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1189 struct kvm_memory_slot *memslot);
1190void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1191 struct kvm_memory_slot *memslot);
1192void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1193 struct kvm_memory_slot *slot,
1194 gfn_t gfn_offset, unsigned long mask);
1195void kvm_mmu_zap_all(struct kvm *kvm);
1196void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
1197unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
1198void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
1199
1200int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1201bool pdptrs_changed(struct kvm_vcpu *vcpu);
1202
1203int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1204 const void *val, int bytes);
1205
1206struct kvm_irq_mask_notifier {
1207 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1208 int irq;
1209 struct hlist_node link;
1210};
1211
1212void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1213 struct kvm_irq_mask_notifier *kimn);
1214void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1215 struct kvm_irq_mask_notifier *kimn);
1216void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1217 bool mask);
1218
1219extern bool tdp_enabled;
1220
1221u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1222
1223/* control of guest tsc rate supported? */
1224extern bool kvm_has_tsc_control;
1225/* maximum supported tsc_khz for guests */
1226extern u32 kvm_max_guest_tsc_khz;
1227/* number of bits of the fractional part of the TSC scaling ratio */
1228extern u8 kvm_tsc_scaling_ratio_frac_bits;
1229/* maximum allowed value of TSC scaling ratio */
1230extern u64 kvm_max_tsc_scaling_ratio;
1231/* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1232extern u64 kvm_default_tsc_scaling_ratio;
1233
1234extern u64 kvm_mce_cap_supported;
1235
1236enum emulation_result {
1237 EMULATE_DONE, /* no further processing */
1238 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
1239 EMULATE_FAIL, /* can't emulate this instruction */
1240};
1241
1242#define EMULTYPE_NO_DECODE (1 << 0)
1243#define EMULTYPE_TRAP_UD (1 << 1)
1244#define EMULTYPE_SKIP (1 << 2)
1245#define EMULTYPE_ALLOW_RETRY (1 << 3)
1246#define EMULTYPE_NO_UD_ON_FAIL (1 << 4)
1247#define EMULTYPE_VMWARE (1 << 5)
1248int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1249int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1250 void *insn, int insn_len);
1251
1252void kvm_enable_efer_bits(u64);
1253bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1254int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1255int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
1256
1257struct x86_emulate_ctxt;
1258
1259int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1260int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1261int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1262int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1263int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1264
1265void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1266int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1267void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1268
1269int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1270 int reason, bool has_error_code, u32 error_code);
1271
1272int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1273int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1274int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1275int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1276int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1277int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1278unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1279void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1280void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1281int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1282
1283int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1284int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1285
1286unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1287void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1288bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1289
1290void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1291void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1292void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1293void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1294void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1295int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1296 gfn_t gfn, void *data, int offset, int len,
1297 u32 access);
1298bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1299bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1300
1301static inline int __kvm_irq_line_state(unsigned long *irq_state,
1302 int irq_source_id, int level)
1303{
1304 /* Logical OR for level trig interrupt */
1305 if (level)
1306 __set_bit(irq_source_id, irq_state);
1307 else
1308 __clear_bit(irq_source_id, irq_state);
1309
1310 return !!(*irq_state);
1311}
1312
1313#define KVM_MMU_ROOT_CURRENT BIT(0)
1314#define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1315#define KVM_MMU_ROOTS_ALL (~0UL)
1316
1317int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1318void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1319
1320void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1321
1322int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1323int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1324void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1325int kvm_mmu_load(struct kvm_vcpu *vcpu);
1326void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1327void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1328void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, ulong roots_to_free);
1329gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1330 struct x86_exception *exception);
1331gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1332 struct x86_exception *exception);
1333gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1334 struct x86_exception *exception);
1335gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1336 struct x86_exception *exception);
1337gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1338 struct x86_exception *exception);
1339
1340void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1341
1342int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1343
1344int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code,
1345 void *insn, int insn_len);
1346void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1347void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1348void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1349
1350void kvm_enable_tdp(void);
1351void kvm_disable_tdp(void);
1352
1353static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1354 struct x86_exception *exception)
1355{
1356 return gpa;
1357}
1358
1359static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1360{
1361 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1362
1363 return (struct kvm_mmu_page *)page_private(page);
1364}
1365
1366static inline u16 kvm_read_ldt(void)
1367{
1368 u16 ldt;
1369 asm("sldt %0" : "=g"(ldt));
1370 return ldt;
1371}
1372
1373static inline void kvm_load_ldt(u16 sel)
1374{
1375 asm("lldt %0" : : "rm"(sel));
1376}
1377
1378#ifdef CONFIG_X86_64
1379static inline unsigned long read_msr(unsigned long msr)
1380{
1381 u64 value;
1382
1383 rdmsrl(msr, value);
1384 return value;
1385}
1386#endif
1387
1388static inline u32 get_rdx_init_val(void)
1389{
1390 return 0x600; /* P6 family */
1391}
1392
1393static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1394{
1395 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1396}
1397
1398#define TSS_IOPB_BASE_OFFSET 0x66
1399#define TSS_BASE_SIZE 0x68
1400#define TSS_IOPB_SIZE (65536 / 8)
1401#define TSS_REDIRECTION_SIZE (256 / 8)
1402#define RMODE_TSS_SIZE \
1403 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1404
1405enum {
1406 TASK_SWITCH_CALL = 0,
1407 TASK_SWITCH_IRET = 1,
1408 TASK_SWITCH_JMP = 2,
1409 TASK_SWITCH_GATE = 3,
1410};
1411
1412#define HF_GIF_MASK (1 << 0)
1413#define HF_HIF_MASK (1 << 1)
1414#define HF_VINTR_MASK (1 << 2)
1415#define HF_NMI_MASK (1 << 3)
1416#define HF_IRET_MASK (1 << 4)
1417#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1418#define HF_SMM_MASK (1 << 6)
1419#define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1420
1421#define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1422#define KVM_ADDRESS_SPACE_NUM 2
1423
1424#define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1425#define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1426
1427/*
1428 * Hardware virtualization extension instructions may fault if a
1429 * reboot turns off virtualization while processes are running.
1430 * Trap the fault and ignore the instruction if that happens.
1431 */
1432asmlinkage void kvm_spurious_fault(void);
1433
1434#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1435 "666: " insn "\n\t" \
1436 "668: \n\t" \
1437 ".pushsection .fixup, \"ax\" \n" \
1438 "667: \n\t" \
1439 cleanup_insn "\n\t" \
1440 "cmpb $0, kvm_rebooting \n\t" \
1441 "jne 668b \n\t" \
1442 __ASM_SIZE(push) " $666b \n\t" \
1443 "call kvm_spurious_fault \n\t" \
1444 ".popsection \n\t" \
1445 _ASM_EXTABLE(666b, 667b)
1446
1447#define __kvm_handle_fault_on_reboot(insn) \
1448 ____kvm_handle_fault_on_reboot(insn, "")
1449
1450#define KVM_ARCH_WANT_MMU_NOTIFIER
1451int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1452int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1453int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1454void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1455int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1456int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1457int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1458int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1459void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1460void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1461
1462int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1463 unsigned long ipi_bitmap_high, u32 min,
1464 unsigned long icr, int op_64_bit);
1465
1466u64 kvm_get_arch_capabilities(void);
1467void kvm_define_shared_msr(unsigned index, u32 msr);
1468int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1469
1470u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1471u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1472
1473unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1474bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1475
1476void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1477void kvm_make_scan_ioapic_request(struct kvm *kvm);
1478
1479void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1480 struct kvm_async_pf *work);
1481void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1482 struct kvm_async_pf *work);
1483void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1484 struct kvm_async_pf *work);
1485bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1486extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1487
1488int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1489int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1490void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1491
1492int kvm_is_in_guest(void);
1493
1494int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1495int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1496bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1497bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1498
1499bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1500 struct kvm_vcpu **dest_vcpu);
1501
1502void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1503 struct kvm_lapic_irq *irq);
1504
1505static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1506{
1507 if (kvm_x86_ops->vcpu_blocking)
1508 kvm_x86_ops->vcpu_blocking(vcpu);
1509}
1510
1511static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1512{
1513 if (kvm_x86_ops->vcpu_unblocking)
1514 kvm_x86_ops->vcpu_unblocking(vcpu);
1515}
1516
1517static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1518
1519static inline int kvm_cpu_get_apicid(int mps_cpu)
1520{
1521#ifdef CONFIG_X86_LOCAL_APIC
1522 return default_cpu_present_to_apicid(mps_cpu);
1523#else
1524 WARN_ON_ONCE(1);
1525 return BAD_APICID;
1526#endif
1527}
1528
1529#define put_smstate(type, buf, offset, val) \
1530 *(type *)((buf) + (offset) - 0x7e00) = val
1531
1532#endif /* _ASM_X86_KVM_HOST_H */
Linux 6.x block layer and io_uring tree(s)