KVM: MMU: document clear_spte_count
[linux-2.6-block.git] / arch / x86 / include / asm / kvm_host.h
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/mmu_notifier.h>
17#include <linux/tracepoint.h>
18#include <linux/cpumask.h>
19#include <linux/irq_work.h>
20
21#include <linux/kvm.h>
22#include <linux/kvm_para.h>
23#include <linux/kvm_types.h>
24#include <linux/perf_event.h>
25#include <linux/pvclock_gtod.h>
26#include <linux/clocksource.h>
27
28#include <asm/pvclock-abi.h>
29#include <asm/desc.h>
30#include <asm/mtrr.h>
31#include <asm/msr-index.h>
32#include <asm/asm.h>
33
34#define KVM_MAX_VCPUS 255
35#define KVM_SOFT_MAX_VCPUS 160
36#define KVM_USER_MEM_SLOTS 125
37/* memory slots that are not exposed to userspace */
38#define KVM_PRIVATE_MEM_SLOTS 3
39#define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40
41#define KVM_MMIO_SIZE 16
42
43#define KVM_PIO_PAGE_OFFSET 1
44#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
45
46#define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
47
48#define CR0_RESERVED_BITS \
49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52
53#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
54#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
55#define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
56#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
57 0xFFFFFF0000000000ULL)
58#define CR4_RESERVED_BITS \
59 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
60 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
61 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
62 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
63 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
64
65#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
66
67
68
69#define INVALID_PAGE (~(hpa_t)0)
70#define VALID_PAGE(x) ((x) != INVALID_PAGE)
71
72#define UNMAPPED_GVA (~(gpa_t)0)
73
74/* KVM Hugepage definitions for x86 */
75#define KVM_NR_PAGE_SIZES 3
76#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
77#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
78#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
79#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
80#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
81
82#define SELECTOR_TI_MASK (1 << 2)
83#define SELECTOR_RPL_MASK 0x03
84
85#define IOPL_SHIFT 12
86
87#define KVM_PERMILLE_MMU_PAGES 20
88#define KVM_MIN_ALLOC_MMU_PAGES 64
89#define KVM_MMU_HASH_SHIFT 10
90#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
91#define KVM_MIN_FREE_MMU_PAGES 5
92#define KVM_REFILL_PAGES 25
93#define KVM_MAX_CPUID_ENTRIES 80
94#define KVM_NR_FIXED_MTRR_REGION 88
95#define KVM_NR_VAR_MTRR 8
96
97#define ASYNC_PF_PER_VCPU 64
98
99struct kvm_vcpu;
100struct kvm;
101struct kvm_async_pf;
102
103enum kvm_reg {
104 VCPU_REGS_RAX = 0,
105 VCPU_REGS_RCX = 1,
106 VCPU_REGS_RDX = 2,
107 VCPU_REGS_RBX = 3,
108 VCPU_REGS_RSP = 4,
109 VCPU_REGS_RBP = 5,
110 VCPU_REGS_RSI = 6,
111 VCPU_REGS_RDI = 7,
112#ifdef CONFIG_X86_64
113 VCPU_REGS_R8 = 8,
114 VCPU_REGS_R9 = 9,
115 VCPU_REGS_R10 = 10,
116 VCPU_REGS_R11 = 11,
117 VCPU_REGS_R12 = 12,
118 VCPU_REGS_R13 = 13,
119 VCPU_REGS_R14 = 14,
120 VCPU_REGS_R15 = 15,
121#endif
122 VCPU_REGS_RIP,
123 NR_VCPU_REGS
124};
125
126enum kvm_reg_ex {
127 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
128 VCPU_EXREG_CR3,
129 VCPU_EXREG_RFLAGS,
130 VCPU_EXREG_CPL,
131 VCPU_EXREG_SEGMENTS,
132};
133
134enum {
135 VCPU_SREG_ES,
136 VCPU_SREG_CS,
137 VCPU_SREG_SS,
138 VCPU_SREG_DS,
139 VCPU_SREG_FS,
140 VCPU_SREG_GS,
141 VCPU_SREG_TR,
142 VCPU_SREG_LDTR,
143};
144
145#include <asm/kvm_emulate.h>
146
147#define KVM_NR_MEM_OBJS 40
148
149#define KVM_NR_DB_REGS 4
150
151#define DR6_BD (1 << 13)
152#define DR6_BS (1 << 14)
153#define DR6_FIXED_1 0xffff0ff0
154#define DR6_VOLATILE 0x0000e00f
155
156#define DR7_BP_EN_MASK 0x000000ff
157#define DR7_GE (1 << 9)
158#define DR7_GD (1 << 13)
159#define DR7_FIXED_1 0x00000400
160#define DR7_VOLATILE 0xffff23ff
161
162/* apic attention bits */
163#define KVM_APIC_CHECK_VAPIC 0
164/*
165 * The following bit is set with PV-EOI, unset on EOI.
166 * We detect PV-EOI changes by guest by comparing
167 * this bit with PV-EOI in guest memory.
168 * See the implementation in apic_update_pv_eoi.
169 */
170#define KVM_APIC_PV_EOI_PENDING 1
171
172/*
173 * We don't want allocation failures within the mmu code, so we preallocate
174 * enough memory for a single page fault in a cache.
175 */
176struct kvm_mmu_memory_cache {
177 int nobjs;
178 void *objects[KVM_NR_MEM_OBJS];
179};
180
181/*
182 * kvm_mmu_page_role, below, is defined as:
183 *
184 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
185 * bits 4:7 - page table level for this shadow (1-4)
186 * bits 8:9 - page table quadrant for 2-level guests
187 * bit 16 - direct mapping of virtual to physical mapping at gfn
188 * used for real mode and two-dimensional paging
189 * bits 17:19 - common access permissions for all ptes in this shadow page
190 */
191union kvm_mmu_page_role {
192 unsigned word;
193 struct {
194 unsigned level:4;
195 unsigned cr4_pae:1;
196 unsigned quadrant:2;
197 unsigned pad_for_nice_hex_output:6;
198 unsigned direct:1;
199 unsigned access:3;
200 unsigned invalid:1;
201 unsigned nxe:1;
202 unsigned cr0_wp:1;
203 unsigned smep_andnot_wp:1;
204 };
205};
206
207struct kvm_mmu_page {
208 struct list_head link;
209 struct hlist_node hash_link;
210
211 /*
212 * The following two entries are used to key the shadow page in the
213 * hash table.
214 */
215 gfn_t gfn;
216 union kvm_mmu_page_role role;
217
218 u64 *spt;
219 /* hold the gfn of each spte inside spt */
220 gfn_t *gfns;
221 bool unsync;
222 int root_count; /* Currently serving as active root */
223 unsigned int unsync_children;
224 unsigned long parent_ptes; /* Reverse mapping for parent_pte */
225 unsigned long mmu_valid_gen;
226 DECLARE_BITMAP(unsync_child_bitmap, 512);
227
228#ifdef CONFIG_X86_32
229 /*
230 * Used out of the mmu-lock to avoid reading spte values while an
231 * update is in progress; see the comments in __get_spte_lockless().
232 */
233 int clear_spte_count;
234#endif
235
236 int write_flooding_count;
237};
238
239struct kvm_pio_request {
240 unsigned long count;
241 int in;
242 int port;
243 int size;
244};
245
246/*
247 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
248 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
249 * mode.
250 */
251struct kvm_mmu {
252 void (*new_cr3)(struct kvm_vcpu *vcpu);
253 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
254 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
255 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
256 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
257 bool prefault);
258 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
259 struct x86_exception *fault);
260 void (*free)(struct kvm_vcpu *vcpu);
261 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
262 struct x86_exception *exception);
263 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
264 int (*sync_page)(struct kvm_vcpu *vcpu,
265 struct kvm_mmu_page *sp);
266 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
267 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
268 u64 *spte, const void *pte);
269 hpa_t root_hpa;
270 int root_level;
271 int shadow_root_level;
272 union kvm_mmu_page_role base_role;
273 bool direct_map;
274
275 /*
276 * Bitmap; bit set = permission fault
277 * Byte index: page fault error code [4:1]
278 * Bit index: pte permissions in ACC_* format
279 */
280 u8 permissions[16];
281
282 u64 *pae_root;
283 u64 *lm_root;
284 u64 rsvd_bits_mask[2][4];
285
286 /*
287 * Bitmap: bit set = last pte in walk
288 * index[0:1]: level (zero-based)
289 * index[2]: pte.ps
290 */
291 u8 last_pte_bitmap;
292
293 bool nx;
294
295 u64 pdptrs[4]; /* pae */
296};
297
298enum pmc_type {
299 KVM_PMC_GP = 0,
300 KVM_PMC_FIXED,
301};
302
303struct kvm_pmc {
304 enum pmc_type type;
305 u8 idx;
306 u64 counter;
307 u64 eventsel;
308 struct perf_event *perf_event;
309 struct kvm_vcpu *vcpu;
310};
311
312struct kvm_pmu {
313 unsigned nr_arch_gp_counters;
314 unsigned nr_arch_fixed_counters;
315 unsigned available_event_types;
316 u64 fixed_ctr_ctrl;
317 u64 global_ctrl;
318 u64 global_status;
319 u64 global_ovf_ctrl;
320 u64 counter_bitmask[2];
321 u64 global_ctrl_mask;
322 u8 version;
323 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
324 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
325 struct irq_work irq_work;
326 u64 reprogram_pmi;
327};
328
329struct kvm_vcpu_arch {
330 /*
331 * rip and regs accesses must go through
332 * kvm_{register,rip}_{read,write} functions.
333 */
334 unsigned long regs[NR_VCPU_REGS];
335 u32 regs_avail;
336 u32 regs_dirty;
337
338 unsigned long cr0;
339 unsigned long cr0_guest_owned_bits;
340 unsigned long cr2;
341 unsigned long cr3;
342 unsigned long cr4;
343 unsigned long cr4_guest_owned_bits;
344 unsigned long cr8;
345 u32 hflags;
346 u64 efer;
347 u64 apic_base;
348 struct kvm_lapic *apic; /* kernel irqchip context */
349 unsigned long apic_attention;
350 int32_t apic_arb_prio;
351 int mp_state;
352 u64 ia32_misc_enable_msr;
353 bool tpr_access_reporting;
354
355 /*
356 * Paging state of the vcpu
357 *
358 * If the vcpu runs in guest mode with two level paging this still saves
359 * the paging mode of the l1 guest. This context is always used to
360 * handle faults.
361 */
362 struct kvm_mmu mmu;
363
364 /*
365 * Paging state of an L2 guest (used for nested npt)
366 *
367 * This context will save all necessary information to walk page tables
368 * of the an L2 guest. This context is only initialized for page table
369 * walking and not for faulting since we never handle l2 page faults on
370 * the host.
371 */
372 struct kvm_mmu nested_mmu;
373
374 /*
375 * Pointer to the mmu context currently used for
376 * gva_to_gpa translations.
377 */
378 struct kvm_mmu *walk_mmu;
379
380 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
381 struct kvm_mmu_memory_cache mmu_page_cache;
382 struct kvm_mmu_memory_cache mmu_page_header_cache;
383
384 struct fpu guest_fpu;
385 u64 xcr0;
386
387 struct kvm_pio_request pio;
388 void *pio_data;
389
390 u8 event_exit_inst_len;
391
392 struct kvm_queued_exception {
393 bool pending;
394 bool has_error_code;
395 bool reinject;
396 u8 nr;
397 u32 error_code;
398 } exception;
399
400 struct kvm_queued_interrupt {
401 bool pending;
402 bool soft;
403 u8 nr;
404 } interrupt;
405
406 int halt_request; /* real mode on Intel only */
407
408 int cpuid_nent;
409 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
410 /* emulate context */
411
412 struct x86_emulate_ctxt emulate_ctxt;
413 bool emulate_regs_need_sync_to_vcpu;
414 bool emulate_regs_need_sync_from_vcpu;
415 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
416
417 gpa_t time;
418 struct pvclock_vcpu_time_info hv_clock;
419 unsigned int hw_tsc_khz;
420 struct gfn_to_hva_cache pv_time;
421 bool pv_time_enabled;
422 /* set guest stopped flag in pvclock flags field */
423 bool pvclock_set_guest_stopped_request;
424
425 struct {
426 u64 msr_val;
427 u64 last_steal;
428 u64 accum_steal;
429 struct gfn_to_hva_cache stime;
430 struct kvm_steal_time steal;
431 } st;
432
433 u64 last_guest_tsc;
434 u64 last_kernel_ns;
435 u64 last_host_tsc;
436 u64 tsc_offset_adjustment;
437 u64 this_tsc_nsec;
438 u64 this_tsc_write;
439 u8 this_tsc_generation;
440 bool tsc_catchup;
441 bool tsc_always_catchup;
442 s8 virtual_tsc_shift;
443 u32 virtual_tsc_mult;
444 u32 virtual_tsc_khz;
445 s64 ia32_tsc_adjust_msr;
446
447 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
448 unsigned nmi_pending; /* NMI queued after currently running handler */
449 bool nmi_injected; /* Trying to inject an NMI this entry */
450
451 struct mtrr_state_type mtrr_state;
452 u32 pat;
453
454 int switch_db_regs;
455 unsigned long db[KVM_NR_DB_REGS];
456 unsigned long dr6;
457 unsigned long dr7;
458 unsigned long eff_db[KVM_NR_DB_REGS];
459 unsigned long guest_debug_dr7;
460
461 u64 mcg_cap;
462 u64 mcg_status;
463 u64 mcg_ctl;
464 u64 *mce_banks;
465
466 /* Cache MMIO info */
467 u64 mmio_gva;
468 unsigned access;
469 gfn_t mmio_gfn;
470
471 struct kvm_pmu pmu;
472
473 /* used for guest single stepping over the given code position */
474 unsigned long singlestep_rip;
475
476 /* fields used by HYPER-V emulation */
477 u64 hv_vapic;
478
479 cpumask_var_t wbinvd_dirty_mask;
480
481 unsigned long last_retry_eip;
482 unsigned long last_retry_addr;
483
484 struct {
485 bool halted;
486 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
487 struct gfn_to_hva_cache data;
488 u64 msr_val;
489 u32 id;
490 bool send_user_only;
491 } apf;
492
493 /* OSVW MSRs (AMD only) */
494 struct {
495 u64 length;
496 u64 status;
497 } osvw;
498
499 struct {
500 u64 msr_val;
501 struct gfn_to_hva_cache data;
502 } pv_eoi;
503
504 /*
505 * Indicate whether the access faults on its page table in guest
506 * which is set when fix page fault and used to detect unhandeable
507 * instruction.
508 */
509 bool write_fault_to_shadow_pgtable;
510};
511
512struct kvm_lpage_info {
513 int write_count;
514};
515
516struct kvm_arch_memory_slot {
517 unsigned long *rmap[KVM_NR_PAGE_SIZES];
518 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
519};
520
521struct kvm_apic_map {
522 struct rcu_head rcu;
523 u8 ldr_bits;
524 /* fields bellow are used to decode ldr values in different modes */
525 u32 cid_shift, cid_mask, lid_mask;
526 struct kvm_lapic *phys_map[256];
527 /* first index is cluster id second is cpu id in a cluster */
528 struct kvm_lapic *logical_map[16][16];
529};
530
531struct kvm_arch {
532 unsigned int n_used_mmu_pages;
533 unsigned int n_requested_mmu_pages;
534 unsigned int n_max_mmu_pages;
535 unsigned int indirect_shadow_pages;
536 unsigned long mmu_valid_gen;
537 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
538 /*
539 * Hash table of struct kvm_mmu_page.
540 */
541 struct list_head active_mmu_pages;
542 struct list_head zapped_obsolete_pages;
543
544 struct list_head assigned_dev_head;
545 struct iommu_domain *iommu_domain;
546 int iommu_flags;
547 struct kvm_pic *vpic;
548 struct kvm_ioapic *vioapic;
549 struct kvm_pit *vpit;
550 int vapics_in_nmi_mode;
551 struct mutex apic_map_lock;
552 struct kvm_apic_map *apic_map;
553
554 unsigned int tss_addr;
555 struct page *apic_access_page;
556
557 gpa_t wall_clock;
558
559 struct page *ept_identity_pagetable;
560 bool ept_identity_pagetable_done;
561 gpa_t ept_identity_map_addr;
562
563 unsigned long irq_sources_bitmap;
564 s64 kvmclock_offset;
565 raw_spinlock_t tsc_write_lock;
566 u64 last_tsc_nsec;
567 u64 last_tsc_write;
568 u32 last_tsc_khz;
569 u64 cur_tsc_nsec;
570 u64 cur_tsc_write;
571 u64 cur_tsc_offset;
572 u8 cur_tsc_generation;
573 int nr_vcpus_matched_tsc;
574
575 spinlock_t pvclock_gtod_sync_lock;
576 bool use_master_clock;
577 u64 master_kernel_ns;
578 cycle_t master_cycle_now;
579
580 struct kvm_xen_hvm_config xen_hvm_config;
581
582 /* fields used by HYPER-V emulation */
583 u64 hv_guest_os_id;
584 u64 hv_hypercall;
585
586 #ifdef CONFIG_KVM_MMU_AUDIT
587 int audit_point;
588 #endif
589};
590
591struct kvm_vm_stat {
592 u32 mmu_shadow_zapped;
593 u32 mmu_pte_write;
594 u32 mmu_pte_updated;
595 u32 mmu_pde_zapped;
596 u32 mmu_flooded;
597 u32 mmu_recycled;
598 u32 mmu_cache_miss;
599 u32 mmu_unsync;
600 u32 remote_tlb_flush;
601 u32 lpages;
602};
603
604struct kvm_vcpu_stat {
605 u32 pf_fixed;
606 u32 pf_guest;
607 u32 tlb_flush;
608 u32 invlpg;
609
610 u32 exits;
611 u32 io_exits;
612 u32 mmio_exits;
613 u32 signal_exits;
614 u32 irq_window_exits;
615 u32 nmi_window_exits;
616 u32 halt_exits;
617 u32 halt_wakeup;
618 u32 request_irq_exits;
619 u32 irq_exits;
620 u32 host_state_reload;
621 u32 efer_reload;
622 u32 fpu_reload;
623 u32 insn_emulation;
624 u32 insn_emulation_fail;
625 u32 hypercalls;
626 u32 irq_injections;
627 u32 nmi_injections;
628};
629
630struct x86_instruction_info;
631
632struct msr_data {
633 bool host_initiated;
634 u32 index;
635 u64 data;
636};
637
638struct kvm_x86_ops {
639 int (*cpu_has_kvm_support)(void); /* __init */
640 int (*disabled_by_bios)(void); /* __init */
641 int (*hardware_enable)(void *dummy);
642 void (*hardware_disable)(void *dummy);
643 void (*check_processor_compatibility)(void *rtn);
644 int (*hardware_setup)(void); /* __init */
645 void (*hardware_unsetup)(void); /* __exit */
646 bool (*cpu_has_accelerated_tpr)(void);
647 void (*cpuid_update)(struct kvm_vcpu *vcpu);
648
649 /* Create, but do not attach this VCPU */
650 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
651 void (*vcpu_free)(struct kvm_vcpu *vcpu);
652 void (*vcpu_reset)(struct kvm_vcpu *vcpu);
653
654 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
655 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
656 void (*vcpu_put)(struct kvm_vcpu *vcpu);
657
658 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
659 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
660 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
661 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
662 void (*get_segment)(struct kvm_vcpu *vcpu,
663 struct kvm_segment *var, int seg);
664 int (*get_cpl)(struct kvm_vcpu *vcpu);
665 void (*set_segment)(struct kvm_vcpu *vcpu,
666 struct kvm_segment *var, int seg);
667 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
668 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
669 void (*decache_cr3)(struct kvm_vcpu *vcpu);
670 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
671 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
672 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
673 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
674 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
675 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
676 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
677 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
678 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
679 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
680 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
681 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
682 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
683 void (*fpu_activate)(struct kvm_vcpu *vcpu);
684 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
685
686 void (*tlb_flush)(struct kvm_vcpu *vcpu);
687
688 void (*run)(struct kvm_vcpu *vcpu);
689 int (*handle_exit)(struct kvm_vcpu *vcpu);
690 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
691 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
692 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
693 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
694 unsigned char *hypercall_addr);
695 void (*set_irq)(struct kvm_vcpu *vcpu);
696 void (*set_nmi)(struct kvm_vcpu *vcpu);
697 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
698 bool has_error_code, u32 error_code,
699 bool reinject);
700 void (*cancel_injection)(struct kvm_vcpu *vcpu);
701 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
702 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
703 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
704 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
705 int (*enable_nmi_window)(struct kvm_vcpu *vcpu);
706 int (*enable_irq_window)(struct kvm_vcpu *vcpu);
707 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
708 int (*vm_has_apicv)(struct kvm *kvm);
709 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
710 void (*hwapic_isr_update)(struct kvm *kvm, int isr);
711 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
712 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
713 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
714 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
715 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
716 int (*get_tdp_level)(void);
717 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
718 int (*get_lpage_level)(void);
719 bool (*rdtscp_supported)(void);
720 bool (*invpcid_supported)(void);
721 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
722
723 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
724
725 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
726
727 bool (*has_wbinvd_exit)(void);
728
729 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
730 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
731 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
732
733 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
734 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
735
736 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
737
738 int (*check_intercept)(struct kvm_vcpu *vcpu,
739 struct x86_instruction_info *info,
740 enum x86_intercept_stage stage);
741 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
742};
743
744struct kvm_arch_async_pf {
745 u32 token;
746 gfn_t gfn;
747 unsigned long cr3;
748 bool direct_map;
749};
750
751extern struct kvm_x86_ops *kvm_x86_ops;
752
753static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
754 s64 adjustment)
755{
756 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
757}
758
759static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
760{
761 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
762}
763
764int kvm_mmu_module_init(void);
765void kvm_mmu_module_exit(void);
766
767void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
768int kvm_mmu_create(struct kvm_vcpu *vcpu);
769int kvm_mmu_setup(struct kvm_vcpu *vcpu);
770void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
771 u64 dirty_mask, u64 nx_mask, u64 x_mask);
772
773int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
774void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
775void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
776 struct kvm_memory_slot *slot,
777 gfn_t gfn_offset, unsigned long mask);
778void kvm_mmu_zap_all(struct kvm *kvm);
779void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);
780unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
781void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
782
783int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
784
785int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
786 const void *val, int bytes);
787u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
788
789extern bool tdp_enabled;
790
791u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
792
793/* control of guest tsc rate supported? */
794extern bool kvm_has_tsc_control;
795/* minimum supported tsc_khz for guests */
796extern u32 kvm_min_guest_tsc_khz;
797/* maximum supported tsc_khz for guests */
798extern u32 kvm_max_guest_tsc_khz;
799
800enum emulation_result {
801 EMULATE_DONE, /* no further processing */
802 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
803 EMULATE_FAIL, /* can't emulate this instruction */
804};
805
806#define EMULTYPE_NO_DECODE (1 << 0)
807#define EMULTYPE_TRAP_UD (1 << 1)
808#define EMULTYPE_SKIP (1 << 2)
809#define EMULTYPE_RETRY (1 << 3)
810#define EMULTYPE_NO_REEXECUTE (1 << 4)
811int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
812 int emulation_type, void *insn, int insn_len);
813
814static inline int emulate_instruction(struct kvm_vcpu *vcpu,
815 int emulation_type)
816{
817 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
818}
819
820void kvm_enable_efer_bits(u64);
821bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
822int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
823int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
824
825struct x86_emulate_ctxt;
826
827int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
828void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
829int kvm_emulate_halt(struct kvm_vcpu *vcpu);
830int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
831
832void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
833int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
834void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
835
836int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
837 int reason, bool has_error_code, u32 error_code);
838
839int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
840int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
841int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
842int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
843int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
844int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
845unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
846void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
847void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
848int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
849
850int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
851int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
852
853unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
854void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
855bool kvm_rdpmc(struct kvm_vcpu *vcpu);
856
857void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
858void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
859void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
860void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
861void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
862int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
863 gfn_t gfn, void *data, int offset, int len,
864 u32 access);
865void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
866bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
867
868static inline int __kvm_irq_line_state(unsigned long *irq_state,
869 int irq_source_id, int level)
870{
871 /* Logical OR for level trig interrupt */
872 if (level)
873 __set_bit(irq_source_id, irq_state);
874 else
875 __clear_bit(irq_source_id, irq_state);
876
877 return !!(*irq_state);
878}
879
880int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
881void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
882
883void kvm_inject_nmi(struct kvm_vcpu *vcpu);
884
885int fx_init(struct kvm_vcpu *vcpu);
886
887void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
888void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
889 const u8 *new, int bytes);
890int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
891int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
892void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
893int kvm_mmu_load(struct kvm_vcpu *vcpu);
894void kvm_mmu_unload(struct kvm_vcpu *vcpu);
895void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
896gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
897gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
898 struct x86_exception *exception);
899gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
900 struct x86_exception *exception);
901gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
902 struct x86_exception *exception);
903gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
904 struct x86_exception *exception);
905
906int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
907
908int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
909 void *insn, int insn_len);
910void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
911
912void kvm_enable_tdp(void);
913void kvm_disable_tdp(void);
914
915int complete_pio(struct kvm_vcpu *vcpu);
916bool kvm_check_iopl(struct kvm_vcpu *vcpu);
917
918static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
919{
920 return gpa;
921}
922
923static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
924{
925 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
926
927 return (struct kvm_mmu_page *)page_private(page);
928}
929
930static inline u16 kvm_read_ldt(void)
931{
932 u16 ldt;
933 asm("sldt %0" : "=g"(ldt));
934 return ldt;
935}
936
937static inline void kvm_load_ldt(u16 sel)
938{
939 asm("lldt %0" : : "rm"(sel));
940}
941
942#ifdef CONFIG_X86_64
943static inline unsigned long read_msr(unsigned long msr)
944{
945 u64 value;
946
947 rdmsrl(msr, value);
948 return value;
949}
950#endif
951
952static inline u32 get_rdx_init_val(void)
953{
954 return 0x600; /* P6 family */
955}
956
957static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
958{
959 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
960}
961
962#define TSS_IOPB_BASE_OFFSET 0x66
963#define TSS_BASE_SIZE 0x68
964#define TSS_IOPB_SIZE (65536 / 8)
965#define TSS_REDIRECTION_SIZE (256 / 8)
966#define RMODE_TSS_SIZE \
967 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
968
969enum {
970 TASK_SWITCH_CALL = 0,
971 TASK_SWITCH_IRET = 1,
972 TASK_SWITCH_JMP = 2,
973 TASK_SWITCH_GATE = 3,
974};
975
976#define HF_GIF_MASK (1 << 0)
977#define HF_HIF_MASK (1 << 1)
978#define HF_VINTR_MASK (1 << 2)
979#define HF_NMI_MASK (1 << 3)
980#define HF_IRET_MASK (1 << 4)
981#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
982
983/*
984 * Hardware virtualization extension instructions may fault if a
985 * reboot turns off virtualization while processes are running.
986 * Trap the fault and ignore the instruction if that happens.
987 */
988asmlinkage void kvm_spurious_fault(void);
989
990#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
991 "666: " insn "\n\t" \
992 "668: \n\t" \
993 ".pushsection .fixup, \"ax\" \n" \
994 "667: \n\t" \
995 cleanup_insn "\n\t" \
996 "cmpb $0, kvm_rebooting \n\t" \
997 "jne 668b \n\t" \
998 __ASM_SIZE(push) " $666b \n\t" \
999 "call kvm_spurious_fault \n\t" \
1000 ".popsection \n\t" \
1001 _ASM_EXTABLE(666b, 667b)
1002
1003#define __kvm_handle_fault_on_reboot(insn) \
1004 ____kvm_handle_fault_on_reboot(insn, "")
1005
1006#define KVM_ARCH_WANT_MMU_NOTIFIER
1007int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1008int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1009int kvm_age_hva(struct kvm *kvm, unsigned long hva);
1010int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1011void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1012int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1013int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1014int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1015int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1016int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1017void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1018
1019void kvm_define_shared_msr(unsigned index, u32 msr);
1020void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1021
1022bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1023
1024void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1025 struct kvm_async_pf *work);
1026void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1027 struct kvm_async_pf *work);
1028void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1029 struct kvm_async_pf *work);
1030bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1031extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1032
1033void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1034
1035int kvm_is_in_guest(void);
1036
1037void kvm_pmu_init(struct kvm_vcpu *vcpu);
1038void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1039void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1040void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1041bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1042int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1043int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1044int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1045void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1046void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1047
1048#endif /* _ASM_X86_KVM_HOST_H */