[linux-2.6-block.git] / arch / x86 / include / asm / cpufeature.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_CPUFEATURE_H
#define _ASM_X86_CPUFEATURE_H

#include <asm/processor.h>

#if defined(__KERNEL__) && !defined(__ASSEMBLER__)

#include <asm/asm.h>
#include <linux/bitops.h>
#include <asm/alternative.h>
#include <asm/cpufeaturemasks.h>

enum cpuid_leafs
{
	CPUID_1_EDX		= 0,
	CPUID_8000_0001_EDX,
	CPUID_8086_0001_EDX,
	CPUID_LNX_1,
	CPUID_1_ECX,
	CPUID_C000_0001_EDX,
	CPUID_8000_0001_ECX,
	CPUID_LNX_2,
	CPUID_LNX_3,
	CPUID_7_0_EBX,
	CPUID_D_1_EAX,
	CPUID_LNX_4,
	CPUID_7_1_EAX,
	CPUID_8000_0008_EBX,
	CPUID_6_EAX,
	CPUID_8000_000A_EDX,
	CPUID_7_ECX,
	CPUID_8000_0007_EBX,
	CPUID_7_EDX,
	CPUID_8000_001F_EAX,
	CPUID_8000_0021_EAX,
	CPUID_LNX_5,
	NR_CPUID_WORDS,
};

extern const char * const x86_cap_flags[NCAPINTS*32];
extern const char * const x86_power_flags[32];

/*
 * In order to save room, we index into this array by doing
 * X86_BUG_<name> - NCAPINTS*32.
 */
extern const char * const x86_bug_flags[NBUGINTS*32];
#define x86_bug_flag(flag) x86_bug_flags[flag]

#define test_cpu_cap(c, bit)						\
	 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))

#define cpu_has(c, bit)							\
	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
	 test_cpu_cap(c, bit))

#define this_cpu_has(bit)						\
	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 :	\
	 x86_this_cpu_test_bit(bit, cpu_info.x86_capability))

/*
 * This is the default CPU features testing macro to use in code.
 *
 * It is for detection of features which need kernel infrastructure to be
 * used.  It may *not* directly test the CPU itself.  Use the cpu_has() family
 * if you want true runtime testing of CPU features, like in hypervisor code
 * where you are supporting a possible guest feature where host support for it
 * is not relevant.
 */
#define cpu_feature_enabled(bit)	\
	(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))

#define boot_cpu_has(bit)	cpu_has(&boot_cpu_data, bit)

#define set_cpu_cap(c, bit)	set_bit(bit, (unsigned long *)((c)->x86_capability))

extern void setup_clear_cpu_cap(unsigned int bit);
extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
void check_cpufeature_deps(struct cpuinfo_x86 *c);

#define setup_force_cpu_cap(bit) do {			\
							\
	if (!boot_cpu_has(bit))				\
		WARN_ON(alternatives_patched);		\
							\
	set_cpu_cap(&boot_cpu_data, bit);		\
	set_bit(bit, (unsigned long *)cpu_caps_set);	\
} while (0)

#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)

/*
 * Do not use an "m" constraint for [cap_byte] here: gcc doesn't know
 * that this is only used on a fallback path and will sometimes cause
 * it to manifest the address of boot_cpu_data in a register, fouling
 * the mainline (post-initialization) code.
 */
static __always_inline bool _static_cpu_has(u16 bit)
{
	asm goto(ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]")
		".pushsection .altinstr_aux,\"ax\"\n"
		"6:\n"
		" testb %[bitnum], %a[cap_byte]\n"
		" jnz %l[t_yes]\n"
		" jmp %l[t_no]\n"
		".popsection\n"
		 : : [feature]  "i" (bit),
		     [bitnum]   "i" (1 << (bit & 7)),
		     [cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])
		 : : t_yes, t_no);
t_yes:
	return true;
t_no:
	return false;
}

#define static_cpu_has(bit)					\
(								\
	__builtin_constant_p(boot_cpu_has(bit)) ?		\
		boot_cpu_has(bit) :				\
		_static_cpu_has(bit)				\
)

#define cpu_has_bug(c, bit)		cpu_has(c, (bit))
#define set_cpu_bug(c, bit)		set_cpu_cap(c, (bit))
#define clear_cpu_bug(c, bit)		clear_cpu_cap(c, (bit))

#define static_cpu_has_bug(bit)		static_cpu_has((bit))
#define boot_cpu_has_bug(bit)		cpu_has_bug(&boot_cpu_data, (bit))
#define boot_cpu_set_bug(bit)		set_cpu_cap(&boot_cpu_data, (bit))

#define MAX_CPU_FEATURES		(NCAPINTS * 32)
#define cpu_have_feature		boot_cpu_has

#define CPU_FEATURE_TYPEFMT		"x86,ven%04Xfam%04Xmod%04X"
#define CPU_FEATURE_TYPEVAL		boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
					boot_cpu_data.x86_model

#endif /* defined(__KERNEL__) && !defined(__ASSEMBLER__) */
#endif /* _ASM_X86_CPUFEATURE_H */
Commit	Line	Data
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_X86_CPUFEATURE_H
	3	#define _ASM_X86_CPUFEATURE_H
	4
	5	#include <asm/processor.h>
	6
	7	#if defined(__KERNEL__) && !defined(__ASSEMBLER__)
	8
	9	#include <asm/asm.h>
	10	#include <linux/bitops.h>
	11	#include <asm/alternative.h>
	12	#include <asm/cpufeaturemasks.h>
	13
	14	enum cpuid_leafs
	15	{
	16	CPUID_1_EDX = 0,
	17	CPUID_8000_0001_EDX,
	18	CPUID_8086_0001_EDX,
	19	CPUID_LNX_1,
	20	CPUID_1_ECX,
	21	CPUID_C000_0001_EDX,
	22	CPUID_8000_0001_ECX,
	23	CPUID_LNX_2,
	24	CPUID_LNX_3,
	25	CPUID_7_0_EBX,
	26	CPUID_D_1_EAX,
	27	CPUID_LNX_4,
	28	CPUID_7_1_EAX,
	29	CPUID_8000_0008_EBX,
	30	CPUID_6_EAX,
	31	CPUID_8000_000A_EDX,
	32	CPUID_7_ECX,
	33	CPUID_8000_0007_EBX,
	34	CPUID_7_EDX,
	35	CPUID_8000_001F_EAX,
	36	CPUID_8000_0021_EAX,
	37	CPUID_LNX_5,
	38	NR_CPUID_WORDS,
	39	};
	40
	41	extern const char * const x86_cap_flags[NCAPINTS*32];
	42	extern const char * const x86_power_flags[32];
	43
	44	/*
	45	* In order to save room, we index into this array by doing
	46	* X86_BUG_<name> - NCAPINTS*32.
	47	*/
	48	extern const char * const x86_bug_flags[NBUGINTS*32];
	49	#define x86_bug_flag(flag) x86_bug_flags[flag]
	50
	51	#define test_cpu_cap(c, bit) \
	52	arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
	53
	54	#define cpu_has(c, bit) \
	55	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
	56	test_cpu_cap(c, bit))
	57
	58	#define this_cpu_has(bit) \
	59	(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
	60	x86_this_cpu_test_bit(bit, cpu_info.x86_capability))
	61
	62	/*
	63	* This is the default CPU features testing macro to use in code.
	64	*
	65	* It is for detection of features which need kernel infrastructure to be
	66	* used. It may not directly test the CPU itself. Use the cpu_has() family
	67	* if you want true runtime testing of CPU features, like in hypervisor code
	68	* where you are supporting a possible guest feature where host support for it
	69	* is not relevant.
	70	*/
	71	#define cpu_feature_enabled(bit) \
	72	(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
	73
	74	#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
	75
	76	#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
	77
	78	extern void setup_clear_cpu_cap(unsigned int bit);
	79	extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
	80	void check_cpufeature_deps(struct cpuinfo_x86 *c);
	81
	82	#define setup_force_cpu_cap(bit) do { \
	83	\
	84	if (!boot_cpu_has(bit)) \
	85	WARN_ON(alternatives_patched); \
	86	\
	87	set_cpu_cap(&boot_cpu_data, bit); \
	88	set_bit(bit, (unsigned long *)cpu_caps_set); \
	89	} while (0)
	90
	91	#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
	92
	93	/*
	94	* Do not use an "m" constraint for [cap_byte] here: gcc doesn't know
	95	* that this is only used on a fallback path and will sometimes cause
	96	* it to manifest the address of boot_cpu_data in a register, fouling
	97	* the mainline (post-initialization) code.
	98	*/
	99	static __always_inline bool _static_cpu_has(u16 bit)
	100	{
	101	asm goto(ALTERNATIVE_TERNARY("jmp 6f", %c[feature], "", "jmp %l[t_no]")
	102	".pushsection .altinstr_aux,\"ax\"\n"
	103	"6:\n"
	104	" testb %[bitnum], %a[cap_byte]\n"
	105	" jnz %l[t_yes]\n"
	106	" jmp %l[t_no]\n"
	107	".popsection\n"
	108	: : [feature] "i" (bit),
	109	[bitnum] "i" (1 << (bit & 7)),
	110	[cap_byte] "i" (&((const char *)boot_cpu_data.x86_capability)[bit >> 3])
	111	: : t_yes, t_no);
	112	t_yes:
	113	return true;
	114	t_no:
	115	return false;
	116	}
	117
	118	#define static_cpu_has(bit) \
	119	( \
	120	__builtin_constant_p(boot_cpu_has(bit)) ? \
	121	boot_cpu_has(bit) : \
	122	_static_cpu_has(bit) \
	123	)
	124
	125	#define cpu_has_bug(c, bit) cpu_has(c, (bit))
	126	#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
	127	#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
	128
	129	#define static_cpu_has_bug(bit) static_cpu_has((bit))
	130	#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
	131	#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
	132
	133	#define MAX_CPU_FEATURES (NCAPINTS * 32)
	134	#define cpu_have_feature boot_cpu_has
	135
	136	#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
	137	#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
	138	boot_cpu_data.x86_model
	139
	140	#endif /* defined(__KERNEL__) && !defined(__ASSEMBLER__) */
	141	#endif /* _ASM_X86_CPUFEATURE_H */