[linux-2.6-block.git] / arch / s390 / include / asm / mmu_context.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  S390 version
 *
 *  Derived from "include/asm-i386/mmu_context.h"
 */

#ifndef __S390_MMU_CONTEXT_H
#define __S390_MMU_CONTEXT_H

#include <asm/pgalloc.h>
#include <linux/uaccess.h>
#include <linux/mm_types.h>
#include <asm/tlbflush.h>
#include <asm/ctlreg.h>
#include <asm/asce.h>
#include <asm-generic/mm_hooks.h>

#define init_new_context init_new_context
static inline int init_new_context(struct task_struct *tsk,
				   struct mm_struct *mm)
{
	unsigned long asce_type, init_entry;

	spin_lock_init(&mm->context.lock);
	INIT_LIST_HEAD(&mm->context.gmap_list);
	cpumask_clear(&mm->context.cpu_attach_mask);
	atomic_set(&mm->context.flush_count, 0);
	atomic_set(&mm->context.protected_count, 0);
	mm->context.gmap_asce = 0;
	mm->context.flush_mm = 0;
#ifdef CONFIG_PGSTE
	mm->context.has_pgste = 0;
	mm->context.uses_skeys = 0;
	mm->context.uses_cmm = 0;
	mm->context.allow_cow_sharing = 1;
	mm->context.allow_gmap_hpage_1m = 0;
#endif
	switch (mm->context.asce_limit) {
	default:
		/*
		 * context created by exec, the value of asce_limit can
		 * only be zero in this case
		 */
		VM_BUG_ON(mm->context.asce_limit);
		/* continue as 3-level task */
		mm->context.asce_limit = _REGION2_SIZE;
		fallthrough;
	case _REGION2_SIZE:
		/* forked 3-level task */
		init_entry = _REGION3_ENTRY_EMPTY;
		asce_type = _ASCE_TYPE_REGION3;
		break;
	case TASK_SIZE_MAX:
		/* forked 5-level task */
		init_entry = _REGION1_ENTRY_EMPTY;
		asce_type = _ASCE_TYPE_REGION1;
		break;
	case _REGION1_SIZE:
		/* forked 4-level task */
		init_entry = _REGION2_ENTRY_EMPTY;
		asce_type = _ASCE_TYPE_REGION2;
		break;
	}
	mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
			   _ASCE_USER_BITS | asce_type;
	crst_table_init((unsigned long *) mm->pgd, init_entry);
	return 0;
}

static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
				      struct task_struct *tsk)
{
	int cpu = smp_processor_id();

	if (next == &init_mm)
		get_lowcore()->user_asce = s390_invalid_asce;
	else
		get_lowcore()->user_asce.val = next->context.asce;
	cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
	/* Clear previous user-ASCE from CR1 and CR7 */
	local_ctl_load(1, &s390_invalid_asce);
	local_ctl_load(7, &s390_invalid_asce);
	if (prev != next)
		cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
}
#define switch_mm_irqs_off switch_mm_irqs_off

static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
			     struct task_struct *tsk)
{
	unsigned long flags;

	local_irq_save(flags);
	switch_mm_irqs_off(prev, next, tsk);
	local_irq_restore(flags);
}

#define finish_arch_post_lock_switch finish_arch_post_lock_switch
static inline void finish_arch_post_lock_switch(void)
{
	struct task_struct *tsk = current;
	struct mm_struct *mm = tsk->mm;
	unsigned long flags;

	if (mm) {
		preempt_disable();
		while (atomic_read(&mm->context.flush_count))
			cpu_relax();
		cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
		__tlb_flush_mm_lazy(mm);
		preempt_enable();
	}
	local_irq_save(flags);
	if (test_thread_flag(TIF_ASCE_PRIMARY))
		local_ctl_load(1, &get_lowcore()->kernel_asce);
	else
		local_ctl_load(1, &get_lowcore()->user_asce);
	local_ctl_load(7, &get_lowcore()->user_asce);
	local_irq_restore(flags);
}

#define activate_mm activate_mm
static inline void activate_mm(struct mm_struct *prev,
                               struct mm_struct *next)
{
	switch_mm_irqs_off(prev, next, current);
	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
	if (test_thread_flag(TIF_ASCE_PRIMARY))
		local_ctl_load(1, &get_lowcore()->kernel_asce);
	else
		local_ctl_load(1, &get_lowcore()->user_asce);
	local_ctl_load(7, &get_lowcore()->user_asce);
}

#include <asm-generic/mmu_context.h>

#endif /* __S390_MMU_CONTEXT_H */
Commit	Line	Data
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* S390 version
	4	*
	5	* Derived from "include/asm-i386/mmu_context.h"
	6	*/
	7
	8	#ifndef __S390_MMU_CONTEXT_H
	9	#define __S390_MMU_CONTEXT_H
	10
	11	#include <asm/pgalloc.h>
	12	#include <linux/uaccess.h>
	13	#include <linux/mm_types.h>
	14	#include <asm/tlbflush.h>
	15	#include <asm/ctlreg.h>
	16	#include <asm/asce.h>
	17	#include <asm-generic/mm_hooks.h>
	18
	19	#define init_new_context init_new_context
	20	static inline int init_new_context(struct task_struct *tsk,
	21	struct mm_struct *mm)
	22	{
	23	unsigned long asce_type, init_entry;
	24
	25	spin_lock_init(&mm->context.lock);
	26	INIT_LIST_HEAD(&mm->context.gmap_list);
	27	cpumask_clear(&mm->context.cpu_attach_mask);
	28	atomic_set(&mm->context.flush_count, 0);
	29	atomic_set(&mm->context.protected_count, 0);
	30	mm->context.gmap_asce = 0;
	31	mm->context.flush_mm = 0;
	32	#ifdef CONFIG_PGSTE
	33	mm->context.has_pgste = 0;
	34	mm->context.uses_skeys = 0;
	35	mm->context.uses_cmm = 0;
	36	mm->context.allow_cow_sharing = 1;
	37	mm->context.allow_gmap_hpage_1m = 0;
	38	#endif
	39	switch (mm->context.asce_limit) {
	40	default:
	41	/*
	42	* context created by exec, the value of asce_limit can
	43	* only be zero in this case
	44	*/
	45	VM_BUG_ON(mm->context.asce_limit);
	46	/* continue as 3-level task */
	47	mm->context.asce_limit = _REGION2_SIZE;
	48	fallthrough;
	49	case _REGION2_SIZE:
	50	/* forked 3-level task */
	51	init_entry = _REGION3_ENTRY_EMPTY;
	52	asce_type = _ASCE_TYPE_REGION3;
	53	break;
	54	case TASK_SIZE_MAX:
	55	/* forked 5-level task */
	56	init_entry = _REGION1_ENTRY_EMPTY;
	57	asce_type = _ASCE_TYPE_REGION1;
	58	break;
	59	case _REGION1_SIZE:
	60	/* forked 4-level task */
	61	init_entry = _REGION2_ENTRY_EMPTY;
	62	asce_type = _ASCE_TYPE_REGION2;
	63	break;
	64	}
	65	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
	66	_ASCE_USER_BITS \| asce_type;
	67	crst_table_init((unsigned long *) mm->pgd, init_entry);
	68	return 0;
	69	}
	70
	71	static inline void switch_mm_irqs_off(struct mm_struct prev, struct mm_struct next,
	72	struct task_struct *tsk)
	73	{
	74	int cpu = smp_processor_id();
	75
	76	if (next == &init_mm)
	77	get_lowcore()->user_asce = s390_invalid_asce;
	78	else
	79	get_lowcore()->user_asce.val = next->context.asce;
	80	cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
	81	/* Clear previous user-ASCE from CR1 and CR7 */
	82	local_ctl_load(1, &s390_invalid_asce);
	83	local_ctl_load(7, &s390_invalid_asce);
	84	if (prev != next)
	85	cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
	86	}
	87	#define switch_mm_irqs_off switch_mm_irqs_off
	88
	89	static inline void switch_mm(struct mm_struct prev, struct mm_struct next,
	90	struct task_struct *tsk)
	91	{
	92	unsigned long flags;
	93
	94	local_irq_save(flags);
	95	switch_mm_irqs_off(prev, next, tsk);
	96	local_irq_restore(flags);
	97	}
	98
	99	#define finish_arch_post_lock_switch finish_arch_post_lock_switch
	100	static inline void finish_arch_post_lock_switch(void)
	101	{
	102	struct task_struct *tsk = current;
	103	struct mm_struct *mm = tsk->mm;
	104	unsigned long flags;
	105
	106	if (mm) {
	107	preempt_disable();
	108	while (atomic_read(&mm->context.flush_count))
	109	cpu_relax();
	110	cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
	111	__tlb_flush_mm_lazy(mm);
	112	preempt_enable();
	113	}
	114	local_irq_save(flags);
	115	if (test_thread_flag(TIF_ASCE_PRIMARY))
	116	local_ctl_load(1, &get_lowcore()->kernel_asce);
	117	else
	118	local_ctl_load(1, &get_lowcore()->user_asce);
	119	local_ctl_load(7, &get_lowcore()->user_asce);
	120	local_irq_restore(flags);
	121	}
	122
	123	#define activate_mm activate_mm
	124	static inline void activate_mm(struct mm_struct *prev,
	125	struct mm_struct *next)
	126	{
	127	switch_mm_irqs_off(prev, next, current);
	128	cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
	129	if (test_thread_flag(TIF_ASCE_PRIMARY))
	130	local_ctl_load(1, &get_lowcore()->kernel_asce);
	131	else
	132	local_ctl_load(1, &get_lowcore()->user_asce);
	133	local_ctl_load(7, &get_lowcore()->user_asce);
	134	}
	135
	136	#include <asm-generic/mmu_context.h>
	137
	138	#endif /* __S390_MMU_CONTEXT_H */