| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright IBM Corp. 1999, 2012 |
| 4 | * Author(s): Hartmut Penner <hp@de.ibm.com>, |
| 5 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, |
| 6 | * Denis Joseph Barrow, |
| 7 | */ |
| 8 | |
| 9 | #ifndef _ASM_S390_LOWCORE_H |
| 10 | #define _ASM_S390_LOWCORE_H |
| 11 | |
| 12 | #include <linux/types.h> |
| 13 | #include <asm/machine.h> |
| 14 | #include <asm/ptrace.h> |
| 15 | #include <asm/ctlreg.h> |
| 16 | #include <asm/cpu.h> |
| 17 | #include <asm/types.h> |
| 18 | #include <asm/alternative.h> |
| 19 | |
| 20 | #define LC_ORDER 1 |
| 21 | #define LC_PAGES 2 |
| 22 | |
| 23 | #define LOWCORE_ALT_ADDRESS _AC(0x70000, UL) |
| 24 | |
| 25 | #ifndef __ASSEMBLY__ |
| 26 | |
| 27 | struct pgm_tdb { |
| 28 | u64 data[32]; |
| 29 | }; |
| 30 | |
| 31 | struct lowcore { |
| 32 | __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ |
| 33 | __u32 ipl_parmblock_ptr; /* 0x0014 */ |
| 34 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ |
| 35 | __u32 ext_params; /* 0x0080 */ |
| 36 | union { |
| 37 | struct { |
| 38 | __u16 ext_cpu_addr; /* 0x0084 */ |
| 39 | __u16 ext_int_code; /* 0x0086 */ |
| 40 | }; |
| 41 | __u32 ext_int_code_addr; |
| 42 | }; |
| 43 | __u32 svc_int_code; /* 0x0088 */ |
| 44 | union { |
| 45 | struct { |
| 46 | __u16 pgm_ilc; /* 0x008c */ |
| 47 | __u16 pgm_code; /* 0x008e */ |
| 48 | }; |
| 49 | __u32 pgm_int_code; |
| 50 | }; |
| 51 | __u32 data_exc_code; /* 0x0090 */ |
| 52 | __u16 mon_class_num; /* 0x0094 */ |
| 53 | union { |
| 54 | struct { |
| 55 | __u8 per_code; /* 0x0096 */ |
| 56 | __u8 per_atmid; /* 0x0097 */ |
| 57 | }; |
| 58 | __u16 per_code_combined; |
| 59 | }; |
| 60 | __u64 per_address; /* 0x0098 */ |
| 61 | __u8 exc_access_id; /* 0x00a0 */ |
| 62 | __u8 per_access_id; /* 0x00a1 */ |
| 63 | __u8 op_access_id; /* 0x00a2 */ |
| 64 | __u8 ar_mode_id; /* 0x00a3 */ |
| 65 | __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ |
| 66 | __u64 trans_exc_code; /* 0x00a8 */ |
| 67 | __u64 monitor_code; /* 0x00b0 */ |
| 68 | union { |
| 69 | struct { |
| 70 | __u16 subchannel_id; /* 0x00b8 */ |
| 71 | __u16 subchannel_nr; /* 0x00ba */ |
| 72 | __u32 io_int_parm; /* 0x00bc */ |
| 73 | __u32 io_int_word; /* 0x00c0 */ |
| 74 | }; |
| 75 | struct tpi_info tpi_info; /* 0x00b8 */ |
| 76 | }; |
| 77 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ |
| 78 | __u32 stfl_fac_list; /* 0x00c8 */ |
| 79 | __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ |
| 80 | __u64 mcck_interruption_code; /* 0x00e8 */ |
| 81 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ |
| 82 | __u32 external_damage_code; /* 0x00f4 */ |
| 83 | __u64 failing_storage_address; /* 0x00f8 */ |
| 84 | __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ |
| 85 | __u64 pgm_last_break; /* 0x0110 */ |
| 86 | __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ |
| 87 | psw_t restart_old_psw; /* 0x0120 */ |
| 88 | psw_t external_old_psw; /* 0x0130 */ |
| 89 | psw_t svc_old_psw; /* 0x0140 */ |
| 90 | psw_t program_old_psw; /* 0x0150 */ |
| 91 | psw_t mcck_old_psw; /* 0x0160 */ |
| 92 | psw_t io_old_psw; /* 0x0170 */ |
| 93 | __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ |
| 94 | psw_t restart_psw; /* 0x01a0 */ |
| 95 | psw_t external_new_psw; /* 0x01b0 */ |
| 96 | psw_t svc_new_psw; /* 0x01c0 */ |
| 97 | psw_t program_new_psw; /* 0x01d0 */ |
| 98 | psw_t mcck_new_psw; /* 0x01e0 */ |
| 99 | psw_t io_new_psw; /* 0x01f0 */ |
| 100 | |
| 101 | /* Save areas. */ |
| 102 | __u64 save_area[8]; /* 0x0200 */ |
| 103 | __u8 pad_0x0240[0x0280-0x0240]; /* 0x0240 */ |
| 104 | __u64 save_area_restart[1]; /* 0x0280 */ |
| 105 | |
| 106 | __u64 pcpu; /* 0x0288 */ |
| 107 | |
| 108 | /* Return psws. */ |
| 109 | psw_t return_psw; /* 0x0290 */ |
| 110 | psw_t return_mcck_psw; /* 0x02a0 */ |
| 111 | |
| 112 | __u64 last_break; /* 0x02b0 */ |
| 113 | |
| 114 | /* CPU accounting and timing values. */ |
| 115 | __u64 sys_enter_timer; /* 0x02b8 */ |
| 116 | __u64 mcck_enter_timer; /* 0x02c0 */ |
| 117 | __u64 exit_timer; /* 0x02c8 */ |
| 118 | __u64 user_timer; /* 0x02d0 */ |
| 119 | __u64 guest_timer; /* 0x02d8 */ |
| 120 | __u64 system_timer; /* 0x02e0 */ |
| 121 | __u64 hardirq_timer; /* 0x02e8 */ |
| 122 | __u64 softirq_timer; /* 0x02f0 */ |
| 123 | __u64 steal_timer; /* 0x02f8 */ |
| 124 | __u64 avg_steal_timer; /* 0x0300 */ |
| 125 | __u64 last_update_timer; /* 0x0308 */ |
| 126 | __u64 last_update_clock; /* 0x0310 */ |
| 127 | __u64 int_clock; /* 0x0318 */ |
| 128 | __u8 pad_0x0320[0x0328-0x0320]; /* 0x0320 */ |
| 129 | __u64 clock_comparator; /* 0x0328 */ |
| 130 | __u8 pad_0x0330[0x0340-0x0330]; /* 0x0330 */ |
| 131 | |
| 132 | /* Current process. */ |
| 133 | __u64 current_task; /* 0x0340 */ |
| 134 | __u64 kernel_stack; /* 0x0348 */ |
| 135 | |
| 136 | /* Interrupt, DAT-off and restartstack. */ |
| 137 | __u64 async_stack; /* 0x0350 */ |
| 138 | __u64 nodat_stack; /* 0x0358 */ |
| 139 | __u64 restart_stack; /* 0x0360 */ |
| 140 | __u64 mcck_stack; /* 0x0368 */ |
| 141 | /* Restart function and parameter. */ |
| 142 | __u64 restart_fn; /* 0x0370 */ |
| 143 | __u64 restart_data; /* 0x0378 */ |
| 144 | __u32 restart_source; /* 0x0380 */ |
| 145 | __u32 restart_flags; /* 0x0384 */ |
| 146 | |
| 147 | /* Address space pointer. */ |
| 148 | struct ctlreg kernel_asce; /* 0x0388 */ |
| 149 | struct ctlreg user_asce; /* 0x0390 */ |
| 150 | |
| 151 | /* |
| 152 | * The lpp and current_pid fields form a |
| 153 | * 64-bit value that is set as program |
| 154 | * parameter with the LPP instruction. |
| 155 | */ |
| 156 | __u32 lpp; /* 0x0398 */ |
| 157 | __u32 current_pid; /* 0x039c */ |
| 158 | |
| 159 | /* SMP info area */ |
| 160 | __u32 cpu_nr; /* 0x03a0 */ |
| 161 | __u32 softirq_pending; /* 0x03a4 */ |
| 162 | __s32 preempt_count; /* 0x03a8 */ |
| 163 | __u32 spinlock_lockval; /* 0x03ac */ |
| 164 | __u32 spinlock_index; /* 0x03b0 */ |
| 165 | __u8 pad_0x03b4[0x03b8-0x03b4]; /* 0x03b4 */ |
| 166 | __u64 percpu_offset; /* 0x03b8 */ |
| 167 | __u8 pad_0x03c0[0x0400-0x03c0]; /* 0x03c0 */ |
| 168 | |
| 169 | __u32 return_lpswe; /* 0x0400 */ |
| 170 | __u32 return_mcck_lpswe; /* 0x0404 */ |
| 171 | __u8 pad_0x040a[0x0e00-0x0408]; /* 0x0408 */ |
| 172 | |
| 173 | /* |
| 174 | * 0xe00 contains the address of the IPL Parameter Information |
| 175 | * block. Dump tools need IPIB for IPL after dump. |
| 176 | * Note: do not change the position of any fields in 0x0e00-0x0f00 |
| 177 | */ |
| 178 | __u64 ipib; /* 0x0e00 */ |
| 179 | __u32 ipib_checksum; /* 0x0e08 */ |
| 180 | __u64 vmcore_info; /* 0x0e0c */ |
| 181 | __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */ |
| 182 | __u64 os_info; /* 0x0e18 */ |
| 183 | __u8 pad_0x0e20[0x11b0-0x0e20]; /* 0x0e20 */ |
| 184 | |
| 185 | /* Pointer to the machine check extended save area */ |
| 186 | __u64 mcesad; /* 0x11b0 */ |
| 187 | |
| 188 | /* 64 bit extparam used for pfault/diag 250: defined by architecture */ |
| 189 | __u64 ext_params2; /* 0x11B8 */ |
| 190 | __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ |
| 191 | |
| 192 | /* CPU register save area: defined by architecture */ |
| 193 | __u64 floating_pt_save_area[16]; /* 0x1200 */ |
| 194 | __u64 gpregs_save_area[16]; /* 0x1280 */ |
| 195 | psw_t psw_save_area; /* 0x1300 */ |
| 196 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ |
| 197 | __u32 prefixreg_save_area; /* 0x1318 */ |
| 198 | __u32 fpt_creg_save_area; /* 0x131c */ |
| 199 | __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ |
| 200 | __u32 tod_progreg_save_area; /* 0x1324 */ |
| 201 | __u32 cpu_timer_save_area[2]; /* 0x1328 */ |
| 202 | __u32 clock_comp_save_area[2]; /* 0x1330 */ |
| 203 | __u64 last_break_save_area; /* 0x1338 */ |
| 204 | __u32 access_regs_save_area[16]; /* 0x1340 */ |
| 205 | struct ctlreg cregs_save_area[16]; /* 0x1380 */ |
| 206 | __u8 pad_0x1400[0x1500-0x1400]; /* 0x1400 */ |
| 207 | /* Cryptography-counter designation */ |
| 208 | __u64 ccd; /* 0x1500 */ |
| 209 | /* AI-extension counter designation */ |
| 210 | __u64 aicd; /* 0x1508 */ |
| 211 | __u8 pad_0x1510[0x1800-0x1510]; /* 0x1510 */ |
| 212 | |
| 213 | /* Transaction abort diagnostic block */ |
| 214 | struct pgm_tdb pgm_tdb; /* 0x1800 */ |
| 215 | __u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */ |
| 216 | } __packed __aligned(8192); |
| 217 | |
| 218 | static __always_inline struct lowcore *get_lowcore(void) |
| 219 | { |
| 220 | struct lowcore *lc; |
| 221 | |
| 222 | if (__is_defined(__DECOMPRESSOR)) |
| 223 | return NULL; |
| 224 | asm_inline( |
| 225 | ALTERNATIVE(" lghi %[lc],0", |
| 226 | " llilh %[lc],%[alt]", |
| 227 | ALT_FEATURE(MFEATURE_LOWCORE)) |
| 228 | : [lc] "=d" (lc) |
| 229 | : [alt] "i" (LOWCORE_ALT_ADDRESS >> 16)); |
| 230 | return lc; |
| 231 | } |
| 232 | |
| 233 | extern struct lowcore *lowcore_ptr[]; |
| 234 | |
| 235 | static inline void set_prefix(__u32 address) |
| 236 | { |
| 237 | asm volatile("spx %0" : : "Q" (address) : "memory"); |
| 238 | } |
| 239 | |
| 240 | #else /* __ASSEMBLY__ */ |
| 241 | |
| 242 | .macro GET_LC reg |
| 243 | ALTERNATIVE "lghi \reg,0", \ |
| 244 | __stringify(llilh \reg, LOWCORE_ALT_ADDRESS >> 16), \ |
| 245 | ALT_FEATURE(MFEATURE_LOWCORE) |
| 246 | .endm |
| 247 | |
| 248 | .macro STMG_LC start, end, savearea |
| 249 | ALTERNATIVE "stmg \start, \end, \savearea", \ |
| 250 | __stringify(stmg \start, \end, LOWCORE_ALT_ADDRESS + \savearea), \ |
| 251 | ALT_FEATURE(MFEATURE_LOWCORE) |
| 252 | .endm |
| 253 | |
| 254 | #endif /* __ASSEMBLY__ */ |
| 255 | #endif /* _ASM_S390_LOWCORE_H */ |