| 1 | /* |
| 2 | * |
| 3 | * Common boot and setup code. |
| 4 | * |
| 5 | * Copyright (C) 2001 PPC64 Team, IBM Corp |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #define DEBUG |
| 14 | |
| 15 | #include <linux/export.h> |
| 16 | #include <linux/string.h> |
| 17 | #include <linux/sched.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/reboot.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/initrd.h> |
| 23 | #include <linux/seq_file.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/console.h> |
| 26 | #include <linux/utsname.h> |
| 27 | #include <linux/tty.h> |
| 28 | #include <linux/root_dev.h> |
| 29 | #include <linux/notifier.h> |
| 30 | #include <linux/cpu.h> |
| 31 | #include <linux/unistd.h> |
| 32 | #include <linux/serial.h> |
| 33 | #include <linux/serial_8250.h> |
| 34 | #include <linux/bootmem.h> |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/lockdep.h> |
| 37 | #include <linux/memblock.h> |
| 38 | #include <linux/hugetlb.h> |
| 39 | #include <linux/memory.h> |
| 40 | #include <linux/nmi.h> |
| 41 | |
| 42 | #include <asm/io.h> |
| 43 | #include <asm/kdump.h> |
| 44 | #include <asm/prom.h> |
| 45 | #include <asm/processor.h> |
| 46 | #include <asm/pgtable.h> |
| 47 | #include <asm/smp.h> |
| 48 | #include <asm/elf.h> |
| 49 | #include <asm/machdep.h> |
| 50 | #include <asm/paca.h> |
| 51 | #include <asm/time.h> |
| 52 | #include <asm/cputable.h> |
| 53 | #include <asm/sections.h> |
| 54 | #include <asm/btext.h> |
| 55 | #include <asm/nvram.h> |
| 56 | #include <asm/setup.h> |
| 57 | #include <asm/rtas.h> |
| 58 | #include <asm/iommu.h> |
| 59 | #include <asm/serial.h> |
| 60 | #include <asm/cache.h> |
| 61 | #include <asm/page.h> |
| 62 | #include <asm/mmu.h> |
| 63 | #include <asm/firmware.h> |
| 64 | #include <asm/xmon.h> |
| 65 | #include <asm/udbg.h> |
| 66 | #include <asm/kexec.h> |
| 67 | #include <asm/mmu_context.h> |
| 68 | #include <asm/code-patching.h> |
| 69 | #include <asm/kvm_ppc.h> |
| 70 | #include <asm/hugetlb.h> |
| 71 | #include <asm/livepatch.h> |
| 72 | #include <asm/opal.h> |
| 73 | |
| 74 | #ifdef DEBUG |
| 75 | #define DBG(fmt...) udbg_printf(fmt) |
| 76 | #else |
| 77 | #define DBG(fmt...) |
| 78 | #endif |
| 79 | |
| 80 | int spinning_secondaries; |
| 81 | u64 ppc64_pft_size; |
| 82 | |
| 83 | /* Pick defaults since we might want to patch instructions |
| 84 | * before we've read this from the device tree. |
| 85 | */ |
| 86 | struct ppc64_caches ppc64_caches = { |
| 87 | .dline_size = 0x40, |
| 88 | .log_dline_size = 6, |
| 89 | .iline_size = 0x40, |
| 90 | .log_iline_size = 6 |
| 91 | }; |
| 92 | EXPORT_SYMBOL_GPL(ppc64_caches); |
| 93 | |
| 94 | /* |
| 95 | * These are used in binfmt_elf.c to put aux entries on the stack |
| 96 | * for each elf executable being started. |
| 97 | */ |
| 98 | int dcache_bsize; |
| 99 | int icache_bsize; |
| 100 | int ucache_bsize; |
| 101 | |
| 102 | #if defined(CONFIG_PPC_BOOK3E) && defined(CONFIG_SMP) |
| 103 | static void setup_tlb_core_data(void) |
| 104 | { |
| 105 | int cpu; |
| 106 | |
| 107 | BUILD_BUG_ON(offsetof(struct tlb_core_data, lock) != 0); |
| 108 | |
| 109 | for_each_possible_cpu(cpu) { |
| 110 | int first = cpu_first_thread_sibling(cpu); |
| 111 | |
| 112 | /* |
| 113 | * If we boot via kdump on a non-primary thread, |
| 114 | * make sure we point at the thread that actually |
| 115 | * set up this TLB. |
| 116 | */ |
| 117 | if (cpu_first_thread_sibling(boot_cpuid) == first) |
| 118 | first = boot_cpuid; |
| 119 | |
| 120 | paca[cpu].tcd_ptr = &paca[first].tcd; |
| 121 | |
| 122 | /* |
| 123 | * If we have threads, we need either tlbsrx. |
| 124 | * or e6500 tablewalk mode, or else TLB handlers |
| 125 | * will be racy and could produce duplicate entries. |
| 126 | */ |
| 127 | if (smt_enabled_at_boot >= 2 && |
| 128 | !mmu_has_feature(MMU_FTR_USE_TLBRSRV) && |
| 129 | book3e_htw_mode != PPC_HTW_E6500) { |
| 130 | /* Should we panic instead? */ |
| 131 | WARN_ONCE("%s: unsupported MMU configuration -- expect problems\n", |
| 132 | __func__); |
| 133 | } |
| 134 | } |
| 135 | } |
| 136 | #else |
| 137 | static void setup_tlb_core_data(void) |
| 138 | { |
| 139 | } |
| 140 | #endif |
| 141 | |
| 142 | #ifdef CONFIG_SMP |
| 143 | |
| 144 | static char *smt_enabled_cmdline; |
| 145 | |
| 146 | /* Look for ibm,smt-enabled OF option */ |
| 147 | static void check_smt_enabled(void) |
| 148 | { |
| 149 | struct device_node *dn; |
| 150 | const char *smt_option; |
| 151 | |
| 152 | /* Default to enabling all threads */ |
| 153 | smt_enabled_at_boot = threads_per_core; |
| 154 | |
| 155 | /* Allow the command line to overrule the OF option */ |
| 156 | if (smt_enabled_cmdline) { |
| 157 | if (!strcmp(smt_enabled_cmdline, "on")) |
| 158 | smt_enabled_at_boot = threads_per_core; |
| 159 | else if (!strcmp(smt_enabled_cmdline, "off")) |
| 160 | smt_enabled_at_boot = 0; |
| 161 | else { |
| 162 | int smt; |
| 163 | int rc; |
| 164 | |
| 165 | rc = kstrtoint(smt_enabled_cmdline, 10, &smt); |
| 166 | if (!rc) |
| 167 | smt_enabled_at_boot = |
| 168 | min(threads_per_core, smt); |
| 169 | } |
| 170 | } else { |
| 171 | dn = of_find_node_by_path("/options"); |
| 172 | if (dn) { |
| 173 | smt_option = of_get_property(dn, "ibm,smt-enabled", |
| 174 | NULL); |
| 175 | |
| 176 | if (smt_option) { |
| 177 | if (!strcmp(smt_option, "on")) |
| 178 | smt_enabled_at_boot = threads_per_core; |
| 179 | else if (!strcmp(smt_option, "off")) |
| 180 | smt_enabled_at_boot = 0; |
| 181 | } |
| 182 | |
| 183 | of_node_put(dn); |
| 184 | } |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | /* Look for smt-enabled= cmdline option */ |
| 189 | static int __init early_smt_enabled(char *p) |
| 190 | { |
| 191 | smt_enabled_cmdline = p; |
| 192 | return 0; |
| 193 | } |
| 194 | early_param("smt-enabled", early_smt_enabled); |
| 195 | |
| 196 | #else |
| 197 | #define check_smt_enabled() |
| 198 | #endif /* CONFIG_SMP */ |
| 199 | |
| 200 | /** Fix up paca fields required for the boot cpu */ |
| 201 | static void fixup_boot_paca(void) |
| 202 | { |
| 203 | /* The boot cpu is started */ |
| 204 | get_paca()->cpu_start = 1; |
| 205 | /* Allow percpu accesses to work until we setup percpu data */ |
| 206 | get_paca()->data_offset = 0; |
| 207 | } |
| 208 | |
| 209 | static void configure_exceptions(void) |
| 210 | { |
| 211 | /* |
| 212 | * Setup the trampolines from the lowmem exception vectors |
| 213 | * to the kdump kernel when not using a relocatable kernel. |
| 214 | */ |
| 215 | setup_kdump_trampoline(); |
| 216 | |
| 217 | /* Under a PAPR hypervisor, we need hypercalls */ |
| 218 | if (firmware_has_feature(FW_FEATURE_SET_MODE)) { |
| 219 | /* Enable AIL if possible */ |
| 220 | pseries_enable_reloc_on_exc(); |
| 221 | |
| 222 | /* |
| 223 | * Tell the hypervisor that we want our exceptions to |
| 224 | * be taken in little endian mode. |
| 225 | * |
| 226 | * We don't call this for big endian as our calling convention |
| 227 | * makes us always enter in BE, and the call may fail under |
| 228 | * some circumstances with kdump. |
| 229 | */ |
| 230 | #ifdef __LITTLE_ENDIAN__ |
| 231 | pseries_little_endian_exceptions(); |
| 232 | #endif |
| 233 | } else { |
| 234 | /* Set endian mode using OPAL */ |
| 235 | if (firmware_has_feature(FW_FEATURE_OPAL)) |
| 236 | opal_configure_cores(); |
| 237 | |
| 238 | /* Enable AIL if supported, and we are in hypervisor mode */ |
| 239 | if (cpu_has_feature(CPU_FTR_HVMODE) && |
| 240 | cpu_has_feature(CPU_FTR_ARCH_207S)) { |
| 241 | unsigned long lpcr = mfspr(SPRN_LPCR); |
| 242 | mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3); |
| 243 | } |
| 244 | } |
| 245 | } |
| 246 | |
| 247 | static void cpu_ready_for_interrupts(void) |
| 248 | { |
| 249 | /* Set IR and DR in PACA MSR */ |
| 250 | get_paca()->kernel_msr = MSR_KERNEL; |
| 251 | } |
| 252 | |
| 253 | /* |
| 254 | * Early initialization entry point. This is called by head.S |
| 255 | * with MMU translation disabled. We rely on the "feature" of |
| 256 | * the CPU that ignores the top 2 bits of the address in real |
| 257 | * mode so we can access kernel globals normally provided we |
| 258 | * only toy with things in the RMO region. From here, we do |
| 259 | * some early parsing of the device-tree to setup out MEMBLOCK |
| 260 | * data structures, and allocate & initialize the hash table |
| 261 | * and segment tables so we can start running with translation |
| 262 | * enabled. |
| 263 | * |
| 264 | * It is this function which will call the probe() callback of |
| 265 | * the various platform types and copy the matching one to the |
| 266 | * global ppc_md structure. Your platform can eventually do |
| 267 | * some very early initializations from the probe() routine, but |
| 268 | * this is not recommended, be very careful as, for example, the |
| 269 | * device-tree is not accessible via normal means at this point. |
| 270 | */ |
| 271 | |
| 272 | void __init early_setup(unsigned long dt_ptr) |
| 273 | { |
| 274 | static __initdata struct paca_struct boot_paca; |
| 275 | |
| 276 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
| 277 | |
| 278 | /* Identify CPU type */ |
| 279 | identify_cpu(0, mfspr(SPRN_PVR)); |
| 280 | |
| 281 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
| 282 | initialise_paca(&boot_paca, 0); |
| 283 | setup_paca(&boot_paca); |
| 284 | fixup_boot_paca(); |
| 285 | |
| 286 | /* -------- printk is now safe to use ------- */ |
| 287 | |
| 288 | /* Enable early debugging if any specified (see udbg.h) */ |
| 289 | udbg_early_init(); |
| 290 | |
| 291 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
| 292 | |
| 293 | /* |
| 294 | * Do early initialization using the flattened device |
| 295 | * tree, such as retrieving the physical memory map or |
| 296 | * calculating/retrieving the hash table size. |
| 297 | */ |
| 298 | early_init_devtree(__va(dt_ptr)); |
| 299 | |
| 300 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
| 301 | setup_paca(&paca[boot_cpuid]); |
| 302 | fixup_boot_paca(); |
| 303 | |
| 304 | /* |
| 305 | * Configure exception handlers. This include setting up trampolines |
| 306 | * if needed, setting exception endian mode, etc... |
| 307 | */ |
| 308 | configure_exceptions(); |
| 309 | |
| 310 | /* Initialize the hash table or TLB handling */ |
| 311 | early_init_mmu(); |
| 312 | |
| 313 | /* Apply all the dynamic patching */ |
| 314 | apply_feature_fixups(); |
| 315 | |
| 316 | /* |
| 317 | * At this point, we can let interrupts switch to virtual mode |
| 318 | * (the MMU has been setup), so adjust the MSR in the PACA to |
| 319 | * have IR and DR set and enable AIL if it exists |
| 320 | */ |
| 321 | cpu_ready_for_interrupts(); |
| 322 | |
| 323 | DBG(" <- early_setup()\n"); |
| 324 | |
| 325 | #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX |
| 326 | /* |
| 327 | * This needs to be done *last* (after the above DBG() even) |
| 328 | * |
| 329 | * Right after we return from this function, we turn on the MMU |
| 330 | * which means the real-mode access trick that btext does will |
| 331 | * no longer work, it needs to switch to using a real MMU |
| 332 | * mapping. This call will ensure that it does |
| 333 | */ |
| 334 | btext_map(); |
| 335 | #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */ |
| 336 | } |
| 337 | |
| 338 | #ifdef CONFIG_SMP |
| 339 | void early_setup_secondary(void) |
| 340 | { |
| 341 | /* Mark interrupts disabled in PACA */ |
| 342 | get_paca()->soft_enabled = 0; |
| 343 | |
| 344 | /* Initialize the hash table or TLB handling */ |
| 345 | early_init_mmu_secondary(); |
| 346 | |
| 347 | /* |
| 348 | * At this point, we can let interrupts switch to virtual mode |
| 349 | * (the MMU has been setup), so adjust the MSR in the PACA to |
| 350 | * have IR and DR set. |
| 351 | */ |
| 352 | cpu_ready_for_interrupts(); |
| 353 | } |
| 354 | |
| 355 | #endif /* CONFIG_SMP */ |
| 356 | |
| 357 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
| 358 | static bool use_spinloop(void) |
| 359 | { |
| 360 | if (!IS_ENABLED(CONFIG_PPC_BOOK3E)) |
| 361 | return true; |
| 362 | |
| 363 | /* |
| 364 | * When book3e boots from kexec, the ePAPR spin table does |
| 365 | * not get used. |
| 366 | */ |
| 367 | return of_property_read_bool(of_chosen, "linux,booted-from-kexec"); |
| 368 | } |
| 369 | |
| 370 | void smp_release_cpus(void) |
| 371 | { |
| 372 | unsigned long *ptr; |
| 373 | int i; |
| 374 | |
| 375 | if (!use_spinloop()) |
| 376 | return; |
| 377 | |
| 378 | DBG(" -> smp_release_cpus()\n"); |
| 379 | |
| 380 | /* All secondary cpus are spinning on a common spinloop, release them |
| 381 | * all now so they can start to spin on their individual paca |
| 382 | * spinloops. For non SMP kernels, the secondary cpus never get out |
| 383 | * of the common spinloop. |
| 384 | */ |
| 385 | |
| 386 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
| 387 | - PHYSICAL_START); |
| 388 | *ptr = ppc_function_entry(generic_secondary_smp_init); |
| 389 | |
| 390 | /* And wait a bit for them to catch up */ |
| 391 | for (i = 0; i < 100000; i++) { |
| 392 | mb(); |
| 393 | HMT_low(); |
| 394 | if (spinning_secondaries == 0) |
| 395 | break; |
| 396 | udelay(1); |
| 397 | } |
| 398 | DBG("spinning_secondaries = %d\n", spinning_secondaries); |
| 399 | |
| 400 | DBG(" <- smp_release_cpus()\n"); |
| 401 | } |
| 402 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ |
| 403 | |
| 404 | /* |
| 405 | * Initialize some remaining members of the ppc64_caches and systemcfg |
| 406 | * structures |
| 407 | * (at least until we get rid of them completely). This is mostly some |
| 408 | * cache informations about the CPU that will be used by cache flush |
| 409 | * routines and/or provided to userland |
| 410 | */ |
| 411 | static void __init initialize_cache_info(void) |
| 412 | { |
| 413 | struct device_node *np; |
| 414 | unsigned long num_cpus = 0; |
| 415 | |
| 416 | DBG(" -> initialize_cache_info()\n"); |
| 417 | |
| 418 | for_each_node_by_type(np, "cpu") { |
| 419 | num_cpus += 1; |
| 420 | |
| 421 | /* |
| 422 | * We're assuming *all* of the CPUs have the same |
| 423 | * d-cache and i-cache sizes... -Peter |
| 424 | */ |
| 425 | if (num_cpus == 1) { |
| 426 | const __be32 *sizep, *lsizep; |
| 427 | u32 size, lsize; |
| 428 | |
| 429 | size = 0; |
| 430 | lsize = cur_cpu_spec->dcache_bsize; |
| 431 | sizep = of_get_property(np, "d-cache-size", NULL); |
| 432 | if (sizep != NULL) |
| 433 | size = be32_to_cpu(*sizep); |
| 434 | lsizep = of_get_property(np, "d-cache-block-size", |
| 435 | NULL); |
| 436 | /* fallback if block size missing */ |
| 437 | if (lsizep == NULL) |
| 438 | lsizep = of_get_property(np, |
| 439 | "d-cache-line-size", |
| 440 | NULL); |
| 441 | if (lsizep != NULL) |
| 442 | lsize = be32_to_cpu(*lsizep); |
| 443 | if (sizep == NULL || lsizep == NULL) |
| 444 | DBG("Argh, can't find dcache properties ! " |
| 445 | "sizep: %p, lsizep: %p\n", sizep, lsizep); |
| 446 | |
| 447 | ppc64_caches.dsize = size; |
| 448 | ppc64_caches.dline_size = lsize; |
| 449 | ppc64_caches.log_dline_size = __ilog2(lsize); |
| 450 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; |
| 451 | |
| 452 | size = 0; |
| 453 | lsize = cur_cpu_spec->icache_bsize; |
| 454 | sizep = of_get_property(np, "i-cache-size", NULL); |
| 455 | if (sizep != NULL) |
| 456 | size = be32_to_cpu(*sizep); |
| 457 | lsizep = of_get_property(np, "i-cache-block-size", |
| 458 | NULL); |
| 459 | if (lsizep == NULL) |
| 460 | lsizep = of_get_property(np, |
| 461 | "i-cache-line-size", |
| 462 | NULL); |
| 463 | if (lsizep != NULL) |
| 464 | lsize = be32_to_cpu(*lsizep); |
| 465 | if (sizep == NULL || lsizep == NULL) |
| 466 | DBG("Argh, can't find icache properties ! " |
| 467 | "sizep: %p, lsizep: %p\n", sizep, lsizep); |
| 468 | |
| 469 | ppc64_caches.isize = size; |
| 470 | ppc64_caches.iline_size = lsize; |
| 471 | ppc64_caches.log_iline_size = __ilog2(lsize); |
| 472 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; |
| 473 | } |
| 474 | } |
| 475 | |
| 476 | DBG(" <- initialize_cache_info()\n"); |
| 477 | } |
| 478 | |
| 479 | static __init void print_system_info(void) |
| 480 | { |
| 481 | pr_info("-----------------------------------------------------\n"); |
| 482 | pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
| 483 | pr_info("phys_mem_size = 0x%llx\n", memblock_phys_mem_size()); |
| 484 | |
| 485 | if (ppc64_caches.dline_size != 0x80) |
| 486 | pr_info("dcache_line_size = 0x%x\n", ppc64_caches.dline_size); |
| 487 | if (ppc64_caches.iline_size != 0x80) |
| 488 | pr_info("icache_line_size = 0x%x\n", ppc64_caches.iline_size); |
| 489 | |
| 490 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); |
| 491 | pr_info(" possible = 0x%016lx\n", CPU_FTRS_POSSIBLE); |
| 492 | pr_info(" always = 0x%016lx\n", CPU_FTRS_ALWAYS); |
| 493 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", cur_cpu_spec->cpu_user_features, |
| 494 | cur_cpu_spec->cpu_user_features2); |
| 495 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); |
| 496 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); |
| 497 | |
| 498 | #ifdef CONFIG_PPC_STD_MMU_64 |
| 499 | if (htab_address) |
| 500 | pr_info("htab_address = 0x%p\n", htab_address); |
| 501 | |
| 502 | pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
| 503 | #endif |
| 504 | |
| 505 | if (PHYSICAL_START > 0) |
| 506 | pr_info("physical_start = 0x%llx\n", |
| 507 | (unsigned long long)PHYSICAL_START); |
| 508 | pr_info("-----------------------------------------------------\n"); |
| 509 | } |
| 510 | |
| 511 | /* |
| 512 | * Do some initial setup of the system. The parameters are those which |
| 513 | * were passed in from the bootloader. |
| 514 | */ |
| 515 | void __init setup_system(void) |
| 516 | { |
| 517 | DBG(" -> setup_system()\n"); |
| 518 | |
| 519 | /* |
| 520 | * Unflatten the device-tree passed by prom_init or kexec |
| 521 | */ |
| 522 | unflatten_device_tree(); |
| 523 | |
| 524 | /* |
| 525 | * Fill the ppc64_caches & systemcfg structures with informations |
| 526 | * retrieved from the device-tree. |
| 527 | */ |
| 528 | initialize_cache_info(); |
| 529 | |
| 530 | #ifdef CONFIG_PPC_RTAS |
| 531 | /* |
| 532 | * Initialize RTAS if available |
| 533 | */ |
| 534 | rtas_initialize(); |
| 535 | #endif /* CONFIG_PPC_RTAS */ |
| 536 | |
| 537 | /* |
| 538 | * Check if we have an initrd provided via the device-tree |
| 539 | */ |
| 540 | check_for_initrd(); |
| 541 | |
| 542 | /* Probe the machine type */ |
| 543 | probe_machine(); |
| 544 | |
| 545 | /* |
| 546 | * We can discover serial ports now since the above did setup the |
| 547 | * hash table management for us, thus ioremap works. We do that early |
| 548 | * so that further code can be debugged |
| 549 | */ |
| 550 | find_legacy_serial_ports(); |
| 551 | |
| 552 | /* |
| 553 | * Register early console |
| 554 | */ |
| 555 | register_early_udbg_console(); |
| 556 | |
| 557 | /* |
| 558 | * Initialize xmon |
| 559 | */ |
| 560 | xmon_setup(); |
| 561 | |
| 562 | smp_setup_cpu_maps(); |
| 563 | check_smt_enabled(); |
| 564 | setup_tlb_core_data(); |
| 565 | |
| 566 | /* |
| 567 | * Freescale Book3e parts spin in a loop provided by firmware, |
| 568 | * so smp_release_cpus() does nothing for them |
| 569 | */ |
| 570 | #if defined(CONFIG_SMP) |
| 571 | /* Release secondary cpus out of their spinloops at 0x60 now that |
| 572 | * we can map physical -> logical CPU ids |
| 573 | */ |
| 574 | smp_release_cpus(); |
| 575 | #endif |
| 576 | |
| 577 | /* Print various info about the machine that has been gathered so far. */ |
| 578 | print_system_info(); |
| 579 | |
| 580 | DBG(" <- setup_system()\n"); |
| 581 | } |
| 582 | |
| 583 | /* This returns the limit below which memory accesses to the linear |
| 584 | * mapping are guarnateed not to cause a TLB or SLB miss. This is |
| 585 | * used to allocate interrupt or emergency stacks for which our |
| 586 | * exception entry path doesn't deal with being interrupted. |
| 587 | */ |
| 588 | static u64 safe_stack_limit(void) |
| 589 | { |
| 590 | #ifdef CONFIG_PPC_BOOK3E |
| 591 | /* Freescale BookE bolts the entire linear mapping */ |
| 592 | if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) |
| 593 | return linear_map_top; |
| 594 | /* Other BookE, we assume the first GB is bolted */ |
| 595 | return 1ul << 30; |
| 596 | #else |
| 597 | /* BookS, the first segment is bolted */ |
| 598 | if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) |
| 599 | return 1UL << SID_SHIFT_1T; |
| 600 | return 1UL << SID_SHIFT; |
| 601 | #endif |
| 602 | } |
| 603 | |
| 604 | static void __init irqstack_early_init(void) |
| 605 | { |
| 606 | u64 limit = safe_stack_limit(); |
| 607 | unsigned int i; |
| 608 | |
| 609 | /* |
| 610 | * Interrupt stacks must be in the first segment since we |
| 611 | * cannot afford to take SLB misses on them. |
| 612 | */ |
| 613 | for_each_possible_cpu(i) { |
| 614 | softirq_ctx[i] = (struct thread_info *) |
| 615 | __va(memblock_alloc_base(THREAD_SIZE, |
| 616 | THREAD_SIZE, limit)); |
| 617 | hardirq_ctx[i] = (struct thread_info *) |
| 618 | __va(memblock_alloc_base(THREAD_SIZE, |
| 619 | THREAD_SIZE, limit)); |
| 620 | } |
| 621 | } |
| 622 | |
| 623 | #ifdef CONFIG_PPC_BOOK3E |
| 624 | static void __init exc_lvl_early_init(void) |
| 625 | { |
| 626 | unsigned int i; |
| 627 | unsigned long sp; |
| 628 | |
| 629 | for_each_possible_cpu(i) { |
| 630 | sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE); |
| 631 | critirq_ctx[i] = (struct thread_info *)__va(sp); |
| 632 | paca[i].crit_kstack = __va(sp + THREAD_SIZE); |
| 633 | |
| 634 | sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE); |
| 635 | dbgirq_ctx[i] = (struct thread_info *)__va(sp); |
| 636 | paca[i].dbg_kstack = __va(sp + THREAD_SIZE); |
| 637 | |
| 638 | sp = memblock_alloc(THREAD_SIZE, THREAD_SIZE); |
| 639 | mcheckirq_ctx[i] = (struct thread_info *)__va(sp); |
| 640 | paca[i].mc_kstack = __va(sp + THREAD_SIZE); |
| 641 | } |
| 642 | |
| 643 | if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) |
| 644 | patch_exception(0x040, exc_debug_debug_book3e); |
| 645 | } |
| 646 | #else |
| 647 | #define exc_lvl_early_init() |
| 648 | #endif |
| 649 | |
| 650 | /* |
| 651 | * Stack space used when we detect a bad kernel stack pointer, and |
| 652 | * early in SMP boots before relocation is enabled. Exclusive emergency |
| 653 | * stack for machine checks. |
| 654 | */ |
| 655 | static void __init emergency_stack_init(void) |
| 656 | { |
| 657 | u64 limit; |
| 658 | unsigned int i; |
| 659 | |
| 660 | /* |
| 661 | * Emergency stacks must be under 256MB, we cannot afford to take |
| 662 | * SLB misses on them. The ABI also requires them to be 128-byte |
| 663 | * aligned. |
| 664 | * |
| 665 | * Since we use these as temporary stacks during secondary CPU |
| 666 | * bringup, we need to get at them in real mode. This means they |
| 667 | * must also be within the RMO region. |
| 668 | */ |
| 669 | limit = min(safe_stack_limit(), ppc64_rma_size); |
| 670 | |
| 671 | for_each_possible_cpu(i) { |
| 672 | struct thread_info *ti; |
| 673 | ti = __va(memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit)); |
| 674 | klp_init_thread_info(ti); |
| 675 | paca[i].emergency_sp = (void *)ti + THREAD_SIZE; |
| 676 | |
| 677 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 678 | /* emergency stack for machine check exception handling. */ |
| 679 | ti = __va(memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit)); |
| 680 | klp_init_thread_info(ti); |
| 681 | paca[i].mc_emergency_sp = (void *)ti + THREAD_SIZE; |
| 682 | #endif |
| 683 | } |
| 684 | } |
| 685 | |
| 686 | /* |
| 687 | * Called into from start_kernel this initializes memblock, which is used |
| 688 | * to manage page allocation until mem_init is called. |
| 689 | */ |
| 690 | void __init setup_arch(char **cmdline_p) |
| 691 | { |
| 692 | *cmdline_p = boot_command_line; |
| 693 | |
| 694 | /* |
| 695 | * Set cache line size based on type of cpu as a default. |
| 696 | * Systems with OF can look in the properties on the cpu node(s) |
| 697 | * for a possibly more accurate value. |
| 698 | */ |
| 699 | dcache_bsize = ppc64_caches.dline_size; |
| 700 | icache_bsize = ppc64_caches.iline_size; |
| 701 | |
| 702 | |
| 703 | /* Reserve large chunks of memory for use by CMA for KVM */ |
| 704 | kvm_cma_reserve(); |
| 705 | |
| 706 | /* |
| 707 | * Reserve any gigantic pages requested on the command line. |
| 708 | * memblock needs to have been initialized by the time this is |
| 709 | * called since this will reserve memory. |
| 710 | */ |
| 711 | reserve_hugetlb_gpages(); |
| 712 | |
| 713 | if (ppc_md.panic) |
| 714 | setup_panic(); |
| 715 | |
| 716 | klp_init_thread_info(&init_thread_info); |
| 717 | |
| 718 | init_mm.start_code = (unsigned long)_stext; |
| 719 | init_mm.end_code = (unsigned long) _etext; |
| 720 | init_mm.end_data = (unsigned long) _edata; |
| 721 | init_mm.brk = klimit; |
| 722 | #ifdef CONFIG_PPC_64K_PAGES |
| 723 | init_mm.context.pte_frag = NULL; |
| 724 | #endif |
| 725 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
| 726 | mm_iommu_init(&init_mm.context); |
| 727 | #endif |
| 728 | irqstack_early_init(); |
| 729 | exc_lvl_early_init(); |
| 730 | emergency_stack_init(); |
| 731 | |
| 732 | initmem_init(); |
| 733 | |
| 734 | #ifdef CONFIG_DUMMY_CONSOLE |
| 735 | conswitchp = &dummy_con; |
| 736 | #endif |
| 737 | if (ppc_md.setup_arch) |
| 738 | ppc_md.setup_arch(); |
| 739 | |
| 740 | paging_init(); |
| 741 | |
| 742 | /* Initialize the MMU context management stuff */ |
| 743 | mmu_context_init(); |
| 744 | |
| 745 | /* Interrupt code needs to be 64K-aligned */ |
| 746 | if ((unsigned long)_stext & 0xffff) |
| 747 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", |
| 748 | (unsigned long)_stext); |
| 749 | } |
| 750 | |
| 751 | #ifdef CONFIG_SMP |
| 752 | #define PCPU_DYN_SIZE () |
| 753 | |
| 754 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) |
| 755 | { |
| 756 | return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, |
| 757 | __pa(MAX_DMA_ADDRESS)); |
| 758 | } |
| 759 | |
| 760 | static void __init pcpu_fc_free(void *ptr, size_t size) |
| 761 | { |
| 762 | free_bootmem(__pa(ptr), size); |
| 763 | } |
| 764 | |
| 765 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
| 766 | { |
| 767 | if (cpu_to_node(from) == cpu_to_node(to)) |
| 768 | return LOCAL_DISTANCE; |
| 769 | else |
| 770 | return REMOTE_DISTANCE; |
| 771 | } |
| 772 | |
| 773 | unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; |
| 774 | EXPORT_SYMBOL(__per_cpu_offset); |
| 775 | |
| 776 | void __init setup_per_cpu_areas(void) |
| 777 | { |
| 778 | const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; |
| 779 | size_t atom_size; |
| 780 | unsigned long delta; |
| 781 | unsigned int cpu; |
| 782 | int rc; |
| 783 | |
| 784 | /* |
| 785 | * Linear mapping is one of 4K, 1M and 16M. For 4K, no need |
| 786 | * to group units. For larger mappings, use 1M atom which |
| 787 | * should be large enough to contain a number of units. |
| 788 | */ |
| 789 | if (mmu_linear_psize == MMU_PAGE_4K) |
| 790 | atom_size = PAGE_SIZE; |
| 791 | else |
| 792 | atom_size = 1 << 20; |
| 793 | |
| 794 | rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, |
| 795 | pcpu_fc_alloc, pcpu_fc_free); |
| 796 | if (rc < 0) |
| 797 | panic("cannot initialize percpu area (err=%d)", rc); |
| 798 | |
| 799 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; |
| 800 | for_each_possible_cpu(cpu) { |
| 801 | __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; |
| 802 | paca[cpu].data_offset = __per_cpu_offset[cpu]; |
| 803 | } |
| 804 | } |
| 805 | #endif |
| 806 | |
| 807 | #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE |
| 808 | unsigned long memory_block_size_bytes(void) |
| 809 | { |
| 810 | if (ppc_md.memory_block_size) |
| 811 | return ppc_md.memory_block_size(); |
| 812 | |
| 813 | return MIN_MEMORY_BLOCK_SIZE; |
| 814 | } |
| 815 | #endif |
| 816 | |
| 817 | #if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO) |
| 818 | struct ppc_pci_io ppc_pci_io; |
| 819 | EXPORT_SYMBOL(ppc_pci_io); |
| 820 | #endif |
| 821 | |
| 822 | #ifdef CONFIG_HARDLOCKUP_DETECTOR |
| 823 | u64 hw_nmi_get_sample_period(int watchdog_thresh) |
| 824 | { |
| 825 | return ppc_proc_freq * watchdog_thresh; |
| 826 | } |
| 827 | |
| 828 | /* |
| 829 | * The hardlockup detector breaks PMU event based branches and is likely |
| 830 | * to get false positives in KVM guests, so disable it by default. |
| 831 | */ |
| 832 | static int __init disable_hardlockup_detector(void) |
| 833 | { |
| 834 | hardlockup_detector_disable(); |
| 835 | |
| 836 | return 0; |
| 837 | } |
| 838 | early_initcall(disable_hardlockup_detector); |
| 839 | #endif |