| 1 | /* |
| 2 | * |
| 3 | * Common boot and setup code. |
| 4 | * |
| 5 | * Copyright (C) 2001 PPC64 Team, IBM Corp |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #define DEBUG |
| 14 | |
| 15 | #include <linux/export.h> |
| 16 | #include <linux/string.h> |
| 17 | #include <linux/sched.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/reboot.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/initrd.h> |
| 23 | #include <linux/seq_file.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/console.h> |
| 26 | #include <linux/utsname.h> |
| 27 | #include <linux/tty.h> |
| 28 | #include <linux/root_dev.h> |
| 29 | #include <linux/notifier.h> |
| 30 | #include <linux/cpu.h> |
| 31 | #include <linux/unistd.h> |
| 32 | #include <linux/serial.h> |
| 33 | #include <linux/serial_8250.h> |
| 34 | #include <linux/bootmem.h> |
| 35 | #include <linux/pci.h> |
| 36 | #include <linux/lockdep.h> |
| 37 | #include <linux/memblock.h> |
| 38 | #include <linux/hugetlb.h> |
| 39 | |
| 40 | #include <asm/io.h> |
| 41 | #include <asm/kdump.h> |
| 42 | #include <asm/prom.h> |
| 43 | #include <asm/processor.h> |
| 44 | #include <asm/pgtable.h> |
| 45 | #include <asm/smp.h> |
| 46 | #include <asm/elf.h> |
| 47 | #include <asm/machdep.h> |
| 48 | #include <asm/paca.h> |
| 49 | #include <asm/time.h> |
| 50 | #include <asm/cputable.h> |
| 51 | #include <asm/sections.h> |
| 52 | #include <asm/btext.h> |
| 53 | #include <asm/nvram.h> |
| 54 | #include <asm/setup.h> |
| 55 | #include <asm/rtas.h> |
| 56 | #include <asm/iommu.h> |
| 57 | #include <asm/serial.h> |
| 58 | #include <asm/cache.h> |
| 59 | #include <asm/page.h> |
| 60 | #include <asm/mmu.h> |
| 61 | #include <asm/firmware.h> |
| 62 | #include <asm/xmon.h> |
| 63 | #include <asm/udbg.h> |
| 64 | #include <asm/kexec.h> |
| 65 | #include <asm/mmu_context.h> |
| 66 | #include <asm/code-patching.h> |
| 67 | #include <asm/kvm_ppc.h> |
| 68 | #include <asm/hugetlb.h> |
| 69 | #include <asm/epapr_hcalls.h> |
| 70 | |
| 71 | #include "setup.h" |
| 72 | |
| 73 | #ifdef DEBUG |
| 74 | #define DBG(fmt...) udbg_printf(fmt) |
| 75 | #else |
| 76 | #define DBG(fmt...) |
| 77 | #endif |
| 78 | |
| 79 | int boot_cpuid = 0; |
| 80 | int spinning_secondaries; |
| 81 | u64 ppc64_pft_size; |
| 82 | |
| 83 | /* Pick defaults since we might want to patch instructions |
| 84 | * before we've read this from the device tree. |
| 85 | */ |
| 86 | struct ppc64_caches ppc64_caches = { |
| 87 | .dline_size = 0x40, |
| 88 | .log_dline_size = 6, |
| 89 | .iline_size = 0x40, |
| 90 | .log_iline_size = 6 |
| 91 | }; |
| 92 | EXPORT_SYMBOL_GPL(ppc64_caches); |
| 93 | |
| 94 | /* |
| 95 | * These are used in binfmt_elf.c to put aux entries on the stack |
| 96 | * for each elf executable being started. |
| 97 | */ |
| 98 | int dcache_bsize; |
| 99 | int icache_bsize; |
| 100 | int ucache_bsize; |
| 101 | |
| 102 | #ifdef CONFIG_SMP |
| 103 | |
| 104 | static char *smt_enabled_cmdline; |
| 105 | |
| 106 | /* Look for ibm,smt-enabled OF option */ |
| 107 | static void check_smt_enabled(void) |
| 108 | { |
| 109 | struct device_node *dn; |
| 110 | const char *smt_option; |
| 111 | |
| 112 | /* Default to enabling all threads */ |
| 113 | smt_enabled_at_boot = threads_per_core; |
| 114 | |
| 115 | /* Allow the command line to overrule the OF option */ |
| 116 | if (smt_enabled_cmdline) { |
| 117 | if (!strcmp(smt_enabled_cmdline, "on")) |
| 118 | smt_enabled_at_boot = threads_per_core; |
| 119 | else if (!strcmp(smt_enabled_cmdline, "off")) |
| 120 | smt_enabled_at_boot = 0; |
| 121 | else { |
| 122 | long smt; |
| 123 | int rc; |
| 124 | |
| 125 | rc = strict_strtol(smt_enabled_cmdline, 10, &smt); |
| 126 | if (!rc) |
| 127 | smt_enabled_at_boot = |
| 128 | min(threads_per_core, (int)smt); |
| 129 | } |
| 130 | } else { |
| 131 | dn = of_find_node_by_path("/options"); |
| 132 | if (dn) { |
| 133 | smt_option = of_get_property(dn, "ibm,smt-enabled", |
| 134 | NULL); |
| 135 | |
| 136 | if (smt_option) { |
| 137 | if (!strcmp(smt_option, "on")) |
| 138 | smt_enabled_at_boot = threads_per_core; |
| 139 | else if (!strcmp(smt_option, "off")) |
| 140 | smt_enabled_at_boot = 0; |
| 141 | } |
| 142 | |
| 143 | of_node_put(dn); |
| 144 | } |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | /* Look for smt-enabled= cmdline option */ |
| 149 | static int __init early_smt_enabled(char *p) |
| 150 | { |
| 151 | smt_enabled_cmdline = p; |
| 152 | return 0; |
| 153 | } |
| 154 | early_param("smt-enabled", early_smt_enabled); |
| 155 | |
| 156 | #else |
| 157 | #define check_smt_enabled() |
| 158 | #endif /* CONFIG_SMP */ |
| 159 | |
| 160 | /** Fix up paca fields required for the boot cpu */ |
| 161 | static void fixup_boot_paca(void) |
| 162 | { |
| 163 | /* The boot cpu is started */ |
| 164 | get_paca()->cpu_start = 1; |
| 165 | /* Allow percpu accesses to work until we setup percpu data */ |
| 166 | get_paca()->data_offset = 0; |
| 167 | } |
| 168 | |
| 169 | /* |
| 170 | * Early initialization entry point. This is called by head.S |
| 171 | * with MMU translation disabled. We rely on the "feature" of |
| 172 | * the CPU that ignores the top 2 bits of the address in real |
| 173 | * mode so we can access kernel globals normally provided we |
| 174 | * only toy with things in the RMO region. From here, we do |
| 175 | * some early parsing of the device-tree to setup out MEMBLOCK |
| 176 | * data structures, and allocate & initialize the hash table |
| 177 | * and segment tables so we can start running with translation |
| 178 | * enabled. |
| 179 | * |
| 180 | * It is this function which will call the probe() callback of |
| 181 | * the various platform types and copy the matching one to the |
| 182 | * global ppc_md structure. Your platform can eventually do |
| 183 | * some very early initializations from the probe() routine, but |
| 184 | * this is not recommended, be very careful as, for example, the |
| 185 | * device-tree is not accessible via normal means at this point. |
| 186 | */ |
| 187 | |
| 188 | void __init early_setup(unsigned long dt_ptr) |
| 189 | { |
| 190 | static __initdata struct paca_struct boot_paca; |
| 191 | |
| 192 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
| 193 | |
| 194 | /* Identify CPU type */ |
| 195 | identify_cpu(0, mfspr(SPRN_PVR)); |
| 196 | |
| 197 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
| 198 | initialise_paca(&boot_paca, 0); |
| 199 | setup_paca(&boot_paca); |
| 200 | fixup_boot_paca(); |
| 201 | |
| 202 | /* Initialize lockdep early or else spinlocks will blow */ |
| 203 | lockdep_init(); |
| 204 | |
| 205 | /* -------- printk is now safe to use ------- */ |
| 206 | |
| 207 | /* Enable early debugging if any specified (see udbg.h) */ |
| 208 | udbg_early_init(); |
| 209 | |
| 210 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
| 211 | |
| 212 | /* |
| 213 | * Do early initialization using the flattened device |
| 214 | * tree, such as retrieving the physical memory map or |
| 215 | * calculating/retrieving the hash table size. |
| 216 | */ |
| 217 | early_init_devtree(__va(dt_ptr)); |
| 218 | |
| 219 | epapr_paravirt_early_init(); |
| 220 | |
| 221 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
| 222 | setup_paca(&paca[boot_cpuid]); |
| 223 | fixup_boot_paca(); |
| 224 | |
| 225 | /* Probe the machine type */ |
| 226 | probe_machine(); |
| 227 | |
| 228 | setup_kdump_trampoline(); |
| 229 | |
| 230 | DBG("Found, Initializing memory management...\n"); |
| 231 | |
| 232 | /* Initialize the hash table or TLB handling */ |
| 233 | early_init_mmu(); |
| 234 | |
| 235 | /* |
| 236 | * Reserve any gigantic pages requested on the command line. |
| 237 | * memblock needs to have been initialized by the time this is |
| 238 | * called since this will reserve memory. |
| 239 | */ |
| 240 | reserve_hugetlb_gpages(); |
| 241 | |
| 242 | DBG(" <- early_setup()\n"); |
| 243 | |
| 244 | #ifdef CONFIG_PPC_EARLY_DEBUG_BOOTX |
| 245 | /* |
| 246 | * This needs to be done *last* (after the above DBG() even) |
| 247 | * |
| 248 | * Right after we return from this function, we turn on the MMU |
| 249 | * which means the real-mode access trick that btext does will |
| 250 | * no longer work, it needs to switch to using a real MMU |
| 251 | * mapping. This call will ensure that it does |
| 252 | */ |
| 253 | btext_map(); |
| 254 | #endif /* CONFIG_PPC_EARLY_DEBUG_BOOTX */ |
| 255 | } |
| 256 | |
| 257 | #ifdef CONFIG_SMP |
| 258 | void early_setup_secondary(void) |
| 259 | { |
| 260 | /* Mark interrupts enabled in PACA */ |
| 261 | get_paca()->soft_enabled = 0; |
| 262 | |
| 263 | /* Initialize the hash table or TLB handling */ |
| 264 | early_init_mmu_secondary(); |
| 265 | } |
| 266 | |
| 267 | #endif /* CONFIG_SMP */ |
| 268 | |
| 269 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
| 270 | void smp_release_cpus(void) |
| 271 | { |
| 272 | unsigned long *ptr; |
| 273 | int i; |
| 274 | |
| 275 | DBG(" -> smp_release_cpus()\n"); |
| 276 | |
| 277 | /* All secondary cpus are spinning on a common spinloop, release them |
| 278 | * all now so they can start to spin on their individual paca |
| 279 | * spinloops. For non SMP kernels, the secondary cpus never get out |
| 280 | * of the common spinloop. |
| 281 | */ |
| 282 | |
| 283 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
| 284 | - PHYSICAL_START); |
| 285 | *ptr = __pa(generic_secondary_smp_init); |
| 286 | |
| 287 | /* And wait a bit for them to catch up */ |
| 288 | for (i = 0; i < 100000; i++) { |
| 289 | mb(); |
| 290 | HMT_low(); |
| 291 | if (spinning_secondaries == 0) |
| 292 | break; |
| 293 | udelay(1); |
| 294 | } |
| 295 | DBG("spinning_secondaries = %d\n", spinning_secondaries); |
| 296 | |
| 297 | DBG(" <- smp_release_cpus()\n"); |
| 298 | } |
| 299 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ |
| 300 | |
| 301 | /* |
| 302 | * Initialize some remaining members of the ppc64_caches and systemcfg |
| 303 | * structures |
| 304 | * (at least until we get rid of them completely). This is mostly some |
| 305 | * cache informations about the CPU that will be used by cache flush |
| 306 | * routines and/or provided to userland |
| 307 | */ |
| 308 | static void __init initialize_cache_info(void) |
| 309 | { |
| 310 | struct device_node *np; |
| 311 | unsigned long num_cpus = 0; |
| 312 | |
| 313 | DBG(" -> initialize_cache_info()\n"); |
| 314 | |
| 315 | for_each_node_by_type(np, "cpu") { |
| 316 | num_cpus += 1; |
| 317 | |
| 318 | /* |
| 319 | * We're assuming *all* of the CPUs have the same |
| 320 | * d-cache and i-cache sizes... -Peter |
| 321 | */ |
| 322 | if (num_cpus == 1) { |
| 323 | const u32 *sizep, *lsizep; |
| 324 | u32 size, lsize; |
| 325 | |
| 326 | size = 0; |
| 327 | lsize = cur_cpu_spec->dcache_bsize; |
| 328 | sizep = of_get_property(np, "d-cache-size", NULL); |
| 329 | if (sizep != NULL) |
| 330 | size = *sizep; |
| 331 | lsizep = of_get_property(np, "d-cache-block-size", |
| 332 | NULL); |
| 333 | /* fallback if block size missing */ |
| 334 | if (lsizep == NULL) |
| 335 | lsizep = of_get_property(np, |
| 336 | "d-cache-line-size", |
| 337 | NULL); |
| 338 | if (lsizep != NULL) |
| 339 | lsize = *lsizep; |
| 340 | if (sizep == NULL || lsizep == NULL) |
| 341 | DBG("Argh, can't find dcache properties ! " |
| 342 | "sizep: %p, lsizep: %p\n", sizep, lsizep); |
| 343 | |
| 344 | ppc64_caches.dsize = size; |
| 345 | ppc64_caches.dline_size = lsize; |
| 346 | ppc64_caches.log_dline_size = __ilog2(lsize); |
| 347 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; |
| 348 | |
| 349 | size = 0; |
| 350 | lsize = cur_cpu_spec->icache_bsize; |
| 351 | sizep = of_get_property(np, "i-cache-size", NULL); |
| 352 | if (sizep != NULL) |
| 353 | size = *sizep; |
| 354 | lsizep = of_get_property(np, "i-cache-block-size", |
| 355 | NULL); |
| 356 | if (lsizep == NULL) |
| 357 | lsizep = of_get_property(np, |
| 358 | "i-cache-line-size", |
| 359 | NULL); |
| 360 | if (lsizep != NULL) |
| 361 | lsize = *lsizep; |
| 362 | if (sizep == NULL || lsizep == NULL) |
| 363 | DBG("Argh, can't find icache properties ! " |
| 364 | "sizep: %p, lsizep: %p\n", sizep, lsizep); |
| 365 | |
| 366 | ppc64_caches.isize = size; |
| 367 | ppc64_caches.iline_size = lsize; |
| 368 | ppc64_caches.log_iline_size = __ilog2(lsize); |
| 369 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | DBG(" <- initialize_cache_info()\n"); |
| 374 | } |
| 375 | |
| 376 | |
| 377 | /* |
| 378 | * Do some initial setup of the system. The parameters are those which |
| 379 | * were passed in from the bootloader. |
| 380 | */ |
| 381 | void __init setup_system(void) |
| 382 | { |
| 383 | DBG(" -> setup_system()\n"); |
| 384 | |
| 385 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
| 386 | * text (nop out sections not relevant to this CPU or this firmware) |
| 387 | */ |
| 388 | do_feature_fixups(cur_cpu_spec->cpu_features, |
| 389 | &__start___ftr_fixup, &__stop___ftr_fixup); |
| 390 | do_feature_fixups(cur_cpu_spec->mmu_features, |
| 391 | &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); |
| 392 | do_feature_fixups(powerpc_firmware_features, |
| 393 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); |
| 394 | do_lwsync_fixups(cur_cpu_spec->cpu_features, |
| 395 | &__start___lwsync_fixup, &__stop___lwsync_fixup); |
| 396 | do_final_fixups(); |
| 397 | |
| 398 | /* |
| 399 | * Unflatten the device-tree passed by prom_init or kexec |
| 400 | */ |
| 401 | unflatten_device_tree(); |
| 402 | |
| 403 | /* |
| 404 | * Fill the ppc64_caches & systemcfg structures with informations |
| 405 | * retrieved from the device-tree. |
| 406 | */ |
| 407 | initialize_cache_info(); |
| 408 | |
| 409 | #ifdef CONFIG_PPC_RTAS |
| 410 | /* |
| 411 | * Initialize RTAS if available |
| 412 | */ |
| 413 | rtas_initialize(); |
| 414 | #endif /* CONFIG_PPC_RTAS */ |
| 415 | |
| 416 | /* |
| 417 | * Check if we have an initrd provided via the device-tree |
| 418 | */ |
| 419 | check_for_initrd(); |
| 420 | |
| 421 | /* |
| 422 | * Do some platform specific early initializations, that includes |
| 423 | * setting up the hash table pointers. It also sets up some interrupt-mapping |
| 424 | * related options that will be used by finish_device_tree() |
| 425 | */ |
| 426 | if (ppc_md.init_early) |
| 427 | ppc_md.init_early(); |
| 428 | |
| 429 | /* |
| 430 | * We can discover serial ports now since the above did setup the |
| 431 | * hash table management for us, thus ioremap works. We do that early |
| 432 | * so that further code can be debugged |
| 433 | */ |
| 434 | find_legacy_serial_ports(); |
| 435 | |
| 436 | /* |
| 437 | * Register early console |
| 438 | */ |
| 439 | register_early_udbg_console(); |
| 440 | |
| 441 | /* |
| 442 | * Initialize xmon |
| 443 | */ |
| 444 | xmon_setup(); |
| 445 | |
| 446 | smp_setup_cpu_maps(); |
| 447 | check_smt_enabled(); |
| 448 | |
| 449 | #ifdef CONFIG_SMP |
| 450 | /* Release secondary cpus out of their spinloops at 0x60 now that |
| 451 | * we can map physical -> logical CPU ids |
| 452 | */ |
| 453 | smp_release_cpus(); |
| 454 | #endif |
| 455 | |
| 456 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
| 457 | |
| 458 | printk("-----------------------------------------------------\n"); |
| 459 | printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); |
| 460 | printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size()); |
| 461 | if (ppc64_caches.dline_size != 0x80) |
| 462 | printk("ppc64_caches.dcache_line_size = 0x%x\n", |
| 463 | ppc64_caches.dline_size); |
| 464 | if (ppc64_caches.iline_size != 0x80) |
| 465 | printk("ppc64_caches.icache_line_size = 0x%x\n", |
| 466 | ppc64_caches.iline_size); |
| 467 | #ifdef CONFIG_PPC_STD_MMU_64 |
| 468 | if (htab_address) |
| 469 | printk("htab_address = 0x%p\n", htab_address); |
| 470 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
| 471 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
| 472 | if (PHYSICAL_START > 0) |
| 473 | printk("physical_start = 0x%llx\n", |
| 474 | (unsigned long long)PHYSICAL_START); |
| 475 | printk("-----------------------------------------------------\n"); |
| 476 | |
| 477 | DBG(" <- setup_system()\n"); |
| 478 | } |
| 479 | |
| 480 | /* This returns the limit below which memory accesses to the linear |
| 481 | * mapping are guarnateed not to cause a TLB or SLB miss. This is |
| 482 | * used to allocate interrupt or emergency stacks for which our |
| 483 | * exception entry path doesn't deal with being interrupted. |
| 484 | */ |
| 485 | static u64 safe_stack_limit(void) |
| 486 | { |
| 487 | #ifdef CONFIG_PPC_BOOK3E |
| 488 | /* Freescale BookE bolts the entire linear mapping */ |
| 489 | if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) |
| 490 | return linear_map_top; |
| 491 | /* Other BookE, we assume the first GB is bolted */ |
| 492 | return 1ul << 30; |
| 493 | #else |
| 494 | /* BookS, the first segment is bolted */ |
| 495 | if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) |
| 496 | return 1UL << SID_SHIFT_1T; |
| 497 | return 1UL << SID_SHIFT; |
| 498 | #endif |
| 499 | } |
| 500 | |
| 501 | static void __init irqstack_early_init(void) |
| 502 | { |
| 503 | u64 limit = safe_stack_limit(); |
| 504 | unsigned int i; |
| 505 | |
| 506 | /* |
| 507 | * Interrupt stacks must be in the first segment since we |
| 508 | * cannot afford to take SLB misses on them. |
| 509 | */ |
| 510 | for_each_possible_cpu(i) { |
| 511 | softirq_ctx[i] = (struct thread_info *) |
| 512 | __va(memblock_alloc_base(THREAD_SIZE, |
| 513 | THREAD_SIZE, limit)); |
| 514 | hardirq_ctx[i] = (struct thread_info *) |
| 515 | __va(memblock_alloc_base(THREAD_SIZE, |
| 516 | THREAD_SIZE, limit)); |
| 517 | } |
| 518 | } |
| 519 | |
| 520 | #ifdef CONFIG_PPC_BOOK3E |
| 521 | static void __init exc_lvl_early_init(void) |
| 522 | { |
| 523 | extern unsigned int interrupt_base_book3e; |
| 524 | extern unsigned int exc_debug_debug_book3e; |
| 525 | |
| 526 | unsigned int i; |
| 527 | |
| 528 | for_each_possible_cpu(i) { |
| 529 | critirq_ctx[i] = (struct thread_info *) |
| 530 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
| 531 | dbgirq_ctx[i] = (struct thread_info *) |
| 532 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
| 533 | mcheckirq_ctx[i] = (struct thread_info *) |
| 534 | __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE)); |
| 535 | } |
| 536 | |
| 537 | if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) |
| 538 | patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1, |
| 539 | (unsigned long)&exc_debug_debug_book3e, 0); |
| 540 | } |
| 541 | #else |
| 542 | #define exc_lvl_early_init() |
| 543 | #endif |
| 544 | |
| 545 | /* |
| 546 | * Stack space used when we detect a bad kernel stack pointer, and |
| 547 | * early in SMP boots before relocation is enabled. |
| 548 | */ |
| 549 | static void __init emergency_stack_init(void) |
| 550 | { |
| 551 | u64 limit; |
| 552 | unsigned int i; |
| 553 | |
| 554 | /* |
| 555 | * Emergency stacks must be under 256MB, we cannot afford to take |
| 556 | * SLB misses on them. The ABI also requires them to be 128-byte |
| 557 | * aligned. |
| 558 | * |
| 559 | * Since we use these as temporary stacks during secondary CPU |
| 560 | * bringup, we need to get at them in real mode. This means they |
| 561 | * must also be within the RMO region. |
| 562 | */ |
| 563 | limit = min(safe_stack_limit(), ppc64_rma_size); |
| 564 | |
| 565 | for_each_possible_cpu(i) { |
| 566 | unsigned long sp; |
| 567 | sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); |
| 568 | sp += THREAD_SIZE; |
| 569 | paca[i].emergency_sp = __va(sp); |
| 570 | } |
| 571 | } |
| 572 | |
| 573 | /* |
| 574 | * Called into from start_kernel this initializes bootmem, which is used |
| 575 | * to manage page allocation until mem_init is called. |
| 576 | */ |
| 577 | void __init setup_arch(char **cmdline_p) |
| 578 | { |
| 579 | ppc64_boot_msg(0x12, "Setup Arch"); |
| 580 | |
| 581 | *cmdline_p = cmd_line; |
| 582 | |
| 583 | /* |
| 584 | * Set cache line size based on type of cpu as a default. |
| 585 | * Systems with OF can look in the properties on the cpu node(s) |
| 586 | * for a possibly more accurate value. |
| 587 | */ |
| 588 | dcache_bsize = ppc64_caches.dline_size; |
| 589 | icache_bsize = ppc64_caches.iline_size; |
| 590 | |
| 591 | /* reboot on panic */ |
| 592 | panic_timeout = 180; |
| 593 | |
| 594 | if (ppc_md.panic) |
| 595 | setup_panic(); |
| 596 | |
| 597 | init_mm.start_code = (unsigned long)_stext; |
| 598 | init_mm.end_code = (unsigned long) _etext; |
| 599 | init_mm.end_data = (unsigned long) _edata; |
| 600 | init_mm.brk = klimit; |
| 601 | #ifdef CONFIG_PPC_64K_PAGES |
| 602 | init_mm.context.pte_frag = NULL; |
| 603 | #endif |
| 604 | irqstack_early_init(); |
| 605 | exc_lvl_early_init(); |
| 606 | emergency_stack_init(); |
| 607 | |
| 608 | #ifdef CONFIG_PPC_STD_MMU_64 |
| 609 | stabs_alloc(); |
| 610 | #endif |
| 611 | /* set up the bootmem stuff with available memory */ |
| 612 | do_init_bootmem(); |
| 613 | sparse_init(); |
| 614 | |
| 615 | #ifdef CONFIG_DUMMY_CONSOLE |
| 616 | conswitchp = &dummy_con; |
| 617 | #endif |
| 618 | |
| 619 | if (ppc_md.setup_arch) |
| 620 | ppc_md.setup_arch(); |
| 621 | |
| 622 | paging_init(); |
| 623 | |
| 624 | /* Initialize the MMU context management stuff */ |
| 625 | mmu_context_init(); |
| 626 | |
| 627 | kvm_linear_init(); |
| 628 | |
| 629 | /* Interrupt code needs to be 64K-aligned */ |
| 630 | if ((unsigned long)_stext & 0xffff) |
| 631 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", |
| 632 | (unsigned long)_stext); |
| 633 | |
| 634 | ppc64_boot_msg(0x15, "Setup Done"); |
| 635 | } |
| 636 | |
| 637 | |
| 638 | /* ToDo: do something useful if ppc_md is not yet setup. */ |
| 639 | #define PPC64_LINUX_FUNCTION 0x0f000000 |
| 640 | #define PPC64_IPL_MESSAGE 0xc0000000 |
| 641 | #define PPC64_TERM_MESSAGE 0xb0000000 |
| 642 | |
| 643 | static void ppc64_do_msg(unsigned int src, const char *msg) |
| 644 | { |
| 645 | if (ppc_md.progress) { |
| 646 | char buf[128]; |
| 647 | |
| 648 | sprintf(buf, "%08X\n", src); |
| 649 | ppc_md.progress(buf, 0); |
| 650 | snprintf(buf, 128, "%s", msg); |
| 651 | ppc_md.progress(buf, 0); |
| 652 | } |
| 653 | } |
| 654 | |
| 655 | /* Print a boot progress message. */ |
| 656 | void ppc64_boot_msg(unsigned int src, const char *msg) |
| 657 | { |
| 658 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); |
| 659 | printk("[boot]%04x %s\n", src, msg); |
| 660 | } |
| 661 | |
| 662 | #ifdef CONFIG_SMP |
| 663 | #define PCPU_DYN_SIZE () |
| 664 | |
| 665 | static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) |
| 666 | { |
| 667 | return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, |
| 668 | __pa(MAX_DMA_ADDRESS)); |
| 669 | } |
| 670 | |
| 671 | static void __init pcpu_fc_free(void *ptr, size_t size) |
| 672 | { |
| 673 | free_bootmem(__pa(ptr), size); |
| 674 | } |
| 675 | |
| 676 | static int pcpu_cpu_distance(unsigned int from, unsigned int to) |
| 677 | { |
| 678 | if (cpu_to_node(from) == cpu_to_node(to)) |
| 679 | return LOCAL_DISTANCE; |
| 680 | else |
| 681 | return REMOTE_DISTANCE; |
| 682 | } |
| 683 | |
| 684 | unsigned long __per_cpu_offset[NR_CPUS] __read_mostly; |
| 685 | EXPORT_SYMBOL(__per_cpu_offset); |
| 686 | |
| 687 | void __init setup_per_cpu_areas(void) |
| 688 | { |
| 689 | const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; |
| 690 | size_t atom_size; |
| 691 | unsigned long delta; |
| 692 | unsigned int cpu; |
| 693 | int rc; |
| 694 | |
| 695 | /* |
| 696 | * Linear mapping is one of 4K, 1M and 16M. For 4K, no need |
| 697 | * to group units. For larger mappings, use 1M atom which |
| 698 | * should be large enough to contain a number of units. |
| 699 | */ |
| 700 | if (mmu_linear_psize == MMU_PAGE_4K) |
| 701 | atom_size = PAGE_SIZE; |
| 702 | else |
| 703 | atom_size = 1 << 20; |
| 704 | |
| 705 | rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, |
| 706 | pcpu_fc_alloc, pcpu_fc_free); |
| 707 | if (rc < 0) |
| 708 | panic("cannot initialize percpu area (err=%d)", rc); |
| 709 | |
| 710 | delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; |
| 711 | for_each_possible_cpu(cpu) { |
| 712 | __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu]; |
| 713 | paca[cpu].data_offset = __per_cpu_offset[cpu]; |
| 714 | } |
| 715 | } |
| 716 | #endif |
| 717 | |
| 718 | |
| 719 | #if defined(CONFIG_PPC_INDIRECT_PIO) || defined(CONFIG_PPC_INDIRECT_MMIO) |
| 720 | struct ppc_pci_io ppc_pci_io; |
| 721 | EXPORT_SYMBOL(ppc_pci_io); |
| 722 | #endif |