| 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | * Common boot and setup code for both 32-bit and 64-bit. |
| 4 | * Extracted from arch/powerpc/kernel/setup_64.c. |
| 5 | * |
| 6 | * Copyright (C) 2001 PPC64 Team, IBM Corp |
| 7 | */ |
| 8 | |
| 9 | #undef DEBUG |
| 10 | |
| 11 | #include <linux/export.h> |
| 12 | #include <linux/string.h> |
| 13 | #include <linux/sched.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/reboot.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/initrd.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/seq_file.h> |
| 21 | #include <linux/ioport.h> |
| 22 | #include <linux/console.h> |
| 23 | #include <linux/screen_info.h> |
| 24 | #include <linux/root_dev.h> |
| 25 | #include <linux/notifier.h> |
| 26 | #include <linux/cpu.h> |
| 27 | #include <linux/unistd.h> |
| 28 | #include <linux/serial.h> |
| 29 | #include <linux/serial_8250.h> |
| 30 | #include <linux/percpu.h> |
| 31 | #include <linux/memblock.h> |
| 32 | #include <linux/of_platform.h> |
| 33 | #include <linux/hugetlb.h> |
| 34 | #include <linux/pgtable.h> |
| 35 | #include <asm/debugfs.h> |
| 36 | #include <asm/io.h> |
| 37 | #include <asm/paca.h> |
| 38 | #include <asm/prom.h> |
| 39 | #include <asm/processor.h> |
| 40 | #include <asm/vdso_datapage.h> |
| 41 | #include <asm/smp.h> |
| 42 | #include <asm/elf.h> |
| 43 | #include <asm/machdep.h> |
| 44 | #include <asm/time.h> |
| 45 | #include <asm/cputable.h> |
| 46 | #include <asm/sections.h> |
| 47 | #include <asm/firmware.h> |
| 48 | #include <asm/btext.h> |
| 49 | #include <asm/nvram.h> |
| 50 | #include <asm/setup.h> |
| 51 | #include <asm/rtas.h> |
| 52 | #include <asm/iommu.h> |
| 53 | #include <asm/serial.h> |
| 54 | #include <asm/cache.h> |
| 55 | #include <asm/page.h> |
| 56 | #include <asm/mmu.h> |
| 57 | #include <asm/xmon.h> |
| 58 | #include <asm/cputhreads.h> |
| 59 | #include <mm/mmu_decl.h> |
| 60 | #include <asm/fadump.h> |
| 61 | #include <asm/udbg.h> |
| 62 | #include <asm/hugetlb.h> |
| 63 | #include <asm/livepatch.h> |
| 64 | #include <asm/mmu_context.h> |
| 65 | #include <asm/cpu_has_feature.h> |
| 66 | #include <asm/kasan.h> |
| 67 | |
| 68 | #include "setup.h" |
| 69 | |
| 70 | #ifdef DEBUG |
| 71 | #include <asm/udbg.h> |
| 72 | #define DBG(fmt...) udbg_printf(fmt) |
| 73 | #else |
| 74 | #define DBG(fmt...) |
| 75 | #endif |
| 76 | |
| 77 | /* The main machine-dep calls structure |
| 78 | */ |
| 79 | struct machdep_calls ppc_md; |
| 80 | EXPORT_SYMBOL(ppc_md); |
| 81 | struct machdep_calls *machine_id; |
| 82 | EXPORT_SYMBOL(machine_id); |
| 83 | |
| 84 | int boot_cpuid = -1; |
| 85 | EXPORT_SYMBOL_GPL(boot_cpuid); |
| 86 | |
| 87 | /* |
| 88 | * These are used in binfmt_elf.c to put aux entries on the stack |
| 89 | * for each elf executable being started. |
| 90 | */ |
| 91 | int dcache_bsize; |
| 92 | int icache_bsize; |
| 93 | int ucache_bsize; |
| 94 | |
| 95 | |
| 96 | unsigned long klimit = (unsigned long) _end; |
| 97 | |
| 98 | /* |
| 99 | * This still seems to be needed... -- paulus |
| 100 | */ |
| 101 | struct screen_info screen_info = { |
| 102 | .orig_x = 0, |
| 103 | .orig_y = 25, |
| 104 | .orig_video_cols = 80, |
| 105 | .orig_video_lines = 25, |
| 106 | .orig_video_isVGA = 1, |
| 107 | .orig_video_points = 16 |
| 108 | }; |
| 109 | #if defined(CONFIG_FB_VGA16_MODULE) |
| 110 | EXPORT_SYMBOL(screen_info); |
| 111 | #endif |
| 112 | |
| 113 | /* Variables required to store legacy IO irq routing */ |
| 114 | int of_i8042_kbd_irq; |
| 115 | EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); |
| 116 | int of_i8042_aux_irq; |
| 117 | EXPORT_SYMBOL_GPL(of_i8042_aux_irq); |
| 118 | |
| 119 | #ifdef __DO_IRQ_CANON |
| 120 | /* XXX should go elsewhere eventually */ |
| 121 | int ppc_do_canonicalize_irqs; |
| 122 | EXPORT_SYMBOL(ppc_do_canonicalize_irqs); |
| 123 | #endif |
| 124 | |
| 125 | #ifdef CONFIG_CRASH_CORE |
| 126 | /* This keeps a track of which one is the crashing cpu. */ |
| 127 | int crashing_cpu = -1; |
| 128 | #endif |
| 129 | |
| 130 | /* also used by kexec */ |
| 131 | void machine_shutdown(void) |
| 132 | { |
| 133 | /* |
| 134 | * if fadump is active, cleanup the fadump registration before we |
| 135 | * shutdown. |
| 136 | */ |
| 137 | fadump_cleanup(); |
| 138 | |
| 139 | if (ppc_md.machine_shutdown) |
| 140 | ppc_md.machine_shutdown(); |
| 141 | } |
| 142 | |
| 143 | static void machine_hang(void) |
| 144 | { |
| 145 | pr_emerg("System Halted, OK to turn off power\n"); |
| 146 | local_irq_disable(); |
| 147 | while (1) |
| 148 | ; |
| 149 | } |
| 150 | |
| 151 | void machine_restart(char *cmd) |
| 152 | { |
| 153 | machine_shutdown(); |
| 154 | if (ppc_md.restart) |
| 155 | ppc_md.restart(cmd); |
| 156 | |
| 157 | smp_send_stop(); |
| 158 | |
| 159 | do_kernel_restart(cmd); |
| 160 | mdelay(1000); |
| 161 | |
| 162 | machine_hang(); |
| 163 | } |
| 164 | |
| 165 | void machine_power_off(void) |
| 166 | { |
| 167 | machine_shutdown(); |
| 168 | if (pm_power_off) |
| 169 | pm_power_off(); |
| 170 | |
| 171 | smp_send_stop(); |
| 172 | machine_hang(); |
| 173 | } |
| 174 | /* Used by the G5 thermal driver */ |
| 175 | EXPORT_SYMBOL_GPL(machine_power_off); |
| 176 | |
| 177 | void (*pm_power_off)(void); |
| 178 | EXPORT_SYMBOL_GPL(pm_power_off); |
| 179 | |
| 180 | void machine_halt(void) |
| 181 | { |
| 182 | machine_shutdown(); |
| 183 | if (ppc_md.halt) |
| 184 | ppc_md.halt(); |
| 185 | |
| 186 | smp_send_stop(); |
| 187 | machine_hang(); |
| 188 | } |
| 189 | |
| 190 | #ifdef CONFIG_SMP |
| 191 | DEFINE_PER_CPU(unsigned int, cpu_pvr); |
| 192 | #endif |
| 193 | |
| 194 | static void show_cpuinfo_summary(struct seq_file *m) |
| 195 | { |
| 196 | struct device_node *root; |
| 197 | const char *model = NULL; |
| 198 | unsigned long bogosum = 0; |
| 199 | int i; |
| 200 | |
| 201 | if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) { |
| 202 | for_each_online_cpu(i) |
| 203 | bogosum += loops_per_jiffy; |
| 204 | seq_printf(m, "total bogomips\t: %lu.%02lu\n", |
| 205 | bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100); |
| 206 | } |
| 207 | seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); |
| 208 | if (ppc_md.name) |
| 209 | seq_printf(m, "platform\t: %s\n", ppc_md.name); |
| 210 | root = of_find_node_by_path("/"); |
| 211 | if (root) |
| 212 | model = of_get_property(root, "model", NULL); |
| 213 | if (model) |
| 214 | seq_printf(m, "model\t\t: %s\n", model); |
| 215 | of_node_put(root); |
| 216 | |
| 217 | if (ppc_md.show_cpuinfo != NULL) |
| 218 | ppc_md.show_cpuinfo(m); |
| 219 | |
| 220 | /* Display the amount of memory */ |
| 221 | if (IS_ENABLED(CONFIG_PPC32)) |
| 222 | seq_printf(m, "Memory\t\t: %d MB\n", |
| 223 | (unsigned int)(total_memory / (1024 * 1024))); |
| 224 | } |
| 225 | |
| 226 | static int show_cpuinfo(struct seq_file *m, void *v) |
| 227 | { |
| 228 | unsigned long cpu_id = (unsigned long)v - 1; |
| 229 | unsigned int pvr; |
| 230 | unsigned long proc_freq; |
| 231 | unsigned short maj; |
| 232 | unsigned short min; |
| 233 | |
| 234 | #ifdef CONFIG_SMP |
| 235 | pvr = per_cpu(cpu_pvr, cpu_id); |
| 236 | #else |
| 237 | pvr = mfspr(SPRN_PVR); |
| 238 | #endif |
| 239 | maj = (pvr >> 8) & 0xFF; |
| 240 | min = pvr & 0xFF; |
| 241 | |
| 242 | seq_printf(m, "processor\t: %lu\n", cpu_id); |
| 243 | seq_printf(m, "cpu\t\t: "); |
| 244 | |
| 245 | if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) |
| 246 | seq_printf(m, "%s", cur_cpu_spec->cpu_name); |
| 247 | else |
| 248 | seq_printf(m, "unknown (%08x)", pvr); |
| 249 | |
| 250 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 251 | seq_printf(m, ", altivec supported"); |
| 252 | |
| 253 | seq_printf(m, "\n"); |
| 254 | |
| 255 | #ifdef CONFIG_TAU |
| 256 | if (cpu_has_feature(CPU_FTR_TAU)) { |
| 257 | if (IS_ENABLED(CONFIG_TAU_AVERAGE)) { |
| 258 | /* more straightforward, but potentially misleading */ |
| 259 | seq_printf(m, "temperature \t: %u C (uncalibrated)\n", |
| 260 | cpu_temp(cpu_id)); |
| 261 | } else { |
| 262 | /* show the actual temp sensor range */ |
| 263 | u32 temp; |
| 264 | temp = cpu_temp_both(cpu_id); |
| 265 | seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", |
| 266 | temp & 0xff, temp >> 16); |
| 267 | } |
| 268 | } |
| 269 | #endif /* CONFIG_TAU */ |
| 270 | |
| 271 | /* |
| 272 | * Platforms that have variable clock rates, should implement |
| 273 | * the method ppc_md.get_proc_freq() that reports the clock |
| 274 | * rate of a given cpu. The rest can use ppc_proc_freq to |
| 275 | * report the clock rate that is same across all cpus. |
| 276 | */ |
| 277 | if (ppc_md.get_proc_freq) |
| 278 | proc_freq = ppc_md.get_proc_freq(cpu_id); |
| 279 | else |
| 280 | proc_freq = ppc_proc_freq; |
| 281 | |
| 282 | if (proc_freq) |
| 283 | seq_printf(m, "clock\t\t: %lu.%06luMHz\n", |
| 284 | proc_freq / 1000000, proc_freq % 1000000); |
| 285 | |
| 286 | if (ppc_md.show_percpuinfo != NULL) |
| 287 | ppc_md.show_percpuinfo(m, cpu_id); |
| 288 | |
| 289 | /* If we are a Freescale core do a simple check so |
| 290 | * we dont have to keep adding cases in the future */ |
| 291 | if (PVR_VER(pvr) & 0x8000) { |
| 292 | switch (PVR_VER(pvr)) { |
| 293 | case 0x8000: /* 7441/7450/7451, Voyager */ |
| 294 | case 0x8001: /* 7445/7455, Apollo 6 */ |
| 295 | case 0x8002: /* 7447/7457, Apollo 7 */ |
| 296 | case 0x8003: /* 7447A, Apollo 7 PM */ |
| 297 | case 0x8004: /* 7448, Apollo 8 */ |
| 298 | case 0x800c: /* 7410, Nitro */ |
| 299 | maj = ((pvr >> 8) & 0xF); |
| 300 | min = PVR_MIN(pvr); |
| 301 | break; |
| 302 | default: /* e500/book-e */ |
| 303 | maj = PVR_MAJ(pvr); |
| 304 | min = PVR_MIN(pvr); |
| 305 | break; |
| 306 | } |
| 307 | } else { |
| 308 | switch (PVR_VER(pvr)) { |
| 309 | case 0x1008: /* 740P/750P ?? */ |
| 310 | maj = ((pvr >> 8) & 0xFF) - 1; |
| 311 | min = pvr & 0xFF; |
| 312 | break; |
| 313 | case 0x004e: /* POWER9 bits 12-15 give chip type */ |
| 314 | case 0x0080: /* POWER10 bit 12 gives SMT8/4 */ |
| 315 | maj = (pvr >> 8) & 0x0F; |
| 316 | min = pvr & 0xFF; |
| 317 | break; |
| 318 | default: |
| 319 | maj = (pvr >> 8) & 0xFF; |
| 320 | min = pvr & 0xFF; |
| 321 | break; |
| 322 | } |
| 323 | } |
| 324 | |
| 325 | seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", |
| 326 | maj, min, PVR_VER(pvr), PVR_REV(pvr)); |
| 327 | |
| 328 | if (IS_ENABLED(CONFIG_PPC32)) |
| 329 | seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ), |
| 330 | (loops_per_jiffy / (5000 / HZ)) % 100); |
| 331 | |
| 332 | seq_printf(m, "\n"); |
| 333 | |
| 334 | /* If this is the last cpu, print the summary */ |
| 335 | if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) |
| 336 | show_cpuinfo_summary(m); |
| 337 | |
| 338 | return 0; |
| 339 | } |
| 340 | |
| 341 | static void *c_start(struct seq_file *m, loff_t *pos) |
| 342 | { |
| 343 | if (*pos == 0) /* just in case, cpu 0 is not the first */ |
| 344 | *pos = cpumask_first(cpu_online_mask); |
| 345 | else |
| 346 | *pos = cpumask_next(*pos - 1, cpu_online_mask); |
| 347 | if ((*pos) < nr_cpu_ids) |
| 348 | return (void *)(unsigned long)(*pos + 1); |
| 349 | return NULL; |
| 350 | } |
| 351 | |
| 352 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
| 353 | { |
| 354 | (*pos)++; |
| 355 | return c_start(m, pos); |
| 356 | } |
| 357 | |
| 358 | static void c_stop(struct seq_file *m, void *v) |
| 359 | { |
| 360 | } |
| 361 | |
| 362 | const struct seq_operations cpuinfo_op = { |
| 363 | .start = c_start, |
| 364 | .next = c_next, |
| 365 | .stop = c_stop, |
| 366 | .show = show_cpuinfo, |
| 367 | }; |
| 368 | |
| 369 | void __init check_for_initrd(void) |
| 370 | { |
| 371 | #ifdef CONFIG_BLK_DEV_INITRD |
| 372 | DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", |
| 373 | initrd_start, initrd_end); |
| 374 | |
| 375 | /* If we were passed an initrd, set the ROOT_DEV properly if the values |
| 376 | * look sensible. If not, clear initrd reference. |
| 377 | */ |
| 378 | if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && |
| 379 | initrd_end > initrd_start) |
| 380 | ROOT_DEV = Root_RAM0; |
| 381 | else |
| 382 | initrd_start = initrd_end = 0; |
| 383 | |
| 384 | if (initrd_start) |
| 385 | pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); |
| 386 | |
| 387 | DBG(" <- check_for_initrd()\n"); |
| 388 | #endif /* CONFIG_BLK_DEV_INITRD */ |
| 389 | } |
| 390 | |
| 391 | #ifdef CONFIG_SMP |
| 392 | |
| 393 | int threads_per_core, threads_per_subcore, threads_shift __read_mostly; |
| 394 | cpumask_t threads_core_mask __read_mostly; |
| 395 | EXPORT_SYMBOL_GPL(threads_per_core); |
| 396 | EXPORT_SYMBOL_GPL(threads_per_subcore); |
| 397 | EXPORT_SYMBOL_GPL(threads_shift); |
| 398 | EXPORT_SYMBOL_GPL(threads_core_mask); |
| 399 | |
| 400 | static void __init cpu_init_thread_core_maps(int tpc) |
| 401 | { |
| 402 | int i; |
| 403 | |
| 404 | threads_per_core = tpc; |
| 405 | threads_per_subcore = tpc; |
| 406 | cpumask_clear(&threads_core_mask); |
| 407 | |
| 408 | /* This implementation only supports power of 2 number of threads |
| 409 | * for simplicity and performance |
| 410 | */ |
| 411 | threads_shift = ilog2(tpc); |
| 412 | BUG_ON(tpc != (1 << threads_shift)); |
| 413 | |
| 414 | for (i = 0; i < tpc; i++) |
| 415 | cpumask_set_cpu(i, &threads_core_mask); |
| 416 | |
| 417 | printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", |
| 418 | tpc, tpc > 1 ? "s" : ""); |
| 419 | printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); |
| 420 | } |
| 421 | |
| 422 | |
| 423 | u32 *cpu_to_phys_id = NULL; |
| 424 | |
| 425 | /** |
| 426 | * setup_cpu_maps - initialize the following cpu maps: |
| 427 | * cpu_possible_mask |
| 428 | * cpu_present_mask |
| 429 | * |
| 430 | * Having the possible map set up early allows us to restrict allocations |
| 431 | * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. |
| 432 | * |
| 433 | * We do not initialize the online map here; cpus set their own bits in |
| 434 | * cpu_online_mask as they come up. |
| 435 | * |
| 436 | * This function is valid only for Open Firmware systems. finish_device_tree |
| 437 | * must be called before using this. |
| 438 | * |
| 439 | * While we're here, we may as well set the "physical" cpu ids in the paca. |
| 440 | * |
| 441 | * NOTE: This must match the parsing done in early_init_dt_scan_cpus. |
| 442 | */ |
| 443 | void __init smp_setup_cpu_maps(void) |
| 444 | { |
| 445 | struct device_node *dn; |
| 446 | int cpu = 0; |
| 447 | int nthreads = 1; |
| 448 | |
| 449 | DBG("smp_setup_cpu_maps()\n"); |
| 450 | |
| 451 | cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32), |
| 452 | __alignof__(u32)); |
| 453 | if (!cpu_to_phys_id) |
| 454 | panic("%s: Failed to allocate %zu bytes align=0x%zx\n", |
| 455 | __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32)); |
| 456 | |
| 457 | for_each_node_by_type(dn, "cpu") { |
| 458 | const __be32 *intserv; |
| 459 | __be32 cpu_be; |
| 460 | int j, len; |
| 461 | |
| 462 | DBG(" * %pOF...\n", dn); |
| 463 | |
| 464 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", |
| 465 | &len); |
| 466 | if (intserv) { |
| 467 | DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", |
| 468 | nthreads); |
| 469 | } else { |
| 470 | DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); |
| 471 | intserv = of_get_property(dn, "reg", &len); |
| 472 | if (!intserv) { |
| 473 | cpu_be = cpu_to_be32(cpu); |
| 474 | /* XXX: what is this? uninitialized?? */ |
| 475 | intserv = &cpu_be; /* assume logical == phys */ |
| 476 | len = 4; |
| 477 | } |
| 478 | } |
| 479 | |
| 480 | nthreads = len / sizeof(int); |
| 481 | |
| 482 | for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { |
| 483 | bool avail; |
| 484 | |
| 485 | DBG(" thread %d -> cpu %d (hard id %d)\n", |
| 486 | j, cpu, be32_to_cpu(intserv[j])); |
| 487 | |
| 488 | avail = of_device_is_available(dn); |
| 489 | if (!avail) |
| 490 | avail = !of_property_match_string(dn, |
| 491 | "enable-method", "spin-table"); |
| 492 | |
| 493 | set_cpu_present(cpu, avail); |
| 494 | set_cpu_possible(cpu, true); |
| 495 | cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]); |
| 496 | cpu++; |
| 497 | } |
| 498 | |
| 499 | if (cpu >= nr_cpu_ids) { |
| 500 | of_node_put(dn); |
| 501 | break; |
| 502 | } |
| 503 | } |
| 504 | |
| 505 | /* If no SMT supported, nthreads is forced to 1 */ |
| 506 | if (!cpu_has_feature(CPU_FTR_SMT)) { |
| 507 | DBG(" SMT disabled ! nthreads forced to 1\n"); |
| 508 | nthreads = 1; |
| 509 | } |
| 510 | |
| 511 | #ifdef CONFIG_PPC64 |
| 512 | /* |
| 513 | * On pSeries LPAR, we need to know how many cpus |
| 514 | * could possibly be added to this partition. |
| 515 | */ |
| 516 | if (firmware_has_feature(FW_FEATURE_LPAR) && |
| 517 | (dn = of_find_node_by_path("/rtas"))) { |
| 518 | int num_addr_cell, num_size_cell, maxcpus; |
| 519 | const __be32 *ireg; |
| 520 | |
| 521 | num_addr_cell = of_n_addr_cells(dn); |
| 522 | num_size_cell = of_n_size_cells(dn); |
| 523 | |
| 524 | ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); |
| 525 | |
| 526 | if (!ireg) |
| 527 | goto out; |
| 528 | |
| 529 | maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); |
| 530 | |
| 531 | /* Double maxcpus for processors which have SMT capability */ |
| 532 | if (cpu_has_feature(CPU_FTR_SMT)) |
| 533 | maxcpus *= nthreads; |
| 534 | |
| 535 | if (maxcpus > nr_cpu_ids) { |
| 536 | printk(KERN_WARNING |
| 537 | "Partition configured for %d cpus, " |
| 538 | "operating system maximum is %u.\n", |
| 539 | maxcpus, nr_cpu_ids); |
| 540 | maxcpus = nr_cpu_ids; |
| 541 | } else |
| 542 | printk(KERN_INFO "Partition configured for %d cpus.\n", |
| 543 | maxcpus); |
| 544 | |
| 545 | for (cpu = 0; cpu < maxcpus; cpu++) |
| 546 | set_cpu_possible(cpu, true); |
| 547 | out: |
| 548 | of_node_put(dn); |
| 549 | } |
| 550 | vdso_data->processorCount = num_present_cpus(); |
| 551 | #endif /* CONFIG_PPC64 */ |
| 552 | |
| 553 | /* Initialize CPU <=> thread mapping/ |
| 554 | * |
| 555 | * WARNING: We assume that the number of threads is the same for |
| 556 | * every CPU in the system. If that is not the case, then some code |
| 557 | * here will have to be reworked |
| 558 | */ |
| 559 | cpu_init_thread_core_maps(nthreads); |
| 560 | |
| 561 | /* Now that possible cpus are set, set nr_cpu_ids for later use */ |
| 562 | setup_nr_cpu_ids(); |
| 563 | |
| 564 | free_unused_pacas(); |
| 565 | } |
| 566 | #endif /* CONFIG_SMP */ |
| 567 | |
| 568 | #ifdef CONFIG_PCSPKR_PLATFORM |
| 569 | static __init int add_pcspkr(void) |
| 570 | { |
| 571 | struct device_node *np; |
| 572 | struct platform_device *pd; |
| 573 | int ret; |
| 574 | |
| 575 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); |
| 576 | of_node_put(np); |
| 577 | if (!np) |
| 578 | return -ENODEV; |
| 579 | |
| 580 | pd = platform_device_alloc("pcspkr", -1); |
| 581 | if (!pd) |
| 582 | return -ENOMEM; |
| 583 | |
| 584 | ret = platform_device_add(pd); |
| 585 | if (ret) |
| 586 | platform_device_put(pd); |
| 587 | |
| 588 | return ret; |
| 589 | } |
| 590 | device_initcall(add_pcspkr); |
| 591 | #endif /* CONFIG_PCSPKR_PLATFORM */ |
| 592 | |
| 593 | void probe_machine(void) |
| 594 | { |
| 595 | extern struct machdep_calls __machine_desc_start; |
| 596 | extern struct machdep_calls __machine_desc_end; |
| 597 | unsigned int i; |
| 598 | |
| 599 | /* |
| 600 | * Iterate all ppc_md structures until we find the proper |
| 601 | * one for the current machine type |
| 602 | */ |
| 603 | DBG("Probing machine type ...\n"); |
| 604 | |
| 605 | /* |
| 606 | * Check ppc_md is empty, if not we have a bug, ie, we setup an |
| 607 | * entry before probe_machine() which will be overwritten |
| 608 | */ |
| 609 | for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { |
| 610 | if (((void **)&ppc_md)[i]) { |
| 611 | printk(KERN_ERR "Entry %d in ppc_md non empty before" |
| 612 | " machine probe !\n", i); |
| 613 | } |
| 614 | } |
| 615 | |
| 616 | for (machine_id = &__machine_desc_start; |
| 617 | machine_id < &__machine_desc_end; |
| 618 | machine_id++) { |
| 619 | DBG(" %s ...", machine_id->name); |
| 620 | memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); |
| 621 | if (ppc_md.probe()) { |
| 622 | DBG(" match !\n"); |
| 623 | break; |
| 624 | } |
| 625 | DBG("\n"); |
| 626 | } |
| 627 | /* What can we do if we didn't find ? */ |
| 628 | if (machine_id >= &__machine_desc_end) { |
| 629 | pr_err("No suitable machine description found !\n"); |
| 630 | for (;;); |
| 631 | } |
| 632 | |
| 633 | printk(KERN_INFO "Using %s machine description\n", ppc_md.name); |
| 634 | } |
| 635 | |
| 636 | /* Match a class of boards, not a specific device configuration. */ |
| 637 | int check_legacy_ioport(unsigned long base_port) |
| 638 | { |
| 639 | struct device_node *parent, *np = NULL; |
| 640 | int ret = -ENODEV; |
| 641 | |
| 642 | switch(base_port) { |
| 643 | case I8042_DATA_REG: |
| 644 | if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) |
| 645 | np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); |
| 646 | if (np) { |
| 647 | parent = of_get_parent(np); |
| 648 | |
| 649 | of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); |
| 650 | if (!of_i8042_kbd_irq) |
| 651 | of_i8042_kbd_irq = 1; |
| 652 | |
| 653 | of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); |
| 654 | if (!of_i8042_aux_irq) |
| 655 | of_i8042_aux_irq = 12; |
| 656 | |
| 657 | of_node_put(np); |
| 658 | np = parent; |
| 659 | break; |
| 660 | } |
| 661 | np = of_find_node_by_type(NULL, "8042"); |
| 662 | /* Pegasos has no device_type on its 8042 node, look for the |
| 663 | * name instead */ |
| 664 | if (!np) |
| 665 | np = of_find_node_by_name(NULL, "8042"); |
| 666 | if (np) { |
| 667 | of_i8042_kbd_irq = 1; |
| 668 | of_i8042_aux_irq = 12; |
| 669 | } |
| 670 | break; |
| 671 | case FDC_BASE: /* FDC1 */ |
| 672 | np = of_find_node_by_type(NULL, "fdc"); |
| 673 | break; |
| 674 | default: |
| 675 | /* ipmi is supposed to fail here */ |
| 676 | break; |
| 677 | } |
| 678 | if (!np) |
| 679 | return ret; |
| 680 | parent = of_get_parent(np); |
| 681 | if (parent) { |
| 682 | if (of_node_is_type(parent, "isa")) |
| 683 | ret = 0; |
| 684 | of_node_put(parent); |
| 685 | } |
| 686 | of_node_put(np); |
| 687 | return ret; |
| 688 | } |
| 689 | EXPORT_SYMBOL(check_legacy_ioport); |
| 690 | |
| 691 | static int ppc_panic_event(struct notifier_block *this, |
| 692 | unsigned long event, void *ptr) |
| 693 | { |
| 694 | /* |
| 695 | * panic does a local_irq_disable, but we really |
| 696 | * want interrupts to be hard disabled. |
| 697 | */ |
| 698 | hard_irq_disable(); |
| 699 | |
| 700 | /* |
| 701 | * If firmware-assisted dump has been registered then trigger |
| 702 | * firmware-assisted dump and let firmware handle everything else. |
| 703 | */ |
| 704 | crash_fadump(NULL, ptr); |
| 705 | if (ppc_md.panic) |
| 706 | ppc_md.panic(ptr); /* May not return */ |
| 707 | return NOTIFY_DONE; |
| 708 | } |
| 709 | |
| 710 | static struct notifier_block ppc_panic_block = { |
| 711 | .notifier_call = ppc_panic_event, |
| 712 | .priority = INT_MIN /* may not return; must be done last */ |
| 713 | }; |
| 714 | |
| 715 | /* |
| 716 | * Dump out kernel offset information on panic. |
| 717 | */ |
| 718 | static int dump_kernel_offset(struct notifier_block *self, unsigned long v, |
| 719 | void *p) |
| 720 | { |
| 721 | pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", |
| 722 | kaslr_offset(), KERNELBASE); |
| 723 | |
| 724 | return 0; |
| 725 | } |
| 726 | |
| 727 | static struct notifier_block kernel_offset_notifier = { |
| 728 | .notifier_call = dump_kernel_offset |
| 729 | }; |
| 730 | |
| 731 | void __init setup_panic(void) |
| 732 | { |
| 733 | if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) |
| 734 | atomic_notifier_chain_register(&panic_notifier_list, |
| 735 | &kernel_offset_notifier); |
| 736 | |
| 737 | /* PPC64 always does a hard irq disable in its panic handler */ |
| 738 | if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic) |
| 739 | return; |
| 740 | atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); |
| 741 | } |
| 742 | |
| 743 | #ifdef CONFIG_CHECK_CACHE_COHERENCY |
| 744 | /* |
| 745 | * For platforms that have configurable cache-coherency. This function |
| 746 | * checks that the cache coherency setting of the kernel matches the setting |
| 747 | * left by the firmware, as indicated in the device tree. Since a mismatch |
| 748 | * will eventually result in DMA failures, we print * and error and call |
| 749 | * BUG() in that case. |
| 750 | */ |
| 751 | |
| 752 | #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE)) |
| 753 | |
| 754 | static int __init check_cache_coherency(void) |
| 755 | { |
| 756 | struct device_node *np; |
| 757 | const void *prop; |
| 758 | bool devtree_coherency; |
| 759 | |
| 760 | np = of_find_node_by_path("/"); |
| 761 | prop = of_get_property(np, "coherency-off", NULL); |
| 762 | of_node_put(np); |
| 763 | |
| 764 | devtree_coherency = prop ? false : true; |
| 765 | |
| 766 | if (devtree_coherency != KERNEL_COHERENCY) { |
| 767 | printk(KERN_ERR |
| 768 | "kernel coherency:%s != device tree_coherency:%s\n", |
| 769 | KERNEL_COHERENCY ? "on" : "off", |
| 770 | devtree_coherency ? "on" : "off"); |
| 771 | BUG(); |
| 772 | } |
| 773 | |
| 774 | return 0; |
| 775 | } |
| 776 | |
| 777 | late_initcall(check_cache_coherency); |
| 778 | #endif /* CONFIG_CHECK_CACHE_COHERENCY */ |
| 779 | |
| 780 | #ifdef CONFIG_DEBUG_FS |
| 781 | struct dentry *powerpc_debugfs_root; |
| 782 | EXPORT_SYMBOL(powerpc_debugfs_root); |
| 783 | |
| 784 | static int powerpc_debugfs_init(void) |
| 785 | { |
| 786 | powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); |
| 787 | return 0; |
| 788 | } |
| 789 | arch_initcall(powerpc_debugfs_init); |
| 790 | #endif |
| 791 | |
| 792 | void ppc_printk_progress(char *s, unsigned short hex) |
| 793 | { |
| 794 | pr_info("%s\n", s); |
| 795 | } |
| 796 | |
| 797 | static __init void print_system_info(void) |
| 798 | { |
| 799 | pr_info("-----------------------------------------------------\n"); |
| 800 | pr_info("phys_mem_size = 0x%llx\n", |
| 801 | (unsigned long long)memblock_phys_mem_size()); |
| 802 | |
| 803 | pr_info("dcache_bsize = 0x%x\n", dcache_bsize); |
| 804 | pr_info("icache_bsize = 0x%x\n", icache_bsize); |
| 805 | if (ucache_bsize != 0) |
| 806 | pr_info("ucache_bsize = 0x%x\n", ucache_bsize); |
| 807 | |
| 808 | pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); |
| 809 | pr_info(" possible = 0x%016lx\n", |
| 810 | (unsigned long)CPU_FTRS_POSSIBLE); |
| 811 | pr_info(" always = 0x%016lx\n", |
| 812 | (unsigned long)CPU_FTRS_ALWAYS); |
| 813 | pr_info("cpu_user_features = 0x%08x 0x%08x\n", |
| 814 | cur_cpu_spec->cpu_user_features, |
| 815 | cur_cpu_spec->cpu_user_features2); |
| 816 | pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); |
| 817 | #ifdef CONFIG_PPC64 |
| 818 | pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); |
| 819 | #ifdef CONFIG_PPC_BOOK3S |
| 820 | pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START); |
| 821 | pr_info("IO start = 0x%lx\n", KERN_IO_START); |
| 822 | pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap); |
| 823 | #endif |
| 824 | #endif |
| 825 | |
| 826 | if (!early_radix_enabled()) |
| 827 | print_system_hash_info(); |
| 828 | |
| 829 | if (PHYSICAL_START > 0) |
| 830 | pr_info("physical_start = 0x%llx\n", |
| 831 | (unsigned long long)PHYSICAL_START); |
| 832 | pr_info("-----------------------------------------------------\n"); |
| 833 | } |
| 834 | |
| 835 | #ifdef CONFIG_SMP |
| 836 | static void smp_setup_pacas(void) |
| 837 | { |
| 838 | int cpu; |
| 839 | |
| 840 | for_each_possible_cpu(cpu) { |
| 841 | if (cpu == smp_processor_id()) |
| 842 | continue; |
| 843 | allocate_paca(cpu); |
| 844 | set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]); |
| 845 | } |
| 846 | |
| 847 | memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32)); |
| 848 | cpu_to_phys_id = NULL; |
| 849 | } |
| 850 | #endif |
| 851 | |
| 852 | /* |
| 853 | * Called into from start_kernel this initializes memblock, which is used |
| 854 | * to manage page allocation until mem_init is called. |
| 855 | */ |
| 856 | void __init setup_arch(char **cmdline_p) |
| 857 | { |
| 858 | kasan_init(); |
| 859 | |
| 860 | *cmdline_p = boot_command_line; |
| 861 | |
| 862 | /* Set a half-reasonable default so udelay does something sensible */ |
| 863 | loops_per_jiffy = 500000000 / HZ; |
| 864 | |
| 865 | /* Unflatten the device-tree passed by prom_init or kexec */ |
| 866 | unflatten_device_tree(); |
| 867 | |
| 868 | /* |
| 869 | * Initialize cache line/block info from device-tree (on ppc64) or |
| 870 | * just cputable (on ppc32). |
| 871 | */ |
| 872 | initialize_cache_info(); |
| 873 | |
| 874 | /* Initialize RTAS if available. */ |
| 875 | rtas_initialize(); |
| 876 | |
| 877 | /* Check if we have an initrd provided via the device-tree. */ |
| 878 | check_for_initrd(); |
| 879 | |
| 880 | /* Probe the machine type, establish ppc_md. */ |
| 881 | probe_machine(); |
| 882 | |
| 883 | /* Setup panic notifier if requested by the platform. */ |
| 884 | setup_panic(); |
| 885 | |
| 886 | /* |
| 887 | * Configure ppc_md.power_save (ppc32 only, 64-bit machines do |
| 888 | * it from their respective probe() function. |
| 889 | */ |
| 890 | setup_power_save(); |
| 891 | |
| 892 | /* Discover standard serial ports. */ |
| 893 | find_legacy_serial_ports(); |
| 894 | |
| 895 | /* Register early console with the printk subsystem. */ |
| 896 | register_early_udbg_console(); |
| 897 | |
| 898 | /* Setup the various CPU maps based on the device-tree. */ |
| 899 | smp_setup_cpu_maps(); |
| 900 | |
| 901 | /* Initialize xmon. */ |
| 902 | xmon_setup(); |
| 903 | |
| 904 | /* Check the SMT related command line arguments (ppc64). */ |
| 905 | check_smt_enabled(); |
| 906 | |
| 907 | /* Parse memory topology */ |
| 908 | mem_topology_setup(); |
| 909 | |
| 910 | /* |
| 911 | * Release secondary cpus out of their spinloops at 0x60 now that |
| 912 | * we can map physical -> logical CPU ids. |
| 913 | * |
| 914 | * Freescale Book3e parts spin in a loop provided by firmware, |
| 915 | * so smp_release_cpus() does nothing for them. |
| 916 | */ |
| 917 | #ifdef CONFIG_SMP |
| 918 | smp_setup_pacas(); |
| 919 | |
| 920 | /* On BookE, setup per-core TLB data structures. */ |
| 921 | setup_tlb_core_data(); |
| 922 | |
| 923 | smp_release_cpus(); |
| 924 | #endif |
| 925 | |
| 926 | /* Print various info about the machine that has been gathered so far. */ |
| 927 | print_system_info(); |
| 928 | |
| 929 | /* Reserve large chunks of memory for use by CMA for KVM. */ |
| 930 | kvm_cma_reserve(); |
| 931 | |
| 932 | /* Reserve large chunks of memory for us by CMA for hugetlb */ |
| 933 | gigantic_hugetlb_cma_reserve(); |
| 934 | |
| 935 | klp_init_thread_info(&init_task); |
| 936 | |
| 937 | init_mm.start_code = (unsigned long)_stext; |
| 938 | init_mm.end_code = (unsigned long) _etext; |
| 939 | init_mm.end_data = (unsigned long) _edata; |
| 940 | init_mm.brk = klimit; |
| 941 | |
| 942 | mm_iommu_init(&init_mm); |
| 943 | irqstack_early_init(); |
| 944 | exc_lvl_early_init(); |
| 945 | emergency_stack_init(); |
| 946 | |
| 947 | initmem_init(); |
| 948 | |
| 949 | early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); |
| 950 | |
| 951 | if (ppc_md.setup_arch) |
| 952 | ppc_md.setup_arch(); |
| 953 | |
| 954 | setup_barrier_nospec(); |
| 955 | setup_spectre_v2(); |
| 956 | |
| 957 | paging_init(); |
| 958 | |
| 959 | /* Initialize the MMU context management stuff. */ |
| 960 | mmu_context_init(); |
| 961 | |
| 962 | /* Interrupt code needs to be 64K-aligned. */ |
| 963 | if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff) |
| 964 | panic("Kernelbase not 64K-aligned (0x%lx)!\n", |
| 965 | (unsigned long)_stext); |
| 966 | } |