| 1 | /* |
| 2 | * This file contains the 64-bit "server" PowerPC variant |
| 3 | * of the low level exception handling including exception |
| 4 | * vectors, exception return, part of the slb and stab |
| 5 | * handling and other fixed offset specific things. |
| 6 | * |
| 7 | * This file is meant to be #included from head_64.S due to |
| 8 | * position dependent assembly. |
| 9 | * |
| 10 | * Most of this originates from head_64.S and thus has the same |
| 11 | * copyright history. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <asm/exception-64s.h> |
| 16 | #include <asm/ptrace.h> |
| 17 | |
| 18 | /* |
| 19 | * We layout physical memory as follows: |
| 20 | * 0x0000 - 0x00ff : Secondary processor spin code |
| 21 | * 0x0100 - 0x2fff : pSeries Interrupt prologs |
| 22 | * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs |
| 23 | * 0x6000 - 0x6fff : Initial (CPU0) segment table |
| 24 | * 0x7000 - 0x7fff : FWNMI data area |
| 25 | * 0x8000 - : Early init and support code |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * This is the start of the interrupt handlers for pSeries |
| 30 | * This code runs with relocation off. |
| 31 | * Code from here to __end_interrupts gets copied down to real |
| 32 | * address 0x100 when we are running a relocatable kernel. |
| 33 | * Therefore any relative branches in this section must only |
| 34 | * branch to labels in this section. |
| 35 | */ |
| 36 | . = 0x100 |
| 37 | .globl __start_interrupts |
| 38 | __start_interrupts: |
| 39 | |
| 40 | .globl system_reset_pSeries; |
| 41 | system_reset_pSeries: |
| 42 | HMT_MEDIUM; |
| 43 | SET_SCRATCH0(r13) |
| 44 | #ifdef CONFIG_PPC_P7_NAP |
| 45 | BEGIN_FTR_SECTION |
| 46 | /* Running native on arch 2.06 or later, check if we are |
| 47 | * waking up from nap. We only handle no state loss and |
| 48 | * supervisor state loss. We do -not- handle hypervisor |
| 49 | * state loss at this time. |
| 50 | */ |
| 51 | mfspr r13,SPRN_SRR1 |
| 52 | rlwinm r13,r13,47-31,30,31 |
| 53 | cmpwi cr0,r13,1 |
| 54 | bne 1f |
| 55 | b .power7_wakeup_noloss |
| 56 | 1: cmpwi cr0,r13,2 |
| 57 | bne 1f |
| 58 | b .power7_wakeup_loss |
| 59 | /* Total loss of HV state is fatal, we could try to use the |
| 60 | * PIR to locate a PACA, then use an emergency stack etc... |
| 61 | * but for now, let's just stay stuck here |
| 62 | */ |
| 63 | 1: cmpwi cr0,r13,3 |
| 64 | beq . |
| 65 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE_206) |
| 66 | #endif /* CONFIG_PPC_P7_NAP */ |
| 67 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
| 68 | NOTEST, 0x100) |
| 69 | |
| 70 | . = 0x200 |
| 71 | machine_check_pSeries_1: |
| 72 | /* This is moved out of line as it can be patched by FW, but |
| 73 | * some code path might still want to branch into the original |
| 74 | * vector |
| 75 | */ |
| 76 | b machine_check_pSeries |
| 77 | |
| 78 | . = 0x300 |
| 79 | .globl data_access_pSeries |
| 80 | data_access_pSeries: |
| 81 | HMT_MEDIUM |
| 82 | SET_SCRATCH0(r13) |
| 83 | #ifndef CONFIG_POWER4_ONLY |
| 84 | BEGIN_FTR_SECTION |
| 85 | b data_access_check_stab |
| 86 | data_access_not_stab: |
| 87 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB) |
| 88 | #endif |
| 89 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, |
| 90 | KVMTEST, 0x300) |
| 91 | |
| 92 | . = 0x380 |
| 93 | .globl data_access_slb_pSeries |
| 94 | data_access_slb_pSeries: |
| 95 | HMT_MEDIUM |
| 96 | SET_SCRATCH0(r13) |
| 97 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) |
| 98 | std r3,PACA_EXSLB+EX_R3(r13) |
| 99 | mfspr r3,SPRN_DAR |
| 100 | #ifdef __DISABLED__ |
| 101 | /* Keep that around for when we re-implement dynamic VSIDs */ |
| 102 | cmpdi r3,0 |
| 103 | bge slb_miss_user_pseries |
| 104 | #endif /* __DISABLED__ */ |
| 105 | mfspr r12,SPRN_SRR1 |
| 106 | #ifndef CONFIG_RELOCATABLE |
| 107 | b .slb_miss_realmode |
| 108 | #else |
| 109 | /* |
| 110 | * We can't just use a direct branch to .slb_miss_realmode |
| 111 | * because the distance from here to there depends on where |
| 112 | * the kernel ends up being put. |
| 113 | */ |
| 114 | mfctr r11 |
| 115 | ld r10,PACAKBASE(r13) |
| 116 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 117 | mtctr r10 |
| 118 | bctr |
| 119 | #endif |
| 120 | |
| 121 | STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access) |
| 122 | |
| 123 | . = 0x480 |
| 124 | .globl instruction_access_slb_pSeries |
| 125 | instruction_access_slb_pSeries: |
| 126 | HMT_MEDIUM |
| 127 | SET_SCRATCH0(r13) |
| 128 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) |
| 129 | std r3,PACA_EXSLB+EX_R3(r13) |
| 130 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ |
| 131 | #ifdef __DISABLED__ |
| 132 | /* Keep that around for when we re-implement dynamic VSIDs */ |
| 133 | cmpdi r3,0 |
| 134 | bge slb_miss_user_pseries |
| 135 | #endif /* __DISABLED__ */ |
| 136 | mfspr r12,SPRN_SRR1 |
| 137 | #ifndef CONFIG_RELOCATABLE |
| 138 | b .slb_miss_realmode |
| 139 | #else |
| 140 | mfctr r11 |
| 141 | ld r10,PACAKBASE(r13) |
| 142 | LOAD_HANDLER(r10, .slb_miss_realmode) |
| 143 | mtctr r10 |
| 144 | bctr |
| 145 | #endif |
| 146 | |
| 147 | /* We open code these as we can't have a ". = x" (even with |
| 148 | * x = "." within a feature section |
| 149 | */ |
| 150 | . = 0x500; |
| 151 | .globl hardware_interrupt_pSeries; |
| 152 | .globl hardware_interrupt_hv; |
| 153 | hardware_interrupt_pSeries: |
| 154 | hardware_interrupt_hv: |
| 155 | BEGIN_FTR_SECTION |
| 156 | _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, |
| 157 | EXC_STD, SOFTEN_TEST) |
| 158 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) |
| 159 | FTR_SECTION_ELSE |
| 160 | _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, |
| 161 | EXC_HV, SOFTEN_TEST_HV) |
| 162 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) |
| 163 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_HVMODE_206) |
| 164 | |
| 165 | STD_EXCEPTION_PSERIES(0x600, 0x600, alignment) |
| 166 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) |
| 167 | |
| 168 | STD_EXCEPTION_PSERIES(0x700, 0x700, program_check) |
| 169 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) |
| 170 | |
| 171 | STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable) |
| 172 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) |
| 173 | |
| 174 | MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer) |
| 175 | MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer) |
| 176 | |
| 177 | STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a) |
| 178 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) |
| 179 | |
| 180 | STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b) |
| 181 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) |
| 182 | |
| 183 | . = 0xc00 |
| 184 | .globl system_call_pSeries |
| 185 | system_call_pSeries: |
| 186 | HMT_MEDIUM |
| 187 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 188 | SET_SCRATCH0(r13) |
| 189 | GET_PACA(r13) |
| 190 | std r9,PACA_EXGEN+EX_R9(r13) |
| 191 | std r10,PACA_EXGEN+EX_R10(r13) |
| 192 | mfcr r9 |
| 193 | KVMTEST(0xc00) |
| 194 | GET_SCRATCH0(r13) |
| 195 | #endif |
| 196 | BEGIN_FTR_SECTION |
| 197 | cmpdi r0,0x1ebe |
| 198 | beq- 1f |
| 199 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) |
| 200 | mr r9,r13 |
| 201 | GET_PACA(r13) |
| 202 | mfspr r11,SPRN_SRR0 |
| 203 | mfspr r12,SPRN_SRR1 |
| 204 | ld r10,PACAKBASE(r13) |
| 205 | LOAD_HANDLER(r10, system_call_entry) |
| 206 | mtspr SPRN_SRR0,r10 |
| 207 | ld r10,PACAKMSR(r13) |
| 208 | mtspr SPRN_SRR1,r10 |
| 209 | rfid |
| 210 | b . /* prevent speculative execution */ |
| 211 | |
| 212 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) |
| 213 | |
| 214 | /* Fast LE/BE switch system call */ |
| 215 | 1: mfspr r12,SPRN_SRR1 |
| 216 | xori r12,r12,MSR_LE |
| 217 | mtspr SPRN_SRR1,r12 |
| 218 | rfid /* return to userspace */ |
| 219 | b . |
| 220 | |
| 221 | STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step) |
| 222 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) |
| 223 | |
| 224 | /* At 0xe??? we have a bunch of hypervisor exceptions, we branch |
| 225 | * out of line to handle them |
| 226 | */ |
| 227 | . = 0xe00 |
| 228 | b h_data_storage_hv |
| 229 | . = 0xe20 |
| 230 | b h_instr_storage_hv |
| 231 | . = 0xe40 |
| 232 | b emulation_assist_hv |
| 233 | . = 0xe50 |
| 234 | b hmi_exception_hv |
| 235 | . = 0xe60 |
| 236 | b hmi_exception_hv |
| 237 | |
| 238 | /* We need to deal with the Altivec unavailable exception |
| 239 | * here which is at 0xf20, thus in the middle of the |
| 240 | * prolog code of the PerformanceMonitor one. A little |
| 241 | * trickery is thus necessary |
| 242 | */ |
| 243 | performance_monitor_pSeries_1: |
| 244 | . = 0xf00 |
| 245 | b performance_monitor_pSeries |
| 246 | |
| 247 | altivec_unavailable_pSeries_1: |
| 248 | . = 0xf20 |
| 249 | b altivec_unavailable_pSeries |
| 250 | |
| 251 | vsx_unavailable_pSeries_1: |
| 252 | . = 0xf40 |
| 253 | b vsx_unavailable_pSeries |
| 254 | |
| 255 | #ifdef CONFIG_CBE_RAS |
| 256 | STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) |
| 257 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) |
| 258 | #endif /* CONFIG_CBE_RAS */ |
| 259 | |
| 260 | STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint) |
| 261 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) |
| 262 | |
| 263 | #ifdef CONFIG_CBE_RAS |
| 264 | STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) |
| 265 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) |
| 266 | #endif /* CONFIG_CBE_RAS */ |
| 267 | |
| 268 | STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist) |
| 269 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) |
| 270 | |
| 271 | #ifdef CONFIG_CBE_RAS |
| 272 | STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) |
| 273 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) |
| 274 | #endif /* CONFIG_CBE_RAS */ |
| 275 | |
| 276 | . = 0x3000 |
| 277 | |
| 278 | /*** Out of line interrupts support ***/ |
| 279 | |
| 280 | /* moved from 0x200 */ |
| 281 | machine_check_pSeries: |
| 282 | .globl machine_check_fwnmi |
| 283 | machine_check_fwnmi: |
| 284 | HMT_MEDIUM |
| 285 | SET_SCRATCH0(r13) /* save r13 */ |
| 286 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, |
| 287 | EXC_STD, KVMTEST, 0x200) |
| 288 | KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) |
| 289 | |
| 290 | #ifndef CONFIG_POWER4_ONLY |
| 291 | /* moved from 0x300 */ |
| 292 | data_access_check_stab: |
| 293 | GET_PACA(r13) |
| 294 | std r9,PACA_EXSLB+EX_R9(r13) |
| 295 | std r10,PACA_EXSLB+EX_R10(r13) |
| 296 | mfspr r10,SPRN_DAR |
| 297 | mfspr r9,SPRN_DSISR |
| 298 | srdi r10,r10,60 |
| 299 | rlwimi r10,r9,16,0x20 |
| 300 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 301 | lbz r9,HSTATE_IN_GUEST(r13) |
| 302 | rlwimi r10,r9,8,0x300 |
| 303 | #endif |
| 304 | mfcr r9 |
| 305 | cmpwi r10,0x2c |
| 306 | beq do_stab_bolted_pSeries |
| 307 | mtcrf 0x80,r9 |
| 308 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 309 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 310 | b data_access_not_stab |
| 311 | do_stab_bolted_pSeries: |
| 312 | std r11,PACA_EXSLB+EX_R11(r13) |
| 313 | std r12,PACA_EXSLB+EX_R12(r13) |
| 314 | GET_SCRATCH0(r10) |
| 315 | std r10,PACA_EXSLB+EX_R13(r13) |
| 316 | EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD) |
| 317 | #endif /* CONFIG_POWER4_ONLY */ |
| 318 | |
| 319 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) |
| 320 | KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) |
| 321 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) |
| 322 | KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) |
| 323 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) |
| 324 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) |
| 325 | |
| 326 | .align 7 |
| 327 | /* moved from 0xe00 */ |
| 328 | STD_EXCEPTION_HV(., 0xe02, h_data_storage) |
| 329 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) |
| 330 | STD_EXCEPTION_HV(., 0xe22, h_instr_storage) |
| 331 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) |
| 332 | STD_EXCEPTION_HV(., 0xe42, emulation_assist) |
| 333 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) |
| 334 | STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */ |
| 335 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) |
| 336 | |
| 337 | /* moved from 0xf00 */ |
| 338 | STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor) |
| 339 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) |
| 340 | STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable) |
| 341 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) |
| 342 | STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable) |
| 343 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) |
| 344 | |
| 345 | /* |
| 346 | * An interrupt came in while soft-disabled; clear EE in SRR1, |
| 347 | * clear paca->hard_enabled and return. |
| 348 | */ |
| 349 | masked_interrupt: |
| 350 | stb r10,PACAHARDIRQEN(r13) |
| 351 | mtcrf 0x80,r9 |
| 352 | ld r9,PACA_EXGEN+EX_R9(r13) |
| 353 | mfspr r10,SPRN_SRR1 |
| 354 | rldicl r10,r10,48,1 /* clear MSR_EE */ |
| 355 | rotldi r10,r10,16 |
| 356 | mtspr SPRN_SRR1,r10 |
| 357 | ld r10,PACA_EXGEN+EX_R10(r13) |
| 358 | GET_SCRATCH0(r13) |
| 359 | rfid |
| 360 | b . |
| 361 | |
| 362 | masked_Hinterrupt: |
| 363 | stb r10,PACAHARDIRQEN(r13) |
| 364 | mtcrf 0x80,r9 |
| 365 | ld r9,PACA_EXGEN+EX_R9(r13) |
| 366 | mfspr r10,SPRN_HSRR1 |
| 367 | rldicl r10,r10,48,1 /* clear MSR_EE */ |
| 368 | rotldi r10,r10,16 |
| 369 | mtspr SPRN_HSRR1,r10 |
| 370 | ld r10,PACA_EXGEN+EX_R10(r13) |
| 371 | GET_SCRATCH0(r13) |
| 372 | hrfid |
| 373 | b . |
| 374 | |
| 375 | #ifdef CONFIG_PPC_PSERIES |
| 376 | /* |
| 377 | * Vectors for the FWNMI option. Share common code. |
| 378 | */ |
| 379 | .globl system_reset_fwnmi |
| 380 | .align 7 |
| 381 | system_reset_fwnmi: |
| 382 | HMT_MEDIUM |
| 383 | SET_SCRATCH0(r13) /* save r13 */ |
| 384 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
| 385 | NOTEST, 0x100) |
| 386 | |
| 387 | #endif /* CONFIG_PPC_PSERIES */ |
| 388 | |
| 389 | #ifdef __DISABLED__ |
| 390 | /* |
| 391 | * This is used for when the SLB miss handler has to go virtual, |
| 392 | * which doesn't happen for now anymore but will once we re-implement |
| 393 | * dynamic VSIDs for shared page tables |
| 394 | */ |
| 395 | slb_miss_user_pseries: |
| 396 | std r10,PACA_EXGEN+EX_R10(r13) |
| 397 | std r11,PACA_EXGEN+EX_R11(r13) |
| 398 | std r12,PACA_EXGEN+EX_R12(r13) |
| 399 | GET_SCRATCH0(r10) |
| 400 | ld r11,PACA_EXSLB+EX_R9(r13) |
| 401 | ld r12,PACA_EXSLB+EX_R3(r13) |
| 402 | std r10,PACA_EXGEN+EX_R13(r13) |
| 403 | std r11,PACA_EXGEN+EX_R9(r13) |
| 404 | std r12,PACA_EXGEN+EX_R3(r13) |
| 405 | clrrdi r12,r13,32 |
| 406 | mfmsr r10 |
| 407 | mfspr r11,SRR0 /* save SRR0 */ |
| 408 | ori r12,r12,slb_miss_user_common@l /* virt addr of handler */ |
| 409 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI |
| 410 | mtspr SRR0,r12 |
| 411 | mfspr r12,SRR1 /* and SRR1 */ |
| 412 | mtspr SRR1,r10 |
| 413 | rfid |
| 414 | b . /* prevent spec. execution */ |
| 415 | #endif /* __DISABLED__ */ |
| 416 | |
| 417 | /* KVM's trampoline code needs to be close to the interrupt handlers */ |
| 418 | |
| 419 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 420 | #include "../kvm/book3s_rmhandlers.S" |
| 421 | #endif |
| 422 | |
| 423 | .align 7 |
| 424 | .globl __end_interrupts |
| 425 | __end_interrupts: |
| 426 | |
| 427 | /* |
| 428 | * Code from here down to __end_handlers is invoked from the |
| 429 | * exception prologs above. Because the prologs assemble the |
| 430 | * addresses of these handlers using the LOAD_HANDLER macro, |
| 431 | * which uses an addi instruction, these handlers must be in |
| 432 | * the first 32k of the kernel image. |
| 433 | */ |
| 434 | |
| 435 | /*** Common interrupt handlers ***/ |
| 436 | |
| 437 | STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception) |
| 438 | |
| 439 | /* |
| 440 | * Machine check is different because we use a different |
| 441 | * save area: PACA_EXMC instead of PACA_EXGEN. |
| 442 | */ |
| 443 | .align 7 |
| 444 | .globl machine_check_common |
| 445 | machine_check_common: |
| 446 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) |
| 447 | FINISH_NAP |
| 448 | DISABLE_INTS |
| 449 | bl .save_nvgprs |
| 450 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 451 | bl .machine_check_exception |
| 452 | b .ret_from_except |
| 453 | |
| 454 | STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt) |
| 455 | STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception) |
| 456 | STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception) |
| 457 | STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception) |
| 458 | STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception) |
| 459 | STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception) |
| 460 | STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception) |
| 461 | STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception) |
| 462 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception) |
| 463 | #ifdef CONFIG_ALTIVEC |
| 464 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception) |
| 465 | #else |
| 466 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception) |
| 467 | #endif |
| 468 | #ifdef CONFIG_CBE_RAS |
| 469 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception) |
| 470 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception) |
| 471 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception) |
| 472 | #endif /* CONFIG_CBE_RAS */ |
| 473 | |
| 474 | .align 7 |
| 475 | system_call_entry: |
| 476 | b system_call_common |
| 477 | |
| 478 | /* |
| 479 | * Here we have detected that the kernel stack pointer is bad. |
| 480 | * R9 contains the saved CR, r13 points to the paca, |
| 481 | * r10 contains the (bad) kernel stack pointer, |
| 482 | * r11 and r12 contain the saved SRR0 and SRR1. |
| 483 | * We switch to using an emergency stack, save the registers there, |
| 484 | * and call kernel_bad_stack(), which panics. |
| 485 | */ |
| 486 | bad_stack: |
| 487 | ld r1,PACAEMERGSP(r13) |
| 488 | subi r1,r1,64+INT_FRAME_SIZE |
| 489 | std r9,_CCR(r1) |
| 490 | std r10,GPR1(r1) |
| 491 | std r11,_NIP(r1) |
| 492 | std r12,_MSR(r1) |
| 493 | mfspr r11,SPRN_DAR |
| 494 | mfspr r12,SPRN_DSISR |
| 495 | std r11,_DAR(r1) |
| 496 | std r12,_DSISR(r1) |
| 497 | mflr r10 |
| 498 | mfctr r11 |
| 499 | mfxer r12 |
| 500 | std r10,_LINK(r1) |
| 501 | std r11,_CTR(r1) |
| 502 | std r12,_XER(r1) |
| 503 | SAVE_GPR(0,r1) |
| 504 | SAVE_GPR(2,r1) |
| 505 | ld r10,EX_R3(r3) |
| 506 | std r10,GPR3(r1) |
| 507 | SAVE_GPR(4,r1) |
| 508 | SAVE_4GPRS(5,r1) |
| 509 | ld r9,EX_R9(r3) |
| 510 | ld r10,EX_R10(r3) |
| 511 | SAVE_2GPRS(9,r1) |
| 512 | ld r9,EX_R11(r3) |
| 513 | ld r10,EX_R12(r3) |
| 514 | ld r11,EX_R13(r3) |
| 515 | std r9,GPR11(r1) |
| 516 | std r10,GPR12(r1) |
| 517 | std r11,GPR13(r1) |
| 518 | BEGIN_FTR_SECTION |
| 519 | ld r10,EX_CFAR(r3) |
| 520 | std r10,ORIG_GPR3(r1) |
| 521 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) |
| 522 | SAVE_8GPRS(14,r1) |
| 523 | SAVE_10GPRS(22,r1) |
| 524 | lhz r12,PACA_TRAP_SAVE(r13) |
| 525 | std r12,_TRAP(r1) |
| 526 | addi r11,r1,INT_FRAME_SIZE |
| 527 | std r11,0(r1) |
| 528 | li r12,0 |
| 529 | std r12,0(r11) |
| 530 | ld r2,PACATOC(r13) |
| 531 | ld r11,exception_marker@toc(r2) |
| 532 | std r12,RESULT(r1) |
| 533 | std r11,STACK_FRAME_OVERHEAD-16(r1) |
| 534 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 535 | bl .kernel_bad_stack |
| 536 | b 1b |
| 537 | |
| 538 | /* |
| 539 | * Here r13 points to the paca, r9 contains the saved CR, |
| 540 | * SRR0 and SRR1 are saved in r11 and r12, |
| 541 | * r9 - r13 are saved in paca->exgen. |
| 542 | */ |
| 543 | .align 7 |
| 544 | .globl data_access_common |
| 545 | data_access_common: |
| 546 | mfspr r10,SPRN_DAR |
| 547 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 548 | mfspr r10,SPRN_DSISR |
| 549 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 550 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) |
| 551 | ld r3,PACA_EXGEN+EX_DAR(r13) |
| 552 | lwz r4,PACA_EXGEN+EX_DSISR(r13) |
| 553 | li r5,0x300 |
| 554 | b .do_hash_page /* Try to handle as hpte fault */ |
| 555 | |
| 556 | .align 7 |
| 557 | .globl h_data_storage_common |
| 558 | h_data_storage_common: |
| 559 | mfspr r10,SPRN_HDAR |
| 560 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 561 | mfspr r10,SPRN_HDSISR |
| 562 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 563 | EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) |
| 564 | bl .save_nvgprs |
| 565 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 566 | bl .unknown_exception |
| 567 | b .ret_from_except |
| 568 | |
| 569 | .align 7 |
| 570 | .globl instruction_access_common |
| 571 | instruction_access_common: |
| 572 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) |
| 573 | ld r3,_NIP(r1) |
| 574 | andis. r4,r12,0x5820 |
| 575 | li r5,0x400 |
| 576 | b .do_hash_page /* Try to handle as hpte fault */ |
| 577 | |
| 578 | STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception) |
| 579 | |
| 580 | /* |
| 581 | * Here is the common SLB miss user that is used when going to virtual |
| 582 | * mode for SLB misses, that is currently not used |
| 583 | */ |
| 584 | #ifdef __DISABLED__ |
| 585 | .align 7 |
| 586 | .globl slb_miss_user_common |
| 587 | slb_miss_user_common: |
| 588 | mflr r10 |
| 589 | std r3,PACA_EXGEN+EX_DAR(r13) |
| 590 | stw r9,PACA_EXGEN+EX_CCR(r13) |
| 591 | std r10,PACA_EXGEN+EX_LR(r13) |
| 592 | std r11,PACA_EXGEN+EX_SRR0(r13) |
| 593 | bl .slb_allocate_user |
| 594 | |
| 595 | ld r10,PACA_EXGEN+EX_LR(r13) |
| 596 | ld r3,PACA_EXGEN+EX_R3(r13) |
| 597 | lwz r9,PACA_EXGEN+EX_CCR(r13) |
| 598 | ld r11,PACA_EXGEN+EX_SRR0(r13) |
| 599 | mtlr r10 |
| 600 | beq- slb_miss_fault |
| 601 | |
| 602 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
| 603 | beq- unrecov_user_slb |
| 604 | mfmsr r10 |
| 605 | |
| 606 | .machine push |
| 607 | .machine "power4" |
| 608 | mtcrf 0x80,r9 |
| 609 | .machine pop |
| 610 | |
| 611 | clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */ |
| 612 | mtmsrd r10,1 |
| 613 | |
| 614 | mtspr SRR0,r11 |
| 615 | mtspr SRR1,r12 |
| 616 | |
| 617 | ld r9,PACA_EXGEN+EX_R9(r13) |
| 618 | ld r10,PACA_EXGEN+EX_R10(r13) |
| 619 | ld r11,PACA_EXGEN+EX_R11(r13) |
| 620 | ld r12,PACA_EXGEN+EX_R12(r13) |
| 621 | ld r13,PACA_EXGEN+EX_R13(r13) |
| 622 | rfid |
| 623 | b . |
| 624 | |
| 625 | slb_miss_fault: |
| 626 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN) |
| 627 | ld r4,PACA_EXGEN+EX_DAR(r13) |
| 628 | li r5,0 |
| 629 | std r4,_DAR(r1) |
| 630 | std r5,_DSISR(r1) |
| 631 | b handle_page_fault |
| 632 | |
| 633 | unrecov_user_slb: |
| 634 | EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN) |
| 635 | DISABLE_INTS |
| 636 | bl .save_nvgprs |
| 637 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 638 | bl .unrecoverable_exception |
| 639 | b 1b |
| 640 | |
| 641 | #endif /* __DISABLED__ */ |
| 642 | |
| 643 | |
| 644 | /* |
| 645 | * r13 points to the PACA, r9 contains the saved CR, |
| 646 | * r12 contain the saved SRR1, SRR0 is still ready for return |
| 647 | * r3 has the faulting address |
| 648 | * r9 - r13 are saved in paca->exslb. |
| 649 | * r3 is saved in paca->slb_r3 |
| 650 | * We assume we aren't going to take any exceptions during this procedure. |
| 651 | */ |
| 652 | _GLOBAL(slb_miss_realmode) |
| 653 | mflr r10 |
| 654 | #ifdef CONFIG_RELOCATABLE |
| 655 | mtctr r11 |
| 656 | #endif |
| 657 | |
| 658 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ |
| 659 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ |
| 660 | |
| 661 | bl .slb_allocate_realmode |
| 662 | |
| 663 | /* All done -- return from exception. */ |
| 664 | |
| 665 | ld r10,PACA_EXSLB+EX_LR(r13) |
| 666 | ld r3,PACA_EXSLB+EX_R3(r13) |
| 667 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ |
| 668 | #ifdef CONFIG_PPC_ISERIES |
| 669 | BEGIN_FW_FTR_SECTION |
| 670 | ld r11,PACALPPACAPTR(r13) |
| 671 | ld r11,LPPACASRR0(r11) /* get SRR0 value */ |
| 672 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) |
| 673 | #endif /* CONFIG_PPC_ISERIES */ |
| 674 | |
| 675 | mtlr r10 |
| 676 | |
| 677 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
| 678 | beq- 2f |
| 679 | |
| 680 | .machine push |
| 681 | .machine "power4" |
| 682 | mtcrf 0x80,r9 |
| 683 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ |
| 684 | .machine pop |
| 685 | |
| 686 | #ifdef CONFIG_PPC_ISERIES |
| 687 | BEGIN_FW_FTR_SECTION |
| 688 | mtspr SPRN_SRR0,r11 |
| 689 | mtspr SPRN_SRR1,r12 |
| 690 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) |
| 691 | #endif /* CONFIG_PPC_ISERIES */ |
| 692 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 693 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 694 | ld r11,PACA_EXSLB+EX_R11(r13) |
| 695 | ld r12,PACA_EXSLB+EX_R12(r13) |
| 696 | ld r13,PACA_EXSLB+EX_R13(r13) |
| 697 | rfid |
| 698 | b . /* prevent speculative execution */ |
| 699 | |
| 700 | 2: |
| 701 | #ifdef CONFIG_PPC_ISERIES |
| 702 | BEGIN_FW_FTR_SECTION |
| 703 | b unrecov_slb |
| 704 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) |
| 705 | #endif /* CONFIG_PPC_ISERIES */ |
| 706 | mfspr r11,SPRN_SRR0 |
| 707 | ld r10,PACAKBASE(r13) |
| 708 | LOAD_HANDLER(r10,unrecov_slb) |
| 709 | mtspr SPRN_SRR0,r10 |
| 710 | ld r10,PACAKMSR(r13) |
| 711 | mtspr SPRN_SRR1,r10 |
| 712 | rfid |
| 713 | b . |
| 714 | |
| 715 | unrecov_slb: |
| 716 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) |
| 717 | DISABLE_INTS |
| 718 | bl .save_nvgprs |
| 719 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 720 | bl .unrecoverable_exception |
| 721 | b 1b |
| 722 | |
| 723 | .align 7 |
| 724 | .globl hardware_interrupt_common |
| 725 | .globl hardware_interrupt_entry |
| 726 | hardware_interrupt_common: |
| 727 | EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN) |
| 728 | FINISH_NAP |
| 729 | hardware_interrupt_entry: |
| 730 | DISABLE_INTS |
| 731 | BEGIN_FTR_SECTION |
| 732 | bl .ppc64_runlatch_on |
| 733 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) |
| 734 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 735 | bl .do_IRQ |
| 736 | b .ret_from_except_lite |
| 737 | |
| 738 | #ifdef CONFIG_PPC_970_NAP |
| 739 | power4_fixup_nap: |
| 740 | andc r9,r9,r10 |
| 741 | std r9,TI_LOCAL_FLAGS(r11) |
| 742 | ld r10,_LINK(r1) /* make idle task do the */ |
| 743 | std r10,_NIP(r1) /* equivalent of a blr */ |
| 744 | blr |
| 745 | #endif |
| 746 | |
| 747 | .align 7 |
| 748 | .globl alignment_common |
| 749 | alignment_common: |
| 750 | mfspr r10,SPRN_DAR |
| 751 | std r10,PACA_EXGEN+EX_DAR(r13) |
| 752 | mfspr r10,SPRN_DSISR |
| 753 | stw r10,PACA_EXGEN+EX_DSISR(r13) |
| 754 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) |
| 755 | ld r3,PACA_EXGEN+EX_DAR(r13) |
| 756 | lwz r4,PACA_EXGEN+EX_DSISR(r13) |
| 757 | std r3,_DAR(r1) |
| 758 | std r4,_DSISR(r1) |
| 759 | bl .save_nvgprs |
| 760 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 761 | ENABLE_INTS |
| 762 | bl .alignment_exception |
| 763 | b .ret_from_except |
| 764 | |
| 765 | .align 7 |
| 766 | .globl program_check_common |
| 767 | program_check_common: |
| 768 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) |
| 769 | bl .save_nvgprs |
| 770 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 771 | ENABLE_INTS |
| 772 | bl .program_check_exception |
| 773 | b .ret_from_except |
| 774 | |
| 775 | .align 7 |
| 776 | .globl fp_unavailable_common |
| 777 | fp_unavailable_common: |
| 778 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) |
| 779 | bne 1f /* if from user, just load it up */ |
| 780 | bl .save_nvgprs |
| 781 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 782 | ENABLE_INTS |
| 783 | bl .kernel_fp_unavailable_exception |
| 784 | BUG_OPCODE |
| 785 | 1: bl .load_up_fpu |
| 786 | b fast_exception_return |
| 787 | |
| 788 | .align 7 |
| 789 | .globl altivec_unavailable_common |
| 790 | altivec_unavailable_common: |
| 791 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) |
| 792 | #ifdef CONFIG_ALTIVEC |
| 793 | BEGIN_FTR_SECTION |
| 794 | beq 1f |
| 795 | bl .load_up_altivec |
| 796 | b fast_exception_return |
| 797 | 1: |
| 798 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) |
| 799 | #endif |
| 800 | bl .save_nvgprs |
| 801 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 802 | ENABLE_INTS |
| 803 | bl .altivec_unavailable_exception |
| 804 | b .ret_from_except |
| 805 | |
| 806 | .align 7 |
| 807 | .globl vsx_unavailable_common |
| 808 | vsx_unavailable_common: |
| 809 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) |
| 810 | #ifdef CONFIG_VSX |
| 811 | BEGIN_FTR_SECTION |
| 812 | bne .load_up_vsx |
| 813 | 1: |
| 814 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) |
| 815 | #endif |
| 816 | bl .save_nvgprs |
| 817 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 818 | ENABLE_INTS |
| 819 | bl .vsx_unavailable_exception |
| 820 | b .ret_from_except |
| 821 | |
| 822 | .align 7 |
| 823 | .globl __end_handlers |
| 824 | __end_handlers: |
| 825 | |
| 826 | /* |
| 827 | * Return from an exception with minimal checks. |
| 828 | * The caller is assumed to have done EXCEPTION_PROLOG_COMMON. |
| 829 | * If interrupts have been enabled, or anything has been |
| 830 | * done that might have changed the scheduling status of |
| 831 | * any task or sent any task a signal, you should use |
| 832 | * ret_from_except or ret_from_except_lite instead of this. |
| 833 | */ |
| 834 | fast_exc_return_irq: /* restores irq state too */ |
| 835 | ld r3,SOFTE(r1) |
| 836 | TRACE_AND_RESTORE_IRQ(r3); |
| 837 | ld r12,_MSR(r1) |
| 838 | rldicl r4,r12,49,63 /* get MSR_EE to LSB */ |
| 839 | stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */ |
| 840 | b 1f |
| 841 | |
| 842 | .globl fast_exception_return |
| 843 | fast_exception_return: |
| 844 | ld r12,_MSR(r1) |
| 845 | 1: ld r11,_NIP(r1) |
| 846 | andi. r3,r12,MSR_RI /* check if RI is set */ |
| 847 | beq- unrecov_fer |
| 848 | |
| 849 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
| 850 | andi. r3,r12,MSR_PR |
| 851 | beq 2f |
| 852 | ACCOUNT_CPU_USER_EXIT(r3, r4) |
| 853 | 2: |
| 854 | #endif |
| 855 | |
| 856 | ld r3,_CCR(r1) |
| 857 | ld r4,_LINK(r1) |
| 858 | ld r5,_CTR(r1) |
| 859 | ld r6,_XER(r1) |
| 860 | mtcr r3 |
| 861 | mtlr r4 |
| 862 | mtctr r5 |
| 863 | mtxer r6 |
| 864 | REST_GPR(0, r1) |
| 865 | REST_8GPRS(2, r1) |
| 866 | |
| 867 | mfmsr r10 |
| 868 | rldicl r10,r10,48,1 /* clear EE */ |
| 869 | rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */ |
| 870 | mtmsrd r10,1 |
| 871 | |
| 872 | mtspr SPRN_SRR1,r12 |
| 873 | mtspr SPRN_SRR0,r11 |
| 874 | REST_4GPRS(10, r1) |
| 875 | ld r1,GPR1(r1) |
| 876 | rfid |
| 877 | b . /* prevent speculative execution */ |
| 878 | |
| 879 | unrecov_fer: |
| 880 | bl .save_nvgprs |
| 881 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
| 882 | bl .unrecoverable_exception |
| 883 | b 1b |
| 884 | |
| 885 | |
| 886 | /* |
| 887 | * Hash table stuff |
| 888 | */ |
| 889 | .align 7 |
| 890 | _STATIC(do_hash_page) |
| 891 | std r3,_DAR(r1) |
| 892 | std r4,_DSISR(r1) |
| 893 | |
| 894 | andis. r0,r4,0xa410 /* weird error? */ |
| 895 | bne- handle_page_fault /* if not, try to insert a HPTE */ |
| 896 | andis. r0,r4,DSISR_DABRMATCH@h |
| 897 | bne- handle_dabr_fault |
| 898 | |
| 899 | BEGIN_FTR_SECTION |
| 900 | andis. r0,r4,0x0020 /* Is it a segment table fault? */ |
| 901 | bne- do_ste_alloc /* If so handle it */ |
| 902 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB) |
| 903 | |
| 904 | clrrdi r11,r1,THREAD_SHIFT |
| 905 | lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ |
| 906 | andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ |
| 907 | bne 77f /* then don't call hash_page now */ |
| 908 | |
| 909 | /* |
| 910 | * On iSeries, we soft-disable interrupts here, then |
| 911 | * hard-enable interrupts so that the hash_page code can spin on |
| 912 | * the hash_table_lock without problems on a shared processor. |
| 913 | */ |
| 914 | DISABLE_INTS |
| 915 | |
| 916 | /* |
| 917 | * Currently, trace_hardirqs_off() will be called by DISABLE_INTS |
| 918 | * and will clobber volatile registers when irq tracing is enabled |
| 919 | * so we need to reload them. It may be possible to be smarter here |
| 920 | * and move the irq tracing elsewhere but let's keep it simple for |
| 921 | * now |
| 922 | */ |
| 923 | #ifdef CONFIG_TRACE_IRQFLAGS |
| 924 | ld r3,_DAR(r1) |
| 925 | ld r4,_DSISR(r1) |
| 926 | ld r5,_TRAP(r1) |
| 927 | ld r12,_MSR(r1) |
| 928 | clrrdi r5,r5,4 |
| 929 | #endif /* CONFIG_TRACE_IRQFLAGS */ |
| 930 | /* |
| 931 | * We need to set the _PAGE_USER bit if MSR_PR is set or if we are |
| 932 | * accessing a userspace segment (even from the kernel). We assume |
| 933 | * kernel addresses always have the high bit set. |
| 934 | */ |
| 935 | rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */ |
| 936 | rotldi r0,r3,15 /* Move high bit into MSR_PR posn */ |
| 937 | orc r0,r12,r0 /* MSR_PR | ~high_bit */ |
| 938 | rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */ |
| 939 | ori r4,r4,1 /* add _PAGE_PRESENT */ |
| 940 | rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */ |
| 941 | |
| 942 | /* |
| 943 | * r3 contains the faulting address |
| 944 | * r4 contains the required access permissions |
| 945 | * r5 contains the trap number |
| 946 | * |
| 947 | * at return r3 = 0 for success |
| 948 | */ |
| 949 | bl .hash_page /* build HPTE if possible */ |
| 950 | cmpdi r3,0 /* see if hash_page succeeded */ |
| 951 | |
| 952 | BEGIN_FW_FTR_SECTION |
| 953 | /* |
| 954 | * If we had interrupts soft-enabled at the point where the |
| 955 | * DSI/ISI occurred, and an interrupt came in during hash_page, |
| 956 | * handle it now. |
| 957 | * We jump to ret_from_except_lite rather than fast_exception_return |
| 958 | * because ret_from_except_lite will check for and handle pending |
| 959 | * interrupts if necessary. |
| 960 | */ |
| 961 | beq 13f |
| 962 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) |
| 963 | |
| 964 | BEGIN_FW_FTR_SECTION |
| 965 | /* |
| 966 | * Here we have interrupts hard-disabled, so it is sufficient |
| 967 | * to restore paca->{soft,hard}_enable and get out. |
| 968 | */ |
| 969 | beq fast_exc_return_irq /* Return from exception on success */ |
| 970 | END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) |
| 971 | |
| 972 | /* For a hash failure, we don't bother re-enabling interrupts */ |
| 973 | ble- 12f |
| 974 | |
| 975 | /* |
| 976 | * hash_page couldn't handle it, set soft interrupt enable back |
| 977 | * to what it was before the trap. Note that .arch_local_irq_restore |
| 978 | * handles any interrupts pending at this point. |
| 979 | */ |
| 980 | ld r3,SOFTE(r1) |
| 981 | TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f) |
| 982 | bl .arch_local_irq_restore |
| 983 | b 11f |
| 984 | |
| 985 | /* We have a data breakpoint exception - handle it */ |
| 986 | handle_dabr_fault: |
| 987 | bl .save_nvgprs |
| 988 | ld r4,_DAR(r1) |
| 989 | ld r5,_DSISR(r1) |
| 990 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 991 | bl .do_dabr |
| 992 | b .ret_from_except_lite |
| 993 | |
| 994 | /* Here we have a page fault that hash_page can't handle. */ |
| 995 | handle_page_fault: |
| 996 | ENABLE_INTS |
| 997 | 11: ld r4,_DAR(r1) |
| 998 | ld r5,_DSISR(r1) |
| 999 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1000 | bl .do_page_fault |
| 1001 | cmpdi r3,0 |
| 1002 | beq+ 13f |
| 1003 | bl .save_nvgprs |
| 1004 | mr r5,r3 |
| 1005 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1006 | lwz r4,_DAR(r1) |
| 1007 | bl .bad_page_fault |
| 1008 | b .ret_from_except |
| 1009 | |
| 1010 | 13: b .ret_from_except_lite |
| 1011 | |
| 1012 | /* We have a page fault that hash_page could handle but HV refused |
| 1013 | * the PTE insertion |
| 1014 | */ |
| 1015 | 12: bl .save_nvgprs |
| 1016 | mr r5,r3 |
| 1017 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1018 | ld r4,_DAR(r1) |
| 1019 | bl .low_hash_fault |
| 1020 | b .ret_from_except |
| 1021 | |
| 1022 | /* |
| 1023 | * We come here as a result of a DSI at a point where we don't want |
| 1024 | * to call hash_page, such as when we are accessing memory (possibly |
| 1025 | * user memory) inside a PMU interrupt that occurred while interrupts |
| 1026 | * were soft-disabled. We want to invoke the exception handler for |
| 1027 | * the access, or panic if there isn't a handler. |
| 1028 | */ |
| 1029 | 77: bl .save_nvgprs |
| 1030 | mr r4,r3 |
| 1031 | addi r3,r1,STACK_FRAME_OVERHEAD |
| 1032 | li r5,SIGSEGV |
| 1033 | bl .bad_page_fault |
| 1034 | b .ret_from_except |
| 1035 | |
| 1036 | /* here we have a segment miss */ |
| 1037 | do_ste_alloc: |
| 1038 | bl .ste_allocate /* try to insert stab entry */ |
| 1039 | cmpdi r3,0 |
| 1040 | bne- handle_page_fault |
| 1041 | b fast_exception_return |
| 1042 | |
| 1043 | /* |
| 1044 | * r13 points to the PACA, r9 contains the saved CR, |
| 1045 | * r11 and r12 contain the saved SRR0 and SRR1. |
| 1046 | * r9 - r13 are saved in paca->exslb. |
| 1047 | * We assume we aren't going to take any exceptions during this procedure. |
| 1048 | * We assume (DAR >> 60) == 0xc. |
| 1049 | */ |
| 1050 | .align 7 |
| 1051 | _GLOBAL(do_stab_bolted) |
| 1052 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ |
| 1053 | std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */ |
| 1054 | |
| 1055 | /* Hash to the primary group */ |
| 1056 | ld r10,PACASTABVIRT(r13) |
| 1057 | mfspr r11,SPRN_DAR |
| 1058 | srdi r11,r11,28 |
| 1059 | rldimi r10,r11,7,52 /* r10 = first ste of the group */ |
| 1060 | |
| 1061 | /* Calculate VSID */ |
| 1062 | /* This is a kernel address, so protovsid = ESID */ |
| 1063 | ASM_VSID_SCRAMBLE(r11, r9, 256M) |
| 1064 | rldic r9,r11,12,16 /* r9 = vsid << 12 */ |
| 1065 | |
| 1066 | /* Search the primary group for a free entry */ |
| 1067 | 1: ld r11,0(r10) /* Test valid bit of the current ste */ |
| 1068 | andi. r11,r11,0x80 |
| 1069 | beq 2f |
| 1070 | addi r10,r10,16 |
| 1071 | andi. r11,r10,0x70 |
| 1072 | bne 1b |
| 1073 | |
| 1074 | /* Stick for only searching the primary group for now. */ |
| 1075 | /* At least for now, we use a very simple random castout scheme */ |
| 1076 | /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ |
| 1077 | mftb r11 |
| 1078 | rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */ |
| 1079 | ori r11,r11,0x10 |
| 1080 | |
| 1081 | /* r10 currently points to an ste one past the group of interest */ |
| 1082 | /* make it point to the randomly selected entry */ |
| 1083 | subi r10,r10,128 |
| 1084 | or r10,r10,r11 /* r10 is the entry to invalidate */ |
| 1085 | |
| 1086 | isync /* mark the entry invalid */ |
| 1087 | ld r11,0(r10) |
| 1088 | rldicl r11,r11,56,1 /* clear the valid bit */ |
| 1089 | rotldi r11,r11,8 |
| 1090 | std r11,0(r10) |
| 1091 | sync |
| 1092 | |
| 1093 | clrrdi r11,r11,28 /* Get the esid part of the ste */ |
| 1094 | slbie r11 |
| 1095 | |
| 1096 | 2: std r9,8(r10) /* Store the vsid part of the ste */ |
| 1097 | eieio |
| 1098 | |
| 1099 | mfspr r11,SPRN_DAR /* Get the new esid */ |
| 1100 | clrrdi r11,r11,28 /* Permits a full 32b of ESID */ |
| 1101 | ori r11,r11,0x90 /* Turn on valid and kp */ |
| 1102 | std r11,0(r10) /* Put new entry back into the stab */ |
| 1103 | |
| 1104 | sync |
| 1105 | |
| 1106 | /* All done -- return from exception. */ |
| 1107 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ |
| 1108 | ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */ |
| 1109 | |
| 1110 | andi. r10,r12,MSR_RI |
| 1111 | beq- unrecov_slb |
| 1112 | |
| 1113 | mtcrf 0x80,r9 /* restore CR */ |
| 1114 | |
| 1115 | mfmsr r10 |
| 1116 | clrrdi r10,r10,2 |
| 1117 | mtmsrd r10,1 |
| 1118 | |
| 1119 | mtspr SPRN_SRR0,r11 |
| 1120 | mtspr SPRN_SRR1,r12 |
| 1121 | ld r9,PACA_EXSLB+EX_R9(r13) |
| 1122 | ld r10,PACA_EXSLB+EX_R10(r13) |
| 1123 | ld r11,PACA_EXSLB+EX_R11(r13) |
| 1124 | ld r12,PACA_EXSLB+EX_R12(r13) |
| 1125 | ld r13,PACA_EXSLB+EX_R13(r13) |
| 1126 | rfid |
| 1127 | b . /* prevent speculative execution */ |
| 1128 | |
| 1129 | #ifdef CONFIG_PPC_PSERIES |
| 1130 | /* |
| 1131 | * Data area reserved for FWNMI option. |
| 1132 | * This address (0x7000) is fixed by the RPA. |
| 1133 | */ |
| 1134 | .= 0x7000 |
| 1135 | .globl fwnmi_data_area |
| 1136 | fwnmi_data_area: |
| 1137 | #endif /* CONFIG_PPC_PSERIES */ |
| 1138 | |
| 1139 | /* iSeries does not use the FWNMI stuff, so it is safe to put |
| 1140 | * this here, even if we later allow kernels that will boot on |
| 1141 | * both pSeries and iSeries */ |
| 1142 | #ifdef CONFIG_PPC_ISERIES |
| 1143 | . = LPARMAP_PHYS |
| 1144 | .globl xLparMap |
| 1145 | xLparMap: |
| 1146 | .quad HvEsidsToMap /* xNumberEsids */ |
| 1147 | .quad HvRangesToMap /* xNumberRanges */ |
| 1148 | .quad STAB0_PAGE /* xSegmentTableOffs */ |
| 1149 | .zero 40 /* xRsvd */ |
| 1150 | /* xEsids (HvEsidsToMap entries of 2 quads) */ |
| 1151 | .quad PAGE_OFFSET_ESID /* xKernelEsid */ |
| 1152 | .quad PAGE_OFFSET_VSID /* xKernelVsid */ |
| 1153 | .quad VMALLOC_START_ESID /* xKernelEsid */ |
| 1154 | .quad VMALLOC_START_VSID /* xKernelVsid */ |
| 1155 | /* xRanges (HvRangesToMap entries of 3 quads) */ |
| 1156 | .quad HvPagesToMap /* xPages */ |
| 1157 | .quad 0 /* xOffset */ |
| 1158 | .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */ |
| 1159 | |
| 1160 | #endif /* CONFIG_PPC_ISERIES */ |
| 1161 | |
| 1162 | #ifdef CONFIG_PPC_PSERIES |
| 1163 | . = 0x8000 |
| 1164 | #endif /* CONFIG_PPC_PSERIES */ |
| 1165 | |
| 1166 | /* |
| 1167 | * Space for CPU0's segment table. |
| 1168 | * |
| 1169 | * On iSeries, the hypervisor must fill in at least one entry before |
| 1170 | * we get control (with relocate on). The address is given to the hv |
| 1171 | * as a page number (see xLparMap above), so this must be at a |
| 1172 | * fixed address (the linker can't compute (u64)&initial_stab >> |
| 1173 | * PAGE_SHIFT). |
| 1174 | */ |
| 1175 | . = STAB0_OFFSET /* 0x8000 */ |
| 1176 | .globl initial_stab |
| 1177 | initial_stab: |
| 1178 | .space 4096 |