| 1 | /* |
| 2 | * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) |
| 3 | * |
| 4 | * Modifications for ppc64: |
| 5 | * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; either version |
| 10 | * 2 of the License, or (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/string.h> |
| 14 | #include <linux/sched.h> |
| 15 | #include <linux/threads.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/export.h> |
| 18 | #include <linux/jump_label.h> |
| 19 | |
| 20 | #include <asm/oprofile_impl.h> |
| 21 | #include <asm/cputable.h> |
| 22 | #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */ |
| 23 | #include <asm/mmu.h> |
| 24 | #include <asm/setup.h> |
| 25 | |
| 26 | static struct cpu_spec the_cpu_spec __read_mostly; |
| 27 | |
| 28 | struct cpu_spec* cur_cpu_spec __read_mostly = NULL; |
| 29 | EXPORT_SYMBOL(cur_cpu_spec); |
| 30 | |
| 31 | /* The platform string corresponding to the real PVR */ |
| 32 | const char *powerpc_base_platform; |
| 33 | |
| 34 | /* NOTE: |
| 35 | * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's |
| 36 | * the responsibility of the appropriate CPU save/restore functions to |
| 37 | * eventually copy these settings over. Those save/restore aren't yet |
| 38 | * part of the cputable though. That has to be fixed for both ppc32 |
| 39 | * and ppc64 |
| 40 | */ |
| 41 | #ifdef CONFIG_PPC32 |
| 42 | extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); |
| 43 | extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); |
| 44 | extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); |
| 45 | extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); |
| 46 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); |
| 47 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); |
| 48 | extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); |
| 49 | extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); |
| 50 | extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); |
| 51 | extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); |
| 52 | extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); |
| 53 | extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); |
| 54 | extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); |
| 55 | extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); |
| 56 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); |
| 57 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); |
| 58 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); |
| 59 | extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); |
| 60 | extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); |
| 61 | extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); |
| 62 | extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); |
| 63 | extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); |
| 64 | #endif /* CONFIG_PPC32 */ |
| 65 | #ifdef CONFIG_PPC64 |
| 66 | extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); |
| 67 | extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); |
| 68 | extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); |
| 69 | extern void __restore_cpu_pa6t(void); |
| 70 | extern void __restore_cpu_ppc970(void); |
| 71 | extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); |
| 72 | extern void __restore_cpu_power7(void); |
| 73 | extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec); |
| 74 | extern void __restore_cpu_power8(void); |
| 75 | extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec); |
| 76 | extern void __restore_cpu_power9(void); |
| 77 | extern void __flush_tlb_power7(unsigned int action); |
| 78 | extern void __flush_tlb_power8(unsigned int action); |
| 79 | extern void __flush_tlb_power9(unsigned int action); |
| 80 | extern long __machine_check_early_realmode_p7(struct pt_regs *regs); |
| 81 | extern long __machine_check_early_realmode_p8(struct pt_regs *regs); |
| 82 | extern long __machine_check_early_realmode_p9(struct pt_regs *regs); |
| 83 | #endif /* CONFIG_PPC64 */ |
| 84 | #if defined(CONFIG_E500) |
| 85 | extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); |
| 86 | extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); |
| 87 | extern void __restore_cpu_e5500(void); |
| 88 | extern void __restore_cpu_e6500(void); |
| 89 | #endif /* CONFIG_E500 */ |
| 90 | |
| 91 | /* This table only contains "desktop" CPUs, it need to be filled with embedded |
| 92 | * ones as well... |
| 93 | */ |
| 94 | #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ |
| 95 | PPC_FEATURE_HAS_MMU) |
| 96 | #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) |
| 97 | #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) |
| 98 | #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ |
| 99 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) |
| 100 | #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ |
| 101 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) |
| 102 | #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ |
| 103 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ |
| 104 | PPC_FEATURE_TRUE_LE | \ |
| 105 | PPC_FEATURE_PSERIES_PERFMON_COMPAT) |
| 106 | #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ |
| 107 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ |
| 108 | PPC_FEATURE_TRUE_LE | \ |
| 109 | PPC_FEATURE_PSERIES_PERFMON_COMPAT) |
| 110 | #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) |
| 111 | #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ |
| 112 | PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ |
| 113 | PPC_FEATURE_TRUE_LE | \ |
| 114 | PPC_FEATURE_PSERIES_PERFMON_COMPAT) |
| 115 | #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ |
| 116 | PPC_FEATURE2_HTM_COMP | \ |
| 117 | PPC_FEATURE2_HTM_NOSC_COMP | \ |
| 118 | PPC_FEATURE2_DSCR | \ |
| 119 | PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ |
| 120 | PPC_FEATURE2_VEC_CRYPTO) |
| 121 | #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ |
| 122 | PPC_FEATURE_TRUE_LE | \ |
| 123 | PPC_FEATURE_HAS_ALTIVEC_COMP) |
| 124 | #define COMMON_USER_POWER9 COMMON_USER_POWER8 |
| 125 | #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ |
| 126 | PPC_FEATURE2_ARCH_3_00 | \ |
| 127 | PPC_FEATURE2_HAS_IEEE128 | \ |
| 128 | PPC_FEATURE2_DARN ) |
| 129 | |
| 130 | #ifdef CONFIG_PPC_BOOK3E_64 |
| 131 | #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) |
| 132 | #else |
| 133 | #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ |
| 134 | PPC_FEATURE_BOOKE) |
| 135 | #endif |
| 136 | |
| 137 | static struct cpu_spec __initdata cpu_specs[] = { |
| 138 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 139 | { /* Power4 */ |
| 140 | .pvr_mask = 0xffff0000, |
| 141 | .pvr_value = 0x00350000, |
| 142 | .cpu_name = "POWER4 (gp)", |
| 143 | .cpu_features = CPU_FTRS_POWER4, |
| 144 | .cpu_user_features = COMMON_USER_POWER4, |
| 145 | .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, |
| 146 | .icache_bsize = 128, |
| 147 | .dcache_bsize = 128, |
| 148 | .num_pmcs = 8, |
| 149 | .pmc_type = PPC_PMC_IBM, |
| 150 | .oprofile_cpu_type = "ppc64/power4", |
| 151 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 152 | .platform = "power4", |
| 153 | }, |
| 154 | { /* Power4+ */ |
| 155 | .pvr_mask = 0xffff0000, |
| 156 | .pvr_value = 0x00380000, |
| 157 | .cpu_name = "POWER4+ (gq)", |
| 158 | .cpu_features = CPU_FTRS_POWER4, |
| 159 | .cpu_user_features = COMMON_USER_POWER4, |
| 160 | .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA, |
| 161 | .icache_bsize = 128, |
| 162 | .dcache_bsize = 128, |
| 163 | .num_pmcs = 8, |
| 164 | .pmc_type = PPC_PMC_IBM, |
| 165 | .oprofile_cpu_type = "ppc64/power4", |
| 166 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 167 | .platform = "power4", |
| 168 | }, |
| 169 | { /* PPC970 */ |
| 170 | .pvr_mask = 0xffff0000, |
| 171 | .pvr_value = 0x00390000, |
| 172 | .cpu_name = "PPC970", |
| 173 | .cpu_features = CPU_FTRS_PPC970, |
| 174 | .cpu_user_features = COMMON_USER_POWER4 | |
| 175 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 176 | .mmu_features = MMU_FTRS_PPC970, |
| 177 | .icache_bsize = 128, |
| 178 | .dcache_bsize = 128, |
| 179 | .num_pmcs = 8, |
| 180 | .pmc_type = PPC_PMC_IBM, |
| 181 | .cpu_setup = __setup_cpu_ppc970, |
| 182 | .cpu_restore = __restore_cpu_ppc970, |
| 183 | .oprofile_cpu_type = "ppc64/970", |
| 184 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 185 | .platform = "ppc970", |
| 186 | }, |
| 187 | { /* PPC970FX */ |
| 188 | .pvr_mask = 0xffff0000, |
| 189 | .pvr_value = 0x003c0000, |
| 190 | .cpu_name = "PPC970FX", |
| 191 | .cpu_features = CPU_FTRS_PPC970, |
| 192 | .cpu_user_features = COMMON_USER_POWER4 | |
| 193 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 194 | .mmu_features = MMU_FTRS_PPC970, |
| 195 | .icache_bsize = 128, |
| 196 | .dcache_bsize = 128, |
| 197 | .num_pmcs = 8, |
| 198 | .pmc_type = PPC_PMC_IBM, |
| 199 | .cpu_setup = __setup_cpu_ppc970, |
| 200 | .cpu_restore = __restore_cpu_ppc970, |
| 201 | .oprofile_cpu_type = "ppc64/970", |
| 202 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 203 | .platform = "ppc970", |
| 204 | }, |
| 205 | { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ |
| 206 | .pvr_mask = 0xffffffff, |
| 207 | .pvr_value = 0x00440100, |
| 208 | .cpu_name = "PPC970MP", |
| 209 | .cpu_features = CPU_FTRS_PPC970, |
| 210 | .cpu_user_features = COMMON_USER_POWER4 | |
| 211 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 212 | .mmu_features = MMU_FTRS_PPC970, |
| 213 | .icache_bsize = 128, |
| 214 | .dcache_bsize = 128, |
| 215 | .num_pmcs = 8, |
| 216 | .pmc_type = PPC_PMC_IBM, |
| 217 | .cpu_setup = __setup_cpu_ppc970, |
| 218 | .cpu_restore = __restore_cpu_ppc970, |
| 219 | .oprofile_cpu_type = "ppc64/970MP", |
| 220 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 221 | .platform = "ppc970", |
| 222 | }, |
| 223 | { /* PPC970MP */ |
| 224 | .pvr_mask = 0xffff0000, |
| 225 | .pvr_value = 0x00440000, |
| 226 | .cpu_name = "PPC970MP", |
| 227 | .cpu_features = CPU_FTRS_PPC970, |
| 228 | .cpu_user_features = COMMON_USER_POWER4 | |
| 229 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 230 | .mmu_features = MMU_FTRS_PPC970, |
| 231 | .icache_bsize = 128, |
| 232 | .dcache_bsize = 128, |
| 233 | .num_pmcs = 8, |
| 234 | .pmc_type = PPC_PMC_IBM, |
| 235 | .cpu_setup = __setup_cpu_ppc970MP, |
| 236 | .cpu_restore = __restore_cpu_ppc970, |
| 237 | .oprofile_cpu_type = "ppc64/970MP", |
| 238 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 239 | .platform = "ppc970", |
| 240 | }, |
| 241 | { /* PPC970GX */ |
| 242 | .pvr_mask = 0xffff0000, |
| 243 | .pvr_value = 0x00450000, |
| 244 | .cpu_name = "PPC970GX", |
| 245 | .cpu_features = CPU_FTRS_PPC970, |
| 246 | .cpu_user_features = COMMON_USER_POWER4 | |
| 247 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 248 | .mmu_features = MMU_FTRS_PPC970, |
| 249 | .icache_bsize = 128, |
| 250 | .dcache_bsize = 128, |
| 251 | .num_pmcs = 8, |
| 252 | .pmc_type = PPC_PMC_IBM, |
| 253 | .cpu_setup = __setup_cpu_ppc970, |
| 254 | .oprofile_cpu_type = "ppc64/970", |
| 255 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 256 | .platform = "ppc970", |
| 257 | }, |
| 258 | { /* Power5 GR */ |
| 259 | .pvr_mask = 0xffff0000, |
| 260 | .pvr_value = 0x003a0000, |
| 261 | .cpu_name = "POWER5 (gr)", |
| 262 | .cpu_features = CPU_FTRS_POWER5, |
| 263 | .cpu_user_features = COMMON_USER_POWER5, |
| 264 | .mmu_features = MMU_FTRS_POWER5, |
| 265 | .icache_bsize = 128, |
| 266 | .dcache_bsize = 128, |
| 267 | .num_pmcs = 6, |
| 268 | .pmc_type = PPC_PMC_IBM, |
| 269 | .oprofile_cpu_type = "ppc64/power5", |
| 270 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 271 | /* SIHV / SIPR bits are implemented on POWER4+ (GQ) |
| 272 | * and above but only works on POWER5 and above |
| 273 | */ |
| 274 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
| 275 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
| 276 | .platform = "power5", |
| 277 | }, |
| 278 | { /* Power5++ */ |
| 279 | .pvr_mask = 0xffffff00, |
| 280 | .pvr_value = 0x003b0300, |
| 281 | .cpu_name = "POWER5+ (gs)", |
| 282 | .cpu_features = CPU_FTRS_POWER5, |
| 283 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
| 284 | .mmu_features = MMU_FTRS_POWER5, |
| 285 | .icache_bsize = 128, |
| 286 | .dcache_bsize = 128, |
| 287 | .num_pmcs = 6, |
| 288 | .oprofile_cpu_type = "ppc64/power5++", |
| 289 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 290 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
| 291 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
| 292 | .platform = "power5+", |
| 293 | }, |
| 294 | { /* Power5 GS */ |
| 295 | .pvr_mask = 0xffff0000, |
| 296 | .pvr_value = 0x003b0000, |
| 297 | .cpu_name = "POWER5+ (gs)", |
| 298 | .cpu_features = CPU_FTRS_POWER5, |
| 299 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
| 300 | .mmu_features = MMU_FTRS_POWER5, |
| 301 | .icache_bsize = 128, |
| 302 | .dcache_bsize = 128, |
| 303 | .num_pmcs = 6, |
| 304 | .pmc_type = PPC_PMC_IBM, |
| 305 | .oprofile_cpu_type = "ppc64/power5+", |
| 306 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 307 | .oprofile_mmcra_sihv = MMCRA_SIHV, |
| 308 | .oprofile_mmcra_sipr = MMCRA_SIPR, |
| 309 | .platform = "power5+", |
| 310 | }, |
| 311 | { /* POWER6 in P5+ mode; 2.04-compliant processor */ |
| 312 | .pvr_mask = 0xffffffff, |
| 313 | .pvr_value = 0x0f000001, |
| 314 | .cpu_name = "POWER5+", |
| 315 | .cpu_features = CPU_FTRS_POWER5, |
| 316 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
| 317 | .mmu_features = MMU_FTRS_POWER5, |
| 318 | .icache_bsize = 128, |
| 319 | .dcache_bsize = 128, |
| 320 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
| 321 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 322 | .platform = "power5+", |
| 323 | }, |
| 324 | { /* Power6 */ |
| 325 | .pvr_mask = 0xffff0000, |
| 326 | .pvr_value = 0x003e0000, |
| 327 | .cpu_name = "POWER6 (raw)", |
| 328 | .cpu_features = CPU_FTRS_POWER6, |
| 329 | .cpu_user_features = COMMON_USER_POWER6 | |
| 330 | PPC_FEATURE_POWER6_EXT, |
| 331 | .mmu_features = MMU_FTRS_POWER6, |
| 332 | .icache_bsize = 128, |
| 333 | .dcache_bsize = 128, |
| 334 | .num_pmcs = 6, |
| 335 | .pmc_type = PPC_PMC_IBM, |
| 336 | .oprofile_cpu_type = "ppc64/power6", |
| 337 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 338 | .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, |
| 339 | .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, |
| 340 | .oprofile_mmcra_clear = POWER6_MMCRA_THRM | |
| 341 | POWER6_MMCRA_OTHER, |
| 342 | .platform = "power6x", |
| 343 | }, |
| 344 | { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ |
| 345 | .pvr_mask = 0xffffffff, |
| 346 | .pvr_value = 0x0f000002, |
| 347 | .cpu_name = "POWER6 (architected)", |
| 348 | .cpu_features = CPU_FTRS_POWER6, |
| 349 | .cpu_user_features = COMMON_USER_POWER6, |
| 350 | .mmu_features = MMU_FTRS_POWER6, |
| 351 | .icache_bsize = 128, |
| 352 | .dcache_bsize = 128, |
| 353 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
| 354 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 355 | .platform = "power6", |
| 356 | }, |
| 357 | { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ |
| 358 | .pvr_mask = 0xffffffff, |
| 359 | .pvr_value = 0x0f000003, |
| 360 | .cpu_name = "POWER7 (architected)", |
| 361 | .cpu_features = CPU_FTRS_POWER7, |
| 362 | .cpu_user_features = COMMON_USER_POWER7, |
| 363 | .cpu_user_features2 = COMMON_USER2_POWER7, |
| 364 | .mmu_features = MMU_FTRS_POWER7, |
| 365 | .icache_bsize = 128, |
| 366 | .dcache_bsize = 128, |
| 367 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 368 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
| 369 | .cpu_setup = __setup_cpu_power7, |
| 370 | .cpu_restore = __restore_cpu_power7, |
| 371 | .flush_tlb = __flush_tlb_power7, |
| 372 | .machine_check_early = __machine_check_early_realmode_p7, |
| 373 | .platform = "power7", |
| 374 | }, |
| 375 | { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ |
| 376 | .pvr_mask = 0xffffffff, |
| 377 | .pvr_value = 0x0f000004, |
| 378 | .cpu_name = "POWER8 (architected)", |
| 379 | .cpu_features = CPU_FTRS_POWER8, |
| 380 | .cpu_user_features = COMMON_USER_POWER8, |
| 381 | .cpu_user_features2 = COMMON_USER2_POWER8, |
| 382 | .mmu_features = MMU_FTRS_POWER8, |
| 383 | .icache_bsize = 128, |
| 384 | .dcache_bsize = 128, |
| 385 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 386 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
| 387 | .cpu_setup = __setup_cpu_power8, |
| 388 | .cpu_restore = __restore_cpu_power8, |
| 389 | .flush_tlb = __flush_tlb_power8, |
| 390 | .machine_check_early = __machine_check_early_realmode_p8, |
| 391 | .platform = "power8", |
| 392 | }, |
| 393 | { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ |
| 394 | .pvr_mask = 0xffffffff, |
| 395 | .pvr_value = 0x0f000005, |
| 396 | .cpu_name = "POWER9 (architected)", |
| 397 | .cpu_features = CPU_FTRS_POWER9, |
| 398 | .cpu_user_features = COMMON_USER_POWER9, |
| 399 | .cpu_user_features2 = COMMON_USER2_POWER9, |
| 400 | .mmu_features = MMU_FTRS_POWER9, |
| 401 | .icache_bsize = 128, |
| 402 | .dcache_bsize = 128, |
| 403 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 404 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
| 405 | .cpu_setup = __setup_cpu_power9, |
| 406 | .cpu_restore = __restore_cpu_power9, |
| 407 | .flush_tlb = __flush_tlb_power9, |
| 408 | .platform = "power9", |
| 409 | }, |
| 410 | { /* Power7 */ |
| 411 | .pvr_mask = 0xffff0000, |
| 412 | .pvr_value = 0x003f0000, |
| 413 | .cpu_name = "POWER7 (raw)", |
| 414 | .cpu_features = CPU_FTRS_POWER7, |
| 415 | .cpu_user_features = COMMON_USER_POWER7, |
| 416 | .cpu_user_features2 = COMMON_USER2_POWER7, |
| 417 | .mmu_features = MMU_FTRS_POWER7, |
| 418 | .icache_bsize = 128, |
| 419 | .dcache_bsize = 128, |
| 420 | .num_pmcs = 6, |
| 421 | .pmc_type = PPC_PMC_IBM, |
| 422 | .oprofile_cpu_type = "ppc64/power7", |
| 423 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 424 | .cpu_setup = __setup_cpu_power7, |
| 425 | .cpu_restore = __restore_cpu_power7, |
| 426 | .flush_tlb = __flush_tlb_power7, |
| 427 | .machine_check_early = __machine_check_early_realmode_p7, |
| 428 | .platform = "power7", |
| 429 | }, |
| 430 | { /* Power7+ */ |
| 431 | .pvr_mask = 0xffff0000, |
| 432 | .pvr_value = 0x004A0000, |
| 433 | .cpu_name = "POWER7+ (raw)", |
| 434 | .cpu_features = CPU_FTRS_POWER7, |
| 435 | .cpu_user_features = COMMON_USER_POWER7, |
| 436 | .cpu_user_features2 = COMMON_USER2_POWER7, |
| 437 | .mmu_features = MMU_FTRS_POWER7, |
| 438 | .icache_bsize = 128, |
| 439 | .dcache_bsize = 128, |
| 440 | .num_pmcs = 6, |
| 441 | .pmc_type = PPC_PMC_IBM, |
| 442 | .oprofile_cpu_type = "ppc64/power7", |
| 443 | .oprofile_type = PPC_OPROFILE_POWER4, |
| 444 | .cpu_setup = __setup_cpu_power7, |
| 445 | .cpu_restore = __restore_cpu_power7, |
| 446 | .flush_tlb = __flush_tlb_power7, |
| 447 | .machine_check_early = __machine_check_early_realmode_p7, |
| 448 | .platform = "power7+", |
| 449 | }, |
| 450 | { /* Power8E */ |
| 451 | .pvr_mask = 0xffff0000, |
| 452 | .pvr_value = 0x004b0000, |
| 453 | .cpu_name = "POWER8E (raw)", |
| 454 | .cpu_features = CPU_FTRS_POWER8E, |
| 455 | .cpu_user_features = COMMON_USER_POWER8, |
| 456 | .cpu_user_features2 = COMMON_USER2_POWER8, |
| 457 | .mmu_features = MMU_FTRS_POWER8, |
| 458 | .icache_bsize = 128, |
| 459 | .dcache_bsize = 128, |
| 460 | .num_pmcs = 6, |
| 461 | .pmc_type = PPC_PMC_IBM, |
| 462 | .oprofile_cpu_type = "ppc64/power8", |
| 463 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 464 | .cpu_setup = __setup_cpu_power8, |
| 465 | .cpu_restore = __restore_cpu_power8, |
| 466 | .flush_tlb = __flush_tlb_power8, |
| 467 | .machine_check_early = __machine_check_early_realmode_p8, |
| 468 | .platform = "power8", |
| 469 | }, |
| 470 | { /* Power8NVL */ |
| 471 | .pvr_mask = 0xffff0000, |
| 472 | .pvr_value = 0x004c0000, |
| 473 | .cpu_name = "POWER8NVL (raw)", |
| 474 | .cpu_features = CPU_FTRS_POWER8, |
| 475 | .cpu_user_features = COMMON_USER_POWER8, |
| 476 | .cpu_user_features2 = COMMON_USER2_POWER8, |
| 477 | .mmu_features = MMU_FTRS_POWER8, |
| 478 | .icache_bsize = 128, |
| 479 | .dcache_bsize = 128, |
| 480 | .num_pmcs = 6, |
| 481 | .pmc_type = PPC_PMC_IBM, |
| 482 | .oprofile_cpu_type = "ppc64/power8", |
| 483 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 484 | .cpu_setup = __setup_cpu_power8, |
| 485 | .cpu_restore = __restore_cpu_power8, |
| 486 | .flush_tlb = __flush_tlb_power8, |
| 487 | .machine_check_early = __machine_check_early_realmode_p8, |
| 488 | .platform = "power8", |
| 489 | }, |
| 490 | { /* Power8 DD1: Does not support doorbell IPIs */ |
| 491 | .pvr_mask = 0xffffff00, |
| 492 | .pvr_value = 0x004d0100, |
| 493 | .cpu_name = "POWER8 (raw)", |
| 494 | .cpu_features = CPU_FTRS_POWER8_DD1, |
| 495 | .cpu_user_features = COMMON_USER_POWER8, |
| 496 | .cpu_user_features2 = COMMON_USER2_POWER8, |
| 497 | .mmu_features = MMU_FTRS_POWER8, |
| 498 | .icache_bsize = 128, |
| 499 | .dcache_bsize = 128, |
| 500 | .num_pmcs = 6, |
| 501 | .pmc_type = PPC_PMC_IBM, |
| 502 | .oprofile_cpu_type = "ppc64/power8", |
| 503 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 504 | .cpu_setup = __setup_cpu_power8, |
| 505 | .cpu_restore = __restore_cpu_power8, |
| 506 | .flush_tlb = __flush_tlb_power8, |
| 507 | .machine_check_early = __machine_check_early_realmode_p8, |
| 508 | .platform = "power8", |
| 509 | }, |
| 510 | { /* Power8 */ |
| 511 | .pvr_mask = 0xffff0000, |
| 512 | .pvr_value = 0x004d0000, |
| 513 | .cpu_name = "POWER8 (raw)", |
| 514 | .cpu_features = CPU_FTRS_POWER8, |
| 515 | .cpu_user_features = COMMON_USER_POWER8, |
| 516 | .cpu_user_features2 = COMMON_USER2_POWER8, |
| 517 | .mmu_features = MMU_FTRS_POWER8, |
| 518 | .icache_bsize = 128, |
| 519 | .dcache_bsize = 128, |
| 520 | .num_pmcs = 6, |
| 521 | .pmc_type = PPC_PMC_IBM, |
| 522 | .oprofile_cpu_type = "ppc64/power8", |
| 523 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 524 | .cpu_setup = __setup_cpu_power8, |
| 525 | .cpu_restore = __restore_cpu_power8, |
| 526 | .flush_tlb = __flush_tlb_power8, |
| 527 | .machine_check_early = __machine_check_early_realmode_p8, |
| 528 | .platform = "power8", |
| 529 | }, |
| 530 | { /* Power9 DD1*/ |
| 531 | .pvr_mask = 0xffffff00, |
| 532 | .pvr_value = 0x004e0100, |
| 533 | .cpu_name = "POWER9 (raw)", |
| 534 | .cpu_features = CPU_FTRS_POWER9_DD1, |
| 535 | .cpu_user_features = COMMON_USER_POWER9, |
| 536 | .cpu_user_features2 = COMMON_USER2_POWER9, |
| 537 | .mmu_features = MMU_FTRS_POWER9, |
| 538 | .icache_bsize = 128, |
| 539 | .dcache_bsize = 128, |
| 540 | .num_pmcs = 6, |
| 541 | .pmc_type = PPC_PMC_IBM, |
| 542 | .oprofile_cpu_type = "ppc64/power9", |
| 543 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 544 | .cpu_setup = __setup_cpu_power9, |
| 545 | .cpu_restore = __restore_cpu_power9, |
| 546 | .flush_tlb = __flush_tlb_power9, |
| 547 | .machine_check_early = __machine_check_early_realmode_p9, |
| 548 | .platform = "power9", |
| 549 | }, |
| 550 | { /* Power9 */ |
| 551 | .pvr_mask = 0xffff0000, |
| 552 | .pvr_value = 0x004e0000, |
| 553 | .cpu_name = "POWER9 (raw)", |
| 554 | .cpu_features = CPU_FTRS_POWER9, |
| 555 | .cpu_user_features = COMMON_USER_POWER9, |
| 556 | .cpu_user_features2 = COMMON_USER2_POWER9, |
| 557 | .mmu_features = MMU_FTRS_POWER9, |
| 558 | .icache_bsize = 128, |
| 559 | .dcache_bsize = 128, |
| 560 | .num_pmcs = 6, |
| 561 | .pmc_type = PPC_PMC_IBM, |
| 562 | .oprofile_cpu_type = "ppc64/power9", |
| 563 | .oprofile_type = PPC_OPROFILE_INVALID, |
| 564 | .cpu_setup = __setup_cpu_power9, |
| 565 | .cpu_restore = __restore_cpu_power9, |
| 566 | .flush_tlb = __flush_tlb_power9, |
| 567 | .machine_check_early = __machine_check_early_realmode_p9, |
| 568 | .platform = "power9", |
| 569 | }, |
| 570 | { /* Cell Broadband Engine */ |
| 571 | .pvr_mask = 0xffff0000, |
| 572 | .pvr_value = 0x00700000, |
| 573 | .cpu_name = "Cell Broadband Engine", |
| 574 | .cpu_features = CPU_FTRS_CELL, |
| 575 | .cpu_user_features = COMMON_USER_PPC64 | |
| 576 | PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | |
| 577 | PPC_FEATURE_SMT, |
| 578 | .mmu_features = MMU_FTRS_CELL, |
| 579 | .icache_bsize = 128, |
| 580 | .dcache_bsize = 128, |
| 581 | .num_pmcs = 4, |
| 582 | .pmc_type = PPC_PMC_IBM, |
| 583 | .oprofile_cpu_type = "ppc64/cell-be", |
| 584 | .oprofile_type = PPC_OPROFILE_CELL, |
| 585 | .platform = "ppc-cell-be", |
| 586 | }, |
| 587 | { /* PA Semi PA6T */ |
| 588 | .pvr_mask = 0x7fff0000, |
| 589 | .pvr_value = 0x00900000, |
| 590 | .cpu_name = "PA6T", |
| 591 | .cpu_features = CPU_FTRS_PA6T, |
| 592 | .cpu_user_features = COMMON_USER_PA6T, |
| 593 | .mmu_features = MMU_FTRS_PA6T, |
| 594 | .icache_bsize = 64, |
| 595 | .dcache_bsize = 64, |
| 596 | .num_pmcs = 6, |
| 597 | .pmc_type = PPC_PMC_PA6T, |
| 598 | .cpu_setup = __setup_cpu_pa6t, |
| 599 | .cpu_restore = __restore_cpu_pa6t, |
| 600 | .oprofile_cpu_type = "ppc64/pa6t", |
| 601 | .oprofile_type = PPC_OPROFILE_PA6T, |
| 602 | .platform = "pa6t", |
| 603 | }, |
| 604 | { /* default match */ |
| 605 | .pvr_mask = 0x00000000, |
| 606 | .pvr_value = 0x00000000, |
| 607 | .cpu_name = "POWER4 (compatible)", |
| 608 | .cpu_features = CPU_FTRS_COMPATIBLE, |
| 609 | .cpu_user_features = COMMON_USER_PPC64, |
| 610 | .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, |
| 611 | .icache_bsize = 128, |
| 612 | .dcache_bsize = 128, |
| 613 | .num_pmcs = 6, |
| 614 | .pmc_type = PPC_PMC_IBM, |
| 615 | .platform = "power4", |
| 616 | } |
| 617 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
| 618 | |
| 619 | #ifdef CONFIG_PPC32 |
| 620 | #ifdef CONFIG_PPC_BOOK3S_32 |
| 621 | { /* 601 */ |
| 622 | .pvr_mask = 0xffff0000, |
| 623 | .pvr_value = 0x00010000, |
| 624 | .cpu_name = "601", |
| 625 | .cpu_features = CPU_FTRS_PPC601, |
| 626 | .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR | |
| 627 | PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB, |
| 628 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 629 | .icache_bsize = 32, |
| 630 | .dcache_bsize = 32, |
| 631 | .machine_check = machine_check_generic, |
| 632 | .platform = "ppc601", |
| 633 | }, |
| 634 | { /* 603 */ |
| 635 | .pvr_mask = 0xffff0000, |
| 636 | .pvr_value = 0x00030000, |
| 637 | .cpu_name = "603", |
| 638 | .cpu_features = CPU_FTRS_603, |
| 639 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 640 | .mmu_features = 0, |
| 641 | .icache_bsize = 32, |
| 642 | .dcache_bsize = 32, |
| 643 | .cpu_setup = __setup_cpu_603, |
| 644 | .machine_check = machine_check_generic, |
| 645 | .platform = "ppc603", |
| 646 | }, |
| 647 | { /* 603e */ |
| 648 | .pvr_mask = 0xffff0000, |
| 649 | .pvr_value = 0x00060000, |
| 650 | .cpu_name = "603e", |
| 651 | .cpu_features = CPU_FTRS_603, |
| 652 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 653 | .mmu_features = 0, |
| 654 | .icache_bsize = 32, |
| 655 | .dcache_bsize = 32, |
| 656 | .cpu_setup = __setup_cpu_603, |
| 657 | .machine_check = machine_check_generic, |
| 658 | .platform = "ppc603", |
| 659 | }, |
| 660 | { /* 603ev */ |
| 661 | .pvr_mask = 0xffff0000, |
| 662 | .pvr_value = 0x00070000, |
| 663 | .cpu_name = "603ev", |
| 664 | .cpu_features = CPU_FTRS_603, |
| 665 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 666 | .mmu_features = 0, |
| 667 | .icache_bsize = 32, |
| 668 | .dcache_bsize = 32, |
| 669 | .cpu_setup = __setup_cpu_603, |
| 670 | .machine_check = machine_check_generic, |
| 671 | .platform = "ppc603", |
| 672 | }, |
| 673 | { /* 604 */ |
| 674 | .pvr_mask = 0xffff0000, |
| 675 | .pvr_value = 0x00040000, |
| 676 | .cpu_name = "604", |
| 677 | .cpu_features = CPU_FTRS_604, |
| 678 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 679 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 680 | .icache_bsize = 32, |
| 681 | .dcache_bsize = 32, |
| 682 | .num_pmcs = 2, |
| 683 | .cpu_setup = __setup_cpu_604, |
| 684 | .machine_check = machine_check_generic, |
| 685 | .platform = "ppc604", |
| 686 | }, |
| 687 | { /* 604e */ |
| 688 | .pvr_mask = 0xfffff000, |
| 689 | .pvr_value = 0x00090000, |
| 690 | .cpu_name = "604e", |
| 691 | .cpu_features = CPU_FTRS_604, |
| 692 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 693 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 694 | .icache_bsize = 32, |
| 695 | .dcache_bsize = 32, |
| 696 | .num_pmcs = 4, |
| 697 | .cpu_setup = __setup_cpu_604, |
| 698 | .machine_check = machine_check_generic, |
| 699 | .platform = "ppc604", |
| 700 | }, |
| 701 | { /* 604r */ |
| 702 | .pvr_mask = 0xffff0000, |
| 703 | .pvr_value = 0x00090000, |
| 704 | .cpu_name = "604r", |
| 705 | .cpu_features = CPU_FTRS_604, |
| 706 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 707 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 708 | .icache_bsize = 32, |
| 709 | .dcache_bsize = 32, |
| 710 | .num_pmcs = 4, |
| 711 | .cpu_setup = __setup_cpu_604, |
| 712 | .machine_check = machine_check_generic, |
| 713 | .platform = "ppc604", |
| 714 | }, |
| 715 | { /* 604ev */ |
| 716 | .pvr_mask = 0xffff0000, |
| 717 | .pvr_value = 0x000a0000, |
| 718 | .cpu_name = "604ev", |
| 719 | .cpu_features = CPU_FTRS_604, |
| 720 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 721 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 722 | .icache_bsize = 32, |
| 723 | .dcache_bsize = 32, |
| 724 | .num_pmcs = 4, |
| 725 | .cpu_setup = __setup_cpu_604, |
| 726 | .machine_check = machine_check_generic, |
| 727 | .platform = "ppc604", |
| 728 | }, |
| 729 | { /* 740/750 (0x4202, don't support TAU ?) */ |
| 730 | .pvr_mask = 0xffffffff, |
| 731 | .pvr_value = 0x00084202, |
| 732 | .cpu_name = "740/750", |
| 733 | .cpu_features = CPU_FTRS_740_NOTAU, |
| 734 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 735 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 736 | .icache_bsize = 32, |
| 737 | .dcache_bsize = 32, |
| 738 | .num_pmcs = 4, |
| 739 | .cpu_setup = __setup_cpu_750, |
| 740 | .machine_check = machine_check_generic, |
| 741 | .platform = "ppc750", |
| 742 | }, |
| 743 | { /* 750CX (80100 and 8010x?) */ |
| 744 | .pvr_mask = 0xfffffff0, |
| 745 | .pvr_value = 0x00080100, |
| 746 | .cpu_name = "750CX", |
| 747 | .cpu_features = CPU_FTRS_750, |
| 748 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 749 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 750 | .icache_bsize = 32, |
| 751 | .dcache_bsize = 32, |
| 752 | .num_pmcs = 4, |
| 753 | .cpu_setup = __setup_cpu_750cx, |
| 754 | .machine_check = machine_check_generic, |
| 755 | .platform = "ppc750", |
| 756 | }, |
| 757 | { /* 750CX (82201 and 82202) */ |
| 758 | .pvr_mask = 0xfffffff0, |
| 759 | .pvr_value = 0x00082200, |
| 760 | .cpu_name = "750CX", |
| 761 | .cpu_features = CPU_FTRS_750, |
| 762 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 763 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 764 | .icache_bsize = 32, |
| 765 | .dcache_bsize = 32, |
| 766 | .num_pmcs = 4, |
| 767 | .pmc_type = PPC_PMC_IBM, |
| 768 | .cpu_setup = __setup_cpu_750cx, |
| 769 | .machine_check = machine_check_generic, |
| 770 | .platform = "ppc750", |
| 771 | }, |
| 772 | { /* 750CXe (82214) */ |
| 773 | .pvr_mask = 0xfffffff0, |
| 774 | .pvr_value = 0x00082210, |
| 775 | .cpu_name = "750CXe", |
| 776 | .cpu_features = CPU_FTRS_750, |
| 777 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 778 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 779 | .icache_bsize = 32, |
| 780 | .dcache_bsize = 32, |
| 781 | .num_pmcs = 4, |
| 782 | .pmc_type = PPC_PMC_IBM, |
| 783 | .cpu_setup = __setup_cpu_750cx, |
| 784 | .machine_check = machine_check_generic, |
| 785 | .platform = "ppc750", |
| 786 | }, |
| 787 | { /* 750CXe "Gekko" (83214) */ |
| 788 | .pvr_mask = 0xffffffff, |
| 789 | .pvr_value = 0x00083214, |
| 790 | .cpu_name = "750CXe", |
| 791 | .cpu_features = CPU_FTRS_750, |
| 792 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 793 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 794 | .icache_bsize = 32, |
| 795 | .dcache_bsize = 32, |
| 796 | .num_pmcs = 4, |
| 797 | .pmc_type = PPC_PMC_IBM, |
| 798 | .cpu_setup = __setup_cpu_750cx, |
| 799 | .machine_check = machine_check_generic, |
| 800 | .platform = "ppc750", |
| 801 | }, |
| 802 | { /* 750CL (and "Broadway") */ |
| 803 | .pvr_mask = 0xfffff0e0, |
| 804 | .pvr_value = 0x00087000, |
| 805 | .cpu_name = "750CL", |
| 806 | .cpu_features = CPU_FTRS_750CL, |
| 807 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 808 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 809 | .icache_bsize = 32, |
| 810 | .dcache_bsize = 32, |
| 811 | .num_pmcs = 4, |
| 812 | .pmc_type = PPC_PMC_IBM, |
| 813 | .cpu_setup = __setup_cpu_750, |
| 814 | .machine_check = machine_check_generic, |
| 815 | .platform = "ppc750", |
| 816 | .oprofile_cpu_type = "ppc/750", |
| 817 | .oprofile_type = PPC_OPROFILE_G4, |
| 818 | }, |
| 819 | { /* 745/755 */ |
| 820 | .pvr_mask = 0xfffff000, |
| 821 | .pvr_value = 0x00083000, |
| 822 | .cpu_name = "745/755", |
| 823 | .cpu_features = CPU_FTRS_750, |
| 824 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 825 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 826 | .icache_bsize = 32, |
| 827 | .dcache_bsize = 32, |
| 828 | .num_pmcs = 4, |
| 829 | .pmc_type = PPC_PMC_IBM, |
| 830 | .cpu_setup = __setup_cpu_750, |
| 831 | .machine_check = machine_check_generic, |
| 832 | .platform = "ppc750", |
| 833 | }, |
| 834 | { /* 750FX rev 1.x */ |
| 835 | .pvr_mask = 0xffffff00, |
| 836 | .pvr_value = 0x70000100, |
| 837 | .cpu_name = "750FX", |
| 838 | .cpu_features = CPU_FTRS_750FX1, |
| 839 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 840 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 841 | .icache_bsize = 32, |
| 842 | .dcache_bsize = 32, |
| 843 | .num_pmcs = 4, |
| 844 | .pmc_type = PPC_PMC_IBM, |
| 845 | .cpu_setup = __setup_cpu_750, |
| 846 | .machine_check = machine_check_generic, |
| 847 | .platform = "ppc750", |
| 848 | .oprofile_cpu_type = "ppc/750", |
| 849 | .oprofile_type = PPC_OPROFILE_G4, |
| 850 | }, |
| 851 | { /* 750FX rev 2.0 must disable HID0[DPM] */ |
| 852 | .pvr_mask = 0xffffffff, |
| 853 | .pvr_value = 0x70000200, |
| 854 | .cpu_name = "750FX", |
| 855 | .cpu_features = CPU_FTRS_750FX2, |
| 856 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 857 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 858 | .icache_bsize = 32, |
| 859 | .dcache_bsize = 32, |
| 860 | .num_pmcs = 4, |
| 861 | .pmc_type = PPC_PMC_IBM, |
| 862 | .cpu_setup = __setup_cpu_750, |
| 863 | .machine_check = machine_check_generic, |
| 864 | .platform = "ppc750", |
| 865 | .oprofile_cpu_type = "ppc/750", |
| 866 | .oprofile_type = PPC_OPROFILE_G4, |
| 867 | }, |
| 868 | { /* 750FX (All revs except 2.0) */ |
| 869 | .pvr_mask = 0xffff0000, |
| 870 | .pvr_value = 0x70000000, |
| 871 | .cpu_name = "750FX", |
| 872 | .cpu_features = CPU_FTRS_750FX, |
| 873 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 874 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 875 | .icache_bsize = 32, |
| 876 | .dcache_bsize = 32, |
| 877 | .num_pmcs = 4, |
| 878 | .pmc_type = PPC_PMC_IBM, |
| 879 | .cpu_setup = __setup_cpu_750fx, |
| 880 | .machine_check = machine_check_generic, |
| 881 | .platform = "ppc750", |
| 882 | .oprofile_cpu_type = "ppc/750", |
| 883 | .oprofile_type = PPC_OPROFILE_G4, |
| 884 | }, |
| 885 | { /* 750GX */ |
| 886 | .pvr_mask = 0xffff0000, |
| 887 | .pvr_value = 0x70020000, |
| 888 | .cpu_name = "750GX", |
| 889 | .cpu_features = CPU_FTRS_750GX, |
| 890 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 891 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 892 | .icache_bsize = 32, |
| 893 | .dcache_bsize = 32, |
| 894 | .num_pmcs = 4, |
| 895 | .pmc_type = PPC_PMC_IBM, |
| 896 | .cpu_setup = __setup_cpu_750fx, |
| 897 | .machine_check = machine_check_generic, |
| 898 | .platform = "ppc750", |
| 899 | .oprofile_cpu_type = "ppc/750", |
| 900 | .oprofile_type = PPC_OPROFILE_G4, |
| 901 | }, |
| 902 | { /* 740/750 (L2CR bit need fixup for 740) */ |
| 903 | .pvr_mask = 0xffff0000, |
| 904 | .pvr_value = 0x00080000, |
| 905 | .cpu_name = "740/750", |
| 906 | .cpu_features = CPU_FTRS_740, |
| 907 | .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, |
| 908 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 909 | .icache_bsize = 32, |
| 910 | .dcache_bsize = 32, |
| 911 | .num_pmcs = 4, |
| 912 | .pmc_type = PPC_PMC_IBM, |
| 913 | .cpu_setup = __setup_cpu_750, |
| 914 | .machine_check = machine_check_generic, |
| 915 | .platform = "ppc750", |
| 916 | }, |
| 917 | { /* 7400 rev 1.1 ? (no TAU) */ |
| 918 | .pvr_mask = 0xffffffff, |
| 919 | .pvr_value = 0x000c1101, |
| 920 | .cpu_name = "7400 (1.1)", |
| 921 | .cpu_features = CPU_FTRS_7400_NOTAU, |
| 922 | .cpu_user_features = COMMON_USER | |
| 923 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 924 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 925 | .icache_bsize = 32, |
| 926 | .dcache_bsize = 32, |
| 927 | .num_pmcs = 4, |
| 928 | .pmc_type = PPC_PMC_G4, |
| 929 | .cpu_setup = __setup_cpu_7400, |
| 930 | .machine_check = machine_check_generic, |
| 931 | .platform = "ppc7400", |
| 932 | }, |
| 933 | { /* 7400 */ |
| 934 | .pvr_mask = 0xffff0000, |
| 935 | .pvr_value = 0x000c0000, |
| 936 | .cpu_name = "7400", |
| 937 | .cpu_features = CPU_FTRS_7400, |
| 938 | .cpu_user_features = COMMON_USER | |
| 939 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 940 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 941 | .icache_bsize = 32, |
| 942 | .dcache_bsize = 32, |
| 943 | .num_pmcs = 4, |
| 944 | .pmc_type = PPC_PMC_G4, |
| 945 | .cpu_setup = __setup_cpu_7400, |
| 946 | .machine_check = machine_check_generic, |
| 947 | .platform = "ppc7400", |
| 948 | }, |
| 949 | { /* 7410 */ |
| 950 | .pvr_mask = 0xffff0000, |
| 951 | .pvr_value = 0x800c0000, |
| 952 | .cpu_name = "7410", |
| 953 | .cpu_features = CPU_FTRS_7400, |
| 954 | .cpu_user_features = COMMON_USER | |
| 955 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 956 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 957 | .icache_bsize = 32, |
| 958 | .dcache_bsize = 32, |
| 959 | .num_pmcs = 4, |
| 960 | .pmc_type = PPC_PMC_G4, |
| 961 | .cpu_setup = __setup_cpu_7410, |
| 962 | .machine_check = machine_check_generic, |
| 963 | .platform = "ppc7400", |
| 964 | }, |
| 965 | { /* 7450 2.0 - no doze/nap */ |
| 966 | .pvr_mask = 0xffffffff, |
| 967 | .pvr_value = 0x80000200, |
| 968 | .cpu_name = "7450", |
| 969 | .cpu_features = CPU_FTRS_7450_20, |
| 970 | .cpu_user_features = COMMON_USER | |
| 971 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 972 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 973 | .icache_bsize = 32, |
| 974 | .dcache_bsize = 32, |
| 975 | .num_pmcs = 6, |
| 976 | .pmc_type = PPC_PMC_G4, |
| 977 | .cpu_setup = __setup_cpu_745x, |
| 978 | .oprofile_cpu_type = "ppc/7450", |
| 979 | .oprofile_type = PPC_OPROFILE_G4, |
| 980 | .machine_check = machine_check_generic, |
| 981 | .platform = "ppc7450", |
| 982 | }, |
| 983 | { /* 7450 2.1 */ |
| 984 | .pvr_mask = 0xffffffff, |
| 985 | .pvr_value = 0x80000201, |
| 986 | .cpu_name = "7450", |
| 987 | .cpu_features = CPU_FTRS_7450_21, |
| 988 | .cpu_user_features = COMMON_USER | |
| 989 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 990 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 991 | .icache_bsize = 32, |
| 992 | .dcache_bsize = 32, |
| 993 | .num_pmcs = 6, |
| 994 | .pmc_type = PPC_PMC_G4, |
| 995 | .cpu_setup = __setup_cpu_745x, |
| 996 | .oprofile_cpu_type = "ppc/7450", |
| 997 | .oprofile_type = PPC_OPROFILE_G4, |
| 998 | .machine_check = machine_check_generic, |
| 999 | .platform = "ppc7450", |
| 1000 | }, |
| 1001 | { /* 7450 2.3 and newer */ |
| 1002 | .pvr_mask = 0xffff0000, |
| 1003 | .pvr_value = 0x80000000, |
| 1004 | .cpu_name = "7450", |
| 1005 | .cpu_features = CPU_FTRS_7450_23, |
| 1006 | .cpu_user_features = COMMON_USER | |
| 1007 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1008 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 1009 | .icache_bsize = 32, |
| 1010 | .dcache_bsize = 32, |
| 1011 | .num_pmcs = 6, |
| 1012 | .pmc_type = PPC_PMC_G4, |
| 1013 | .cpu_setup = __setup_cpu_745x, |
| 1014 | .oprofile_cpu_type = "ppc/7450", |
| 1015 | .oprofile_type = PPC_OPROFILE_G4, |
| 1016 | .machine_check = machine_check_generic, |
| 1017 | .platform = "ppc7450", |
| 1018 | }, |
| 1019 | { /* 7455 rev 1.x */ |
| 1020 | .pvr_mask = 0xffffff00, |
| 1021 | .pvr_value = 0x80010100, |
| 1022 | .cpu_name = "7455", |
| 1023 | .cpu_features = CPU_FTRS_7455_1, |
| 1024 | .cpu_user_features = COMMON_USER | |
| 1025 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1026 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1027 | .icache_bsize = 32, |
| 1028 | .dcache_bsize = 32, |
| 1029 | .num_pmcs = 6, |
| 1030 | .pmc_type = PPC_PMC_G4, |
| 1031 | .cpu_setup = __setup_cpu_745x, |
| 1032 | .oprofile_cpu_type = "ppc/7450", |
| 1033 | .oprofile_type = PPC_OPROFILE_G4, |
| 1034 | .machine_check = machine_check_generic, |
| 1035 | .platform = "ppc7450", |
| 1036 | }, |
| 1037 | { /* 7455 rev 2.0 */ |
| 1038 | .pvr_mask = 0xffffffff, |
| 1039 | .pvr_value = 0x80010200, |
| 1040 | .cpu_name = "7455", |
| 1041 | .cpu_features = CPU_FTRS_7455_20, |
| 1042 | .cpu_user_features = COMMON_USER | |
| 1043 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1044 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1045 | .icache_bsize = 32, |
| 1046 | .dcache_bsize = 32, |
| 1047 | .num_pmcs = 6, |
| 1048 | .pmc_type = PPC_PMC_G4, |
| 1049 | .cpu_setup = __setup_cpu_745x, |
| 1050 | .oprofile_cpu_type = "ppc/7450", |
| 1051 | .oprofile_type = PPC_OPROFILE_G4, |
| 1052 | .machine_check = machine_check_generic, |
| 1053 | .platform = "ppc7450", |
| 1054 | }, |
| 1055 | { /* 7455 others */ |
| 1056 | .pvr_mask = 0xffff0000, |
| 1057 | .pvr_value = 0x80010000, |
| 1058 | .cpu_name = "7455", |
| 1059 | .cpu_features = CPU_FTRS_7455, |
| 1060 | .cpu_user_features = COMMON_USER | |
| 1061 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1062 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1063 | .icache_bsize = 32, |
| 1064 | .dcache_bsize = 32, |
| 1065 | .num_pmcs = 6, |
| 1066 | .pmc_type = PPC_PMC_G4, |
| 1067 | .cpu_setup = __setup_cpu_745x, |
| 1068 | .oprofile_cpu_type = "ppc/7450", |
| 1069 | .oprofile_type = PPC_OPROFILE_G4, |
| 1070 | .machine_check = machine_check_generic, |
| 1071 | .platform = "ppc7450", |
| 1072 | }, |
| 1073 | { /* 7447/7457 Rev 1.0 */ |
| 1074 | .pvr_mask = 0xffffffff, |
| 1075 | .pvr_value = 0x80020100, |
| 1076 | .cpu_name = "7447/7457", |
| 1077 | .cpu_features = CPU_FTRS_7447_10, |
| 1078 | .cpu_user_features = COMMON_USER | |
| 1079 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1080 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1081 | .icache_bsize = 32, |
| 1082 | .dcache_bsize = 32, |
| 1083 | .num_pmcs = 6, |
| 1084 | .pmc_type = PPC_PMC_G4, |
| 1085 | .cpu_setup = __setup_cpu_745x, |
| 1086 | .oprofile_cpu_type = "ppc/7450", |
| 1087 | .oprofile_type = PPC_OPROFILE_G4, |
| 1088 | .machine_check = machine_check_generic, |
| 1089 | .platform = "ppc7450", |
| 1090 | }, |
| 1091 | { /* 7447/7457 Rev 1.1 */ |
| 1092 | .pvr_mask = 0xffffffff, |
| 1093 | .pvr_value = 0x80020101, |
| 1094 | .cpu_name = "7447/7457", |
| 1095 | .cpu_features = CPU_FTRS_7447_10, |
| 1096 | .cpu_user_features = COMMON_USER | |
| 1097 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1098 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1099 | .icache_bsize = 32, |
| 1100 | .dcache_bsize = 32, |
| 1101 | .num_pmcs = 6, |
| 1102 | .pmc_type = PPC_PMC_G4, |
| 1103 | .cpu_setup = __setup_cpu_745x, |
| 1104 | .oprofile_cpu_type = "ppc/7450", |
| 1105 | .oprofile_type = PPC_OPROFILE_G4, |
| 1106 | .machine_check = machine_check_generic, |
| 1107 | .platform = "ppc7450", |
| 1108 | }, |
| 1109 | { /* 7447/7457 Rev 1.2 and later */ |
| 1110 | .pvr_mask = 0xffff0000, |
| 1111 | .pvr_value = 0x80020000, |
| 1112 | .cpu_name = "7447/7457", |
| 1113 | .cpu_features = CPU_FTRS_7447, |
| 1114 | .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1115 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1116 | .icache_bsize = 32, |
| 1117 | .dcache_bsize = 32, |
| 1118 | .num_pmcs = 6, |
| 1119 | .pmc_type = PPC_PMC_G4, |
| 1120 | .cpu_setup = __setup_cpu_745x, |
| 1121 | .oprofile_cpu_type = "ppc/7450", |
| 1122 | .oprofile_type = PPC_OPROFILE_G4, |
| 1123 | .machine_check = machine_check_generic, |
| 1124 | .platform = "ppc7450", |
| 1125 | }, |
| 1126 | { /* 7447A */ |
| 1127 | .pvr_mask = 0xffff0000, |
| 1128 | .pvr_value = 0x80030000, |
| 1129 | .cpu_name = "7447A", |
| 1130 | .cpu_features = CPU_FTRS_7447A, |
| 1131 | .cpu_user_features = COMMON_USER | |
| 1132 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1133 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1134 | .icache_bsize = 32, |
| 1135 | .dcache_bsize = 32, |
| 1136 | .num_pmcs = 6, |
| 1137 | .pmc_type = PPC_PMC_G4, |
| 1138 | .cpu_setup = __setup_cpu_745x, |
| 1139 | .oprofile_cpu_type = "ppc/7450", |
| 1140 | .oprofile_type = PPC_OPROFILE_G4, |
| 1141 | .machine_check = machine_check_generic, |
| 1142 | .platform = "ppc7450", |
| 1143 | }, |
| 1144 | { /* 7448 */ |
| 1145 | .pvr_mask = 0xffff0000, |
| 1146 | .pvr_value = 0x80040000, |
| 1147 | .cpu_name = "7448", |
| 1148 | .cpu_features = CPU_FTRS_7448, |
| 1149 | .cpu_user_features = COMMON_USER | |
| 1150 | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, |
| 1151 | .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, |
| 1152 | .icache_bsize = 32, |
| 1153 | .dcache_bsize = 32, |
| 1154 | .num_pmcs = 6, |
| 1155 | .pmc_type = PPC_PMC_G4, |
| 1156 | .cpu_setup = __setup_cpu_745x, |
| 1157 | .oprofile_cpu_type = "ppc/7450", |
| 1158 | .oprofile_type = PPC_OPROFILE_G4, |
| 1159 | .machine_check = machine_check_generic, |
| 1160 | .platform = "ppc7450", |
| 1161 | }, |
| 1162 | { /* 82xx (8240, 8245, 8260 are all 603e cores) */ |
| 1163 | .pvr_mask = 0x7fff0000, |
| 1164 | .pvr_value = 0x00810000, |
| 1165 | .cpu_name = "82xx", |
| 1166 | .cpu_features = CPU_FTRS_82XX, |
| 1167 | .cpu_user_features = COMMON_USER, |
| 1168 | .mmu_features = 0, |
| 1169 | .icache_bsize = 32, |
| 1170 | .dcache_bsize = 32, |
| 1171 | .cpu_setup = __setup_cpu_603, |
| 1172 | .machine_check = machine_check_generic, |
| 1173 | .platform = "ppc603", |
| 1174 | }, |
| 1175 | { /* All G2_LE (603e core, plus some) have the same pvr */ |
| 1176 | .pvr_mask = 0x7fff0000, |
| 1177 | .pvr_value = 0x00820000, |
| 1178 | .cpu_name = "G2_LE", |
| 1179 | .cpu_features = CPU_FTRS_G2_LE, |
| 1180 | .cpu_user_features = COMMON_USER, |
| 1181 | .mmu_features = MMU_FTR_USE_HIGH_BATS, |
| 1182 | .icache_bsize = 32, |
| 1183 | .dcache_bsize = 32, |
| 1184 | .cpu_setup = __setup_cpu_603, |
| 1185 | .machine_check = machine_check_generic, |
| 1186 | .platform = "ppc603", |
| 1187 | }, |
| 1188 | { /* e300c1 (a 603e core, plus some) on 83xx */ |
| 1189 | .pvr_mask = 0x7fff0000, |
| 1190 | .pvr_value = 0x00830000, |
| 1191 | .cpu_name = "e300c1", |
| 1192 | .cpu_features = CPU_FTRS_E300, |
| 1193 | .cpu_user_features = COMMON_USER, |
| 1194 | .mmu_features = MMU_FTR_USE_HIGH_BATS, |
| 1195 | .icache_bsize = 32, |
| 1196 | .dcache_bsize = 32, |
| 1197 | .cpu_setup = __setup_cpu_603, |
| 1198 | .machine_check = machine_check_generic, |
| 1199 | .platform = "ppc603", |
| 1200 | }, |
| 1201 | { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ |
| 1202 | .pvr_mask = 0x7fff0000, |
| 1203 | .pvr_value = 0x00840000, |
| 1204 | .cpu_name = "e300c2", |
| 1205 | .cpu_features = CPU_FTRS_E300C2, |
| 1206 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
| 1207 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
| 1208 | MMU_FTR_NEED_DTLB_SW_LRU, |
| 1209 | .icache_bsize = 32, |
| 1210 | .dcache_bsize = 32, |
| 1211 | .cpu_setup = __setup_cpu_603, |
| 1212 | .machine_check = machine_check_generic, |
| 1213 | .platform = "ppc603", |
| 1214 | }, |
| 1215 | { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ |
| 1216 | .pvr_mask = 0x7fff0000, |
| 1217 | .pvr_value = 0x00850000, |
| 1218 | .cpu_name = "e300c3", |
| 1219 | .cpu_features = CPU_FTRS_E300, |
| 1220 | .cpu_user_features = COMMON_USER, |
| 1221 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
| 1222 | MMU_FTR_NEED_DTLB_SW_LRU, |
| 1223 | .icache_bsize = 32, |
| 1224 | .dcache_bsize = 32, |
| 1225 | .cpu_setup = __setup_cpu_603, |
| 1226 | .machine_check = machine_check_generic, |
| 1227 | .num_pmcs = 4, |
| 1228 | .oprofile_cpu_type = "ppc/e300", |
| 1229 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 1230 | .platform = "ppc603", |
| 1231 | }, |
| 1232 | { /* e300c4 (e300c1, plus one IU) */ |
| 1233 | .pvr_mask = 0x7fff0000, |
| 1234 | .pvr_value = 0x00860000, |
| 1235 | .cpu_name = "e300c4", |
| 1236 | .cpu_features = CPU_FTRS_E300, |
| 1237 | .cpu_user_features = COMMON_USER, |
| 1238 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
| 1239 | MMU_FTR_NEED_DTLB_SW_LRU, |
| 1240 | .icache_bsize = 32, |
| 1241 | .dcache_bsize = 32, |
| 1242 | .cpu_setup = __setup_cpu_603, |
| 1243 | .machine_check = machine_check_generic, |
| 1244 | .num_pmcs = 4, |
| 1245 | .oprofile_cpu_type = "ppc/e300", |
| 1246 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 1247 | .platform = "ppc603", |
| 1248 | }, |
| 1249 | { /* default match, we assume split I/D cache & TB (non-601)... */ |
| 1250 | .pvr_mask = 0x00000000, |
| 1251 | .pvr_value = 0x00000000, |
| 1252 | .cpu_name = "(generic PPC)", |
| 1253 | .cpu_features = CPU_FTRS_CLASSIC32, |
| 1254 | .cpu_user_features = COMMON_USER, |
| 1255 | .mmu_features = MMU_FTR_HPTE_TABLE, |
| 1256 | .icache_bsize = 32, |
| 1257 | .dcache_bsize = 32, |
| 1258 | .machine_check = machine_check_generic, |
| 1259 | .platform = "ppc603", |
| 1260 | }, |
| 1261 | #endif /* CONFIG_PPC_BOOK3S_32 */ |
| 1262 | #ifdef CONFIG_PPC_8xx |
| 1263 | { /* 8xx */ |
| 1264 | .pvr_mask = 0xffff0000, |
| 1265 | .pvr_value = PVR_8xx, |
| 1266 | .cpu_name = "8xx", |
| 1267 | /* CPU_FTR_MAYBE_CAN_DOZE is possible, |
| 1268 | * if the 8xx code is there.... */ |
| 1269 | .cpu_features = CPU_FTRS_8XX, |
| 1270 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
| 1271 | .mmu_features = MMU_FTR_TYPE_8xx, |
| 1272 | .icache_bsize = 16, |
| 1273 | .dcache_bsize = 16, |
| 1274 | .machine_check = machine_check_8xx, |
| 1275 | .platform = "ppc823", |
| 1276 | }, |
| 1277 | #endif /* CONFIG_PPC_8xx */ |
| 1278 | #ifdef CONFIG_40x |
| 1279 | { /* 403GC */ |
| 1280 | .pvr_mask = 0xffffff00, |
| 1281 | .pvr_value = 0x00200200, |
| 1282 | .cpu_name = "403GC", |
| 1283 | .cpu_features = CPU_FTRS_40X, |
| 1284 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
| 1285 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1286 | .icache_bsize = 16, |
| 1287 | .dcache_bsize = 16, |
| 1288 | .machine_check = machine_check_4xx, |
| 1289 | .platform = "ppc403", |
| 1290 | }, |
| 1291 | { /* 403GCX */ |
| 1292 | .pvr_mask = 0xffffff00, |
| 1293 | .pvr_value = 0x00201400, |
| 1294 | .cpu_name = "403GCX", |
| 1295 | .cpu_features = CPU_FTRS_40X, |
| 1296 | .cpu_user_features = PPC_FEATURE_32 | |
| 1297 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB, |
| 1298 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1299 | .icache_bsize = 16, |
| 1300 | .dcache_bsize = 16, |
| 1301 | .machine_check = machine_check_4xx, |
| 1302 | .platform = "ppc403", |
| 1303 | }, |
| 1304 | { /* 403G ?? */ |
| 1305 | .pvr_mask = 0xffff0000, |
| 1306 | .pvr_value = 0x00200000, |
| 1307 | .cpu_name = "403G ??", |
| 1308 | .cpu_features = CPU_FTRS_40X, |
| 1309 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
| 1310 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1311 | .icache_bsize = 16, |
| 1312 | .dcache_bsize = 16, |
| 1313 | .machine_check = machine_check_4xx, |
| 1314 | .platform = "ppc403", |
| 1315 | }, |
| 1316 | { /* 405GP */ |
| 1317 | .pvr_mask = 0xffff0000, |
| 1318 | .pvr_value = 0x40110000, |
| 1319 | .cpu_name = "405GP", |
| 1320 | .cpu_features = CPU_FTRS_40X, |
| 1321 | .cpu_user_features = PPC_FEATURE_32 | |
| 1322 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1323 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1324 | .icache_bsize = 32, |
| 1325 | .dcache_bsize = 32, |
| 1326 | .machine_check = machine_check_4xx, |
| 1327 | .platform = "ppc405", |
| 1328 | }, |
| 1329 | { /* STB 03xxx */ |
| 1330 | .pvr_mask = 0xffff0000, |
| 1331 | .pvr_value = 0x40130000, |
| 1332 | .cpu_name = "STB03xxx", |
| 1333 | .cpu_features = CPU_FTRS_40X, |
| 1334 | .cpu_user_features = PPC_FEATURE_32 | |
| 1335 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1336 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1337 | .icache_bsize = 32, |
| 1338 | .dcache_bsize = 32, |
| 1339 | .machine_check = machine_check_4xx, |
| 1340 | .platform = "ppc405", |
| 1341 | }, |
| 1342 | { /* STB 04xxx */ |
| 1343 | .pvr_mask = 0xffff0000, |
| 1344 | .pvr_value = 0x41810000, |
| 1345 | .cpu_name = "STB04xxx", |
| 1346 | .cpu_features = CPU_FTRS_40X, |
| 1347 | .cpu_user_features = PPC_FEATURE_32 | |
| 1348 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1349 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1350 | .icache_bsize = 32, |
| 1351 | .dcache_bsize = 32, |
| 1352 | .machine_check = machine_check_4xx, |
| 1353 | .platform = "ppc405", |
| 1354 | }, |
| 1355 | { /* NP405L */ |
| 1356 | .pvr_mask = 0xffff0000, |
| 1357 | .pvr_value = 0x41610000, |
| 1358 | .cpu_name = "NP405L", |
| 1359 | .cpu_features = CPU_FTRS_40X, |
| 1360 | .cpu_user_features = PPC_FEATURE_32 | |
| 1361 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1362 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1363 | .icache_bsize = 32, |
| 1364 | .dcache_bsize = 32, |
| 1365 | .machine_check = machine_check_4xx, |
| 1366 | .platform = "ppc405", |
| 1367 | }, |
| 1368 | { /* NP4GS3 */ |
| 1369 | .pvr_mask = 0xffff0000, |
| 1370 | .pvr_value = 0x40B10000, |
| 1371 | .cpu_name = "NP4GS3", |
| 1372 | .cpu_features = CPU_FTRS_40X, |
| 1373 | .cpu_user_features = PPC_FEATURE_32 | |
| 1374 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1375 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1376 | .icache_bsize = 32, |
| 1377 | .dcache_bsize = 32, |
| 1378 | .machine_check = machine_check_4xx, |
| 1379 | .platform = "ppc405", |
| 1380 | }, |
| 1381 | { /* NP405H */ |
| 1382 | .pvr_mask = 0xffff0000, |
| 1383 | .pvr_value = 0x41410000, |
| 1384 | .cpu_name = "NP405H", |
| 1385 | .cpu_features = CPU_FTRS_40X, |
| 1386 | .cpu_user_features = PPC_FEATURE_32 | |
| 1387 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1388 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1389 | .icache_bsize = 32, |
| 1390 | .dcache_bsize = 32, |
| 1391 | .machine_check = machine_check_4xx, |
| 1392 | .platform = "ppc405", |
| 1393 | }, |
| 1394 | { /* 405GPr */ |
| 1395 | .pvr_mask = 0xffff0000, |
| 1396 | .pvr_value = 0x50910000, |
| 1397 | .cpu_name = "405GPr", |
| 1398 | .cpu_features = CPU_FTRS_40X, |
| 1399 | .cpu_user_features = PPC_FEATURE_32 | |
| 1400 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1401 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1402 | .icache_bsize = 32, |
| 1403 | .dcache_bsize = 32, |
| 1404 | .machine_check = machine_check_4xx, |
| 1405 | .platform = "ppc405", |
| 1406 | }, |
| 1407 | { /* STBx25xx */ |
| 1408 | .pvr_mask = 0xffff0000, |
| 1409 | .pvr_value = 0x51510000, |
| 1410 | .cpu_name = "STBx25xx", |
| 1411 | .cpu_features = CPU_FTRS_40X, |
| 1412 | .cpu_user_features = PPC_FEATURE_32 | |
| 1413 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1414 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1415 | .icache_bsize = 32, |
| 1416 | .dcache_bsize = 32, |
| 1417 | .machine_check = machine_check_4xx, |
| 1418 | .platform = "ppc405", |
| 1419 | }, |
| 1420 | { /* 405LP */ |
| 1421 | .pvr_mask = 0xffff0000, |
| 1422 | .pvr_value = 0x41F10000, |
| 1423 | .cpu_name = "405LP", |
| 1424 | .cpu_features = CPU_FTRS_40X, |
| 1425 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
| 1426 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1427 | .icache_bsize = 32, |
| 1428 | .dcache_bsize = 32, |
| 1429 | .machine_check = machine_check_4xx, |
| 1430 | .platform = "ppc405", |
| 1431 | }, |
| 1432 | { /* Xilinx Virtex-II Pro */ |
| 1433 | .pvr_mask = 0xfffff000, |
| 1434 | .pvr_value = 0x20010000, |
| 1435 | .cpu_name = "Virtex-II Pro", |
| 1436 | .cpu_features = CPU_FTRS_40X, |
| 1437 | .cpu_user_features = PPC_FEATURE_32 | |
| 1438 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1439 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1440 | .icache_bsize = 32, |
| 1441 | .dcache_bsize = 32, |
| 1442 | .machine_check = machine_check_4xx, |
| 1443 | .platform = "ppc405", |
| 1444 | }, |
| 1445 | { /* Xilinx Virtex-4 FX */ |
| 1446 | .pvr_mask = 0xfffff000, |
| 1447 | .pvr_value = 0x20011000, |
| 1448 | .cpu_name = "Virtex-4 FX", |
| 1449 | .cpu_features = CPU_FTRS_40X, |
| 1450 | .cpu_user_features = PPC_FEATURE_32 | |
| 1451 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1452 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1453 | .icache_bsize = 32, |
| 1454 | .dcache_bsize = 32, |
| 1455 | .machine_check = machine_check_4xx, |
| 1456 | .platform = "ppc405", |
| 1457 | }, |
| 1458 | { /* 405EP */ |
| 1459 | .pvr_mask = 0xffff0000, |
| 1460 | .pvr_value = 0x51210000, |
| 1461 | .cpu_name = "405EP", |
| 1462 | .cpu_features = CPU_FTRS_40X, |
| 1463 | .cpu_user_features = PPC_FEATURE_32 | |
| 1464 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1465 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1466 | .icache_bsize = 32, |
| 1467 | .dcache_bsize = 32, |
| 1468 | .machine_check = machine_check_4xx, |
| 1469 | .platform = "ppc405", |
| 1470 | }, |
| 1471 | { /* 405EX Rev. A/B with Security */ |
| 1472 | .pvr_mask = 0xffff000f, |
| 1473 | .pvr_value = 0x12910007, |
| 1474 | .cpu_name = "405EX Rev. A/B", |
| 1475 | .cpu_features = CPU_FTRS_40X, |
| 1476 | .cpu_user_features = PPC_FEATURE_32 | |
| 1477 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1478 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1479 | .icache_bsize = 32, |
| 1480 | .dcache_bsize = 32, |
| 1481 | .machine_check = machine_check_4xx, |
| 1482 | .platform = "ppc405", |
| 1483 | }, |
| 1484 | { /* 405EX Rev. C without Security */ |
| 1485 | .pvr_mask = 0xffff000f, |
| 1486 | .pvr_value = 0x1291000d, |
| 1487 | .cpu_name = "405EX Rev. C", |
| 1488 | .cpu_features = CPU_FTRS_40X, |
| 1489 | .cpu_user_features = PPC_FEATURE_32 | |
| 1490 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1491 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1492 | .icache_bsize = 32, |
| 1493 | .dcache_bsize = 32, |
| 1494 | .machine_check = machine_check_4xx, |
| 1495 | .platform = "ppc405", |
| 1496 | }, |
| 1497 | { /* 405EX Rev. C with Security */ |
| 1498 | .pvr_mask = 0xffff000f, |
| 1499 | .pvr_value = 0x1291000f, |
| 1500 | .cpu_name = "405EX Rev. C", |
| 1501 | .cpu_features = CPU_FTRS_40X, |
| 1502 | .cpu_user_features = PPC_FEATURE_32 | |
| 1503 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1504 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1505 | .icache_bsize = 32, |
| 1506 | .dcache_bsize = 32, |
| 1507 | .machine_check = machine_check_4xx, |
| 1508 | .platform = "ppc405", |
| 1509 | }, |
| 1510 | { /* 405EX Rev. D without Security */ |
| 1511 | .pvr_mask = 0xffff000f, |
| 1512 | .pvr_value = 0x12910003, |
| 1513 | .cpu_name = "405EX Rev. D", |
| 1514 | .cpu_features = CPU_FTRS_40X, |
| 1515 | .cpu_user_features = PPC_FEATURE_32 | |
| 1516 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1517 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1518 | .icache_bsize = 32, |
| 1519 | .dcache_bsize = 32, |
| 1520 | .machine_check = machine_check_4xx, |
| 1521 | .platform = "ppc405", |
| 1522 | }, |
| 1523 | { /* 405EX Rev. D with Security */ |
| 1524 | .pvr_mask = 0xffff000f, |
| 1525 | .pvr_value = 0x12910005, |
| 1526 | .cpu_name = "405EX Rev. D", |
| 1527 | .cpu_features = CPU_FTRS_40X, |
| 1528 | .cpu_user_features = PPC_FEATURE_32 | |
| 1529 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1530 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1531 | .icache_bsize = 32, |
| 1532 | .dcache_bsize = 32, |
| 1533 | .machine_check = machine_check_4xx, |
| 1534 | .platform = "ppc405", |
| 1535 | }, |
| 1536 | { /* 405EXr Rev. A/B without Security */ |
| 1537 | .pvr_mask = 0xffff000f, |
| 1538 | .pvr_value = 0x12910001, |
| 1539 | .cpu_name = "405EXr Rev. A/B", |
| 1540 | .cpu_features = CPU_FTRS_40X, |
| 1541 | .cpu_user_features = PPC_FEATURE_32 | |
| 1542 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1543 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1544 | .icache_bsize = 32, |
| 1545 | .dcache_bsize = 32, |
| 1546 | .machine_check = machine_check_4xx, |
| 1547 | .platform = "ppc405", |
| 1548 | }, |
| 1549 | { /* 405EXr Rev. C without Security */ |
| 1550 | .pvr_mask = 0xffff000f, |
| 1551 | .pvr_value = 0x12910009, |
| 1552 | .cpu_name = "405EXr Rev. C", |
| 1553 | .cpu_features = CPU_FTRS_40X, |
| 1554 | .cpu_user_features = PPC_FEATURE_32 | |
| 1555 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1556 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1557 | .icache_bsize = 32, |
| 1558 | .dcache_bsize = 32, |
| 1559 | .machine_check = machine_check_4xx, |
| 1560 | .platform = "ppc405", |
| 1561 | }, |
| 1562 | { /* 405EXr Rev. C with Security */ |
| 1563 | .pvr_mask = 0xffff000f, |
| 1564 | .pvr_value = 0x1291000b, |
| 1565 | .cpu_name = "405EXr Rev. C", |
| 1566 | .cpu_features = CPU_FTRS_40X, |
| 1567 | .cpu_user_features = PPC_FEATURE_32 | |
| 1568 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1569 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1570 | .icache_bsize = 32, |
| 1571 | .dcache_bsize = 32, |
| 1572 | .machine_check = machine_check_4xx, |
| 1573 | .platform = "ppc405", |
| 1574 | }, |
| 1575 | { /* 405EXr Rev. D without Security */ |
| 1576 | .pvr_mask = 0xffff000f, |
| 1577 | .pvr_value = 0x12910000, |
| 1578 | .cpu_name = "405EXr Rev. D", |
| 1579 | .cpu_features = CPU_FTRS_40X, |
| 1580 | .cpu_user_features = PPC_FEATURE_32 | |
| 1581 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1582 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1583 | .icache_bsize = 32, |
| 1584 | .dcache_bsize = 32, |
| 1585 | .machine_check = machine_check_4xx, |
| 1586 | .platform = "ppc405", |
| 1587 | }, |
| 1588 | { /* 405EXr Rev. D with Security */ |
| 1589 | .pvr_mask = 0xffff000f, |
| 1590 | .pvr_value = 0x12910002, |
| 1591 | .cpu_name = "405EXr Rev. D", |
| 1592 | .cpu_features = CPU_FTRS_40X, |
| 1593 | .cpu_user_features = PPC_FEATURE_32 | |
| 1594 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1595 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1596 | .icache_bsize = 32, |
| 1597 | .dcache_bsize = 32, |
| 1598 | .machine_check = machine_check_4xx, |
| 1599 | .platform = "ppc405", |
| 1600 | }, |
| 1601 | { |
| 1602 | /* 405EZ */ |
| 1603 | .pvr_mask = 0xffff0000, |
| 1604 | .pvr_value = 0x41510000, |
| 1605 | .cpu_name = "405EZ", |
| 1606 | .cpu_features = CPU_FTRS_40X, |
| 1607 | .cpu_user_features = PPC_FEATURE_32 | |
| 1608 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1609 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1610 | .icache_bsize = 32, |
| 1611 | .dcache_bsize = 32, |
| 1612 | .machine_check = machine_check_4xx, |
| 1613 | .platform = "ppc405", |
| 1614 | }, |
| 1615 | { /* APM8018X */ |
| 1616 | .pvr_mask = 0xffff0000, |
| 1617 | .pvr_value = 0x7ff11432, |
| 1618 | .cpu_name = "APM8018X", |
| 1619 | .cpu_features = CPU_FTRS_40X, |
| 1620 | .cpu_user_features = PPC_FEATURE_32 | |
| 1621 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1622 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1623 | .icache_bsize = 32, |
| 1624 | .dcache_bsize = 32, |
| 1625 | .machine_check = machine_check_4xx, |
| 1626 | .platform = "ppc405", |
| 1627 | }, |
| 1628 | { /* default match */ |
| 1629 | .pvr_mask = 0x00000000, |
| 1630 | .pvr_value = 0x00000000, |
| 1631 | .cpu_name = "(generic 40x PPC)", |
| 1632 | .cpu_features = CPU_FTRS_40X, |
| 1633 | .cpu_user_features = PPC_FEATURE_32 | |
| 1634 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
| 1635 | .mmu_features = MMU_FTR_TYPE_40x, |
| 1636 | .icache_bsize = 32, |
| 1637 | .dcache_bsize = 32, |
| 1638 | .machine_check = machine_check_4xx, |
| 1639 | .platform = "ppc405", |
| 1640 | } |
| 1641 | |
| 1642 | #endif /* CONFIG_40x */ |
| 1643 | #ifdef CONFIG_44x |
| 1644 | { |
| 1645 | .pvr_mask = 0xf0000fff, |
| 1646 | .pvr_value = 0x40000850, |
| 1647 | .cpu_name = "440GR Rev. A", |
| 1648 | .cpu_features = CPU_FTRS_44X, |
| 1649 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1650 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1651 | .icache_bsize = 32, |
| 1652 | .dcache_bsize = 32, |
| 1653 | .machine_check = machine_check_4xx, |
| 1654 | .platform = "ppc440", |
| 1655 | }, |
| 1656 | { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ |
| 1657 | .pvr_mask = 0xf0000fff, |
| 1658 | .pvr_value = 0x40000858, |
| 1659 | .cpu_name = "440EP Rev. A", |
| 1660 | .cpu_features = CPU_FTRS_44X, |
| 1661 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1662 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1663 | .icache_bsize = 32, |
| 1664 | .dcache_bsize = 32, |
| 1665 | .cpu_setup = __setup_cpu_440ep, |
| 1666 | .machine_check = machine_check_4xx, |
| 1667 | .platform = "ppc440", |
| 1668 | }, |
| 1669 | { |
| 1670 | .pvr_mask = 0xf0000fff, |
| 1671 | .pvr_value = 0x400008d3, |
| 1672 | .cpu_name = "440GR Rev. B", |
| 1673 | .cpu_features = CPU_FTRS_44X, |
| 1674 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1675 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1676 | .icache_bsize = 32, |
| 1677 | .dcache_bsize = 32, |
| 1678 | .machine_check = machine_check_4xx, |
| 1679 | .platform = "ppc440", |
| 1680 | }, |
| 1681 | { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ |
| 1682 | .pvr_mask = 0xf0000ff7, |
| 1683 | .pvr_value = 0x400008d4, |
| 1684 | .cpu_name = "440EP Rev. C", |
| 1685 | .cpu_features = CPU_FTRS_44X, |
| 1686 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1687 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1688 | .icache_bsize = 32, |
| 1689 | .dcache_bsize = 32, |
| 1690 | .cpu_setup = __setup_cpu_440ep, |
| 1691 | .machine_check = machine_check_4xx, |
| 1692 | .platform = "ppc440", |
| 1693 | }, |
| 1694 | { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ |
| 1695 | .pvr_mask = 0xf0000fff, |
| 1696 | .pvr_value = 0x400008db, |
| 1697 | .cpu_name = "440EP Rev. B", |
| 1698 | .cpu_features = CPU_FTRS_44X, |
| 1699 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1700 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1701 | .icache_bsize = 32, |
| 1702 | .dcache_bsize = 32, |
| 1703 | .cpu_setup = __setup_cpu_440ep, |
| 1704 | .machine_check = machine_check_4xx, |
| 1705 | .platform = "ppc440", |
| 1706 | }, |
| 1707 | { /* 440GRX */ |
| 1708 | .pvr_mask = 0xf0000ffb, |
| 1709 | .pvr_value = 0x200008D0, |
| 1710 | .cpu_name = "440GRX", |
| 1711 | .cpu_features = CPU_FTRS_44X, |
| 1712 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1713 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1714 | .icache_bsize = 32, |
| 1715 | .dcache_bsize = 32, |
| 1716 | .cpu_setup = __setup_cpu_440grx, |
| 1717 | .machine_check = machine_check_440A, |
| 1718 | .platform = "ppc440", |
| 1719 | }, |
| 1720 | { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ |
| 1721 | .pvr_mask = 0xf0000ffb, |
| 1722 | .pvr_value = 0x200008D8, |
| 1723 | .cpu_name = "440EPX", |
| 1724 | .cpu_features = CPU_FTRS_44X, |
| 1725 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1726 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1727 | .icache_bsize = 32, |
| 1728 | .dcache_bsize = 32, |
| 1729 | .cpu_setup = __setup_cpu_440epx, |
| 1730 | .machine_check = machine_check_440A, |
| 1731 | .platform = "ppc440", |
| 1732 | }, |
| 1733 | { /* 440GP Rev. B */ |
| 1734 | .pvr_mask = 0xf0000fff, |
| 1735 | .pvr_value = 0x40000440, |
| 1736 | .cpu_name = "440GP Rev. B", |
| 1737 | .cpu_features = CPU_FTRS_44X, |
| 1738 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1739 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1740 | .icache_bsize = 32, |
| 1741 | .dcache_bsize = 32, |
| 1742 | .machine_check = machine_check_4xx, |
| 1743 | .platform = "ppc440gp", |
| 1744 | }, |
| 1745 | { /* 440GP Rev. C */ |
| 1746 | .pvr_mask = 0xf0000fff, |
| 1747 | .pvr_value = 0x40000481, |
| 1748 | .cpu_name = "440GP Rev. C", |
| 1749 | .cpu_features = CPU_FTRS_44X, |
| 1750 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1751 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1752 | .icache_bsize = 32, |
| 1753 | .dcache_bsize = 32, |
| 1754 | .machine_check = machine_check_4xx, |
| 1755 | .platform = "ppc440gp", |
| 1756 | }, |
| 1757 | { /* 440GX Rev. A */ |
| 1758 | .pvr_mask = 0xf0000fff, |
| 1759 | .pvr_value = 0x50000850, |
| 1760 | .cpu_name = "440GX Rev. A", |
| 1761 | .cpu_features = CPU_FTRS_44X, |
| 1762 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1763 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1764 | .icache_bsize = 32, |
| 1765 | .dcache_bsize = 32, |
| 1766 | .cpu_setup = __setup_cpu_440gx, |
| 1767 | .machine_check = machine_check_440A, |
| 1768 | .platform = "ppc440", |
| 1769 | }, |
| 1770 | { /* 440GX Rev. B */ |
| 1771 | .pvr_mask = 0xf0000fff, |
| 1772 | .pvr_value = 0x50000851, |
| 1773 | .cpu_name = "440GX Rev. B", |
| 1774 | .cpu_features = CPU_FTRS_44X, |
| 1775 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1776 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1777 | .icache_bsize = 32, |
| 1778 | .dcache_bsize = 32, |
| 1779 | .cpu_setup = __setup_cpu_440gx, |
| 1780 | .machine_check = machine_check_440A, |
| 1781 | .platform = "ppc440", |
| 1782 | }, |
| 1783 | { /* 440GX Rev. C */ |
| 1784 | .pvr_mask = 0xf0000fff, |
| 1785 | .pvr_value = 0x50000892, |
| 1786 | .cpu_name = "440GX Rev. C", |
| 1787 | .cpu_features = CPU_FTRS_44X, |
| 1788 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1789 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1790 | .icache_bsize = 32, |
| 1791 | .dcache_bsize = 32, |
| 1792 | .cpu_setup = __setup_cpu_440gx, |
| 1793 | .machine_check = machine_check_440A, |
| 1794 | .platform = "ppc440", |
| 1795 | }, |
| 1796 | { /* 440GX Rev. F */ |
| 1797 | .pvr_mask = 0xf0000fff, |
| 1798 | .pvr_value = 0x50000894, |
| 1799 | .cpu_name = "440GX Rev. F", |
| 1800 | .cpu_features = CPU_FTRS_44X, |
| 1801 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1802 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1803 | .icache_bsize = 32, |
| 1804 | .dcache_bsize = 32, |
| 1805 | .cpu_setup = __setup_cpu_440gx, |
| 1806 | .machine_check = machine_check_440A, |
| 1807 | .platform = "ppc440", |
| 1808 | }, |
| 1809 | { /* 440SP Rev. A */ |
| 1810 | .pvr_mask = 0xfff00fff, |
| 1811 | .pvr_value = 0x53200891, |
| 1812 | .cpu_name = "440SP Rev. A", |
| 1813 | .cpu_features = CPU_FTRS_44X, |
| 1814 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1815 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1816 | .icache_bsize = 32, |
| 1817 | .dcache_bsize = 32, |
| 1818 | .machine_check = machine_check_4xx, |
| 1819 | .platform = "ppc440", |
| 1820 | }, |
| 1821 | { /* 440SPe Rev. A */ |
| 1822 | .pvr_mask = 0xfff00fff, |
| 1823 | .pvr_value = 0x53400890, |
| 1824 | .cpu_name = "440SPe Rev. A", |
| 1825 | .cpu_features = CPU_FTRS_44X, |
| 1826 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1827 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1828 | .icache_bsize = 32, |
| 1829 | .dcache_bsize = 32, |
| 1830 | .cpu_setup = __setup_cpu_440spe, |
| 1831 | .machine_check = machine_check_440A, |
| 1832 | .platform = "ppc440", |
| 1833 | }, |
| 1834 | { /* 440SPe Rev. B */ |
| 1835 | .pvr_mask = 0xfff00fff, |
| 1836 | .pvr_value = 0x53400891, |
| 1837 | .cpu_name = "440SPe Rev. B", |
| 1838 | .cpu_features = CPU_FTRS_44X, |
| 1839 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1840 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1841 | .icache_bsize = 32, |
| 1842 | .dcache_bsize = 32, |
| 1843 | .cpu_setup = __setup_cpu_440spe, |
| 1844 | .machine_check = machine_check_440A, |
| 1845 | .platform = "ppc440", |
| 1846 | }, |
| 1847 | { /* 440 in Xilinx Virtex-5 FXT */ |
| 1848 | .pvr_mask = 0xfffffff0, |
| 1849 | .pvr_value = 0x7ff21910, |
| 1850 | .cpu_name = "440 in Virtex-5 FXT", |
| 1851 | .cpu_features = CPU_FTRS_44X, |
| 1852 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1853 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1854 | .icache_bsize = 32, |
| 1855 | .dcache_bsize = 32, |
| 1856 | .cpu_setup = __setup_cpu_440x5, |
| 1857 | .machine_check = machine_check_440A, |
| 1858 | .platform = "ppc440", |
| 1859 | }, |
| 1860 | { /* 460EX */ |
| 1861 | .pvr_mask = 0xffff0006, |
| 1862 | .pvr_value = 0x13020002, |
| 1863 | .cpu_name = "460EX", |
| 1864 | .cpu_features = CPU_FTRS_440x6, |
| 1865 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1866 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1867 | .icache_bsize = 32, |
| 1868 | .dcache_bsize = 32, |
| 1869 | .cpu_setup = __setup_cpu_460ex, |
| 1870 | .machine_check = machine_check_440A, |
| 1871 | .platform = "ppc440", |
| 1872 | }, |
| 1873 | { /* 460EX Rev B */ |
| 1874 | .pvr_mask = 0xffff0007, |
| 1875 | .pvr_value = 0x13020004, |
| 1876 | .cpu_name = "460EX Rev. B", |
| 1877 | .cpu_features = CPU_FTRS_440x6, |
| 1878 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1879 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1880 | .icache_bsize = 32, |
| 1881 | .dcache_bsize = 32, |
| 1882 | .cpu_setup = __setup_cpu_460ex, |
| 1883 | .machine_check = machine_check_440A, |
| 1884 | .platform = "ppc440", |
| 1885 | }, |
| 1886 | { /* 460GT */ |
| 1887 | .pvr_mask = 0xffff0006, |
| 1888 | .pvr_value = 0x13020000, |
| 1889 | .cpu_name = "460GT", |
| 1890 | .cpu_features = CPU_FTRS_440x6, |
| 1891 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1892 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1893 | .icache_bsize = 32, |
| 1894 | .dcache_bsize = 32, |
| 1895 | .cpu_setup = __setup_cpu_460gt, |
| 1896 | .machine_check = machine_check_440A, |
| 1897 | .platform = "ppc440", |
| 1898 | }, |
| 1899 | { /* 460GT Rev B */ |
| 1900 | .pvr_mask = 0xffff0007, |
| 1901 | .pvr_value = 0x13020005, |
| 1902 | .cpu_name = "460GT Rev. B", |
| 1903 | .cpu_features = CPU_FTRS_440x6, |
| 1904 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 1905 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1906 | .icache_bsize = 32, |
| 1907 | .dcache_bsize = 32, |
| 1908 | .cpu_setup = __setup_cpu_460gt, |
| 1909 | .machine_check = machine_check_440A, |
| 1910 | .platform = "ppc440", |
| 1911 | }, |
| 1912 | { /* 460SX */ |
| 1913 | .pvr_mask = 0xffffff00, |
| 1914 | .pvr_value = 0x13541800, |
| 1915 | .cpu_name = "460SX", |
| 1916 | .cpu_features = CPU_FTRS_44X, |
| 1917 | .cpu_user_features = COMMON_USER_BOOKE, |
| 1918 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1919 | .icache_bsize = 32, |
| 1920 | .dcache_bsize = 32, |
| 1921 | .cpu_setup = __setup_cpu_460sx, |
| 1922 | .machine_check = machine_check_440A, |
| 1923 | .platform = "ppc440", |
| 1924 | }, |
| 1925 | { /* 464 in APM821xx */ |
| 1926 | .pvr_mask = 0xfffffff0, |
| 1927 | .pvr_value = 0x12C41C80, |
| 1928 | .cpu_name = "APM821XX", |
| 1929 | .cpu_features = CPU_FTRS_44X, |
| 1930 | .cpu_user_features = COMMON_USER_BOOKE | |
| 1931 | PPC_FEATURE_HAS_FPU, |
| 1932 | .mmu_features = MMU_FTR_TYPE_44x, |
| 1933 | .icache_bsize = 32, |
| 1934 | .dcache_bsize = 32, |
| 1935 | .cpu_setup = __setup_cpu_apm821xx, |
| 1936 | .machine_check = machine_check_440A, |
| 1937 | .platform = "ppc440", |
| 1938 | }, |
| 1939 | #ifdef CONFIG_PPC_47x |
| 1940 | { /* 476 DD2 core */ |
| 1941 | .pvr_mask = 0xffffffff, |
| 1942 | .pvr_value = 0x11a52080, |
| 1943 | .cpu_name = "476", |
| 1944 | .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, |
| 1945 | .cpu_user_features = COMMON_USER_BOOKE | |
| 1946 | PPC_FEATURE_HAS_FPU, |
| 1947 | .mmu_features = MMU_FTR_TYPE_47x | |
| 1948 | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, |
| 1949 | .icache_bsize = 32, |
| 1950 | .dcache_bsize = 128, |
| 1951 | .machine_check = machine_check_47x, |
| 1952 | .platform = "ppc470", |
| 1953 | }, |
| 1954 | { /* 476fpe */ |
| 1955 | .pvr_mask = 0xffff0000, |
| 1956 | .pvr_value = 0x7ff50000, |
| 1957 | .cpu_name = "476fpe", |
| 1958 | .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, |
| 1959 | .cpu_user_features = COMMON_USER_BOOKE | |
| 1960 | PPC_FEATURE_HAS_FPU, |
| 1961 | .mmu_features = MMU_FTR_TYPE_47x | |
| 1962 | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, |
| 1963 | .icache_bsize = 32, |
| 1964 | .dcache_bsize = 128, |
| 1965 | .machine_check = machine_check_47x, |
| 1966 | .platform = "ppc470", |
| 1967 | }, |
| 1968 | { /* 476 iss */ |
| 1969 | .pvr_mask = 0xffff0000, |
| 1970 | .pvr_value = 0x00050000, |
| 1971 | .cpu_name = "476", |
| 1972 | .cpu_features = CPU_FTRS_47X, |
| 1973 | .cpu_user_features = COMMON_USER_BOOKE | |
| 1974 | PPC_FEATURE_HAS_FPU, |
| 1975 | .mmu_features = MMU_FTR_TYPE_47x | |
| 1976 | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, |
| 1977 | .icache_bsize = 32, |
| 1978 | .dcache_bsize = 128, |
| 1979 | .machine_check = machine_check_47x, |
| 1980 | .platform = "ppc470", |
| 1981 | }, |
| 1982 | { /* 476 others */ |
| 1983 | .pvr_mask = 0xffff0000, |
| 1984 | .pvr_value = 0x11a50000, |
| 1985 | .cpu_name = "476", |
| 1986 | .cpu_features = CPU_FTRS_47X, |
| 1987 | .cpu_user_features = COMMON_USER_BOOKE | |
| 1988 | PPC_FEATURE_HAS_FPU, |
| 1989 | .mmu_features = MMU_FTR_TYPE_47x | |
| 1990 | MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, |
| 1991 | .icache_bsize = 32, |
| 1992 | .dcache_bsize = 128, |
| 1993 | .machine_check = machine_check_47x, |
| 1994 | .platform = "ppc470", |
| 1995 | }, |
| 1996 | #endif /* CONFIG_PPC_47x */ |
| 1997 | { /* default match */ |
| 1998 | .pvr_mask = 0x00000000, |
| 1999 | .pvr_value = 0x00000000, |
| 2000 | .cpu_name = "(generic 44x PPC)", |
| 2001 | .cpu_features = CPU_FTRS_44X, |
| 2002 | .cpu_user_features = COMMON_USER_BOOKE, |
| 2003 | .mmu_features = MMU_FTR_TYPE_44x, |
| 2004 | .icache_bsize = 32, |
| 2005 | .dcache_bsize = 32, |
| 2006 | .machine_check = machine_check_4xx, |
| 2007 | .platform = "ppc440", |
| 2008 | } |
| 2009 | #endif /* CONFIG_44x */ |
| 2010 | #ifdef CONFIG_E200 |
| 2011 | { /* e200z5 */ |
| 2012 | .pvr_mask = 0xfff00000, |
| 2013 | .pvr_value = 0x81000000, |
| 2014 | .cpu_name = "e200z5", |
| 2015 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
| 2016 | .cpu_features = CPU_FTRS_E200, |
| 2017 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2018 | PPC_FEATURE_HAS_EFP_SINGLE | |
| 2019 | PPC_FEATURE_UNIFIED_CACHE, |
| 2020 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
| 2021 | .dcache_bsize = 32, |
| 2022 | .machine_check = machine_check_e200, |
| 2023 | .platform = "ppc5554", |
| 2024 | }, |
| 2025 | { /* e200z6 */ |
| 2026 | .pvr_mask = 0xfff00000, |
| 2027 | .pvr_value = 0x81100000, |
| 2028 | .cpu_name = "e200z6", |
| 2029 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
| 2030 | .cpu_features = CPU_FTRS_E200, |
| 2031 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2032 | PPC_FEATURE_HAS_SPE_COMP | |
| 2033 | PPC_FEATURE_HAS_EFP_SINGLE_COMP | |
| 2034 | PPC_FEATURE_UNIFIED_CACHE, |
| 2035 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
| 2036 | .dcache_bsize = 32, |
| 2037 | .machine_check = machine_check_e200, |
| 2038 | .platform = "ppc5554", |
| 2039 | }, |
| 2040 | { /* default match */ |
| 2041 | .pvr_mask = 0x00000000, |
| 2042 | .pvr_value = 0x00000000, |
| 2043 | .cpu_name = "(generic E200 PPC)", |
| 2044 | .cpu_features = CPU_FTRS_E200, |
| 2045 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2046 | PPC_FEATURE_HAS_EFP_SINGLE | |
| 2047 | PPC_FEATURE_UNIFIED_CACHE, |
| 2048 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
| 2049 | .dcache_bsize = 32, |
| 2050 | .cpu_setup = __setup_cpu_e200, |
| 2051 | .machine_check = machine_check_e200, |
| 2052 | .platform = "ppc5554", |
| 2053 | } |
| 2054 | #endif /* CONFIG_E200 */ |
| 2055 | #endif /* CONFIG_PPC32 */ |
| 2056 | #ifdef CONFIG_E500 |
| 2057 | #ifdef CONFIG_PPC32 |
| 2058 | #ifndef CONFIG_PPC_E500MC |
| 2059 | { /* e500 */ |
| 2060 | .pvr_mask = 0xffff0000, |
| 2061 | .pvr_value = 0x80200000, |
| 2062 | .cpu_name = "e500", |
| 2063 | .cpu_features = CPU_FTRS_E500, |
| 2064 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2065 | PPC_FEATURE_HAS_SPE_COMP | |
| 2066 | PPC_FEATURE_HAS_EFP_SINGLE_COMP, |
| 2067 | .cpu_user_features2 = PPC_FEATURE2_ISEL, |
| 2068 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
| 2069 | .icache_bsize = 32, |
| 2070 | .dcache_bsize = 32, |
| 2071 | .num_pmcs = 4, |
| 2072 | .oprofile_cpu_type = "ppc/e500", |
| 2073 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 2074 | .cpu_setup = __setup_cpu_e500v1, |
| 2075 | .machine_check = machine_check_e500, |
| 2076 | .platform = "ppc8540", |
| 2077 | }, |
| 2078 | { /* e500v2 */ |
| 2079 | .pvr_mask = 0xffff0000, |
| 2080 | .pvr_value = 0x80210000, |
| 2081 | .cpu_name = "e500v2", |
| 2082 | .cpu_features = CPU_FTRS_E500_2, |
| 2083 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2084 | PPC_FEATURE_HAS_SPE_COMP | |
| 2085 | PPC_FEATURE_HAS_EFP_SINGLE_COMP | |
| 2086 | PPC_FEATURE_HAS_EFP_DOUBLE_COMP, |
| 2087 | .cpu_user_features2 = PPC_FEATURE2_ISEL, |
| 2088 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, |
| 2089 | .icache_bsize = 32, |
| 2090 | .dcache_bsize = 32, |
| 2091 | .num_pmcs = 4, |
| 2092 | .oprofile_cpu_type = "ppc/e500", |
| 2093 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 2094 | .cpu_setup = __setup_cpu_e500v2, |
| 2095 | .machine_check = machine_check_e500, |
| 2096 | .platform = "ppc8548", |
| 2097 | .cpu_down_flush = cpu_down_flush_e500v2, |
| 2098 | }, |
| 2099 | #else |
| 2100 | { /* e500mc */ |
| 2101 | .pvr_mask = 0xffff0000, |
| 2102 | .pvr_value = 0x80230000, |
| 2103 | .cpu_name = "e500mc", |
| 2104 | .cpu_features = CPU_FTRS_E500MC, |
| 2105 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 2106 | .cpu_user_features2 = PPC_FEATURE2_ISEL, |
| 2107 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
| 2108 | MMU_FTR_USE_TLBILX, |
| 2109 | .icache_bsize = 64, |
| 2110 | .dcache_bsize = 64, |
| 2111 | .num_pmcs = 4, |
| 2112 | .oprofile_cpu_type = "ppc/e500mc", |
| 2113 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 2114 | .cpu_setup = __setup_cpu_e500mc, |
| 2115 | .machine_check = machine_check_e500mc, |
| 2116 | .platform = "ppce500mc", |
| 2117 | .cpu_down_flush = cpu_down_flush_e500mc, |
| 2118 | }, |
| 2119 | #endif /* CONFIG_PPC_E500MC */ |
| 2120 | #endif /* CONFIG_PPC32 */ |
| 2121 | #ifdef CONFIG_PPC_E500MC |
| 2122 | { /* e5500 */ |
| 2123 | .pvr_mask = 0xffff0000, |
| 2124 | .pvr_value = 0x80240000, |
| 2125 | .cpu_name = "e5500", |
| 2126 | .cpu_features = CPU_FTRS_E5500, |
| 2127 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
| 2128 | .cpu_user_features2 = PPC_FEATURE2_ISEL, |
| 2129 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
| 2130 | MMU_FTR_USE_TLBILX, |
| 2131 | .icache_bsize = 64, |
| 2132 | .dcache_bsize = 64, |
| 2133 | .num_pmcs = 4, |
| 2134 | .oprofile_cpu_type = "ppc/e500mc", |
| 2135 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 2136 | .cpu_setup = __setup_cpu_e5500, |
| 2137 | #ifndef CONFIG_PPC32 |
| 2138 | .cpu_restore = __restore_cpu_e5500, |
| 2139 | #endif |
| 2140 | .machine_check = machine_check_e500mc, |
| 2141 | .platform = "ppce5500", |
| 2142 | .cpu_down_flush = cpu_down_flush_e5500, |
| 2143 | }, |
| 2144 | { /* e6500 */ |
| 2145 | .pvr_mask = 0xffff0000, |
| 2146 | .pvr_value = 0x80400000, |
| 2147 | .cpu_name = "e6500", |
| 2148 | .cpu_features = CPU_FTRS_E6500, |
| 2149 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | |
| 2150 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
| 2151 | .cpu_user_features2 = PPC_FEATURE2_ISEL, |
| 2152 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
| 2153 | MMU_FTR_USE_TLBILX, |
| 2154 | .icache_bsize = 64, |
| 2155 | .dcache_bsize = 64, |
| 2156 | .num_pmcs = 6, |
| 2157 | .oprofile_cpu_type = "ppc/e6500", |
| 2158 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
| 2159 | .cpu_setup = __setup_cpu_e6500, |
| 2160 | #ifndef CONFIG_PPC32 |
| 2161 | .cpu_restore = __restore_cpu_e6500, |
| 2162 | #endif |
| 2163 | .machine_check = machine_check_e500mc, |
| 2164 | .platform = "ppce6500", |
| 2165 | .cpu_down_flush = cpu_down_flush_e6500, |
| 2166 | }, |
| 2167 | #endif /* CONFIG_PPC_E500MC */ |
| 2168 | #ifdef CONFIG_PPC32 |
| 2169 | { /* default match */ |
| 2170 | .pvr_mask = 0x00000000, |
| 2171 | .pvr_value = 0x00000000, |
| 2172 | .cpu_name = "(generic E500 PPC)", |
| 2173 | .cpu_features = CPU_FTRS_E500, |
| 2174 | .cpu_user_features = COMMON_USER_BOOKE | |
| 2175 | PPC_FEATURE_HAS_SPE_COMP | |
| 2176 | PPC_FEATURE_HAS_EFP_SINGLE_COMP, |
| 2177 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
| 2178 | .icache_bsize = 32, |
| 2179 | .dcache_bsize = 32, |
| 2180 | .machine_check = machine_check_e500, |
| 2181 | .platform = "powerpc", |
| 2182 | } |
| 2183 | #endif /* CONFIG_PPC32 */ |
| 2184 | #endif /* CONFIG_E500 */ |
| 2185 | }; |
| 2186 | |
| 2187 | void __init set_cur_cpu_spec(struct cpu_spec *s) |
| 2188 | { |
| 2189 | struct cpu_spec *t = &the_cpu_spec; |
| 2190 | |
| 2191 | t = PTRRELOC(t); |
| 2192 | *t = *s; |
| 2193 | |
| 2194 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; |
| 2195 | } |
| 2196 | |
| 2197 | static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, |
| 2198 | struct cpu_spec *s) |
| 2199 | { |
| 2200 | struct cpu_spec *t = &the_cpu_spec; |
| 2201 | struct cpu_spec old; |
| 2202 | |
| 2203 | t = PTRRELOC(t); |
| 2204 | old = *t; |
| 2205 | |
| 2206 | /* Copy everything, then do fixups */ |
| 2207 | *t = *s; |
| 2208 | |
| 2209 | /* |
| 2210 | * If we are overriding a previous value derived from the real |
| 2211 | * PVR with a new value obtained using a logical PVR value, |
| 2212 | * don't modify the performance monitor fields. |
| 2213 | */ |
| 2214 | if (old.num_pmcs && !s->num_pmcs) { |
| 2215 | t->num_pmcs = old.num_pmcs; |
| 2216 | t->pmc_type = old.pmc_type; |
| 2217 | t->oprofile_type = old.oprofile_type; |
| 2218 | t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; |
| 2219 | t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; |
| 2220 | t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; |
| 2221 | |
| 2222 | /* |
| 2223 | * If we have passed through this logic once before and |
| 2224 | * have pulled the default case because the real PVR was |
| 2225 | * not found inside cpu_specs[], then we are possibly |
| 2226 | * running in compatibility mode. In that case, let the |
| 2227 | * oprofiler know which set of compatibility counters to |
| 2228 | * pull from by making sure the oprofile_cpu_type string |
| 2229 | * is set to that of compatibility mode. If the |
| 2230 | * oprofile_cpu_type already has a value, then we are |
| 2231 | * possibly overriding a real PVR with a logical one, |
| 2232 | * and, in that case, keep the current value for |
| 2233 | * oprofile_cpu_type. |
| 2234 | */ |
| 2235 | if (old.oprofile_cpu_type != NULL) { |
| 2236 | t->oprofile_cpu_type = old.oprofile_cpu_type; |
| 2237 | t->oprofile_type = old.oprofile_type; |
| 2238 | } |
| 2239 | } |
| 2240 | |
| 2241 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; |
| 2242 | |
| 2243 | /* |
| 2244 | * Set the base platform string once; assumes |
| 2245 | * we're called with real pvr first. |
| 2246 | */ |
| 2247 | if (*PTRRELOC(&powerpc_base_platform) == NULL) |
| 2248 | *PTRRELOC(&powerpc_base_platform) = t->platform; |
| 2249 | |
| 2250 | #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) |
| 2251 | /* ppc64 and booke expect identify_cpu to also call setup_cpu for |
| 2252 | * that processor. I will consolidate that at a later time, for now, |
| 2253 | * just use #ifdef. We also don't need to PTRRELOC the function |
| 2254 | * pointer on ppc64 and booke as we are running at 0 in real mode |
| 2255 | * on ppc64 and reloc_offset is always 0 on booke. |
| 2256 | */ |
| 2257 | if (t->cpu_setup) { |
| 2258 | t->cpu_setup(offset, t); |
| 2259 | } |
| 2260 | #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ |
| 2261 | |
| 2262 | return t; |
| 2263 | } |
| 2264 | |
| 2265 | struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) |
| 2266 | { |
| 2267 | struct cpu_spec *s = cpu_specs; |
| 2268 | int i; |
| 2269 | |
| 2270 | s = PTRRELOC(s); |
| 2271 | |
| 2272 | for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { |
| 2273 | if ((pvr & s->pvr_mask) == s->pvr_value) |
| 2274 | return setup_cpu_spec(offset, s); |
| 2275 | } |
| 2276 | |
| 2277 | BUG(); |
| 2278 | |
| 2279 | return NULL; |
| 2280 | } |
| 2281 | |
| 2282 | /* |
| 2283 | * Used by cpufeatures to get the name for CPUs with a PVR table. |
| 2284 | * If they don't hae a PVR table, cpufeatures gets the name from |
| 2285 | * cpu device-tree node. |
| 2286 | */ |
| 2287 | void __init identify_cpu_name(unsigned int pvr) |
| 2288 | { |
| 2289 | struct cpu_spec *s = cpu_specs; |
| 2290 | struct cpu_spec *t = &the_cpu_spec; |
| 2291 | int i; |
| 2292 | |
| 2293 | s = PTRRELOC(s); |
| 2294 | t = PTRRELOC(t); |
| 2295 | |
| 2296 | for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { |
| 2297 | if ((pvr & s->pvr_mask) == s->pvr_value) { |
| 2298 | t->cpu_name = s->cpu_name; |
| 2299 | return; |
| 2300 | } |
| 2301 | } |
| 2302 | } |
| 2303 | |
| 2304 | |
| 2305 | #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS |
| 2306 | struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { |
| 2307 | [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT |
| 2308 | }; |
| 2309 | EXPORT_SYMBOL_GPL(cpu_feature_keys); |
| 2310 | |
| 2311 | void __init cpu_feature_keys_init(void) |
| 2312 | { |
| 2313 | int i; |
| 2314 | |
| 2315 | for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { |
| 2316 | unsigned long f = 1ul << i; |
| 2317 | |
| 2318 | if (!(cur_cpu_spec->cpu_features & f)) |
| 2319 | static_branch_disable(&cpu_feature_keys[i]); |
| 2320 | } |
| 2321 | } |
| 2322 | |
| 2323 | struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { |
| 2324 | [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT |
| 2325 | }; |
| 2326 | EXPORT_SYMBOL_GPL(mmu_feature_keys); |
| 2327 | |
| 2328 | void __init mmu_feature_keys_init(void) |
| 2329 | { |
| 2330 | int i; |
| 2331 | |
| 2332 | for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { |
| 2333 | unsigned long f = 1ul << i; |
| 2334 | |
| 2335 | if (!(cur_cpu_spec->mmu_features & f)) |
| 2336 | static_branch_disable(&mmu_feature_keys[i]); |
| 2337 | } |
| 2338 | } |
| 2339 | #endif |