| 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | comment "Processor Type" |
| 3 | |
| 4 | choice |
| 5 | prompt "CPU family support" |
| 6 | default M68KCLASSIC if MMU |
| 7 | default COLDFIRE if !MMU |
| 8 | help |
| 9 | The Freescale (was Motorola) M68K family of processors implements |
| 10 | the full 68000 processor instruction set. |
| 11 | The Freescale ColdFire family of processors is a modern derivative |
| 12 | of the 68000 processor family. They are mainly targeted at embedded |
| 13 | applications, and are all System-On-Chip (SOC) devices, as opposed |
| 14 | to stand alone CPUs. They implement a subset of the original 68000 |
| 15 | processor instruction set. |
| 16 | If you anticipate running this kernel on a computer with a classic |
| 17 | MC68xxx processor, select M68KCLASSIC. |
| 18 | If you anticipate running this kernel on a computer with a ColdFire |
| 19 | processor, select COLDFIRE. |
| 20 | |
| 21 | config M68KCLASSIC |
| 22 | bool "Classic M68K CPU family support" |
| 23 | |
| 24 | config COLDFIRE |
| 25 | bool "Coldfire CPU family support" |
| 26 | select ARCH_HAVE_CUSTOM_GPIO_H |
| 27 | select CPU_HAS_NO_BITFIELDS |
| 28 | select CPU_HAS_NO_MULDIV64 |
| 29 | select GENERIC_CSUM |
| 30 | select GPIOLIB |
| 31 | select HAVE_CLK |
| 32 | |
| 33 | endchoice |
| 34 | |
| 35 | if M68KCLASSIC |
| 36 | |
| 37 | config M68000 |
| 38 | bool "MC68000" |
| 39 | depends on !MMU |
| 40 | select CPU_HAS_NO_BITFIELDS |
| 41 | select CPU_HAS_NO_MULDIV64 |
| 42 | select CPU_HAS_NO_UNALIGNED |
| 43 | select GENERIC_CSUM |
| 44 | select CPU_NO_EFFICIENT_FFS |
| 45 | select HAVE_ARCH_HASH |
| 46 | help |
| 47 | The Freescale (was Motorola) 68000 CPU is the first generation of |
| 48 | the well known M68K family of processors. The CPU core as well as |
| 49 | being available as a stand alone CPU was also used in many |
| 50 | System-On-Chip devices (eg 68328, 68302, etc). It does not contain |
| 51 | a paging MMU. |
| 52 | |
| 53 | config MCPU32 |
| 54 | bool |
| 55 | select CPU_HAS_NO_BITFIELDS |
| 56 | select CPU_HAS_NO_UNALIGNED |
| 57 | select CPU_NO_EFFICIENT_FFS |
| 58 | help |
| 59 | The Freescale (was then Motorola) CPU32 is a CPU core that is |
| 60 | based on the 68020 processor. For the most part it is used in |
| 61 | System-On-Chip parts, and does not contain a paging MMU. |
| 62 | |
| 63 | config M68020 |
| 64 | bool "68020 support" |
| 65 | depends on MMU |
| 66 | select FPU |
| 67 | select CPU_HAS_ADDRESS_SPACES |
| 68 | help |
| 69 | If you anticipate running this kernel on a computer with a MC68020 |
| 70 | processor, say Y. Otherwise, say N. Note that the 68020 requires a |
| 71 | 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the |
| 72 | Sun 3, which provides its own version. |
| 73 | |
| 74 | config M68030 |
| 75 | bool "68030 support" |
| 76 | depends on MMU && !MMU_SUN3 |
| 77 | select FPU |
| 78 | select CPU_HAS_ADDRESS_SPACES |
| 79 | help |
| 80 | If you anticipate running this kernel on a computer with a MC68030 |
| 81 | processor, say Y. Otherwise, say N. Note that a MC68EC030 will not |
| 82 | work, as it does not include an MMU (Memory Management Unit). |
| 83 | |
| 84 | config M68040 |
| 85 | bool "68040 support" |
| 86 | depends on MMU && !MMU_SUN3 |
| 87 | select FPU |
| 88 | select CPU_HAS_ADDRESS_SPACES |
| 89 | help |
| 90 | If you anticipate running this kernel on a computer with a MC68LC040 |
| 91 | or MC68040 processor, say Y. Otherwise, say N. Note that an |
| 92 | MC68EC040 will not work, as it does not include an MMU (Memory |
| 93 | Management Unit). |
| 94 | |
| 95 | config M68060 |
| 96 | bool "68060 support" |
| 97 | depends on MMU && !MMU_SUN3 |
| 98 | select FPU |
| 99 | select CPU_HAS_ADDRESS_SPACES |
| 100 | help |
| 101 | If you anticipate running this kernel on a computer with a MC68060 |
| 102 | processor, say Y. Otherwise, say N. |
| 103 | |
| 104 | config M68328 |
| 105 | bool "MC68328" |
| 106 | depends on !MMU |
| 107 | select M68000 |
| 108 | help |
| 109 | Motorola 68328 processor support. |
| 110 | |
| 111 | config M68EZ328 |
| 112 | bool "MC68EZ328" |
| 113 | depends on !MMU |
| 114 | select M68000 |
| 115 | help |
| 116 | Motorola 68EX328 processor support. |
| 117 | |
| 118 | config M68VZ328 |
| 119 | bool "MC68VZ328" |
| 120 | depends on !MMU |
| 121 | select M68000 |
| 122 | help |
| 123 | Motorola 68VZ328 processor support. |
| 124 | |
| 125 | endif # M68KCLASSIC |
| 126 | |
| 127 | if COLDFIRE |
| 128 | |
| 129 | choice |
| 130 | prompt "ColdFire SoC type" |
| 131 | default M520x |
| 132 | help |
| 133 | Select the type of ColdFire System-on-Chip (SoC) that you want |
| 134 | to build for. |
| 135 | |
| 136 | config M5206 |
| 137 | bool "MCF5206" |
| 138 | depends on !MMU |
| 139 | select COLDFIRE_SW_A7 |
| 140 | select HAVE_MBAR |
| 141 | select CPU_NO_EFFICIENT_FFS |
| 142 | help |
| 143 | Motorola ColdFire 5206 processor support. |
| 144 | |
| 145 | config M5206e |
| 146 | bool "MCF5206e" |
| 147 | depends on !MMU |
| 148 | select COLDFIRE_SW_A7 |
| 149 | select HAVE_MBAR |
| 150 | select CPU_NO_EFFICIENT_FFS |
| 151 | help |
| 152 | Motorola ColdFire 5206e processor support. |
| 153 | |
| 154 | config M520x |
| 155 | bool "MCF520x" |
| 156 | depends on !MMU |
| 157 | select GENERIC_CLOCKEVENTS |
| 158 | select HAVE_CACHE_SPLIT |
| 159 | help |
| 160 | Freescale Coldfire 5207/5208 processor support. |
| 161 | |
| 162 | config M523x |
| 163 | bool "MCF523x" |
| 164 | depends on !MMU |
| 165 | select GENERIC_CLOCKEVENTS |
| 166 | select HAVE_CACHE_SPLIT |
| 167 | select HAVE_IPSBAR |
| 168 | help |
| 169 | Freescale Coldfire 5230/1/2/4/5 processor support |
| 170 | |
| 171 | config M5249 |
| 172 | bool "MCF5249" |
| 173 | depends on !MMU |
| 174 | select COLDFIRE_SW_A7 |
| 175 | select HAVE_MBAR |
| 176 | select CPU_NO_EFFICIENT_FFS |
| 177 | help |
| 178 | Motorola ColdFire 5249 processor support. |
| 179 | |
| 180 | config M525x |
| 181 | bool "MCF525x" |
| 182 | depends on !MMU |
| 183 | select COLDFIRE_SW_A7 |
| 184 | select HAVE_MBAR |
| 185 | select CPU_NO_EFFICIENT_FFS |
| 186 | help |
| 187 | Freescale (Motorola) Coldfire 5251/5253 processor support. |
| 188 | |
| 189 | config M5271 |
| 190 | bool "MCF5271" |
| 191 | depends on !MMU |
| 192 | select M527x |
| 193 | select HAVE_CACHE_SPLIT |
| 194 | select HAVE_IPSBAR |
| 195 | select GENERIC_CLOCKEVENTS |
| 196 | help |
| 197 | Freescale (Motorola) ColdFire 5270/5271 processor support. |
| 198 | |
| 199 | config M5272 |
| 200 | bool "MCF5272" |
| 201 | depends on !MMU |
| 202 | select COLDFIRE_SW_A7 |
| 203 | select HAVE_MBAR |
| 204 | select CPU_NO_EFFICIENT_FFS |
| 205 | help |
| 206 | Motorola ColdFire 5272 processor support. |
| 207 | |
| 208 | config M5275 |
| 209 | bool "MCF5275" |
| 210 | depends on !MMU |
| 211 | select M527x |
| 212 | select HAVE_CACHE_SPLIT |
| 213 | select HAVE_IPSBAR |
| 214 | select GENERIC_CLOCKEVENTS |
| 215 | help |
| 216 | Freescale (Motorola) ColdFire 5274/5275 processor support. |
| 217 | |
| 218 | config M528x |
| 219 | bool "MCF528x" |
| 220 | depends on !MMU |
| 221 | select GENERIC_CLOCKEVENTS |
| 222 | select HAVE_CACHE_SPLIT |
| 223 | select HAVE_IPSBAR |
| 224 | help |
| 225 | Motorola ColdFire 5280/5282 processor support. |
| 226 | |
| 227 | config M5307 |
| 228 | bool "MCF5307" |
| 229 | depends on !MMU |
| 230 | select COLDFIRE_SW_A7 |
| 231 | select HAVE_CACHE_CB |
| 232 | select HAVE_MBAR |
| 233 | select CPU_NO_EFFICIENT_FFS |
| 234 | help |
| 235 | Motorola ColdFire 5307 processor support. |
| 236 | |
| 237 | config M532x |
| 238 | bool "MCF532x" |
| 239 | depends on !MMU |
| 240 | select M53xx |
| 241 | select HAVE_CACHE_CB |
| 242 | help |
| 243 | Freescale (Motorola) ColdFire 532x processor support. |
| 244 | |
| 245 | config M537x |
| 246 | bool "MCF537x" |
| 247 | depends on !MMU |
| 248 | select M53xx |
| 249 | select HAVE_CACHE_CB |
| 250 | help |
| 251 | Freescale ColdFire 537x processor support. |
| 252 | |
| 253 | config M5407 |
| 254 | bool "MCF5407" |
| 255 | depends on !MMU |
| 256 | select COLDFIRE_SW_A7 |
| 257 | select HAVE_CACHE_CB |
| 258 | select HAVE_MBAR |
| 259 | select CPU_NO_EFFICIENT_FFS |
| 260 | help |
| 261 | Motorola ColdFire 5407 processor support. |
| 262 | |
| 263 | config M547x |
| 264 | bool "MCF547x" |
| 265 | select M54xx |
| 266 | select MMU_COLDFIRE if MMU |
| 267 | select FPU if MMU |
| 268 | select HAVE_CACHE_CB |
| 269 | select HAVE_MBAR |
| 270 | select CPU_NO_EFFICIENT_FFS |
| 271 | help |
| 272 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. |
| 273 | |
| 274 | config M548x |
| 275 | bool "MCF548x" |
| 276 | select MMU_COLDFIRE if MMU |
| 277 | select FPU if MMU |
| 278 | select M54xx |
| 279 | select HAVE_CACHE_CB |
| 280 | select HAVE_MBAR |
| 281 | select CPU_NO_EFFICIENT_FFS |
| 282 | help |
| 283 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. |
| 284 | |
| 285 | config M5441x |
| 286 | bool "MCF5441x" |
| 287 | select MMU_COLDFIRE if MMU |
| 288 | select GENERIC_CLOCKEVENTS |
| 289 | select HAVE_CACHE_CB |
| 290 | help |
| 291 | Freescale Coldfire 54410/54415/54416/54417/54418 processor support. |
| 292 | |
| 293 | endchoice |
| 294 | |
| 295 | config M527x |
| 296 | bool |
| 297 | |
| 298 | config M53xx |
| 299 | bool |
| 300 | |
| 301 | config M54xx |
| 302 | bool |
| 303 | |
| 304 | endif # COLDFIRE |
| 305 | |
| 306 | |
| 307 | comment "Processor Specific Options" |
| 308 | |
| 309 | config M68KFPU_EMU |
| 310 | bool "Math emulation support" |
| 311 | depends on MMU |
| 312 | help |
| 313 | At some point in the future, this will cause floating-point math |
| 314 | instructions to be emulated by the kernel on machines that lack a |
| 315 | floating-point math coprocessor. Thrill-seekers and chronically |
| 316 | sleep-deprived psychotic hacker types can say Y now, everyone else |
| 317 | should probably wait a while. |
| 318 | |
| 319 | config M68KFPU_EMU_EXTRAPREC |
| 320 | bool "Math emulation extra precision" |
| 321 | depends on M68KFPU_EMU |
| 322 | help |
| 323 | The fpu uses normally a few bit more during calculations for |
| 324 | correct rounding, the emulator can (often) do the same but this |
| 325 | extra calculation can cost quite some time, so you can disable |
| 326 | it here. The emulator will then "only" calculate with a 64 bit |
| 327 | mantissa and round slightly incorrect, what is more than enough |
| 328 | for normal usage. |
| 329 | |
| 330 | config M68KFPU_EMU_ONLY |
| 331 | bool "Math emulation only kernel" |
| 332 | depends on M68KFPU_EMU |
| 333 | help |
| 334 | This option prevents any floating-point instructions from being |
| 335 | compiled into the kernel, thereby the kernel doesn't save any |
| 336 | floating point context anymore during task switches, so this |
| 337 | kernel will only be usable on machines without a floating-point |
| 338 | math coprocessor. This makes the kernel a bit faster as no tests |
| 339 | needs to be executed whether a floating-point instruction in the |
| 340 | kernel should be executed or not. |
| 341 | |
| 342 | config ADVANCED |
| 343 | bool "Advanced configuration options" |
| 344 | depends on MMU |
| 345 | ---help--- |
| 346 | This gives you access to some advanced options for the CPU. The |
| 347 | defaults should be fine for most users, but these options may make |
| 348 | it possible for you to improve performance somewhat if you know what |
| 349 | you are doing. |
| 350 | |
| 351 | Note that the answer to this question won't directly affect the |
| 352 | kernel: saying N will just cause the configurator to skip all |
| 353 | the questions about these options. |
| 354 | |
| 355 | Most users should say N to this question. |
| 356 | |
| 357 | config RMW_INSNS |
| 358 | bool "Use read-modify-write instructions" |
| 359 | depends on ADVANCED |
| 360 | ---help--- |
| 361 | This allows to use certain instructions that work with indivisible |
| 362 | read-modify-write bus cycles. While this is faster than the |
| 363 | workaround of disabling interrupts, it can conflict with DMA |
| 364 | ( = direct memory access) on many Amiga systems, and it is also said |
| 365 | to destabilize other machines. It is very likely that this will |
| 366 | cause serious problems on any Amiga or Atari Medusa if set. The only |
| 367 | configuration where it should work are 68030-based Ataris, where it |
| 368 | apparently improves performance. But you've been warned! Unless you |
| 369 | really know what you are doing, say N. Try Y only if you're quite |
| 370 | adventurous. |
| 371 | |
| 372 | config SINGLE_MEMORY_CHUNK |
| 373 | bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 |
| 374 | depends on MMU |
| 375 | default y if SUN3 |
| 376 | select NEED_MULTIPLE_NODES |
| 377 | help |
| 378 | Ignore all but the first contiguous chunk of physical memory for VM |
| 379 | purposes. This will save a few bytes kernel size and may speed up |
| 380 | some operations. Say N if not sure. |
| 381 | |
| 382 | config ARCH_DISCONTIGMEM_ENABLE |
| 383 | def_bool MMU && !SINGLE_MEMORY_CHUNK |
| 384 | |
| 385 | config 060_WRITETHROUGH |
| 386 | bool "Use write-through caching for 68060 supervisor accesses" |
| 387 | depends on ADVANCED && M68060 |
| 388 | ---help--- |
| 389 | The 68060 generally uses copyback caching of recently accessed data. |
| 390 | Copyback caching means that memory writes will be held in an on-chip |
| 391 | cache and only written back to memory some time later. Saying Y |
| 392 | here will force supervisor (kernel) accesses to use writethrough |
| 393 | caching. Writethrough caching means that data is written to memory |
| 394 | straight away, so that cache and memory data always agree. |
| 395 | Writethrough caching is less efficient, but is needed for some |
| 396 | drivers on 68060 based systems where the 68060 bus snooping signal |
| 397 | is hardwired on. The 53c710 SCSI driver is known to suffer from |
| 398 | this problem. |
| 399 | |
| 400 | config M68K_L2_CACHE |
| 401 | bool |
| 402 | depends on MAC |
| 403 | default y |
| 404 | |
| 405 | config NODES_SHIFT |
| 406 | int |
| 407 | default "3" |
| 408 | depends on !SINGLE_MEMORY_CHUNK |
| 409 | |
| 410 | config CPU_HAS_NO_BITFIELDS |
| 411 | bool |
| 412 | |
| 413 | config CPU_HAS_NO_MULDIV64 |
| 414 | bool |
| 415 | |
| 416 | config CPU_HAS_NO_UNALIGNED |
| 417 | bool |
| 418 | |
| 419 | config CPU_HAS_ADDRESS_SPACES |
| 420 | bool |
| 421 | |
| 422 | config FPU |
| 423 | bool |
| 424 | |
| 425 | config COLDFIRE_SW_A7 |
| 426 | bool |
| 427 | |
| 428 | config HAVE_CACHE_SPLIT |
| 429 | bool |
| 430 | |
| 431 | config HAVE_CACHE_CB |
| 432 | bool |
| 433 | |
| 434 | config HAVE_MBAR |
| 435 | bool |
| 436 | |
| 437 | config HAVE_IPSBAR |
| 438 | bool |
| 439 | |
| 440 | config CLOCK_FREQ |
| 441 | int "Set the core clock frequency" |
| 442 | default "25000000" if M5206 |
| 443 | default "54000000" if M5206e |
| 444 | default "166666666" if M520x |
| 445 | default "140000000" if M5249 |
| 446 | default "150000000" if M527x || M523x |
| 447 | default "90000000" if M5307 |
| 448 | default "50000000" if M5407 |
| 449 | default "266000000" if M54xx |
| 450 | default "66666666" |
| 451 | depends on COLDFIRE |
| 452 | help |
| 453 | Define the CPU clock frequency in use. This is the core clock |
| 454 | frequency, it may or may not be the same as the external clock |
| 455 | crystal fitted to your board. Some processors have an internal |
| 456 | PLL and can have their frequency programmed at run time, others |
| 457 | use internal dividers. In general the kernel won't setup a PLL |
| 458 | if it is fitted (there are some exceptions). This value will be |
| 459 | specific to the exact CPU that you are using. |
| 460 | |
| 461 | config OLDMASK |
| 462 | bool "Old mask 5307 (1H55J) silicon" |
| 463 | depends on M5307 |
| 464 | help |
| 465 | Build support for the older revision ColdFire 5307 silicon. |
| 466 | Specifically this is the 1H55J mask revision. |
| 467 | |
| 468 | if HAVE_CACHE_SPLIT |
| 469 | choice |
| 470 | prompt "Split Cache Configuration" |
| 471 | default CACHE_I |
| 472 | |
| 473 | config CACHE_I |
| 474 | bool "Instruction" |
| 475 | help |
| 476 | Use all of the ColdFire CPU cache memory as an instruction cache. |
| 477 | |
| 478 | config CACHE_D |
| 479 | bool "Data" |
| 480 | help |
| 481 | Use all of the ColdFire CPU cache memory as a data cache. |
| 482 | |
| 483 | config CACHE_BOTH |
| 484 | bool "Both" |
| 485 | help |
| 486 | Split the ColdFire CPU cache, and use half as an instruction cache |
| 487 | and half as a data cache. |
| 488 | endchoice |
| 489 | endif |
| 490 | |
| 491 | if HAVE_CACHE_CB |
| 492 | choice |
| 493 | prompt "Data cache mode" |
| 494 | default CACHE_WRITETHRU |
| 495 | |
| 496 | config CACHE_WRITETHRU |
| 497 | bool "Write-through" |
| 498 | help |
| 499 | The ColdFire CPU cache is set into Write-through mode. |
| 500 | |
| 501 | config CACHE_COPYBACK |
| 502 | bool "Copy-back" |
| 503 | help |
| 504 | The ColdFire CPU cache is set into Copy-back mode. |
| 505 | endchoice |
| 506 | endif |
| 507 | |