| 1 | /* |
| 2 | * NVIDIA Tegra SoC device tree board support |
| 3 | * |
| 4 | * Copyright (C) 2011, 2013, NVIDIA Corporation |
| 5 | * Copyright (C) 2010 Secret Lab Technologies, Ltd. |
| 6 | * Copyright (C) 2010 Google, Inc. |
| 7 | * |
| 8 | * This software is licensed under the terms of the GNU General Public |
| 9 | * License version 2, as published by the Free Software Foundation, and |
| 10 | * may be copied, distributed, and modified under those terms. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/clk.h> |
| 20 | #include <linux/clk/tegra.h> |
| 21 | #include <linux/dma-mapping.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/io.h> |
| 24 | #include <linux/irqchip.h> |
| 25 | #include <linux/irqdomain.h> |
| 26 | #include <linux/kernel.h> |
| 27 | #include <linux/of_address.h> |
| 28 | #include <linux/of_fdt.h> |
| 29 | #include <linux/of.h> |
| 30 | #include <linux/of_platform.h> |
| 31 | #include <linux/pda_power.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | #include <linux/serial_8250.h> |
| 34 | #include <linux/slab.h> |
| 35 | #include <linux/sys_soc.h> |
| 36 | #include <linux/usb/tegra_usb_phy.h> |
| 37 | |
| 38 | #include <soc/tegra/fuse.h> |
| 39 | #include <soc/tegra/pmc.h> |
| 40 | |
| 41 | #include <asm/hardware/cache-l2x0.h> |
| 42 | #include <asm/mach/arch.h> |
| 43 | #include <asm/mach/time.h> |
| 44 | #include <asm/mach-types.h> |
| 45 | #include <asm/setup.h> |
| 46 | #include <asm/trusted_foundations.h> |
| 47 | |
| 48 | #include "board.h" |
| 49 | #include "common.h" |
| 50 | #include "cpuidle.h" |
| 51 | #include "flowctrl.h" |
| 52 | #include "iomap.h" |
| 53 | #include "irq.h" |
| 54 | #include "pm.h" |
| 55 | #include "reset.h" |
| 56 | #include "sleep.h" |
| 57 | |
| 58 | /* |
| 59 | * Storage for debug-macro.S's state. |
| 60 | * |
| 61 | * This must be in .data not .bss so that it gets initialized each time the |
| 62 | * kernel is loaded. The data is declared here rather than debug-macro.S so |
| 63 | * that multiple inclusions of debug-macro.S point at the same data. |
| 64 | */ |
| 65 | u32 tegra_uart_config[3] = { |
| 66 | /* Debug UART initialization required */ |
| 67 | 1, |
| 68 | /* Debug UART physical address */ |
| 69 | 0, |
| 70 | /* Debug UART virtual address */ |
| 71 | 0, |
| 72 | }; |
| 73 | |
| 74 | static void __init tegra_init_early(void) |
| 75 | { |
| 76 | of_register_trusted_foundations(); |
| 77 | tegra_cpu_reset_handler_init(); |
| 78 | tegra_flowctrl_init(); |
| 79 | } |
| 80 | |
| 81 | static void __init tegra_dt_init_irq(void) |
| 82 | { |
| 83 | tegra_init_irq(); |
| 84 | irqchip_init(); |
| 85 | } |
| 86 | |
| 87 | static void __init tegra_dt_init(void) |
| 88 | { |
| 89 | struct soc_device_attribute *soc_dev_attr; |
| 90 | struct soc_device *soc_dev; |
| 91 | struct device *parent = NULL; |
| 92 | |
| 93 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); |
| 94 | if (!soc_dev_attr) |
| 95 | goto out; |
| 96 | |
| 97 | soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra"); |
| 98 | soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", |
| 99 | tegra_sku_info.revision); |
| 100 | soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id()); |
| 101 | |
| 102 | soc_dev = soc_device_register(soc_dev_attr); |
| 103 | if (IS_ERR(soc_dev)) { |
| 104 | kfree(soc_dev_attr->family); |
| 105 | kfree(soc_dev_attr->revision); |
| 106 | kfree(soc_dev_attr->soc_id); |
| 107 | kfree(soc_dev_attr); |
| 108 | goto out; |
| 109 | } |
| 110 | |
| 111 | parent = soc_device_to_device(soc_dev); |
| 112 | |
| 113 | /* |
| 114 | * Finished with the static registrations now; fill in the missing |
| 115 | * devices |
| 116 | */ |
| 117 | out: |
| 118 | of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); |
| 119 | } |
| 120 | |
| 121 | static void __init paz00_init(void) |
| 122 | { |
| 123 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) |
| 124 | tegra_paz00_wifikill_init(); |
| 125 | } |
| 126 | |
| 127 | static struct { |
| 128 | char *machine; |
| 129 | void (*init)(void); |
| 130 | } board_init_funcs[] = { |
| 131 | { "compal,paz00", paz00_init }, |
| 132 | }; |
| 133 | |
| 134 | static void __init tegra_dt_init_late(void) |
| 135 | { |
| 136 | int i; |
| 137 | |
| 138 | tegra_init_suspend(); |
| 139 | tegra_cpuidle_init(); |
| 140 | |
| 141 | for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) { |
| 142 | if (of_machine_is_compatible(board_init_funcs[i].machine)) { |
| 143 | board_init_funcs[i].init(); |
| 144 | break; |
| 145 | } |
| 146 | } |
| 147 | } |
| 148 | |
| 149 | static const char * const tegra_dt_board_compat[] = { |
| 150 | "nvidia,tegra124", |
| 151 | "nvidia,tegra114", |
| 152 | "nvidia,tegra30", |
| 153 | "nvidia,tegra20", |
| 154 | NULL |
| 155 | }; |
| 156 | |
| 157 | DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)") |
| 158 | .l2c_aux_val = 0x3c400001, |
| 159 | .l2c_aux_mask = 0xc20fc3fe, |
| 160 | .smp = smp_ops(tegra_smp_ops), |
| 161 | .map_io = tegra_map_common_io, |
| 162 | .init_early = tegra_init_early, |
| 163 | .init_irq = tegra_dt_init_irq, |
| 164 | .init_machine = tegra_dt_init, |
| 165 | .init_late = tegra_dt_init_late, |
| 166 | .dt_compat = tegra_dt_board_compat, |
| 167 | MACHINE_END |