| 1 | /* |
| 2 | * Samsung's Exynos4 SoC series common device tree source |
| 3 | * |
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * Copyright (c) 2010-2011 Linaro Ltd. |
| 7 | * www.linaro.org |
| 8 | * |
| 9 | * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular |
| 10 | * SoCs from Exynos4 series can include this file and provide values for SoCs |
| 11 | * specfic bindings. |
| 12 | * |
| 13 | * Note: This file does not include device nodes for all the controllers in |
| 14 | * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional |
| 15 | * nodes can be added to this file. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify |
| 18 | * it under the terms of the GNU General Public License version 2 as |
| 19 | * published by the Free Software Foundation. |
| 20 | */ |
| 21 | |
| 22 | #include <dt-bindings/clock/exynos4.h> |
| 23 | #include <dt-bindings/clock/exynos-audss-clk.h> |
| 24 | #include "skeleton.dtsi" |
| 25 | |
| 26 | / { |
| 27 | interrupt-parent = <&gic>; |
| 28 | |
| 29 | aliases { |
| 30 | spi0 = &spi_0; |
| 31 | spi1 = &spi_1; |
| 32 | spi2 = &spi_2; |
| 33 | i2c0 = &i2c_0; |
| 34 | i2c1 = &i2c_1; |
| 35 | i2c2 = &i2c_2; |
| 36 | i2c3 = &i2c_3; |
| 37 | i2c4 = &i2c_4; |
| 38 | i2c5 = &i2c_5; |
| 39 | i2c6 = &i2c_6; |
| 40 | i2c7 = &i2c_7; |
| 41 | csis0 = &csis_0; |
| 42 | csis1 = &csis_1; |
| 43 | fimc0 = &fimc_0; |
| 44 | fimc1 = &fimc_1; |
| 45 | fimc2 = &fimc_2; |
| 46 | fimc3 = &fimc_3; |
| 47 | }; |
| 48 | |
| 49 | clock_audss: clock-controller@03810000 { |
| 50 | compatible = "samsung,exynos4210-audss-clock"; |
| 51 | reg = <0x03810000 0x0C>; |
| 52 | #clock-cells = <1>; |
| 53 | }; |
| 54 | |
| 55 | i2s0: i2s@03830000 { |
| 56 | compatible = "samsung,s5pv210-i2s"; |
| 57 | reg = <0x03830000 0x100>; |
| 58 | clocks = <&clock_audss EXYNOS_I2S_BUS>; |
| 59 | clock-names = "iis"; |
| 60 | dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>; |
| 61 | dma-names = "tx", "rx", "tx-sec"; |
| 62 | samsung,idma-addr = <0x03000000>; |
| 63 | status = "disabled"; |
| 64 | }; |
| 65 | |
| 66 | chipid@10000000 { |
| 67 | compatible = "samsung,exynos4210-chipid"; |
| 68 | reg = <0x10000000 0x100>; |
| 69 | }; |
| 70 | |
| 71 | mipi_phy: video-phy@10020710 { |
| 72 | compatible = "samsung,s5pv210-mipi-video-phy"; |
| 73 | reg = <0x10020710 8>; |
| 74 | #phy-cells = <1>; |
| 75 | }; |
| 76 | |
| 77 | pd_mfc: mfc-power-domain@10023C40 { |
| 78 | compatible = "samsung,exynos4210-pd"; |
| 79 | reg = <0x10023C40 0x20>; |
| 80 | }; |
| 81 | |
| 82 | pd_g3d: g3d-power-domain@10023C60 { |
| 83 | compatible = "samsung,exynos4210-pd"; |
| 84 | reg = <0x10023C60 0x20>; |
| 85 | }; |
| 86 | |
| 87 | pd_lcd0: lcd0-power-domain@10023C80 { |
| 88 | compatible = "samsung,exynos4210-pd"; |
| 89 | reg = <0x10023C80 0x20>; |
| 90 | }; |
| 91 | |
| 92 | pd_tv: tv-power-domain@10023C20 { |
| 93 | compatible = "samsung,exynos4210-pd"; |
| 94 | reg = <0x10023C20 0x20>; |
| 95 | }; |
| 96 | |
| 97 | pd_cam: cam-power-domain@10023C00 { |
| 98 | compatible = "samsung,exynos4210-pd"; |
| 99 | reg = <0x10023C00 0x20>; |
| 100 | }; |
| 101 | |
| 102 | pd_gps: gps-power-domain@10023CE0 { |
| 103 | compatible = "samsung,exynos4210-pd"; |
| 104 | reg = <0x10023CE0 0x20>; |
| 105 | }; |
| 106 | |
| 107 | pd_gps_alive: gps-alive-power-domain@10023D00 { |
| 108 | compatible = "samsung,exynos4210-pd"; |
| 109 | reg = <0x10023D00 0x20>; |
| 110 | }; |
| 111 | |
| 112 | gic: interrupt-controller@10490000 { |
| 113 | compatible = "arm,cortex-a9-gic"; |
| 114 | #interrupt-cells = <3>; |
| 115 | interrupt-controller; |
| 116 | reg = <0x10490000 0x10000>, <0x10480000 0x10000>; |
| 117 | }; |
| 118 | |
| 119 | combiner: interrupt-controller@10440000 { |
| 120 | compatible = "samsung,exynos4210-combiner"; |
| 121 | #interrupt-cells = <2>; |
| 122 | interrupt-controller; |
| 123 | reg = <0x10440000 0x1000>; |
| 124 | }; |
| 125 | |
| 126 | sys_reg: syscon@10010000 { |
| 127 | compatible = "samsung,exynos4-sysreg", "syscon"; |
| 128 | reg = <0x10010000 0x400>; |
| 129 | }; |
| 130 | |
| 131 | pmu_system_controller: system-controller@10020000 { |
| 132 | compatible = "samsung,exynos4210-pmu", "syscon"; |
| 133 | reg = <0x10020000 0x4000>; |
| 134 | }; |
| 135 | |
| 136 | dsi_0: dsi@11C80000 { |
| 137 | compatible = "samsung,exynos4210-mipi-dsi"; |
| 138 | reg = <0x11C80000 0x10000>; |
| 139 | interrupts = <0 79 0>; |
| 140 | samsung,power-domain = <&pd_lcd0>; |
| 141 | phys = <&mipi_phy 1>; |
| 142 | phy-names = "dsim"; |
| 143 | clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; |
| 144 | clock-names = "bus_clk", "pll_clk"; |
| 145 | status = "disabled"; |
| 146 | #address-cells = <1>; |
| 147 | #size-cells = <0>; |
| 148 | }; |
| 149 | |
| 150 | camera { |
| 151 | compatible = "samsung,fimc", "simple-bus"; |
| 152 | status = "disabled"; |
| 153 | #address-cells = <1>; |
| 154 | #size-cells = <1>; |
| 155 | #clock-cells = <1>; |
| 156 | clock-output-names = "cam_a_clkout", "cam_b_clkout"; |
| 157 | ranges; |
| 158 | |
| 159 | fimc_0: fimc@11800000 { |
| 160 | compatible = "samsung,exynos4210-fimc"; |
| 161 | reg = <0x11800000 0x1000>; |
| 162 | interrupts = <0 84 0>; |
| 163 | clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; |
| 164 | clock-names = "fimc", "sclk_fimc"; |
| 165 | samsung,power-domain = <&pd_cam>; |
| 166 | samsung,sysreg = <&sys_reg>; |
| 167 | status = "disabled"; |
| 168 | }; |
| 169 | |
| 170 | fimc_1: fimc@11810000 { |
| 171 | compatible = "samsung,exynos4210-fimc"; |
| 172 | reg = <0x11810000 0x1000>; |
| 173 | interrupts = <0 85 0>; |
| 174 | clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; |
| 175 | clock-names = "fimc", "sclk_fimc"; |
| 176 | samsung,power-domain = <&pd_cam>; |
| 177 | samsung,sysreg = <&sys_reg>; |
| 178 | status = "disabled"; |
| 179 | }; |
| 180 | |
| 181 | fimc_2: fimc@11820000 { |
| 182 | compatible = "samsung,exynos4210-fimc"; |
| 183 | reg = <0x11820000 0x1000>; |
| 184 | interrupts = <0 86 0>; |
| 185 | clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; |
| 186 | clock-names = "fimc", "sclk_fimc"; |
| 187 | samsung,power-domain = <&pd_cam>; |
| 188 | samsung,sysreg = <&sys_reg>; |
| 189 | status = "disabled"; |
| 190 | }; |
| 191 | |
| 192 | fimc_3: fimc@11830000 { |
| 193 | compatible = "samsung,exynos4210-fimc"; |
| 194 | reg = <0x11830000 0x1000>; |
| 195 | interrupts = <0 87 0>; |
| 196 | clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; |
| 197 | clock-names = "fimc", "sclk_fimc"; |
| 198 | samsung,power-domain = <&pd_cam>; |
| 199 | samsung,sysreg = <&sys_reg>; |
| 200 | status = "disabled"; |
| 201 | }; |
| 202 | |
| 203 | csis_0: csis@11880000 { |
| 204 | compatible = "samsung,exynos4210-csis"; |
| 205 | reg = <0x11880000 0x4000>; |
| 206 | interrupts = <0 78 0>; |
| 207 | clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; |
| 208 | clock-names = "csis", "sclk_csis"; |
| 209 | bus-width = <4>; |
| 210 | samsung,power-domain = <&pd_cam>; |
| 211 | phys = <&mipi_phy 0>; |
| 212 | phy-names = "csis"; |
| 213 | status = "disabled"; |
| 214 | #address-cells = <1>; |
| 215 | #size-cells = <0>; |
| 216 | }; |
| 217 | |
| 218 | csis_1: csis@11890000 { |
| 219 | compatible = "samsung,exynos4210-csis"; |
| 220 | reg = <0x11890000 0x4000>; |
| 221 | interrupts = <0 80 0>; |
| 222 | clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; |
| 223 | clock-names = "csis", "sclk_csis"; |
| 224 | bus-width = <2>; |
| 225 | samsung,power-domain = <&pd_cam>; |
| 226 | phys = <&mipi_phy 2>; |
| 227 | phy-names = "csis"; |
| 228 | status = "disabled"; |
| 229 | #address-cells = <1>; |
| 230 | #size-cells = <0>; |
| 231 | }; |
| 232 | }; |
| 233 | |
| 234 | watchdog@10060000 { |
| 235 | compatible = "samsung,s3c2410-wdt"; |
| 236 | reg = <0x10060000 0x100>; |
| 237 | interrupts = <0 43 0>; |
| 238 | clocks = <&clock CLK_WDT>; |
| 239 | clock-names = "watchdog"; |
| 240 | status = "disabled"; |
| 241 | }; |
| 242 | |
| 243 | rtc@10070000 { |
| 244 | compatible = "samsung,s3c6410-rtc"; |
| 245 | reg = <0x10070000 0x100>; |
| 246 | interrupts = <0 44 0>, <0 45 0>; |
| 247 | clocks = <&clock CLK_RTC>; |
| 248 | clock-names = "rtc"; |
| 249 | status = "disabled"; |
| 250 | }; |
| 251 | |
| 252 | keypad@100A0000 { |
| 253 | compatible = "samsung,s5pv210-keypad"; |
| 254 | reg = <0x100A0000 0x100>; |
| 255 | interrupts = <0 109 0>; |
| 256 | clocks = <&clock CLK_KEYIF>; |
| 257 | clock-names = "keypad"; |
| 258 | status = "disabled"; |
| 259 | }; |
| 260 | |
| 261 | sdhci@12510000 { |
| 262 | compatible = "samsung,exynos4210-sdhci"; |
| 263 | reg = <0x12510000 0x100>; |
| 264 | interrupts = <0 73 0>; |
| 265 | clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; |
| 266 | clock-names = "hsmmc", "mmc_busclk.2"; |
| 267 | status = "disabled"; |
| 268 | }; |
| 269 | |
| 270 | sdhci@12520000 { |
| 271 | compatible = "samsung,exynos4210-sdhci"; |
| 272 | reg = <0x12520000 0x100>; |
| 273 | interrupts = <0 74 0>; |
| 274 | clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; |
| 275 | clock-names = "hsmmc", "mmc_busclk.2"; |
| 276 | status = "disabled"; |
| 277 | }; |
| 278 | |
| 279 | sdhci@12530000 { |
| 280 | compatible = "samsung,exynos4210-sdhci"; |
| 281 | reg = <0x12530000 0x100>; |
| 282 | interrupts = <0 75 0>; |
| 283 | clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; |
| 284 | clock-names = "hsmmc", "mmc_busclk.2"; |
| 285 | status = "disabled"; |
| 286 | }; |
| 287 | |
| 288 | sdhci@12540000 { |
| 289 | compatible = "samsung,exynos4210-sdhci"; |
| 290 | reg = <0x12540000 0x100>; |
| 291 | interrupts = <0 76 0>; |
| 292 | clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; |
| 293 | clock-names = "hsmmc", "mmc_busclk.2"; |
| 294 | status = "disabled"; |
| 295 | }; |
| 296 | |
| 297 | exynos_usbphy: exynos-usbphy@125B0000 { |
| 298 | compatible = "samsung,exynos4210-usb2-phy"; |
| 299 | reg = <0x125B0000 0x100>; |
| 300 | samsung,pmureg-phandle = <&pmu_system_controller>; |
| 301 | clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>; |
| 302 | clock-names = "phy", "ref"; |
| 303 | #phy-cells = <1>; |
| 304 | status = "disabled"; |
| 305 | }; |
| 306 | |
| 307 | hsotg@12480000 { |
| 308 | compatible = "samsung,s3c6400-hsotg"; |
| 309 | reg = <0x12480000 0x20000>; |
| 310 | interrupts = <0 71 0>; |
| 311 | clocks = <&clock CLK_USB_DEVICE>; |
| 312 | clock-names = "otg"; |
| 313 | phys = <&exynos_usbphy 0>; |
| 314 | phy-names = "usb2-phy"; |
| 315 | status = "disabled"; |
| 316 | }; |
| 317 | |
| 318 | ehci@12580000 { |
| 319 | compatible = "samsung,exynos4210-ehci"; |
| 320 | reg = <0x12580000 0x100>; |
| 321 | interrupts = <0 70 0>; |
| 322 | clocks = <&clock CLK_USB_HOST>; |
| 323 | clock-names = "usbhost"; |
| 324 | status = "disabled"; |
| 325 | }; |
| 326 | |
| 327 | ohci@12590000 { |
| 328 | compatible = "samsung,exynos4210-ohci"; |
| 329 | reg = <0x12590000 0x100>; |
| 330 | interrupts = <0 70 0>; |
| 331 | clocks = <&clock CLK_USB_HOST>; |
| 332 | clock-names = "usbhost"; |
| 333 | status = "disabled"; |
| 334 | }; |
| 335 | |
| 336 | i2s1: i2s@13960000 { |
| 337 | compatible = "samsung,s5pv210-i2s"; |
| 338 | reg = <0x13960000 0x100>; |
| 339 | clocks = <&clock CLK_I2S1>; |
| 340 | clock-names = "iis"; |
| 341 | dmas = <&pdma1 12>, <&pdma1 11>; |
| 342 | dma-names = "tx", "rx"; |
| 343 | status = "disabled"; |
| 344 | }; |
| 345 | |
| 346 | i2s2: i2s@13970000 { |
| 347 | compatible = "samsung,s5pv210-i2s"; |
| 348 | reg = <0x13970000 0x100>; |
| 349 | clocks = <&clock CLK_I2S2>; |
| 350 | clock-names = "iis"; |
| 351 | dmas = <&pdma0 14>, <&pdma0 13>; |
| 352 | dma-names = "tx", "rx"; |
| 353 | status = "disabled"; |
| 354 | }; |
| 355 | |
| 356 | mfc: codec@13400000 { |
| 357 | compatible = "samsung,mfc-v5"; |
| 358 | reg = <0x13400000 0x10000>; |
| 359 | interrupts = <0 94 0>; |
| 360 | samsung,power-domain = <&pd_mfc>; |
| 361 | clocks = <&clock CLK_MFC>; |
| 362 | clock-names = "mfc"; |
| 363 | status = "disabled"; |
| 364 | }; |
| 365 | |
| 366 | serial@13800000 { |
| 367 | compatible = "samsung,exynos4210-uart"; |
| 368 | reg = <0x13800000 0x100>; |
| 369 | interrupts = <0 52 0>; |
| 370 | clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; |
| 371 | clock-names = "uart", "clk_uart_baud0"; |
| 372 | status = "disabled"; |
| 373 | }; |
| 374 | |
| 375 | serial@13810000 { |
| 376 | compatible = "samsung,exynos4210-uart"; |
| 377 | reg = <0x13810000 0x100>; |
| 378 | interrupts = <0 53 0>; |
| 379 | clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; |
| 380 | clock-names = "uart", "clk_uart_baud0"; |
| 381 | status = "disabled"; |
| 382 | }; |
| 383 | |
| 384 | serial@13820000 { |
| 385 | compatible = "samsung,exynos4210-uart"; |
| 386 | reg = <0x13820000 0x100>; |
| 387 | interrupts = <0 54 0>; |
| 388 | clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; |
| 389 | clock-names = "uart", "clk_uart_baud0"; |
| 390 | status = "disabled"; |
| 391 | }; |
| 392 | |
| 393 | serial@13830000 { |
| 394 | compatible = "samsung,exynos4210-uart"; |
| 395 | reg = <0x13830000 0x100>; |
| 396 | interrupts = <0 55 0>; |
| 397 | clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; |
| 398 | clock-names = "uart", "clk_uart_baud0"; |
| 399 | status = "disabled"; |
| 400 | }; |
| 401 | |
| 402 | i2c_0: i2c@13860000 { |
| 403 | #address-cells = <1>; |
| 404 | #size-cells = <0>; |
| 405 | compatible = "samsung,s3c2440-i2c"; |
| 406 | reg = <0x13860000 0x100>; |
| 407 | interrupts = <0 58 0>; |
| 408 | clocks = <&clock CLK_I2C0>; |
| 409 | clock-names = "i2c"; |
| 410 | pinctrl-names = "default"; |
| 411 | pinctrl-0 = <&i2c0_bus>; |
| 412 | status = "disabled"; |
| 413 | }; |
| 414 | |
| 415 | i2c_1: i2c@13870000 { |
| 416 | #address-cells = <1>; |
| 417 | #size-cells = <0>; |
| 418 | compatible = "samsung,s3c2440-i2c"; |
| 419 | reg = <0x13870000 0x100>; |
| 420 | interrupts = <0 59 0>; |
| 421 | clocks = <&clock CLK_I2C1>; |
| 422 | clock-names = "i2c"; |
| 423 | pinctrl-names = "default"; |
| 424 | pinctrl-0 = <&i2c1_bus>; |
| 425 | status = "disabled"; |
| 426 | }; |
| 427 | |
| 428 | i2c_2: i2c@13880000 { |
| 429 | #address-cells = <1>; |
| 430 | #size-cells = <0>; |
| 431 | compatible = "samsung,s3c2440-i2c"; |
| 432 | reg = <0x13880000 0x100>; |
| 433 | interrupts = <0 60 0>; |
| 434 | clocks = <&clock CLK_I2C2>; |
| 435 | clock-names = "i2c"; |
| 436 | pinctrl-names = "default"; |
| 437 | pinctrl-0 = <&i2c2_bus>; |
| 438 | status = "disabled"; |
| 439 | }; |
| 440 | |
| 441 | i2c_3: i2c@13890000 { |
| 442 | #address-cells = <1>; |
| 443 | #size-cells = <0>; |
| 444 | compatible = "samsung,s3c2440-i2c"; |
| 445 | reg = <0x13890000 0x100>; |
| 446 | interrupts = <0 61 0>; |
| 447 | clocks = <&clock CLK_I2C3>; |
| 448 | clock-names = "i2c"; |
| 449 | pinctrl-names = "default"; |
| 450 | pinctrl-0 = <&i2c3_bus>; |
| 451 | status = "disabled"; |
| 452 | }; |
| 453 | |
| 454 | i2c_4: i2c@138A0000 { |
| 455 | #address-cells = <1>; |
| 456 | #size-cells = <0>; |
| 457 | compatible = "samsung,s3c2440-i2c"; |
| 458 | reg = <0x138A0000 0x100>; |
| 459 | interrupts = <0 62 0>; |
| 460 | clocks = <&clock CLK_I2C4>; |
| 461 | clock-names = "i2c"; |
| 462 | pinctrl-names = "default"; |
| 463 | pinctrl-0 = <&i2c4_bus>; |
| 464 | status = "disabled"; |
| 465 | }; |
| 466 | |
| 467 | i2c_5: i2c@138B0000 { |
| 468 | #address-cells = <1>; |
| 469 | #size-cells = <0>; |
| 470 | compatible = "samsung,s3c2440-i2c"; |
| 471 | reg = <0x138B0000 0x100>; |
| 472 | interrupts = <0 63 0>; |
| 473 | clocks = <&clock CLK_I2C5>; |
| 474 | clock-names = "i2c"; |
| 475 | pinctrl-names = "default"; |
| 476 | pinctrl-0 = <&i2c5_bus>; |
| 477 | status = "disabled"; |
| 478 | }; |
| 479 | |
| 480 | i2c_6: i2c@138C0000 { |
| 481 | #address-cells = <1>; |
| 482 | #size-cells = <0>; |
| 483 | compatible = "samsung,s3c2440-i2c"; |
| 484 | reg = <0x138C0000 0x100>; |
| 485 | interrupts = <0 64 0>; |
| 486 | clocks = <&clock CLK_I2C6>; |
| 487 | clock-names = "i2c"; |
| 488 | pinctrl-names = "default"; |
| 489 | pinctrl-0 = <&i2c6_bus>; |
| 490 | status = "disabled"; |
| 491 | }; |
| 492 | |
| 493 | i2c_7: i2c@138D0000 { |
| 494 | #address-cells = <1>; |
| 495 | #size-cells = <0>; |
| 496 | compatible = "samsung,s3c2440-i2c"; |
| 497 | reg = <0x138D0000 0x100>; |
| 498 | interrupts = <0 65 0>; |
| 499 | clocks = <&clock CLK_I2C7>; |
| 500 | clock-names = "i2c"; |
| 501 | pinctrl-names = "default"; |
| 502 | pinctrl-0 = <&i2c7_bus>; |
| 503 | status = "disabled"; |
| 504 | }; |
| 505 | |
| 506 | spi_0: spi@13920000 { |
| 507 | compatible = "samsung,exynos4210-spi"; |
| 508 | reg = <0x13920000 0x100>; |
| 509 | interrupts = <0 66 0>; |
| 510 | dmas = <&pdma0 7>, <&pdma0 6>; |
| 511 | dma-names = "tx", "rx"; |
| 512 | #address-cells = <1>; |
| 513 | #size-cells = <0>; |
| 514 | clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; |
| 515 | clock-names = "spi", "spi_busclk0"; |
| 516 | pinctrl-names = "default"; |
| 517 | pinctrl-0 = <&spi0_bus>; |
| 518 | status = "disabled"; |
| 519 | }; |
| 520 | |
| 521 | spi_1: spi@13930000 { |
| 522 | compatible = "samsung,exynos4210-spi"; |
| 523 | reg = <0x13930000 0x100>; |
| 524 | interrupts = <0 67 0>; |
| 525 | dmas = <&pdma1 7>, <&pdma1 6>; |
| 526 | dma-names = "tx", "rx"; |
| 527 | #address-cells = <1>; |
| 528 | #size-cells = <0>; |
| 529 | clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; |
| 530 | clock-names = "spi", "spi_busclk0"; |
| 531 | pinctrl-names = "default"; |
| 532 | pinctrl-0 = <&spi1_bus>; |
| 533 | status = "disabled"; |
| 534 | }; |
| 535 | |
| 536 | spi_2: spi@13940000 { |
| 537 | compatible = "samsung,exynos4210-spi"; |
| 538 | reg = <0x13940000 0x100>; |
| 539 | interrupts = <0 68 0>; |
| 540 | dmas = <&pdma0 9>, <&pdma0 8>; |
| 541 | dma-names = "tx", "rx"; |
| 542 | #address-cells = <1>; |
| 543 | #size-cells = <0>; |
| 544 | clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; |
| 545 | clock-names = "spi", "spi_busclk0"; |
| 546 | pinctrl-names = "default"; |
| 547 | pinctrl-0 = <&spi2_bus>; |
| 548 | status = "disabled"; |
| 549 | }; |
| 550 | |
| 551 | pwm@139D0000 { |
| 552 | compatible = "samsung,exynos4210-pwm"; |
| 553 | reg = <0x139D0000 0x1000>; |
| 554 | interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; |
| 555 | clocks = <&clock CLK_PWM>; |
| 556 | clock-names = "timers"; |
| 557 | #pwm-cells = <2>; |
| 558 | status = "disabled"; |
| 559 | }; |
| 560 | |
| 561 | amba { |
| 562 | #address-cells = <1>; |
| 563 | #size-cells = <1>; |
| 564 | compatible = "arm,amba-bus"; |
| 565 | interrupt-parent = <&gic>; |
| 566 | ranges; |
| 567 | |
| 568 | pdma0: pdma@12680000 { |
| 569 | compatible = "arm,pl330", "arm,primecell"; |
| 570 | reg = <0x12680000 0x1000>; |
| 571 | interrupts = <0 35 0>; |
| 572 | clocks = <&clock CLK_PDMA0>; |
| 573 | clock-names = "apb_pclk"; |
| 574 | #dma-cells = <1>; |
| 575 | #dma-channels = <8>; |
| 576 | #dma-requests = <32>; |
| 577 | }; |
| 578 | |
| 579 | pdma1: pdma@12690000 { |
| 580 | compatible = "arm,pl330", "arm,primecell"; |
| 581 | reg = <0x12690000 0x1000>; |
| 582 | interrupts = <0 36 0>; |
| 583 | clocks = <&clock CLK_PDMA1>; |
| 584 | clock-names = "apb_pclk"; |
| 585 | #dma-cells = <1>; |
| 586 | #dma-channels = <8>; |
| 587 | #dma-requests = <32>; |
| 588 | }; |
| 589 | |
| 590 | mdma1: mdma@12850000 { |
| 591 | compatible = "arm,pl330", "arm,primecell"; |
| 592 | reg = <0x12850000 0x1000>; |
| 593 | interrupts = <0 34 0>; |
| 594 | clocks = <&clock CLK_MDMA>; |
| 595 | clock-names = "apb_pclk"; |
| 596 | #dma-cells = <1>; |
| 597 | #dma-channels = <8>; |
| 598 | #dma-requests = <1>; |
| 599 | }; |
| 600 | }; |
| 601 | |
| 602 | fimd: fimd@11c00000 { |
| 603 | compatible = "samsung,exynos4210-fimd"; |
| 604 | interrupt-parent = <&combiner>; |
| 605 | reg = <0x11c00000 0x20000>; |
| 606 | interrupt-names = "fifo", "vsync", "lcd_sys"; |
| 607 | interrupts = <11 0>, <11 1>, <11 2>; |
| 608 | clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; |
| 609 | clock-names = "sclk_fimd", "fimd"; |
| 610 | samsung,power-domain = <&pd_lcd0>; |
| 611 | status = "disabled"; |
| 612 | }; |
| 613 | }; |