| 1 | /* |
| 2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * Based on "omap4.dtsi" |
| 8 | */ |
| 9 | |
| 10 | #include "dra7.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "ti,dra722", "ti,dra72", "ti,dra7"; |
| 14 | |
| 15 | pmu { |
| 16 | compatible = "arm,cortex-a15-pmu"; |
| 17 | interrupt-parent = <&wakeupgen>; |
| 18 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; |
| 19 | }; |
| 20 | }; |
| 21 | |
| 22 | &dss { |
| 23 | reg = <0x58000000 0x80>, |
| 24 | <0x58004054 0x4>, |
| 25 | <0x58004300 0x20>; |
| 26 | reg-names = "dss", "pll1_clkctrl", "pll1"; |
| 27 | |
| 28 | clocks = <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 8>, |
| 29 | <&dss_clkctrl DRA7_DSS_DSS_CORE_CLKCTRL 12>; |
| 30 | clock-names = "fck", "video1_clk"; |
| 31 | }; |
| 32 | |
| 33 | &mailbox5 { |
| 34 | mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
| 35 | ti,mbox-tx = <6 2 2>; |
| 36 | ti,mbox-rx = <4 2 2>; |
| 37 | status = "disabled"; |
| 38 | }; |
| 39 | mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { |
| 40 | ti,mbox-tx = <5 2 2>; |
| 41 | ti,mbox-rx = <1 2 2>; |
| 42 | status = "disabled"; |
| 43 | }; |
| 44 | }; |
| 45 | |
| 46 | &mailbox6 { |
| 47 | mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { |
| 48 | ti,mbox-tx = <6 2 2>; |
| 49 | ti,mbox-rx = <4 2 2>; |
| 50 | status = "disabled"; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | &pcie1_rc { |
| 55 | compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie"; |
| 56 | }; |
| 57 | |
| 58 | &pcie1_ep { |
| 59 | compatible = "ti,dra726-pcie-ep", "ti,dra7-pcie-ep"; |
| 60 | }; |
| 61 | |
| 62 | &pcie2_rc { |
| 63 | compatible = "ti,dra726-pcie-rc", "ti,dra7-pcie"; |
| 64 | }; |