| 1 | #ifndef ARCH_IA64_H |
| 2 | #define ARCH_IA64_H |
| 3 | |
| 4 | #define FIO_ARCH (arch_ia64) |
| 5 | |
| 6 | #ifndef __NR_ioprio_set |
| 7 | #define __NR_ioprio_set 1274 |
| 8 | #define __NR_ioprio_get 1275 |
| 9 | #endif |
| 10 | |
| 11 | #ifndef __NR_fadvise64 |
| 12 | #define __NR_fadvise64 1234 |
| 13 | #endif |
| 14 | |
| 15 | #ifndef __NR_sys_splice |
| 16 | #define __NR_sys_splice 1297 |
| 17 | #define __NR_sys_tee 1301 |
| 18 | #define __NR_sys_vmsplice 1302 |
| 19 | #endif |
| 20 | |
| 21 | #define nop asm volatile ("hint @pause" ::: "memory"); |
| 22 | #define read_barrier() asm volatile ("mf" ::: "memory") |
| 23 | #define write_barrier() asm volatile ("mf" ::: "memory") |
| 24 | |
| 25 | #define ia64_popcnt(x) \ |
| 26 | ({ \ |
| 27 | unsigned long ia64_intri_res; \ |
| 28 | asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \ |
| 29 | ia64_intri_res; \ |
| 30 | }) |
| 31 | |
| 32 | static inline unsigned long arch_ffz(unsigned long bitmask) |
| 33 | { |
| 34 | return ia64_popcnt(bitmask & (~bitmask - 1)); |
| 35 | } |
| 36 | |
| 37 | static inline unsigned long get_cpu_clock(void) |
| 38 | { |
| 39 | unsigned long ret; |
| 40 | |
| 41 | __asm__ __volatile__("mov %0=ar.itc" : "=r" (ret) : : "memory"); |
| 42 | return ret; |
| 43 | } |
| 44 | |
| 45 | #define ARCH_HAVE_INIT |
| 46 | extern int tsc_reliable; |
| 47 | static inline int arch_init(char *envp[]) |
| 48 | { |
| 49 | tsc_reliable = 1; |
| 50 | return 0; |
| 51 | } |
| 52 | |
| 53 | #define ARCH_HAVE_FFZ |
| 54 | #define ARCH_HAVE_CPU_CLOCK |
| 55 | |
| 56 | #endif |