[linux-2.6-block.git] / virt / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 */

#include <linux/kvm_host.h>

#include <asm/msidef.h>

#include "irq.h"

#include "ioapic.h"

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int level)
{
#ifdef CONFIG_X86
	return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level);
#else
	return -1;
#endif
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int level)
{
	return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
}

void kvm_get_intr_delivery_bitmask(struct kvm_ioapic *ioapic,
				   union kvm_ioapic_redirect_entry *entry,
				   unsigned long *deliver_bitmask)
{
	struct kvm_vcpu *vcpu;

	kvm_ioapic_get_delivery_bitmask(ioapic, entry->fields.dest_id,
					entry->fields.dest_mode,
					deliver_bitmask);
	switch (entry->fields.delivery_mode) {
	case IOAPIC_LOWEST_PRIORITY:
		vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm,
				entry->fields.vector, deliver_bitmask);
		__set_bit(vcpu->vcpu_id, deliver_bitmask);
		break;
	case IOAPIC_FIXED:
	case IOAPIC_NMI:
		break;
	default:
		if (printk_ratelimit())
			printk(KERN_INFO "kvm: unsupported delivery mode %d\n",
				entry->fields.delivery_mode);
		*deliver_bitmask = 0;
	}
}

static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		       struct kvm *kvm, int level)
{
	int vcpu_id, r = -1;
	struct kvm_vcpu *vcpu;
	struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
	union kvm_ioapic_redirect_entry entry;
	DECLARE_BITMAP(deliver_bitmask, KVM_MAX_VCPUS);

	BUG_ON(!ioapic);

	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);

	entry.bits = 0;
	entry.fields.dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	entry.fields.vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
			(unsigned long *)&e->msi.address_lo);
	entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
			(unsigned long *)&e->msi.data);
	entry.fields.delivery_mode = test_bit(
			MSI_DATA_DELIVERY_MODE_SHIFT,
			(unsigned long *)&e->msi.data);

	/* TODO Deal with RH bit of MSI message address */

	kvm_get_intr_delivery_bitmask(ioapic, &entry, deliver_bitmask);

	if (find_first_bit(deliver_bitmask, KVM_MAX_VCPUS) >= KVM_MAX_VCPUS) {
		printk(KERN_WARNING "kvm: no destination for MSI delivery!");
		return -1;
	}
	while ((vcpu_id = find_first_bit(deliver_bitmask,
					KVM_MAX_VCPUS)) < KVM_MAX_VCPUS) {
		__clear_bit(vcpu_id, deliver_bitmask);
		vcpu = ioapic->kvm->vcpus[vcpu_id];
		if (vcpu) {
			if (r < 0)
				r = 0;
			r += kvm_apic_set_irq(vcpu, entry.fields.vector,
					      entry.fields.trig_mode);
		}
	}
	return r;
}

/* This should be called with the kvm->lock mutex held
 * Return value:
 *  < 0   Interrupt was ignored (masked or not delivered for other reasons)
 *  = 0   Interrupt was coalesced (previous irq is still pending)
 *  > 0   Number of CPUs interrupt was delivered to
 */
int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
{
	struct kvm_kernel_irq_routing_entry *e;
	unsigned long *irq_state, sig_level;
	int ret = -1;

	if (irq < KVM_IOAPIC_NUM_PINS) {
		irq_state = (unsigned long *)&kvm->arch.irq_states[irq];

		/* Logical OR for level trig interrupt */
		if (level)
			set_bit(irq_source_id, irq_state);
		else
			clear_bit(irq_source_id, irq_state);
		sig_level = !!(*irq_state);
	} else /* Deal with MSI/MSI-X */
		sig_level = 1;

	/* Not possible to detect if the guest uses the PIC or the
	 * IOAPIC.  So set the bit in both. The guest will ignore
	 * writes to the unused one.
	 */
	list_for_each_entry(e, &kvm->irq_routing, link)
		if (e->gsi == irq) {
			int r = e->set(e, kvm, sig_level);
			if (r < 0)
				continue;

			ret = r + ((ret < 0) ? 0 : ret);
		}
	return ret;
}

void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
{
	struct kvm_kernel_irq_routing_entry *e;
	struct kvm_irq_ack_notifier *kian;
	struct hlist_node *n;
	unsigned gsi = pin;

	list_for_each_entry(e, &kvm->irq_routing, link)
		if (e->irqchip.irqchip == irqchip &&
		    e->irqchip.pin == pin) {
			gsi = e->gsi;
			break;
		}

	hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
		if (kian->gsi == gsi)
			kian->irq_acked(kian);
}

void kvm_register_irq_ack_notifier(struct kvm *kvm,
				   struct kvm_irq_ack_notifier *kian)
{
	hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
}

void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian)
{
	hlist_del_init(&kian->link);
}

/* The caller must hold kvm->lock mutex */
int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id = find_first_zero_bit(bitmap,
				sizeof(kvm->arch.irq_sources_bitmap));

	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		return -EFAULT;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	int i;

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);

	if (irq_source_id < 0 ||
	    irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		return;
	}
	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
		clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	kimn->irq = irq;
	hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	hlist_del(&kimn->link);
}

void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	struct hlist_node *n;

	hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
		if (kimn->irq == irq)
			kimn->func(kimn, mask);
}

static void __kvm_free_irq_routing(struct list_head *irq_routing)
{
	struct kvm_kernel_irq_routing_entry *e, *n;

	list_for_each_entry_safe(e, n, irq_routing, link)
		kfree(e);
}

void kvm_free_irq_routing(struct kvm *kvm)
{
	__kvm_free_irq_routing(&kvm->irq_routing);
}

static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
			       const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;

	e->gsi = ue->gsi;
	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
				e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}
	r = 0;
out:
	return r;
}


int kvm_set_irq_routing(struct kvm *kvm,
			const struct kvm_irq_routing_entry *ue,
			unsigned nr,
			unsigned flags)
{
	struct list_head irq_list = LIST_HEAD_INIT(irq_list);
	struct list_head tmp = LIST_HEAD_INIT(tmp);
	struct kvm_kernel_irq_routing_entry *e = NULL;
	unsigned i;
	int r;

	for (i = 0; i < nr; ++i) {
		r = -EINVAL;
		if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
			goto out;
		if (ue->flags)
			goto out;
		r = -ENOMEM;
		e = kzalloc(sizeof(*e), GFP_KERNEL);
		if (!e)
			goto out;
		r = setup_routing_entry(e, ue);
		if (r)
			goto out;
		++ue;
		list_add(&e->link, &irq_list);
		e = NULL;
	}

	mutex_lock(&kvm->lock);
	list_splice(&kvm->irq_routing, &tmp);
	INIT_LIST_HEAD(&kvm->irq_routing);
	list_splice(&irq_list, &kvm->irq_routing);
	INIT_LIST_HEAD(&irq_list);
	list_splice(&tmp, &irq_list);
	mutex_unlock(&kvm->lock);

	r = 0;

out:
	kfree(e);
	__kvm_free_irq_routing(&irq_list);
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#ifdef CONFIG_X86
#  define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
#else
#  define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq)
#endif

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
#ifdef CONFIG_IA64
	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
#endif
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
	20	*/
	21
	22	#include <linux/kvm_host.h>
79950e10	23
79950e10	24	#include <asm/msidef.h>
79950e10	25
3de42dc0 XZ	26	#include "irq.h"
	27
	28	#include "ioapic.h"
	29
4925663a GN	30	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	31	struct kvm *kvm, int level)
399ec807 AK	32	{
399ec807 AK	33	#ifdef CONFIG_X86
4925663a GN	34	return kvm_pic_set_irq(pic_irqchip(kvm), e->irqchip.pin, level);
	35	#else
	36	return -1;
399ec807 AK	37	#endif
	38	}
	39
4925663a GN	40	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	41	struct kvm *kvm, int level)
399ec807	42	{
4925663a	43	return kvm_ioapic_set_irq(kvm->arch.vioapic, e->irqchip.pin, level);
399ec807 AK	44	}
399ec807 AK	45
116191b6 SY	46	void kvm_get_intr_delivery_bitmask(struct kvm_ioapic *ioapic,
	47	union kvm_ioapic_redirect_entry *entry,
	48	unsigned long *deliver_bitmask)
	49	{
	50	struct kvm_vcpu *vcpu;
	51
e5871be0 SY	52	kvm_ioapic_get_delivery_bitmask(ioapic, entry->fields.dest_id,
	53	entry->fields.dest_mode,
	54	deliver_bitmask);
116191b6 SY	55	switch (entry->fields.delivery_mode) {
	56	case IOAPIC_LOWEST_PRIORITY:
	57	vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm,
110c2fae	58	entry->fields.vector, deliver_bitmask);
bfd349d0	59	__set_bit(vcpu->vcpu_id, deliver_bitmask);
116191b6 SY	60	break;
	61	case IOAPIC_FIXED:
	62	case IOAPIC_NMI:
	63	break;
	64	default:
	65	if (printk_ratelimit())
	66	printk(KERN_INFO "kvm: unsupported delivery mode %d\n",
	67	entry->fields.delivery_mode);
	68	*deliver_bitmask = 0;
	69	}
	70	}
	71
4925663a GN	72	static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
4925663a GN	73	struct kvm *kvm, int level)
79950e10	74	{
71450f78	75	int vcpu_id, r = -1;
79950e10 SY	76	struct kvm_vcpu *vcpu;
79950e10 SY	77	struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
116191b6	78	union kvm_ioapic_redirect_entry entry;
bfd349d0	79	DECLARE_BITMAP(deliver_bitmask, KVM_MAX_VCPUS);
79950e10 SY	80
	81	BUG_ON(!ioapic);
	82
bfd349d0 SY	83	bitmap_zero(deliver_bitmask, KVM_MAX_VCPUS);
bfd349d0 SY	84
116191b6 SY	85	entry.bits = 0;
	86	entry.fields.dest_id = (e->msi.address_lo &
	87	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	88	entry.fields.vector = (e->msi.data &
	89	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	90	entry.fields.dest_mode = test_bit(MSI_ADDR_DEST_MODE_SHIFT,
	91	(unsigned long *)&e->msi.address_lo);
	92	entry.fields.trig_mode = test_bit(MSI_DATA_TRIGGER_SHIFT,
	93	(unsigned long *)&e->msi.data);
	94	entry.fields.delivery_mode = test_bit(
	95	MSI_DATA_DELIVERY_MODE_SHIFT,
	96	(unsigned long *)&e->msi.data);
	97
	98	/* TODO Deal with RH bit of MSI message address */
	99
bfd349d0	100	kvm_get_intr_delivery_bitmask(ioapic, &entry, deliver_bitmask);
116191b6	101
bfd349d0	102	if (find_first_bit(deliver_bitmask, KVM_MAX_VCPUS) >= KVM_MAX_VCPUS) {
116191b6 SY	103	printk(KERN_WARNING "kvm: no destination for MSI delivery!");
	104	return -1;
	105	}
bfd349d0 SY	106	while ((vcpu_id = find_first_bit(deliver_bitmask,
	107	KVM_MAX_VCPUS)) < KVM_MAX_VCPUS) {
	108	__clear_bit(vcpu_id, deliver_bitmask);
116191b6 SY	109	vcpu = ioapic->kvm->vcpus[vcpu_id];
	110	if (vcpu) {
	111	if (r < 0)
	112	r = 0;
	113	r += kvm_apic_set_irq(vcpu, entry.fields.vector,
	114	entry.fields.trig_mode);
79950e10	115	}
79950e10	116	}
71450f78	117	return r;
79950e10 SY	118	}
79950e10 SY	119
4925663a GN	120	/* This should be called with the kvm->lock mutex held
	121	* Return value:
	122	* < 0 Interrupt was ignored (masked or not delivered for other reasons)
	123	* = 0 Interrupt was coalesced (previous irq is still pending)
	124	* > 0 Number of CPUs interrupt was delivered to
	125	*/
	126	int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level)
3de42dc0	127	{
399ec807	128	struct kvm_kernel_irq_routing_entry *e;
79950e10	129	unsigned long *irq_state, sig_level;
4925663a	130	int ret = -1;
79950e10 SY	131
	132	if (irq < KVM_IOAPIC_NUM_PINS) {
	133	irq_state = (unsigned long *)&kvm->arch.irq_states[irq];
5550af4d	134
79950e10 SY	135	/* Logical OR for level trig interrupt */
	136	if (level)
	137	set_bit(irq_source_id, irq_state);
	138	else
	139	clear_bit(irq_source_id, irq_state);
	140	sig_level = !!(*irq_state);
	141	} else /* Deal with MSI/MSI-X */
	142	sig_level = 1;
5550af4d	143
3de42dc0 XZ	144	/* Not possible to detect if the guest uses the PIC or the
	145	* IOAPIC. So set the bit in both. The guest will ignore
	146	* writes to the unused one.
	147	*/
399ec807	148	list_for_each_entry(e, &kvm->irq_routing, link)
4925663a GN	149	if (e->gsi == irq) {
	150	int r = e->set(e, kvm, sig_level);
	151	if (r < 0)
	152	continue;
	153
	154	ret = r + ((ret < 0) ? 0 : ret);
	155	}
	156	return ret;
3de42dc0 XZ	157	}
3de42dc0 XZ	158
44882eed	159	void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
3de42dc0	160	{
44882eed	161	struct kvm_kernel_irq_routing_entry *e;
3de42dc0 XZ	162	struct kvm_irq_ack_notifier *kian;
3de42dc0 XZ	163	struct hlist_node *n;
44882eed MT	164	unsigned gsi = pin;
	165
	166	list_for_each_entry(e, &kvm->irq_routing, link)
	167	if (e->irqchip.irqchip == irqchip &&
	168	e->irqchip.pin == pin) {
	169	gsi = e->gsi;
	170	break;
	171	}
3de42dc0 XZ	172
	173	hlist_for_each_entry(kian, n, &kvm->arch.irq_ack_notifier_list, link)
	174	if (kian->gsi == gsi)
	175	kian->irq_acked(kian);
	176	}
	177
	178	void kvm_register_irq_ack_notifier(struct kvm *kvm,
	179	struct kvm_irq_ack_notifier *kian)
	180	{
	181	hlist_add_head(&kian->link, &kvm->arch.irq_ack_notifier_list);
	182	}
	183
e19e30ef	184	void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian)
3de42dc0	185	{
fdd897e6	186	hlist_del_init(&kian->link);
3de42dc0	187	}
5550af4d SY	188
	189	/* The caller must hold kvm->lock mutex */
	190	int kvm_request_irq_source_id(struct kvm *kvm)
	191	{
	192	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	193	int irq_source_id = find_first_zero_bit(bitmap,
	194	sizeof(kvm->arch.irq_sources_bitmap));
61552367	195
5550af4d SY	196	if (irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
5550af4d SY	197	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
61552367 MM	198	return -EFAULT;
	199	}
	200
	201	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	202	set_bit(irq_source_id, bitmap);
	203
5550af4d SY	204	return irq_source_id;
	205	}
	206
	207	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	208	{
	209	int i;
	210
61552367 MM	211	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	212
	213	if (irq_source_id < 0 \|\|
5550af4d SY	214	irq_source_id >= sizeof(kvm->arch.irq_sources_bitmap)) {
	215	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
	216	return;
	217	}
	218	for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
	219	clear_bit(irq_source_id, &kvm->arch.irq_states[i]);
	220	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	221	}
75858a84 AK	222
	223	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	224	struct kvm_irq_mask_notifier *kimn)
	225	{
	226	kimn->irq = irq;
	227	hlist_add_head(&kimn->link, &kvm->mask_notifier_list);
	228	}
	229
	230	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	231	struct kvm_irq_mask_notifier *kimn)
	232	{
	233	hlist_del(&kimn->link);
	234	}
	235
	236	void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask)
	237	{
	238	struct kvm_irq_mask_notifier *kimn;
	239	struct hlist_node *n;
	240
	241	hlist_for_each_entry(kimn, n, &kvm->mask_notifier_list, link)
	242	if (kimn->irq == irq)
	243	kimn->func(kimn, mask);
	244	}
	245
399ec807 AK	246	static void __kvm_free_irq_routing(struct list_head *irq_routing)
	247	{
	248	struct kvm_kernel_irq_routing_entry e, n;
	249
	250	list_for_each_entry_safe(e, n, irq_routing, link)
	251	kfree(e);
	252	}
	253
	254	void kvm_free_irq_routing(struct kvm *kvm)
	255	{
	256	__kvm_free_irq_routing(&kvm->irq_routing);
	257	}
	258
cded19f3 HE	259	static int setup_routing_entry(struct kvm_kernel_irq_routing_entry *e,
cded19f3 HE	260	const struct kvm_irq_routing_entry *ue)
399ec807 AK	261	{
	262	int r = -EINVAL;
	263	int delta;
	264
	265	e->gsi = ue->gsi;
	266	switch (ue->type) {
	267	case KVM_IRQ_ROUTING_IRQCHIP:
	268	delta = 0;
	269	switch (ue->u.irqchip.irqchip) {
	270	case KVM_IRQCHIP_PIC_MASTER:
	271	e->set = kvm_set_pic_irq;
	272	break;
	273	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	274	e->set = kvm_set_pic_irq;
399ec807 AK	275	delta = 8;
	276	break;
	277	case KVM_IRQCHIP_IOAPIC:
	278	e->set = kvm_set_ioapic_irq;
	279	break;
	280	default:
	281	goto out;
	282	}
	283	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	284	e->irqchip.pin = ue->u.irqchip.pin + delta;
	285	break;
79950e10 SY	286	case KVM_IRQ_ROUTING_MSI:
	287	e->set = kvm_set_msi;
	288	e->msi.address_lo = ue->u.msi.address_lo;
	289	e->msi.address_hi = ue->u.msi.address_hi;
	290	e->msi.data = ue->u.msi.data;
	291	break;
399ec807 AK	292	default:
	293	goto out;
	294	}
	295	r = 0;
	296	out:
	297	return r;
	298	}
	299
	300
	301	int kvm_set_irq_routing(struct kvm *kvm,
	302	const struct kvm_irq_routing_entry *ue,
	303	unsigned nr,
	304	unsigned flags)
	305	{
	306	struct list_head irq_list = LIST_HEAD_INIT(irq_list);
	307	struct list_head tmp = LIST_HEAD_INIT(tmp);
	308	struct kvm_kernel_irq_routing_entry *e = NULL;
	309	unsigned i;
	310	int r;
	311
	312	for (i = 0; i < nr; ++i) {
	313	r = -EINVAL;
	314	if (ue->gsi >= KVM_MAX_IRQ_ROUTES)
	315	goto out;
	316	if (ue->flags)
	317	goto out;
	318	r = -ENOMEM;
	319	e = kzalloc(sizeof(*e), GFP_KERNEL);
	320	if (!e)
	321	goto out;
	322	r = setup_routing_entry(e, ue);
	323	if (r)
	324	goto out;
	325	++ue;
	326	list_add(&e->link, &irq_list);
	327	e = NULL;
	328	}
	329
	330	mutex_lock(&kvm->lock);
	331	list_splice(&kvm->irq_routing, &tmp);
	332	INIT_LIST_HEAD(&kvm->irq_routing);
	333	list_splice(&irq_list, &kvm->irq_routing);
	334	INIT_LIST_HEAD(&irq_list);
	335	list_splice(&tmp, &irq_list);
	336	mutex_unlock(&kvm->lock);
	337
	338	r = 0;
	339
	340	out:
	341	kfree(e);
	342	__kvm_free_irq_routing(&irq_list);
	343	return r;
	344	}
	345
	346	#define IOAPIC_ROUTING_ENTRY(irq) \
	347	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	348	.u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
	349	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
	350
	351	#ifdef CONFIG_X86
399ec807 AK	352	# define PIC_ROUTING_ENTRY(irq) \
	353	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
	354	.u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
	355	# define ROUTING_ENTRY2(irq) \
	356	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
	357	#else
	358	# define ROUTING_ENTRY2(irq) \
	359	IOAPIC_ROUTING_ENTRY(irq)
	360	#endif
	361
	362	static const struct kvm_irq_routing_entry default_routing[] = {
	363	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	364	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	365	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	366	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	367	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	368	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	369	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	370	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	371	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	372	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	373	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	374	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
	375	#ifdef CONFIG_IA64
	376	ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
	377	ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
	378	ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
	379	ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
	380	ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
	381	ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
	382	ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
	383	ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
	384	ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
	385	ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
	386	ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
	387	ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
	388	#endif
	389	};
	390
	391	int kvm_setup_default_irq_routing(struct kvm *kvm)
	392	{
	393	return kvm_set_irq_routing(kvm, default_routing,
	394	ARRAY_SIZE(default_routing), 0);
	395	}