Commit | Line | Data |
---|---|---|
3de42dc0 XZ |
1 | /* |
2 | * irq_comm.c: Common API for in kernel interrupt controller | |
3 | * Copyright (c) 2007, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
17 | * Authors: | |
18 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/kvm_host.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
229456fc | 24 | #include <trace/events/kvm.h> |
79950e10 | 25 | |
79950e10 | 26 | #include <asm/msidef.h> |
58c2dde1 GN |
27 | #ifdef CONFIG_IA64 |
28 | #include <asm/iosapic.h> | |
29 | #endif | |
79950e10 | 30 | |
3de42dc0 XZ |
31 | #include "irq.h" |
32 | ||
33 | #include "ioapic.h" | |
34 | ||
1a6e4a8c GN |
35 | static inline int kvm_irq_line_state(unsigned long *irq_state, |
36 | int irq_source_id, int level) | |
37 | { | |
38 | /* Logical OR for level trig interrupt */ | |
39 | if (level) | |
40 | set_bit(irq_source_id, irq_state); | |
41 | else | |
42 | clear_bit(irq_source_id, irq_state); | |
43 | ||
44 | return !!(*irq_state); | |
45 | } | |
46 | ||
4925663a | 47 | static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 48 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 AK |
49 | { |
50 | #ifdef CONFIG_X86 | |
1a6e4a8c GN |
51 | struct kvm_pic *pic = pic_irqchip(kvm); |
52 | level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin], | |
53 | irq_source_id, level); | |
54 | return kvm_pic_set_irq(pic, e->irqchip.pin, level); | |
4925663a GN |
55 | #else |
56 | return -1; | |
399ec807 AK |
57 | #endif |
58 | } | |
59 | ||
4925663a | 60 | static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 61 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 | 62 | { |
1a6e4a8c GN |
63 | struct kvm_ioapic *ioapic = kvm->arch.vioapic; |
64 | level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin], | |
65 | irq_source_id, level); | |
66 | ||
67 | return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level); | |
399ec807 AK |
68 | } |
69 | ||
58c2dde1 | 70 | inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) |
116191b6 | 71 | { |
58c2dde1 GN |
72 | #ifdef CONFIG_IA64 |
73 | return irq->delivery_mode == | |
74 | (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); | |
75 | #else | |
76 | return irq->delivery_mode == APIC_DM_LOWEST; | |
77 | #endif | |
78 | } | |
116191b6 | 79 | |
58c2dde1 GN |
80 | int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, |
81 | struct kvm_lapic_irq *irq) | |
82 | { | |
83 | int i, r = -1; | |
84 | struct kvm_vcpu *vcpu, *lowest = NULL; | |
85 | ||
86 | if (irq->dest_mode == 0 && irq->dest_id == 0xff && | |
87 | kvm_is_dm_lowest_prio(irq)) | |
343f94fe GN |
88 | printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); |
89 | ||
988a2cae GN |
90 | kvm_for_each_vcpu(i, vcpu, kvm) { |
91 | if (!kvm_apic_present(vcpu)) | |
343f94fe GN |
92 | continue; |
93 | ||
58c2dde1 GN |
94 | if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, |
95 | irq->dest_id, irq->dest_mode)) | |
343f94fe GN |
96 | continue; |
97 | ||
58c2dde1 GN |
98 | if (!kvm_is_dm_lowest_prio(irq)) { |
99 | if (r < 0) | |
100 | r = 0; | |
101 | r += kvm_apic_set_irq(vcpu, irq); | |
e1035715 | 102 | } else { |
58c2dde1 GN |
103 | if (!lowest) |
104 | lowest = vcpu; | |
105 | else if (kvm_apic_compare_prio(vcpu, lowest) < 0) | |
106 | lowest = vcpu; | |
e1035715 | 107 | } |
343f94fe GN |
108 | } |
109 | ||
58c2dde1 GN |
110 | if (lowest) |
111 | r = kvm_apic_set_irq(lowest, irq); | |
112 | ||
113 | return r; | |
116191b6 SY |
114 | } |
115 | ||
4925663a | 116 | static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 117 | struct kvm *kvm, int irq_source_id, int level) |
79950e10 | 118 | { |
58c2dde1 | 119 | struct kvm_lapic_irq irq; |
79950e10 | 120 | |
1a6e4a8c GN |
121 | if (!level) |
122 | return -1; | |
123 | ||
1000ff8d GN |
124 | trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data); |
125 | ||
58c2dde1 | 126 | irq.dest_id = (e->msi.address_lo & |
116191b6 | 127 | MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
58c2dde1 | 128 | irq.vector = (e->msi.data & |
116191b6 | 129 | MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
58c2dde1 GN |
130 | irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; |
131 | irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; | |
132 | irq.delivery_mode = e->msi.data & 0x700; | |
133 | irq.level = 1; | |
134 | irq.shorthand = 0; | |
116191b6 SY |
135 | |
136 | /* TODO Deal with RH bit of MSI message address */ | |
58c2dde1 | 137 | return kvm_irq_delivery_to_apic(kvm, NULL, &irq); |
79950e10 SY |
138 | } |
139 | ||
680b3648 | 140 | /* |
4925663a GN |
141 | * Return value: |
142 | * < 0 Interrupt was ignored (masked or not delivered for other reasons) | |
143 | * = 0 Interrupt was coalesced (previous irq is still pending) | |
144 | * > 0 Number of CPUs interrupt was delivered to | |
145 | */ | |
46e624b9 | 146 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level) |
3de42dc0 | 147 | { |
eba0226b GN |
148 | struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS]; |
149 | int ret = -1, i = 0; | |
46e624b9 GN |
150 | struct kvm_irq_routing_table *irq_rt; |
151 | struct hlist_node *n; | |
79950e10 | 152 | |
ae8c1c40 | 153 | trace_kvm_set_irq(irq, level, irq_source_id); |
229456fc | 154 | |
3de42dc0 XZ |
155 | /* Not possible to detect if the guest uses the PIC or the |
156 | * IOAPIC. So set the bit in both. The guest will ignore | |
157 | * writes to the unused one. | |
158 | */ | |
e42bba90 GN |
159 | rcu_read_lock(); |
160 | irq_rt = rcu_dereference(kvm->irq_routing); | |
46e624b9 | 161 | if (irq < irq_rt->nr_rt_entries) |
eba0226b GN |
162 | hlist_for_each_entry(e, n, &irq_rt->map[irq], link) |
163 | irq_set[i++] = *e; | |
e42bba90 | 164 | rcu_read_unlock(); |
eba0226b GN |
165 | |
166 | while(i--) { | |
167 | int r; | |
168 | r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level); | |
169 | if (r < 0) | |
170 | continue; | |
171 | ||
172 | ret = r + ((ret < 0) ? 0 : ret); | |
173 | } | |
174 | ||
4925663a | 175 | return ret; |
3de42dc0 XZ |
176 | } |
177 | ||
44882eed | 178 | void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin) |
3de42dc0 XZ |
179 | { |
180 | struct kvm_irq_ack_notifier *kian; | |
181 | struct hlist_node *n; | |
3e71f88b | 182 | int gsi; |
44882eed | 183 | |
229456fc MT |
184 | trace_kvm_ack_irq(irqchip, pin); |
185 | ||
e42bba90 GN |
186 | rcu_read_lock(); |
187 | gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; | |
3e71f88b | 188 | if (gsi != -1) |
280aa177 GN |
189 | hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list, |
190 | link) | |
3e71f88b GN |
191 | if (kian->gsi == gsi) |
192 | kian->irq_acked(kian); | |
280aa177 | 193 | rcu_read_unlock(); |
3de42dc0 XZ |
194 | } |
195 | ||
196 | void kvm_register_irq_ack_notifier(struct kvm *kvm, | |
197 | struct kvm_irq_ack_notifier *kian) | |
198 | { | |
fa40a821 | 199 | mutex_lock(&kvm->irq_lock); |
280aa177 | 200 | hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list); |
fa40a821 | 201 | mutex_unlock(&kvm->irq_lock); |
3de42dc0 XZ |
202 | } |
203 | ||
fa40a821 MT |
204 | void kvm_unregister_irq_ack_notifier(struct kvm *kvm, |
205 | struct kvm_irq_ack_notifier *kian) | |
3de42dc0 | 206 | { |
fa40a821 | 207 | mutex_lock(&kvm->irq_lock); |
280aa177 | 208 | hlist_del_init_rcu(&kian->link); |
fa40a821 | 209 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 210 | synchronize_rcu(); |
3de42dc0 | 211 | } |
5550af4d | 212 | |
5550af4d SY |
213 | int kvm_request_irq_source_id(struct kvm *kvm) |
214 | { | |
215 | unsigned long *bitmap = &kvm->arch.irq_sources_bitmap; | |
fa40a821 MT |
216 | int irq_source_id; |
217 | ||
218 | mutex_lock(&kvm->irq_lock); | |
cd5a2685 | 219 | irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG); |
61552367 | 220 | |
cd5a2685 | 221 | if (irq_source_id >= BITS_PER_LONG) { |
5550af4d | 222 | printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n"); |
0c6ddceb JS |
223 | irq_source_id = -EFAULT; |
224 | goto unlock; | |
61552367 MM |
225 | } |
226 | ||
227 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); | |
228 | set_bit(irq_source_id, bitmap); | |
0c6ddceb | 229 | unlock: |
fa40a821 | 230 | mutex_unlock(&kvm->irq_lock); |
61552367 | 231 | |
5550af4d SY |
232 | return irq_source_id; |
233 | } | |
234 | ||
235 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id) | |
236 | { | |
237 | int i; | |
238 | ||
61552367 MM |
239 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); |
240 | ||
fa40a821 | 241 | mutex_lock(&kvm->irq_lock); |
61552367 | 242 | if (irq_source_id < 0 || |
cd5a2685 | 243 | irq_source_id >= BITS_PER_LONG) { |
5550af4d | 244 | printk(KERN_ERR "kvm: IRQ source ID out of range!\n"); |
0c6ddceb | 245 | goto unlock; |
5550af4d | 246 | } |
e50212bb MT |
247 | clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap); |
248 | if (!irqchip_in_kernel(kvm)) | |
249 | goto unlock; | |
250 | ||
1a6e4a8c GN |
251 | for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) { |
252 | clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]); | |
253 | if (i >= 16) | |
254 | continue; | |
255 | #ifdef CONFIG_X86 | |
256 | clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]); | |
257 | #endif | |
258 | } | |
0c6ddceb | 259 | unlock: |
fa40a821 | 260 | mutex_unlock(&kvm->irq_lock); |
5550af4d | 261 | } |
75858a84 AK |
262 | |
263 | void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, | |
264 | struct kvm_irq_mask_notifier *kimn) | |
265 | { | |
fa40a821 | 266 | mutex_lock(&kvm->irq_lock); |
75858a84 | 267 | kimn->irq = irq; |
280aa177 | 268 | hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list); |
fa40a821 | 269 | mutex_unlock(&kvm->irq_lock); |
75858a84 AK |
270 | } |
271 | ||
272 | void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, | |
273 | struct kvm_irq_mask_notifier *kimn) | |
274 | { | |
fa40a821 | 275 | mutex_lock(&kvm->irq_lock); |
280aa177 | 276 | hlist_del_rcu(&kimn->link); |
fa40a821 | 277 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 278 | synchronize_rcu(); |
75858a84 AK |
279 | } |
280 | ||
281 | void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask) | |
282 | { | |
283 | struct kvm_irq_mask_notifier *kimn; | |
284 | struct hlist_node *n; | |
285 | ||
280aa177 GN |
286 | rcu_read_lock(); |
287 | hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link) | |
75858a84 AK |
288 | if (kimn->irq == irq) |
289 | kimn->func(kimn, mask); | |
280aa177 | 290 | rcu_read_unlock(); |
75858a84 AK |
291 | } |
292 | ||
399ec807 AK |
293 | void kvm_free_irq_routing(struct kvm *kvm) |
294 | { | |
e42bba90 GN |
295 | /* Called only during vm destruction. Nobody can use the pointer |
296 | at this stage */ | |
46e624b9 | 297 | kfree(kvm->irq_routing); |
399ec807 AK |
298 | } |
299 | ||
46e624b9 GN |
300 | static int setup_routing_entry(struct kvm_irq_routing_table *rt, |
301 | struct kvm_kernel_irq_routing_entry *e, | |
cded19f3 | 302 | const struct kvm_irq_routing_entry *ue) |
399ec807 AK |
303 | { |
304 | int r = -EINVAL; | |
305 | int delta; | |
d72118ce | 306 | unsigned max_pin; |
46e624b9 GN |
307 | struct kvm_kernel_irq_routing_entry *ei; |
308 | struct hlist_node *n; | |
309 | ||
310 | /* | |
311 | * Do not allow GSI to be mapped to the same irqchip more than once. | |
312 | * Allow only one to one mapping between GSI and MSI. | |
313 | */ | |
314 | hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link) | |
315 | if (ei->type == KVM_IRQ_ROUTING_MSI || | |
316 | ue->u.irqchip.irqchip == ei->irqchip.irqchip) | |
317 | return r; | |
399ec807 AK |
318 | |
319 | e->gsi = ue->gsi; | |
5116d8f6 | 320 | e->type = ue->type; |
399ec807 AK |
321 | switch (ue->type) { |
322 | case KVM_IRQ_ROUTING_IRQCHIP: | |
323 | delta = 0; | |
324 | switch (ue->u.irqchip.irqchip) { | |
325 | case KVM_IRQCHIP_PIC_MASTER: | |
326 | e->set = kvm_set_pic_irq; | |
d72118ce | 327 | max_pin = 16; |
399ec807 AK |
328 | break; |
329 | case KVM_IRQCHIP_PIC_SLAVE: | |
4925663a | 330 | e->set = kvm_set_pic_irq; |
d72118ce | 331 | max_pin = 16; |
399ec807 AK |
332 | delta = 8; |
333 | break; | |
334 | case KVM_IRQCHIP_IOAPIC: | |
d72118ce | 335 | max_pin = KVM_IOAPIC_NUM_PINS; |
efbc100c | 336 | e->set = kvm_set_ioapic_irq; |
399ec807 AK |
337 | break; |
338 | default: | |
339 | goto out; | |
340 | } | |
341 | e->irqchip.irqchip = ue->u.irqchip.irqchip; | |
342 | e->irqchip.pin = ue->u.irqchip.pin + delta; | |
d72118ce | 343 | if (e->irqchip.pin >= max_pin) |
3e71f88b GN |
344 | goto out; |
345 | rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi; | |
399ec807 | 346 | break; |
79950e10 SY |
347 | case KVM_IRQ_ROUTING_MSI: |
348 | e->set = kvm_set_msi; | |
349 | e->msi.address_lo = ue->u.msi.address_lo; | |
350 | e->msi.address_hi = ue->u.msi.address_hi; | |
351 | e->msi.data = ue->u.msi.data; | |
352 | break; | |
399ec807 AK |
353 | default: |
354 | goto out; | |
355 | } | |
46e624b9 GN |
356 | |
357 | hlist_add_head(&e->link, &rt->map[e->gsi]); | |
399ec807 AK |
358 | r = 0; |
359 | out: | |
360 | return r; | |
361 | } | |
362 | ||
363 | ||
364 | int kvm_set_irq_routing(struct kvm *kvm, | |
365 | const struct kvm_irq_routing_entry *ue, | |
366 | unsigned nr, | |
367 | unsigned flags) | |
368 | { | |
46e624b9 | 369 | struct kvm_irq_routing_table *new, *old; |
3e71f88b | 370 | u32 i, j, nr_rt_entries = 0; |
399ec807 AK |
371 | int r; |
372 | ||
46e624b9 GN |
373 | for (i = 0; i < nr; ++i) { |
374 | if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES) | |
375 | return -EINVAL; | |
376 | nr_rt_entries = max(nr_rt_entries, ue[i].gsi); | |
377 | } | |
378 | ||
379 | nr_rt_entries += 1; | |
380 | ||
381 | new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head)) | |
382 | + (nr * sizeof(struct kvm_kernel_irq_routing_entry)), | |
383 | GFP_KERNEL); | |
384 | ||
385 | if (!new) | |
386 | return -ENOMEM; | |
387 | ||
388 | new->rt_entries = (void *)&new->map[nr_rt_entries]; | |
389 | ||
390 | new->nr_rt_entries = nr_rt_entries; | |
3e71f88b GN |
391 | for (i = 0; i < 3; i++) |
392 | for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++) | |
393 | new->chip[i][j] = -1; | |
46e624b9 | 394 | |
399ec807 AK |
395 | for (i = 0; i < nr; ++i) { |
396 | r = -EINVAL; | |
399ec807 AK |
397 | if (ue->flags) |
398 | goto out; | |
46e624b9 | 399 | r = setup_routing_entry(new, &new->rt_entries[i], ue); |
399ec807 AK |
400 | if (r) |
401 | goto out; | |
402 | ++ue; | |
399ec807 AK |
403 | } |
404 | ||
fa40a821 | 405 | mutex_lock(&kvm->irq_lock); |
46e624b9 | 406 | old = kvm->irq_routing; |
e42bba90 | 407 | rcu_assign_pointer(kvm->irq_routing, new); |
fa40a821 | 408 | mutex_unlock(&kvm->irq_lock); |
e42bba90 | 409 | synchronize_rcu(); |
399ec807 | 410 | |
46e624b9 | 411 | new = old; |
399ec807 AK |
412 | r = 0; |
413 | ||
414 | out: | |
46e624b9 | 415 | kfree(new); |
399ec807 AK |
416 | return r; |
417 | } | |
418 | ||
419 | #define IOAPIC_ROUTING_ENTRY(irq) \ | |
420 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
421 | .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) } | |
422 | #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq) | |
423 | ||
424 | #ifdef CONFIG_X86 | |
399ec807 AK |
425 | # define PIC_ROUTING_ENTRY(irq) \ |
426 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
427 | .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 } | |
428 | # define ROUTING_ENTRY2(irq) \ | |
429 | IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq) | |
430 | #else | |
431 | # define ROUTING_ENTRY2(irq) \ | |
432 | IOAPIC_ROUTING_ENTRY(irq) | |
433 | #endif | |
434 | ||
435 | static const struct kvm_irq_routing_entry default_routing[] = { | |
436 | ROUTING_ENTRY2(0), ROUTING_ENTRY2(1), | |
437 | ROUTING_ENTRY2(2), ROUTING_ENTRY2(3), | |
438 | ROUTING_ENTRY2(4), ROUTING_ENTRY2(5), | |
439 | ROUTING_ENTRY2(6), ROUTING_ENTRY2(7), | |
440 | ROUTING_ENTRY2(8), ROUTING_ENTRY2(9), | |
441 | ROUTING_ENTRY2(10), ROUTING_ENTRY2(11), | |
442 | ROUTING_ENTRY2(12), ROUTING_ENTRY2(13), | |
443 | ROUTING_ENTRY2(14), ROUTING_ENTRY2(15), | |
444 | ROUTING_ENTRY1(16), ROUTING_ENTRY1(17), | |
445 | ROUTING_ENTRY1(18), ROUTING_ENTRY1(19), | |
446 | ROUTING_ENTRY1(20), ROUTING_ENTRY1(21), | |
447 | ROUTING_ENTRY1(22), ROUTING_ENTRY1(23), | |
448 | #ifdef CONFIG_IA64 | |
449 | ROUTING_ENTRY1(24), ROUTING_ENTRY1(25), | |
450 | ROUTING_ENTRY1(26), ROUTING_ENTRY1(27), | |
451 | ROUTING_ENTRY1(28), ROUTING_ENTRY1(29), | |
452 | ROUTING_ENTRY1(30), ROUTING_ENTRY1(31), | |
453 | ROUTING_ENTRY1(32), ROUTING_ENTRY1(33), | |
454 | ROUTING_ENTRY1(34), ROUTING_ENTRY1(35), | |
455 | ROUTING_ENTRY1(36), ROUTING_ENTRY1(37), | |
456 | ROUTING_ENTRY1(38), ROUTING_ENTRY1(39), | |
457 | ROUTING_ENTRY1(40), ROUTING_ENTRY1(41), | |
458 | ROUTING_ENTRY1(42), ROUTING_ENTRY1(43), | |
459 | ROUTING_ENTRY1(44), ROUTING_ENTRY1(45), | |
460 | ROUTING_ENTRY1(46), ROUTING_ENTRY1(47), | |
461 | #endif | |
462 | }; | |
463 | ||
464 | int kvm_setup_default_irq_routing(struct kvm *kvm) | |
465 | { | |
466 | return kvm_set_irq_routing(kvm, default_routing, | |
467 | ARRAY_SIZE(default_routing), 0); | |
468 | } |