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64a959d6 CD |
1 | /* |
2 | * Copyright (C) 2015, 2016 ARM Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #include <linux/kvm.h> | |
18 | #include <linux/kvm_host.h> | |
8e444745 | 19 | #include <linux/list_sort.h> |
47bbd31f EA |
20 | #include <linux/interrupt.h> |
21 | #include <linux/irq.h> | |
64a959d6 CD |
22 | |
23 | #include "vgic.h" | |
24 | ||
81eeb95d | 25 | #define CREATE_TRACE_POINTS |
35d2d5d4 | 26 | #include "trace.h" |
81eeb95d CD |
27 | |
28 | #ifdef CONFIG_DEBUG_SPINLOCK | |
29 | #define DEBUG_SPINLOCK_BUG_ON(p) BUG_ON(p) | |
30 | #else | |
31 | #define DEBUG_SPINLOCK_BUG_ON(p) | |
32 | #endif | |
33 | ||
63d7c6af AB |
34 | struct vgic_global kvm_vgic_global_state __ro_after_init = { |
35 | .gicv3_cpuif = STATIC_KEY_FALSE_INIT, | |
36 | }; | |
64a959d6 | 37 | |
81eeb95d CD |
38 | /* |
39 | * Locking order is always: | |
abd72296 CD |
40 | * kvm->lock (mutex) |
41 | * its->cmd_lock (mutex) | |
42 | * its->its_lock (mutex) | |
43 | * vgic_cpu->ap_list_lock | |
44 | * kvm->lpi_list_lock | |
45 | * vgic_irq->irq_lock | |
81eeb95d | 46 | * |
424c3383 AP |
47 | * If you need to take multiple locks, always take the upper lock first, |
48 | * then the lower ones, e.g. first take the its_lock, then the irq_lock. | |
49 | * If you are already holding a lock and need to take a higher one, you | |
50 | * have to drop the lower ranking lock first and re-aquire it after having | |
51 | * taken the upper one. | |
81eeb95d CD |
52 | * |
53 | * When taking more than one ap_list_lock at the same time, always take the | |
54 | * lowest numbered VCPU's ap_list_lock first, so: | |
55 | * vcpuX->vcpu_id < vcpuY->vcpu_id: | |
56 | * spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock); | |
57 | * spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock); | |
006df0f3 CD |
58 | * |
59 | * Since the VGIC must support injecting virtual interrupts from ISRs, we have | |
60 | * to use the spin_lock_irqsave/spin_unlock_irqrestore versions of outer | |
61 | * spinlocks for any lock that may be taken while injecting an interrupt. | |
81eeb95d CD |
62 | */ |
63 | ||
3802411d AP |
64 | /* |
65 | * Iterate over the VM's list of mapped LPIs to find the one with a | |
66 | * matching interrupt ID and return a reference to the IRQ structure. | |
67 | */ | |
68 | static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) | |
69 | { | |
70 | struct vgic_dist *dist = &kvm->arch.vgic; | |
71 | struct vgic_irq *irq = NULL; | |
72 | ||
73 | spin_lock(&dist->lpi_list_lock); | |
74 | ||
75 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { | |
76 | if (irq->intid != intid) | |
77 | continue; | |
78 | ||
79 | /* | |
80 | * This increases the refcount, the caller is expected to | |
81 | * call vgic_put_irq() later once it's finished with the IRQ. | |
82 | */ | |
d97594e6 | 83 | vgic_get_irq_kref(irq); |
3802411d AP |
84 | goto out_unlock; |
85 | } | |
86 | irq = NULL; | |
87 | ||
88 | out_unlock: | |
89 | spin_unlock(&dist->lpi_list_lock); | |
90 | ||
91 | return irq; | |
92 | } | |
93 | ||
94 | /* | |
95 | * This looks up the virtual interrupt ID to get the corresponding | |
96 | * struct vgic_irq. It also increases the refcount, so any caller is expected | |
97 | * to call vgic_put_irq() once it's finished with this IRQ. | |
98 | */ | |
64a959d6 CD |
99 | struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, |
100 | u32 intid) | |
101 | { | |
102 | /* SGIs and PPIs */ | |
103 | if (intid <= VGIC_MAX_PRIVATE) | |
104 | return &vcpu->arch.vgic_cpu.private_irqs[intid]; | |
105 | ||
106 | /* SPIs */ | |
107 | if (intid <= VGIC_MAX_SPI) | |
108 | return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; | |
109 | ||
3802411d | 110 | /* LPIs */ |
64a959d6 | 111 | if (intid >= VGIC_MIN_LPI) |
3802411d | 112 | return vgic_get_lpi(kvm, intid); |
64a959d6 CD |
113 | |
114 | WARN(1, "Looking up struct vgic_irq for reserved INTID"); | |
115 | return NULL; | |
116 | } | |
81eeb95d | 117 | |
3802411d AP |
118 | /* |
119 | * We can't do anything in here, because we lack the kvm pointer to | |
120 | * lock and remove the item from the lpi_list. So we keep this function | |
121 | * empty and use the return value of kref_put() to trigger the freeing. | |
122 | */ | |
5dd4b924 AP |
123 | static void vgic_irq_release(struct kref *ref) |
124 | { | |
5dd4b924 AP |
125 | } |
126 | ||
127 | void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq) | |
128 | { | |
2cccbb36 | 129 | struct vgic_dist *dist = &kvm->arch.vgic; |
3802411d | 130 | |
5dd4b924 AP |
131 | if (irq->intid < VGIC_MIN_LPI) |
132 | return; | |
133 | ||
2cccbb36 CD |
134 | spin_lock(&dist->lpi_list_lock); |
135 | if (!kref_put(&irq->refcount, vgic_irq_release)) { | |
136 | spin_unlock(&dist->lpi_list_lock); | |
3802411d | 137 | return; |
2cccbb36 | 138 | }; |
3802411d | 139 | |
3802411d AP |
140 | list_del(&irq->lpi_list); |
141 | dist->lpi_list_count--; | |
142 | spin_unlock(&dist->lpi_list_lock); | |
143 | ||
144 | kfree(irq); | |
5dd4b924 AP |
145 | } |
146 | ||
e40cc57b CD |
147 | /* Get the input level of a mapped IRQ directly from the physical GIC */ |
148 | bool vgic_get_phys_line_level(struct vgic_irq *irq) | |
149 | { | |
150 | bool line_level; | |
151 | ||
152 | BUG_ON(!irq->hw); | |
153 | ||
154 | WARN_ON(irq_get_irqchip_state(irq->host_irq, | |
155 | IRQCHIP_STATE_PENDING, | |
156 | &line_level)); | |
157 | return line_level; | |
158 | } | |
159 | ||
160 | /* Set/Clear the physical active state */ | |
161 | void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active) | |
162 | { | |
163 | ||
164 | BUG_ON(!irq->hw); | |
165 | WARN_ON(irq_set_irqchip_state(irq->host_irq, | |
166 | IRQCHIP_STATE_ACTIVE, | |
167 | active)); | |
168 | } | |
169 | ||
81eeb95d CD |
170 | /** |
171 | * kvm_vgic_target_oracle - compute the target vcpu for an irq | |
172 | * | |
173 | * @irq: The irq to route. Must be already locked. | |
174 | * | |
175 | * Based on the current state of the interrupt (enabled, pending, | |
176 | * active, vcpu and target_vcpu), compute the next vcpu this should be | |
177 | * given to. Return NULL if this shouldn't be injected at all. | |
178 | * | |
179 | * Requires the IRQ lock to be held. | |
180 | */ | |
181 | static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq) | |
182 | { | |
183 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
184 | ||
185 | /* If the interrupt is active, it must stay on the current vcpu */ | |
186 | if (irq->active) | |
187 | return irq->vcpu ? : irq->target_vcpu; | |
188 | ||
189 | /* | |
190 | * If the IRQ is not active but enabled and pending, we should direct | |
191 | * it to its configured target VCPU. | |
192 | * If the distributor is disabled, pending interrupts shouldn't be | |
193 | * forwarded. | |
194 | */ | |
8694e4da | 195 | if (irq->enabled && irq_is_pending(irq)) { |
81eeb95d CD |
196 | if (unlikely(irq->target_vcpu && |
197 | !irq->target_vcpu->kvm->arch.vgic.enabled)) | |
198 | return NULL; | |
199 | ||
200 | return irq->target_vcpu; | |
201 | } | |
202 | ||
203 | /* If neither active nor pending and enabled, then this IRQ should not | |
204 | * be queued to any VCPU. | |
205 | */ | |
206 | return NULL; | |
207 | } | |
208 | ||
8e444745 CD |
209 | /* |
210 | * The order of items in the ap_lists defines how we'll pack things in LRs as | |
211 | * well, the first items in the list being the first things populated in the | |
212 | * LRs. | |
213 | * | |
214 | * A hard rule is that active interrupts can never be pushed out of the LRs | |
215 | * (and therefore take priority) since we cannot reliably trap on deactivation | |
216 | * of IRQs and therefore they have to be present in the LRs. | |
217 | * | |
218 | * Otherwise things should be sorted by the priority field and the GIC | |
219 | * hardware support will take care of preemption of priority groups etc. | |
220 | * | |
221 | * Return negative if "a" sorts before "b", 0 to preserve order, and positive | |
222 | * to sort "b" before "a". | |
223 | */ | |
224 | static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b) | |
225 | { | |
226 | struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list); | |
227 | struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list); | |
228 | bool penda, pendb; | |
229 | int ret; | |
230 | ||
231 | spin_lock(&irqa->irq_lock); | |
232 | spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING); | |
233 | ||
234 | if (irqa->active || irqb->active) { | |
235 | ret = (int)irqb->active - (int)irqa->active; | |
236 | goto out; | |
237 | } | |
238 | ||
8694e4da CD |
239 | penda = irqa->enabled && irq_is_pending(irqa); |
240 | pendb = irqb->enabled && irq_is_pending(irqb); | |
8e444745 CD |
241 | |
242 | if (!penda || !pendb) { | |
243 | ret = (int)pendb - (int)penda; | |
244 | goto out; | |
245 | } | |
246 | ||
247 | /* Both pending and enabled, sort by priority */ | |
248 | ret = irqa->priority - irqb->priority; | |
249 | out: | |
250 | spin_unlock(&irqb->irq_lock); | |
251 | spin_unlock(&irqa->irq_lock); | |
252 | return ret; | |
253 | } | |
254 | ||
255 | /* Must be called with the ap_list_lock held */ | |
256 | static void vgic_sort_ap_list(struct kvm_vcpu *vcpu) | |
257 | { | |
258 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
259 | ||
260 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); | |
261 | ||
262 | list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp); | |
263 | } | |
264 | ||
81eeb95d CD |
265 | /* |
266 | * Only valid injection if changing level for level-triggered IRQs or for a | |
cb3f0ad8 CD |
267 | * rising edge, and in-kernel connected IRQ lines can only be controlled by |
268 | * their owner. | |
81eeb95d | 269 | */ |
cb3f0ad8 | 270 | static bool vgic_validate_injection(struct vgic_irq *irq, bool level, void *owner) |
81eeb95d | 271 | { |
cb3f0ad8 CD |
272 | if (irq->owner != owner) |
273 | return false; | |
274 | ||
81eeb95d CD |
275 | switch (irq->config) { |
276 | case VGIC_CONFIG_LEVEL: | |
277 | return irq->line_level != level; | |
278 | case VGIC_CONFIG_EDGE: | |
279 | return level; | |
280 | } | |
281 | ||
282 | return false; | |
283 | } | |
284 | ||
285 | /* | |
286 | * Check whether an IRQ needs to (and can) be queued to a VCPU's ap list. | |
287 | * Do the queuing if necessary, taking the right locks in the right order. | |
288 | * Returns true when the IRQ was queued, false otherwise. | |
289 | * | |
290 | * Needs to be entered with the IRQ lock already held, but will return | |
291 | * with all locks dropped. | |
292 | */ | |
006df0f3 CD |
293 | bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, |
294 | unsigned long flags) | |
81eeb95d CD |
295 | { |
296 | struct kvm_vcpu *vcpu; | |
297 | ||
298 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
299 | ||
300 | retry: | |
301 | vcpu = vgic_target_oracle(irq); | |
302 | if (irq->vcpu || !vcpu) { | |
303 | /* | |
304 | * If this IRQ is already on a VCPU's ap_list, then it | |
305 | * cannot be moved or modified and there is no more work for | |
306 | * us to do. | |
307 | * | |
308 | * Otherwise, if the irq is not pending and enabled, it does | |
309 | * not need to be inserted into an ap_list and there is also | |
310 | * no more work for us to do. | |
311 | */ | |
006df0f3 | 312 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
d42c7970 SWL |
313 | |
314 | /* | |
315 | * We have to kick the VCPU here, because we could be | |
316 | * queueing an edge-triggered interrupt for which we | |
317 | * get no EOI maintenance interrupt. In that case, | |
318 | * while the IRQ is already on the VCPU's AP list, the | |
319 | * VCPU could have EOI'ed the original interrupt and | |
320 | * won't see this one until it exits for some other | |
321 | * reason. | |
322 | */ | |
325f9c64 AJ |
323 | if (vcpu) { |
324 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); | |
d42c7970 | 325 | kvm_vcpu_kick(vcpu); |
325f9c64 | 326 | } |
81eeb95d CD |
327 | return false; |
328 | } | |
329 | ||
330 | /* | |
331 | * We must unlock the irq lock to take the ap_list_lock where | |
332 | * we are going to insert this new pending interrupt. | |
333 | */ | |
006df0f3 | 334 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
81eeb95d CD |
335 | |
336 | /* someone can do stuff here, which we re-check below */ | |
337 | ||
006df0f3 | 338 | spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d CD |
339 | spin_lock(&irq->irq_lock); |
340 | ||
341 | /* | |
342 | * Did something change behind our backs? | |
343 | * | |
344 | * There are two cases: | |
345 | * 1) The irq lost its pending state or was disabled behind our | |
346 | * backs and/or it was queued to another VCPU's ap_list. | |
347 | * 2) Someone changed the affinity on this irq behind our | |
348 | * backs and we are now holding the wrong ap_list_lock. | |
349 | * | |
350 | * In both cases, drop the locks and retry. | |
351 | */ | |
352 | ||
353 | if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) { | |
354 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 355 | spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d | 356 | |
006df0f3 | 357 | spin_lock_irqsave(&irq->irq_lock, flags); |
81eeb95d CD |
358 | goto retry; |
359 | } | |
360 | ||
5dd4b924 AP |
361 | /* |
362 | * Grab a reference to the irq to reflect the fact that it is | |
363 | * now in the ap_list. | |
364 | */ | |
365 | vgic_get_irq_kref(irq); | |
81eeb95d CD |
366 | list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head); |
367 | irq->vcpu = vcpu; | |
368 | ||
369 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 370 | spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d | 371 | |
325f9c64 | 372 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); |
81eeb95d CD |
373 | kvm_vcpu_kick(vcpu); |
374 | ||
375 | return true; | |
376 | } | |
377 | ||
11710dec CD |
378 | /** |
379 | * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic | |
380 | * @kvm: The VM structure pointer | |
381 | * @cpuid: The CPU for PPIs | |
382 | * @intid: The INTID to inject a new state to. | |
383 | * @level: Edge-triggered: true: to trigger the interrupt | |
384 | * false: to ignore the call | |
385 | * Level-sensitive true: raise the input signal | |
386 | * false: lower the input signal | |
cb3f0ad8 CD |
387 | * @owner: The opaque pointer to the owner of the IRQ being raised to verify |
388 | * that the caller is allowed to inject this IRQ. Userspace | |
389 | * injections will have owner == NULL. | |
11710dec CD |
390 | * |
391 | * The VGIC is not concerned with devices being active-LOW or active-HIGH for | |
392 | * level-sensitive interrupts. You can think of the level parameter as 1 | |
393 | * being HIGH and 0 being LOW and all devices being active-HIGH. | |
394 | */ | |
395 | int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid, | |
cb3f0ad8 | 396 | bool level, void *owner) |
81eeb95d CD |
397 | { |
398 | struct kvm_vcpu *vcpu; | |
399 | struct vgic_irq *irq; | |
006df0f3 | 400 | unsigned long flags; |
81eeb95d CD |
401 | int ret; |
402 | ||
403 | trace_vgic_update_irq_pending(cpuid, intid, level); | |
404 | ||
ad275b8b EA |
405 | ret = vgic_lazy_init(kvm); |
406 | if (ret) | |
407 | return ret; | |
408 | ||
81eeb95d CD |
409 | vcpu = kvm_get_vcpu(kvm, cpuid); |
410 | if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS) | |
411 | return -EINVAL; | |
412 | ||
413 | irq = vgic_get_irq(kvm, vcpu, intid); | |
414 | if (!irq) | |
415 | return -EINVAL; | |
416 | ||
006df0f3 | 417 | spin_lock_irqsave(&irq->irq_lock, flags); |
81eeb95d | 418 | |
cb3f0ad8 | 419 | if (!vgic_validate_injection(irq, level, owner)) { |
81eeb95d | 420 | /* Nothing to see here, move along... */ |
006df0f3 | 421 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 422 | vgic_put_irq(kvm, irq); |
81eeb95d CD |
423 | return 0; |
424 | } | |
425 | ||
8694e4da | 426 | if (irq->config == VGIC_CONFIG_LEVEL) |
81eeb95d | 427 | irq->line_level = level; |
8694e4da CD |
428 | else |
429 | irq->pending_latch = true; | |
81eeb95d | 430 | |
006df0f3 | 431 | vgic_queue_irq_unlock(kvm, irq, flags); |
5dd4b924 | 432 | vgic_put_irq(kvm, irq); |
81eeb95d CD |
433 | |
434 | return 0; | |
435 | } | |
436 | ||
47bbd31f EA |
437 | /* @irq->irq_lock must be held */ |
438 | static int kvm_vgic_map_irq(struct kvm_vcpu *vcpu, struct vgic_irq *irq, | |
439 | unsigned int host_irq) | |
568e8c90 | 440 | { |
47bbd31f EA |
441 | struct irq_desc *desc; |
442 | struct irq_data *data; | |
443 | ||
444 | /* | |
445 | * Find the physical IRQ number corresponding to @host_irq | |
446 | */ | |
447 | desc = irq_to_desc(host_irq); | |
448 | if (!desc) { | |
449 | kvm_err("%s: no interrupt descriptor\n", __func__); | |
450 | return -EINVAL; | |
451 | } | |
452 | data = irq_desc_get_irq_data(desc); | |
453 | while (data->parent_data) | |
454 | data = data->parent_data; | |
455 | ||
456 | irq->hw = true; | |
457 | irq->host_irq = host_irq; | |
458 | irq->hwintid = data->hwirq; | |
459 | return 0; | |
460 | } | |
461 | ||
462 | /* @irq->irq_lock must be held */ | |
463 | static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq) | |
464 | { | |
465 | irq->hw = false; | |
466 | irq->hwintid = 0; | |
467 | } | |
468 | ||
469 | int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, | |
470 | u32 vintid) | |
471 | { | |
472 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
006df0f3 | 473 | unsigned long flags; |
47bbd31f | 474 | int ret; |
568e8c90 AP |
475 | |
476 | BUG_ON(!irq); | |
477 | ||
006df0f3 | 478 | spin_lock_irqsave(&irq->irq_lock, flags); |
47bbd31f | 479 | ret = kvm_vgic_map_irq(vcpu, irq, host_irq); |
006df0f3 | 480 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 481 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 | 482 | |
47bbd31f | 483 | return ret; |
568e8c90 AP |
484 | } |
485 | ||
47bbd31f | 486 | int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) |
568e8c90 | 487 | { |
5dd4b924 | 488 | struct vgic_irq *irq; |
006df0f3 | 489 | unsigned long flags; |
568e8c90 AP |
490 | |
491 | if (!vgic_initialized(vcpu->kvm)) | |
492 | return -EAGAIN; | |
493 | ||
47bbd31f | 494 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
5dd4b924 AP |
495 | BUG_ON(!irq); |
496 | ||
006df0f3 | 497 | spin_lock_irqsave(&irq->irq_lock, flags); |
47bbd31f | 498 | kvm_vgic_unmap_irq(irq); |
006df0f3 | 499 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 500 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 AP |
501 | |
502 | return 0; | |
503 | } | |
504 | ||
c6ccd30e CD |
505 | /** |
506 | * kvm_vgic_set_owner - Set the owner of an interrupt for a VM | |
507 | * | |
508 | * @vcpu: Pointer to the VCPU (used for PPIs) | |
509 | * @intid: The virtual INTID identifying the interrupt (PPI or SPI) | |
510 | * @owner: Opaque pointer to the owner | |
511 | * | |
512 | * Returns 0 if intid is not already used by another in-kernel device and the | |
513 | * owner is set, otherwise returns an error code. | |
514 | */ | |
515 | int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) | |
516 | { | |
517 | struct vgic_irq *irq; | |
7465894e | 518 | unsigned long flags; |
c6ccd30e CD |
519 | int ret = 0; |
520 | ||
521 | if (!vgic_initialized(vcpu->kvm)) | |
522 | return -EAGAIN; | |
523 | ||
524 | /* SGIs and LPIs cannot be wired up to any device */ | |
525 | if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid)) | |
526 | return -EINVAL; | |
527 | ||
528 | irq = vgic_get_irq(vcpu->kvm, vcpu, intid); | |
7465894e | 529 | spin_lock_irqsave(&irq->irq_lock, flags); |
c6ccd30e CD |
530 | if (irq->owner && irq->owner != owner) |
531 | ret = -EEXIST; | |
532 | else | |
533 | irq->owner = owner; | |
7465894e | 534 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
c6ccd30e CD |
535 | |
536 | return ret; | |
537 | } | |
538 | ||
0919e84c MZ |
539 | /** |
540 | * vgic_prune_ap_list - Remove non-relevant interrupts from the list | |
541 | * | |
542 | * @vcpu: The VCPU pointer | |
543 | * | |
544 | * Go over the list of "interesting" interrupts, and prune those that we | |
545 | * won't have to consider in the near future. | |
546 | */ | |
547 | static void vgic_prune_ap_list(struct kvm_vcpu *vcpu) | |
548 | { | |
549 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
550 | struct vgic_irq *irq, *tmp; | |
006df0f3 | 551 | unsigned long flags; |
0919e84c MZ |
552 | |
553 | retry: | |
006df0f3 | 554 | spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
555 | |
556 | list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) { | |
557 | struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB; | |
558 | ||
559 | spin_lock(&irq->irq_lock); | |
560 | ||
561 | BUG_ON(vcpu != irq->vcpu); | |
562 | ||
563 | target_vcpu = vgic_target_oracle(irq); | |
564 | ||
565 | if (!target_vcpu) { | |
566 | /* | |
567 | * We don't need to process this interrupt any | |
568 | * further, move it off the list. | |
569 | */ | |
570 | list_del(&irq->ap_list); | |
571 | irq->vcpu = NULL; | |
572 | spin_unlock(&irq->irq_lock); | |
5dd4b924 AP |
573 | |
574 | /* | |
575 | * This vgic_put_irq call matches the | |
576 | * vgic_get_irq_kref in vgic_queue_irq_unlock, | |
577 | * where we added the LPI to the ap_list. As | |
578 | * we remove the irq from the list, we drop | |
579 | * also drop the refcount. | |
580 | */ | |
581 | vgic_put_irq(vcpu->kvm, irq); | |
0919e84c MZ |
582 | continue; |
583 | } | |
584 | ||
585 | if (target_vcpu == vcpu) { | |
586 | /* We're on the right CPU */ | |
587 | spin_unlock(&irq->irq_lock); | |
588 | continue; | |
589 | } | |
590 | ||
591 | /* This interrupt looks like it has to be migrated. */ | |
592 | ||
593 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 594 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
595 | |
596 | /* | |
597 | * Ensure locking order by always locking the smallest | |
598 | * ID first. | |
599 | */ | |
600 | if (vcpu->vcpu_id < target_vcpu->vcpu_id) { | |
601 | vcpuA = vcpu; | |
602 | vcpuB = target_vcpu; | |
603 | } else { | |
604 | vcpuA = target_vcpu; | |
605 | vcpuB = vcpu; | |
606 | } | |
607 | ||
006df0f3 | 608 | spin_lock_irqsave(&vcpuA->arch.vgic_cpu.ap_list_lock, flags); |
0919e84c MZ |
609 | spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock, |
610 | SINGLE_DEPTH_NESTING); | |
611 | spin_lock(&irq->irq_lock); | |
612 | ||
613 | /* | |
614 | * If the affinity has been preserved, move the | |
615 | * interrupt around. Otherwise, it means things have | |
616 | * changed while the interrupt was unlocked, and we | |
617 | * need to replay this. | |
618 | * | |
619 | * In all cases, we cannot trust the list not to have | |
620 | * changed, so we restart from the beginning. | |
621 | */ | |
622 | if (target_vcpu == vgic_target_oracle(irq)) { | |
623 | struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu; | |
624 | ||
625 | list_del(&irq->ap_list); | |
626 | irq->vcpu = target_vcpu; | |
627 | list_add_tail(&irq->ap_list, &new_cpu->ap_list_head); | |
628 | } | |
629 | ||
630 | spin_unlock(&irq->irq_lock); | |
631 | spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock); | |
006df0f3 | 632 | spin_unlock_irqrestore(&vcpuA->arch.vgic_cpu.ap_list_lock, flags); |
0919e84c MZ |
633 | goto retry; |
634 | } | |
635 | ||
006df0f3 | 636 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
637 | } |
638 | ||
0919e84c MZ |
639 | static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu) |
640 | { | |
59529f69 MZ |
641 | if (kvm_vgic_global_state.type == VGIC_V2) |
642 | vgic_v2_fold_lr_state(vcpu); | |
643 | else | |
644 | vgic_v3_fold_lr_state(vcpu); | |
0919e84c MZ |
645 | } |
646 | ||
647 | /* Requires the irq_lock to be held. */ | |
648 | static inline void vgic_populate_lr(struct kvm_vcpu *vcpu, | |
649 | struct vgic_irq *irq, int lr) | |
650 | { | |
651 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
140b086d | 652 | |
59529f69 MZ |
653 | if (kvm_vgic_global_state.type == VGIC_V2) |
654 | vgic_v2_populate_lr(vcpu, irq, lr); | |
655 | else | |
656 | vgic_v3_populate_lr(vcpu, irq, lr); | |
0919e84c MZ |
657 | } |
658 | ||
659 | static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr) | |
660 | { | |
59529f69 MZ |
661 | if (kvm_vgic_global_state.type == VGIC_V2) |
662 | vgic_v2_clear_lr(vcpu, lr); | |
663 | else | |
664 | vgic_v3_clear_lr(vcpu, lr); | |
0919e84c MZ |
665 | } |
666 | ||
667 | static inline void vgic_set_underflow(struct kvm_vcpu *vcpu) | |
668 | { | |
59529f69 MZ |
669 | if (kvm_vgic_global_state.type == VGIC_V2) |
670 | vgic_v2_set_underflow(vcpu); | |
671 | else | |
672 | vgic_v3_set_underflow(vcpu); | |
0919e84c MZ |
673 | } |
674 | ||
675 | /* Requires the ap_list_lock to be held. */ | |
676 | static int compute_ap_list_depth(struct kvm_vcpu *vcpu) | |
677 | { | |
678 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
679 | struct vgic_irq *irq; | |
680 | int count = 0; | |
681 | ||
682 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); | |
683 | ||
684 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { | |
685 | spin_lock(&irq->irq_lock); | |
686 | /* GICv2 SGIs can count for more than one... */ | |
687 | if (vgic_irq_is_sgi(irq->intid) && irq->source) | |
688 | count += hweight8(irq->source); | |
689 | else | |
690 | count++; | |
691 | spin_unlock(&irq->irq_lock); | |
692 | } | |
693 | return count; | |
694 | } | |
695 | ||
696 | /* Requires the VCPU's ap_list_lock to be held. */ | |
697 | static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) | |
698 | { | |
699 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
700 | struct vgic_irq *irq; | |
701 | int count = 0; | |
702 | ||
703 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); | |
704 | ||
90cac1f5 | 705 | if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr) |
0919e84c | 706 | vgic_sort_ap_list(vcpu); |
0919e84c MZ |
707 | |
708 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { | |
709 | spin_lock(&irq->irq_lock); | |
710 | ||
711 | if (unlikely(vgic_target_oracle(irq) != vcpu)) | |
712 | goto next; | |
713 | ||
714 | /* | |
715 | * If we get an SGI with multiple sources, try to get | |
716 | * them in all at once. | |
717 | */ | |
718 | do { | |
719 | vgic_populate_lr(vcpu, irq, count++); | |
720 | } while (irq->source && count < kvm_vgic_global_state.nr_lr); | |
721 | ||
722 | next: | |
723 | spin_unlock(&irq->irq_lock); | |
724 | ||
90cac1f5 CD |
725 | if (count == kvm_vgic_global_state.nr_lr) { |
726 | if (!list_is_last(&irq->ap_list, | |
727 | &vgic_cpu->ap_list_head)) | |
728 | vgic_set_underflow(vcpu); | |
0919e84c | 729 | break; |
90cac1f5 | 730 | } |
0919e84c MZ |
731 | } |
732 | ||
733 | vcpu->arch.vgic_cpu.used_lrs = count; | |
734 | ||
735 | /* Nuke remaining LRs */ | |
736 | for ( ; count < kvm_vgic_global_state.nr_lr; count++) | |
737 | vgic_clear_lr(vcpu, count); | |
738 | } | |
739 | ||
740 | /* Sync back the hardware VGIC state into our emulation after a guest's run. */ | |
741 | void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) | |
742 | { | |
f6769581 SWL |
743 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
744 | ||
62775797 MZ |
745 | WARN_ON(vgic_v4_sync_hwstate(vcpu)); |
746 | ||
8ac76ef4 CD |
747 | /* An empty ap_list_head implies used_lrs == 0 */ |
748 | if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) | |
0099b770 CD |
749 | return; |
750 | ||
8ac76ef4 CD |
751 | if (vgic_cpu->used_lrs) |
752 | vgic_fold_lr_state(vcpu); | |
0919e84c MZ |
753 | vgic_prune_ap_list(vcpu); |
754 | } | |
755 | ||
756 | /* Flush our emulation state into the GIC hardware before entering the guest. */ | |
757 | void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) | |
758 | { | |
62775797 MZ |
759 | WARN_ON(vgic_v4_flush_hwstate(vcpu)); |
760 | ||
f6769581 SWL |
761 | /* |
762 | * If there are no virtual interrupts active or pending for this | |
763 | * VCPU, then there is no work to do and we can bail out without | |
764 | * taking any lock. There is a potential race with someone injecting | |
765 | * interrupts to the VCPU, but it is a benign race as the VCPU will | |
766 | * either observe the new interrupt before or after doing this check, | |
767 | * and introducing additional synchronization mechanism doesn't change | |
768 | * this. | |
769 | */ | |
770 | if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) | |
0099b770 CD |
771 | return; |
772 | ||
006df0f3 CD |
773 | DEBUG_SPINLOCK_BUG_ON(!irqs_disabled()); |
774 | ||
0919e84c MZ |
775 | spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock); |
776 | vgic_flush_lr_state(vcpu); | |
777 | spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
778 | } | |
90eee56c | 779 | |
328e5664 CD |
780 | void kvm_vgic_load(struct kvm_vcpu *vcpu) |
781 | { | |
782 | if (unlikely(!vgic_initialized(vcpu->kvm))) | |
783 | return; | |
784 | ||
785 | if (kvm_vgic_global_state.type == VGIC_V2) | |
786 | vgic_v2_load(vcpu); | |
787 | else | |
788 | vgic_v3_load(vcpu); | |
789 | } | |
790 | ||
791 | void kvm_vgic_put(struct kvm_vcpu *vcpu) | |
792 | { | |
793 | if (unlikely(!vgic_initialized(vcpu->kvm))) | |
794 | return; | |
795 | ||
796 | if (kvm_vgic_global_state.type == VGIC_V2) | |
797 | vgic_v2_put(vcpu); | |
798 | else | |
799 | vgic_v3_put(vcpu); | |
800 | } | |
801 | ||
90eee56c EA |
802 | int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) |
803 | { | |
804 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
805 | struct vgic_irq *irq; | |
806 | bool pending = false; | |
006df0f3 | 807 | unsigned long flags; |
90eee56c EA |
808 | |
809 | if (!vcpu->kvm->arch.vgic.enabled) | |
810 | return false; | |
811 | ||
c9719680 MZ |
812 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last) |
813 | return true; | |
814 | ||
006df0f3 | 815 | spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); |
90eee56c EA |
816 | |
817 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { | |
818 | spin_lock(&irq->irq_lock); | |
8694e4da | 819 | pending = irq_is_pending(irq) && irq->enabled; |
90eee56c EA |
820 | spin_unlock(&irq->irq_lock); |
821 | ||
822 | if (pending) | |
823 | break; | |
824 | } | |
825 | ||
006df0f3 | 826 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
90eee56c EA |
827 | |
828 | return pending; | |
829 | } | |
2b0cda87 MZ |
830 | |
831 | void vgic_kick_vcpus(struct kvm *kvm) | |
832 | { | |
833 | struct kvm_vcpu *vcpu; | |
834 | int c; | |
835 | ||
836 | /* | |
837 | * We've injected an interrupt, time to find out who deserves | |
838 | * a good kick... | |
839 | */ | |
840 | kvm_for_each_vcpu(c, vcpu, kvm) { | |
325f9c64 AJ |
841 | if (kvm_vgic_vcpu_pending_irq(vcpu)) { |
842 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); | |
2b0cda87 | 843 | kvm_vcpu_kick(vcpu); |
325f9c64 | 844 | } |
2b0cda87 MZ |
845 | } |
846 | } | |
568e8c90 | 847 | |
47bbd31f | 848 | bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid) |
568e8c90 | 849 | { |
285a90e3 | 850 | struct vgic_irq *irq; |
568e8c90 | 851 | bool map_is_active; |
006df0f3 | 852 | unsigned long flags; |
568e8c90 | 853 | |
f39d16cb CD |
854 | if (!vgic_initialized(vcpu->kvm)) |
855 | return false; | |
856 | ||
285a90e3 | 857 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
006df0f3 | 858 | spin_lock_irqsave(&irq->irq_lock, flags); |
568e8c90 | 859 | map_is_active = irq->hw && irq->active; |
006df0f3 | 860 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 861 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 AP |
862 | |
863 | return map_is_active; | |
864 | } | |
0e4e82f1 | 865 |