KVM: arm/arm64: vgic: Fix source vcpu issues for GICv2 SGI
[linux-2.6-block.git] / virt / kvm / arm / vgic / vgic.c
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1/*
2 * Copyright (C) 2015, 2016 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/kvm.h>
18#include <linux/kvm_host.h>
8e444745 19#include <linux/list_sort.h>
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20#include <linux/interrupt.h>
21#include <linux/irq.h>
771621b0 22#include <asm/kvm_hyp.h>
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23
24#include "vgic.h"
25
81eeb95d 26#define CREATE_TRACE_POINTS
35d2d5d4 27#include "trace.h"
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28
29#ifdef CONFIG_DEBUG_SPINLOCK
30#define DEBUG_SPINLOCK_BUG_ON(p) BUG_ON(p)
31#else
32#define DEBUG_SPINLOCK_BUG_ON(p)
33#endif
34
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35struct vgic_global kvm_vgic_global_state __ro_after_init = {
36 .gicv3_cpuif = STATIC_KEY_FALSE_INIT,
37};
64a959d6 38
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39/*
40 * Locking order is always:
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41 * kvm->lock (mutex)
42 * its->cmd_lock (mutex)
43 * its->its_lock (mutex)
44 * vgic_cpu->ap_list_lock
45 * kvm->lpi_list_lock
46 * vgic_irq->irq_lock
81eeb95d 47 *
424c3383
AP
48 * If you need to take multiple locks, always take the upper lock first,
49 * then the lower ones, e.g. first take the its_lock, then the irq_lock.
50 * If you are already holding a lock and need to take a higher one, you
51 * have to drop the lower ranking lock first and re-aquire it after having
52 * taken the upper one.
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53 *
54 * When taking more than one ap_list_lock at the same time, always take the
55 * lowest numbered VCPU's ap_list_lock first, so:
56 * vcpuX->vcpu_id < vcpuY->vcpu_id:
57 * spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock);
58 * spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock);
006df0f3
CD
59 *
60 * Since the VGIC must support injecting virtual interrupts from ISRs, we have
61 * to use the spin_lock_irqsave/spin_unlock_irqrestore versions of outer
62 * spinlocks for any lock that may be taken while injecting an interrupt.
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63 */
64
3802411d
AP
65/*
66 * Iterate over the VM's list of mapped LPIs to find the one with a
67 * matching interrupt ID and return a reference to the IRQ structure.
68 */
69static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)
70{
71 struct vgic_dist *dist = &kvm->arch.vgic;
72 struct vgic_irq *irq = NULL;
73
74 spin_lock(&dist->lpi_list_lock);
75
76 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
77 if (irq->intid != intid)
78 continue;
79
80 /*
81 * This increases the refcount, the caller is expected to
82 * call vgic_put_irq() later once it's finished with the IRQ.
83 */
d97594e6 84 vgic_get_irq_kref(irq);
3802411d
AP
85 goto out_unlock;
86 }
87 irq = NULL;
88
89out_unlock:
90 spin_unlock(&dist->lpi_list_lock);
91
92 return irq;
93}
94
95/*
96 * This looks up the virtual interrupt ID to get the corresponding
97 * struct vgic_irq. It also increases the refcount, so any caller is expected
98 * to call vgic_put_irq() once it's finished with this IRQ.
99 */
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100struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
101 u32 intid)
102{
103 /* SGIs and PPIs */
104 if (intid <= VGIC_MAX_PRIVATE)
105 return &vcpu->arch.vgic_cpu.private_irqs[intid];
106
107 /* SPIs */
108 if (intid <= VGIC_MAX_SPI)
109 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];
110
3802411d 111 /* LPIs */
64a959d6 112 if (intid >= VGIC_MIN_LPI)
3802411d 113 return vgic_get_lpi(kvm, intid);
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114
115 WARN(1, "Looking up struct vgic_irq for reserved INTID");
116 return NULL;
117}
81eeb95d 118
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AP
119/*
120 * We can't do anything in here, because we lack the kvm pointer to
121 * lock and remove the item from the lpi_list. So we keep this function
122 * empty and use the return value of kref_put() to trigger the freeing.
123 */
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AP
124static void vgic_irq_release(struct kref *ref)
125{
5dd4b924
AP
126}
127
128void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
129{
2cccbb36 130 struct vgic_dist *dist = &kvm->arch.vgic;
3802411d 131
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AP
132 if (irq->intid < VGIC_MIN_LPI)
133 return;
134
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CD
135 spin_lock(&dist->lpi_list_lock);
136 if (!kref_put(&irq->refcount, vgic_irq_release)) {
137 spin_unlock(&dist->lpi_list_lock);
3802411d 138 return;
2cccbb36 139 };
3802411d 140
3802411d
AP
141 list_del(&irq->lpi_list);
142 dist->lpi_list_count--;
143 spin_unlock(&dist->lpi_list_lock);
144
145 kfree(irq);
5dd4b924
AP
146}
147
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148void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending)
149{
150 WARN_ON(irq_set_irqchip_state(irq->host_irq,
151 IRQCHIP_STATE_PENDING,
152 pending));
153}
154
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155bool vgic_get_phys_line_level(struct vgic_irq *irq)
156{
157 bool line_level;
158
159 BUG_ON(!irq->hw);
160
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161 if (irq->get_input_level)
162 return irq->get_input_level(irq->intid);
163
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164 WARN_ON(irq_get_irqchip_state(irq->host_irq,
165 IRQCHIP_STATE_PENDING,
166 &line_level));
167 return line_level;
168}
169
170/* Set/Clear the physical active state */
171void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active)
172{
173
174 BUG_ON(!irq->hw);
175 WARN_ON(irq_set_irqchip_state(irq->host_irq,
176 IRQCHIP_STATE_ACTIVE,
177 active));
178}
179
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180/**
181 * kvm_vgic_target_oracle - compute the target vcpu for an irq
182 *
183 * @irq: The irq to route. Must be already locked.
184 *
185 * Based on the current state of the interrupt (enabled, pending,
186 * active, vcpu and target_vcpu), compute the next vcpu this should be
187 * given to. Return NULL if this shouldn't be injected at all.
188 *
189 * Requires the IRQ lock to be held.
190 */
191static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq)
192{
193 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
194
195 /* If the interrupt is active, it must stay on the current vcpu */
196 if (irq->active)
197 return irq->vcpu ? : irq->target_vcpu;
198
199 /*
200 * If the IRQ is not active but enabled and pending, we should direct
201 * it to its configured target VCPU.
202 * If the distributor is disabled, pending interrupts shouldn't be
203 * forwarded.
204 */
8694e4da 205 if (irq->enabled && irq_is_pending(irq)) {
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206 if (unlikely(irq->target_vcpu &&
207 !irq->target_vcpu->kvm->arch.vgic.enabled))
208 return NULL;
209
210 return irq->target_vcpu;
211 }
212
213 /* If neither active nor pending and enabled, then this IRQ should not
214 * be queued to any VCPU.
215 */
216 return NULL;
217}
218
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CD
219/*
220 * The order of items in the ap_lists defines how we'll pack things in LRs as
221 * well, the first items in the list being the first things populated in the
222 * LRs.
223 *
224 * A hard rule is that active interrupts can never be pushed out of the LRs
225 * (and therefore take priority) since we cannot reliably trap on deactivation
226 * of IRQs and therefore they have to be present in the LRs.
227 *
228 * Otherwise things should be sorted by the priority field and the GIC
229 * hardware support will take care of preemption of priority groups etc.
230 *
231 * Return negative if "a" sorts before "b", 0 to preserve order, and positive
232 * to sort "b" before "a".
233 */
234static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b)
235{
236 struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list);
237 struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list);
238 bool penda, pendb;
239 int ret;
240
241 spin_lock(&irqa->irq_lock);
242 spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING);
243
244 if (irqa->active || irqb->active) {
245 ret = (int)irqb->active - (int)irqa->active;
246 goto out;
247 }
248
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249 penda = irqa->enabled && irq_is_pending(irqa);
250 pendb = irqb->enabled && irq_is_pending(irqb);
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251
252 if (!penda || !pendb) {
253 ret = (int)pendb - (int)penda;
254 goto out;
255 }
256
257 /* Both pending and enabled, sort by priority */
258 ret = irqa->priority - irqb->priority;
259out:
260 spin_unlock(&irqb->irq_lock);
261 spin_unlock(&irqa->irq_lock);
262 return ret;
263}
264
265/* Must be called with the ap_list_lock held */
266static void vgic_sort_ap_list(struct kvm_vcpu *vcpu)
267{
268 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
269
270 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
271
272 list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp);
273}
274
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275/*
276 * Only valid injection if changing level for level-triggered IRQs or for a
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277 * rising edge, and in-kernel connected IRQ lines can only be controlled by
278 * their owner.
81eeb95d 279 */
cb3f0ad8 280static bool vgic_validate_injection(struct vgic_irq *irq, bool level, void *owner)
81eeb95d 281{
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CD
282 if (irq->owner != owner)
283 return false;
284
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285 switch (irq->config) {
286 case VGIC_CONFIG_LEVEL:
287 return irq->line_level != level;
288 case VGIC_CONFIG_EDGE:
289 return level;
290 }
291
292 return false;
293}
294
295/*
296 * Check whether an IRQ needs to (and can) be queued to a VCPU's ap list.
297 * Do the queuing if necessary, taking the right locks in the right order.
298 * Returns true when the IRQ was queued, false otherwise.
299 *
300 * Needs to be entered with the IRQ lock already held, but will return
301 * with all locks dropped.
302 */
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303bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
304 unsigned long flags)
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CD
305{
306 struct kvm_vcpu *vcpu;
307
308 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
309
310retry:
311 vcpu = vgic_target_oracle(irq);
312 if (irq->vcpu || !vcpu) {
313 /*
314 * If this IRQ is already on a VCPU's ap_list, then it
315 * cannot be moved or modified and there is no more work for
316 * us to do.
317 *
318 * Otherwise, if the irq is not pending and enabled, it does
319 * not need to be inserted into an ap_list and there is also
320 * no more work for us to do.
321 */
006df0f3 322 spin_unlock_irqrestore(&irq->irq_lock, flags);
d42c7970
SWL
323
324 /*
325 * We have to kick the VCPU here, because we could be
326 * queueing an edge-triggered interrupt for which we
327 * get no EOI maintenance interrupt. In that case,
328 * while the IRQ is already on the VCPU's AP list, the
329 * VCPU could have EOI'ed the original interrupt and
330 * won't see this one until it exits for some other
331 * reason.
332 */
325f9c64
AJ
333 if (vcpu) {
334 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
d42c7970 335 kvm_vcpu_kick(vcpu);
325f9c64 336 }
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337 return false;
338 }
339
340 /*
341 * We must unlock the irq lock to take the ap_list_lock where
342 * we are going to insert this new pending interrupt.
343 */
006df0f3 344 spin_unlock_irqrestore(&irq->irq_lock, flags);
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345
346 /* someone can do stuff here, which we re-check below */
347
006df0f3 348 spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags);
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349 spin_lock(&irq->irq_lock);
350
351 /*
352 * Did something change behind our backs?
353 *
354 * There are two cases:
355 * 1) The irq lost its pending state or was disabled behind our
356 * backs and/or it was queued to another VCPU's ap_list.
357 * 2) Someone changed the affinity on this irq behind our
358 * backs and we are now holding the wrong ap_list_lock.
359 *
360 * In both cases, drop the locks and retry.
361 */
362
363 if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) {
364 spin_unlock(&irq->irq_lock);
006df0f3 365 spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags);
81eeb95d 366
006df0f3 367 spin_lock_irqsave(&irq->irq_lock, flags);
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CD
368 goto retry;
369 }
370
5dd4b924
AP
371 /*
372 * Grab a reference to the irq to reflect the fact that it is
373 * now in the ap_list.
374 */
375 vgic_get_irq_kref(irq);
81eeb95d
CD
376 list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head);
377 irq->vcpu = vcpu;
378
379 spin_unlock(&irq->irq_lock);
006df0f3 380 spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags);
81eeb95d 381
325f9c64 382 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
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CD
383 kvm_vcpu_kick(vcpu);
384
385 return true;
386}
387
11710dec
CD
388/**
389 * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
390 * @kvm: The VM structure pointer
391 * @cpuid: The CPU for PPIs
392 * @intid: The INTID to inject a new state to.
393 * @level: Edge-triggered: true: to trigger the interrupt
394 * false: to ignore the call
395 * Level-sensitive true: raise the input signal
396 * false: lower the input signal
cb3f0ad8
CD
397 * @owner: The opaque pointer to the owner of the IRQ being raised to verify
398 * that the caller is allowed to inject this IRQ. Userspace
399 * injections will have owner == NULL.
11710dec
CD
400 *
401 * The VGIC is not concerned with devices being active-LOW or active-HIGH for
402 * level-sensitive interrupts. You can think of the level parameter as 1
403 * being HIGH and 0 being LOW and all devices being active-HIGH.
404 */
405int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
cb3f0ad8 406 bool level, void *owner)
81eeb95d
CD
407{
408 struct kvm_vcpu *vcpu;
409 struct vgic_irq *irq;
006df0f3 410 unsigned long flags;
81eeb95d
CD
411 int ret;
412
413 trace_vgic_update_irq_pending(cpuid, intid, level);
414
ad275b8b
EA
415 ret = vgic_lazy_init(kvm);
416 if (ret)
417 return ret;
418
81eeb95d
CD
419 vcpu = kvm_get_vcpu(kvm, cpuid);
420 if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
421 return -EINVAL;
422
423 irq = vgic_get_irq(kvm, vcpu, intid);
424 if (!irq)
425 return -EINVAL;
426
006df0f3 427 spin_lock_irqsave(&irq->irq_lock, flags);
81eeb95d 428
cb3f0ad8 429 if (!vgic_validate_injection(irq, level, owner)) {
81eeb95d 430 /* Nothing to see here, move along... */
006df0f3 431 spin_unlock_irqrestore(&irq->irq_lock, flags);
5dd4b924 432 vgic_put_irq(kvm, irq);
81eeb95d
CD
433 return 0;
434 }
435
8694e4da 436 if (irq->config == VGIC_CONFIG_LEVEL)
81eeb95d 437 irq->line_level = level;
8694e4da
CD
438 else
439 irq->pending_latch = true;
81eeb95d 440
006df0f3 441 vgic_queue_irq_unlock(kvm, irq, flags);
5dd4b924 442 vgic_put_irq(kvm, irq);
81eeb95d
CD
443
444 return 0;
445}
446
47bbd31f
EA
447/* @irq->irq_lock must be held */
448static int kvm_vgic_map_irq(struct kvm_vcpu *vcpu, struct vgic_irq *irq,
b6909a65
CD
449 unsigned int host_irq,
450 bool (*get_input_level)(int vindid))
568e8c90 451{
47bbd31f
EA
452 struct irq_desc *desc;
453 struct irq_data *data;
454
455 /*
456 * Find the physical IRQ number corresponding to @host_irq
457 */
458 desc = irq_to_desc(host_irq);
459 if (!desc) {
460 kvm_err("%s: no interrupt descriptor\n", __func__);
461 return -EINVAL;
462 }
463 data = irq_desc_get_irq_data(desc);
464 while (data->parent_data)
465 data = data->parent_data;
466
467 irq->hw = true;
468 irq->host_irq = host_irq;
469 irq->hwintid = data->hwirq;
b6909a65 470 irq->get_input_level = get_input_level;
47bbd31f
EA
471 return 0;
472}
473
474/* @irq->irq_lock must be held */
475static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq)
476{
477 irq->hw = false;
478 irq->hwintid = 0;
b6909a65 479 irq->get_input_level = NULL;
47bbd31f
EA
480}
481
482int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq,
b6909a65 483 u32 vintid, bool (*get_input_level)(int vindid))
47bbd31f
EA
484{
485 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
006df0f3 486 unsigned long flags;
47bbd31f 487 int ret;
568e8c90
AP
488
489 BUG_ON(!irq);
490
006df0f3 491 spin_lock_irqsave(&irq->irq_lock, flags);
b6909a65 492 ret = kvm_vgic_map_irq(vcpu, irq, host_irq, get_input_level);
006df0f3 493 spin_unlock_irqrestore(&irq->irq_lock, flags);
5dd4b924 494 vgic_put_irq(vcpu->kvm, irq);
568e8c90 495
47bbd31f 496 return ret;
568e8c90
AP
497}
498
413aa807
CD
499/**
500 * kvm_vgic_reset_mapped_irq - Reset a mapped IRQ
501 * @vcpu: The VCPU pointer
502 * @vintid: The INTID of the interrupt
503 *
504 * Reset the active and pending states of a mapped interrupt. Kernel
505 * subsystems injecting mapped interrupts should reset their interrupt lines
506 * when we are doing a reset of the VM.
507 */
508void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid)
509{
510 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
511 unsigned long flags;
512
513 if (!irq->hw)
514 goto out;
515
516 spin_lock_irqsave(&irq->irq_lock, flags);
517 irq->active = false;
518 irq->pending_latch = false;
519 irq->line_level = false;
520 spin_unlock_irqrestore(&irq->irq_lock, flags);
521out:
522 vgic_put_irq(vcpu->kvm, irq);
523}
524
47bbd31f 525int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid)
568e8c90 526{
5dd4b924 527 struct vgic_irq *irq;
006df0f3 528 unsigned long flags;
568e8c90
AP
529
530 if (!vgic_initialized(vcpu->kvm))
531 return -EAGAIN;
532
47bbd31f 533 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
5dd4b924
AP
534 BUG_ON(!irq);
535
006df0f3 536 spin_lock_irqsave(&irq->irq_lock, flags);
47bbd31f 537 kvm_vgic_unmap_irq(irq);
006df0f3 538 spin_unlock_irqrestore(&irq->irq_lock, flags);
5dd4b924 539 vgic_put_irq(vcpu->kvm, irq);
568e8c90
AP
540
541 return 0;
542}
543
c6ccd30e
CD
544/**
545 * kvm_vgic_set_owner - Set the owner of an interrupt for a VM
546 *
547 * @vcpu: Pointer to the VCPU (used for PPIs)
548 * @intid: The virtual INTID identifying the interrupt (PPI or SPI)
549 * @owner: Opaque pointer to the owner
550 *
551 * Returns 0 if intid is not already used by another in-kernel device and the
552 * owner is set, otherwise returns an error code.
553 */
554int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner)
555{
556 struct vgic_irq *irq;
7465894e 557 unsigned long flags;
c6ccd30e
CD
558 int ret = 0;
559
560 if (!vgic_initialized(vcpu->kvm))
561 return -EAGAIN;
562
563 /* SGIs and LPIs cannot be wired up to any device */
564 if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid))
565 return -EINVAL;
566
567 irq = vgic_get_irq(vcpu->kvm, vcpu, intid);
7465894e 568 spin_lock_irqsave(&irq->irq_lock, flags);
c6ccd30e
CD
569 if (irq->owner && irq->owner != owner)
570 ret = -EEXIST;
571 else
572 irq->owner = owner;
7465894e 573 spin_unlock_irqrestore(&irq->irq_lock, flags);
c6ccd30e
CD
574
575 return ret;
576}
577
0919e84c
MZ
578/**
579 * vgic_prune_ap_list - Remove non-relevant interrupts from the list
580 *
581 * @vcpu: The VCPU pointer
582 *
583 * Go over the list of "interesting" interrupts, and prune those that we
584 * won't have to consider in the near future.
585 */
586static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
587{
588 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
589 struct vgic_irq *irq, *tmp;
006df0f3 590 unsigned long flags;
0919e84c
MZ
591
592retry:
006df0f3 593 spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags);
0919e84c
MZ
594
595 list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
596 struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
bf9a4137 597 bool target_vcpu_needs_kick = false;
0919e84c
MZ
598
599 spin_lock(&irq->irq_lock);
600
601 BUG_ON(vcpu != irq->vcpu);
602
603 target_vcpu = vgic_target_oracle(irq);
604
605 if (!target_vcpu) {
606 /*
607 * We don't need to process this interrupt any
608 * further, move it off the list.
609 */
610 list_del(&irq->ap_list);
611 irq->vcpu = NULL;
612 spin_unlock(&irq->irq_lock);
5dd4b924
AP
613
614 /*
615 * This vgic_put_irq call matches the
616 * vgic_get_irq_kref in vgic_queue_irq_unlock,
617 * where we added the LPI to the ap_list. As
618 * we remove the irq from the list, we drop
619 * also drop the refcount.
620 */
621 vgic_put_irq(vcpu->kvm, irq);
0919e84c
MZ
622 continue;
623 }
624
625 if (target_vcpu == vcpu) {
626 /* We're on the right CPU */
627 spin_unlock(&irq->irq_lock);
628 continue;
629 }
630
631 /* This interrupt looks like it has to be migrated. */
632
633 spin_unlock(&irq->irq_lock);
006df0f3 634 spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
0919e84c
MZ
635
636 /*
637 * Ensure locking order by always locking the smallest
638 * ID first.
639 */
640 if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
641 vcpuA = vcpu;
642 vcpuB = target_vcpu;
643 } else {
644 vcpuA = target_vcpu;
645 vcpuB = vcpu;
646 }
647
006df0f3 648 spin_lock_irqsave(&vcpuA->arch.vgic_cpu.ap_list_lock, flags);
0919e84c
MZ
649 spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock,
650 SINGLE_DEPTH_NESTING);
651 spin_lock(&irq->irq_lock);
652
653 /*
654 * If the affinity has been preserved, move the
655 * interrupt around. Otherwise, it means things have
656 * changed while the interrupt was unlocked, and we
657 * need to replay this.
658 *
659 * In all cases, we cannot trust the list not to have
660 * changed, so we restart from the beginning.
661 */
662 if (target_vcpu == vgic_target_oracle(irq)) {
663 struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
664
665 list_del(&irq->ap_list);
666 irq->vcpu = target_vcpu;
667 list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
bf9a4137 668 target_vcpu_needs_kick = true;
0919e84c
MZ
669 }
670
671 spin_unlock(&irq->irq_lock);
672 spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
006df0f3 673 spin_unlock_irqrestore(&vcpuA->arch.vgic_cpu.ap_list_lock, flags);
bf9a4137
AP
674
675 if (target_vcpu_needs_kick) {
676 kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu);
677 kvm_vcpu_kick(target_vcpu);
678 }
679
0919e84c
MZ
680 goto retry;
681 }
682
006df0f3 683 spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
0919e84c
MZ
684}
685
0919e84c
MZ
686static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
687{
59529f69
MZ
688 if (kvm_vgic_global_state.type == VGIC_V2)
689 vgic_v2_fold_lr_state(vcpu);
690 else
691 vgic_v3_fold_lr_state(vcpu);
0919e84c
MZ
692}
693
694/* Requires the irq_lock to be held. */
695static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
696 struct vgic_irq *irq, int lr)
697{
698 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
140b086d 699
59529f69
MZ
700 if (kvm_vgic_global_state.type == VGIC_V2)
701 vgic_v2_populate_lr(vcpu, irq, lr);
702 else
703 vgic_v3_populate_lr(vcpu, irq, lr);
0919e84c
MZ
704}
705
706static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
707{
59529f69
MZ
708 if (kvm_vgic_global_state.type == VGIC_V2)
709 vgic_v2_clear_lr(vcpu, lr);
710 else
711 vgic_v3_clear_lr(vcpu, lr);
0919e84c
MZ
712}
713
714static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
715{
59529f69
MZ
716 if (kvm_vgic_global_state.type == VGIC_V2)
717 vgic_v2_set_underflow(vcpu);
718 else
719 vgic_v3_set_underflow(vcpu);
0919e84c
MZ
720}
721
722/* Requires the ap_list_lock to be held. */
16ca6a60
MZ
723static int compute_ap_list_depth(struct kvm_vcpu *vcpu,
724 bool *multi_sgi)
0919e84c
MZ
725{
726 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
727 struct vgic_irq *irq;
728 int count = 0;
729
16ca6a60
MZ
730 *multi_sgi = false;
731
0919e84c
MZ
732 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
733
734 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
53692908
MZ
735 int w;
736
0919e84c
MZ
737 spin_lock(&irq->irq_lock);
738 /* GICv2 SGIs can count for more than one... */
53692908 739 w = vgic_irq_get_lr_count(irq);
0919e84c 740 spin_unlock(&irq->irq_lock);
53692908
MZ
741
742 count += w;
743 *multi_sgi |= (w > 1);
0919e84c
MZ
744 }
745 return count;
746}
747
748/* Requires the VCPU's ap_list_lock to be held. */
749static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
750{
751 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
752 struct vgic_irq *irq;
16ca6a60 753 int count;
16ca6a60
MZ
754 bool multi_sgi;
755 u8 prio = 0xff;
0919e84c
MZ
756
757 DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
758
16ca6a60
MZ
759 count = compute_ap_list_depth(vcpu, &multi_sgi);
760 if (count > kvm_vgic_global_state.nr_lr || multi_sgi)
0919e84c 761 vgic_sort_ap_list(vcpu);
0919e84c 762
16ca6a60
MZ
763 count = 0;
764
0919e84c
MZ
765 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
766 spin_lock(&irq->irq_lock);
767
0919e84c 768 /*
16ca6a60
MZ
769 * If we have multi-SGIs in the pipeline, we need to
770 * guarantee that they are all seen before any IRQ of
771 * lower priority. In that case, we need to filter out
772 * these interrupts by exiting early. This is easy as
773 * the AP list has been sorted already.
0919e84c 774 */
16ca6a60
MZ
775 if (multi_sgi && irq->priority > prio) {
776 spin_unlock(&irq->irq_lock);
777 break;
778 }
779
780 if (likely(vgic_target_oracle(irq) == vcpu)) {
0919e84c 781 vgic_populate_lr(vcpu, irq, count++);
0919e84c 782
53692908 783 if (irq->source)
16ca6a60 784 prio = irq->priority;
16ca6a60
MZ
785 }
786
0919e84c
MZ
787 spin_unlock(&irq->irq_lock);
788
90cac1f5
CD
789 if (count == kvm_vgic_global_state.nr_lr) {
790 if (!list_is_last(&irq->ap_list,
791 &vgic_cpu->ap_list_head))
792 vgic_set_underflow(vcpu);
0919e84c 793 break;
90cac1f5 794 }
0919e84c
MZ
795 }
796
797 vcpu->arch.vgic_cpu.used_lrs = count;
798
799 /* Nuke remaining LRs */
800 for ( ; count < kvm_vgic_global_state.nr_lr; count++)
801 vgic_clear_lr(vcpu, count);
802}
803
771621b0
CD
804static inline bool can_access_vgic_from_kernel(void)
805{
806 /*
807 * GICv2 can always be accessed from the kernel because it is
808 * memory-mapped, and VHE systems can access GICv3 EL2 system
809 * registers.
810 */
811 return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has_vhe();
812}
813
75174ba6
CD
814static inline void vgic_save_state(struct kvm_vcpu *vcpu)
815{
816 if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
817 vgic_v2_save_state(vcpu);
771621b0
CD
818 else
819 __vgic_v3_save_state(vcpu);
75174ba6
CD
820}
821
0919e84c
MZ
822/* Sync back the hardware VGIC state into our emulation after a guest's run. */
823void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
824{
f6769581
SWL
825 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
826
62775797
MZ
827 WARN_ON(vgic_v4_sync_hwstate(vcpu));
828
8ac76ef4
CD
829 /* An empty ap_list_head implies used_lrs == 0 */
830 if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head))
0099b770
CD
831 return;
832
2d0e63e0
CD
833 if (can_access_vgic_from_kernel())
834 vgic_save_state(vcpu);
835
8ac76ef4
CD
836 if (vgic_cpu->used_lrs)
837 vgic_fold_lr_state(vcpu);
0919e84c
MZ
838 vgic_prune_ap_list(vcpu);
839}
840
75174ba6
CD
841static inline void vgic_restore_state(struct kvm_vcpu *vcpu)
842{
843 if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
844 vgic_v2_restore_state(vcpu);
771621b0
CD
845 else
846 __vgic_v3_restore_state(vcpu);
75174ba6
CD
847}
848
0919e84c
MZ
849/* Flush our emulation state into the GIC hardware before entering the guest. */
850void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
851{
62775797
MZ
852 WARN_ON(vgic_v4_flush_hwstate(vcpu));
853
f6769581
SWL
854 /*
855 * If there are no virtual interrupts active or pending for this
856 * VCPU, then there is no work to do and we can bail out without
857 * taking any lock. There is a potential race with someone injecting
858 * interrupts to the VCPU, but it is a benign race as the VCPU will
859 * either observe the new interrupt before or after doing this check,
860 * and introducing additional synchronization mechanism doesn't change
861 * this.
862 */
863 if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head))
2d0e63e0 864 return;
0099b770 865
006df0f3
CD
866 DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
867
0919e84c
MZ
868 spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
869 vgic_flush_lr_state(vcpu);
870 spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
75174ba6 871
771621b0
CD
872 if (can_access_vgic_from_kernel())
873 vgic_restore_state(vcpu);
0919e84c 874}
90eee56c 875
328e5664
CD
876void kvm_vgic_load(struct kvm_vcpu *vcpu)
877{
878 if (unlikely(!vgic_initialized(vcpu->kvm)))
879 return;
880
881 if (kvm_vgic_global_state.type == VGIC_V2)
882 vgic_v2_load(vcpu);
883 else
884 vgic_v3_load(vcpu);
885}
886
887void kvm_vgic_put(struct kvm_vcpu *vcpu)
888{
889 if (unlikely(!vgic_initialized(vcpu->kvm)))
890 return;
891
892 if (kvm_vgic_global_state.type == VGIC_V2)
893 vgic_v2_put(vcpu);
894 else
895 vgic_v3_put(vcpu);
896}
897
90eee56c
EA
898int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
899{
900 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
901 struct vgic_irq *irq;
902 bool pending = false;
006df0f3 903 unsigned long flags;
90eee56c
EA
904
905 if (!vcpu->kvm->arch.vgic.enabled)
906 return false;
907
c9719680
MZ
908 if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last)
909 return true;
910
006df0f3 911 spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags);
90eee56c
EA
912
913 list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
914 spin_lock(&irq->irq_lock);
8694e4da 915 pending = irq_is_pending(irq) && irq->enabled;
90eee56c
EA
916 spin_unlock(&irq->irq_lock);
917
918 if (pending)
919 break;
920 }
921
006df0f3 922 spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
90eee56c
EA
923
924 return pending;
925}
2b0cda87
MZ
926
927void vgic_kick_vcpus(struct kvm *kvm)
928{
929 struct kvm_vcpu *vcpu;
930 int c;
931
932 /*
933 * We've injected an interrupt, time to find out who deserves
934 * a good kick...
935 */
936 kvm_for_each_vcpu(c, vcpu, kvm) {
325f9c64
AJ
937 if (kvm_vgic_vcpu_pending_irq(vcpu)) {
938 kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
2b0cda87 939 kvm_vcpu_kick(vcpu);
325f9c64 940 }
2b0cda87
MZ
941 }
942}
568e8c90 943
47bbd31f 944bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid)
568e8c90 945{
285a90e3 946 struct vgic_irq *irq;
568e8c90 947 bool map_is_active;
006df0f3 948 unsigned long flags;
568e8c90 949
f39d16cb
CD
950 if (!vgic_initialized(vcpu->kvm))
951 return false;
952
285a90e3 953 irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
006df0f3 954 spin_lock_irqsave(&irq->irq_lock, flags);
568e8c90 955 map_is_active = irq->hw && irq->active;
006df0f3 956 spin_unlock_irqrestore(&irq->irq_lock, flags);
5dd4b924 957 vgic_put_irq(vcpu->kvm, irq);
568e8c90
AP
958
959 return map_is_active;
960}
0e4e82f1 961