KVM: arm/arm64: vgic-its: Make attribute accessors static
[linux-block.git] / virt / kvm / arm / mmu.c
CommitLineData
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
196f878a 23#include <linux/sched/signal.h>
45e96ea6 24#include <trace/events/kvm.h>
342cd0ab 25#include <asm/pgalloc.h>
94f8e641 26#include <asm/cacheflush.h>
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27#include <asm/kvm_arm.h>
28#include <asm/kvm_mmu.h>
45e96ea6 29#include <asm/kvm_mmio.h>
0db5e022 30#include <asm/kvm_ras.h>
d5d8184d 31#include <asm/kvm_asm.h>
94f8e641 32#include <asm/kvm_emulate.h>
1e947bad 33#include <asm/virt.h>
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34
35#include "trace.h"
342cd0ab 36
5a677ce0 37static pgd_t *boot_hyp_pgd;
2fb41059 38static pgd_t *hyp_pgd;
e4c5a685 39static pgd_t *merged_hyp_pgd;
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40static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
41
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42static unsigned long hyp_idmap_start;
43static unsigned long hyp_idmap_end;
44static phys_addr_t hyp_idmap_vector;
45
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46static unsigned long io_map_base;
47
38f791a4 48#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 49
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50#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
51#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
52
53static bool memslot_is_logging(struct kvm_memory_slot *memslot)
54{
15a49a44 55 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
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56}
57
58/**
59 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
60 * @kvm: pointer to kvm structure.
61 *
62 * Interface to HYP function to flush all VM TLB entries
63 */
64void kvm_flush_remote_tlbs(struct kvm *kvm)
65{
66 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 67}
ad361f09 68
48762767 69static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 70{
8684e701 71 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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72}
73
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74/*
75 * D-Cache management functions. They take the page table entries by
76 * value, as they are flushing the cache using the kernel mapping (or
77 * kmap on 32bit).
78 */
79static void kvm_flush_dcache_pte(pte_t pte)
80{
81 __kvm_flush_dcache_pte(pte);
82}
83
84static void kvm_flush_dcache_pmd(pmd_t pmd)
85{
86 __kvm_flush_dcache_pmd(pmd);
87}
88
89static void kvm_flush_dcache_pud(pud_t pud)
90{
91 __kvm_flush_dcache_pud(pud);
92}
93
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94static bool kvm_is_device_pfn(unsigned long pfn)
95{
96 return !pfn_valid(pfn);
97}
98
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99/**
100 * stage2_dissolve_pmd() - clear and flush huge PMD entry
101 * @kvm: pointer to kvm structure.
102 * @addr: IPA
103 * @pmd: pmd pointer for IPA
104 *
105 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
106 * pages in the range dirty.
107 */
108static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
109{
bbb3b6b3 110 if (!pmd_thp_or_huge(*pmd))
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111 return;
112
113 pmd_clear(pmd);
114 kvm_tlb_flush_vmid_ipa(kvm, addr);
115 put_page(virt_to_page(pmd));
116}
117
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118/**
119 * stage2_dissolve_pud() - clear and flush huge PUD entry
120 * @kvm: pointer to kvm structure.
121 * @addr: IPA
122 * @pud: pud pointer for IPA
123 *
124 * Function clears a PUD entry, flushes addr 1st and 2nd stage TLBs. Marks all
125 * pages in the range dirty.
126 */
127static void stage2_dissolve_pud(struct kvm *kvm, phys_addr_t addr, pud_t *pudp)
128{
129 if (!stage2_pud_huge(kvm, *pudp))
130 return;
131
132 stage2_pud_clear(kvm, pudp);
133 kvm_tlb_flush_vmid_ipa(kvm, addr);
134 put_page(virt_to_page(pudp));
135}
136
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137static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
138 int min, int max)
139{
140 void *page;
141
142 BUG_ON(max > KVM_NR_MEM_OBJS);
143 if (cache->nobjs >= min)
144 return 0;
145 while (cache->nobjs < max) {
146 page = (void *)__get_free_page(PGALLOC_GFP);
147 if (!page)
148 return -ENOMEM;
149 cache->objects[cache->nobjs++] = page;
150 }
151 return 0;
152}
153
154static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
155{
156 while (mc->nobjs)
157 free_page((unsigned long)mc->objects[--mc->nobjs]);
158}
159
160static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
161{
162 void *p;
163
164 BUG_ON(!mc || !mc->nobjs);
165 p = mc->objects[--mc->nobjs];
166 return p;
167}
168
7a1c831e 169static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 170{
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171 pud_t *pud_table __maybe_unused = stage2_pud_offset(kvm, pgd, 0UL);
172 stage2_pgd_clear(kvm, pgd);
4f853a71 173 kvm_tlb_flush_vmid_ipa(kvm, addr);
e55cac5b 174 stage2_pud_free(kvm, pud_table);
4f853a71 175 put_page(virt_to_page(pgd));
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176}
177
7a1c831e 178static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 179{
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180 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(kvm, pud, 0);
181 VM_BUG_ON(stage2_pud_huge(kvm, *pud));
182 stage2_pud_clear(kvm, pud);
4f853a71 183 kvm_tlb_flush_vmid_ipa(kvm, addr);
e55cac5b 184 stage2_pmd_free(kvm, pmd_table);
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185 put_page(virt_to_page(pud));
186}
342cd0ab 187
7a1c831e 188static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 189{
4f853a71 190 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 191 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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192 pmd_clear(pmd);
193 kvm_tlb_flush_vmid_ipa(kvm, addr);
194 pte_free_kernel(NULL, pte_table);
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195 put_page(virt_to_page(pmd));
196}
197
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198static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte)
199{
200 WRITE_ONCE(*ptep, new_pte);
201 dsb(ishst);
202}
203
204static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd)
205{
206 WRITE_ONCE(*pmdp, new_pmd);
207 dsb(ishst);
208}
209
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210static inline void kvm_pmd_populate(pmd_t *pmdp, pte_t *ptep)
211{
212 kvm_set_pmd(pmdp, kvm_mk_pmd(ptep));
213}
214
215static inline void kvm_pud_populate(pud_t *pudp, pmd_t *pmdp)
216{
217 WRITE_ONCE(*pudp, kvm_mk_pud(pmdp));
218 dsb(ishst);
219}
220
221static inline void kvm_pgd_populate(pgd_t *pgdp, pud_t *pudp)
222{
223 WRITE_ONCE(*pgdp, kvm_mk_pgd(pudp));
224 dsb(ishst);
225}
226
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227/*
228 * Unmapping vs dcache management:
229 *
230 * If a guest maps certain memory pages as uncached, all writes will
231 * bypass the data cache and go directly to RAM. However, the CPUs
232 * can still speculate reads (not writes) and fill cache lines with
233 * data.
234 *
235 * Those cache lines will be *clean* cache lines though, so a
236 * clean+invalidate operation is equivalent to an invalidate
237 * operation, because no cache lines are marked dirty.
238 *
239 * Those clean cache lines could be filled prior to an uncached write
240 * by the guest, and the cache coherent IO subsystem would therefore
241 * end up writing old data to disk.
242 *
243 * This is why right after unmapping a page/section and invalidating
244 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
245 * the IO subsystem will never hit in the cache.
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246 *
247 * This is all avoided on systems that have ARM64_HAS_STAGE2_FWB, as
248 * we then fully enforce cacheability of RAM, no matter what the guest
249 * does.
363ef89f 250 */
7a1c831e 251static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 252 phys_addr_t addr, phys_addr_t end)
4f728276 253{
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254 phys_addr_t start_addr = addr;
255 pte_t *pte, *start_pte;
256
257 start_pte = pte = pte_offset_kernel(pmd, addr);
258 do {
259 if (!pte_none(*pte)) {
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260 pte_t old_pte = *pte;
261
4f853a71 262 kvm_set_pte(pte, __pte(0));
4f853a71 263 kvm_tlb_flush_vmid_ipa(kvm, addr);
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264
265 /* No need to invalidate the cache for device mappings */
0de58f85 266 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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267 kvm_flush_dcache_pte(old_pte);
268
269 put_page(virt_to_page(pte));
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270 }
271 } while (pte++, addr += PAGE_SIZE, addr != end);
272
e55cac5b 273 if (stage2_pte_table_empty(kvm, start_pte))
7a1c831e 274 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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275}
276
7a1c831e 277static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 278 phys_addr_t addr, phys_addr_t end)
000d3996 279{
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280 phys_addr_t next, start_addr = addr;
281 pmd_t *pmd, *start_pmd;
000d3996 282
e55cac5b 283 start_pmd = pmd = stage2_pmd_offset(kvm, pud, addr);
4f853a71 284 do {
e55cac5b 285 next = stage2_pmd_addr_end(kvm, addr, end);
4f853a71 286 if (!pmd_none(*pmd)) {
bbb3b6b3 287 if (pmd_thp_or_huge(*pmd)) {
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288 pmd_t old_pmd = *pmd;
289
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290 pmd_clear(pmd);
291 kvm_tlb_flush_vmid_ipa(kvm, addr);
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292
293 kvm_flush_dcache_pmd(old_pmd);
294
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295 put_page(virt_to_page(pmd));
296 } else {
7a1c831e 297 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 298 }
ad361f09 299 }
4f853a71 300 } while (pmd++, addr = next, addr != end);
ad361f09 301
e55cac5b 302 if (stage2_pmd_table_empty(kvm, start_pmd))
7a1c831e 303 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 304}
000d3996 305
7a1c831e 306static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
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307 phys_addr_t addr, phys_addr_t end)
308{
309 phys_addr_t next, start_addr = addr;
310 pud_t *pud, *start_pud;
4f728276 311
e55cac5b 312 start_pud = pud = stage2_pud_offset(kvm, pgd, addr);
4f853a71 313 do {
e55cac5b
SP
314 next = stage2_pud_addr_end(kvm, addr, end);
315 if (!stage2_pud_none(kvm, *pud)) {
316 if (stage2_pud_huge(kvm, *pud)) {
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317 pud_t old_pud = *pud;
318
e55cac5b 319 stage2_pud_clear(kvm, pud);
4f853a71 320 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 321 kvm_flush_dcache_pud(old_pud);
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322 put_page(virt_to_page(pud));
323 } else {
7a1c831e 324 unmap_stage2_pmds(kvm, pud, addr, next);
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325 }
326 }
4f853a71 327 } while (pud++, addr = next, addr != end);
4f728276 328
e55cac5b 329 if (stage2_pud_table_empty(kvm, start_pud))
7a1c831e 330 clear_stage2_pgd_entry(kvm, pgd, start_addr);
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CD
331}
332
7a1c831e
SP
333/**
334 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
335 * @kvm: The VM pointer
336 * @start: The intermediate physical base address of the range to unmap
337 * @size: The size of the area to unmap
338 *
339 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
340 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
341 * destroying the VM), otherwise another faulting VCPU may come in and mess
342 * with things behind our backs.
343 */
344static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
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CD
345{
346 pgd_t *pgd;
347 phys_addr_t addr = start, end = start + size;
348 phys_addr_t next;
349
8b3405e3 350 assert_spin_locked(&kvm->mmu_lock);
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351 WARN_ON(size & ~PAGE_MASK);
352
e55cac5b 353 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
4f853a71 354 do {
0c428a6a
SP
355 /*
356 * Make sure the page table is still active, as another thread
357 * could have possibly freed the page table, while we released
358 * the lock.
359 */
360 if (!READ_ONCE(kvm->arch.pgd))
361 break;
e55cac5b
SP
362 next = stage2_pgd_addr_end(kvm, addr, end);
363 if (!stage2_pgd_none(kvm, *pgd))
7a1c831e 364 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
365 /*
366 * If the range is too large, release the kvm->mmu_lock
367 * to prevent starvation and lockup detector warnings.
368 */
369 if (next != end)
370 cond_resched_lock(&kvm->mmu_lock);
4f853a71 371 } while (pgd++, addr = next, addr != end);
000d3996
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372}
373
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374static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
375 phys_addr_t addr, phys_addr_t end)
376{
377 pte_t *pte;
378
379 pte = pte_offset_kernel(pmd, addr);
380 do {
0de58f85 381 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 382 kvm_flush_dcache_pte(*pte);
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383 } while (pte++, addr += PAGE_SIZE, addr != end);
384}
385
386static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
387 phys_addr_t addr, phys_addr_t end)
388{
389 pmd_t *pmd;
390 phys_addr_t next;
391
e55cac5b 392 pmd = stage2_pmd_offset(kvm, pud, addr);
9d218a1f 393 do {
e55cac5b 394 next = stage2_pmd_addr_end(kvm, addr, end);
9d218a1f 395 if (!pmd_none(*pmd)) {
bbb3b6b3 396 if (pmd_thp_or_huge(*pmd))
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397 kvm_flush_dcache_pmd(*pmd);
398 else
9d218a1f 399 stage2_flush_ptes(kvm, pmd, addr, next);
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400 }
401 } while (pmd++, addr = next, addr != end);
402}
403
404static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
405 phys_addr_t addr, phys_addr_t end)
406{
407 pud_t *pud;
408 phys_addr_t next;
409
e55cac5b 410 pud = stage2_pud_offset(kvm, pgd, addr);
9d218a1f 411 do {
e55cac5b
SP
412 next = stage2_pud_addr_end(kvm, addr, end);
413 if (!stage2_pud_none(kvm, *pud)) {
414 if (stage2_pud_huge(kvm, *pud))
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415 kvm_flush_dcache_pud(*pud);
416 else
9d218a1f 417 stage2_flush_pmds(kvm, pud, addr, next);
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418 }
419 } while (pud++, addr = next, addr != end);
420}
421
422static void stage2_flush_memslot(struct kvm *kvm,
423 struct kvm_memory_slot *memslot)
424{
425 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
426 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
427 phys_addr_t next;
428 pgd_t *pgd;
429
e55cac5b 430 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
9d218a1f 431 do {
e55cac5b
SP
432 next = stage2_pgd_addr_end(kvm, addr, end);
433 if (!stage2_pgd_none(kvm, *pgd))
d2db7773 434 stage2_flush_puds(kvm, pgd, addr, next);
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435 } while (pgd++, addr = next, addr != end);
436}
437
438/**
439 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
440 * @kvm: The struct kvm pointer
441 *
442 * Go through the stage 2 page tables and invalidate any cache lines
443 * backing memory already mapped to the VM.
444 */
3c1e7165 445static void stage2_flush_vm(struct kvm *kvm)
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446{
447 struct kvm_memslots *slots;
448 struct kvm_memory_slot *memslot;
449 int idx;
450
451 idx = srcu_read_lock(&kvm->srcu);
452 spin_lock(&kvm->mmu_lock);
453
454 slots = kvm_memslots(kvm);
455 kvm_for_each_memslot(memslot, slots)
456 stage2_flush_memslot(kvm, memslot);
457
458 spin_unlock(&kvm->mmu_lock);
459 srcu_read_unlock(&kvm->srcu, idx);
460}
461
64f32497
SP
462static void clear_hyp_pgd_entry(pgd_t *pgd)
463{
464 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
465 pgd_clear(pgd);
466 pud_free(NULL, pud_table);
467 put_page(virt_to_page(pgd));
468}
469
470static void clear_hyp_pud_entry(pud_t *pud)
471{
472 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
473 VM_BUG_ON(pud_huge(*pud));
474 pud_clear(pud);
475 pmd_free(NULL, pmd_table);
476 put_page(virt_to_page(pud));
477}
478
479static void clear_hyp_pmd_entry(pmd_t *pmd)
480{
481 pte_t *pte_table = pte_offset_kernel(pmd, 0);
482 VM_BUG_ON(pmd_thp_or_huge(*pmd));
483 pmd_clear(pmd);
484 pte_free_kernel(NULL, pte_table);
485 put_page(virt_to_page(pmd));
486}
487
488static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
489{
490 pte_t *pte, *start_pte;
491
492 start_pte = pte = pte_offset_kernel(pmd, addr);
493 do {
494 if (!pte_none(*pte)) {
495 kvm_set_pte(pte, __pte(0));
496 put_page(virt_to_page(pte));
497 }
498 } while (pte++, addr += PAGE_SIZE, addr != end);
499
500 if (hyp_pte_table_empty(start_pte))
501 clear_hyp_pmd_entry(pmd);
502}
503
504static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
505{
506 phys_addr_t next;
507 pmd_t *pmd, *start_pmd;
508
509 start_pmd = pmd = pmd_offset(pud, addr);
510 do {
511 next = pmd_addr_end(addr, end);
512 /* Hyp doesn't use huge pmds */
513 if (!pmd_none(*pmd))
514 unmap_hyp_ptes(pmd, addr, next);
515 } while (pmd++, addr = next, addr != end);
516
517 if (hyp_pmd_table_empty(start_pmd))
518 clear_hyp_pud_entry(pud);
519}
520
521static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
522{
523 phys_addr_t next;
524 pud_t *pud, *start_pud;
525
526 start_pud = pud = pud_offset(pgd, addr);
527 do {
528 next = pud_addr_end(addr, end);
529 /* Hyp doesn't use huge puds */
530 if (!pud_none(*pud))
531 unmap_hyp_pmds(pud, addr, next);
532 } while (pud++, addr = next, addr != end);
533
534 if (hyp_pud_table_empty(start_pud))
535 clear_hyp_pgd_entry(pgd);
536}
537
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538static unsigned int kvm_pgd_index(unsigned long addr, unsigned int ptrs_per_pgd)
539{
540 return (addr >> PGDIR_SHIFT) & (ptrs_per_pgd - 1);
541}
542
543static void __unmap_hyp_range(pgd_t *pgdp, unsigned long ptrs_per_pgd,
544 phys_addr_t start, u64 size)
64f32497
SP
545{
546 pgd_t *pgd;
547 phys_addr_t addr = start, end = start + size;
548 phys_addr_t next;
549
550 /*
551 * We don't unmap anything from HYP, except at the hyp tear down.
552 * Hence, we don't have to invalidate the TLBs here.
553 */
3ddd4556 554 pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
64f32497
SP
555 do {
556 next = pgd_addr_end(addr, end);
557 if (!pgd_none(*pgd))
558 unmap_hyp_puds(pgd, addr, next);
559 } while (pgd++, addr = next, addr != end);
560}
561
3ddd4556
MZ
562static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
563{
564 __unmap_hyp_range(pgdp, PTRS_PER_PGD, start, size);
565}
566
567static void unmap_hyp_idmap_range(pgd_t *pgdp, phys_addr_t start, u64 size)
568{
569 __unmap_hyp_range(pgdp, __kvm_idmap_ptrs_per_pgd(), start, size);
570}
571
342cd0ab 572/**
4f728276 573 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 574 *
5a677ce0
MZ
575 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
576 * therefore contains either mappings in the kernel memory area (above
e3f019b3 577 * PAGE_OFFSET), or device mappings in the idmap range.
5a677ce0 578 *
e3f019b3
MZ
579 * boot_hyp_pgd should only map the idmap range, and is only used in
580 * the extended idmap case.
342cd0ab 581 */
4f728276 582void free_hyp_pgds(void)
342cd0ab 583{
e3f019b3
MZ
584 pgd_t *id_pgd;
585
d157f4a5 586 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 587
e3f019b3
MZ
588 id_pgd = boot_hyp_pgd ? boot_hyp_pgd : hyp_pgd;
589
590 if (id_pgd) {
591 /* In case we never called hyp_mmu_init() */
592 if (!io_map_base)
593 io_map_base = hyp_idmap_start;
594 unmap_hyp_idmap_range(id_pgd, io_map_base,
595 hyp_idmap_start + PAGE_SIZE - io_map_base);
596 }
597
26781f9c 598 if (boot_hyp_pgd) {
26781f9c
MZ
599 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
600 boot_hyp_pgd = NULL;
601 }
602
4f728276 603 if (hyp_pgd) {
7839c672
MZ
604 unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
605 (uintptr_t)high_memory - PAGE_OFFSET);
d4cb9df5 606
38f791a4 607 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 608 hyp_pgd = NULL;
4f728276 609 }
e4c5a685
AB
610 if (merged_hyp_pgd) {
611 clear_page(merged_hyp_pgd);
612 free_page((unsigned long)merged_hyp_pgd);
613 merged_hyp_pgd = NULL;
614 }
4f728276 615
342cd0ab
CD
616 mutex_unlock(&kvm_hyp_pgd_mutex);
617}
618
619static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
620 unsigned long end, unsigned long pfn,
621 pgprot_t prot)
342cd0ab
CD
622{
623 pte_t *pte;
624 unsigned long addr;
342cd0ab 625
3562c76d
MZ
626 addr = start;
627 do {
6060df84 628 pte = pte_offset_kernel(pmd, addr);
f8df7338 629 kvm_set_pte(pte, kvm_pfn_pte(pfn, prot));
4f728276 630 get_page(virt_to_page(pte));
6060df84 631 pfn++;
3562c76d 632 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
633}
634
635static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
636 unsigned long end, unsigned long pfn,
637 pgprot_t prot)
342cd0ab
CD
638{
639 pmd_t *pmd;
640 pte_t *pte;
641 unsigned long addr, next;
642
3562c76d
MZ
643 addr = start;
644 do {
6060df84 645 pmd = pmd_offset(pud, addr);
342cd0ab
CD
646
647 BUG_ON(pmd_sect(*pmd));
648
649 if (pmd_none(*pmd)) {
4cf58924 650 pte = pte_alloc_one_kernel(NULL);
342cd0ab
CD
651 if (!pte) {
652 kvm_err("Cannot allocate Hyp pte\n");
653 return -ENOMEM;
654 }
0db9dd8a 655 kvm_pmd_populate(pmd, pte);
4f728276 656 get_page(virt_to_page(pmd));
342cd0ab
CD
657 }
658
659 next = pmd_addr_end(addr, end);
660
6060df84
MZ
661 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
662 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 663 } while (addr = next, addr != end);
342cd0ab
CD
664
665 return 0;
666}
667
38f791a4
CD
668static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
669 unsigned long end, unsigned long pfn,
670 pgprot_t prot)
671{
672 pud_t *pud;
673 pmd_t *pmd;
674 unsigned long addr, next;
675 int ret;
676
677 addr = start;
678 do {
679 pud = pud_offset(pgd, addr);
680
681 if (pud_none_or_clear_bad(pud)) {
682 pmd = pmd_alloc_one(NULL, addr);
683 if (!pmd) {
684 kvm_err("Cannot allocate Hyp pmd\n");
685 return -ENOMEM;
686 }
0db9dd8a 687 kvm_pud_populate(pud, pmd);
38f791a4 688 get_page(virt_to_page(pud));
38f791a4
CD
689 }
690
691 next = pud_addr_end(addr, end);
692 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
693 if (ret)
694 return ret;
695 pfn += (next - addr) >> PAGE_SHIFT;
696 } while (addr = next, addr != end);
697
698 return 0;
699}
700
98732d1b 701static int __create_hyp_mappings(pgd_t *pgdp, unsigned long ptrs_per_pgd,
6060df84
MZ
702 unsigned long start, unsigned long end,
703 unsigned long pfn, pgprot_t prot)
342cd0ab 704{
342cd0ab
CD
705 pgd_t *pgd;
706 pud_t *pud;
342cd0ab
CD
707 unsigned long addr, next;
708 int err = 0;
709
342cd0ab 710 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
711 addr = start & PAGE_MASK;
712 end = PAGE_ALIGN(end);
713 do {
3ddd4556 714 pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
342cd0ab 715
38f791a4
CD
716 if (pgd_none(*pgd)) {
717 pud = pud_alloc_one(NULL, addr);
718 if (!pud) {
719 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
720 err = -ENOMEM;
721 goto out;
722 }
0db9dd8a 723 kvm_pgd_populate(pgd, pud);
38f791a4 724 get_page(virt_to_page(pgd));
342cd0ab
CD
725 }
726
727 next = pgd_addr_end(addr, end);
38f791a4 728 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
729 if (err)
730 goto out;
6060df84 731 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 732 } while (addr = next, addr != end);
342cd0ab
CD
733out:
734 mutex_unlock(&kvm_hyp_pgd_mutex);
735 return err;
736}
737
40c2729b
CD
738static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
739{
740 if (!is_vmalloc_addr(kaddr)) {
741 BUG_ON(!virt_addr_valid(kaddr));
742 return __pa(kaddr);
743 } else {
744 return page_to_phys(vmalloc_to_page(kaddr)) +
745 offset_in_page(kaddr);
746 }
747}
748
342cd0ab 749/**
06e8c3b0 750 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
751 * @from: The virtual kernel start address of the range
752 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 753 * @prot: The protection to be applied to this range
342cd0ab 754 *
06e8c3b0
MZ
755 * The same virtual address as the kernel virtual address is also used
756 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
757 * physical pages.
342cd0ab 758 */
c8dddecd 759int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 760{
40c2729b
CD
761 phys_addr_t phys_addr;
762 unsigned long virt_addr;
6c41a413
MZ
763 unsigned long start = kern_hyp_va((unsigned long)from);
764 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 765
1e947bad
MZ
766 if (is_kernel_in_hyp_mode())
767 return 0;
768
40c2729b
CD
769 start = start & PAGE_MASK;
770 end = PAGE_ALIGN(end);
6060df84 771
40c2729b
CD
772 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
773 int err;
6060df84 774
40c2729b 775 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
98732d1b
KM
776 err = __create_hyp_mappings(hyp_pgd, PTRS_PER_PGD,
777 virt_addr, virt_addr + PAGE_SIZE,
40c2729b 778 __phys_to_pfn(phys_addr),
c8dddecd 779 prot);
40c2729b
CD
780 if (err)
781 return err;
782 }
783
784 return 0;
342cd0ab
CD
785}
786
dc2e4633
MZ
787static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size,
788 unsigned long *haddr, pgprot_t prot)
342cd0ab 789{
e3f019b3
MZ
790 pgd_t *pgd = hyp_pgd;
791 unsigned long base;
792 int ret = 0;
6060df84 793
e3f019b3 794 mutex_lock(&kvm_hyp_pgd_mutex);
6060df84 795
e3f019b3
MZ
796 /*
797 * This assumes that we we have enough space below the idmap
798 * page to allocate our VAs. If not, the check below will
799 * kick. A potential alternative would be to detect that
800 * overflow and switch to an allocation above the idmap.
801 *
802 * The allocated size is always a multiple of PAGE_SIZE.
803 */
804 size = PAGE_ALIGN(size + offset_in_page(phys_addr));
805 base = io_map_base - size;
1bb32a44 806
e3f019b3
MZ
807 /*
808 * Verify that BIT(VA_BITS - 1) hasn't been flipped by
809 * allocating the new area, as it would indicate we've
810 * overflowed the idmap/IO address range.
811 */
812 if ((base ^ io_map_base) & BIT(VA_BITS - 1))
813 ret = -ENOMEM;
814 else
815 io_map_base = base;
816
817 mutex_unlock(&kvm_hyp_pgd_mutex);
818
819 if (ret)
820 goto out;
821
822 if (__kvm_cpu_uses_extended_idmap())
823 pgd = boot_hyp_pgd;
824
825 ret = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
826 base, base + size,
dc2e4633 827 __phys_to_pfn(phys_addr), prot);
e3f019b3
MZ
828 if (ret)
829 goto out;
830
dc2e4633 831 *haddr = base + offset_in_page(phys_addr);
e3f019b3
MZ
832
833out:
dc2e4633
MZ
834 return ret;
835}
836
837/**
838 * create_hyp_io_mappings - Map IO into both kernel and HYP
839 * @phys_addr: The physical start address which gets mapped
840 * @size: Size of the region being mapped
841 * @kaddr: Kernel VA for this mapping
842 * @haddr: HYP VA for this mapping
843 */
844int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
845 void __iomem **kaddr,
846 void __iomem **haddr)
847{
848 unsigned long addr;
849 int ret;
850
851 *kaddr = ioremap(phys_addr, size);
852 if (!*kaddr)
853 return -ENOMEM;
854
855 if (is_kernel_in_hyp_mode()) {
856 *haddr = *kaddr;
857 return 0;
858 }
859
860 ret = __create_hyp_private_mapping(phys_addr, size,
861 &addr, PAGE_HYP_DEVICE);
1bb32a44
MZ
862 if (ret) {
863 iounmap(*kaddr);
864 *kaddr = NULL;
dc2e4633
MZ
865 *haddr = NULL;
866 return ret;
867 }
868
869 *haddr = (void __iomem *)addr;
870 return 0;
871}
872
873/**
874 * create_hyp_exec_mappings - Map an executable range into HYP
875 * @phys_addr: The physical start address which gets mapped
876 * @size: Size of the region being mapped
877 * @haddr: HYP VA for this mapping
878 */
879int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
880 void **haddr)
881{
882 unsigned long addr;
883 int ret;
884
885 BUG_ON(is_kernel_in_hyp_mode());
886
887 ret = __create_hyp_private_mapping(phys_addr, size,
888 &addr, PAGE_HYP_EXEC);
889 if (ret) {
890 *haddr = NULL;
1bb32a44
MZ
891 return ret;
892 }
893
dc2e4633 894 *haddr = (void *)addr;
1bb32a44 895 return 0;
342cd0ab
CD
896}
897
d5d8184d
CD
898/**
899 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
900 * @kvm: The KVM struct pointer for the VM.
901 *
9d4dc688
VM
902 * Allocates only the stage-2 HW PGD level table(s) (can support either full
903 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
904 * allocated pages.
d5d8184d
CD
905 *
906 * Note we don't need locking here as this is only called when the VM is
907 * created, which can only be done once.
908 */
909int kvm_alloc_stage2_pgd(struct kvm *kvm)
910{
e329fb75 911 phys_addr_t pgd_phys;
d5d8184d
CD
912 pgd_t *pgd;
913
914 if (kvm->arch.pgd != NULL) {
915 kvm_err("kvm_arch already initialized?\n");
916 return -EINVAL;
917 }
918
9163ee23 919 /* Allocate the HW PGD, making sure that each page gets its own refcount */
e55cac5b 920 pgd = alloc_pages_exact(stage2_pgd_size(kvm), GFP_KERNEL | __GFP_ZERO);
9163ee23 921 if (!pgd)
a987370f
MZ
922 return -ENOMEM;
923
e329fb75
CD
924 pgd_phys = virt_to_phys(pgd);
925 if (WARN_ON(pgd_phys & ~kvm_vttbr_baddr_mask(kvm)))
926 return -EINVAL;
927
d5d8184d 928 kvm->arch.pgd = pgd;
e329fb75 929 kvm->arch.pgd_phys = pgd_phys;
d5d8184d
CD
930 return 0;
931}
932
957db105
CD
933static void stage2_unmap_memslot(struct kvm *kvm,
934 struct kvm_memory_slot *memslot)
935{
936 hva_t hva = memslot->userspace_addr;
937 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
938 phys_addr_t size = PAGE_SIZE * memslot->npages;
939 hva_t reg_end = hva + size;
940
941 /*
942 * A memory region could potentially cover multiple VMAs, and any holes
943 * between them, so iterate over all of them to find out if we should
944 * unmap any of them.
945 *
946 * +--------------------------------------------+
947 * +---------------+----------------+ +----------------+
948 * | : VMA 1 | VMA 2 | | VMA 3 : |
949 * +---------------+----------------+ +----------------+
950 * | memory region |
951 * +--------------------------------------------+
952 */
953 do {
954 struct vm_area_struct *vma = find_vma(current->mm, hva);
955 hva_t vm_start, vm_end;
956
957 if (!vma || vma->vm_start >= reg_end)
958 break;
959
960 /*
961 * Take the intersection of this VMA with the memory region
962 */
963 vm_start = max(hva, vma->vm_start);
964 vm_end = min(reg_end, vma->vm_end);
965
966 if (!(vma->vm_flags & VM_PFNMAP)) {
967 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
968 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
969 }
970 hva = vm_end;
971 } while (hva < reg_end);
972}
973
974/**
975 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
976 * @kvm: The struct kvm pointer
977 *
978 * Go through the memregions and unmap any reguler RAM
979 * backing memory already mapped to the VM.
980 */
981void stage2_unmap_vm(struct kvm *kvm)
982{
983 struct kvm_memslots *slots;
984 struct kvm_memory_slot *memslot;
985 int idx;
986
987 idx = srcu_read_lock(&kvm->srcu);
90f6e150 988 down_read(&current->mm->mmap_sem);
957db105
CD
989 spin_lock(&kvm->mmu_lock);
990
991 slots = kvm_memslots(kvm);
992 kvm_for_each_memslot(memslot, slots)
993 stage2_unmap_memslot(kvm, memslot);
994
995 spin_unlock(&kvm->mmu_lock);
90f6e150 996 up_read(&current->mm->mmap_sem);
957db105
CD
997 srcu_read_unlock(&kvm->srcu, idx);
998}
999
d5d8184d
CD
1000/**
1001 * kvm_free_stage2_pgd - free all stage-2 tables
1002 * @kvm: The KVM struct pointer for the VM.
1003 *
1004 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
1005 * underlying level-2 and level-3 tables before freeing the actual level-1 table
1006 * and setting the struct pointer to NULL.
d5d8184d
CD
1007 */
1008void kvm_free_stage2_pgd(struct kvm *kvm)
1009{
6c0d706b 1010 void *pgd = NULL;
d5d8184d 1011
8b3405e3 1012 spin_lock(&kvm->mmu_lock);
6c0d706b 1013 if (kvm->arch.pgd) {
e55cac5b 1014 unmap_stage2_range(kvm, 0, kvm_phys_size(kvm));
2952a607 1015 pgd = READ_ONCE(kvm->arch.pgd);
6c0d706b 1016 kvm->arch.pgd = NULL;
e329fb75 1017 kvm->arch.pgd_phys = 0;
6c0d706b 1018 }
8b3405e3
SP
1019 spin_unlock(&kvm->mmu_lock);
1020
9163ee23 1021 /* Free the HW pgd, one page at a time */
6c0d706b 1022 if (pgd)
e55cac5b 1023 free_pages_exact(pgd, stage2_pgd_size(kvm));
d5d8184d
CD
1024}
1025
38f791a4 1026static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 1027 phys_addr_t addr)
d5d8184d
CD
1028{
1029 pgd_t *pgd;
1030 pud_t *pud;
d5d8184d 1031
e55cac5b
SP
1032 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
1033 if (stage2_pgd_none(kvm, *pgd)) {
38f791a4
CD
1034 if (!cache)
1035 return NULL;
1036 pud = mmu_memory_cache_alloc(cache);
e55cac5b 1037 stage2_pgd_populate(kvm, pgd, pud);
38f791a4
CD
1038 get_page(virt_to_page(pgd));
1039 }
1040
e55cac5b 1041 return stage2_pud_offset(kvm, pgd, addr);
38f791a4
CD
1042}
1043
1044static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
1045 phys_addr_t addr)
1046{
1047 pud_t *pud;
1048 pmd_t *pmd;
1049
1050 pud = stage2_get_pud(kvm, cache, addr);
b8e0ba7c 1051 if (!pud || stage2_pud_huge(kvm, *pud))
d6dbdd3c
MZ
1052 return NULL;
1053
e55cac5b 1054 if (stage2_pud_none(kvm, *pud)) {
d5d8184d 1055 if (!cache)
ad361f09 1056 return NULL;
d5d8184d 1057 pmd = mmu_memory_cache_alloc(cache);
e55cac5b 1058 stage2_pud_populate(kvm, pud, pmd);
d5d8184d 1059 get_page(virt_to_page(pud));
c62ee2b2
MZ
1060 }
1061
e55cac5b 1062 return stage2_pmd_offset(kvm, pud, addr);
ad361f09
CD
1063}
1064
1065static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
1066 *cache, phys_addr_t addr, const pmd_t *new_pmd)
1067{
1068 pmd_t *pmd, old_pmd;
1069
3c3736cd 1070retry:
ad361f09
CD
1071 pmd = stage2_get_pmd(kvm, cache, addr);
1072 VM_BUG_ON(!pmd);
d5d8184d 1073
ad361f09 1074 old_pmd = *pmd;
3c3736cd
SP
1075 /*
1076 * Multiple vcpus faulting on the same PMD entry, can
1077 * lead to them sequentially updating the PMD with the
1078 * same value. Following the break-before-make
1079 * (pmd_clear() followed by tlb_flush()) process can
1080 * hinder forward progress due to refaults generated
1081 * on missing translations.
1082 *
1083 * Skip updating the page table if the entry is
1084 * unchanged.
1085 */
1086 if (pmd_val(old_pmd) == pmd_val(*new_pmd))
1087 return 0;
1088
d4b9e079 1089 if (pmd_present(old_pmd)) {
86658b81 1090 /*
3c3736cd
SP
1091 * If we already have PTE level mapping for this block,
1092 * we must unmap it to avoid inconsistent TLB state and
1093 * leaking the table page. We could end up in this situation
1094 * if the memory slot was marked for dirty logging and was
1095 * reverted, leaving PTE level mappings for the pages accessed
1096 * during the period. So, unmap the PTE level mapping for this
1097 * block and retry, as we could have released the upper level
1098 * table in the process.
86658b81 1099 *
3c3736cd
SP
1100 * Normal THP split/merge follows mmu_notifier callbacks and do
1101 * get handled accordingly.
86658b81 1102 */
3c3736cd
SP
1103 if (!pmd_thp_or_huge(old_pmd)) {
1104 unmap_stage2_range(kvm, addr & S2_PMD_MASK, S2_PMD_SIZE);
1105 goto retry;
1106 }
86658b81
PA
1107 /*
1108 * Mapping in huge pages should only happen through a
1109 * fault. If a page is merged into a transparent huge
1110 * page, the individual subpages of that huge page
1111 * should be unmapped through MMU notifiers before we
1112 * get here.
1113 *
1114 * Merging of CompoundPages is not supported; they
1115 * should become splitting first, unmapped, merged,
1116 * and mapped back in on-demand.
1117 */
3c3736cd 1118 WARN_ON_ONCE(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
d4b9e079 1119 pmd_clear(pmd);
ad361f09 1120 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 1121 } else {
ad361f09 1122 get_page(virt_to_page(pmd));
d4b9e079
MZ
1123 }
1124
1125 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
1126 return 0;
1127}
1128
b8e0ba7c
PA
1129static int stage2_set_pud_huge(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
1130 phys_addr_t addr, const pud_t *new_pudp)
1131{
1132 pud_t *pudp, old_pud;
1133
3c3736cd 1134retry:
b8e0ba7c
PA
1135 pudp = stage2_get_pud(kvm, cache, addr);
1136 VM_BUG_ON(!pudp);
1137
1138 old_pud = *pudp;
1139
1140 /*
1141 * A large number of vcpus faulting on the same stage 2 entry,
3c3736cd
SP
1142 * can lead to a refault due to the stage2_pud_clear()/tlb_flush().
1143 * Skip updating the page tables if there is no change.
b8e0ba7c
PA
1144 */
1145 if (pud_val(old_pud) == pud_val(*new_pudp))
1146 return 0;
1147
1148 if (stage2_pud_present(kvm, old_pud)) {
3c3736cd
SP
1149 /*
1150 * If we already have table level mapping for this block, unmap
1151 * the range for this block and retry.
1152 */
1153 if (!stage2_pud_huge(kvm, old_pud)) {
1154 unmap_stage2_range(kvm, addr & S2_PUD_MASK, S2_PUD_SIZE);
1155 goto retry;
1156 }
1157
1158 WARN_ON_ONCE(kvm_pud_pfn(old_pud) != kvm_pud_pfn(*new_pudp));
b8e0ba7c
PA
1159 stage2_pud_clear(kvm, pudp);
1160 kvm_tlb_flush_vmid_ipa(kvm, addr);
1161 } else {
1162 get_page(virt_to_page(pudp));
1163 }
1164
1165 kvm_set_pud(pudp, *new_pudp);
1166 return 0;
1167}
1168
86d1c55e
PA
1169/*
1170 * stage2_get_leaf_entry - walk the stage2 VM page tables and return
1171 * true if a valid and present leaf-entry is found. A pointer to the
1172 * leaf-entry is returned in the appropriate level variable - pudpp,
1173 * pmdpp, ptepp.
1174 */
1175static bool stage2_get_leaf_entry(struct kvm *kvm, phys_addr_t addr,
1176 pud_t **pudpp, pmd_t **pmdpp, pte_t **ptepp)
7a3796d2 1177{
86d1c55e 1178 pud_t *pudp;
7a3796d2
MZ
1179 pmd_t *pmdp;
1180 pte_t *ptep;
1181
86d1c55e
PA
1182 *pudpp = NULL;
1183 *pmdpp = NULL;
1184 *ptepp = NULL;
1185
1186 pudp = stage2_get_pud(kvm, NULL, addr);
1187 if (!pudp || stage2_pud_none(kvm, *pudp) || !stage2_pud_present(kvm, *pudp))
1188 return false;
1189
1190 if (stage2_pud_huge(kvm, *pudp)) {
1191 *pudpp = pudp;
1192 return true;
1193 }
1194
1195 pmdp = stage2_pmd_offset(kvm, pudp, addr);
7a3796d2
MZ
1196 if (!pmdp || pmd_none(*pmdp) || !pmd_present(*pmdp))
1197 return false;
1198
86d1c55e
PA
1199 if (pmd_thp_or_huge(*pmdp)) {
1200 *pmdpp = pmdp;
1201 return true;
1202 }
7a3796d2
MZ
1203
1204 ptep = pte_offset_kernel(pmdp, addr);
1205 if (!ptep || pte_none(*ptep) || !pte_present(*ptep))
1206 return false;
1207
86d1c55e
PA
1208 *ptepp = ptep;
1209 return true;
1210}
1211
1212static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr)
1213{
1214 pud_t *pudp;
1215 pmd_t *pmdp;
1216 pte_t *ptep;
1217 bool found;
1218
1219 found = stage2_get_leaf_entry(kvm, addr, &pudp, &pmdp, &ptep);
1220 if (!found)
1221 return false;
1222
1223 if (pudp)
1224 return kvm_s2pud_exec(pudp);
1225 else if (pmdp)
1226 return kvm_s2pmd_exec(pmdp);
1227 else
1228 return kvm_s2pte_exec(ptep);
7a3796d2
MZ
1229}
1230
ad361f09 1231static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
1232 phys_addr_t addr, const pte_t *new_pte,
1233 unsigned long flags)
ad361f09 1234{
b8e0ba7c 1235 pud_t *pud;
ad361f09
CD
1236 pmd_t *pmd;
1237 pte_t *pte, old_pte;
15a49a44
MS
1238 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
1239 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
1240
1241 VM_BUG_ON(logging_active && !cache);
ad361f09 1242
38f791a4 1243 /* Create stage-2 page table mapping - Levels 0 and 1 */
b8e0ba7c
PA
1244 pud = stage2_get_pud(kvm, cache, addr);
1245 if (!pud) {
1246 /*
1247 * Ignore calls from kvm_set_spte_hva for unallocated
1248 * address ranges.
1249 */
1250 return 0;
1251 }
1252
1253 /*
1254 * While dirty page logging - dissolve huge PUD, then continue
1255 * on to allocate page.
1256 */
1257 if (logging_active)
1258 stage2_dissolve_pud(kvm, addr, pud);
1259
1260 if (stage2_pud_none(kvm, *pud)) {
1261 if (!cache)
1262 return 0; /* ignore calls from kvm_set_spte_hva */
1263 pmd = mmu_memory_cache_alloc(cache);
1264 stage2_pud_populate(kvm, pud, pmd);
1265 get_page(virt_to_page(pud));
1266 }
1267
1268 pmd = stage2_pmd_offset(kvm, pud, addr);
ad361f09
CD
1269 if (!pmd) {
1270 /*
1271 * Ignore calls from kvm_set_spte_hva for unallocated
1272 * address ranges.
1273 */
1274 return 0;
1275 }
1276
15a49a44
MS
1277 /*
1278 * While dirty page logging - dissolve huge PMD, then continue on to
1279 * allocate page.
1280 */
1281 if (logging_active)
1282 stage2_dissolve_pmd(kvm, addr, pmd);
1283
ad361f09 1284 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
1285 if (pmd_none(*pmd)) {
1286 if (!cache)
1287 return 0; /* ignore calls from kvm_set_spte_hva */
1288 pte = mmu_memory_cache_alloc(cache);
0db9dd8a 1289 kvm_pmd_populate(pmd, pte);
d5d8184d 1290 get_page(virt_to_page(pmd));
c62ee2b2
MZ
1291 }
1292
1293 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
1294
1295 if (iomap && pte_present(*pte))
1296 return -EFAULT;
1297
1298 /* Create 2nd stage page table mapping - Level 3 */
1299 old_pte = *pte;
d4b9e079 1300 if (pte_present(old_pte)) {
976d34e2
PA
1301 /* Skip page table update if there is no change */
1302 if (pte_val(old_pte) == pte_val(*new_pte))
1303 return 0;
1304
d4b9e079 1305 kvm_set_pte(pte, __pte(0));
48762767 1306 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 1307 } else {
d5d8184d 1308 get_page(virt_to_page(pte));
d4b9e079 1309 }
d5d8184d 1310
d4b9e079 1311 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
1312 return 0;
1313}
d5d8184d 1314
06485053
CM
1315#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1316static int stage2_ptep_test_and_clear_young(pte_t *pte)
1317{
1318 if (pte_young(*pte)) {
1319 *pte = pte_mkold(*pte);
1320 return 1;
1321 }
d5d8184d
CD
1322 return 0;
1323}
06485053
CM
1324#else
1325static int stage2_ptep_test_and_clear_young(pte_t *pte)
1326{
1327 return __ptep_test_and_clear_young(pte);
1328}
1329#endif
1330
1331static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
1332{
1333 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
1334}
d5d8184d 1335
35a63966
PA
1336static int stage2_pudp_test_and_clear_young(pud_t *pud)
1337{
1338 return stage2_ptep_test_and_clear_young((pte_t *)pud);
1339}
1340
d5d8184d
CD
1341/**
1342 * kvm_phys_addr_ioremap - map a device range to guest IPA
1343 *
1344 * @kvm: The KVM pointer
1345 * @guest_ipa: The IPA at which to insert the mapping
1346 * @pa: The physical address of the device
1347 * @size: The size of the mapping
1348 */
1349int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1350 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1351{
1352 phys_addr_t addr, end;
1353 int ret = 0;
1354 unsigned long pfn;
1355 struct kvm_mmu_memory_cache cache = { 0, };
1356
1357 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1358 pfn = __phys_to_pfn(pa);
1359
1360 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
f8df7338 1361 pte_t pte = kvm_pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1362
c40f2f8f 1363 if (writable)
06485053 1364 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1365
e55cac5b
SP
1366 ret = mmu_topup_memory_cache(&cache,
1367 kvm_mmu_cache_min_pages(kvm),
1368 KVM_NR_MEM_OBJS);
d5d8184d
CD
1369 if (ret)
1370 goto out;
1371 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1372 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1373 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1374 spin_unlock(&kvm->mmu_lock);
1375 if (ret)
1376 goto out;
1377
1378 pfn++;
1379 }
1380
1381out:
1382 mmu_free_memory_cache(&cache);
1383 return ret;
1384}
1385
ba049e93 1386static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1387{
ba049e93 1388 kvm_pfn_t pfn = *pfnp;
9b5fdb97 1389 gfn_t gfn = *ipap >> PAGE_SHIFT;
fd2ef358 1390 struct page *page = pfn_to_page(pfn);
9b5fdb97 1391
fd2ef358 1392 /*
6992195c 1393 * PageTransCompoundMap() returns true for THP and
fd2ef358
PA
1394 * hugetlbfs. Make sure the adjustment is done only for THP
1395 * pages.
1396 */
1397 if (!PageHuge(page) && PageTransCompoundMap(page)) {
9b5fdb97
CD
1398 unsigned long mask;
1399 /*
1400 * The address we faulted on is backed by a transparent huge
1401 * page. However, because we map the compound huge page and
1402 * not the individual tail page, we need to transfer the
1403 * refcount to the head page. We have to be careful that the
1404 * THP doesn't start to split while we are adjusting the
1405 * refcounts.
1406 *
1407 * We are sure this doesn't happen, because mmu_notifier_retry
1408 * was successful and we are holding the mmu_lock, so if this
1409 * THP is trying to split, it will be blocked in the mmu
1410 * notifier before touching any of the pages, specifically
1411 * before being able to call __split_huge_page_refcount().
1412 *
1413 * We can therefore safely transfer the refcount from PG_tail
1414 * to PG_head and switch the pfn from a tail page to the head
1415 * page accordingly.
1416 */
1417 mask = PTRS_PER_PMD - 1;
1418 VM_BUG_ON((gfn & mask) != (pfn & mask));
1419 if (pfn & mask) {
1420 *ipap &= PMD_MASK;
1421 kvm_release_pfn_clean(pfn);
1422 pfn &= ~mask;
1423 kvm_get_pfn(pfn);
1424 *pfnp = pfn;
1425 }
1426
1427 return true;
1428 }
1429
1430 return false;
1431}
1432
c6473555
MS
1433/**
1434 * stage2_wp_ptes - write protect PMD range
1435 * @pmd: pointer to pmd entry
1436 * @addr: range start address
1437 * @end: range end address
1438 */
1439static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1440{
1441 pte_t *pte;
1442
1443 pte = pte_offset_kernel(pmd, addr);
1444 do {
1445 if (!pte_none(*pte)) {
1446 if (!kvm_s2pte_readonly(pte))
1447 kvm_set_s2pte_readonly(pte);
1448 }
1449 } while (pte++, addr += PAGE_SIZE, addr != end);
1450}
1451
1452/**
1453 * stage2_wp_pmds - write protect PUD range
e55cac5b 1454 * kvm: kvm instance for the VM
c6473555
MS
1455 * @pud: pointer to pud entry
1456 * @addr: range start address
1457 * @end: range end address
1458 */
e55cac5b
SP
1459static void stage2_wp_pmds(struct kvm *kvm, pud_t *pud,
1460 phys_addr_t addr, phys_addr_t end)
c6473555
MS
1461{
1462 pmd_t *pmd;
1463 phys_addr_t next;
1464
e55cac5b 1465 pmd = stage2_pmd_offset(kvm, pud, addr);
c6473555
MS
1466
1467 do {
e55cac5b 1468 next = stage2_pmd_addr_end(kvm, addr, end);
c6473555 1469 if (!pmd_none(*pmd)) {
bbb3b6b3 1470 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1471 if (!kvm_s2pmd_readonly(pmd))
1472 kvm_set_s2pmd_readonly(pmd);
1473 } else {
1474 stage2_wp_ptes(pmd, addr, next);
1475 }
1476 }
1477 } while (pmd++, addr = next, addr != end);
1478}
1479
1480/**
1481 * stage2_wp_puds - write protect PGD range
1482 * @pgd: pointer to pgd entry
1483 * @addr: range start address
1484 * @end: range end address
1485 *
1486 * Process PUD entries, for a huge PUD we cause a panic.
1487 */
e55cac5b
SP
1488static void stage2_wp_puds(struct kvm *kvm, pgd_t *pgd,
1489 phys_addr_t addr, phys_addr_t end)
c6473555
MS
1490{
1491 pud_t *pud;
1492 phys_addr_t next;
1493
e55cac5b 1494 pud = stage2_pud_offset(kvm, pgd, addr);
c6473555 1495 do {
e55cac5b
SP
1496 next = stage2_pud_addr_end(kvm, addr, end);
1497 if (!stage2_pud_none(kvm, *pud)) {
4ea5af53
PA
1498 if (stage2_pud_huge(kvm, *pud)) {
1499 if (!kvm_s2pud_readonly(pud))
1500 kvm_set_s2pud_readonly(pud);
1501 } else {
1502 stage2_wp_pmds(kvm, pud, addr, next);
1503 }
c6473555
MS
1504 }
1505 } while (pud++, addr = next, addr != end);
1506}
1507
1508/**
1509 * stage2_wp_range() - write protect stage2 memory region range
1510 * @kvm: The KVM pointer
1511 * @addr: Start address of range
1512 * @end: End address of range
1513 */
1514static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1515{
1516 pgd_t *pgd;
1517 phys_addr_t next;
1518
e55cac5b 1519 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
c6473555
MS
1520 do {
1521 /*
1522 * Release kvm_mmu_lock periodically if the memory region is
1523 * large. Otherwise, we may see kernel panics with
227ea818
CD
1524 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1525 * CONFIG_LOCKDEP. Additionally, holding the lock too long
0c428a6a
SP
1526 * will also starve other vCPUs. We have to also make sure
1527 * that the page tables are not freed while we released
1528 * the lock.
c6473555 1529 */
0c428a6a
SP
1530 cond_resched_lock(&kvm->mmu_lock);
1531 if (!READ_ONCE(kvm->arch.pgd))
1532 break;
e55cac5b
SP
1533 next = stage2_pgd_addr_end(kvm, addr, end);
1534 if (stage2_pgd_present(kvm, *pgd))
1535 stage2_wp_puds(kvm, pgd, addr, next);
c6473555
MS
1536 } while (pgd++, addr = next, addr != end);
1537}
1538
1539/**
1540 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1541 * @kvm: The KVM pointer
1542 * @slot: The memory slot to write protect
1543 *
1544 * Called to start logging dirty pages after memory region
1545 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
4ea5af53 1546 * all present PUD, PMD and PTEs are write protected in the memory region.
c6473555
MS
1547 * Afterwards read of dirty page log can be called.
1548 *
1549 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1550 * serializing operations for VM memory regions.
1551 */
1552void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1553{
9f6b8029
PB
1554 struct kvm_memslots *slots = kvm_memslots(kvm);
1555 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1556 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1557 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1558
1559 spin_lock(&kvm->mmu_lock);
1560 stage2_wp_range(kvm, start, end);
1561 spin_unlock(&kvm->mmu_lock);
1562 kvm_flush_remote_tlbs(kvm);
1563}
53c810c3
MS
1564
1565/**
3b0f1d01 1566 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1567 * @kvm: The KVM pointer
1568 * @slot: The memory slot associated with mask
1569 * @gfn_offset: The gfn offset in memory slot
1570 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1571 * slot to be write protected
1572 *
1573 * Walks bits set in mask write protects the associated pte's. Caller must
1574 * acquire kvm_mmu_lock.
1575 */
3b0f1d01 1576static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1577 struct kvm_memory_slot *slot,
1578 gfn_t gfn_offset, unsigned long mask)
1579{
1580 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1581 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1582 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1583
1584 stage2_wp_range(kvm, start, end);
1585}
c6473555 1586
3b0f1d01
KH
1587/*
1588 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1589 * dirty pages.
1590 *
1591 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1592 * enable dirty logging for them.
1593 */
1594void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1595 struct kvm_memory_slot *slot,
1596 gfn_t gfn_offset, unsigned long mask)
1597{
1598 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1599}
1600
17ab9d57 1601static void clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size)
0d3e4d4f 1602{
17ab9d57 1603 __clean_dcache_guest_page(pfn, size);
a15f6939
MZ
1604}
1605
17ab9d57 1606static void invalidate_icache_guest_page(kvm_pfn_t pfn, unsigned long size)
a15f6939 1607{
17ab9d57 1608 __invalidate_icache_guest_page(pfn, size);
0d3e4d4f
MZ
1609}
1610
196f878a
JM
1611static void kvm_send_hwpoison_signal(unsigned long address,
1612 struct vm_area_struct *vma)
1613{
795a8371 1614 short lsb;
196f878a
JM
1615
1616 if (is_vm_hugetlb_page(vma))
795a8371 1617 lsb = huge_page_shift(hstate_vma(vma));
196f878a 1618 else
795a8371 1619 lsb = PAGE_SHIFT;
196f878a 1620
795a8371 1621 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb, current);
196f878a
JM
1622}
1623
a80868f3
SP
1624static bool fault_supports_stage2_huge_mapping(struct kvm_memory_slot *memslot,
1625 unsigned long hva,
1626 unsigned long map_size)
6794ad54 1627{
c2be79a0 1628 gpa_t gpa_start;
6794ad54
CD
1629 hva_t uaddr_start, uaddr_end;
1630 size_t size;
1631
1632 size = memslot->npages * PAGE_SIZE;
1633
1634 gpa_start = memslot->base_gfn << PAGE_SHIFT;
6794ad54
CD
1635
1636 uaddr_start = memslot->userspace_addr;
1637 uaddr_end = uaddr_start + size;
1638
1639 /*
1640 * Pages belonging to memslots that don't have the same alignment
a80868f3
SP
1641 * within a PMD/PUD for userspace and IPA cannot be mapped with stage-2
1642 * PMD/PUD entries, because we'll end up mapping the wrong pages.
6794ad54
CD
1643 *
1644 * Consider a layout like the following:
1645 *
1646 * memslot->userspace_addr:
1647 * +-----+--------------------+--------------------+---+
a80868f3 1648 * |abcde|fgh Stage-1 block | Stage-1 block tv|xyz|
6794ad54
CD
1649 * +-----+--------------------+--------------------+---+
1650 *
1651 * memslot->base_gfn << PAGE_SIZE:
1652 * +---+--------------------+--------------------+-----+
a80868f3 1653 * |abc|def Stage-2 block | Stage-2 block |tvxyz|
6794ad54
CD
1654 * +---+--------------------+--------------------+-----+
1655 *
a80868f3 1656 * If we create those stage-2 blocks, we'll end up with this incorrect
6794ad54
CD
1657 * mapping:
1658 * d -> f
1659 * e -> g
1660 * f -> h
1661 */
a80868f3 1662 if ((gpa_start & (map_size - 1)) != (uaddr_start & (map_size - 1)))
6794ad54
CD
1663 return false;
1664
1665 /*
1666 * Next, let's make sure we're not trying to map anything not covered
a80868f3
SP
1667 * by the memslot. This means we have to prohibit block size mappings
1668 * for the beginning and end of a non-block aligned and non-block sized
6794ad54
CD
1669 * memory slot (illustrated by the head and tail parts of the
1670 * userspace view above containing pages 'abcde' and 'xyz',
1671 * respectively).
1672 *
1673 * Note that it doesn't matter if we do the check using the
1674 * userspace_addr or the base_gfn, as both are equally aligned (per
1675 * the check above) and equally sized.
1676 */
a80868f3
SP
1677 return (hva & ~(map_size - 1)) >= uaddr_start &&
1678 (hva & ~(map_size - 1)) + map_size <= uaddr_end;
6794ad54
CD
1679}
1680
94f8e641 1681static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1682 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1683 unsigned long fault_status)
1684{
94f8e641 1685 int ret;
6396b852
PA
1686 bool write_fault, writable, force_pte = false;
1687 bool exec_fault, needs_exec;
94f8e641 1688 unsigned long mmu_seq;
ad361f09 1689 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1690 struct kvm *kvm = vcpu->kvm;
94f8e641 1691 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1692 struct vm_area_struct *vma;
ba049e93 1693 kvm_pfn_t pfn;
b8865767 1694 pgprot_t mem_type = PAGE_S2;
15a49a44 1695 bool logging_active = memslot_is_logging(memslot);
3f58bf63 1696 unsigned long vma_pagesize, flags = 0;
94f8e641 1697
a7d079ce 1698 write_fault = kvm_is_write_fault(vcpu);
d0e22b4a
MZ
1699 exec_fault = kvm_vcpu_trap_is_iabt(vcpu);
1700 VM_BUG_ON(write_fault && exec_fault);
1701
1702 if (fault_status == FSC_PERM && !write_fault && !exec_fault) {
94f8e641
CD
1703 kvm_err("Unexpected L2 read permission error\n");
1704 return -EFAULT;
1705 }
1706
ad361f09
CD
1707 /* Let's check if we will get back a huge page backed by hugetlbfs */
1708 down_read(&current->mm->mmap_sem);
1709 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1710 if (unlikely(!vma)) {
1711 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1712 up_read(&current->mm->mmap_sem);
1713 return -EFAULT;
1714 }
1715
3f58bf63 1716 vma_pagesize = vma_kernel_pagesize(vma);
a80868f3
SP
1717 if (logging_active ||
1718 !fault_supports_stage2_huge_mapping(memslot, hva, vma_pagesize)) {
1719 force_pte = true;
1720 vma_pagesize = PAGE_SIZE;
1721 }
1722
b8e0ba7c 1723 /*
280cebfd
SP
1724 * The stage2 has a minimum of 2 level table (For arm64 see
1725 * kvm_arm_setup_stage2()). Hence, we are guaranteed that we can
1726 * use PMD_SIZE huge mappings (even when the PMD is folded into PGD).
1727 * As for PUD huge maps, we must make sure that we have at least
1728 * 3 levels, i.e, PMD is not folded.
b8e0ba7c 1729 */
a80868f3
SP
1730 if (vma_pagesize == PMD_SIZE ||
1731 (vma_pagesize == PUD_SIZE && kvm_stage2_has_pmd(kvm)))
b8e0ba7c 1732 gfn = (fault_ipa & huge_page_mask(hstate_vma(vma))) >> PAGE_SHIFT;
ad361f09
CD
1733 up_read(&current->mm->mmap_sem);
1734
94f8e641 1735 /* We need minimum second+third level pages */
e55cac5b 1736 ret = mmu_topup_memory_cache(memcache, kvm_mmu_cache_min_pages(kvm),
38f791a4 1737 KVM_NR_MEM_OBJS);
94f8e641
CD
1738 if (ret)
1739 return ret;
1740
1741 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1742 /*
1743 * Ensure the read of mmu_notifier_seq happens before we call
1744 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1745 * the page we just got a reference to gets unmapped before we have a
1746 * chance to grab the mmu_lock, which ensure that if the page gets
1747 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1748 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1749 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1750 */
1751 smp_rmb();
1752
ad361f09 1753 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
196f878a
JM
1754 if (pfn == KVM_PFN_ERR_HWPOISON) {
1755 kvm_send_hwpoison_signal(hva, vma);
1756 return 0;
1757 }
9ac71595 1758 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1759 return -EFAULT;
1760
15a49a44 1761 if (kvm_is_device_pfn(pfn)) {
b8865767 1762 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1763 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1764 } else if (logging_active) {
1765 /*
1766 * Faults on pages in a memslot with logging enabled
1767 * should not be mapped with huge pages (it introduces churn
1768 * and performance degradation), so force a pte mapping.
1769 */
15a49a44
MS
1770 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1771
1772 /*
1773 * Only actually map the page as writable if this was a write
1774 * fault.
1775 */
1776 if (!write_fault)
1777 writable = false;
1778 }
b8865767 1779
ad361f09
CD
1780 spin_lock(&kvm->mmu_lock);
1781 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1782 goto out_unlock;
15a49a44 1783
3f58bf63
PA
1784 if (vma_pagesize == PAGE_SIZE && !force_pte) {
1785 /*
1786 * Only PMD_SIZE transparent hugepages(THP) are
1787 * currently supported. This code will need to be
1788 * updated to support other THP sizes.
1789 */
1790 if (transparent_hugepage_adjust(&pfn, &fault_ipa))
1791 vma_pagesize = PMD_SIZE;
1792 }
1793
1794 if (writable)
1795 kvm_set_pfn_dirty(pfn);
ad361f09 1796
3f58bf63
PA
1797 if (fault_status != FSC_PERM)
1798 clean_dcache_guest_page(pfn, vma_pagesize);
1799
1800 if (exec_fault)
1801 invalidate_icache_guest_page(pfn, vma_pagesize);
1802
6396b852
PA
1803 /*
1804 * If we took an execution fault we have made the
1805 * icache/dcache coherent above and should now let the s2
1806 * mapping be executable.
1807 *
1808 * Write faults (!exec_fault && FSC_PERM) are orthogonal to
1809 * execute permissions, and we preserve whatever we have.
1810 */
1811 needs_exec = exec_fault ||
1812 (fault_status == FSC_PERM && stage2_is_exec(kvm, fault_ipa));
1813
b8e0ba7c
PA
1814 if (vma_pagesize == PUD_SIZE) {
1815 pud_t new_pud = kvm_pfn_pud(pfn, mem_type);
1816
1817 new_pud = kvm_pud_mkhuge(new_pud);
1818 if (writable)
1819 new_pud = kvm_s2pud_mkwrite(new_pud);
1820
1821 if (needs_exec)
1822 new_pud = kvm_s2pud_mkexec(new_pud);
1823
1824 ret = stage2_set_pud_huge(kvm, memcache, fault_ipa, &new_pud);
1825 } else if (vma_pagesize == PMD_SIZE) {
f8df7338
PA
1826 pmd_t new_pmd = kvm_pfn_pmd(pfn, mem_type);
1827
1828 new_pmd = kvm_pmd_mkhuge(new_pmd);
1829
3f58bf63 1830 if (writable)
06485053 1831 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
d0e22b4a 1832
6396b852 1833 if (needs_exec)
d0e22b4a 1834 new_pmd = kvm_s2pmd_mkexec(new_pmd);
a15f6939 1835
ad361f09
CD
1836 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1837 } else {
f8df7338 1838 pte_t new_pte = kvm_pfn_pte(pfn, mem_type);
15a49a44 1839
ad361f09 1840 if (writable) {
06485053 1841 new_pte = kvm_s2pte_mkwrite(new_pte);
15a49a44 1842 mark_page_dirty(kvm, gfn);
ad361f09 1843 }
a9c0e12e 1844
6396b852 1845 if (needs_exec)
d0e22b4a 1846 new_pte = kvm_s2pte_mkexec(new_pte);
a15f6939 1847
15a49a44 1848 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1849 }
ad361f09 1850
94f8e641 1851out_unlock:
ad361f09 1852 spin_unlock(&kvm->mmu_lock);
35307b9a 1853 kvm_set_pfn_accessed(pfn);
94f8e641 1854 kvm_release_pfn_clean(pfn);
ad361f09 1855 return ret;
94f8e641
CD
1856}
1857
aeda9130
MZ
1858/*
1859 * Resolve the access fault by making the page young again.
1860 * Note that because the faulting entry is guaranteed not to be
1861 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1862 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1863 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1864 */
1865static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1866{
eb3f0624 1867 pud_t *pud;
aeda9130
MZ
1868 pmd_t *pmd;
1869 pte_t *pte;
ba049e93 1870 kvm_pfn_t pfn;
aeda9130
MZ
1871 bool pfn_valid = false;
1872
1873 trace_kvm_access_fault(fault_ipa);
1874
1875 spin_lock(&vcpu->kvm->mmu_lock);
1876
eb3f0624 1877 if (!stage2_get_leaf_entry(vcpu->kvm, fault_ipa, &pud, &pmd, &pte))
aeda9130
MZ
1878 goto out;
1879
eb3f0624
PA
1880 if (pud) { /* HugeTLB */
1881 *pud = kvm_s2pud_mkyoung(*pud);
1882 pfn = kvm_pud_pfn(*pud);
1883 pfn_valid = true;
1884 } else if (pmd) { /* THP, HugeTLB */
aeda9130
MZ
1885 *pmd = pmd_mkyoung(*pmd);
1886 pfn = pmd_pfn(*pmd);
1887 pfn_valid = true;
eb3f0624
PA
1888 } else {
1889 *pte = pte_mkyoung(*pte); /* Just a page... */
1890 pfn = pte_pfn(*pte);
1891 pfn_valid = true;
aeda9130
MZ
1892 }
1893
aeda9130
MZ
1894out:
1895 spin_unlock(&vcpu->kvm->mmu_lock);
1896 if (pfn_valid)
1897 kvm_set_pfn_accessed(pfn);
1898}
1899
94f8e641
CD
1900/**
1901 * kvm_handle_guest_abort - handles all 2nd stage aborts
1902 * @vcpu: the VCPU pointer
1903 * @run: the kvm_run structure
1904 *
1905 * Any abort that gets to the host is almost guaranteed to be caused by a
1906 * missing second stage translation table entry, which can mean that either the
1907 * guest simply needs more memory and we must allocate an appropriate page or it
1908 * can mean that the guest tried to access I/O memory, which is emulated by user
1909 * space. The distinction is based on the IPA causing the fault and whether this
1910 * memory region has been registered as standard RAM by user space.
1911 */
342cd0ab
CD
1912int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1913{
94f8e641
CD
1914 unsigned long fault_status;
1915 phys_addr_t fault_ipa;
1916 struct kvm_memory_slot *memslot;
98047888
CD
1917 unsigned long hva;
1918 bool is_iabt, write_fault, writable;
94f8e641
CD
1919 gfn_t gfn;
1920 int ret, idx;
1921
621f48e4
TB
1922 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
1923
1924 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
bb428921 1925 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
621f48e4 1926
bb428921
JM
1927 /* Synchronous External Abort? */
1928 if (kvm_vcpu_dabt_isextabt(vcpu)) {
1929 /*
1930 * For RAS the host kernel may handle this abort.
1931 * There is no need to pass the error into the guest.
1932 */
0db5e022 1933 if (!kvm_handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
621f48e4 1934 return 1;
621f48e4 1935
bb428921
JM
1936 if (unlikely(!is_iabt)) {
1937 kvm_inject_vabt(vcpu);
1938 return 1;
1939 }
4055710b
MZ
1940 }
1941
7393b599
MZ
1942 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1943 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1944
1945 /* Check the stage-2 fault is trans. fault or write fault */
35307b9a
MZ
1946 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1947 fault_status != FSC_ACCESS) {
0496daa5
CD
1948 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1949 kvm_vcpu_trap_get_class(vcpu),
1950 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1951 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1952 return -EFAULT;
1953 }
1954
1955 idx = srcu_read_lock(&vcpu->kvm->srcu);
1956
1957 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1958 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1959 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1960 write_fault = kvm_is_write_fault(vcpu);
98047888 1961 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1962 if (is_iabt) {
1963 /* Prefetch Abort on I/O address */
7393b599 1964 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1965 ret = 1;
1966 goto out_unlock;
1967 }
1968
57c841f1
MZ
1969 /*
1970 * Check for a cache maintenance operation. Since we
1971 * ended-up here, we know it is outside of any memory
1972 * slot. But we can't find out if that is for a device,
1973 * or if the guest is just being stupid. The only thing
1974 * we know for sure is that this range cannot be cached.
1975 *
1976 * So let's assume that the guest is just being
1977 * cautious, and skip the instruction.
1978 */
1979 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1980 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1981 ret = 1;
1982 goto out_unlock;
1983 }
1984
cfe3950c
MZ
1985 /*
1986 * The IPA is reported as [MAX:12], so we need to
1987 * complement it with the bottom 12 bits from the
1988 * faulting VA. This is always 12 bits, irrespective
1989 * of the page size.
1990 */
1991 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1992 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1993 goto out_unlock;
1994 }
1995
c3058d5d 1996 /* Userspace should not be able to register out-of-bounds IPAs */
e55cac5b 1997 VM_BUG_ON(fault_ipa >= kvm_phys_size(vcpu->kvm));
c3058d5d 1998
aeda9130
MZ
1999 if (fault_status == FSC_ACCESS) {
2000 handle_access_fault(vcpu, fault_ipa);
2001 ret = 1;
2002 goto out_unlock;
2003 }
2004
98047888 2005 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
2006 if (ret == 0)
2007 ret = 1;
2008out_unlock:
2009 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2010 return ret;
342cd0ab
CD
2011}
2012
1d2ebacc
MZ
2013static int handle_hva_to_gpa(struct kvm *kvm,
2014 unsigned long start,
2015 unsigned long end,
2016 int (*handler)(struct kvm *kvm,
056aad67
SP
2017 gpa_t gpa, u64 size,
2018 void *data),
1d2ebacc 2019 void *data)
d5d8184d
CD
2020{
2021 struct kvm_memslots *slots;
2022 struct kvm_memory_slot *memslot;
1d2ebacc 2023 int ret = 0;
d5d8184d
CD
2024
2025 slots = kvm_memslots(kvm);
2026
2027 /* we only care about the pages that the guest sees */
2028 kvm_for_each_memslot(memslot, slots) {
2029 unsigned long hva_start, hva_end;
056aad67 2030 gfn_t gpa;
d5d8184d
CD
2031
2032 hva_start = max(start, memslot->userspace_addr);
2033 hva_end = min(end, memslot->userspace_addr +
2034 (memslot->npages << PAGE_SHIFT));
2035 if (hva_start >= hva_end)
2036 continue;
2037
056aad67
SP
2038 gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
2039 ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
d5d8184d 2040 }
1d2ebacc
MZ
2041
2042 return ret;
d5d8184d
CD
2043}
2044
056aad67 2045static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d 2046{
056aad67 2047 unmap_stage2_range(kvm, gpa, size);
1d2ebacc 2048 return 0;
d5d8184d
CD
2049}
2050
d5d8184d
CD
2051int kvm_unmap_hva_range(struct kvm *kvm,
2052 unsigned long start, unsigned long end)
2053{
2054 if (!kvm->arch.pgd)
2055 return 0;
2056
2057 trace_kvm_unmap_hva_range(start, end);
2058 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
2059 return 0;
2060}
2061
056aad67 2062static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d
CD
2063{
2064 pte_t *pte = (pte_t *)data;
2065
056aad67 2066 WARN_ON(size != PAGE_SIZE);
15a49a44
MS
2067 /*
2068 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
2069 * flag clear because MMU notifiers will have unmapped a huge PMD before
2070 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
2071 * therefore stage2_set_pte() never needs to clear out a huge PMD
2072 * through this calling path.
2073 */
2074 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 2075 return 0;
d5d8184d
CD
2076}
2077
2078
748c0e31 2079int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
d5d8184d
CD
2080{
2081 unsigned long end = hva + PAGE_SIZE;
694556d5 2082 kvm_pfn_t pfn = pte_pfn(pte);
d5d8184d
CD
2083 pte_t stage2_pte;
2084
2085 if (!kvm->arch.pgd)
748c0e31 2086 return 0;
d5d8184d
CD
2087
2088 trace_kvm_set_spte_hva(hva);
694556d5
MZ
2089
2090 /*
2091 * We've moved a page around, probably through CoW, so let's treat it
2092 * just like a translation fault and clean the cache to the PoC.
2093 */
2094 clean_dcache_guest_page(pfn, PAGE_SIZE);
f8df7338 2095 stage2_pte = kvm_pfn_pte(pfn, PAGE_S2);
d5d8184d 2096 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
748c0e31
LT
2097
2098 return 0;
d5d8184d
CD
2099}
2100
056aad67 2101static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a 2102{
35a63966 2103 pud_t *pud;
35307b9a
MZ
2104 pmd_t *pmd;
2105 pte_t *pte;
2106
35a63966
PA
2107 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
2108 if (!stage2_get_leaf_entry(kvm, gpa, &pud, &pmd, &pte))
35307b9a
MZ
2109 return 0;
2110
35a63966
PA
2111 if (pud)
2112 return stage2_pudp_test_and_clear_young(pud);
2113 else if (pmd)
06485053 2114 return stage2_pmdp_test_and_clear_young(pmd);
35a63966
PA
2115 else
2116 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
2117}
2118
056aad67 2119static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a 2120{
35a63966 2121 pud_t *pud;
35307b9a
MZ
2122 pmd_t *pmd;
2123 pte_t *pte;
2124
35a63966
PA
2125 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
2126 if (!stage2_get_leaf_entry(kvm, gpa, &pud, &pmd, &pte))
35307b9a
MZ
2127 return 0;
2128
35a63966
PA
2129 if (pud)
2130 return kvm_s2pud_young(*pud);
2131 else if (pmd)
35307b9a 2132 return pmd_young(*pmd);
35a63966 2133 else
35307b9a 2134 return pte_young(*pte);
35307b9a
MZ
2135}
2136
2137int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
2138{
7e5a6722
SP
2139 if (!kvm->arch.pgd)
2140 return 0;
35307b9a
MZ
2141 trace_kvm_age_hva(start, end);
2142 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
2143}
2144
2145int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
2146{
7e5a6722
SP
2147 if (!kvm->arch.pgd)
2148 return 0;
35307b9a
MZ
2149 trace_kvm_test_age_hva(hva);
2150 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
2151}
2152
d5d8184d
CD
2153void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
2154{
2155 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
2156}
2157
342cd0ab
CD
2158phys_addr_t kvm_mmu_get_httbr(void)
2159{
e4c5a685
AB
2160 if (__kvm_cpu_uses_extended_idmap())
2161 return virt_to_phys(merged_hyp_pgd);
2162 else
2163 return virt_to_phys(hyp_pgd);
342cd0ab
CD
2164}
2165
5a677ce0
MZ
2166phys_addr_t kvm_get_idmap_vector(void)
2167{
2168 return hyp_idmap_vector;
2169}
2170
0535a3e2
MZ
2171static int kvm_map_idmap_text(pgd_t *pgd)
2172{
2173 int err;
2174
2175 /* Create the idmap in the boot page tables */
98732d1b 2176 err = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
0535a3e2
MZ
2177 hyp_idmap_start, hyp_idmap_end,
2178 __phys_to_pfn(hyp_idmap_start),
2179 PAGE_HYP_EXEC);
2180 if (err)
2181 kvm_err("Failed to idmap %lx-%lx\n",
2182 hyp_idmap_start, hyp_idmap_end);
2183
2184 return err;
2185}
2186
342cd0ab
CD
2187int kvm_mmu_init(void)
2188{
2fb41059
MZ
2189 int err;
2190
4fda342c 2191 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
46fef158 2192 hyp_idmap_start = ALIGN_DOWN(hyp_idmap_start, PAGE_SIZE);
4fda342c 2193 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
46fef158 2194 hyp_idmap_end = ALIGN(hyp_idmap_end, PAGE_SIZE);
4fda342c 2195 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 2196
06f75a1f
AB
2197 /*
2198 * We rely on the linker script to ensure at build time that the HYP
2199 * init code does not cross a page boundary.
2200 */
2201 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 2202
b4ef0499
MZ
2203 kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
2204 kvm_debug("HYP VA range: %lx:%lx\n",
2205 kern_hyp_va(PAGE_OFFSET),
2206 kern_hyp_va((unsigned long)high_memory - 1));
eac378a9 2207
6c41a413 2208 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
ed57cac8 2209 hyp_idmap_start < kern_hyp_va((unsigned long)high_memory - 1) &&
d2896d4b 2210 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
2211 /*
2212 * The idmap page is intersecting with the VA space,
2213 * it is not safe to continue further.
2214 */
2215 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
2216 err = -EINVAL;
2217 goto out;
2218 }
2219
38f791a4 2220 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 2221 if (!hyp_pgd) {
d5d8184d 2222 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
2223 err = -ENOMEM;
2224 goto out;
2225 }
2226
0535a3e2
MZ
2227 if (__kvm_cpu_uses_extended_idmap()) {
2228 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
2229 hyp_pgd_order);
2230 if (!boot_hyp_pgd) {
2231 kvm_err("Hyp boot PGD not allocated\n");
2232 err = -ENOMEM;
2233 goto out;
2234 }
2fb41059 2235
0535a3e2
MZ
2236 err = kvm_map_idmap_text(boot_hyp_pgd);
2237 if (err)
2238 goto out;
d5d8184d 2239
e4c5a685
AB
2240 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
2241 if (!merged_hyp_pgd) {
2242 kvm_err("Failed to allocate extra HYP pgd\n");
2243 goto out;
2244 }
2245 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
2246 hyp_idmap_start);
0535a3e2
MZ
2247 } else {
2248 err = kvm_map_idmap_text(hyp_pgd);
2249 if (err)
2250 goto out;
5a677ce0
MZ
2251 }
2252
e3f019b3 2253 io_map_base = hyp_idmap_start;
d5d8184d 2254 return 0;
2fb41059 2255out:
4f728276 2256 free_hyp_pgds();
2fb41059 2257 return err;
342cd0ab 2258}
df6ce24f
EA
2259
2260void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 2261 const struct kvm_userspace_memory_region *mem,
df6ce24f 2262 const struct kvm_memory_slot *old,
f36f3f28 2263 const struct kvm_memory_slot *new,
df6ce24f
EA
2264 enum kvm_mr_change change)
2265{
c6473555
MS
2266 /*
2267 * At this point memslot has been committed and there is an
2268 * allocated dirty_bitmap[], dirty pages will be be tracked while the
2269 * memory slot is write protected.
2270 */
2271 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
2272 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
2273}
2274
2275int kvm_arch_prepare_memory_region(struct kvm *kvm,
2276 struct kvm_memory_slot *memslot,
09170a49 2277 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
2278 enum kvm_mr_change change)
2279{
8eef9123
AB
2280 hva_t hva = mem->userspace_addr;
2281 hva_t reg_end = hva + mem->memory_size;
2282 bool writable = !(mem->flags & KVM_MEM_READONLY);
2283 int ret = 0;
2284
15a49a44
MS
2285 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
2286 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
2287 return 0;
2288
c3058d5d
CD
2289 /*
2290 * Prevent userspace from creating a memory region outside of the IPA
2291 * space addressable by the KVM guest IPA space.
2292 */
2293 if (memslot->base_gfn + memslot->npages >=
e55cac5b 2294 (kvm_phys_size(kvm) >> PAGE_SHIFT))
c3058d5d
CD
2295 return -EFAULT;
2296
72f31048 2297 down_read(&current->mm->mmap_sem);
8eef9123
AB
2298 /*
2299 * A memory region could potentially cover multiple VMAs, and any holes
2300 * between them, so iterate over all of them to find out if we can map
2301 * any of them right now.
2302 *
2303 * +--------------------------------------------+
2304 * +---------------+----------------+ +----------------+
2305 * | : VMA 1 | VMA 2 | | VMA 3 : |
2306 * +---------------+----------------+ +----------------+
2307 * | memory region |
2308 * +--------------------------------------------+
2309 */
2310 do {
2311 struct vm_area_struct *vma = find_vma(current->mm, hva);
2312 hva_t vm_start, vm_end;
2313
2314 if (!vma || vma->vm_start >= reg_end)
2315 break;
2316
2317 /*
2318 * Mapping a read-only VMA is only allowed if the
2319 * memory region is configured as read-only.
2320 */
2321 if (writable && !(vma->vm_flags & VM_WRITE)) {
2322 ret = -EPERM;
2323 break;
2324 }
2325
2326 /*
2327 * Take the intersection of this VMA with the memory region
2328 */
2329 vm_start = max(hva, vma->vm_start);
2330 vm_end = min(reg_end, vma->vm_end);
2331
2332 if (vma->vm_flags & VM_PFNMAP) {
2333 gpa_t gpa = mem->guest_phys_addr +
2334 (vm_start - mem->userspace_addr);
ca09f02f
MM
2335 phys_addr_t pa;
2336
2337 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
2338 pa += vm_start - vma->vm_start;
8eef9123 2339
15a49a44 2340 /* IO region dirty page logging not allowed */
72f31048
MZ
2341 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
2342 ret = -EINVAL;
2343 goto out;
2344 }
15a49a44 2345
8eef9123
AB
2346 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
2347 vm_end - vm_start,
2348 writable);
2349 if (ret)
2350 break;
2351 }
2352 hva = vm_end;
2353 } while (hva < reg_end);
2354
15a49a44 2355 if (change == KVM_MR_FLAGS_ONLY)
72f31048 2356 goto out;
15a49a44 2357
849260c7
AB
2358 spin_lock(&kvm->mmu_lock);
2359 if (ret)
8eef9123 2360 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
2361 else
2362 stage2_flush_memslot(kvm, memslot);
2363 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
2364out:
2365 up_read(&current->mm->mmap_sem);
8eef9123 2366 return ret;
df6ce24f
EA
2367}
2368
2369void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
2370 struct kvm_memory_slot *dont)
2371{
2372}
2373
2374int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
2375 unsigned long npages)
2376{
2377 return 0;
2378}
2379
15248258 2380void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
df6ce24f
EA
2381{
2382}
2383
2384void kvm_arch_flush_shadow_all(struct kvm *kvm)
2385{
293f2936 2386 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
2387}
2388
2389void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
2390 struct kvm_memory_slot *slot)
2391{
8eef9123
AB
2392 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
2393 phys_addr_t size = slot->npages << PAGE_SHIFT;
2394
2395 spin_lock(&kvm->mmu_lock);
2396 unmap_stage2_range(kvm, gpa, size);
2397 spin_unlock(&kvm->mmu_lock);
df6ce24f 2398}
3c1e7165
MZ
2399
2400/*
2401 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
2402 *
2403 * Main problems:
2404 * - S/W ops are local to a CPU (not broadcast)
2405 * - We have line migration behind our back (speculation)
2406 * - System caches don't support S/W at all (damn!)
2407 *
2408 * In the face of the above, the best we can do is to try and convert
2409 * S/W ops to VA ops. Because the guest is not allowed to infer the
2410 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
2411 * which is a rather good thing for us.
2412 *
2413 * Also, it is only used when turning caches on/off ("The expected
2414 * usage of the cache maintenance instructions that operate by set/way
2415 * is associated with the cache maintenance instructions associated
2416 * with the powerdown and powerup of caches, if this is required by
2417 * the implementation.").
2418 *
2419 * We use the following policy:
2420 *
2421 * - If we trap a S/W operation, we enable VM trapping to detect
2422 * caches being turned on/off, and do a full clean.
2423 *
2424 * - We flush the caches on both caches being turned on and off.
2425 *
2426 * - Once the caches are enabled, we stop trapping VM ops.
2427 */
2428void kvm_set_way_flush(struct kvm_vcpu *vcpu)
2429{
3df59d8d 2430 unsigned long hcr = *vcpu_hcr(vcpu);
3c1e7165
MZ
2431
2432 /*
2433 * If this is the first time we do a S/W operation
2434 * (i.e. HCR_TVM not set) flush the whole memory, and set the
2435 * VM trapping.
2436 *
2437 * Otherwise, rely on the VM trapping to wait for the MMU +
2438 * Caches to be turned off. At that point, we'll be able to
2439 * clean the caches again.
2440 */
2441 if (!(hcr & HCR_TVM)) {
2442 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
2443 vcpu_has_cache_enabled(vcpu));
2444 stage2_flush_vm(vcpu->kvm);
3df59d8d 2445 *vcpu_hcr(vcpu) = hcr | HCR_TVM;
3c1e7165
MZ
2446 }
2447}
2448
2449void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
2450{
2451 bool now_enabled = vcpu_has_cache_enabled(vcpu);
2452
2453 /*
2454 * If switching the MMU+caches on, need to invalidate the caches.
2455 * If switching it off, need to clean the caches.
2456 * Clean + invalidate does the trick always.
2457 */
2458 if (now_enabled != was_enabled)
2459 stage2_flush_vm(vcpu->kvm);
2460
2461 /* Caches are now on, stop trapping VM ops (until a S/W op) */
2462 if (now_enabled)
3df59d8d 2463 *vcpu_hcr(vcpu) &= ~HCR_TVM;
3c1e7165
MZ
2464
2465 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
2466}