KVM: arm/arm64: vgic-v3: Fix nr_pre_bits bitfield extraction
[linux-block.git] / virt / kvm / arm / mmu.c
CommitLineData
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
45e96ea6 23#include <trace/events/kvm.h>
342cd0ab 24#include <asm/pgalloc.h>
94f8e641 25#include <asm/cacheflush.h>
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26#include <asm/kvm_arm.h>
27#include <asm/kvm_mmu.h>
45e96ea6 28#include <asm/kvm_mmio.h>
d5d8184d 29#include <asm/kvm_asm.h>
94f8e641 30#include <asm/kvm_emulate.h>
1e947bad 31#include <asm/virt.h>
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32
33#include "trace.h"
342cd0ab 34
5a677ce0 35static pgd_t *boot_hyp_pgd;
2fb41059 36static pgd_t *hyp_pgd;
e4c5a685 37static pgd_t *merged_hyp_pgd;
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38static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
39
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40static unsigned long hyp_idmap_start;
41static unsigned long hyp_idmap_end;
42static phys_addr_t hyp_idmap_vector;
43
9163ee23 44#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t))
38f791a4 45#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 46
15a49a44
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47#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
48#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
49
50static bool memslot_is_logging(struct kvm_memory_slot *memslot)
51{
15a49a44 52 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
53}
54
55/**
56 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
57 * @kvm: pointer to kvm structure.
58 *
59 * Interface to HYP function to flush all VM TLB entries
60 */
61void kvm_flush_remote_tlbs(struct kvm *kvm)
62{
63 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 64}
ad361f09 65
48762767 66static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 67{
8684e701 68 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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69}
70
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71/*
72 * D-Cache management functions. They take the page table entries by
73 * value, as they are flushing the cache using the kernel mapping (or
74 * kmap on 32bit).
75 */
76static void kvm_flush_dcache_pte(pte_t pte)
77{
78 __kvm_flush_dcache_pte(pte);
79}
80
81static void kvm_flush_dcache_pmd(pmd_t pmd)
82{
83 __kvm_flush_dcache_pmd(pmd);
84}
85
86static void kvm_flush_dcache_pud(pud_t pud)
87{
88 __kvm_flush_dcache_pud(pud);
89}
90
e6fab544
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91static bool kvm_is_device_pfn(unsigned long pfn)
92{
93 return !pfn_valid(pfn);
94}
95
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96/**
97 * stage2_dissolve_pmd() - clear and flush huge PMD entry
98 * @kvm: pointer to kvm structure.
99 * @addr: IPA
100 * @pmd: pmd pointer for IPA
101 *
102 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
103 * pages in the range dirty.
104 */
105static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
106{
bbb3b6b3 107 if (!pmd_thp_or_huge(*pmd))
15a49a44
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108 return;
109
110 pmd_clear(pmd);
111 kvm_tlb_flush_vmid_ipa(kvm, addr);
112 put_page(virt_to_page(pmd));
113}
114
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115static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
116 int min, int max)
117{
118 void *page;
119
120 BUG_ON(max > KVM_NR_MEM_OBJS);
121 if (cache->nobjs >= min)
122 return 0;
123 while (cache->nobjs < max) {
124 page = (void *)__get_free_page(PGALLOC_GFP);
125 if (!page)
126 return -ENOMEM;
127 cache->objects[cache->nobjs++] = page;
128 }
129 return 0;
130}
131
132static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
133{
134 while (mc->nobjs)
135 free_page((unsigned long)mc->objects[--mc->nobjs]);
136}
137
138static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
139{
140 void *p;
141
142 BUG_ON(!mc || !mc->nobjs);
143 p = mc->objects[--mc->nobjs];
144 return p;
145}
146
7a1c831e 147static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 148{
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149 pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL);
150 stage2_pgd_clear(pgd);
4f853a71 151 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 152 stage2_pud_free(pud_table);
4f853a71 153 put_page(virt_to_page(pgd));
979acd5e
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154}
155
7a1c831e 156static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 157{
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158 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0);
159 VM_BUG_ON(stage2_pud_huge(*pud));
160 stage2_pud_clear(pud);
4f853a71 161 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 162 stage2_pmd_free(pmd_table);
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163 put_page(virt_to_page(pud));
164}
342cd0ab 165
7a1c831e 166static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 167{
4f853a71 168 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 169 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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170 pmd_clear(pmd);
171 kvm_tlb_flush_vmid_ipa(kvm, addr);
172 pte_free_kernel(NULL, pte_table);
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173 put_page(virt_to_page(pmd));
174}
175
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176/*
177 * Unmapping vs dcache management:
178 *
179 * If a guest maps certain memory pages as uncached, all writes will
180 * bypass the data cache and go directly to RAM. However, the CPUs
181 * can still speculate reads (not writes) and fill cache lines with
182 * data.
183 *
184 * Those cache lines will be *clean* cache lines though, so a
185 * clean+invalidate operation is equivalent to an invalidate
186 * operation, because no cache lines are marked dirty.
187 *
188 * Those clean cache lines could be filled prior to an uncached write
189 * by the guest, and the cache coherent IO subsystem would therefore
190 * end up writing old data to disk.
191 *
192 * This is why right after unmapping a page/section and invalidating
193 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
194 * the IO subsystem will never hit in the cache.
195 */
7a1c831e 196static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 197 phys_addr_t addr, phys_addr_t end)
4f728276 198{
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199 phys_addr_t start_addr = addr;
200 pte_t *pte, *start_pte;
201
202 start_pte = pte = pte_offset_kernel(pmd, addr);
203 do {
204 if (!pte_none(*pte)) {
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205 pte_t old_pte = *pte;
206
4f853a71 207 kvm_set_pte(pte, __pte(0));
4f853a71 208 kvm_tlb_flush_vmid_ipa(kvm, addr);
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209
210 /* No need to invalidate the cache for device mappings */
0de58f85 211 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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212 kvm_flush_dcache_pte(old_pte);
213
214 put_page(virt_to_page(pte));
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215 }
216 } while (pte++, addr += PAGE_SIZE, addr != end);
217
7a1c831e
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218 if (stage2_pte_table_empty(start_pte))
219 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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220}
221
7a1c831e 222static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 223 phys_addr_t addr, phys_addr_t end)
000d3996 224{
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225 phys_addr_t next, start_addr = addr;
226 pmd_t *pmd, *start_pmd;
000d3996 227
7a1c831e 228 start_pmd = pmd = stage2_pmd_offset(pud, addr);
4f853a71 229 do {
7a1c831e 230 next = stage2_pmd_addr_end(addr, end);
4f853a71 231 if (!pmd_none(*pmd)) {
bbb3b6b3 232 if (pmd_thp_or_huge(*pmd)) {
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233 pmd_t old_pmd = *pmd;
234
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235 pmd_clear(pmd);
236 kvm_tlb_flush_vmid_ipa(kvm, addr);
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237
238 kvm_flush_dcache_pmd(old_pmd);
239
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240 put_page(virt_to_page(pmd));
241 } else {
7a1c831e 242 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 243 }
ad361f09 244 }
4f853a71 245 } while (pmd++, addr = next, addr != end);
ad361f09 246
7a1c831e
SP
247 if (stage2_pmd_table_empty(start_pmd))
248 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 249}
000d3996 250
7a1c831e 251static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
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252 phys_addr_t addr, phys_addr_t end)
253{
254 phys_addr_t next, start_addr = addr;
255 pud_t *pud, *start_pud;
4f728276 256
7a1c831e 257 start_pud = pud = stage2_pud_offset(pgd, addr);
4f853a71 258 do {
7a1c831e
SP
259 next = stage2_pud_addr_end(addr, end);
260 if (!stage2_pud_none(*pud)) {
261 if (stage2_pud_huge(*pud)) {
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262 pud_t old_pud = *pud;
263
7a1c831e 264 stage2_pud_clear(pud);
4f853a71 265 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 266 kvm_flush_dcache_pud(old_pud);
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267 put_page(virt_to_page(pud));
268 } else {
7a1c831e 269 unmap_stage2_pmds(kvm, pud, addr, next);
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270 }
271 }
4f853a71 272 } while (pud++, addr = next, addr != end);
4f728276 273
7a1c831e
SP
274 if (stage2_pud_table_empty(start_pud))
275 clear_stage2_pgd_entry(kvm, pgd, start_addr);
4f853a71
CD
276}
277
7a1c831e
SP
278/**
279 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
280 * @kvm: The VM pointer
281 * @start: The intermediate physical base address of the range to unmap
282 * @size: The size of the area to unmap
283 *
284 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
285 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
286 * destroying the VM), otherwise another faulting VCPU may come in and mess
287 * with things behind our backs.
288 */
289static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
290{
291 pgd_t *pgd;
292 phys_addr_t addr = start, end = start + size;
293 phys_addr_t next;
294
8b3405e3 295 assert_spin_locked(&kvm->mmu_lock);
7a1c831e 296 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
4f853a71 297 do {
0c428a6a
SP
298 /*
299 * Make sure the page table is still active, as another thread
300 * could have possibly freed the page table, while we released
301 * the lock.
302 */
303 if (!READ_ONCE(kvm->arch.pgd))
304 break;
7a1c831e
SP
305 next = stage2_pgd_addr_end(addr, end);
306 if (!stage2_pgd_none(*pgd))
307 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
308 /*
309 * If the range is too large, release the kvm->mmu_lock
310 * to prevent starvation and lockup detector warnings.
311 */
312 if (next != end)
313 cond_resched_lock(&kvm->mmu_lock);
4f853a71 314 } while (pgd++, addr = next, addr != end);
000d3996
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315}
316
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MZ
317static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
318 phys_addr_t addr, phys_addr_t end)
319{
320 pte_t *pte;
321
322 pte = pte_offset_kernel(pmd, addr);
323 do {
0de58f85 324 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 325 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
326 } while (pte++, addr += PAGE_SIZE, addr != end);
327}
328
329static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
330 phys_addr_t addr, phys_addr_t end)
331{
332 pmd_t *pmd;
333 phys_addr_t next;
334
70fd1906 335 pmd = stage2_pmd_offset(pud, addr);
9d218a1f 336 do {
70fd1906 337 next = stage2_pmd_addr_end(addr, end);
9d218a1f 338 if (!pmd_none(*pmd)) {
bbb3b6b3 339 if (pmd_thp_or_huge(*pmd))
363ef89f
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340 kvm_flush_dcache_pmd(*pmd);
341 else
9d218a1f 342 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
343 }
344 } while (pmd++, addr = next, addr != end);
345}
346
347static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
348 phys_addr_t addr, phys_addr_t end)
349{
350 pud_t *pud;
351 phys_addr_t next;
352
70fd1906 353 pud = stage2_pud_offset(pgd, addr);
9d218a1f 354 do {
70fd1906
SP
355 next = stage2_pud_addr_end(addr, end);
356 if (!stage2_pud_none(*pud)) {
357 if (stage2_pud_huge(*pud))
363ef89f
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358 kvm_flush_dcache_pud(*pud);
359 else
9d218a1f 360 stage2_flush_pmds(kvm, pud, addr, next);
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361 }
362 } while (pud++, addr = next, addr != end);
363}
364
365static void stage2_flush_memslot(struct kvm *kvm,
366 struct kvm_memory_slot *memslot)
367{
368 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
369 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
370 phys_addr_t next;
371 pgd_t *pgd;
372
70fd1906 373 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
9d218a1f 374 do {
70fd1906 375 next = stage2_pgd_addr_end(addr, end);
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MZ
376 stage2_flush_puds(kvm, pgd, addr, next);
377 } while (pgd++, addr = next, addr != end);
378}
379
380/**
381 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
382 * @kvm: The struct kvm pointer
383 *
384 * Go through the stage 2 page tables and invalidate any cache lines
385 * backing memory already mapped to the VM.
386 */
3c1e7165 387static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
388{
389 struct kvm_memslots *slots;
390 struct kvm_memory_slot *memslot;
391 int idx;
392
393 idx = srcu_read_lock(&kvm->srcu);
394 spin_lock(&kvm->mmu_lock);
395
396 slots = kvm_memslots(kvm);
397 kvm_for_each_memslot(memslot, slots)
398 stage2_flush_memslot(kvm, memslot);
399
400 spin_unlock(&kvm->mmu_lock);
401 srcu_read_unlock(&kvm->srcu, idx);
402}
403
64f32497
SP
404static void clear_hyp_pgd_entry(pgd_t *pgd)
405{
406 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
407 pgd_clear(pgd);
408 pud_free(NULL, pud_table);
409 put_page(virt_to_page(pgd));
410}
411
412static void clear_hyp_pud_entry(pud_t *pud)
413{
414 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
415 VM_BUG_ON(pud_huge(*pud));
416 pud_clear(pud);
417 pmd_free(NULL, pmd_table);
418 put_page(virt_to_page(pud));
419}
420
421static void clear_hyp_pmd_entry(pmd_t *pmd)
422{
423 pte_t *pte_table = pte_offset_kernel(pmd, 0);
424 VM_BUG_ON(pmd_thp_or_huge(*pmd));
425 pmd_clear(pmd);
426 pte_free_kernel(NULL, pte_table);
427 put_page(virt_to_page(pmd));
428}
429
430static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
431{
432 pte_t *pte, *start_pte;
433
434 start_pte = pte = pte_offset_kernel(pmd, addr);
435 do {
436 if (!pte_none(*pte)) {
437 kvm_set_pte(pte, __pte(0));
438 put_page(virt_to_page(pte));
439 }
440 } while (pte++, addr += PAGE_SIZE, addr != end);
441
442 if (hyp_pte_table_empty(start_pte))
443 clear_hyp_pmd_entry(pmd);
444}
445
446static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
447{
448 phys_addr_t next;
449 pmd_t *pmd, *start_pmd;
450
451 start_pmd = pmd = pmd_offset(pud, addr);
452 do {
453 next = pmd_addr_end(addr, end);
454 /* Hyp doesn't use huge pmds */
455 if (!pmd_none(*pmd))
456 unmap_hyp_ptes(pmd, addr, next);
457 } while (pmd++, addr = next, addr != end);
458
459 if (hyp_pmd_table_empty(start_pmd))
460 clear_hyp_pud_entry(pud);
461}
462
463static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
464{
465 phys_addr_t next;
466 pud_t *pud, *start_pud;
467
468 start_pud = pud = pud_offset(pgd, addr);
469 do {
470 next = pud_addr_end(addr, end);
471 /* Hyp doesn't use huge puds */
472 if (!pud_none(*pud))
473 unmap_hyp_pmds(pud, addr, next);
474 } while (pud++, addr = next, addr != end);
475
476 if (hyp_pud_table_empty(start_pud))
477 clear_hyp_pgd_entry(pgd);
478}
479
480static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
481{
482 pgd_t *pgd;
483 phys_addr_t addr = start, end = start + size;
484 phys_addr_t next;
485
486 /*
487 * We don't unmap anything from HYP, except at the hyp tear down.
488 * Hence, we don't have to invalidate the TLBs here.
489 */
490 pgd = pgdp + pgd_index(addr);
491 do {
492 next = pgd_addr_end(addr, end);
493 if (!pgd_none(*pgd))
494 unmap_hyp_puds(pgd, addr, next);
495 } while (pgd++, addr = next, addr != end);
496}
497
342cd0ab 498/**
4f728276 499 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 500 *
5a677ce0
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501 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
502 * therefore contains either mappings in the kernel memory area (above
503 * PAGE_OFFSET), or device mappings in the vmalloc range (from
504 * VMALLOC_START to VMALLOC_END).
505 *
506 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 507 */
4f728276 508void free_hyp_pgds(void)
342cd0ab 509{
342cd0ab
CD
510 unsigned long addr;
511
d157f4a5 512 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 513
26781f9c
MZ
514 if (boot_hyp_pgd) {
515 unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
516 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
517 boot_hyp_pgd = NULL;
518 }
519
4f728276 520 if (hyp_pgd) {
26781f9c 521 unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE);
4f728276 522 for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
6c41a413 523 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
4f728276 524 for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
6c41a413 525 unmap_hyp_range(hyp_pgd, kern_hyp_va(addr), PGDIR_SIZE);
d4cb9df5 526
38f791a4 527 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 528 hyp_pgd = NULL;
4f728276 529 }
e4c5a685
AB
530 if (merged_hyp_pgd) {
531 clear_page(merged_hyp_pgd);
532 free_page((unsigned long)merged_hyp_pgd);
533 merged_hyp_pgd = NULL;
534 }
4f728276 535
342cd0ab
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536 mutex_unlock(&kvm_hyp_pgd_mutex);
537}
538
539static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
540 unsigned long end, unsigned long pfn,
541 pgprot_t prot)
342cd0ab
CD
542{
543 pte_t *pte;
544 unsigned long addr;
342cd0ab 545
3562c76d
MZ
546 addr = start;
547 do {
6060df84
MZ
548 pte = pte_offset_kernel(pmd, addr);
549 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 550 get_page(virt_to_page(pte));
5a677ce0 551 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 552 pfn++;
3562c76d 553 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
554}
555
556static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
557 unsigned long end, unsigned long pfn,
558 pgprot_t prot)
342cd0ab
CD
559{
560 pmd_t *pmd;
561 pte_t *pte;
562 unsigned long addr, next;
563
3562c76d
MZ
564 addr = start;
565 do {
6060df84 566 pmd = pmd_offset(pud, addr);
342cd0ab
CD
567
568 BUG_ON(pmd_sect(*pmd));
569
570 if (pmd_none(*pmd)) {
6060df84 571 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
572 if (!pte) {
573 kvm_err("Cannot allocate Hyp pte\n");
574 return -ENOMEM;
575 }
576 pmd_populate_kernel(NULL, pmd, pte);
4f728276 577 get_page(virt_to_page(pmd));
5a677ce0 578 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
579 }
580
581 next = pmd_addr_end(addr, end);
582
6060df84
MZ
583 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
584 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 585 } while (addr = next, addr != end);
342cd0ab
CD
586
587 return 0;
588}
589
38f791a4
CD
590static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
591 unsigned long end, unsigned long pfn,
592 pgprot_t prot)
593{
594 pud_t *pud;
595 pmd_t *pmd;
596 unsigned long addr, next;
597 int ret;
598
599 addr = start;
600 do {
601 pud = pud_offset(pgd, addr);
602
603 if (pud_none_or_clear_bad(pud)) {
604 pmd = pmd_alloc_one(NULL, addr);
605 if (!pmd) {
606 kvm_err("Cannot allocate Hyp pmd\n");
607 return -ENOMEM;
608 }
609 pud_populate(NULL, pud, pmd);
610 get_page(virt_to_page(pud));
611 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
612 }
613
614 next = pud_addr_end(addr, end);
615 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
616 if (ret)
617 return ret;
618 pfn += (next - addr) >> PAGE_SHIFT;
619 } while (addr = next, addr != end);
620
621 return 0;
622}
623
6060df84
MZ
624static int __create_hyp_mappings(pgd_t *pgdp,
625 unsigned long start, unsigned long end,
626 unsigned long pfn, pgprot_t prot)
342cd0ab 627{
342cd0ab
CD
628 pgd_t *pgd;
629 pud_t *pud;
342cd0ab
CD
630 unsigned long addr, next;
631 int err = 0;
632
342cd0ab 633 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
634 addr = start & PAGE_MASK;
635 end = PAGE_ALIGN(end);
636 do {
6060df84 637 pgd = pgdp + pgd_index(addr);
342cd0ab 638
38f791a4
CD
639 if (pgd_none(*pgd)) {
640 pud = pud_alloc_one(NULL, addr);
641 if (!pud) {
642 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
643 err = -ENOMEM;
644 goto out;
645 }
38f791a4
CD
646 pgd_populate(NULL, pgd, pud);
647 get_page(virt_to_page(pgd));
648 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
649 }
650
651 next = pgd_addr_end(addr, end);
38f791a4 652 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
653 if (err)
654 goto out;
6060df84 655 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 656 } while (addr = next, addr != end);
342cd0ab
CD
657out:
658 mutex_unlock(&kvm_hyp_pgd_mutex);
659 return err;
660}
661
40c2729b
CD
662static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
663{
664 if (!is_vmalloc_addr(kaddr)) {
665 BUG_ON(!virt_addr_valid(kaddr));
666 return __pa(kaddr);
667 } else {
668 return page_to_phys(vmalloc_to_page(kaddr)) +
669 offset_in_page(kaddr);
670 }
671}
672
342cd0ab 673/**
06e8c3b0 674 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
675 * @from: The virtual kernel start address of the range
676 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 677 * @prot: The protection to be applied to this range
342cd0ab 678 *
06e8c3b0
MZ
679 * The same virtual address as the kernel virtual address is also used
680 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
681 * physical pages.
342cd0ab 682 */
c8dddecd 683int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 684{
40c2729b
CD
685 phys_addr_t phys_addr;
686 unsigned long virt_addr;
6c41a413
MZ
687 unsigned long start = kern_hyp_va((unsigned long)from);
688 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 689
1e947bad
MZ
690 if (is_kernel_in_hyp_mode())
691 return 0;
692
40c2729b
CD
693 start = start & PAGE_MASK;
694 end = PAGE_ALIGN(end);
6060df84 695
40c2729b
CD
696 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
697 int err;
6060df84 698
40c2729b
CD
699 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
700 err = __create_hyp_mappings(hyp_pgd, virt_addr,
701 virt_addr + PAGE_SIZE,
702 __phys_to_pfn(phys_addr),
c8dddecd 703 prot);
40c2729b
CD
704 if (err)
705 return err;
706 }
707
708 return 0;
342cd0ab
CD
709}
710
711/**
06e8c3b0
MZ
712 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
713 * @from: The kernel start VA of the range
714 * @to: The kernel end VA of the range (exclusive)
6060df84 715 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
716 *
717 * The resulting HYP VA is the same as the kernel VA, modulo
718 * HYP_PAGE_OFFSET.
342cd0ab 719 */
6060df84 720int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 721{
6c41a413
MZ
722 unsigned long start = kern_hyp_va((unsigned long)from);
723 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 724
1e947bad
MZ
725 if (is_kernel_in_hyp_mode())
726 return 0;
727
6060df84
MZ
728 /* Check for a valid kernel IO mapping */
729 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
730 return -EINVAL;
731
732 return __create_hyp_mappings(hyp_pgd, start, end,
733 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
734}
735
d5d8184d
CD
736/**
737 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
738 * @kvm: The KVM struct pointer for the VM.
739 *
9d4dc688
VM
740 * Allocates only the stage-2 HW PGD level table(s) (can support either full
741 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
742 * allocated pages.
d5d8184d
CD
743 *
744 * Note we don't need locking here as this is only called when the VM is
745 * created, which can only be done once.
746 */
747int kvm_alloc_stage2_pgd(struct kvm *kvm)
748{
749 pgd_t *pgd;
750
751 if (kvm->arch.pgd != NULL) {
752 kvm_err("kvm_arch already initialized?\n");
753 return -EINVAL;
754 }
755
9163ee23
SP
756 /* Allocate the HW PGD, making sure that each page gets its own refcount */
757 pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO);
758 if (!pgd)
a987370f
MZ
759 return -ENOMEM;
760
d5d8184d 761 kvm->arch.pgd = pgd;
d5d8184d
CD
762 return 0;
763}
764
957db105
CD
765static void stage2_unmap_memslot(struct kvm *kvm,
766 struct kvm_memory_slot *memslot)
767{
768 hva_t hva = memslot->userspace_addr;
769 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
770 phys_addr_t size = PAGE_SIZE * memslot->npages;
771 hva_t reg_end = hva + size;
772
773 /*
774 * A memory region could potentially cover multiple VMAs, and any holes
775 * between them, so iterate over all of them to find out if we should
776 * unmap any of them.
777 *
778 * +--------------------------------------------+
779 * +---------------+----------------+ +----------------+
780 * | : VMA 1 | VMA 2 | | VMA 3 : |
781 * +---------------+----------------+ +----------------+
782 * | memory region |
783 * +--------------------------------------------+
784 */
785 do {
786 struct vm_area_struct *vma = find_vma(current->mm, hva);
787 hva_t vm_start, vm_end;
788
789 if (!vma || vma->vm_start >= reg_end)
790 break;
791
792 /*
793 * Take the intersection of this VMA with the memory region
794 */
795 vm_start = max(hva, vma->vm_start);
796 vm_end = min(reg_end, vma->vm_end);
797
798 if (!(vma->vm_flags & VM_PFNMAP)) {
799 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
800 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
801 }
802 hva = vm_end;
803 } while (hva < reg_end);
804}
805
806/**
807 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
808 * @kvm: The struct kvm pointer
809 *
810 * Go through the memregions and unmap any reguler RAM
811 * backing memory already mapped to the VM.
812 */
813void stage2_unmap_vm(struct kvm *kvm)
814{
815 struct kvm_memslots *slots;
816 struct kvm_memory_slot *memslot;
817 int idx;
818
819 idx = srcu_read_lock(&kvm->srcu);
90f6e150 820 down_read(&current->mm->mmap_sem);
957db105
CD
821 spin_lock(&kvm->mmu_lock);
822
823 slots = kvm_memslots(kvm);
824 kvm_for_each_memslot(memslot, slots)
825 stage2_unmap_memslot(kvm, memslot);
826
827 spin_unlock(&kvm->mmu_lock);
90f6e150 828 up_read(&current->mm->mmap_sem);
957db105
CD
829 srcu_read_unlock(&kvm->srcu, idx);
830}
831
d5d8184d
CD
832/**
833 * kvm_free_stage2_pgd - free all stage-2 tables
834 * @kvm: The KVM struct pointer for the VM.
835 *
836 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
837 * underlying level-2 and level-3 tables before freeing the actual level-1 table
838 * and setting the struct pointer to NULL.
d5d8184d
CD
839 */
840void kvm_free_stage2_pgd(struct kvm *kvm)
841{
6c0d706b 842 void *pgd = NULL;
d5d8184d 843
8b3405e3 844 spin_lock(&kvm->mmu_lock);
6c0d706b
SP
845 if (kvm->arch.pgd) {
846 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
2952a607 847 pgd = READ_ONCE(kvm->arch.pgd);
6c0d706b
SP
848 kvm->arch.pgd = NULL;
849 }
8b3405e3
SP
850 spin_unlock(&kvm->mmu_lock);
851
9163ee23 852 /* Free the HW pgd, one page at a time */
6c0d706b
SP
853 if (pgd)
854 free_pages_exact(pgd, S2_PGD_SIZE);
d5d8184d
CD
855}
856
38f791a4 857static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 858 phys_addr_t addr)
d5d8184d
CD
859{
860 pgd_t *pgd;
861 pud_t *pud;
d5d8184d 862
70fd1906
SP
863 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
864 if (WARN_ON(stage2_pgd_none(*pgd))) {
38f791a4
CD
865 if (!cache)
866 return NULL;
867 pud = mmu_memory_cache_alloc(cache);
70fd1906 868 stage2_pgd_populate(pgd, pud);
38f791a4
CD
869 get_page(virt_to_page(pgd));
870 }
871
70fd1906 872 return stage2_pud_offset(pgd, addr);
38f791a4
CD
873}
874
875static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
876 phys_addr_t addr)
877{
878 pud_t *pud;
879 pmd_t *pmd;
880
881 pud = stage2_get_pud(kvm, cache, addr);
70fd1906 882 if (stage2_pud_none(*pud)) {
d5d8184d 883 if (!cache)
ad361f09 884 return NULL;
d5d8184d 885 pmd = mmu_memory_cache_alloc(cache);
70fd1906 886 stage2_pud_populate(pud, pmd);
d5d8184d 887 get_page(virt_to_page(pud));
c62ee2b2
MZ
888 }
889
70fd1906 890 return stage2_pmd_offset(pud, addr);
ad361f09
CD
891}
892
893static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
894 *cache, phys_addr_t addr, const pmd_t *new_pmd)
895{
896 pmd_t *pmd, old_pmd;
897
898 pmd = stage2_get_pmd(kvm, cache, addr);
899 VM_BUG_ON(!pmd);
d5d8184d 900
ad361f09
CD
901 /*
902 * Mapping in huge pages should only happen through a fault. If a
903 * page is merged into a transparent huge page, the individual
904 * subpages of that huge page should be unmapped through MMU
905 * notifiers before we get here.
906 *
907 * Merging of CompoundPages is not supported; they should become
908 * splitting first, unmapped, merged, and mapped back in on-demand.
909 */
910 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
911
912 old_pmd = *pmd;
d4b9e079
MZ
913 if (pmd_present(old_pmd)) {
914 pmd_clear(pmd);
ad361f09 915 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 916 } else {
ad361f09 917 get_page(virt_to_page(pmd));
d4b9e079
MZ
918 }
919
920 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
921 return 0;
922}
923
924static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
925 phys_addr_t addr, const pte_t *new_pte,
926 unsigned long flags)
ad361f09
CD
927{
928 pmd_t *pmd;
929 pte_t *pte, old_pte;
15a49a44
MS
930 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
931 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
932
933 VM_BUG_ON(logging_active && !cache);
ad361f09 934
38f791a4 935 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
936 pmd = stage2_get_pmd(kvm, cache, addr);
937 if (!pmd) {
938 /*
939 * Ignore calls from kvm_set_spte_hva for unallocated
940 * address ranges.
941 */
942 return 0;
943 }
944
15a49a44
MS
945 /*
946 * While dirty page logging - dissolve huge PMD, then continue on to
947 * allocate page.
948 */
949 if (logging_active)
950 stage2_dissolve_pmd(kvm, addr, pmd);
951
ad361f09 952 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
953 if (pmd_none(*pmd)) {
954 if (!cache)
955 return 0; /* ignore calls from kvm_set_spte_hva */
956 pte = mmu_memory_cache_alloc(cache);
d5d8184d 957 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 958 get_page(virt_to_page(pmd));
c62ee2b2
MZ
959 }
960
961 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
962
963 if (iomap && pte_present(*pte))
964 return -EFAULT;
965
966 /* Create 2nd stage page table mapping - Level 3 */
967 old_pte = *pte;
d4b9e079
MZ
968 if (pte_present(old_pte)) {
969 kvm_set_pte(pte, __pte(0));
48762767 970 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 971 } else {
d5d8184d 972 get_page(virt_to_page(pte));
d4b9e079 973 }
d5d8184d 974
d4b9e079 975 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
976 return 0;
977}
d5d8184d 978
06485053
CM
979#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
980static int stage2_ptep_test_and_clear_young(pte_t *pte)
981{
982 if (pte_young(*pte)) {
983 *pte = pte_mkold(*pte);
984 return 1;
985 }
d5d8184d
CD
986 return 0;
987}
06485053
CM
988#else
989static int stage2_ptep_test_and_clear_young(pte_t *pte)
990{
991 return __ptep_test_and_clear_young(pte);
992}
993#endif
994
995static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
996{
997 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
998}
d5d8184d
CD
999
1000/**
1001 * kvm_phys_addr_ioremap - map a device range to guest IPA
1002 *
1003 * @kvm: The KVM pointer
1004 * @guest_ipa: The IPA at which to insert the mapping
1005 * @pa: The physical address of the device
1006 * @size: The size of the mapping
1007 */
1008int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1009 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1010{
1011 phys_addr_t addr, end;
1012 int ret = 0;
1013 unsigned long pfn;
1014 struct kvm_mmu_memory_cache cache = { 0, };
1015
1016 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1017 pfn = __phys_to_pfn(pa);
1018
1019 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1020 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1021
c40f2f8f 1022 if (writable)
06485053 1023 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1024
38f791a4
CD
1025 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
1026 KVM_NR_MEM_OBJS);
d5d8184d
CD
1027 if (ret)
1028 goto out;
1029 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1030 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1031 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1032 spin_unlock(&kvm->mmu_lock);
1033 if (ret)
1034 goto out;
1035
1036 pfn++;
1037 }
1038
1039out:
1040 mmu_free_memory_cache(&cache);
1041 return ret;
1042}
1043
ba049e93 1044static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1045{
ba049e93 1046 kvm_pfn_t pfn = *pfnp;
9b5fdb97
CD
1047 gfn_t gfn = *ipap >> PAGE_SHIFT;
1048
127393fb 1049 if (PageTransCompoundMap(pfn_to_page(pfn))) {
9b5fdb97
CD
1050 unsigned long mask;
1051 /*
1052 * The address we faulted on is backed by a transparent huge
1053 * page. However, because we map the compound huge page and
1054 * not the individual tail page, we need to transfer the
1055 * refcount to the head page. We have to be careful that the
1056 * THP doesn't start to split while we are adjusting the
1057 * refcounts.
1058 *
1059 * We are sure this doesn't happen, because mmu_notifier_retry
1060 * was successful and we are holding the mmu_lock, so if this
1061 * THP is trying to split, it will be blocked in the mmu
1062 * notifier before touching any of the pages, specifically
1063 * before being able to call __split_huge_page_refcount().
1064 *
1065 * We can therefore safely transfer the refcount from PG_tail
1066 * to PG_head and switch the pfn from a tail page to the head
1067 * page accordingly.
1068 */
1069 mask = PTRS_PER_PMD - 1;
1070 VM_BUG_ON((gfn & mask) != (pfn & mask));
1071 if (pfn & mask) {
1072 *ipap &= PMD_MASK;
1073 kvm_release_pfn_clean(pfn);
1074 pfn &= ~mask;
1075 kvm_get_pfn(pfn);
1076 *pfnp = pfn;
1077 }
1078
1079 return true;
1080 }
1081
1082 return false;
1083}
1084
a7d079ce
AB
1085static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1086{
1087 if (kvm_vcpu_trap_is_iabt(vcpu))
1088 return false;
1089
1090 return kvm_vcpu_dabt_iswrite(vcpu);
1091}
1092
c6473555
MS
1093/**
1094 * stage2_wp_ptes - write protect PMD range
1095 * @pmd: pointer to pmd entry
1096 * @addr: range start address
1097 * @end: range end address
1098 */
1099static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1100{
1101 pte_t *pte;
1102
1103 pte = pte_offset_kernel(pmd, addr);
1104 do {
1105 if (!pte_none(*pte)) {
1106 if (!kvm_s2pte_readonly(pte))
1107 kvm_set_s2pte_readonly(pte);
1108 }
1109 } while (pte++, addr += PAGE_SIZE, addr != end);
1110}
1111
1112/**
1113 * stage2_wp_pmds - write protect PUD range
1114 * @pud: pointer to pud entry
1115 * @addr: range start address
1116 * @end: range end address
1117 */
1118static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1119{
1120 pmd_t *pmd;
1121 phys_addr_t next;
1122
70fd1906 1123 pmd = stage2_pmd_offset(pud, addr);
c6473555
MS
1124
1125 do {
70fd1906 1126 next = stage2_pmd_addr_end(addr, end);
c6473555 1127 if (!pmd_none(*pmd)) {
bbb3b6b3 1128 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1129 if (!kvm_s2pmd_readonly(pmd))
1130 kvm_set_s2pmd_readonly(pmd);
1131 } else {
1132 stage2_wp_ptes(pmd, addr, next);
1133 }
1134 }
1135 } while (pmd++, addr = next, addr != end);
1136}
1137
1138/**
1139 * stage2_wp_puds - write protect PGD range
1140 * @pgd: pointer to pgd entry
1141 * @addr: range start address
1142 * @end: range end address
1143 *
1144 * Process PUD entries, for a huge PUD we cause a panic.
1145 */
1146static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1147{
1148 pud_t *pud;
1149 phys_addr_t next;
1150
70fd1906 1151 pud = stage2_pud_offset(pgd, addr);
c6473555 1152 do {
70fd1906
SP
1153 next = stage2_pud_addr_end(addr, end);
1154 if (!stage2_pud_none(*pud)) {
c6473555 1155 /* TODO:PUD not supported, revisit later if supported */
70fd1906 1156 BUG_ON(stage2_pud_huge(*pud));
c6473555
MS
1157 stage2_wp_pmds(pud, addr, next);
1158 }
1159 } while (pud++, addr = next, addr != end);
1160}
1161
1162/**
1163 * stage2_wp_range() - write protect stage2 memory region range
1164 * @kvm: The KVM pointer
1165 * @addr: Start address of range
1166 * @end: End address of range
1167 */
1168static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1169{
1170 pgd_t *pgd;
1171 phys_addr_t next;
1172
70fd1906 1173 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
c6473555
MS
1174 do {
1175 /*
1176 * Release kvm_mmu_lock periodically if the memory region is
1177 * large. Otherwise, we may see kernel panics with
227ea818
CD
1178 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1179 * CONFIG_LOCKDEP. Additionally, holding the lock too long
0c428a6a
SP
1180 * will also starve other vCPUs. We have to also make sure
1181 * that the page tables are not freed while we released
1182 * the lock.
c6473555 1183 */
0c428a6a
SP
1184 cond_resched_lock(&kvm->mmu_lock);
1185 if (!READ_ONCE(kvm->arch.pgd))
1186 break;
70fd1906
SP
1187 next = stage2_pgd_addr_end(addr, end);
1188 if (stage2_pgd_present(*pgd))
c6473555
MS
1189 stage2_wp_puds(pgd, addr, next);
1190 } while (pgd++, addr = next, addr != end);
1191}
1192
1193/**
1194 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1195 * @kvm: The KVM pointer
1196 * @slot: The memory slot to write protect
1197 *
1198 * Called to start logging dirty pages after memory region
1199 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1200 * all present PMD and PTEs are write protected in the memory region.
1201 * Afterwards read of dirty page log can be called.
1202 *
1203 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1204 * serializing operations for VM memory regions.
1205 */
1206void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1207{
9f6b8029
PB
1208 struct kvm_memslots *slots = kvm_memslots(kvm);
1209 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1210 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1211 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1212
1213 spin_lock(&kvm->mmu_lock);
1214 stage2_wp_range(kvm, start, end);
1215 spin_unlock(&kvm->mmu_lock);
1216 kvm_flush_remote_tlbs(kvm);
1217}
53c810c3
MS
1218
1219/**
3b0f1d01 1220 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1221 * @kvm: The KVM pointer
1222 * @slot: The memory slot associated with mask
1223 * @gfn_offset: The gfn offset in memory slot
1224 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1225 * slot to be write protected
1226 *
1227 * Walks bits set in mask write protects the associated pte's. Caller must
1228 * acquire kvm_mmu_lock.
1229 */
3b0f1d01 1230static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1231 struct kvm_memory_slot *slot,
1232 gfn_t gfn_offset, unsigned long mask)
1233{
1234 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1235 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1236 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1237
1238 stage2_wp_range(kvm, start, end);
1239}
c6473555 1240
3b0f1d01
KH
1241/*
1242 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1243 * dirty pages.
1244 *
1245 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1246 * enable dirty logging for them.
1247 */
1248void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1249 struct kvm_memory_slot *slot,
1250 gfn_t gfn_offset, unsigned long mask)
1251{
1252 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1253}
1254
ba049e93 1255static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
13b7756c 1256 unsigned long size)
0d3e4d4f 1257{
13b7756c 1258 __coherent_cache_guest_page(vcpu, pfn, size);
0d3e4d4f
MZ
1259}
1260
94f8e641 1261static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1262 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1263 unsigned long fault_status)
1264{
94f8e641 1265 int ret;
9b5fdb97 1266 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1267 unsigned long mmu_seq;
ad361f09 1268 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1269 struct kvm *kvm = vcpu->kvm;
94f8e641 1270 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1271 struct vm_area_struct *vma;
ba049e93 1272 kvm_pfn_t pfn;
b8865767 1273 pgprot_t mem_type = PAGE_S2;
15a49a44
MS
1274 bool logging_active = memslot_is_logging(memslot);
1275 unsigned long flags = 0;
94f8e641 1276
a7d079ce 1277 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1278 if (fault_status == FSC_PERM && !write_fault) {
1279 kvm_err("Unexpected L2 read permission error\n");
1280 return -EFAULT;
1281 }
1282
ad361f09
CD
1283 /* Let's check if we will get back a huge page backed by hugetlbfs */
1284 down_read(&current->mm->mmap_sem);
1285 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1286 if (unlikely(!vma)) {
1287 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1288 up_read(&current->mm->mmap_sem);
1289 return -EFAULT;
1290 }
1291
15a49a44 1292 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1293 hugetlb = true;
1294 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1295 } else {
1296 /*
136d737f
MZ
1297 * Pages belonging to memslots that don't have the same
1298 * alignment for userspace and IPA cannot be mapped using
1299 * block descriptors even if the pages belong to a THP for
1300 * the process, because the stage-2 block descriptor will
1301 * cover more than a single THP and we loose atomicity for
1302 * unmapping, updates, and splits of the THP or other pages
1303 * in the stage-2 block range.
9b5fdb97 1304 */
136d737f
MZ
1305 if ((memslot->userspace_addr & ~PMD_MASK) !=
1306 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1307 force_pte = true;
ad361f09
CD
1308 }
1309 up_read(&current->mm->mmap_sem);
1310
94f8e641 1311 /* We need minimum second+third level pages */
38f791a4
CD
1312 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1313 KVM_NR_MEM_OBJS);
94f8e641
CD
1314 if (ret)
1315 return ret;
1316
1317 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1318 /*
1319 * Ensure the read of mmu_notifier_seq happens before we call
1320 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1321 * the page we just got a reference to gets unmapped before we have a
1322 * chance to grab the mmu_lock, which ensure that if the page gets
1323 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1324 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1325 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1326 */
1327 smp_rmb();
1328
ad361f09 1329 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
9ac71595 1330 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1331 return -EFAULT;
1332
15a49a44 1333 if (kvm_is_device_pfn(pfn)) {
b8865767 1334 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1335 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1336 } else if (logging_active) {
1337 /*
1338 * Faults on pages in a memslot with logging enabled
1339 * should not be mapped with huge pages (it introduces churn
1340 * and performance degradation), so force a pte mapping.
1341 */
1342 force_pte = true;
1343 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1344
1345 /*
1346 * Only actually map the page as writable if this was a write
1347 * fault.
1348 */
1349 if (!write_fault)
1350 writable = false;
1351 }
b8865767 1352
ad361f09
CD
1353 spin_lock(&kvm->mmu_lock);
1354 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1355 goto out_unlock;
15a49a44 1356
9b5fdb97
CD
1357 if (!hugetlb && !force_pte)
1358 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09
CD
1359
1360 if (hugetlb) {
b8865767 1361 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1362 new_pmd = pmd_mkhuge(new_pmd);
1363 if (writable) {
06485053 1364 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
ad361f09
CD
1365 kvm_set_pfn_dirty(pfn);
1366 }
13b7756c 1367 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE);
ad361f09
CD
1368 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1369 } else {
b8865767 1370 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1371
ad361f09 1372 if (writable) {
06485053 1373 new_pte = kvm_s2pte_mkwrite(new_pte);
ad361f09 1374 kvm_set_pfn_dirty(pfn);
15a49a44 1375 mark_page_dirty(kvm, gfn);
ad361f09 1376 }
13b7756c 1377 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE);
15a49a44 1378 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1379 }
ad361f09 1380
94f8e641 1381out_unlock:
ad361f09 1382 spin_unlock(&kvm->mmu_lock);
35307b9a 1383 kvm_set_pfn_accessed(pfn);
94f8e641 1384 kvm_release_pfn_clean(pfn);
ad361f09 1385 return ret;
94f8e641
CD
1386}
1387
aeda9130
MZ
1388/*
1389 * Resolve the access fault by making the page young again.
1390 * Note that because the faulting entry is guaranteed not to be
1391 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1392 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1393 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1394 */
1395static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1396{
1397 pmd_t *pmd;
1398 pte_t *pte;
ba049e93 1399 kvm_pfn_t pfn;
aeda9130
MZ
1400 bool pfn_valid = false;
1401
1402 trace_kvm_access_fault(fault_ipa);
1403
1404 spin_lock(&vcpu->kvm->mmu_lock);
1405
1406 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1407 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1408 goto out;
1409
bbb3b6b3 1410 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1411 *pmd = pmd_mkyoung(*pmd);
1412 pfn = pmd_pfn(*pmd);
1413 pfn_valid = true;
1414 goto out;
1415 }
1416
1417 pte = pte_offset_kernel(pmd, fault_ipa);
1418 if (pte_none(*pte)) /* Nothing there either */
1419 goto out;
1420
1421 *pte = pte_mkyoung(*pte); /* Just a page... */
1422 pfn = pte_pfn(*pte);
1423 pfn_valid = true;
1424out:
1425 spin_unlock(&vcpu->kvm->mmu_lock);
1426 if (pfn_valid)
1427 kvm_set_pfn_accessed(pfn);
1428}
1429
94f8e641
CD
1430/**
1431 * kvm_handle_guest_abort - handles all 2nd stage aborts
1432 * @vcpu: the VCPU pointer
1433 * @run: the kvm_run structure
1434 *
1435 * Any abort that gets to the host is almost guaranteed to be caused by a
1436 * missing second stage translation table entry, which can mean that either the
1437 * guest simply needs more memory and we must allocate an appropriate page or it
1438 * can mean that the guest tried to access I/O memory, which is emulated by user
1439 * space. The distinction is based on the IPA causing the fault and whether this
1440 * memory region has been registered as standard RAM by user space.
1441 */
342cd0ab
CD
1442int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1443{
94f8e641
CD
1444 unsigned long fault_status;
1445 phys_addr_t fault_ipa;
1446 struct kvm_memory_slot *memslot;
98047888
CD
1447 unsigned long hva;
1448 bool is_iabt, write_fault, writable;
94f8e641
CD
1449 gfn_t gfn;
1450 int ret, idx;
1451
52d1dba9 1452 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
4055710b
MZ
1453 if (unlikely(!is_iabt && kvm_vcpu_dabt_isextabt(vcpu))) {
1454 kvm_inject_vabt(vcpu);
1455 return 1;
1456 }
1457
7393b599 1458 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
94f8e641 1459
7393b599
MZ
1460 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1461 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1462
1463 /* Check the stage-2 fault is trans. fault or write fault */
0496daa5 1464 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
35307b9a
MZ
1465 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1466 fault_status != FSC_ACCESS) {
0496daa5
CD
1467 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1468 kvm_vcpu_trap_get_class(vcpu),
1469 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1470 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1471 return -EFAULT;
1472 }
1473
1474 idx = srcu_read_lock(&vcpu->kvm->srcu);
1475
1476 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1477 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1478 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1479 write_fault = kvm_is_write_fault(vcpu);
98047888 1480 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1481 if (is_iabt) {
1482 /* Prefetch Abort on I/O address */
7393b599 1483 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1484 ret = 1;
1485 goto out_unlock;
1486 }
1487
57c841f1
MZ
1488 /*
1489 * Check for a cache maintenance operation. Since we
1490 * ended-up here, we know it is outside of any memory
1491 * slot. But we can't find out if that is for a device,
1492 * or if the guest is just being stupid. The only thing
1493 * we know for sure is that this range cannot be cached.
1494 *
1495 * So let's assume that the guest is just being
1496 * cautious, and skip the instruction.
1497 */
1498 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1499 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1500 ret = 1;
1501 goto out_unlock;
1502 }
1503
cfe3950c
MZ
1504 /*
1505 * The IPA is reported as [MAX:12], so we need to
1506 * complement it with the bottom 12 bits from the
1507 * faulting VA. This is always 12 bits, irrespective
1508 * of the page size.
1509 */
1510 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1511 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1512 goto out_unlock;
1513 }
1514
c3058d5d
CD
1515 /* Userspace should not be able to register out-of-bounds IPAs */
1516 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1517
aeda9130
MZ
1518 if (fault_status == FSC_ACCESS) {
1519 handle_access_fault(vcpu, fault_ipa);
1520 ret = 1;
1521 goto out_unlock;
1522 }
1523
98047888 1524 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1525 if (ret == 0)
1526 ret = 1;
1527out_unlock:
1528 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1529 return ret;
342cd0ab
CD
1530}
1531
1d2ebacc
MZ
1532static int handle_hva_to_gpa(struct kvm *kvm,
1533 unsigned long start,
1534 unsigned long end,
1535 int (*handler)(struct kvm *kvm,
056aad67
SP
1536 gpa_t gpa, u64 size,
1537 void *data),
1d2ebacc 1538 void *data)
d5d8184d
CD
1539{
1540 struct kvm_memslots *slots;
1541 struct kvm_memory_slot *memslot;
1d2ebacc 1542 int ret = 0;
d5d8184d
CD
1543
1544 slots = kvm_memslots(kvm);
1545
1546 /* we only care about the pages that the guest sees */
1547 kvm_for_each_memslot(memslot, slots) {
1548 unsigned long hva_start, hva_end;
056aad67 1549 gfn_t gpa;
d5d8184d
CD
1550
1551 hva_start = max(start, memslot->userspace_addr);
1552 hva_end = min(end, memslot->userspace_addr +
1553 (memslot->npages << PAGE_SHIFT));
1554 if (hva_start >= hva_end)
1555 continue;
1556
056aad67
SP
1557 gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
1558 ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
d5d8184d 1559 }
1d2ebacc
MZ
1560
1561 return ret;
d5d8184d
CD
1562}
1563
056aad67 1564static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d 1565{
056aad67 1566 unmap_stage2_range(kvm, gpa, size);
1d2ebacc 1567 return 0;
d5d8184d
CD
1568}
1569
1570int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1571{
1572 unsigned long end = hva + PAGE_SIZE;
1573
1574 if (!kvm->arch.pgd)
1575 return 0;
1576
1577 trace_kvm_unmap_hva(hva);
1578 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1579 return 0;
1580}
1581
1582int kvm_unmap_hva_range(struct kvm *kvm,
1583 unsigned long start, unsigned long end)
1584{
1585 if (!kvm->arch.pgd)
1586 return 0;
1587
1588 trace_kvm_unmap_hva_range(start, end);
1589 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1590 return 0;
1591}
1592
056aad67 1593static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d
CD
1594{
1595 pte_t *pte = (pte_t *)data;
1596
056aad67 1597 WARN_ON(size != PAGE_SIZE);
15a49a44
MS
1598 /*
1599 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1600 * flag clear because MMU notifiers will have unmapped a huge PMD before
1601 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1602 * therefore stage2_set_pte() never needs to clear out a huge PMD
1603 * through this calling path.
1604 */
1605 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1606 return 0;
d5d8184d
CD
1607}
1608
1609
1610void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1611{
1612 unsigned long end = hva + PAGE_SIZE;
1613 pte_t stage2_pte;
1614
1615 if (!kvm->arch.pgd)
1616 return;
1617
1618 trace_kvm_set_spte_hva(hva);
1619 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1620 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1621}
1622
056aad67 1623static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1624{
1625 pmd_t *pmd;
1626 pte_t *pte;
1627
056aad67 1628 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1629 pmd = stage2_get_pmd(kvm, NULL, gpa);
1630 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1631 return 0;
1632
06485053
CM
1633 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1634 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1635
1636 pte = pte_offset_kernel(pmd, gpa);
1637 if (pte_none(*pte))
1638 return 0;
1639
06485053 1640 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1641}
1642
056aad67 1643static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1644{
1645 pmd_t *pmd;
1646 pte_t *pte;
1647
056aad67 1648 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1649 pmd = stage2_get_pmd(kvm, NULL, gpa);
1650 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1651 return 0;
1652
bbb3b6b3 1653 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1654 return pmd_young(*pmd);
1655
1656 pte = pte_offset_kernel(pmd, gpa);
1657 if (!pte_none(*pte)) /* Just a page... */
1658 return pte_young(*pte);
1659
1660 return 0;
1661}
1662
1663int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1664{
1665 trace_kvm_age_hva(start, end);
1666 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1667}
1668
1669int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1670{
1671 trace_kvm_test_age_hva(hva);
1672 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1673}
1674
d5d8184d
CD
1675void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1676{
1677 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1678}
1679
342cd0ab
CD
1680phys_addr_t kvm_mmu_get_httbr(void)
1681{
e4c5a685
AB
1682 if (__kvm_cpu_uses_extended_idmap())
1683 return virt_to_phys(merged_hyp_pgd);
1684 else
1685 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1686}
1687
5a677ce0
MZ
1688phys_addr_t kvm_get_idmap_vector(void)
1689{
1690 return hyp_idmap_vector;
1691}
1692
0535a3e2
MZ
1693static int kvm_map_idmap_text(pgd_t *pgd)
1694{
1695 int err;
1696
1697 /* Create the idmap in the boot page tables */
1698 err = __create_hyp_mappings(pgd,
1699 hyp_idmap_start, hyp_idmap_end,
1700 __phys_to_pfn(hyp_idmap_start),
1701 PAGE_HYP_EXEC);
1702 if (err)
1703 kvm_err("Failed to idmap %lx-%lx\n",
1704 hyp_idmap_start, hyp_idmap_end);
1705
1706 return err;
1707}
1708
342cd0ab
CD
1709int kvm_mmu_init(void)
1710{
2fb41059
MZ
1711 int err;
1712
4fda342c
SS
1713 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1714 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1715 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1716
06f75a1f
AB
1717 /*
1718 * We rely on the linker script to ensure at build time that the HYP
1719 * init code does not cross a page boundary.
1720 */
1721 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1722
eac378a9
MZ
1723 kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
1724 kvm_info("HYP VA range: %lx:%lx\n",
6c41a413 1725 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
eac378a9 1726
6c41a413 1727 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
d2896d4b
MZ
1728 hyp_idmap_start < kern_hyp_va(~0UL) &&
1729 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1730 /*
1731 * The idmap page is intersecting with the VA space,
1732 * it is not safe to continue further.
1733 */
1734 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
1735 err = -EINVAL;
1736 goto out;
1737 }
1738
38f791a4 1739 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 1740 if (!hyp_pgd) {
d5d8184d 1741 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1742 err = -ENOMEM;
1743 goto out;
1744 }
1745
0535a3e2
MZ
1746 if (__kvm_cpu_uses_extended_idmap()) {
1747 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
1748 hyp_pgd_order);
1749 if (!boot_hyp_pgd) {
1750 kvm_err("Hyp boot PGD not allocated\n");
1751 err = -ENOMEM;
1752 goto out;
1753 }
2fb41059 1754
0535a3e2
MZ
1755 err = kvm_map_idmap_text(boot_hyp_pgd);
1756 if (err)
1757 goto out;
d5d8184d 1758
e4c5a685
AB
1759 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1760 if (!merged_hyp_pgd) {
1761 kvm_err("Failed to allocate extra HYP pgd\n");
1762 goto out;
1763 }
1764 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1765 hyp_idmap_start);
0535a3e2
MZ
1766 } else {
1767 err = kvm_map_idmap_text(hyp_pgd);
1768 if (err)
1769 goto out;
5a677ce0
MZ
1770 }
1771
d5d8184d 1772 return 0;
2fb41059 1773out:
4f728276 1774 free_hyp_pgds();
2fb41059 1775 return err;
342cd0ab 1776}
df6ce24f
EA
1777
1778void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1779 const struct kvm_userspace_memory_region *mem,
df6ce24f 1780 const struct kvm_memory_slot *old,
f36f3f28 1781 const struct kvm_memory_slot *new,
df6ce24f
EA
1782 enum kvm_mr_change change)
1783{
c6473555
MS
1784 /*
1785 * At this point memslot has been committed and there is an
1786 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1787 * memory slot is write protected.
1788 */
1789 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1790 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1791}
1792
1793int kvm_arch_prepare_memory_region(struct kvm *kvm,
1794 struct kvm_memory_slot *memslot,
09170a49 1795 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1796 enum kvm_mr_change change)
1797{
8eef9123
AB
1798 hva_t hva = mem->userspace_addr;
1799 hva_t reg_end = hva + mem->memory_size;
1800 bool writable = !(mem->flags & KVM_MEM_READONLY);
1801 int ret = 0;
1802
15a49a44
MS
1803 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1804 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1805 return 0;
1806
c3058d5d
CD
1807 /*
1808 * Prevent userspace from creating a memory region outside of the IPA
1809 * space addressable by the KVM guest IPA space.
1810 */
1811 if (memslot->base_gfn + memslot->npages >=
1812 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1813 return -EFAULT;
1814
72f31048 1815 down_read(&current->mm->mmap_sem);
8eef9123
AB
1816 /*
1817 * A memory region could potentially cover multiple VMAs, and any holes
1818 * between them, so iterate over all of them to find out if we can map
1819 * any of them right now.
1820 *
1821 * +--------------------------------------------+
1822 * +---------------+----------------+ +----------------+
1823 * | : VMA 1 | VMA 2 | | VMA 3 : |
1824 * +---------------+----------------+ +----------------+
1825 * | memory region |
1826 * +--------------------------------------------+
1827 */
1828 do {
1829 struct vm_area_struct *vma = find_vma(current->mm, hva);
1830 hva_t vm_start, vm_end;
1831
1832 if (!vma || vma->vm_start >= reg_end)
1833 break;
1834
1835 /*
1836 * Mapping a read-only VMA is only allowed if the
1837 * memory region is configured as read-only.
1838 */
1839 if (writable && !(vma->vm_flags & VM_WRITE)) {
1840 ret = -EPERM;
1841 break;
1842 }
1843
1844 /*
1845 * Take the intersection of this VMA with the memory region
1846 */
1847 vm_start = max(hva, vma->vm_start);
1848 vm_end = min(reg_end, vma->vm_end);
1849
1850 if (vma->vm_flags & VM_PFNMAP) {
1851 gpa_t gpa = mem->guest_phys_addr +
1852 (vm_start - mem->userspace_addr);
ca09f02f
MM
1853 phys_addr_t pa;
1854
1855 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1856 pa += vm_start - vma->vm_start;
8eef9123 1857
15a49a44 1858 /* IO region dirty page logging not allowed */
72f31048
MZ
1859 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
1860 ret = -EINVAL;
1861 goto out;
1862 }
15a49a44 1863
8eef9123
AB
1864 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1865 vm_end - vm_start,
1866 writable);
1867 if (ret)
1868 break;
1869 }
1870 hva = vm_end;
1871 } while (hva < reg_end);
1872
15a49a44 1873 if (change == KVM_MR_FLAGS_ONLY)
72f31048 1874 goto out;
15a49a44 1875
849260c7
AB
1876 spin_lock(&kvm->mmu_lock);
1877 if (ret)
8eef9123 1878 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1879 else
1880 stage2_flush_memslot(kvm, memslot);
1881 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
1882out:
1883 up_read(&current->mm->mmap_sem);
8eef9123 1884 return ret;
df6ce24f
EA
1885}
1886
1887void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1888 struct kvm_memory_slot *dont)
1889{
1890}
1891
1892int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1893 unsigned long npages)
1894{
1895 return 0;
1896}
1897
15f46015 1898void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
1899{
1900}
1901
1902void kvm_arch_flush_shadow_all(struct kvm *kvm)
1903{
293f2936 1904 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
1905}
1906
1907void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1908 struct kvm_memory_slot *slot)
1909{
8eef9123
AB
1910 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1911 phys_addr_t size = slot->npages << PAGE_SHIFT;
1912
1913 spin_lock(&kvm->mmu_lock);
1914 unmap_stage2_range(kvm, gpa, size);
1915 spin_unlock(&kvm->mmu_lock);
df6ce24f 1916}
3c1e7165
MZ
1917
1918/*
1919 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1920 *
1921 * Main problems:
1922 * - S/W ops are local to a CPU (not broadcast)
1923 * - We have line migration behind our back (speculation)
1924 * - System caches don't support S/W at all (damn!)
1925 *
1926 * In the face of the above, the best we can do is to try and convert
1927 * S/W ops to VA ops. Because the guest is not allowed to infer the
1928 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1929 * which is a rather good thing for us.
1930 *
1931 * Also, it is only used when turning caches on/off ("The expected
1932 * usage of the cache maintenance instructions that operate by set/way
1933 * is associated with the cache maintenance instructions associated
1934 * with the powerdown and powerup of caches, if this is required by
1935 * the implementation.").
1936 *
1937 * We use the following policy:
1938 *
1939 * - If we trap a S/W operation, we enable VM trapping to detect
1940 * caches being turned on/off, and do a full clean.
1941 *
1942 * - We flush the caches on both caches being turned on and off.
1943 *
1944 * - Once the caches are enabled, we stop trapping VM ops.
1945 */
1946void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1947{
1948 unsigned long hcr = vcpu_get_hcr(vcpu);
1949
1950 /*
1951 * If this is the first time we do a S/W operation
1952 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1953 * VM trapping.
1954 *
1955 * Otherwise, rely on the VM trapping to wait for the MMU +
1956 * Caches to be turned off. At that point, we'll be able to
1957 * clean the caches again.
1958 */
1959 if (!(hcr & HCR_TVM)) {
1960 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
1961 vcpu_has_cache_enabled(vcpu));
1962 stage2_flush_vm(vcpu->kvm);
1963 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
1964 }
1965}
1966
1967void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
1968{
1969 bool now_enabled = vcpu_has_cache_enabled(vcpu);
1970
1971 /*
1972 * If switching the MMU+caches on, need to invalidate the caches.
1973 * If switching it off, need to clean the caches.
1974 * Clean + invalidate does the trick always.
1975 */
1976 if (now_enabled != was_enabled)
1977 stage2_flush_vm(vcpu->kvm);
1978
1979 /* Caches are now on, stop trapping VM ops (until a S/W op) */
1980 if (now_enabled)
1981 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
1982
1983 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
1984}