KVM: arm/arm64: Re-factor setting the Stage 2 entry to exec on fault
[linux-block.git] / virt / kvm / arm / mmu.c
CommitLineData
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
196f878a 23#include <linux/sched/signal.h>
45e96ea6 24#include <trace/events/kvm.h>
342cd0ab 25#include <asm/pgalloc.h>
94f8e641 26#include <asm/cacheflush.h>
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27#include <asm/kvm_arm.h>
28#include <asm/kvm_mmu.h>
45e96ea6 29#include <asm/kvm_mmio.h>
d5d8184d 30#include <asm/kvm_asm.h>
94f8e641 31#include <asm/kvm_emulate.h>
1e947bad 32#include <asm/virt.h>
621f48e4 33#include <asm/system_misc.h>
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34
35#include "trace.h"
342cd0ab 36
5a677ce0 37static pgd_t *boot_hyp_pgd;
2fb41059 38static pgd_t *hyp_pgd;
e4c5a685 39static pgd_t *merged_hyp_pgd;
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40static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
41
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42static unsigned long hyp_idmap_start;
43static unsigned long hyp_idmap_end;
44static phys_addr_t hyp_idmap_vector;
45
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46static unsigned long io_map_base;
47
38f791a4 48#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 49
15a49a44
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50#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
51#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
52
53static bool memslot_is_logging(struct kvm_memory_slot *memslot)
54{
15a49a44 55 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
56}
57
58/**
59 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
60 * @kvm: pointer to kvm structure.
61 *
62 * Interface to HYP function to flush all VM TLB entries
63 */
64void kvm_flush_remote_tlbs(struct kvm *kvm)
65{
66 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 67}
ad361f09 68
48762767 69static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 70{
8684e701 71 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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72}
73
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74/*
75 * D-Cache management functions. They take the page table entries by
76 * value, as they are flushing the cache using the kernel mapping (or
77 * kmap on 32bit).
78 */
79static void kvm_flush_dcache_pte(pte_t pte)
80{
81 __kvm_flush_dcache_pte(pte);
82}
83
84static void kvm_flush_dcache_pmd(pmd_t pmd)
85{
86 __kvm_flush_dcache_pmd(pmd);
87}
88
89static void kvm_flush_dcache_pud(pud_t pud)
90{
91 __kvm_flush_dcache_pud(pud);
92}
93
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94static bool kvm_is_device_pfn(unsigned long pfn)
95{
96 return !pfn_valid(pfn);
97}
98
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99/**
100 * stage2_dissolve_pmd() - clear and flush huge PMD entry
101 * @kvm: pointer to kvm structure.
102 * @addr: IPA
103 * @pmd: pmd pointer for IPA
104 *
105 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
106 * pages in the range dirty.
107 */
108static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
109{
bbb3b6b3 110 if (!pmd_thp_or_huge(*pmd))
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111 return;
112
113 pmd_clear(pmd);
114 kvm_tlb_flush_vmid_ipa(kvm, addr);
115 put_page(virt_to_page(pmd));
116}
117
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118static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
119 int min, int max)
120{
121 void *page;
122
123 BUG_ON(max > KVM_NR_MEM_OBJS);
124 if (cache->nobjs >= min)
125 return 0;
126 while (cache->nobjs < max) {
127 page = (void *)__get_free_page(PGALLOC_GFP);
128 if (!page)
129 return -ENOMEM;
130 cache->objects[cache->nobjs++] = page;
131 }
132 return 0;
133}
134
135static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
136{
137 while (mc->nobjs)
138 free_page((unsigned long)mc->objects[--mc->nobjs]);
139}
140
141static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
142{
143 void *p;
144
145 BUG_ON(!mc || !mc->nobjs);
146 p = mc->objects[--mc->nobjs];
147 return p;
148}
149
7a1c831e 150static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 151{
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152 pud_t *pud_table __maybe_unused = stage2_pud_offset(kvm, pgd, 0UL);
153 stage2_pgd_clear(kvm, pgd);
4f853a71 154 kvm_tlb_flush_vmid_ipa(kvm, addr);
e55cac5b 155 stage2_pud_free(kvm, pud_table);
4f853a71 156 put_page(virt_to_page(pgd));
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157}
158
7a1c831e 159static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 160{
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161 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(kvm, pud, 0);
162 VM_BUG_ON(stage2_pud_huge(kvm, *pud));
163 stage2_pud_clear(kvm, pud);
4f853a71 164 kvm_tlb_flush_vmid_ipa(kvm, addr);
e55cac5b 165 stage2_pmd_free(kvm, pmd_table);
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166 put_page(virt_to_page(pud));
167}
342cd0ab 168
7a1c831e 169static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 170{
4f853a71 171 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 172 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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173 pmd_clear(pmd);
174 kvm_tlb_flush_vmid_ipa(kvm, addr);
175 pte_free_kernel(NULL, pte_table);
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176 put_page(virt_to_page(pmd));
177}
178
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179static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte)
180{
181 WRITE_ONCE(*ptep, new_pte);
182 dsb(ishst);
183}
184
185static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd)
186{
187 WRITE_ONCE(*pmdp, new_pmd);
188 dsb(ishst);
189}
190
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191static inline void kvm_pmd_populate(pmd_t *pmdp, pte_t *ptep)
192{
193 kvm_set_pmd(pmdp, kvm_mk_pmd(ptep));
194}
195
196static inline void kvm_pud_populate(pud_t *pudp, pmd_t *pmdp)
197{
198 WRITE_ONCE(*pudp, kvm_mk_pud(pmdp));
199 dsb(ishst);
200}
201
202static inline void kvm_pgd_populate(pgd_t *pgdp, pud_t *pudp)
203{
204 WRITE_ONCE(*pgdp, kvm_mk_pgd(pudp));
205 dsb(ishst);
206}
207
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208/*
209 * Unmapping vs dcache management:
210 *
211 * If a guest maps certain memory pages as uncached, all writes will
212 * bypass the data cache and go directly to RAM. However, the CPUs
213 * can still speculate reads (not writes) and fill cache lines with
214 * data.
215 *
216 * Those cache lines will be *clean* cache lines though, so a
217 * clean+invalidate operation is equivalent to an invalidate
218 * operation, because no cache lines are marked dirty.
219 *
220 * Those clean cache lines could be filled prior to an uncached write
221 * by the guest, and the cache coherent IO subsystem would therefore
222 * end up writing old data to disk.
223 *
224 * This is why right after unmapping a page/section and invalidating
225 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
226 * the IO subsystem will never hit in the cache.
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227 *
228 * This is all avoided on systems that have ARM64_HAS_STAGE2_FWB, as
229 * we then fully enforce cacheability of RAM, no matter what the guest
230 * does.
363ef89f 231 */
7a1c831e 232static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 233 phys_addr_t addr, phys_addr_t end)
4f728276 234{
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235 phys_addr_t start_addr = addr;
236 pte_t *pte, *start_pte;
237
238 start_pte = pte = pte_offset_kernel(pmd, addr);
239 do {
240 if (!pte_none(*pte)) {
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241 pte_t old_pte = *pte;
242
4f853a71 243 kvm_set_pte(pte, __pte(0));
4f853a71 244 kvm_tlb_flush_vmid_ipa(kvm, addr);
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245
246 /* No need to invalidate the cache for device mappings */
0de58f85 247 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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248 kvm_flush_dcache_pte(old_pte);
249
250 put_page(virt_to_page(pte));
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251 }
252 } while (pte++, addr += PAGE_SIZE, addr != end);
253
e55cac5b 254 if (stage2_pte_table_empty(kvm, start_pte))
7a1c831e 255 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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256}
257
7a1c831e 258static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 259 phys_addr_t addr, phys_addr_t end)
000d3996 260{
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CD
261 phys_addr_t next, start_addr = addr;
262 pmd_t *pmd, *start_pmd;
000d3996 263
e55cac5b 264 start_pmd = pmd = stage2_pmd_offset(kvm, pud, addr);
4f853a71 265 do {
e55cac5b 266 next = stage2_pmd_addr_end(kvm, addr, end);
4f853a71 267 if (!pmd_none(*pmd)) {
bbb3b6b3 268 if (pmd_thp_or_huge(*pmd)) {
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269 pmd_t old_pmd = *pmd;
270
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271 pmd_clear(pmd);
272 kvm_tlb_flush_vmid_ipa(kvm, addr);
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273
274 kvm_flush_dcache_pmd(old_pmd);
275
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276 put_page(virt_to_page(pmd));
277 } else {
7a1c831e 278 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 279 }
ad361f09 280 }
4f853a71 281 } while (pmd++, addr = next, addr != end);
ad361f09 282
e55cac5b 283 if (stage2_pmd_table_empty(kvm, start_pmd))
7a1c831e 284 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 285}
000d3996 286
7a1c831e 287static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
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288 phys_addr_t addr, phys_addr_t end)
289{
290 phys_addr_t next, start_addr = addr;
291 pud_t *pud, *start_pud;
4f728276 292
e55cac5b 293 start_pud = pud = stage2_pud_offset(kvm, pgd, addr);
4f853a71 294 do {
e55cac5b
SP
295 next = stage2_pud_addr_end(kvm, addr, end);
296 if (!stage2_pud_none(kvm, *pud)) {
297 if (stage2_pud_huge(kvm, *pud)) {
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298 pud_t old_pud = *pud;
299
e55cac5b 300 stage2_pud_clear(kvm, pud);
4f853a71 301 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 302 kvm_flush_dcache_pud(old_pud);
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303 put_page(virt_to_page(pud));
304 } else {
7a1c831e 305 unmap_stage2_pmds(kvm, pud, addr, next);
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306 }
307 }
4f853a71 308 } while (pud++, addr = next, addr != end);
4f728276 309
e55cac5b 310 if (stage2_pud_table_empty(kvm, start_pud))
7a1c831e 311 clear_stage2_pgd_entry(kvm, pgd, start_addr);
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CD
312}
313
7a1c831e
SP
314/**
315 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
316 * @kvm: The VM pointer
317 * @start: The intermediate physical base address of the range to unmap
318 * @size: The size of the area to unmap
319 *
320 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
321 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
322 * destroying the VM), otherwise another faulting VCPU may come in and mess
323 * with things behind our backs.
324 */
325static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
326{
327 pgd_t *pgd;
328 phys_addr_t addr = start, end = start + size;
329 phys_addr_t next;
330
8b3405e3 331 assert_spin_locked(&kvm->mmu_lock);
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332 WARN_ON(size & ~PAGE_MASK);
333
e55cac5b 334 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
4f853a71 335 do {
0c428a6a
SP
336 /*
337 * Make sure the page table is still active, as another thread
338 * could have possibly freed the page table, while we released
339 * the lock.
340 */
341 if (!READ_ONCE(kvm->arch.pgd))
342 break;
e55cac5b
SP
343 next = stage2_pgd_addr_end(kvm, addr, end);
344 if (!stage2_pgd_none(kvm, *pgd))
7a1c831e 345 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
346 /*
347 * If the range is too large, release the kvm->mmu_lock
348 * to prevent starvation and lockup detector warnings.
349 */
350 if (next != end)
351 cond_resched_lock(&kvm->mmu_lock);
4f853a71 352 } while (pgd++, addr = next, addr != end);
000d3996
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353}
354
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355static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
356 phys_addr_t addr, phys_addr_t end)
357{
358 pte_t *pte;
359
360 pte = pte_offset_kernel(pmd, addr);
361 do {
0de58f85 362 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 363 kvm_flush_dcache_pte(*pte);
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MZ
364 } while (pte++, addr += PAGE_SIZE, addr != end);
365}
366
367static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
368 phys_addr_t addr, phys_addr_t end)
369{
370 pmd_t *pmd;
371 phys_addr_t next;
372
e55cac5b 373 pmd = stage2_pmd_offset(kvm, pud, addr);
9d218a1f 374 do {
e55cac5b 375 next = stage2_pmd_addr_end(kvm, addr, end);
9d218a1f 376 if (!pmd_none(*pmd)) {
bbb3b6b3 377 if (pmd_thp_or_huge(*pmd))
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378 kvm_flush_dcache_pmd(*pmd);
379 else
9d218a1f 380 stage2_flush_ptes(kvm, pmd, addr, next);
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MZ
381 }
382 } while (pmd++, addr = next, addr != end);
383}
384
385static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
386 phys_addr_t addr, phys_addr_t end)
387{
388 pud_t *pud;
389 phys_addr_t next;
390
e55cac5b 391 pud = stage2_pud_offset(kvm, pgd, addr);
9d218a1f 392 do {
e55cac5b
SP
393 next = stage2_pud_addr_end(kvm, addr, end);
394 if (!stage2_pud_none(kvm, *pud)) {
395 if (stage2_pud_huge(kvm, *pud))
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396 kvm_flush_dcache_pud(*pud);
397 else
9d218a1f 398 stage2_flush_pmds(kvm, pud, addr, next);
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MZ
399 }
400 } while (pud++, addr = next, addr != end);
401}
402
403static void stage2_flush_memslot(struct kvm *kvm,
404 struct kvm_memory_slot *memslot)
405{
406 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
407 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
408 phys_addr_t next;
409 pgd_t *pgd;
410
e55cac5b 411 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
9d218a1f 412 do {
e55cac5b
SP
413 next = stage2_pgd_addr_end(kvm, addr, end);
414 if (!stage2_pgd_none(kvm, *pgd))
d2db7773 415 stage2_flush_puds(kvm, pgd, addr, next);
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MZ
416 } while (pgd++, addr = next, addr != end);
417}
418
419/**
420 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
421 * @kvm: The struct kvm pointer
422 *
423 * Go through the stage 2 page tables and invalidate any cache lines
424 * backing memory already mapped to the VM.
425 */
3c1e7165 426static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
427{
428 struct kvm_memslots *slots;
429 struct kvm_memory_slot *memslot;
430 int idx;
431
432 idx = srcu_read_lock(&kvm->srcu);
433 spin_lock(&kvm->mmu_lock);
434
435 slots = kvm_memslots(kvm);
436 kvm_for_each_memslot(memslot, slots)
437 stage2_flush_memslot(kvm, memslot);
438
439 spin_unlock(&kvm->mmu_lock);
440 srcu_read_unlock(&kvm->srcu, idx);
441}
442
64f32497
SP
443static void clear_hyp_pgd_entry(pgd_t *pgd)
444{
445 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
446 pgd_clear(pgd);
447 pud_free(NULL, pud_table);
448 put_page(virt_to_page(pgd));
449}
450
451static void clear_hyp_pud_entry(pud_t *pud)
452{
453 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
454 VM_BUG_ON(pud_huge(*pud));
455 pud_clear(pud);
456 pmd_free(NULL, pmd_table);
457 put_page(virt_to_page(pud));
458}
459
460static void clear_hyp_pmd_entry(pmd_t *pmd)
461{
462 pte_t *pte_table = pte_offset_kernel(pmd, 0);
463 VM_BUG_ON(pmd_thp_or_huge(*pmd));
464 pmd_clear(pmd);
465 pte_free_kernel(NULL, pte_table);
466 put_page(virt_to_page(pmd));
467}
468
469static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
470{
471 pte_t *pte, *start_pte;
472
473 start_pte = pte = pte_offset_kernel(pmd, addr);
474 do {
475 if (!pte_none(*pte)) {
476 kvm_set_pte(pte, __pte(0));
477 put_page(virt_to_page(pte));
478 }
479 } while (pte++, addr += PAGE_SIZE, addr != end);
480
481 if (hyp_pte_table_empty(start_pte))
482 clear_hyp_pmd_entry(pmd);
483}
484
485static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
486{
487 phys_addr_t next;
488 pmd_t *pmd, *start_pmd;
489
490 start_pmd = pmd = pmd_offset(pud, addr);
491 do {
492 next = pmd_addr_end(addr, end);
493 /* Hyp doesn't use huge pmds */
494 if (!pmd_none(*pmd))
495 unmap_hyp_ptes(pmd, addr, next);
496 } while (pmd++, addr = next, addr != end);
497
498 if (hyp_pmd_table_empty(start_pmd))
499 clear_hyp_pud_entry(pud);
500}
501
502static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
503{
504 phys_addr_t next;
505 pud_t *pud, *start_pud;
506
507 start_pud = pud = pud_offset(pgd, addr);
508 do {
509 next = pud_addr_end(addr, end);
510 /* Hyp doesn't use huge puds */
511 if (!pud_none(*pud))
512 unmap_hyp_pmds(pud, addr, next);
513 } while (pud++, addr = next, addr != end);
514
515 if (hyp_pud_table_empty(start_pud))
516 clear_hyp_pgd_entry(pgd);
517}
518
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519static unsigned int kvm_pgd_index(unsigned long addr, unsigned int ptrs_per_pgd)
520{
521 return (addr >> PGDIR_SHIFT) & (ptrs_per_pgd - 1);
522}
523
524static void __unmap_hyp_range(pgd_t *pgdp, unsigned long ptrs_per_pgd,
525 phys_addr_t start, u64 size)
64f32497
SP
526{
527 pgd_t *pgd;
528 phys_addr_t addr = start, end = start + size;
529 phys_addr_t next;
530
531 /*
532 * We don't unmap anything from HYP, except at the hyp tear down.
533 * Hence, we don't have to invalidate the TLBs here.
534 */
3ddd4556 535 pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
64f32497
SP
536 do {
537 next = pgd_addr_end(addr, end);
538 if (!pgd_none(*pgd))
539 unmap_hyp_puds(pgd, addr, next);
540 } while (pgd++, addr = next, addr != end);
541}
542
3ddd4556
MZ
543static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
544{
545 __unmap_hyp_range(pgdp, PTRS_PER_PGD, start, size);
546}
547
548static void unmap_hyp_idmap_range(pgd_t *pgdp, phys_addr_t start, u64 size)
549{
550 __unmap_hyp_range(pgdp, __kvm_idmap_ptrs_per_pgd(), start, size);
551}
552
342cd0ab 553/**
4f728276 554 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 555 *
5a677ce0
MZ
556 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
557 * therefore contains either mappings in the kernel memory area (above
e3f019b3 558 * PAGE_OFFSET), or device mappings in the idmap range.
5a677ce0 559 *
e3f019b3
MZ
560 * boot_hyp_pgd should only map the idmap range, and is only used in
561 * the extended idmap case.
342cd0ab 562 */
4f728276 563void free_hyp_pgds(void)
342cd0ab 564{
e3f019b3
MZ
565 pgd_t *id_pgd;
566
d157f4a5 567 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 568
e3f019b3
MZ
569 id_pgd = boot_hyp_pgd ? boot_hyp_pgd : hyp_pgd;
570
571 if (id_pgd) {
572 /* In case we never called hyp_mmu_init() */
573 if (!io_map_base)
574 io_map_base = hyp_idmap_start;
575 unmap_hyp_idmap_range(id_pgd, io_map_base,
576 hyp_idmap_start + PAGE_SIZE - io_map_base);
577 }
578
26781f9c 579 if (boot_hyp_pgd) {
26781f9c
MZ
580 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
581 boot_hyp_pgd = NULL;
582 }
583
4f728276 584 if (hyp_pgd) {
7839c672
MZ
585 unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
586 (uintptr_t)high_memory - PAGE_OFFSET);
d4cb9df5 587
38f791a4 588 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 589 hyp_pgd = NULL;
4f728276 590 }
e4c5a685
AB
591 if (merged_hyp_pgd) {
592 clear_page(merged_hyp_pgd);
593 free_page((unsigned long)merged_hyp_pgd);
594 merged_hyp_pgd = NULL;
595 }
4f728276 596
342cd0ab
CD
597 mutex_unlock(&kvm_hyp_pgd_mutex);
598}
599
600static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
601 unsigned long end, unsigned long pfn,
602 pgprot_t prot)
342cd0ab
CD
603{
604 pte_t *pte;
605 unsigned long addr;
342cd0ab 606
3562c76d
MZ
607 addr = start;
608 do {
6060df84
MZ
609 pte = pte_offset_kernel(pmd, addr);
610 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 611 get_page(virt_to_page(pte));
6060df84 612 pfn++;
3562c76d 613 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
614}
615
616static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
617 unsigned long end, unsigned long pfn,
618 pgprot_t prot)
342cd0ab
CD
619{
620 pmd_t *pmd;
621 pte_t *pte;
622 unsigned long addr, next;
623
3562c76d
MZ
624 addr = start;
625 do {
6060df84 626 pmd = pmd_offset(pud, addr);
342cd0ab
CD
627
628 BUG_ON(pmd_sect(*pmd));
629
630 if (pmd_none(*pmd)) {
6060df84 631 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
632 if (!pte) {
633 kvm_err("Cannot allocate Hyp pte\n");
634 return -ENOMEM;
635 }
0db9dd8a 636 kvm_pmd_populate(pmd, pte);
4f728276 637 get_page(virt_to_page(pmd));
342cd0ab
CD
638 }
639
640 next = pmd_addr_end(addr, end);
641
6060df84
MZ
642 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
643 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 644 } while (addr = next, addr != end);
342cd0ab
CD
645
646 return 0;
647}
648
38f791a4
CD
649static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
650 unsigned long end, unsigned long pfn,
651 pgprot_t prot)
652{
653 pud_t *pud;
654 pmd_t *pmd;
655 unsigned long addr, next;
656 int ret;
657
658 addr = start;
659 do {
660 pud = pud_offset(pgd, addr);
661
662 if (pud_none_or_clear_bad(pud)) {
663 pmd = pmd_alloc_one(NULL, addr);
664 if (!pmd) {
665 kvm_err("Cannot allocate Hyp pmd\n");
666 return -ENOMEM;
667 }
0db9dd8a 668 kvm_pud_populate(pud, pmd);
38f791a4 669 get_page(virt_to_page(pud));
38f791a4
CD
670 }
671
672 next = pud_addr_end(addr, end);
673 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
674 if (ret)
675 return ret;
676 pfn += (next - addr) >> PAGE_SHIFT;
677 } while (addr = next, addr != end);
678
679 return 0;
680}
681
98732d1b 682static int __create_hyp_mappings(pgd_t *pgdp, unsigned long ptrs_per_pgd,
6060df84
MZ
683 unsigned long start, unsigned long end,
684 unsigned long pfn, pgprot_t prot)
342cd0ab 685{
342cd0ab
CD
686 pgd_t *pgd;
687 pud_t *pud;
342cd0ab
CD
688 unsigned long addr, next;
689 int err = 0;
690
342cd0ab 691 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
692 addr = start & PAGE_MASK;
693 end = PAGE_ALIGN(end);
694 do {
3ddd4556 695 pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd);
342cd0ab 696
38f791a4
CD
697 if (pgd_none(*pgd)) {
698 pud = pud_alloc_one(NULL, addr);
699 if (!pud) {
700 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
701 err = -ENOMEM;
702 goto out;
703 }
0db9dd8a 704 kvm_pgd_populate(pgd, pud);
38f791a4 705 get_page(virt_to_page(pgd));
342cd0ab
CD
706 }
707
708 next = pgd_addr_end(addr, end);
38f791a4 709 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
710 if (err)
711 goto out;
6060df84 712 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 713 } while (addr = next, addr != end);
342cd0ab
CD
714out:
715 mutex_unlock(&kvm_hyp_pgd_mutex);
716 return err;
717}
718
40c2729b
CD
719static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
720{
721 if (!is_vmalloc_addr(kaddr)) {
722 BUG_ON(!virt_addr_valid(kaddr));
723 return __pa(kaddr);
724 } else {
725 return page_to_phys(vmalloc_to_page(kaddr)) +
726 offset_in_page(kaddr);
727 }
728}
729
342cd0ab 730/**
06e8c3b0 731 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
732 * @from: The virtual kernel start address of the range
733 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 734 * @prot: The protection to be applied to this range
342cd0ab 735 *
06e8c3b0
MZ
736 * The same virtual address as the kernel virtual address is also used
737 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
738 * physical pages.
342cd0ab 739 */
c8dddecd 740int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 741{
40c2729b
CD
742 phys_addr_t phys_addr;
743 unsigned long virt_addr;
6c41a413
MZ
744 unsigned long start = kern_hyp_va((unsigned long)from);
745 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 746
1e947bad
MZ
747 if (is_kernel_in_hyp_mode())
748 return 0;
749
40c2729b
CD
750 start = start & PAGE_MASK;
751 end = PAGE_ALIGN(end);
6060df84 752
40c2729b
CD
753 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
754 int err;
6060df84 755
40c2729b 756 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
98732d1b
KM
757 err = __create_hyp_mappings(hyp_pgd, PTRS_PER_PGD,
758 virt_addr, virt_addr + PAGE_SIZE,
40c2729b 759 __phys_to_pfn(phys_addr),
c8dddecd 760 prot);
40c2729b
CD
761 if (err)
762 return err;
763 }
764
765 return 0;
342cd0ab
CD
766}
767
dc2e4633
MZ
768static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size,
769 unsigned long *haddr, pgprot_t prot)
342cd0ab 770{
e3f019b3
MZ
771 pgd_t *pgd = hyp_pgd;
772 unsigned long base;
773 int ret = 0;
6060df84 774
e3f019b3 775 mutex_lock(&kvm_hyp_pgd_mutex);
6060df84 776
e3f019b3
MZ
777 /*
778 * This assumes that we we have enough space below the idmap
779 * page to allocate our VAs. If not, the check below will
780 * kick. A potential alternative would be to detect that
781 * overflow and switch to an allocation above the idmap.
782 *
783 * The allocated size is always a multiple of PAGE_SIZE.
784 */
785 size = PAGE_ALIGN(size + offset_in_page(phys_addr));
786 base = io_map_base - size;
1bb32a44 787
e3f019b3
MZ
788 /*
789 * Verify that BIT(VA_BITS - 1) hasn't been flipped by
790 * allocating the new area, as it would indicate we've
791 * overflowed the idmap/IO address range.
792 */
793 if ((base ^ io_map_base) & BIT(VA_BITS - 1))
794 ret = -ENOMEM;
795 else
796 io_map_base = base;
797
798 mutex_unlock(&kvm_hyp_pgd_mutex);
799
800 if (ret)
801 goto out;
802
803 if (__kvm_cpu_uses_extended_idmap())
804 pgd = boot_hyp_pgd;
805
806 ret = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
807 base, base + size,
dc2e4633 808 __phys_to_pfn(phys_addr), prot);
e3f019b3
MZ
809 if (ret)
810 goto out;
811
dc2e4633 812 *haddr = base + offset_in_page(phys_addr);
e3f019b3
MZ
813
814out:
dc2e4633
MZ
815 return ret;
816}
817
818/**
819 * create_hyp_io_mappings - Map IO into both kernel and HYP
820 * @phys_addr: The physical start address which gets mapped
821 * @size: Size of the region being mapped
822 * @kaddr: Kernel VA for this mapping
823 * @haddr: HYP VA for this mapping
824 */
825int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size,
826 void __iomem **kaddr,
827 void __iomem **haddr)
828{
829 unsigned long addr;
830 int ret;
831
832 *kaddr = ioremap(phys_addr, size);
833 if (!*kaddr)
834 return -ENOMEM;
835
836 if (is_kernel_in_hyp_mode()) {
837 *haddr = *kaddr;
838 return 0;
839 }
840
841 ret = __create_hyp_private_mapping(phys_addr, size,
842 &addr, PAGE_HYP_DEVICE);
1bb32a44
MZ
843 if (ret) {
844 iounmap(*kaddr);
845 *kaddr = NULL;
dc2e4633
MZ
846 *haddr = NULL;
847 return ret;
848 }
849
850 *haddr = (void __iomem *)addr;
851 return 0;
852}
853
854/**
855 * create_hyp_exec_mappings - Map an executable range into HYP
856 * @phys_addr: The physical start address which gets mapped
857 * @size: Size of the region being mapped
858 * @haddr: HYP VA for this mapping
859 */
860int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size,
861 void **haddr)
862{
863 unsigned long addr;
864 int ret;
865
866 BUG_ON(is_kernel_in_hyp_mode());
867
868 ret = __create_hyp_private_mapping(phys_addr, size,
869 &addr, PAGE_HYP_EXEC);
870 if (ret) {
871 *haddr = NULL;
1bb32a44
MZ
872 return ret;
873 }
874
dc2e4633 875 *haddr = (void *)addr;
1bb32a44 876 return 0;
342cd0ab
CD
877}
878
d5d8184d
CD
879/**
880 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
881 * @kvm: The KVM struct pointer for the VM.
882 *
9d4dc688
VM
883 * Allocates only the stage-2 HW PGD level table(s) (can support either full
884 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
885 * allocated pages.
d5d8184d
CD
886 *
887 * Note we don't need locking here as this is only called when the VM is
888 * created, which can only be done once.
889 */
890int kvm_alloc_stage2_pgd(struct kvm *kvm)
891{
892 pgd_t *pgd;
893
894 if (kvm->arch.pgd != NULL) {
895 kvm_err("kvm_arch already initialized?\n");
896 return -EINVAL;
897 }
898
9163ee23 899 /* Allocate the HW PGD, making sure that each page gets its own refcount */
e55cac5b 900 pgd = alloc_pages_exact(stage2_pgd_size(kvm), GFP_KERNEL | __GFP_ZERO);
9163ee23 901 if (!pgd)
a987370f
MZ
902 return -ENOMEM;
903
d5d8184d 904 kvm->arch.pgd = pgd;
d5d8184d
CD
905 return 0;
906}
907
957db105
CD
908static void stage2_unmap_memslot(struct kvm *kvm,
909 struct kvm_memory_slot *memslot)
910{
911 hva_t hva = memslot->userspace_addr;
912 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
913 phys_addr_t size = PAGE_SIZE * memslot->npages;
914 hva_t reg_end = hva + size;
915
916 /*
917 * A memory region could potentially cover multiple VMAs, and any holes
918 * between them, so iterate over all of them to find out if we should
919 * unmap any of them.
920 *
921 * +--------------------------------------------+
922 * +---------------+----------------+ +----------------+
923 * | : VMA 1 | VMA 2 | | VMA 3 : |
924 * +---------------+----------------+ +----------------+
925 * | memory region |
926 * +--------------------------------------------+
927 */
928 do {
929 struct vm_area_struct *vma = find_vma(current->mm, hva);
930 hva_t vm_start, vm_end;
931
932 if (!vma || vma->vm_start >= reg_end)
933 break;
934
935 /*
936 * Take the intersection of this VMA with the memory region
937 */
938 vm_start = max(hva, vma->vm_start);
939 vm_end = min(reg_end, vma->vm_end);
940
941 if (!(vma->vm_flags & VM_PFNMAP)) {
942 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
943 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
944 }
945 hva = vm_end;
946 } while (hva < reg_end);
947}
948
949/**
950 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
951 * @kvm: The struct kvm pointer
952 *
953 * Go through the memregions and unmap any reguler RAM
954 * backing memory already mapped to the VM.
955 */
956void stage2_unmap_vm(struct kvm *kvm)
957{
958 struct kvm_memslots *slots;
959 struct kvm_memory_slot *memslot;
960 int idx;
961
962 idx = srcu_read_lock(&kvm->srcu);
90f6e150 963 down_read(&current->mm->mmap_sem);
957db105
CD
964 spin_lock(&kvm->mmu_lock);
965
966 slots = kvm_memslots(kvm);
967 kvm_for_each_memslot(memslot, slots)
968 stage2_unmap_memslot(kvm, memslot);
969
970 spin_unlock(&kvm->mmu_lock);
90f6e150 971 up_read(&current->mm->mmap_sem);
957db105
CD
972 srcu_read_unlock(&kvm->srcu, idx);
973}
974
d5d8184d
CD
975/**
976 * kvm_free_stage2_pgd - free all stage-2 tables
977 * @kvm: The KVM struct pointer for the VM.
978 *
979 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
980 * underlying level-2 and level-3 tables before freeing the actual level-1 table
981 * and setting the struct pointer to NULL.
d5d8184d
CD
982 */
983void kvm_free_stage2_pgd(struct kvm *kvm)
984{
6c0d706b 985 void *pgd = NULL;
d5d8184d 986
8b3405e3 987 spin_lock(&kvm->mmu_lock);
6c0d706b 988 if (kvm->arch.pgd) {
e55cac5b 989 unmap_stage2_range(kvm, 0, kvm_phys_size(kvm));
2952a607 990 pgd = READ_ONCE(kvm->arch.pgd);
6c0d706b
SP
991 kvm->arch.pgd = NULL;
992 }
8b3405e3
SP
993 spin_unlock(&kvm->mmu_lock);
994
9163ee23 995 /* Free the HW pgd, one page at a time */
6c0d706b 996 if (pgd)
e55cac5b 997 free_pages_exact(pgd, stage2_pgd_size(kvm));
d5d8184d
CD
998}
999
38f791a4 1000static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 1001 phys_addr_t addr)
d5d8184d
CD
1002{
1003 pgd_t *pgd;
1004 pud_t *pud;
d5d8184d 1005
e55cac5b
SP
1006 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
1007 if (stage2_pgd_none(kvm, *pgd)) {
38f791a4
CD
1008 if (!cache)
1009 return NULL;
1010 pud = mmu_memory_cache_alloc(cache);
e55cac5b 1011 stage2_pgd_populate(kvm, pgd, pud);
38f791a4
CD
1012 get_page(virt_to_page(pgd));
1013 }
1014
e55cac5b 1015 return stage2_pud_offset(kvm, pgd, addr);
38f791a4
CD
1016}
1017
1018static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
1019 phys_addr_t addr)
1020{
1021 pud_t *pud;
1022 pmd_t *pmd;
1023
1024 pud = stage2_get_pud(kvm, cache, addr);
d6dbdd3c
MZ
1025 if (!pud)
1026 return NULL;
1027
e55cac5b 1028 if (stage2_pud_none(kvm, *pud)) {
d5d8184d 1029 if (!cache)
ad361f09 1030 return NULL;
d5d8184d 1031 pmd = mmu_memory_cache_alloc(cache);
e55cac5b 1032 stage2_pud_populate(kvm, pud, pmd);
d5d8184d 1033 get_page(virt_to_page(pud));
c62ee2b2
MZ
1034 }
1035
e55cac5b 1036 return stage2_pmd_offset(kvm, pud, addr);
ad361f09
CD
1037}
1038
1039static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
1040 *cache, phys_addr_t addr, const pmd_t *new_pmd)
1041{
1042 pmd_t *pmd, old_pmd;
1043
1044 pmd = stage2_get_pmd(kvm, cache, addr);
1045 VM_BUG_ON(!pmd);
d5d8184d 1046
ad361f09 1047 old_pmd = *pmd;
d4b9e079 1048 if (pmd_present(old_pmd)) {
86658b81
PA
1049 /*
1050 * Multiple vcpus faulting on the same PMD entry, can
1051 * lead to them sequentially updating the PMD with the
1052 * same value. Following the break-before-make
1053 * (pmd_clear() followed by tlb_flush()) process can
1054 * hinder forward progress due to refaults generated
1055 * on missing translations.
1056 *
1057 * Skip updating the page table if the entry is
1058 * unchanged.
1059 */
1060 if (pmd_val(old_pmd) == pmd_val(*new_pmd))
1061 return 0;
1062
1063 /*
1064 * Mapping in huge pages should only happen through a
1065 * fault. If a page is merged into a transparent huge
1066 * page, the individual subpages of that huge page
1067 * should be unmapped through MMU notifiers before we
1068 * get here.
1069 *
1070 * Merging of CompoundPages is not supported; they
1071 * should become splitting first, unmapped, merged,
1072 * and mapped back in on-demand.
1073 */
1074 VM_BUG_ON(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
1075
d4b9e079 1076 pmd_clear(pmd);
ad361f09 1077 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 1078 } else {
ad361f09 1079 get_page(virt_to_page(pmd));
d4b9e079
MZ
1080 }
1081
1082 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
1083 return 0;
1084}
1085
7a3796d2
MZ
1086static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr)
1087{
1088 pmd_t *pmdp;
1089 pte_t *ptep;
1090
1091 pmdp = stage2_get_pmd(kvm, NULL, addr);
1092 if (!pmdp || pmd_none(*pmdp) || !pmd_present(*pmdp))
1093 return false;
1094
1095 if (pmd_thp_or_huge(*pmdp))
1096 return kvm_s2pmd_exec(pmdp);
1097
1098 ptep = pte_offset_kernel(pmdp, addr);
1099 if (!ptep || pte_none(*ptep) || !pte_present(*ptep))
1100 return false;
1101
1102 return kvm_s2pte_exec(ptep);
1103}
1104
ad361f09 1105static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
1106 phys_addr_t addr, const pte_t *new_pte,
1107 unsigned long flags)
ad361f09
CD
1108{
1109 pmd_t *pmd;
1110 pte_t *pte, old_pte;
15a49a44
MS
1111 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
1112 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
1113
1114 VM_BUG_ON(logging_active && !cache);
ad361f09 1115
38f791a4 1116 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
1117 pmd = stage2_get_pmd(kvm, cache, addr);
1118 if (!pmd) {
1119 /*
1120 * Ignore calls from kvm_set_spte_hva for unallocated
1121 * address ranges.
1122 */
1123 return 0;
1124 }
1125
15a49a44
MS
1126 /*
1127 * While dirty page logging - dissolve huge PMD, then continue on to
1128 * allocate page.
1129 */
1130 if (logging_active)
1131 stage2_dissolve_pmd(kvm, addr, pmd);
1132
ad361f09 1133 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
1134 if (pmd_none(*pmd)) {
1135 if (!cache)
1136 return 0; /* ignore calls from kvm_set_spte_hva */
1137 pte = mmu_memory_cache_alloc(cache);
0db9dd8a 1138 kvm_pmd_populate(pmd, pte);
d5d8184d 1139 get_page(virt_to_page(pmd));
c62ee2b2
MZ
1140 }
1141
1142 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
1143
1144 if (iomap && pte_present(*pte))
1145 return -EFAULT;
1146
1147 /* Create 2nd stage page table mapping - Level 3 */
1148 old_pte = *pte;
d4b9e079 1149 if (pte_present(old_pte)) {
976d34e2
PA
1150 /* Skip page table update if there is no change */
1151 if (pte_val(old_pte) == pte_val(*new_pte))
1152 return 0;
1153
d4b9e079 1154 kvm_set_pte(pte, __pte(0));
48762767 1155 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 1156 } else {
d5d8184d 1157 get_page(virt_to_page(pte));
d4b9e079 1158 }
d5d8184d 1159
d4b9e079 1160 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
1161 return 0;
1162}
d5d8184d 1163
06485053
CM
1164#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1165static int stage2_ptep_test_and_clear_young(pte_t *pte)
1166{
1167 if (pte_young(*pte)) {
1168 *pte = pte_mkold(*pte);
1169 return 1;
1170 }
d5d8184d
CD
1171 return 0;
1172}
06485053
CM
1173#else
1174static int stage2_ptep_test_and_clear_young(pte_t *pte)
1175{
1176 return __ptep_test_and_clear_young(pte);
1177}
1178#endif
1179
1180static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
1181{
1182 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
1183}
d5d8184d
CD
1184
1185/**
1186 * kvm_phys_addr_ioremap - map a device range to guest IPA
1187 *
1188 * @kvm: The KVM pointer
1189 * @guest_ipa: The IPA at which to insert the mapping
1190 * @pa: The physical address of the device
1191 * @size: The size of the mapping
1192 */
1193int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1194 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1195{
1196 phys_addr_t addr, end;
1197 int ret = 0;
1198 unsigned long pfn;
1199 struct kvm_mmu_memory_cache cache = { 0, };
1200
1201 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1202 pfn = __phys_to_pfn(pa);
1203
1204 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1205 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1206
c40f2f8f 1207 if (writable)
06485053 1208 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1209
e55cac5b
SP
1210 ret = mmu_topup_memory_cache(&cache,
1211 kvm_mmu_cache_min_pages(kvm),
1212 KVM_NR_MEM_OBJS);
d5d8184d
CD
1213 if (ret)
1214 goto out;
1215 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1216 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1217 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1218 spin_unlock(&kvm->mmu_lock);
1219 if (ret)
1220 goto out;
1221
1222 pfn++;
1223 }
1224
1225out:
1226 mmu_free_memory_cache(&cache);
1227 return ret;
1228}
1229
ba049e93 1230static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1231{
ba049e93 1232 kvm_pfn_t pfn = *pfnp;
9b5fdb97 1233 gfn_t gfn = *ipap >> PAGE_SHIFT;
fd2ef358 1234 struct page *page = pfn_to_page(pfn);
9b5fdb97 1235
fd2ef358
PA
1236 /*
1237 * PageTransCompoungMap() returns true for THP and
1238 * hugetlbfs. Make sure the adjustment is done only for THP
1239 * pages.
1240 */
1241 if (!PageHuge(page) && PageTransCompoundMap(page)) {
9b5fdb97
CD
1242 unsigned long mask;
1243 /*
1244 * The address we faulted on is backed by a transparent huge
1245 * page. However, because we map the compound huge page and
1246 * not the individual tail page, we need to transfer the
1247 * refcount to the head page. We have to be careful that the
1248 * THP doesn't start to split while we are adjusting the
1249 * refcounts.
1250 *
1251 * We are sure this doesn't happen, because mmu_notifier_retry
1252 * was successful and we are holding the mmu_lock, so if this
1253 * THP is trying to split, it will be blocked in the mmu
1254 * notifier before touching any of the pages, specifically
1255 * before being able to call __split_huge_page_refcount().
1256 *
1257 * We can therefore safely transfer the refcount from PG_tail
1258 * to PG_head and switch the pfn from a tail page to the head
1259 * page accordingly.
1260 */
1261 mask = PTRS_PER_PMD - 1;
1262 VM_BUG_ON((gfn & mask) != (pfn & mask));
1263 if (pfn & mask) {
1264 *ipap &= PMD_MASK;
1265 kvm_release_pfn_clean(pfn);
1266 pfn &= ~mask;
1267 kvm_get_pfn(pfn);
1268 *pfnp = pfn;
1269 }
1270
1271 return true;
1272 }
1273
1274 return false;
1275}
1276
a7d079ce
AB
1277static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1278{
1279 if (kvm_vcpu_trap_is_iabt(vcpu))
1280 return false;
1281
1282 return kvm_vcpu_dabt_iswrite(vcpu);
1283}
1284
c6473555
MS
1285/**
1286 * stage2_wp_ptes - write protect PMD range
1287 * @pmd: pointer to pmd entry
1288 * @addr: range start address
1289 * @end: range end address
1290 */
1291static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1292{
1293 pte_t *pte;
1294
1295 pte = pte_offset_kernel(pmd, addr);
1296 do {
1297 if (!pte_none(*pte)) {
1298 if (!kvm_s2pte_readonly(pte))
1299 kvm_set_s2pte_readonly(pte);
1300 }
1301 } while (pte++, addr += PAGE_SIZE, addr != end);
1302}
1303
1304/**
1305 * stage2_wp_pmds - write protect PUD range
e55cac5b 1306 * kvm: kvm instance for the VM
c6473555
MS
1307 * @pud: pointer to pud entry
1308 * @addr: range start address
1309 * @end: range end address
1310 */
e55cac5b
SP
1311static void stage2_wp_pmds(struct kvm *kvm, pud_t *pud,
1312 phys_addr_t addr, phys_addr_t end)
c6473555
MS
1313{
1314 pmd_t *pmd;
1315 phys_addr_t next;
1316
e55cac5b 1317 pmd = stage2_pmd_offset(kvm, pud, addr);
c6473555
MS
1318
1319 do {
e55cac5b 1320 next = stage2_pmd_addr_end(kvm, addr, end);
c6473555 1321 if (!pmd_none(*pmd)) {
bbb3b6b3 1322 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1323 if (!kvm_s2pmd_readonly(pmd))
1324 kvm_set_s2pmd_readonly(pmd);
1325 } else {
1326 stage2_wp_ptes(pmd, addr, next);
1327 }
1328 }
1329 } while (pmd++, addr = next, addr != end);
1330}
1331
1332/**
1333 * stage2_wp_puds - write protect PGD range
1334 * @pgd: pointer to pgd entry
1335 * @addr: range start address
1336 * @end: range end address
1337 *
1338 * Process PUD entries, for a huge PUD we cause a panic.
1339 */
e55cac5b
SP
1340static void stage2_wp_puds(struct kvm *kvm, pgd_t *pgd,
1341 phys_addr_t addr, phys_addr_t end)
c6473555
MS
1342{
1343 pud_t *pud;
1344 phys_addr_t next;
1345
e55cac5b 1346 pud = stage2_pud_offset(kvm, pgd, addr);
c6473555 1347 do {
e55cac5b
SP
1348 next = stage2_pud_addr_end(kvm, addr, end);
1349 if (!stage2_pud_none(kvm, *pud)) {
c6473555 1350 /* TODO:PUD not supported, revisit later if supported */
e55cac5b
SP
1351 BUG_ON(stage2_pud_huge(kvm, *pud));
1352 stage2_wp_pmds(kvm, pud, addr, next);
c6473555
MS
1353 }
1354 } while (pud++, addr = next, addr != end);
1355}
1356
1357/**
1358 * stage2_wp_range() - write protect stage2 memory region range
1359 * @kvm: The KVM pointer
1360 * @addr: Start address of range
1361 * @end: End address of range
1362 */
1363static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1364{
1365 pgd_t *pgd;
1366 phys_addr_t next;
1367
e55cac5b 1368 pgd = kvm->arch.pgd + stage2_pgd_index(kvm, addr);
c6473555
MS
1369 do {
1370 /*
1371 * Release kvm_mmu_lock periodically if the memory region is
1372 * large. Otherwise, we may see kernel panics with
227ea818
CD
1373 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1374 * CONFIG_LOCKDEP. Additionally, holding the lock too long
0c428a6a
SP
1375 * will also starve other vCPUs. We have to also make sure
1376 * that the page tables are not freed while we released
1377 * the lock.
c6473555 1378 */
0c428a6a
SP
1379 cond_resched_lock(&kvm->mmu_lock);
1380 if (!READ_ONCE(kvm->arch.pgd))
1381 break;
e55cac5b
SP
1382 next = stage2_pgd_addr_end(kvm, addr, end);
1383 if (stage2_pgd_present(kvm, *pgd))
1384 stage2_wp_puds(kvm, pgd, addr, next);
c6473555
MS
1385 } while (pgd++, addr = next, addr != end);
1386}
1387
1388/**
1389 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1390 * @kvm: The KVM pointer
1391 * @slot: The memory slot to write protect
1392 *
1393 * Called to start logging dirty pages after memory region
1394 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1395 * all present PMD and PTEs are write protected in the memory region.
1396 * Afterwards read of dirty page log can be called.
1397 *
1398 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1399 * serializing operations for VM memory regions.
1400 */
1401void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1402{
9f6b8029
PB
1403 struct kvm_memslots *slots = kvm_memslots(kvm);
1404 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1405 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1406 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1407
1408 spin_lock(&kvm->mmu_lock);
1409 stage2_wp_range(kvm, start, end);
1410 spin_unlock(&kvm->mmu_lock);
1411 kvm_flush_remote_tlbs(kvm);
1412}
53c810c3
MS
1413
1414/**
3b0f1d01 1415 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1416 * @kvm: The KVM pointer
1417 * @slot: The memory slot associated with mask
1418 * @gfn_offset: The gfn offset in memory slot
1419 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1420 * slot to be write protected
1421 *
1422 * Walks bits set in mask write protects the associated pte's. Caller must
1423 * acquire kvm_mmu_lock.
1424 */
3b0f1d01 1425static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1426 struct kvm_memory_slot *slot,
1427 gfn_t gfn_offset, unsigned long mask)
1428{
1429 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1430 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1431 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1432
1433 stage2_wp_range(kvm, start, end);
1434}
c6473555 1435
3b0f1d01
KH
1436/*
1437 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1438 * dirty pages.
1439 *
1440 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1441 * enable dirty logging for them.
1442 */
1443void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1444 struct kvm_memory_slot *slot,
1445 gfn_t gfn_offset, unsigned long mask)
1446{
1447 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1448}
1449
17ab9d57 1450static void clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size)
0d3e4d4f 1451{
17ab9d57 1452 __clean_dcache_guest_page(pfn, size);
a15f6939
MZ
1453}
1454
17ab9d57 1455static void invalidate_icache_guest_page(kvm_pfn_t pfn, unsigned long size)
a15f6939 1456{
17ab9d57 1457 __invalidate_icache_guest_page(pfn, size);
0d3e4d4f
MZ
1458}
1459
196f878a
JM
1460static void kvm_send_hwpoison_signal(unsigned long address,
1461 struct vm_area_struct *vma)
1462{
795a8371 1463 short lsb;
196f878a
JM
1464
1465 if (is_vm_hugetlb_page(vma))
795a8371 1466 lsb = huge_page_shift(hstate_vma(vma));
196f878a 1467 else
795a8371 1468 lsb = PAGE_SHIFT;
196f878a 1469
795a8371 1470 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)address, lsb, current);
196f878a
JM
1471}
1472
94f8e641 1473static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1474 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1475 unsigned long fault_status)
1476{
94f8e641 1477 int ret;
6396b852
PA
1478 bool write_fault, writable, force_pte = false;
1479 bool exec_fault, needs_exec;
94f8e641 1480 unsigned long mmu_seq;
ad361f09 1481 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1482 struct kvm *kvm = vcpu->kvm;
94f8e641 1483 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1484 struct vm_area_struct *vma;
ba049e93 1485 kvm_pfn_t pfn;
b8865767 1486 pgprot_t mem_type = PAGE_S2;
15a49a44 1487 bool logging_active = memslot_is_logging(memslot);
3f58bf63 1488 unsigned long vma_pagesize, flags = 0;
94f8e641 1489
a7d079ce 1490 write_fault = kvm_is_write_fault(vcpu);
d0e22b4a
MZ
1491 exec_fault = kvm_vcpu_trap_is_iabt(vcpu);
1492 VM_BUG_ON(write_fault && exec_fault);
1493
1494 if (fault_status == FSC_PERM && !write_fault && !exec_fault) {
94f8e641
CD
1495 kvm_err("Unexpected L2 read permission error\n");
1496 return -EFAULT;
1497 }
1498
ad361f09
CD
1499 /* Let's check if we will get back a huge page backed by hugetlbfs */
1500 down_read(&current->mm->mmap_sem);
1501 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1502 if (unlikely(!vma)) {
1503 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1504 up_read(&current->mm->mmap_sem);
1505 return -EFAULT;
1506 }
1507
3f58bf63
PA
1508 vma_pagesize = vma_kernel_pagesize(vma);
1509 if (vma_pagesize == PMD_SIZE && !logging_active) {
ad361f09 1510 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97 1511 } else {
3f58bf63
PA
1512 /*
1513 * Fallback to PTE if it's not one of the Stage 2
1514 * supported hugepage sizes
1515 */
1516 vma_pagesize = PAGE_SIZE;
1517
9b5fdb97 1518 /*
136d737f
MZ
1519 * Pages belonging to memslots that don't have the same
1520 * alignment for userspace and IPA cannot be mapped using
1521 * block descriptors even if the pages belong to a THP for
1522 * the process, because the stage-2 block descriptor will
1523 * cover more than a single THP and we loose atomicity for
1524 * unmapping, updates, and splits of the THP or other pages
1525 * in the stage-2 block range.
9b5fdb97 1526 */
136d737f
MZ
1527 if ((memslot->userspace_addr & ~PMD_MASK) !=
1528 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1529 force_pte = true;
ad361f09
CD
1530 }
1531 up_read(&current->mm->mmap_sem);
1532
94f8e641 1533 /* We need minimum second+third level pages */
e55cac5b 1534 ret = mmu_topup_memory_cache(memcache, kvm_mmu_cache_min_pages(kvm),
38f791a4 1535 KVM_NR_MEM_OBJS);
94f8e641
CD
1536 if (ret)
1537 return ret;
1538
1539 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1540 /*
1541 * Ensure the read of mmu_notifier_seq happens before we call
1542 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1543 * the page we just got a reference to gets unmapped before we have a
1544 * chance to grab the mmu_lock, which ensure that if the page gets
1545 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1546 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1547 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1548 */
1549 smp_rmb();
1550
ad361f09 1551 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
196f878a
JM
1552 if (pfn == KVM_PFN_ERR_HWPOISON) {
1553 kvm_send_hwpoison_signal(hva, vma);
1554 return 0;
1555 }
9ac71595 1556 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1557 return -EFAULT;
1558
15a49a44 1559 if (kvm_is_device_pfn(pfn)) {
b8865767 1560 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1561 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1562 } else if (logging_active) {
1563 /*
1564 * Faults on pages in a memslot with logging enabled
1565 * should not be mapped with huge pages (it introduces churn
1566 * and performance degradation), so force a pte mapping.
1567 */
1568 force_pte = true;
1569 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1570
1571 /*
1572 * Only actually map the page as writable if this was a write
1573 * fault.
1574 */
1575 if (!write_fault)
1576 writable = false;
1577 }
b8865767 1578
ad361f09
CD
1579 spin_lock(&kvm->mmu_lock);
1580 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1581 goto out_unlock;
15a49a44 1582
3f58bf63
PA
1583 if (vma_pagesize == PAGE_SIZE && !force_pte) {
1584 /*
1585 * Only PMD_SIZE transparent hugepages(THP) are
1586 * currently supported. This code will need to be
1587 * updated to support other THP sizes.
1588 */
1589 if (transparent_hugepage_adjust(&pfn, &fault_ipa))
1590 vma_pagesize = PMD_SIZE;
1591 }
1592
1593 if (writable)
1594 kvm_set_pfn_dirty(pfn);
ad361f09 1595
3f58bf63
PA
1596 if (fault_status != FSC_PERM)
1597 clean_dcache_guest_page(pfn, vma_pagesize);
1598
1599 if (exec_fault)
1600 invalidate_icache_guest_page(pfn, vma_pagesize);
1601
6396b852
PA
1602 /*
1603 * If we took an execution fault we have made the
1604 * icache/dcache coherent above and should now let the s2
1605 * mapping be executable.
1606 *
1607 * Write faults (!exec_fault && FSC_PERM) are orthogonal to
1608 * execute permissions, and we preserve whatever we have.
1609 */
1610 needs_exec = exec_fault ||
1611 (fault_status == FSC_PERM && stage2_is_exec(kvm, fault_ipa));
1612
3f58bf63 1613 if (vma_pagesize == PMD_SIZE) {
b8865767 1614 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09 1615 new_pmd = pmd_mkhuge(new_pmd);
3f58bf63 1616 if (writable)
06485053 1617 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
d0e22b4a 1618
6396b852 1619 if (needs_exec)
d0e22b4a 1620 new_pmd = kvm_s2pmd_mkexec(new_pmd);
a15f6939 1621
ad361f09
CD
1622 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1623 } else {
b8865767 1624 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1625
ad361f09 1626 if (writable) {
06485053 1627 new_pte = kvm_s2pte_mkwrite(new_pte);
15a49a44 1628 mark_page_dirty(kvm, gfn);
ad361f09 1629 }
a9c0e12e 1630
6396b852 1631 if (needs_exec)
d0e22b4a 1632 new_pte = kvm_s2pte_mkexec(new_pte);
a15f6939 1633
15a49a44 1634 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1635 }
ad361f09 1636
94f8e641 1637out_unlock:
ad361f09 1638 spin_unlock(&kvm->mmu_lock);
35307b9a 1639 kvm_set_pfn_accessed(pfn);
94f8e641 1640 kvm_release_pfn_clean(pfn);
ad361f09 1641 return ret;
94f8e641
CD
1642}
1643
aeda9130
MZ
1644/*
1645 * Resolve the access fault by making the page young again.
1646 * Note that because the faulting entry is guaranteed not to be
1647 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1648 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1649 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1650 */
1651static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1652{
1653 pmd_t *pmd;
1654 pte_t *pte;
ba049e93 1655 kvm_pfn_t pfn;
aeda9130
MZ
1656 bool pfn_valid = false;
1657
1658 trace_kvm_access_fault(fault_ipa);
1659
1660 spin_lock(&vcpu->kvm->mmu_lock);
1661
1662 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1663 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1664 goto out;
1665
bbb3b6b3 1666 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1667 *pmd = pmd_mkyoung(*pmd);
1668 pfn = pmd_pfn(*pmd);
1669 pfn_valid = true;
1670 goto out;
1671 }
1672
1673 pte = pte_offset_kernel(pmd, fault_ipa);
1674 if (pte_none(*pte)) /* Nothing there either */
1675 goto out;
1676
1677 *pte = pte_mkyoung(*pte); /* Just a page... */
1678 pfn = pte_pfn(*pte);
1679 pfn_valid = true;
1680out:
1681 spin_unlock(&vcpu->kvm->mmu_lock);
1682 if (pfn_valid)
1683 kvm_set_pfn_accessed(pfn);
1684}
1685
94f8e641
CD
1686/**
1687 * kvm_handle_guest_abort - handles all 2nd stage aborts
1688 * @vcpu: the VCPU pointer
1689 * @run: the kvm_run structure
1690 *
1691 * Any abort that gets to the host is almost guaranteed to be caused by a
1692 * missing second stage translation table entry, which can mean that either the
1693 * guest simply needs more memory and we must allocate an appropriate page or it
1694 * can mean that the guest tried to access I/O memory, which is emulated by user
1695 * space. The distinction is based on the IPA causing the fault and whether this
1696 * memory region has been registered as standard RAM by user space.
1697 */
342cd0ab
CD
1698int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1699{
94f8e641
CD
1700 unsigned long fault_status;
1701 phys_addr_t fault_ipa;
1702 struct kvm_memory_slot *memslot;
98047888
CD
1703 unsigned long hva;
1704 bool is_iabt, write_fault, writable;
94f8e641
CD
1705 gfn_t gfn;
1706 int ret, idx;
1707
621f48e4
TB
1708 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
1709
1710 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
bb428921 1711 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
621f48e4 1712
bb428921
JM
1713 /* Synchronous External Abort? */
1714 if (kvm_vcpu_dabt_isextabt(vcpu)) {
1715 /*
1716 * For RAS the host kernel may handle this abort.
1717 * There is no need to pass the error into the guest.
1718 */
621f48e4
TB
1719 if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
1720 return 1;
621f48e4 1721
bb428921
JM
1722 if (unlikely(!is_iabt)) {
1723 kvm_inject_vabt(vcpu);
1724 return 1;
1725 }
4055710b
MZ
1726 }
1727
7393b599
MZ
1728 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1729 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1730
1731 /* Check the stage-2 fault is trans. fault or write fault */
35307b9a
MZ
1732 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1733 fault_status != FSC_ACCESS) {
0496daa5
CD
1734 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1735 kvm_vcpu_trap_get_class(vcpu),
1736 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1737 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1738 return -EFAULT;
1739 }
1740
1741 idx = srcu_read_lock(&vcpu->kvm->srcu);
1742
1743 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1744 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1745 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1746 write_fault = kvm_is_write_fault(vcpu);
98047888 1747 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1748 if (is_iabt) {
1749 /* Prefetch Abort on I/O address */
7393b599 1750 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1751 ret = 1;
1752 goto out_unlock;
1753 }
1754
57c841f1
MZ
1755 /*
1756 * Check for a cache maintenance operation. Since we
1757 * ended-up here, we know it is outside of any memory
1758 * slot. But we can't find out if that is for a device,
1759 * or if the guest is just being stupid. The only thing
1760 * we know for sure is that this range cannot be cached.
1761 *
1762 * So let's assume that the guest is just being
1763 * cautious, and skip the instruction.
1764 */
1765 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1766 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1767 ret = 1;
1768 goto out_unlock;
1769 }
1770
cfe3950c
MZ
1771 /*
1772 * The IPA is reported as [MAX:12], so we need to
1773 * complement it with the bottom 12 bits from the
1774 * faulting VA. This is always 12 bits, irrespective
1775 * of the page size.
1776 */
1777 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1778 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1779 goto out_unlock;
1780 }
1781
c3058d5d 1782 /* Userspace should not be able to register out-of-bounds IPAs */
e55cac5b 1783 VM_BUG_ON(fault_ipa >= kvm_phys_size(vcpu->kvm));
c3058d5d 1784
aeda9130
MZ
1785 if (fault_status == FSC_ACCESS) {
1786 handle_access_fault(vcpu, fault_ipa);
1787 ret = 1;
1788 goto out_unlock;
1789 }
1790
98047888 1791 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1792 if (ret == 0)
1793 ret = 1;
1794out_unlock:
1795 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1796 return ret;
342cd0ab
CD
1797}
1798
1d2ebacc
MZ
1799static int handle_hva_to_gpa(struct kvm *kvm,
1800 unsigned long start,
1801 unsigned long end,
1802 int (*handler)(struct kvm *kvm,
056aad67
SP
1803 gpa_t gpa, u64 size,
1804 void *data),
1d2ebacc 1805 void *data)
d5d8184d
CD
1806{
1807 struct kvm_memslots *slots;
1808 struct kvm_memory_slot *memslot;
1d2ebacc 1809 int ret = 0;
d5d8184d
CD
1810
1811 slots = kvm_memslots(kvm);
1812
1813 /* we only care about the pages that the guest sees */
1814 kvm_for_each_memslot(memslot, slots) {
1815 unsigned long hva_start, hva_end;
056aad67 1816 gfn_t gpa;
d5d8184d
CD
1817
1818 hva_start = max(start, memslot->userspace_addr);
1819 hva_end = min(end, memslot->userspace_addr +
1820 (memslot->npages << PAGE_SHIFT));
1821 if (hva_start >= hva_end)
1822 continue;
1823
056aad67
SP
1824 gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
1825 ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
d5d8184d 1826 }
1d2ebacc
MZ
1827
1828 return ret;
d5d8184d
CD
1829}
1830
056aad67 1831static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d 1832{
056aad67 1833 unmap_stage2_range(kvm, gpa, size);
1d2ebacc 1834 return 0;
d5d8184d
CD
1835}
1836
d5d8184d
CD
1837int kvm_unmap_hva_range(struct kvm *kvm,
1838 unsigned long start, unsigned long end)
1839{
1840 if (!kvm->arch.pgd)
1841 return 0;
1842
1843 trace_kvm_unmap_hva_range(start, end);
1844 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1845 return 0;
1846}
1847
056aad67 1848static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d
CD
1849{
1850 pte_t *pte = (pte_t *)data;
1851
056aad67 1852 WARN_ON(size != PAGE_SIZE);
15a49a44
MS
1853 /*
1854 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1855 * flag clear because MMU notifiers will have unmapped a huge PMD before
1856 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1857 * therefore stage2_set_pte() never needs to clear out a huge PMD
1858 * through this calling path.
1859 */
1860 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1861 return 0;
d5d8184d
CD
1862}
1863
1864
1865void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1866{
1867 unsigned long end = hva + PAGE_SIZE;
694556d5 1868 kvm_pfn_t pfn = pte_pfn(pte);
d5d8184d
CD
1869 pte_t stage2_pte;
1870
1871 if (!kvm->arch.pgd)
1872 return;
1873
1874 trace_kvm_set_spte_hva(hva);
694556d5
MZ
1875
1876 /*
1877 * We've moved a page around, probably through CoW, so let's treat it
1878 * just like a translation fault and clean the cache to the PoC.
1879 */
1880 clean_dcache_guest_page(pfn, PAGE_SIZE);
1881 stage2_pte = pfn_pte(pfn, PAGE_S2);
d5d8184d
CD
1882 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1883}
1884
056aad67 1885static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1886{
1887 pmd_t *pmd;
1888 pte_t *pte;
1889
056aad67 1890 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1891 pmd = stage2_get_pmd(kvm, NULL, gpa);
1892 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1893 return 0;
1894
06485053
CM
1895 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1896 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1897
1898 pte = pte_offset_kernel(pmd, gpa);
1899 if (pte_none(*pte))
1900 return 0;
1901
06485053 1902 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1903}
1904
056aad67 1905static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1906{
1907 pmd_t *pmd;
1908 pte_t *pte;
1909
056aad67 1910 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1911 pmd = stage2_get_pmd(kvm, NULL, gpa);
1912 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1913 return 0;
1914
bbb3b6b3 1915 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1916 return pmd_young(*pmd);
1917
1918 pte = pte_offset_kernel(pmd, gpa);
1919 if (!pte_none(*pte)) /* Just a page... */
1920 return pte_young(*pte);
1921
1922 return 0;
1923}
1924
1925int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1926{
7e5a6722
SP
1927 if (!kvm->arch.pgd)
1928 return 0;
35307b9a
MZ
1929 trace_kvm_age_hva(start, end);
1930 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1931}
1932
1933int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1934{
7e5a6722
SP
1935 if (!kvm->arch.pgd)
1936 return 0;
35307b9a
MZ
1937 trace_kvm_test_age_hva(hva);
1938 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1939}
1940
d5d8184d
CD
1941void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1942{
1943 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1944}
1945
342cd0ab
CD
1946phys_addr_t kvm_mmu_get_httbr(void)
1947{
e4c5a685
AB
1948 if (__kvm_cpu_uses_extended_idmap())
1949 return virt_to_phys(merged_hyp_pgd);
1950 else
1951 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1952}
1953
5a677ce0
MZ
1954phys_addr_t kvm_get_idmap_vector(void)
1955{
1956 return hyp_idmap_vector;
1957}
1958
0535a3e2
MZ
1959static int kvm_map_idmap_text(pgd_t *pgd)
1960{
1961 int err;
1962
1963 /* Create the idmap in the boot page tables */
98732d1b 1964 err = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(),
0535a3e2
MZ
1965 hyp_idmap_start, hyp_idmap_end,
1966 __phys_to_pfn(hyp_idmap_start),
1967 PAGE_HYP_EXEC);
1968 if (err)
1969 kvm_err("Failed to idmap %lx-%lx\n",
1970 hyp_idmap_start, hyp_idmap_end);
1971
1972 return err;
1973}
1974
342cd0ab
CD
1975int kvm_mmu_init(void)
1976{
2fb41059
MZ
1977 int err;
1978
4fda342c 1979 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
46fef158 1980 hyp_idmap_start = ALIGN_DOWN(hyp_idmap_start, PAGE_SIZE);
4fda342c 1981 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
46fef158 1982 hyp_idmap_end = ALIGN(hyp_idmap_end, PAGE_SIZE);
4fda342c 1983 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1984
06f75a1f
AB
1985 /*
1986 * We rely on the linker script to ensure at build time that the HYP
1987 * init code does not cross a page boundary.
1988 */
1989 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1990
b4ef0499
MZ
1991 kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
1992 kvm_debug("HYP VA range: %lx:%lx\n",
1993 kern_hyp_va(PAGE_OFFSET),
1994 kern_hyp_va((unsigned long)high_memory - 1));
eac378a9 1995
6c41a413 1996 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
ed57cac8 1997 hyp_idmap_start < kern_hyp_va((unsigned long)high_memory - 1) &&
d2896d4b 1998 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1999 /*
2000 * The idmap page is intersecting with the VA space,
2001 * it is not safe to continue further.
2002 */
2003 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
2004 err = -EINVAL;
2005 goto out;
2006 }
2007
38f791a4 2008 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 2009 if (!hyp_pgd) {
d5d8184d 2010 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
2011 err = -ENOMEM;
2012 goto out;
2013 }
2014
0535a3e2
MZ
2015 if (__kvm_cpu_uses_extended_idmap()) {
2016 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
2017 hyp_pgd_order);
2018 if (!boot_hyp_pgd) {
2019 kvm_err("Hyp boot PGD not allocated\n");
2020 err = -ENOMEM;
2021 goto out;
2022 }
2fb41059 2023
0535a3e2
MZ
2024 err = kvm_map_idmap_text(boot_hyp_pgd);
2025 if (err)
2026 goto out;
d5d8184d 2027
e4c5a685
AB
2028 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
2029 if (!merged_hyp_pgd) {
2030 kvm_err("Failed to allocate extra HYP pgd\n");
2031 goto out;
2032 }
2033 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
2034 hyp_idmap_start);
0535a3e2
MZ
2035 } else {
2036 err = kvm_map_idmap_text(hyp_pgd);
2037 if (err)
2038 goto out;
5a677ce0
MZ
2039 }
2040
e3f019b3 2041 io_map_base = hyp_idmap_start;
d5d8184d 2042 return 0;
2fb41059 2043out:
4f728276 2044 free_hyp_pgds();
2fb41059 2045 return err;
342cd0ab 2046}
df6ce24f
EA
2047
2048void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 2049 const struct kvm_userspace_memory_region *mem,
df6ce24f 2050 const struct kvm_memory_slot *old,
f36f3f28 2051 const struct kvm_memory_slot *new,
df6ce24f
EA
2052 enum kvm_mr_change change)
2053{
c6473555
MS
2054 /*
2055 * At this point memslot has been committed and there is an
2056 * allocated dirty_bitmap[], dirty pages will be be tracked while the
2057 * memory slot is write protected.
2058 */
2059 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
2060 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
2061}
2062
2063int kvm_arch_prepare_memory_region(struct kvm *kvm,
2064 struct kvm_memory_slot *memslot,
09170a49 2065 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
2066 enum kvm_mr_change change)
2067{
8eef9123
AB
2068 hva_t hva = mem->userspace_addr;
2069 hva_t reg_end = hva + mem->memory_size;
2070 bool writable = !(mem->flags & KVM_MEM_READONLY);
2071 int ret = 0;
2072
15a49a44
MS
2073 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
2074 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
2075 return 0;
2076
c3058d5d
CD
2077 /*
2078 * Prevent userspace from creating a memory region outside of the IPA
2079 * space addressable by the KVM guest IPA space.
2080 */
2081 if (memslot->base_gfn + memslot->npages >=
e55cac5b 2082 (kvm_phys_size(kvm) >> PAGE_SHIFT))
c3058d5d
CD
2083 return -EFAULT;
2084
72f31048 2085 down_read(&current->mm->mmap_sem);
8eef9123
AB
2086 /*
2087 * A memory region could potentially cover multiple VMAs, and any holes
2088 * between them, so iterate over all of them to find out if we can map
2089 * any of them right now.
2090 *
2091 * +--------------------------------------------+
2092 * +---------------+----------------+ +----------------+
2093 * | : VMA 1 | VMA 2 | | VMA 3 : |
2094 * +---------------+----------------+ +----------------+
2095 * | memory region |
2096 * +--------------------------------------------+
2097 */
2098 do {
2099 struct vm_area_struct *vma = find_vma(current->mm, hva);
2100 hva_t vm_start, vm_end;
2101
2102 if (!vma || vma->vm_start >= reg_end)
2103 break;
2104
2105 /*
2106 * Mapping a read-only VMA is only allowed if the
2107 * memory region is configured as read-only.
2108 */
2109 if (writable && !(vma->vm_flags & VM_WRITE)) {
2110 ret = -EPERM;
2111 break;
2112 }
2113
2114 /*
2115 * Take the intersection of this VMA with the memory region
2116 */
2117 vm_start = max(hva, vma->vm_start);
2118 vm_end = min(reg_end, vma->vm_end);
2119
2120 if (vma->vm_flags & VM_PFNMAP) {
2121 gpa_t gpa = mem->guest_phys_addr +
2122 (vm_start - mem->userspace_addr);
ca09f02f
MM
2123 phys_addr_t pa;
2124
2125 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
2126 pa += vm_start - vma->vm_start;
8eef9123 2127
15a49a44 2128 /* IO region dirty page logging not allowed */
72f31048
MZ
2129 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
2130 ret = -EINVAL;
2131 goto out;
2132 }
15a49a44 2133
8eef9123
AB
2134 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
2135 vm_end - vm_start,
2136 writable);
2137 if (ret)
2138 break;
2139 }
2140 hva = vm_end;
2141 } while (hva < reg_end);
2142
15a49a44 2143 if (change == KVM_MR_FLAGS_ONLY)
72f31048 2144 goto out;
15a49a44 2145
849260c7
AB
2146 spin_lock(&kvm->mmu_lock);
2147 if (ret)
8eef9123 2148 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
2149 else
2150 stage2_flush_memslot(kvm, memslot);
2151 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
2152out:
2153 up_read(&current->mm->mmap_sem);
8eef9123 2154 return ret;
df6ce24f
EA
2155}
2156
2157void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
2158 struct kvm_memory_slot *dont)
2159{
2160}
2161
2162int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
2163 unsigned long npages)
2164{
2165 return 0;
2166}
2167
15f46015 2168void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
2169{
2170}
2171
2172void kvm_arch_flush_shadow_all(struct kvm *kvm)
2173{
293f2936 2174 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
2175}
2176
2177void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
2178 struct kvm_memory_slot *slot)
2179{
8eef9123
AB
2180 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
2181 phys_addr_t size = slot->npages << PAGE_SHIFT;
2182
2183 spin_lock(&kvm->mmu_lock);
2184 unmap_stage2_range(kvm, gpa, size);
2185 spin_unlock(&kvm->mmu_lock);
df6ce24f 2186}
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2187
2188/*
2189 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
2190 *
2191 * Main problems:
2192 * - S/W ops are local to a CPU (not broadcast)
2193 * - We have line migration behind our back (speculation)
2194 * - System caches don't support S/W at all (damn!)
2195 *
2196 * In the face of the above, the best we can do is to try and convert
2197 * S/W ops to VA ops. Because the guest is not allowed to infer the
2198 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
2199 * which is a rather good thing for us.
2200 *
2201 * Also, it is only used when turning caches on/off ("The expected
2202 * usage of the cache maintenance instructions that operate by set/way
2203 * is associated with the cache maintenance instructions associated
2204 * with the powerdown and powerup of caches, if this is required by
2205 * the implementation.").
2206 *
2207 * We use the following policy:
2208 *
2209 * - If we trap a S/W operation, we enable VM trapping to detect
2210 * caches being turned on/off, and do a full clean.
2211 *
2212 * - We flush the caches on both caches being turned on and off.
2213 *
2214 * - Once the caches are enabled, we stop trapping VM ops.
2215 */
2216void kvm_set_way_flush(struct kvm_vcpu *vcpu)
2217{
3df59d8d 2218 unsigned long hcr = *vcpu_hcr(vcpu);
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2219
2220 /*
2221 * If this is the first time we do a S/W operation
2222 * (i.e. HCR_TVM not set) flush the whole memory, and set the
2223 * VM trapping.
2224 *
2225 * Otherwise, rely on the VM trapping to wait for the MMU +
2226 * Caches to be turned off. At that point, we'll be able to
2227 * clean the caches again.
2228 */
2229 if (!(hcr & HCR_TVM)) {
2230 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
2231 vcpu_has_cache_enabled(vcpu));
2232 stage2_flush_vm(vcpu->kvm);
3df59d8d 2233 *vcpu_hcr(vcpu) = hcr | HCR_TVM;
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2234 }
2235}
2236
2237void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
2238{
2239 bool now_enabled = vcpu_has_cache_enabled(vcpu);
2240
2241 /*
2242 * If switching the MMU+caches on, need to invalidate the caches.
2243 * If switching it off, need to clean the caches.
2244 * Clean + invalidate does the trick always.
2245 */
2246 if (now_enabled != was_enabled)
2247 stage2_flush_vm(vcpu->kvm);
2248
2249 /* Caches are now on, stop trapping VM ops (until a S/W op) */
2250 if (now_enabled)
3df59d8d 2251 *vcpu_hcr(vcpu) &= ~HCR_TVM;
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2252
2253 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
2254}