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749cf76c CD |
1 | /* |
2 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University | |
3 | * Author: Christoffer Dall <c.dall@virtualopensystems.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License, version 2, as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
17 | */ | |
342cd0ab CD |
18 | |
19 | #include <linux/mman.h> | |
20 | #include <linux/kvm_host.h> | |
21 | #include <linux/io.h> | |
ad361f09 | 22 | #include <linux/hugetlb.h> |
196f878a | 23 | #include <linux/sched/signal.h> |
45e96ea6 | 24 | #include <trace/events/kvm.h> |
342cd0ab | 25 | #include <asm/pgalloc.h> |
94f8e641 | 26 | #include <asm/cacheflush.h> |
342cd0ab CD |
27 | #include <asm/kvm_arm.h> |
28 | #include <asm/kvm_mmu.h> | |
45e96ea6 | 29 | #include <asm/kvm_mmio.h> |
d5d8184d | 30 | #include <asm/kvm_asm.h> |
94f8e641 | 31 | #include <asm/kvm_emulate.h> |
1e947bad | 32 | #include <asm/virt.h> |
621f48e4 | 33 | #include <asm/system_misc.h> |
d5d8184d CD |
34 | |
35 | #include "trace.h" | |
342cd0ab | 36 | |
5a677ce0 | 37 | static pgd_t *boot_hyp_pgd; |
2fb41059 | 38 | static pgd_t *hyp_pgd; |
e4c5a685 | 39 | static pgd_t *merged_hyp_pgd; |
342cd0ab CD |
40 | static DEFINE_MUTEX(kvm_hyp_pgd_mutex); |
41 | ||
5a677ce0 MZ |
42 | static unsigned long hyp_idmap_start; |
43 | static unsigned long hyp_idmap_end; | |
44 | static phys_addr_t hyp_idmap_vector; | |
45 | ||
e3f019b3 MZ |
46 | static unsigned long io_map_base; |
47 | ||
9163ee23 | 48 | #define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t)) |
38f791a4 | 49 | #define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t)) |
5d4e08c4 | 50 | |
15a49a44 MS |
51 | #define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0) |
52 | #define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1) | |
53 | ||
54 | static bool memslot_is_logging(struct kvm_memory_slot *memslot) | |
55 | { | |
15a49a44 | 56 | return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY); |
7276030a MS |
57 | } |
58 | ||
59 | /** | |
60 | * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8 | |
61 | * @kvm: pointer to kvm structure. | |
62 | * | |
63 | * Interface to HYP function to flush all VM TLB entries | |
64 | */ | |
65 | void kvm_flush_remote_tlbs(struct kvm *kvm) | |
66 | { | |
67 | kvm_call_hyp(__kvm_tlb_flush_vmid, kvm); | |
15a49a44 | 68 | } |
ad361f09 | 69 | |
48762767 | 70 | static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) |
d5d8184d | 71 | { |
8684e701 | 72 | kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa); |
d5d8184d CD |
73 | } |
74 | ||
363ef89f MZ |
75 | /* |
76 | * D-Cache management functions. They take the page table entries by | |
77 | * value, as they are flushing the cache using the kernel mapping (or | |
78 | * kmap on 32bit). | |
79 | */ | |
80 | static void kvm_flush_dcache_pte(pte_t pte) | |
81 | { | |
82 | __kvm_flush_dcache_pte(pte); | |
83 | } | |
84 | ||
85 | static void kvm_flush_dcache_pmd(pmd_t pmd) | |
86 | { | |
87 | __kvm_flush_dcache_pmd(pmd); | |
88 | } | |
89 | ||
90 | static void kvm_flush_dcache_pud(pud_t pud) | |
91 | { | |
92 | __kvm_flush_dcache_pud(pud); | |
93 | } | |
94 | ||
e6fab544 AB |
95 | static bool kvm_is_device_pfn(unsigned long pfn) |
96 | { | |
97 | return !pfn_valid(pfn); | |
98 | } | |
99 | ||
15a49a44 MS |
100 | /** |
101 | * stage2_dissolve_pmd() - clear and flush huge PMD entry | |
102 | * @kvm: pointer to kvm structure. | |
103 | * @addr: IPA | |
104 | * @pmd: pmd pointer for IPA | |
105 | * | |
106 | * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all | |
107 | * pages in the range dirty. | |
108 | */ | |
109 | static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd) | |
110 | { | |
bbb3b6b3 | 111 | if (!pmd_thp_or_huge(*pmd)) |
15a49a44 MS |
112 | return; |
113 | ||
114 | pmd_clear(pmd); | |
115 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
116 | put_page(virt_to_page(pmd)); | |
117 | } | |
118 | ||
d5d8184d CD |
119 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
120 | int min, int max) | |
121 | { | |
122 | void *page; | |
123 | ||
124 | BUG_ON(max > KVM_NR_MEM_OBJS); | |
125 | if (cache->nobjs >= min) | |
126 | return 0; | |
127 | while (cache->nobjs < max) { | |
128 | page = (void *)__get_free_page(PGALLOC_GFP); | |
129 | if (!page) | |
130 | return -ENOMEM; | |
131 | cache->objects[cache->nobjs++] = page; | |
132 | } | |
133 | return 0; | |
134 | } | |
135 | ||
136 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
137 | { | |
138 | while (mc->nobjs) | |
139 | free_page((unsigned long)mc->objects[--mc->nobjs]); | |
140 | } | |
141 | ||
142 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) | |
143 | { | |
144 | void *p; | |
145 | ||
146 | BUG_ON(!mc || !mc->nobjs); | |
147 | p = mc->objects[--mc->nobjs]; | |
148 | return p; | |
149 | } | |
150 | ||
7a1c831e | 151 | static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr) |
979acd5e | 152 | { |
7a1c831e SP |
153 | pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL); |
154 | stage2_pgd_clear(pgd); | |
4f853a71 | 155 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
7a1c831e | 156 | stage2_pud_free(pud_table); |
4f853a71 | 157 | put_page(virt_to_page(pgd)); |
979acd5e MZ |
158 | } |
159 | ||
7a1c831e | 160 | static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr) |
342cd0ab | 161 | { |
7a1c831e SP |
162 | pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0); |
163 | VM_BUG_ON(stage2_pud_huge(*pud)); | |
164 | stage2_pud_clear(pud); | |
4f853a71 | 165 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
7a1c831e | 166 | stage2_pmd_free(pmd_table); |
4f728276 MZ |
167 | put_page(virt_to_page(pud)); |
168 | } | |
342cd0ab | 169 | |
7a1c831e | 170 | static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr) |
4f728276 | 171 | { |
4f853a71 | 172 | pte_t *pte_table = pte_offset_kernel(pmd, 0); |
bbb3b6b3 | 173 | VM_BUG_ON(pmd_thp_or_huge(*pmd)); |
4f853a71 CD |
174 | pmd_clear(pmd); |
175 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
176 | pte_free_kernel(NULL, pte_table); | |
4f728276 MZ |
177 | put_page(virt_to_page(pmd)); |
178 | } | |
179 | ||
88dc25e8 MZ |
180 | static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte) |
181 | { | |
182 | WRITE_ONCE(*ptep, new_pte); | |
183 | dsb(ishst); | |
184 | } | |
185 | ||
186 | static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd) | |
187 | { | |
188 | WRITE_ONCE(*pmdp, new_pmd); | |
189 | dsb(ishst); | |
190 | } | |
191 | ||
0db9dd8a MZ |
192 | static inline void kvm_pmd_populate(pmd_t *pmdp, pte_t *ptep) |
193 | { | |
194 | kvm_set_pmd(pmdp, kvm_mk_pmd(ptep)); | |
195 | } | |
196 | ||
197 | static inline void kvm_pud_populate(pud_t *pudp, pmd_t *pmdp) | |
198 | { | |
199 | WRITE_ONCE(*pudp, kvm_mk_pud(pmdp)); | |
200 | dsb(ishst); | |
201 | } | |
202 | ||
203 | static inline void kvm_pgd_populate(pgd_t *pgdp, pud_t *pudp) | |
204 | { | |
205 | WRITE_ONCE(*pgdp, kvm_mk_pgd(pudp)); | |
206 | dsb(ishst); | |
207 | } | |
208 | ||
363ef89f MZ |
209 | /* |
210 | * Unmapping vs dcache management: | |
211 | * | |
212 | * If a guest maps certain memory pages as uncached, all writes will | |
213 | * bypass the data cache and go directly to RAM. However, the CPUs | |
214 | * can still speculate reads (not writes) and fill cache lines with | |
215 | * data. | |
216 | * | |
217 | * Those cache lines will be *clean* cache lines though, so a | |
218 | * clean+invalidate operation is equivalent to an invalidate | |
219 | * operation, because no cache lines are marked dirty. | |
220 | * | |
221 | * Those clean cache lines could be filled prior to an uncached write | |
222 | * by the guest, and the cache coherent IO subsystem would therefore | |
223 | * end up writing old data to disk. | |
224 | * | |
225 | * This is why right after unmapping a page/section and invalidating | |
226 | * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure | |
227 | * the IO subsystem will never hit in the cache. | |
e48d53a9 MZ |
228 | * |
229 | * This is all avoided on systems that have ARM64_HAS_STAGE2_FWB, as | |
230 | * we then fully enforce cacheability of RAM, no matter what the guest | |
231 | * does. | |
363ef89f | 232 | */ |
7a1c831e | 233 | static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd, |
4f853a71 | 234 | phys_addr_t addr, phys_addr_t end) |
4f728276 | 235 | { |
4f853a71 CD |
236 | phys_addr_t start_addr = addr; |
237 | pte_t *pte, *start_pte; | |
238 | ||
239 | start_pte = pte = pte_offset_kernel(pmd, addr); | |
240 | do { | |
241 | if (!pte_none(*pte)) { | |
363ef89f MZ |
242 | pte_t old_pte = *pte; |
243 | ||
4f853a71 | 244 | kvm_set_pte(pte, __pte(0)); |
4f853a71 | 245 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
363ef89f MZ |
246 | |
247 | /* No need to invalidate the cache for device mappings */ | |
0de58f85 | 248 | if (!kvm_is_device_pfn(pte_pfn(old_pte))) |
363ef89f MZ |
249 | kvm_flush_dcache_pte(old_pte); |
250 | ||
251 | put_page(virt_to_page(pte)); | |
4f853a71 CD |
252 | } |
253 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
254 | ||
7a1c831e SP |
255 | if (stage2_pte_table_empty(start_pte)) |
256 | clear_stage2_pmd_entry(kvm, pmd, start_addr); | |
342cd0ab CD |
257 | } |
258 | ||
7a1c831e | 259 | static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud, |
4f853a71 | 260 | phys_addr_t addr, phys_addr_t end) |
000d3996 | 261 | { |
4f853a71 CD |
262 | phys_addr_t next, start_addr = addr; |
263 | pmd_t *pmd, *start_pmd; | |
000d3996 | 264 | |
7a1c831e | 265 | start_pmd = pmd = stage2_pmd_offset(pud, addr); |
4f853a71 | 266 | do { |
7a1c831e | 267 | next = stage2_pmd_addr_end(addr, end); |
4f853a71 | 268 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 269 | if (pmd_thp_or_huge(*pmd)) { |
363ef89f MZ |
270 | pmd_t old_pmd = *pmd; |
271 | ||
4f853a71 CD |
272 | pmd_clear(pmd); |
273 | kvm_tlb_flush_vmid_ipa(kvm, addr); | |
363ef89f MZ |
274 | |
275 | kvm_flush_dcache_pmd(old_pmd); | |
276 | ||
4f853a71 CD |
277 | put_page(virt_to_page(pmd)); |
278 | } else { | |
7a1c831e | 279 | unmap_stage2_ptes(kvm, pmd, addr, next); |
4f853a71 | 280 | } |
ad361f09 | 281 | } |
4f853a71 | 282 | } while (pmd++, addr = next, addr != end); |
ad361f09 | 283 | |
7a1c831e SP |
284 | if (stage2_pmd_table_empty(start_pmd)) |
285 | clear_stage2_pud_entry(kvm, pud, start_addr); | |
4f853a71 | 286 | } |
000d3996 | 287 | |
7a1c831e | 288 | static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd, |
4f853a71 CD |
289 | phys_addr_t addr, phys_addr_t end) |
290 | { | |
291 | phys_addr_t next, start_addr = addr; | |
292 | pud_t *pud, *start_pud; | |
4f728276 | 293 | |
7a1c831e | 294 | start_pud = pud = stage2_pud_offset(pgd, addr); |
4f853a71 | 295 | do { |
7a1c831e SP |
296 | next = stage2_pud_addr_end(addr, end); |
297 | if (!stage2_pud_none(*pud)) { | |
298 | if (stage2_pud_huge(*pud)) { | |
363ef89f MZ |
299 | pud_t old_pud = *pud; |
300 | ||
7a1c831e | 301 | stage2_pud_clear(pud); |
4f853a71 | 302 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
363ef89f | 303 | kvm_flush_dcache_pud(old_pud); |
4f853a71 CD |
304 | put_page(virt_to_page(pud)); |
305 | } else { | |
7a1c831e | 306 | unmap_stage2_pmds(kvm, pud, addr, next); |
4f728276 MZ |
307 | } |
308 | } | |
4f853a71 | 309 | } while (pud++, addr = next, addr != end); |
4f728276 | 310 | |
7a1c831e SP |
311 | if (stage2_pud_table_empty(start_pud)) |
312 | clear_stage2_pgd_entry(kvm, pgd, start_addr); | |
4f853a71 CD |
313 | } |
314 | ||
7a1c831e SP |
315 | /** |
316 | * unmap_stage2_range -- Clear stage2 page table entries to unmap a range | |
317 | * @kvm: The VM pointer | |
318 | * @start: The intermediate physical base address of the range to unmap | |
319 | * @size: The size of the area to unmap | |
320 | * | |
321 | * Clear a range of stage-2 mappings, lowering the various ref-counts. Must | |
322 | * be called while holding mmu_lock (unless for freeing the stage2 pgd before | |
323 | * destroying the VM), otherwise another faulting VCPU may come in and mess | |
324 | * with things behind our backs. | |
325 | */ | |
326 | static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size) | |
4f853a71 CD |
327 | { |
328 | pgd_t *pgd; | |
329 | phys_addr_t addr = start, end = start + size; | |
330 | phys_addr_t next; | |
331 | ||
8b3405e3 | 332 | assert_spin_locked(&kvm->mmu_lock); |
47a91b72 JH |
333 | WARN_ON(size & ~PAGE_MASK); |
334 | ||
7a1c831e | 335 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
4f853a71 | 336 | do { |
0c428a6a SP |
337 | /* |
338 | * Make sure the page table is still active, as another thread | |
339 | * could have possibly freed the page table, while we released | |
340 | * the lock. | |
341 | */ | |
342 | if (!READ_ONCE(kvm->arch.pgd)) | |
343 | break; | |
7a1c831e SP |
344 | next = stage2_pgd_addr_end(addr, end); |
345 | if (!stage2_pgd_none(*pgd)) | |
346 | unmap_stage2_puds(kvm, pgd, addr, next); | |
8b3405e3 SP |
347 | /* |
348 | * If the range is too large, release the kvm->mmu_lock | |
349 | * to prevent starvation and lockup detector warnings. | |
350 | */ | |
351 | if (next != end) | |
352 | cond_resched_lock(&kvm->mmu_lock); | |
4f853a71 | 353 | } while (pgd++, addr = next, addr != end); |
000d3996 MZ |
354 | } |
355 | ||
9d218a1f MZ |
356 | static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd, |
357 | phys_addr_t addr, phys_addr_t end) | |
358 | { | |
359 | pte_t *pte; | |
360 | ||
361 | pte = pte_offset_kernel(pmd, addr); | |
362 | do { | |
0de58f85 | 363 | if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte))) |
363ef89f | 364 | kvm_flush_dcache_pte(*pte); |
9d218a1f MZ |
365 | } while (pte++, addr += PAGE_SIZE, addr != end); |
366 | } | |
367 | ||
368 | static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud, | |
369 | phys_addr_t addr, phys_addr_t end) | |
370 | { | |
371 | pmd_t *pmd; | |
372 | phys_addr_t next; | |
373 | ||
70fd1906 | 374 | pmd = stage2_pmd_offset(pud, addr); |
9d218a1f | 375 | do { |
70fd1906 | 376 | next = stage2_pmd_addr_end(addr, end); |
9d218a1f | 377 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 378 | if (pmd_thp_or_huge(*pmd)) |
363ef89f MZ |
379 | kvm_flush_dcache_pmd(*pmd); |
380 | else | |
9d218a1f | 381 | stage2_flush_ptes(kvm, pmd, addr, next); |
9d218a1f MZ |
382 | } |
383 | } while (pmd++, addr = next, addr != end); | |
384 | } | |
385 | ||
386 | static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd, | |
387 | phys_addr_t addr, phys_addr_t end) | |
388 | { | |
389 | pud_t *pud; | |
390 | phys_addr_t next; | |
391 | ||
70fd1906 | 392 | pud = stage2_pud_offset(pgd, addr); |
9d218a1f | 393 | do { |
70fd1906 SP |
394 | next = stage2_pud_addr_end(addr, end); |
395 | if (!stage2_pud_none(*pud)) { | |
396 | if (stage2_pud_huge(*pud)) | |
363ef89f MZ |
397 | kvm_flush_dcache_pud(*pud); |
398 | else | |
9d218a1f | 399 | stage2_flush_pmds(kvm, pud, addr, next); |
9d218a1f MZ |
400 | } |
401 | } while (pud++, addr = next, addr != end); | |
402 | } | |
403 | ||
404 | static void stage2_flush_memslot(struct kvm *kvm, | |
405 | struct kvm_memory_slot *memslot) | |
406 | { | |
407 | phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; | |
408 | phys_addr_t end = addr + PAGE_SIZE * memslot->npages; | |
409 | phys_addr_t next; | |
410 | pgd_t *pgd; | |
411 | ||
70fd1906 | 412 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
9d218a1f | 413 | do { |
70fd1906 | 414 | next = stage2_pgd_addr_end(addr, end); |
9d218a1f MZ |
415 | stage2_flush_puds(kvm, pgd, addr, next); |
416 | } while (pgd++, addr = next, addr != end); | |
417 | } | |
418 | ||
419 | /** | |
420 | * stage2_flush_vm - Invalidate cache for pages mapped in stage 2 | |
421 | * @kvm: The struct kvm pointer | |
422 | * | |
423 | * Go through the stage 2 page tables and invalidate any cache lines | |
424 | * backing memory already mapped to the VM. | |
425 | */ | |
3c1e7165 | 426 | static void stage2_flush_vm(struct kvm *kvm) |
9d218a1f MZ |
427 | { |
428 | struct kvm_memslots *slots; | |
429 | struct kvm_memory_slot *memslot; | |
430 | int idx; | |
431 | ||
432 | idx = srcu_read_lock(&kvm->srcu); | |
433 | spin_lock(&kvm->mmu_lock); | |
434 | ||
435 | slots = kvm_memslots(kvm); | |
436 | kvm_for_each_memslot(memslot, slots) | |
437 | stage2_flush_memslot(kvm, memslot); | |
438 | ||
439 | spin_unlock(&kvm->mmu_lock); | |
440 | srcu_read_unlock(&kvm->srcu, idx); | |
441 | } | |
442 | ||
64f32497 SP |
443 | static void clear_hyp_pgd_entry(pgd_t *pgd) |
444 | { | |
445 | pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL); | |
446 | pgd_clear(pgd); | |
447 | pud_free(NULL, pud_table); | |
448 | put_page(virt_to_page(pgd)); | |
449 | } | |
450 | ||
451 | static void clear_hyp_pud_entry(pud_t *pud) | |
452 | { | |
453 | pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0); | |
454 | VM_BUG_ON(pud_huge(*pud)); | |
455 | pud_clear(pud); | |
456 | pmd_free(NULL, pmd_table); | |
457 | put_page(virt_to_page(pud)); | |
458 | } | |
459 | ||
460 | static void clear_hyp_pmd_entry(pmd_t *pmd) | |
461 | { | |
462 | pte_t *pte_table = pte_offset_kernel(pmd, 0); | |
463 | VM_BUG_ON(pmd_thp_or_huge(*pmd)); | |
464 | pmd_clear(pmd); | |
465 | pte_free_kernel(NULL, pte_table); | |
466 | put_page(virt_to_page(pmd)); | |
467 | } | |
468 | ||
469 | static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) | |
470 | { | |
471 | pte_t *pte, *start_pte; | |
472 | ||
473 | start_pte = pte = pte_offset_kernel(pmd, addr); | |
474 | do { | |
475 | if (!pte_none(*pte)) { | |
476 | kvm_set_pte(pte, __pte(0)); | |
477 | put_page(virt_to_page(pte)); | |
478 | } | |
479 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
480 | ||
481 | if (hyp_pte_table_empty(start_pte)) | |
482 | clear_hyp_pmd_entry(pmd); | |
483 | } | |
484 | ||
485 | static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) | |
486 | { | |
487 | phys_addr_t next; | |
488 | pmd_t *pmd, *start_pmd; | |
489 | ||
490 | start_pmd = pmd = pmd_offset(pud, addr); | |
491 | do { | |
492 | next = pmd_addr_end(addr, end); | |
493 | /* Hyp doesn't use huge pmds */ | |
494 | if (!pmd_none(*pmd)) | |
495 | unmap_hyp_ptes(pmd, addr, next); | |
496 | } while (pmd++, addr = next, addr != end); | |
497 | ||
498 | if (hyp_pmd_table_empty(start_pmd)) | |
499 | clear_hyp_pud_entry(pud); | |
500 | } | |
501 | ||
502 | static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) | |
503 | { | |
504 | phys_addr_t next; | |
505 | pud_t *pud, *start_pud; | |
506 | ||
507 | start_pud = pud = pud_offset(pgd, addr); | |
508 | do { | |
509 | next = pud_addr_end(addr, end); | |
510 | /* Hyp doesn't use huge puds */ | |
511 | if (!pud_none(*pud)) | |
512 | unmap_hyp_pmds(pud, addr, next); | |
513 | } while (pud++, addr = next, addr != end); | |
514 | ||
515 | if (hyp_pud_table_empty(start_pud)) | |
516 | clear_hyp_pgd_entry(pgd); | |
517 | } | |
518 | ||
3ddd4556 MZ |
519 | static unsigned int kvm_pgd_index(unsigned long addr, unsigned int ptrs_per_pgd) |
520 | { | |
521 | return (addr >> PGDIR_SHIFT) & (ptrs_per_pgd - 1); | |
522 | } | |
523 | ||
524 | static void __unmap_hyp_range(pgd_t *pgdp, unsigned long ptrs_per_pgd, | |
525 | phys_addr_t start, u64 size) | |
64f32497 SP |
526 | { |
527 | pgd_t *pgd; | |
528 | phys_addr_t addr = start, end = start + size; | |
529 | phys_addr_t next; | |
530 | ||
531 | /* | |
532 | * We don't unmap anything from HYP, except at the hyp tear down. | |
533 | * Hence, we don't have to invalidate the TLBs here. | |
534 | */ | |
3ddd4556 | 535 | pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd); |
64f32497 SP |
536 | do { |
537 | next = pgd_addr_end(addr, end); | |
538 | if (!pgd_none(*pgd)) | |
539 | unmap_hyp_puds(pgd, addr, next); | |
540 | } while (pgd++, addr = next, addr != end); | |
541 | } | |
542 | ||
3ddd4556 MZ |
543 | static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size) |
544 | { | |
545 | __unmap_hyp_range(pgdp, PTRS_PER_PGD, start, size); | |
546 | } | |
547 | ||
548 | static void unmap_hyp_idmap_range(pgd_t *pgdp, phys_addr_t start, u64 size) | |
549 | { | |
550 | __unmap_hyp_range(pgdp, __kvm_idmap_ptrs_per_pgd(), start, size); | |
551 | } | |
552 | ||
342cd0ab | 553 | /** |
4f728276 | 554 | * free_hyp_pgds - free Hyp-mode page tables |
342cd0ab | 555 | * |
5a677ce0 MZ |
556 | * Assumes hyp_pgd is a page table used strictly in Hyp-mode and |
557 | * therefore contains either mappings in the kernel memory area (above | |
e3f019b3 | 558 | * PAGE_OFFSET), or device mappings in the idmap range. |
5a677ce0 | 559 | * |
e3f019b3 MZ |
560 | * boot_hyp_pgd should only map the idmap range, and is only used in |
561 | * the extended idmap case. | |
342cd0ab | 562 | */ |
4f728276 | 563 | void free_hyp_pgds(void) |
342cd0ab | 564 | { |
e3f019b3 MZ |
565 | pgd_t *id_pgd; |
566 | ||
d157f4a5 | 567 | mutex_lock(&kvm_hyp_pgd_mutex); |
5a677ce0 | 568 | |
e3f019b3 MZ |
569 | id_pgd = boot_hyp_pgd ? boot_hyp_pgd : hyp_pgd; |
570 | ||
571 | if (id_pgd) { | |
572 | /* In case we never called hyp_mmu_init() */ | |
573 | if (!io_map_base) | |
574 | io_map_base = hyp_idmap_start; | |
575 | unmap_hyp_idmap_range(id_pgd, io_map_base, | |
576 | hyp_idmap_start + PAGE_SIZE - io_map_base); | |
577 | } | |
578 | ||
26781f9c | 579 | if (boot_hyp_pgd) { |
26781f9c MZ |
580 | free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order); |
581 | boot_hyp_pgd = NULL; | |
582 | } | |
583 | ||
4f728276 | 584 | if (hyp_pgd) { |
7839c672 MZ |
585 | unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET), |
586 | (uintptr_t)high_memory - PAGE_OFFSET); | |
d4cb9df5 | 587 | |
38f791a4 | 588 | free_pages((unsigned long)hyp_pgd, hyp_pgd_order); |
d157f4a5 | 589 | hyp_pgd = NULL; |
4f728276 | 590 | } |
e4c5a685 AB |
591 | if (merged_hyp_pgd) { |
592 | clear_page(merged_hyp_pgd); | |
593 | free_page((unsigned long)merged_hyp_pgd); | |
594 | merged_hyp_pgd = NULL; | |
595 | } | |
4f728276 | 596 | |
342cd0ab CD |
597 | mutex_unlock(&kvm_hyp_pgd_mutex); |
598 | } | |
599 | ||
600 | static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start, | |
6060df84 MZ |
601 | unsigned long end, unsigned long pfn, |
602 | pgprot_t prot) | |
342cd0ab CD |
603 | { |
604 | pte_t *pte; | |
605 | unsigned long addr; | |
342cd0ab | 606 | |
3562c76d MZ |
607 | addr = start; |
608 | do { | |
6060df84 MZ |
609 | pte = pte_offset_kernel(pmd, addr); |
610 | kvm_set_pte(pte, pfn_pte(pfn, prot)); | |
4f728276 | 611 | get_page(virt_to_page(pte)); |
6060df84 | 612 | pfn++; |
3562c76d | 613 | } while (addr += PAGE_SIZE, addr != end); |
342cd0ab CD |
614 | } |
615 | ||
616 | static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start, | |
6060df84 MZ |
617 | unsigned long end, unsigned long pfn, |
618 | pgprot_t prot) | |
342cd0ab CD |
619 | { |
620 | pmd_t *pmd; | |
621 | pte_t *pte; | |
622 | unsigned long addr, next; | |
623 | ||
3562c76d MZ |
624 | addr = start; |
625 | do { | |
6060df84 | 626 | pmd = pmd_offset(pud, addr); |
342cd0ab CD |
627 | |
628 | BUG_ON(pmd_sect(*pmd)); | |
629 | ||
630 | if (pmd_none(*pmd)) { | |
6060df84 | 631 | pte = pte_alloc_one_kernel(NULL, addr); |
342cd0ab CD |
632 | if (!pte) { |
633 | kvm_err("Cannot allocate Hyp pte\n"); | |
634 | return -ENOMEM; | |
635 | } | |
0db9dd8a | 636 | kvm_pmd_populate(pmd, pte); |
4f728276 | 637 | get_page(virt_to_page(pmd)); |
342cd0ab CD |
638 | } |
639 | ||
640 | next = pmd_addr_end(addr, end); | |
641 | ||
6060df84 MZ |
642 | create_hyp_pte_mappings(pmd, addr, next, pfn, prot); |
643 | pfn += (next - addr) >> PAGE_SHIFT; | |
3562c76d | 644 | } while (addr = next, addr != end); |
342cd0ab CD |
645 | |
646 | return 0; | |
647 | } | |
648 | ||
38f791a4 CD |
649 | static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start, |
650 | unsigned long end, unsigned long pfn, | |
651 | pgprot_t prot) | |
652 | { | |
653 | pud_t *pud; | |
654 | pmd_t *pmd; | |
655 | unsigned long addr, next; | |
656 | int ret; | |
657 | ||
658 | addr = start; | |
659 | do { | |
660 | pud = pud_offset(pgd, addr); | |
661 | ||
662 | if (pud_none_or_clear_bad(pud)) { | |
663 | pmd = pmd_alloc_one(NULL, addr); | |
664 | if (!pmd) { | |
665 | kvm_err("Cannot allocate Hyp pmd\n"); | |
666 | return -ENOMEM; | |
667 | } | |
0db9dd8a | 668 | kvm_pud_populate(pud, pmd); |
38f791a4 | 669 | get_page(virt_to_page(pud)); |
38f791a4 CD |
670 | } |
671 | ||
672 | next = pud_addr_end(addr, end); | |
673 | ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot); | |
674 | if (ret) | |
675 | return ret; | |
676 | pfn += (next - addr) >> PAGE_SHIFT; | |
677 | } while (addr = next, addr != end); | |
678 | ||
679 | return 0; | |
680 | } | |
681 | ||
98732d1b | 682 | static int __create_hyp_mappings(pgd_t *pgdp, unsigned long ptrs_per_pgd, |
6060df84 MZ |
683 | unsigned long start, unsigned long end, |
684 | unsigned long pfn, pgprot_t prot) | |
342cd0ab | 685 | { |
342cd0ab CD |
686 | pgd_t *pgd; |
687 | pud_t *pud; | |
342cd0ab CD |
688 | unsigned long addr, next; |
689 | int err = 0; | |
690 | ||
342cd0ab | 691 | mutex_lock(&kvm_hyp_pgd_mutex); |
3562c76d MZ |
692 | addr = start & PAGE_MASK; |
693 | end = PAGE_ALIGN(end); | |
694 | do { | |
3ddd4556 | 695 | pgd = pgdp + kvm_pgd_index(addr, ptrs_per_pgd); |
342cd0ab | 696 | |
38f791a4 CD |
697 | if (pgd_none(*pgd)) { |
698 | pud = pud_alloc_one(NULL, addr); | |
699 | if (!pud) { | |
700 | kvm_err("Cannot allocate Hyp pud\n"); | |
342cd0ab CD |
701 | err = -ENOMEM; |
702 | goto out; | |
703 | } | |
0db9dd8a | 704 | kvm_pgd_populate(pgd, pud); |
38f791a4 | 705 | get_page(virt_to_page(pgd)); |
342cd0ab CD |
706 | } |
707 | ||
708 | next = pgd_addr_end(addr, end); | |
38f791a4 | 709 | err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot); |
342cd0ab CD |
710 | if (err) |
711 | goto out; | |
6060df84 | 712 | pfn += (next - addr) >> PAGE_SHIFT; |
3562c76d | 713 | } while (addr = next, addr != end); |
342cd0ab CD |
714 | out: |
715 | mutex_unlock(&kvm_hyp_pgd_mutex); | |
716 | return err; | |
717 | } | |
718 | ||
40c2729b CD |
719 | static phys_addr_t kvm_kaddr_to_phys(void *kaddr) |
720 | { | |
721 | if (!is_vmalloc_addr(kaddr)) { | |
722 | BUG_ON(!virt_addr_valid(kaddr)); | |
723 | return __pa(kaddr); | |
724 | } else { | |
725 | return page_to_phys(vmalloc_to_page(kaddr)) + | |
726 | offset_in_page(kaddr); | |
727 | } | |
728 | } | |
729 | ||
342cd0ab | 730 | /** |
06e8c3b0 | 731 | * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode |
342cd0ab CD |
732 | * @from: The virtual kernel start address of the range |
733 | * @to: The virtual kernel end address of the range (exclusive) | |
c8dddecd | 734 | * @prot: The protection to be applied to this range |
342cd0ab | 735 | * |
06e8c3b0 MZ |
736 | * The same virtual address as the kernel virtual address is also used |
737 | * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying | |
738 | * physical pages. | |
342cd0ab | 739 | */ |
c8dddecd | 740 | int create_hyp_mappings(void *from, void *to, pgprot_t prot) |
342cd0ab | 741 | { |
40c2729b CD |
742 | phys_addr_t phys_addr; |
743 | unsigned long virt_addr; | |
6c41a413 MZ |
744 | unsigned long start = kern_hyp_va((unsigned long)from); |
745 | unsigned long end = kern_hyp_va((unsigned long)to); | |
6060df84 | 746 | |
1e947bad MZ |
747 | if (is_kernel_in_hyp_mode()) |
748 | return 0; | |
749 | ||
40c2729b CD |
750 | start = start & PAGE_MASK; |
751 | end = PAGE_ALIGN(end); | |
6060df84 | 752 | |
40c2729b CD |
753 | for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) { |
754 | int err; | |
6060df84 | 755 | |
40c2729b | 756 | phys_addr = kvm_kaddr_to_phys(from + virt_addr - start); |
98732d1b KM |
757 | err = __create_hyp_mappings(hyp_pgd, PTRS_PER_PGD, |
758 | virt_addr, virt_addr + PAGE_SIZE, | |
40c2729b | 759 | __phys_to_pfn(phys_addr), |
c8dddecd | 760 | prot); |
40c2729b CD |
761 | if (err) |
762 | return err; | |
763 | } | |
764 | ||
765 | return 0; | |
342cd0ab CD |
766 | } |
767 | ||
dc2e4633 MZ |
768 | static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size, |
769 | unsigned long *haddr, pgprot_t prot) | |
342cd0ab | 770 | { |
e3f019b3 MZ |
771 | pgd_t *pgd = hyp_pgd; |
772 | unsigned long base; | |
773 | int ret = 0; | |
6060df84 | 774 | |
e3f019b3 | 775 | mutex_lock(&kvm_hyp_pgd_mutex); |
6060df84 | 776 | |
e3f019b3 MZ |
777 | /* |
778 | * This assumes that we we have enough space below the idmap | |
779 | * page to allocate our VAs. If not, the check below will | |
780 | * kick. A potential alternative would be to detect that | |
781 | * overflow and switch to an allocation above the idmap. | |
782 | * | |
783 | * The allocated size is always a multiple of PAGE_SIZE. | |
784 | */ | |
785 | size = PAGE_ALIGN(size + offset_in_page(phys_addr)); | |
786 | base = io_map_base - size; | |
1bb32a44 | 787 | |
e3f019b3 MZ |
788 | /* |
789 | * Verify that BIT(VA_BITS - 1) hasn't been flipped by | |
790 | * allocating the new area, as it would indicate we've | |
791 | * overflowed the idmap/IO address range. | |
792 | */ | |
793 | if ((base ^ io_map_base) & BIT(VA_BITS - 1)) | |
794 | ret = -ENOMEM; | |
795 | else | |
796 | io_map_base = base; | |
797 | ||
798 | mutex_unlock(&kvm_hyp_pgd_mutex); | |
799 | ||
800 | if (ret) | |
801 | goto out; | |
802 | ||
803 | if (__kvm_cpu_uses_extended_idmap()) | |
804 | pgd = boot_hyp_pgd; | |
805 | ||
806 | ret = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(), | |
807 | base, base + size, | |
dc2e4633 | 808 | __phys_to_pfn(phys_addr), prot); |
e3f019b3 MZ |
809 | if (ret) |
810 | goto out; | |
811 | ||
dc2e4633 | 812 | *haddr = base + offset_in_page(phys_addr); |
e3f019b3 MZ |
813 | |
814 | out: | |
dc2e4633 MZ |
815 | return ret; |
816 | } | |
817 | ||
818 | /** | |
819 | * create_hyp_io_mappings - Map IO into both kernel and HYP | |
820 | * @phys_addr: The physical start address which gets mapped | |
821 | * @size: Size of the region being mapped | |
822 | * @kaddr: Kernel VA for this mapping | |
823 | * @haddr: HYP VA for this mapping | |
824 | */ | |
825 | int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size, | |
826 | void __iomem **kaddr, | |
827 | void __iomem **haddr) | |
828 | { | |
829 | unsigned long addr; | |
830 | int ret; | |
831 | ||
832 | *kaddr = ioremap(phys_addr, size); | |
833 | if (!*kaddr) | |
834 | return -ENOMEM; | |
835 | ||
836 | if (is_kernel_in_hyp_mode()) { | |
837 | *haddr = *kaddr; | |
838 | return 0; | |
839 | } | |
840 | ||
841 | ret = __create_hyp_private_mapping(phys_addr, size, | |
842 | &addr, PAGE_HYP_DEVICE); | |
1bb32a44 MZ |
843 | if (ret) { |
844 | iounmap(*kaddr); | |
845 | *kaddr = NULL; | |
dc2e4633 MZ |
846 | *haddr = NULL; |
847 | return ret; | |
848 | } | |
849 | ||
850 | *haddr = (void __iomem *)addr; | |
851 | return 0; | |
852 | } | |
853 | ||
854 | /** | |
855 | * create_hyp_exec_mappings - Map an executable range into HYP | |
856 | * @phys_addr: The physical start address which gets mapped | |
857 | * @size: Size of the region being mapped | |
858 | * @haddr: HYP VA for this mapping | |
859 | */ | |
860 | int create_hyp_exec_mappings(phys_addr_t phys_addr, size_t size, | |
861 | void **haddr) | |
862 | { | |
863 | unsigned long addr; | |
864 | int ret; | |
865 | ||
866 | BUG_ON(is_kernel_in_hyp_mode()); | |
867 | ||
868 | ret = __create_hyp_private_mapping(phys_addr, size, | |
869 | &addr, PAGE_HYP_EXEC); | |
870 | if (ret) { | |
871 | *haddr = NULL; | |
1bb32a44 MZ |
872 | return ret; |
873 | } | |
874 | ||
dc2e4633 | 875 | *haddr = (void *)addr; |
1bb32a44 | 876 | return 0; |
342cd0ab CD |
877 | } |
878 | ||
d5d8184d CD |
879 | /** |
880 | * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation. | |
881 | * @kvm: The KVM struct pointer for the VM. | |
882 | * | |
9d4dc688 VM |
883 | * Allocates only the stage-2 HW PGD level table(s) (can support either full |
884 | * 40-bit input addresses or limited to 32-bit input addresses). Clears the | |
885 | * allocated pages. | |
d5d8184d CD |
886 | * |
887 | * Note we don't need locking here as this is only called when the VM is | |
888 | * created, which can only be done once. | |
889 | */ | |
890 | int kvm_alloc_stage2_pgd(struct kvm *kvm) | |
891 | { | |
892 | pgd_t *pgd; | |
893 | ||
894 | if (kvm->arch.pgd != NULL) { | |
895 | kvm_err("kvm_arch already initialized?\n"); | |
896 | return -EINVAL; | |
897 | } | |
898 | ||
9163ee23 SP |
899 | /* Allocate the HW PGD, making sure that each page gets its own refcount */ |
900 | pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO); | |
901 | if (!pgd) | |
a987370f MZ |
902 | return -ENOMEM; |
903 | ||
d5d8184d | 904 | kvm->arch.pgd = pgd; |
d5d8184d CD |
905 | return 0; |
906 | } | |
907 | ||
957db105 CD |
908 | static void stage2_unmap_memslot(struct kvm *kvm, |
909 | struct kvm_memory_slot *memslot) | |
910 | { | |
911 | hva_t hva = memslot->userspace_addr; | |
912 | phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; | |
913 | phys_addr_t size = PAGE_SIZE * memslot->npages; | |
914 | hva_t reg_end = hva + size; | |
915 | ||
916 | /* | |
917 | * A memory region could potentially cover multiple VMAs, and any holes | |
918 | * between them, so iterate over all of them to find out if we should | |
919 | * unmap any of them. | |
920 | * | |
921 | * +--------------------------------------------+ | |
922 | * +---------------+----------------+ +----------------+ | |
923 | * | : VMA 1 | VMA 2 | | VMA 3 : | | |
924 | * +---------------+----------------+ +----------------+ | |
925 | * | memory region | | |
926 | * +--------------------------------------------+ | |
927 | */ | |
928 | do { | |
929 | struct vm_area_struct *vma = find_vma(current->mm, hva); | |
930 | hva_t vm_start, vm_end; | |
931 | ||
932 | if (!vma || vma->vm_start >= reg_end) | |
933 | break; | |
934 | ||
935 | /* | |
936 | * Take the intersection of this VMA with the memory region | |
937 | */ | |
938 | vm_start = max(hva, vma->vm_start); | |
939 | vm_end = min(reg_end, vma->vm_end); | |
940 | ||
941 | if (!(vma->vm_flags & VM_PFNMAP)) { | |
942 | gpa_t gpa = addr + (vm_start - memslot->userspace_addr); | |
943 | unmap_stage2_range(kvm, gpa, vm_end - vm_start); | |
944 | } | |
945 | hva = vm_end; | |
946 | } while (hva < reg_end); | |
947 | } | |
948 | ||
949 | /** | |
950 | * stage2_unmap_vm - Unmap Stage-2 RAM mappings | |
951 | * @kvm: The struct kvm pointer | |
952 | * | |
953 | * Go through the memregions and unmap any reguler RAM | |
954 | * backing memory already mapped to the VM. | |
955 | */ | |
956 | void stage2_unmap_vm(struct kvm *kvm) | |
957 | { | |
958 | struct kvm_memslots *slots; | |
959 | struct kvm_memory_slot *memslot; | |
960 | int idx; | |
961 | ||
962 | idx = srcu_read_lock(&kvm->srcu); | |
90f6e150 | 963 | down_read(¤t->mm->mmap_sem); |
957db105 CD |
964 | spin_lock(&kvm->mmu_lock); |
965 | ||
966 | slots = kvm_memslots(kvm); | |
967 | kvm_for_each_memslot(memslot, slots) | |
968 | stage2_unmap_memslot(kvm, memslot); | |
969 | ||
970 | spin_unlock(&kvm->mmu_lock); | |
90f6e150 | 971 | up_read(¤t->mm->mmap_sem); |
957db105 CD |
972 | srcu_read_unlock(&kvm->srcu, idx); |
973 | } | |
974 | ||
d5d8184d CD |
975 | /** |
976 | * kvm_free_stage2_pgd - free all stage-2 tables | |
977 | * @kvm: The KVM struct pointer for the VM. | |
978 | * | |
979 | * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all | |
980 | * underlying level-2 and level-3 tables before freeing the actual level-1 table | |
981 | * and setting the struct pointer to NULL. | |
d5d8184d CD |
982 | */ |
983 | void kvm_free_stage2_pgd(struct kvm *kvm) | |
984 | { | |
6c0d706b | 985 | void *pgd = NULL; |
d5d8184d | 986 | |
8b3405e3 | 987 | spin_lock(&kvm->mmu_lock); |
6c0d706b SP |
988 | if (kvm->arch.pgd) { |
989 | unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE); | |
2952a607 | 990 | pgd = READ_ONCE(kvm->arch.pgd); |
6c0d706b SP |
991 | kvm->arch.pgd = NULL; |
992 | } | |
8b3405e3 SP |
993 | spin_unlock(&kvm->mmu_lock); |
994 | ||
9163ee23 | 995 | /* Free the HW pgd, one page at a time */ |
6c0d706b SP |
996 | if (pgd) |
997 | free_pages_exact(pgd, S2_PGD_SIZE); | |
d5d8184d CD |
998 | } |
999 | ||
38f791a4 | 1000 | static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, |
ad361f09 | 1001 | phys_addr_t addr) |
d5d8184d CD |
1002 | { |
1003 | pgd_t *pgd; | |
1004 | pud_t *pud; | |
d5d8184d | 1005 | |
70fd1906 SP |
1006 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
1007 | if (WARN_ON(stage2_pgd_none(*pgd))) { | |
38f791a4 CD |
1008 | if (!cache) |
1009 | return NULL; | |
1010 | pud = mmu_memory_cache_alloc(cache); | |
70fd1906 | 1011 | stage2_pgd_populate(pgd, pud); |
38f791a4 CD |
1012 | get_page(virt_to_page(pgd)); |
1013 | } | |
1014 | ||
70fd1906 | 1015 | return stage2_pud_offset(pgd, addr); |
38f791a4 CD |
1016 | } |
1017 | ||
1018 | static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, | |
1019 | phys_addr_t addr) | |
1020 | { | |
1021 | pud_t *pud; | |
1022 | pmd_t *pmd; | |
1023 | ||
1024 | pud = stage2_get_pud(kvm, cache, addr); | |
d6dbdd3c MZ |
1025 | if (!pud) |
1026 | return NULL; | |
1027 | ||
70fd1906 | 1028 | if (stage2_pud_none(*pud)) { |
d5d8184d | 1029 | if (!cache) |
ad361f09 | 1030 | return NULL; |
d5d8184d | 1031 | pmd = mmu_memory_cache_alloc(cache); |
70fd1906 | 1032 | stage2_pud_populate(pud, pmd); |
d5d8184d | 1033 | get_page(virt_to_page(pud)); |
c62ee2b2 MZ |
1034 | } |
1035 | ||
70fd1906 | 1036 | return stage2_pmd_offset(pud, addr); |
ad361f09 CD |
1037 | } |
1038 | ||
1039 | static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache | |
1040 | *cache, phys_addr_t addr, const pmd_t *new_pmd) | |
1041 | { | |
1042 | pmd_t *pmd, old_pmd; | |
1043 | ||
1044 | pmd = stage2_get_pmd(kvm, cache, addr); | |
1045 | VM_BUG_ON(!pmd); | |
d5d8184d | 1046 | |
ad361f09 CD |
1047 | /* |
1048 | * Mapping in huge pages should only happen through a fault. If a | |
1049 | * page is merged into a transparent huge page, the individual | |
1050 | * subpages of that huge page should be unmapped through MMU | |
1051 | * notifiers before we get here. | |
1052 | * | |
1053 | * Merging of CompoundPages is not supported; they should become | |
1054 | * splitting first, unmapped, merged, and mapped back in on-demand. | |
1055 | */ | |
1056 | VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd)); | |
1057 | ||
1058 | old_pmd = *pmd; | |
d4b9e079 MZ |
1059 | if (pmd_present(old_pmd)) { |
1060 | pmd_clear(pmd); | |
ad361f09 | 1061 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e079 | 1062 | } else { |
ad361f09 | 1063 | get_page(virt_to_page(pmd)); |
d4b9e079 MZ |
1064 | } |
1065 | ||
1066 | kvm_set_pmd(pmd, *new_pmd); | |
ad361f09 CD |
1067 | return 0; |
1068 | } | |
1069 | ||
7a3796d2 MZ |
1070 | static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr) |
1071 | { | |
1072 | pmd_t *pmdp; | |
1073 | pte_t *ptep; | |
1074 | ||
1075 | pmdp = stage2_get_pmd(kvm, NULL, addr); | |
1076 | if (!pmdp || pmd_none(*pmdp) || !pmd_present(*pmdp)) | |
1077 | return false; | |
1078 | ||
1079 | if (pmd_thp_or_huge(*pmdp)) | |
1080 | return kvm_s2pmd_exec(pmdp); | |
1081 | ||
1082 | ptep = pte_offset_kernel(pmdp, addr); | |
1083 | if (!ptep || pte_none(*ptep) || !pte_present(*ptep)) | |
1084 | return false; | |
1085 | ||
1086 | return kvm_s2pte_exec(ptep); | |
1087 | } | |
1088 | ||
ad361f09 | 1089 | static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, |
15a49a44 MS |
1090 | phys_addr_t addr, const pte_t *new_pte, |
1091 | unsigned long flags) | |
ad361f09 CD |
1092 | { |
1093 | pmd_t *pmd; | |
1094 | pte_t *pte, old_pte; | |
15a49a44 MS |
1095 | bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP; |
1096 | bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE; | |
1097 | ||
1098 | VM_BUG_ON(logging_active && !cache); | |
ad361f09 | 1099 | |
38f791a4 | 1100 | /* Create stage-2 page table mapping - Levels 0 and 1 */ |
ad361f09 CD |
1101 | pmd = stage2_get_pmd(kvm, cache, addr); |
1102 | if (!pmd) { | |
1103 | /* | |
1104 | * Ignore calls from kvm_set_spte_hva for unallocated | |
1105 | * address ranges. | |
1106 | */ | |
1107 | return 0; | |
1108 | } | |
1109 | ||
15a49a44 MS |
1110 | /* |
1111 | * While dirty page logging - dissolve huge PMD, then continue on to | |
1112 | * allocate page. | |
1113 | */ | |
1114 | if (logging_active) | |
1115 | stage2_dissolve_pmd(kvm, addr, pmd); | |
1116 | ||
ad361f09 | 1117 | /* Create stage-2 page mappings - Level 2 */ |
d5d8184d CD |
1118 | if (pmd_none(*pmd)) { |
1119 | if (!cache) | |
1120 | return 0; /* ignore calls from kvm_set_spte_hva */ | |
1121 | pte = mmu_memory_cache_alloc(cache); | |
0db9dd8a | 1122 | kvm_pmd_populate(pmd, pte); |
d5d8184d | 1123 | get_page(virt_to_page(pmd)); |
c62ee2b2 MZ |
1124 | } |
1125 | ||
1126 | pte = pte_offset_kernel(pmd, addr); | |
d5d8184d CD |
1127 | |
1128 | if (iomap && pte_present(*pte)) | |
1129 | return -EFAULT; | |
1130 | ||
1131 | /* Create 2nd stage page table mapping - Level 3 */ | |
1132 | old_pte = *pte; | |
d4b9e079 MZ |
1133 | if (pte_present(old_pte)) { |
1134 | kvm_set_pte(pte, __pte(0)); | |
48762767 | 1135 | kvm_tlb_flush_vmid_ipa(kvm, addr); |
d4b9e079 | 1136 | } else { |
d5d8184d | 1137 | get_page(virt_to_page(pte)); |
d4b9e079 | 1138 | } |
d5d8184d | 1139 | |
d4b9e079 | 1140 | kvm_set_pte(pte, *new_pte); |
d5d8184d CD |
1141 | return 0; |
1142 | } | |
d5d8184d | 1143 | |
06485053 CM |
1144 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG |
1145 | static int stage2_ptep_test_and_clear_young(pte_t *pte) | |
1146 | { | |
1147 | if (pte_young(*pte)) { | |
1148 | *pte = pte_mkold(*pte); | |
1149 | return 1; | |
1150 | } | |
d5d8184d CD |
1151 | return 0; |
1152 | } | |
06485053 CM |
1153 | #else |
1154 | static int stage2_ptep_test_and_clear_young(pte_t *pte) | |
1155 | { | |
1156 | return __ptep_test_and_clear_young(pte); | |
1157 | } | |
1158 | #endif | |
1159 | ||
1160 | static int stage2_pmdp_test_and_clear_young(pmd_t *pmd) | |
1161 | { | |
1162 | return stage2_ptep_test_and_clear_young((pte_t *)pmd); | |
1163 | } | |
d5d8184d CD |
1164 | |
1165 | /** | |
1166 | * kvm_phys_addr_ioremap - map a device range to guest IPA | |
1167 | * | |
1168 | * @kvm: The KVM pointer | |
1169 | * @guest_ipa: The IPA at which to insert the mapping | |
1170 | * @pa: The physical address of the device | |
1171 | * @size: The size of the mapping | |
1172 | */ | |
1173 | int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, | |
c40f2f8f | 1174 | phys_addr_t pa, unsigned long size, bool writable) |
d5d8184d CD |
1175 | { |
1176 | phys_addr_t addr, end; | |
1177 | int ret = 0; | |
1178 | unsigned long pfn; | |
1179 | struct kvm_mmu_memory_cache cache = { 0, }; | |
1180 | ||
1181 | end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK; | |
1182 | pfn = __phys_to_pfn(pa); | |
1183 | ||
1184 | for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { | |
c62ee2b2 | 1185 | pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE); |
d5d8184d | 1186 | |
c40f2f8f | 1187 | if (writable) |
06485053 | 1188 | pte = kvm_s2pte_mkwrite(pte); |
c40f2f8f | 1189 | |
38f791a4 CD |
1190 | ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES, |
1191 | KVM_NR_MEM_OBJS); | |
d5d8184d CD |
1192 | if (ret) |
1193 | goto out; | |
1194 | spin_lock(&kvm->mmu_lock); | |
15a49a44 MS |
1195 | ret = stage2_set_pte(kvm, &cache, addr, &pte, |
1196 | KVM_S2PTE_FLAG_IS_IOMAP); | |
d5d8184d CD |
1197 | spin_unlock(&kvm->mmu_lock); |
1198 | if (ret) | |
1199 | goto out; | |
1200 | ||
1201 | pfn++; | |
1202 | } | |
1203 | ||
1204 | out: | |
1205 | mmu_free_memory_cache(&cache); | |
1206 | return ret; | |
1207 | } | |
1208 | ||
ba049e93 | 1209 | static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap) |
9b5fdb97 | 1210 | { |
ba049e93 | 1211 | kvm_pfn_t pfn = *pfnp; |
9b5fdb97 CD |
1212 | gfn_t gfn = *ipap >> PAGE_SHIFT; |
1213 | ||
127393fb | 1214 | if (PageTransCompoundMap(pfn_to_page(pfn))) { |
9b5fdb97 CD |
1215 | unsigned long mask; |
1216 | /* | |
1217 | * The address we faulted on is backed by a transparent huge | |
1218 | * page. However, because we map the compound huge page and | |
1219 | * not the individual tail page, we need to transfer the | |
1220 | * refcount to the head page. We have to be careful that the | |
1221 | * THP doesn't start to split while we are adjusting the | |
1222 | * refcounts. | |
1223 | * | |
1224 | * We are sure this doesn't happen, because mmu_notifier_retry | |
1225 | * was successful and we are holding the mmu_lock, so if this | |
1226 | * THP is trying to split, it will be blocked in the mmu | |
1227 | * notifier before touching any of the pages, specifically | |
1228 | * before being able to call __split_huge_page_refcount(). | |
1229 | * | |
1230 | * We can therefore safely transfer the refcount from PG_tail | |
1231 | * to PG_head and switch the pfn from a tail page to the head | |
1232 | * page accordingly. | |
1233 | */ | |
1234 | mask = PTRS_PER_PMD - 1; | |
1235 | VM_BUG_ON((gfn & mask) != (pfn & mask)); | |
1236 | if (pfn & mask) { | |
1237 | *ipap &= PMD_MASK; | |
1238 | kvm_release_pfn_clean(pfn); | |
1239 | pfn &= ~mask; | |
1240 | kvm_get_pfn(pfn); | |
1241 | *pfnp = pfn; | |
1242 | } | |
1243 | ||
1244 | return true; | |
1245 | } | |
1246 | ||
1247 | return false; | |
1248 | } | |
1249 | ||
a7d079ce AB |
1250 | static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) |
1251 | { | |
1252 | if (kvm_vcpu_trap_is_iabt(vcpu)) | |
1253 | return false; | |
1254 | ||
1255 | return kvm_vcpu_dabt_iswrite(vcpu); | |
1256 | } | |
1257 | ||
c6473555 MS |
1258 | /** |
1259 | * stage2_wp_ptes - write protect PMD range | |
1260 | * @pmd: pointer to pmd entry | |
1261 | * @addr: range start address | |
1262 | * @end: range end address | |
1263 | */ | |
1264 | static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end) | |
1265 | { | |
1266 | pte_t *pte; | |
1267 | ||
1268 | pte = pte_offset_kernel(pmd, addr); | |
1269 | do { | |
1270 | if (!pte_none(*pte)) { | |
1271 | if (!kvm_s2pte_readonly(pte)) | |
1272 | kvm_set_s2pte_readonly(pte); | |
1273 | } | |
1274 | } while (pte++, addr += PAGE_SIZE, addr != end); | |
1275 | } | |
1276 | ||
1277 | /** | |
1278 | * stage2_wp_pmds - write protect PUD range | |
1279 | * @pud: pointer to pud entry | |
1280 | * @addr: range start address | |
1281 | * @end: range end address | |
1282 | */ | |
1283 | static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end) | |
1284 | { | |
1285 | pmd_t *pmd; | |
1286 | phys_addr_t next; | |
1287 | ||
70fd1906 | 1288 | pmd = stage2_pmd_offset(pud, addr); |
c6473555 MS |
1289 | |
1290 | do { | |
70fd1906 | 1291 | next = stage2_pmd_addr_end(addr, end); |
c6473555 | 1292 | if (!pmd_none(*pmd)) { |
bbb3b6b3 | 1293 | if (pmd_thp_or_huge(*pmd)) { |
c6473555 MS |
1294 | if (!kvm_s2pmd_readonly(pmd)) |
1295 | kvm_set_s2pmd_readonly(pmd); | |
1296 | } else { | |
1297 | stage2_wp_ptes(pmd, addr, next); | |
1298 | } | |
1299 | } | |
1300 | } while (pmd++, addr = next, addr != end); | |
1301 | } | |
1302 | ||
1303 | /** | |
1304 | * stage2_wp_puds - write protect PGD range | |
1305 | * @pgd: pointer to pgd entry | |
1306 | * @addr: range start address | |
1307 | * @end: range end address | |
1308 | * | |
1309 | * Process PUD entries, for a huge PUD we cause a panic. | |
1310 | */ | |
1311 | static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end) | |
1312 | { | |
1313 | pud_t *pud; | |
1314 | phys_addr_t next; | |
1315 | ||
70fd1906 | 1316 | pud = stage2_pud_offset(pgd, addr); |
c6473555 | 1317 | do { |
70fd1906 SP |
1318 | next = stage2_pud_addr_end(addr, end); |
1319 | if (!stage2_pud_none(*pud)) { | |
c6473555 | 1320 | /* TODO:PUD not supported, revisit later if supported */ |
70fd1906 | 1321 | BUG_ON(stage2_pud_huge(*pud)); |
c6473555 MS |
1322 | stage2_wp_pmds(pud, addr, next); |
1323 | } | |
1324 | } while (pud++, addr = next, addr != end); | |
1325 | } | |
1326 | ||
1327 | /** | |
1328 | * stage2_wp_range() - write protect stage2 memory region range | |
1329 | * @kvm: The KVM pointer | |
1330 | * @addr: Start address of range | |
1331 | * @end: End address of range | |
1332 | */ | |
1333 | static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end) | |
1334 | { | |
1335 | pgd_t *pgd; | |
1336 | phys_addr_t next; | |
1337 | ||
70fd1906 | 1338 | pgd = kvm->arch.pgd + stage2_pgd_index(addr); |
c6473555 MS |
1339 | do { |
1340 | /* | |
1341 | * Release kvm_mmu_lock periodically if the memory region is | |
1342 | * large. Otherwise, we may see kernel panics with | |
227ea818 CD |
1343 | * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR, |
1344 | * CONFIG_LOCKDEP. Additionally, holding the lock too long | |
0c428a6a SP |
1345 | * will also starve other vCPUs. We have to also make sure |
1346 | * that the page tables are not freed while we released | |
1347 | * the lock. | |
c6473555 | 1348 | */ |
0c428a6a SP |
1349 | cond_resched_lock(&kvm->mmu_lock); |
1350 | if (!READ_ONCE(kvm->arch.pgd)) | |
1351 | break; | |
70fd1906 SP |
1352 | next = stage2_pgd_addr_end(addr, end); |
1353 | if (stage2_pgd_present(*pgd)) | |
c6473555 MS |
1354 | stage2_wp_puds(pgd, addr, next); |
1355 | } while (pgd++, addr = next, addr != end); | |
1356 | } | |
1357 | ||
1358 | /** | |
1359 | * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot | |
1360 | * @kvm: The KVM pointer | |
1361 | * @slot: The memory slot to write protect | |
1362 | * | |
1363 | * Called to start logging dirty pages after memory region | |
1364 | * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns | |
1365 | * all present PMD and PTEs are write protected in the memory region. | |
1366 | * Afterwards read of dirty page log can be called. | |
1367 | * | |
1368 | * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired, | |
1369 | * serializing operations for VM memory regions. | |
1370 | */ | |
1371 | void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot) | |
1372 | { | |
9f6b8029 PB |
1373 | struct kvm_memslots *slots = kvm_memslots(kvm); |
1374 | struct kvm_memory_slot *memslot = id_to_memslot(slots, slot); | |
c6473555 MS |
1375 | phys_addr_t start = memslot->base_gfn << PAGE_SHIFT; |
1376 | phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT; | |
1377 | ||
1378 | spin_lock(&kvm->mmu_lock); | |
1379 | stage2_wp_range(kvm, start, end); | |
1380 | spin_unlock(&kvm->mmu_lock); | |
1381 | kvm_flush_remote_tlbs(kvm); | |
1382 | } | |
53c810c3 MS |
1383 | |
1384 | /** | |
3b0f1d01 | 1385 | * kvm_mmu_write_protect_pt_masked() - write protect dirty pages |
53c810c3 MS |
1386 | * @kvm: The KVM pointer |
1387 | * @slot: The memory slot associated with mask | |
1388 | * @gfn_offset: The gfn offset in memory slot | |
1389 | * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory | |
1390 | * slot to be write protected | |
1391 | * | |
1392 | * Walks bits set in mask write protects the associated pte's. Caller must | |
1393 | * acquire kvm_mmu_lock. | |
1394 | */ | |
3b0f1d01 | 1395 | static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, |
53c810c3 MS |
1396 | struct kvm_memory_slot *slot, |
1397 | gfn_t gfn_offset, unsigned long mask) | |
1398 | { | |
1399 | phys_addr_t base_gfn = slot->base_gfn + gfn_offset; | |
1400 | phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT; | |
1401 | phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT; | |
1402 | ||
1403 | stage2_wp_range(kvm, start, end); | |
1404 | } | |
c6473555 | 1405 | |
3b0f1d01 KH |
1406 | /* |
1407 | * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected | |
1408 | * dirty pages. | |
1409 | * | |
1410 | * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to | |
1411 | * enable dirty logging for them. | |
1412 | */ | |
1413 | void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, | |
1414 | struct kvm_memory_slot *slot, | |
1415 | gfn_t gfn_offset, unsigned long mask) | |
1416 | { | |
1417 | kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask); | |
1418 | } | |
1419 | ||
17ab9d57 | 1420 | static void clean_dcache_guest_page(kvm_pfn_t pfn, unsigned long size) |
0d3e4d4f | 1421 | { |
17ab9d57 | 1422 | __clean_dcache_guest_page(pfn, size); |
a15f6939 MZ |
1423 | } |
1424 | ||
17ab9d57 | 1425 | static void invalidate_icache_guest_page(kvm_pfn_t pfn, unsigned long size) |
a15f6939 | 1426 | { |
17ab9d57 | 1427 | __invalidate_icache_guest_page(pfn, size); |
0d3e4d4f MZ |
1428 | } |
1429 | ||
196f878a JM |
1430 | static void kvm_send_hwpoison_signal(unsigned long address, |
1431 | struct vm_area_struct *vma) | |
1432 | { | |
1433 | siginfo_t info; | |
1434 | ||
3eb0f519 | 1435 | clear_siginfo(&info); |
196f878a JM |
1436 | info.si_signo = SIGBUS; |
1437 | info.si_errno = 0; | |
1438 | info.si_code = BUS_MCEERR_AR; | |
1439 | info.si_addr = (void __user *)address; | |
1440 | ||
1441 | if (is_vm_hugetlb_page(vma)) | |
1442 | info.si_addr_lsb = huge_page_shift(hstate_vma(vma)); | |
1443 | else | |
1444 | info.si_addr_lsb = PAGE_SHIFT; | |
1445 | ||
1446 | send_sig_info(SIGBUS, &info, current); | |
1447 | } | |
1448 | ||
94f8e641 | 1449 | static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, |
98047888 | 1450 | struct kvm_memory_slot *memslot, unsigned long hva, |
94f8e641 CD |
1451 | unsigned long fault_status) |
1452 | { | |
94f8e641 | 1453 | int ret; |
d0e22b4a | 1454 | bool write_fault, exec_fault, writable, hugetlb = false, force_pte = false; |
94f8e641 | 1455 | unsigned long mmu_seq; |
ad361f09 | 1456 | gfn_t gfn = fault_ipa >> PAGE_SHIFT; |
ad361f09 | 1457 | struct kvm *kvm = vcpu->kvm; |
94f8e641 | 1458 | struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache; |
ad361f09 | 1459 | struct vm_area_struct *vma; |
ba049e93 | 1460 | kvm_pfn_t pfn; |
b8865767 | 1461 | pgprot_t mem_type = PAGE_S2; |
15a49a44 MS |
1462 | bool logging_active = memslot_is_logging(memslot); |
1463 | unsigned long flags = 0; | |
94f8e641 | 1464 | |
a7d079ce | 1465 | write_fault = kvm_is_write_fault(vcpu); |
d0e22b4a MZ |
1466 | exec_fault = kvm_vcpu_trap_is_iabt(vcpu); |
1467 | VM_BUG_ON(write_fault && exec_fault); | |
1468 | ||
1469 | if (fault_status == FSC_PERM && !write_fault && !exec_fault) { | |
94f8e641 CD |
1470 | kvm_err("Unexpected L2 read permission error\n"); |
1471 | return -EFAULT; | |
1472 | } | |
1473 | ||
ad361f09 CD |
1474 | /* Let's check if we will get back a huge page backed by hugetlbfs */ |
1475 | down_read(¤t->mm->mmap_sem); | |
1476 | vma = find_vma_intersection(current->mm, hva, hva + 1); | |
37b54408 AB |
1477 | if (unlikely(!vma)) { |
1478 | kvm_err("Failed to find VMA for hva 0x%lx\n", hva); | |
1479 | up_read(¤t->mm->mmap_sem); | |
1480 | return -EFAULT; | |
1481 | } | |
1482 | ||
c507babf | 1483 | if (vma_kernel_pagesize(vma) == PMD_SIZE && !logging_active) { |
ad361f09 CD |
1484 | hugetlb = true; |
1485 | gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT; | |
9b5fdb97 CD |
1486 | } else { |
1487 | /* | |
136d737f MZ |
1488 | * Pages belonging to memslots that don't have the same |
1489 | * alignment for userspace and IPA cannot be mapped using | |
1490 | * block descriptors even if the pages belong to a THP for | |
1491 | * the process, because the stage-2 block descriptor will | |
1492 | * cover more than a single THP and we loose atomicity for | |
1493 | * unmapping, updates, and splits of the THP or other pages | |
1494 | * in the stage-2 block range. | |
9b5fdb97 | 1495 | */ |
136d737f MZ |
1496 | if ((memslot->userspace_addr & ~PMD_MASK) != |
1497 | ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK)) | |
9b5fdb97 | 1498 | force_pte = true; |
ad361f09 CD |
1499 | } |
1500 | up_read(¤t->mm->mmap_sem); | |
1501 | ||
94f8e641 | 1502 | /* We need minimum second+third level pages */ |
38f791a4 CD |
1503 | ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES, |
1504 | KVM_NR_MEM_OBJS); | |
94f8e641 CD |
1505 | if (ret) |
1506 | return ret; | |
1507 | ||
1508 | mmu_seq = vcpu->kvm->mmu_notifier_seq; | |
1509 | /* | |
1510 | * Ensure the read of mmu_notifier_seq happens before we call | |
1511 | * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk | |
1512 | * the page we just got a reference to gets unmapped before we have a | |
1513 | * chance to grab the mmu_lock, which ensure that if the page gets | |
1514 | * unmapped afterwards, the call to kvm_unmap_hva will take it away | |
1515 | * from us again properly. This smp_rmb() interacts with the smp_wmb() | |
1516 | * in kvm_mmu_notifier_invalidate_<page|range_end>. | |
1517 | */ | |
1518 | smp_rmb(); | |
1519 | ||
ad361f09 | 1520 | pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable); |
196f878a JM |
1521 | if (pfn == KVM_PFN_ERR_HWPOISON) { |
1522 | kvm_send_hwpoison_signal(hva, vma); | |
1523 | return 0; | |
1524 | } | |
9ac71595 | 1525 | if (is_error_noslot_pfn(pfn)) |
94f8e641 CD |
1526 | return -EFAULT; |
1527 | ||
15a49a44 | 1528 | if (kvm_is_device_pfn(pfn)) { |
b8865767 | 1529 | mem_type = PAGE_S2_DEVICE; |
15a49a44 MS |
1530 | flags |= KVM_S2PTE_FLAG_IS_IOMAP; |
1531 | } else if (logging_active) { | |
1532 | /* | |
1533 | * Faults on pages in a memslot with logging enabled | |
1534 | * should not be mapped with huge pages (it introduces churn | |
1535 | * and performance degradation), so force a pte mapping. | |
1536 | */ | |
1537 | force_pte = true; | |
1538 | flags |= KVM_S2_FLAG_LOGGING_ACTIVE; | |
1539 | ||
1540 | /* | |
1541 | * Only actually map the page as writable if this was a write | |
1542 | * fault. | |
1543 | */ | |
1544 | if (!write_fault) | |
1545 | writable = false; | |
1546 | } | |
b8865767 | 1547 | |
ad361f09 CD |
1548 | spin_lock(&kvm->mmu_lock); |
1549 | if (mmu_notifier_retry(kvm, mmu_seq)) | |
94f8e641 | 1550 | goto out_unlock; |
15a49a44 | 1551 | |
9b5fdb97 CD |
1552 | if (!hugetlb && !force_pte) |
1553 | hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa); | |
ad361f09 CD |
1554 | |
1555 | if (hugetlb) { | |
b8865767 | 1556 | pmd_t new_pmd = pfn_pmd(pfn, mem_type); |
ad361f09 CD |
1557 | new_pmd = pmd_mkhuge(new_pmd); |
1558 | if (writable) { | |
06485053 | 1559 | new_pmd = kvm_s2pmd_mkwrite(new_pmd); |
ad361f09 CD |
1560 | kvm_set_pfn_dirty(pfn); |
1561 | } | |
a9c0e12e MZ |
1562 | |
1563 | if (fault_status != FSC_PERM) | |
17ab9d57 | 1564 | clean_dcache_guest_page(pfn, PMD_SIZE); |
d0e22b4a MZ |
1565 | |
1566 | if (exec_fault) { | |
1567 | new_pmd = kvm_s2pmd_mkexec(new_pmd); | |
17ab9d57 | 1568 | invalidate_icache_guest_page(pfn, PMD_SIZE); |
7a3796d2 MZ |
1569 | } else if (fault_status == FSC_PERM) { |
1570 | /* Preserve execute if XN was already cleared */ | |
1571 | if (stage2_is_exec(kvm, fault_ipa)) | |
1572 | new_pmd = kvm_s2pmd_mkexec(new_pmd); | |
d0e22b4a | 1573 | } |
a15f6939 | 1574 | |
ad361f09 CD |
1575 | ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd); |
1576 | } else { | |
b8865767 | 1577 | pte_t new_pte = pfn_pte(pfn, mem_type); |
15a49a44 | 1578 | |
ad361f09 | 1579 | if (writable) { |
06485053 | 1580 | new_pte = kvm_s2pte_mkwrite(new_pte); |
ad361f09 | 1581 | kvm_set_pfn_dirty(pfn); |
15a49a44 | 1582 | mark_page_dirty(kvm, gfn); |
ad361f09 | 1583 | } |
a9c0e12e MZ |
1584 | |
1585 | if (fault_status != FSC_PERM) | |
17ab9d57 | 1586 | clean_dcache_guest_page(pfn, PAGE_SIZE); |
d0e22b4a MZ |
1587 | |
1588 | if (exec_fault) { | |
1589 | new_pte = kvm_s2pte_mkexec(new_pte); | |
17ab9d57 | 1590 | invalidate_icache_guest_page(pfn, PAGE_SIZE); |
7a3796d2 MZ |
1591 | } else if (fault_status == FSC_PERM) { |
1592 | /* Preserve execute if XN was already cleared */ | |
1593 | if (stage2_is_exec(kvm, fault_ipa)) | |
1594 | new_pte = kvm_s2pte_mkexec(new_pte); | |
d0e22b4a | 1595 | } |
a15f6939 | 1596 | |
15a49a44 | 1597 | ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags); |
94f8e641 | 1598 | } |
ad361f09 | 1599 | |
94f8e641 | 1600 | out_unlock: |
ad361f09 | 1601 | spin_unlock(&kvm->mmu_lock); |
35307b9a | 1602 | kvm_set_pfn_accessed(pfn); |
94f8e641 | 1603 | kvm_release_pfn_clean(pfn); |
ad361f09 | 1604 | return ret; |
94f8e641 CD |
1605 | } |
1606 | ||
aeda9130 MZ |
1607 | /* |
1608 | * Resolve the access fault by making the page young again. | |
1609 | * Note that because the faulting entry is guaranteed not to be | |
1610 | * cached in the TLB, we don't need to invalidate anything. | |
06485053 CM |
1611 | * Only the HW Access Flag updates are supported for Stage 2 (no DBM), |
1612 | * so there is no need for atomic (pte|pmd)_mkyoung operations. | |
aeda9130 MZ |
1613 | */ |
1614 | static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa) | |
1615 | { | |
1616 | pmd_t *pmd; | |
1617 | pte_t *pte; | |
ba049e93 | 1618 | kvm_pfn_t pfn; |
aeda9130 MZ |
1619 | bool pfn_valid = false; |
1620 | ||
1621 | trace_kvm_access_fault(fault_ipa); | |
1622 | ||
1623 | spin_lock(&vcpu->kvm->mmu_lock); | |
1624 | ||
1625 | pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa); | |
1626 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1627 | goto out; | |
1628 | ||
bbb3b6b3 | 1629 | if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */ |
aeda9130 MZ |
1630 | *pmd = pmd_mkyoung(*pmd); |
1631 | pfn = pmd_pfn(*pmd); | |
1632 | pfn_valid = true; | |
1633 | goto out; | |
1634 | } | |
1635 | ||
1636 | pte = pte_offset_kernel(pmd, fault_ipa); | |
1637 | if (pte_none(*pte)) /* Nothing there either */ | |
1638 | goto out; | |
1639 | ||
1640 | *pte = pte_mkyoung(*pte); /* Just a page... */ | |
1641 | pfn = pte_pfn(*pte); | |
1642 | pfn_valid = true; | |
1643 | out: | |
1644 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1645 | if (pfn_valid) | |
1646 | kvm_set_pfn_accessed(pfn); | |
1647 | } | |
1648 | ||
94f8e641 CD |
1649 | /** |
1650 | * kvm_handle_guest_abort - handles all 2nd stage aborts | |
1651 | * @vcpu: the VCPU pointer | |
1652 | * @run: the kvm_run structure | |
1653 | * | |
1654 | * Any abort that gets to the host is almost guaranteed to be caused by a | |
1655 | * missing second stage translation table entry, which can mean that either the | |
1656 | * guest simply needs more memory and we must allocate an appropriate page or it | |
1657 | * can mean that the guest tried to access I/O memory, which is emulated by user | |
1658 | * space. The distinction is based on the IPA causing the fault and whether this | |
1659 | * memory region has been registered as standard RAM by user space. | |
1660 | */ | |
342cd0ab CD |
1661 | int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) |
1662 | { | |
94f8e641 CD |
1663 | unsigned long fault_status; |
1664 | phys_addr_t fault_ipa; | |
1665 | struct kvm_memory_slot *memslot; | |
98047888 CD |
1666 | unsigned long hva; |
1667 | bool is_iabt, write_fault, writable; | |
94f8e641 CD |
1668 | gfn_t gfn; |
1669 | int ret, idx; | |
1670 | ||
621f48e4 TB |
1671 | fault_status = kvm_vcpu_trap_get_fault_type(vcpu); |
1672 | ||
1673 | fault_ipa = kvm_vcpu_get_fault_ipa(vcpu); | |
bb428921 | 1674 | is_iabt = kvm_vcpu_trap_is_iabt(vcpu); |
621f48e4 | 1675 | |
bb428921 JM |
1676 | /* Synchronous External Abort? */ |
1677 | if (kvm_vcpu_dabt_isextabt(vcpu)) { | |
1678 | /* | |
1679 | * For RAS the host kernel may handle this abort. | |
1680 | * There is no need to pass the error into the guest. | |
1681 | */ | |
621f48e4 TB |
1682 | if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu))) |
1683 | return 1; | |
621f48e4 | 1684 | |
bb428921 JM |
1685 | if (unlikely(!is_iabt)) { |
1686 | kvm_inject_vabt(vcpu); | |
1687 | return 1; | |
1688 | } | |
4055710b MZ |
1689 | } |
1690 | ||
7393b599 MZ |
1691 | trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu), |
1692 | kvm_vcpu_get_hfar(vcpu), fault_ipa); | |
94f8e641 CD |
1693 | |
1694 | /* Check the stage-2 fault is trans. fault or write fault */ | |
35307b9a MZ |
1695 | if (fault_status != FSC_FAULT && fault_status != FSC_PERM && |
1696 | fault_status != FSC_ACCESS) { | |
0496daa5 CD |
1697 | kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n", |
1698 | kvm_vcpu_trap_get_class(vcpu), | |
1699 | (unsigned long)kvm_vcpu_trap_get_fault(vcpu), | |
1700 | (unsigned long)kvm_vcpu_get_hsr(vcpu)); | |
94f8e641 CD |
1701 | return -EFAULT; |
1702 | } | |
1703 | ||
1704 | idx = srcu_read_lock(&vcpu->kvm->srcu); | |
1705 | ||
1706 | gfn = fault_ipa >> PAGE_SHIFT; | |
98047888 CD |
1707 | memslot = gfn_to_memslot(vcpu->kvm, gfn); |
1708 | hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable); | |
a7d079ce | 1709 | write_fault = kvm_is_write_fault(vcpu); |
98047888 | 1710 | if (kvm_is_error_hva(hva) || (write_fault && !writable)) { |
94f8e641 CD |
1711 | if (is_iabt) { |
1712 | /* Prefetch Abort on I/O address */ | |
7393b599 | 1713 | kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu)); |
94f8e641 CD |
1714 | ret = 1; |
1715 | goto out_unlock; | |
1716 | } | |
1717 | ||
57c841f1 MZ |
1718 | /* |
1719 | * Check for a cache maintenance operation. Since we | |
1720 | * ended-up here, we know it is outside of any memory | |
1721 | * slot. But we can't find out if that is for a device, | |
1722 | * or if the guest is just being stupid. The only thing | |
1723 | * we know for sure is that this range cannot be cached. | |
1724 | * | |
1725 | * So let's assume that the guest is just being | |
1726 | * cautious, and skip the instruction. | |
1727 | */ | |
1728 | if (kvm_vcpu_dabt_is_cm(vcpu)) { | |
1729 | kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu)); | |
1730 | ret = 1; | |
1731 | goto out_unlock; | |
1732 | } | |
1733 | ||
cfe3950c MZ |
1734 | /* |
1735 | * The IPA is reported as [MAX:12], so we need to | |
1736 | * complement it with the bottom 12 bits from the | |
1737 | * faulting VA. This is always 12 bits, irrespective | |
1738 | * of the page size. | |
1739 | */ | |
1740 | fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1); | |
45e96ea6 | 1741 | ret = io_mem_abort(vcpu, run, fault_ipa); |
94f8e641 CD |
1742 | goto out_unlock; |
1743 | } | |
1744 | ||
c3058d5d CD |
1745 | /* Userspace should not be able to register out-of-bounds IPAs */ |
1746 | VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE); | |
1747 | ||
aeda9130 MZ |
1748 | if (fault_status == FSC_ACCESS) { |
1749 | handle_access_fault(vcpu, fault_ipa); | |
1750 | ret = 1; | |
1751 | goto out_unlock; | |
1752 | } | |
1753 | ||
98047888 | 1754 | ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status); |
94f8e641 CD |
1755 | if (ret == 0) |
1756 | ret = 1; | |
1757 | out_unlock: | |
1758 | srcu_read_unlock(&vcpu->kvm->srcu, idx); | |
1759 | return ret; | |
342cd0ab CD |
1760 | } |
1761 | ||
1d2ebacc MZ |
1762 | static int handle_hva_to_gpa(struct kvm *kvm, |
1763 | unsigned long start, | |
1764 | unsigned long end, | |
1765 | int (*handler)(struct kvm *kvm, | |
056aad67 SP |
1766 | gpa_t gpa, u64 size, |
1767 | void *data), | |
1d2ebacc | 1768 | void *data) |
d5d8184d CD |
1769 | { |
1770 | struct kvm_memslots *slots; | |
1771 | struct kvm_memory_slot *memslot; | |
1d2ebacc | 1772 | int ret = 0; |
d5d8184d CD |
1773 | |
1774 | slots = kvm_memslots(kvm); | |
1775 | ||
1776 | /* we only care about the pages that the guest sees */ | |
1777 | kvm_for_each_memslot(memslot, slots) { | |
1778 | unsigned long hva_start, hva_end; | |
056aad67 | 1779 | gfn_t gpa; |
d5d8184d CD |
1780 | |
1781 | hva_start = max(start, memslot->userspace_addr); | |
1782 | hva_end = min(end, memslot->userspace_addr + | |
1783 | (memslot->npages << PAGE_SHIFT)); | |
1784 | if (hva_start >= hva_end) | |
1785 | continue; | |
1786 | ||
056aad67 SP |
1787 | gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT; |
1788 | ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data); | |
d5d8184d | 1789 | } |
1d2ebacc MZ |
1790 | |
1791 | return ret; | |
d5d8184d CD |
1792 | } |
1793 | ||
056aad67 | 1794 | static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
d5d8184d | 1795 | { |
056aad67 | 1796 | unmap_stage2_range(kvm, gpa, size); |
1d2ebacc | 1797 | return 0; |
d5d8184d CD |
1798 | } |
1799 | ||
1800 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
1801 | { | |
1802 | unsigned long end = hva + PAGE_SIZE; | |
1803 | ||
1804 | if (!kvm->arch.pgd) | |
1805 | return 0; | |
1806 | ||
1807 | trace_kvm_unmap_hva(hva); | |
1808 | handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL); | |
1809 | return 0; | |
1810 | } | |
1811 | ||
1812 | int kvm_unmap_hva_range(struct kvm *kvm, | |
1813 | unsigned long start, unsigned long end) | |
1814 | { | |
1815 | if (!kvm->arch.pgd) | |
1816 | return 0; | |
1817 | ||
1818 | trace_kvm_unmap_hva_range(start, end); | |
1819 | handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL); | |
1820 | return 0; | |
1821 | } | |
1822 | ||
056aad67 | 1823 | static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
d5d8184d CD |
1824 | { |
1825 | pte_t *pte = (pte_t *)data; | |
1826 | ||
056aad67 | 1827 | WARN_ON(size != PAGE_SIZE); |
15a49a44 MS |
1828 | /* |
1829 | * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE | |
1830 | * flag clear because MMU notifiers will have unmapped a huge PMD before | |
1831 | * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and | |
1832 | * therefore stage2_set_pte() never needs to clear out a huge PMD | |
1833 | * through this calling path. | |
1834 | */ | |
1835 | stage2_set_pte(kvm, NULL, gpa, pte, 0); | |
1d2ebacc | 1836 | return 0; |
d5d8184d CD |
1837 | } |
1838 | ||
1839 | ||
1840 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
1841 | { | |
1842 | unsigned long end = hva + PAGE_SIZE; | |
1843 | pte_t stage2_pte; | |
1844 | ||
1845 | if (!kvm->arch.pgd) | |
1846 | return; | |
1847 | ||
1848 | trace_kvm_set_spte_hva(hva); | |
1849 | stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2); | |
1850 | handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte); | |
1851 | } | |
1852 | ||
056aad67 | 1853 | static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
35307b9a MZ |
1854 | { |
1855 | pmd_t *pmd; | |
1856 | pte_t *pte; | |
1857 | ||
056aad67 | 1858 | WARN_ON(size != PAGE_SIZE && size != PMD_SIZE); |
35307b9a MZ |
1859 | pmd = stage2_get_pmd(kvm, NULL, gpa); |
1860 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1861 | return 0; | |
1862 | ||
06485053 CM |
1863 | if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ |
1864 | return stage2_pmdp_test_and_clear_young(pmd); | |
35307b9a MZ |
1865 | |
1866 | pte = pte_offset_kernel(pmd, gpa); | |
1867 | if (pte_none(*pte)) | |
1868 | return 0; | |
1869 | ||
06485053 | 1870 | return stage2_ptep_test_and_clear_young(pte); |
35307b9a MZ |
1871 | } |
1872 | ||
056aad67 | 1873 | static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data) |
35307b9a MZ |
1874 | { |
1875 | pmd_t *pmd; | |
1876 | pte_t *pte; | |
1877 | ||
056aad67 | 1878 | WARN_ON(size != PAGE_SIZE && size != PMD_SIZE); |
35307b9a MZ |
1879 | pmd = stage2_get_pmd(kvm, NULL, gpa); |
1880 | if (!pmd || pmd_none(*pmd)) /* Nothing there */ | |
1881 | return 0; | |
1882 | ||
bbb3b6b3 | 1883 | if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */ |
35307b9a MZ |
1884 | return pmd_young(*pmd); |
1885 | ||
1886 | pte = pte_offset_kernel(pmd, gpa); | |
1887 | if (!pte_none(*pte)) /* Just a page... */ | |
1888 | return pte_young(*pte); | |
1889 | ||
1890 | return 0; | |
1891 | } | |
1892 | ||
1893 | int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) | |
1894 | { | |
7e5a6722 SP |
1895 | if (!kvm->arch.pgd) |
1896 | return 0; | |
35307b9a MZ |
1897 | trace_kvm_age_hva(start, end); |
1898 | return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL); | |
1899 | } | |
1900 | ||
1901 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
1902 | { | |
7e5a6722 SP |
1903 | if (!kvm->arch.pgd) |
1904 | return 0; | |
35307b9a MZ |
1905 | trace_kvm_test_age_hva(hva); |
1906 | return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL); | |
1907 | } | |
1908 | ||
d5d8184d CD |
1909 | void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
1910 | { | |
1911 | mmu_free_memory_cache(&vcpu->arch.mmu_page_cache); | |
1912 | } | |
1913 | ||
342cd0ab CD |
1914 | phys_addr_t kvm_mmu_get_httbr(void) |
1915 | { | |
e4c5a685 AB |
1916 | if (__kvm_cpu_uses_extended_idmap()) |
1917 | return virt_to_phys(merged_hyp_pgd); | |
1918 | else | |
1919 | return virt_to_phys(hyp_pgd); | |
342cd0ab CD |
1920 | } |
1921 | ||
5a677ce0 MZ |
1922 | phys_addr_t kvm_get_idmap_vector(void) |
1923 | { | |
1924 | return hyp_idmap_vector; | |
1925 | } | |
1926 | ||
0535a3e2 MZ |
1927 | static int kvm_map_idmap_text(pgd_t *pgd) |
1928 | { | |
1929 | int err; | |
1930 | ||
1931 | /* Create the idmap in the boot page tables */ | |
98732d1b | 1932 | err = __create_hyp_mappings(pgd, __kvm_idmap_ptrs_per_pgd(), |
0535a3e2 MZ |
1933 | hyp_idmap_start, hyp_idmap_end, |
1934 | __phys_to_pfn(hyp_idmap_start), | |
1935 | PAGE_HYP_EXEC); | |
1936 | if (err) | |
1937 | kvm_err("Failed to idmap %lx-%lx\n", | |
1938 | hyp_idmap_start, hyp_idmap_end); | |
1939 | ||
1940 | return err; | |
1941 | } | |
1942 | ||
342cd0ab CD |
1943 | int kvm_mmu_init(void) |
1944 | { | |
2fb41059 MZ |
1945 | int err; |
1946 | ||
4fda342c | 1947 | hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start); |
46fef158 | 1948 | hyp_idmap_start = ALIGN_DOWN(hyp_idmap_start, PAGE_SIZE); |
4fda342c | 1949 | hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end); |
46fef158 | 1950 | hyp_idmap_end = ALIGN(hyp_idmap_end, PAGE_SIZE); |
4fda342c | 1951 | hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init); |
5a677ce0 | 1952 | |
06f75a1f AB |
1953 | /* |
1954 | * We rely on the linker script to ensure at build time that the HYP | |
1955 | * init code does not cross a page boundary. | |
1956 | */ | |
1957 | BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK); | |
5a677ce0 | 1958 | |
b4ef0499 MZ |
1959 | kvm_debug("IDMAP page: %lx\n", hyp_idmap_start); |
1960 | kvm_debug("HYP VA range: %lx:%lx\n", | |
1961 | kern_hyp_va(PAGE_OFFSET), | |
1962 | kern_hyp_va((unsigned long)high_memory - 1)); | |
eac378a9 | 1963 | |
6c41a413 | 1964 | if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) && |
ed57cac8 | 1965 | hyp_idmap_start < kern_hyp_va((unsigned long)high_memory - 1) && |
d2896d4b | 1966 | hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) { |
eac378a9 MZ |
1967 | /* |
1968 | * The idmap page is intersecting with the VA space, | |
1969 | * it is not safe to continue further. | |
1970 | */ | |
1971 | kvm_err("IDMAP intersecting with HYP VA, unable to continue\n"); | |
1972 | err = -EINVAL; | |
1973 | goto out; | |
1974 | } | |
1975 | ||
38f791a4 | 1976 | hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order); |
0535a3e2 | 1977 | if (!hyp_pgd) { |
d5d8184d | 1978 | kvm_err("Hyp mode PGD not allocated\n"); |
2fb41059 MZ |
1979 | err = -ENOMEM; |
1980 | goto out; | |
1981 | } | |
1982 | ||
0535a3e2 MZ |
1983 | if (__kvm_cpu_uses_extended_idmap()) { |
1984 | boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, | |
1985 | hyp_pgd_order); | |
1986 | if (!boot_hyp_pgd) { | |
1987 | kvm_err("Hyp boot PGD not allocated\n"); | |
1988 | err = -ENOMEM; | |
1989 | goto out; | |
1990 | } | |
2fb41059 | 1991 | |
0535a3e2 MZ |
1992 | err = kvm_map_idmap_text(boot_hyp_pgd); |
1993 | if (err) | |
1994 | goto out; | |
d5d8184d | 1995 | |
e4c5a685 AB |
1996 | merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); |
1997 | if (!merged_hyp_pgd) { | |
1998 | kvm_err("Failed to allocate extra HYP pgd\n"); | |
1999 | goto out; | |
2000 | } | |
2001 | __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd, | |
2002 | hyp_idmap_start); | |
0535a3e2 MZ |
2003 | } else { |
2004 | err = kvm_map_idmap_text(hyp_pgd); | |
2005 | if (err) | |
2006 | goto out; | |
5a677ce0 MZ |
2007 | } |
2008 | ||
e3f019b3 | 2009 | io_map_base = hyp_idmap_start; |
d5d8184d | 2010 | return 0; |
2fb41059 | 2011 | out: |
4f728276 | 2012 | free_hyp_pgds(); |
2fb41059 | 2013 | return err; |
342cd0ab | 2014 | } |
df6ce24f EA |
2015 | |
2016 | void kvm_arch_commit_memory_region(struct kvm *kvm, | |
09170a49 | 2017 | const struct kvm_userspace_memory_region *mem, |
df6ce24f | 2018 | const struct kvm_memory_slot *old, |
f36f3f28 | 2019 | const struct kvm_memory_slot *new, |
df6ce24f EA |
2020 | enum kvm_mr_change change) |
2021 | { | |
c6473555 MS |
2022 | /* |
2023 | * At this point memslot has been committed and there is an | |
2024 | * allocated dirty_bitmap[], dirty pages will be be tracked while the | |
2025 | * memory slot is write protected. | |
2026 | */ | |
2027 | if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES) | |
2028 | kvm_mmu_wp_memory_region(kvm, mem->slot); | |
df6ce24f EA |
2029 | } |
2030 | ||
2031 | int kvm_arch_prepare_memory_region(struct kvm *kvm, | |
2032 | struct kvm_memory_slot *memslot, | |
09170a49 | 2033 | const struct kvm_userspace_memory_region *mem, |
df6ce24f EA |
2034 | enum kvm_mr_change change) |
2035 | { | |
8eef9123 AB |
2036 | hva_t hva = mem->userspace_addr; |
2037 | hva_t reg_end = hva + mem->memory_size; | |
2038 | bool writable = !(mem->flags & KVM_MEM_READONLY); | |
2039 | int ret = 0; | |
2040 | ||
15a49a44 MS |
2041 | if (change != KVM_MR_CREATE && change != KVM_MR_MOVE && |
2042 | change != KVM_MR_FLAGS_ONLY) | |
8eef9123 AB |
2043 | return 0; |
2044 | ||
c3058d5d CD |
2045 | /* |
2046 | * Prevent userspace from creating a memory region outside of the IPA | |
2047 | * space addressable by the KVM guest IPA space. | |
2048 | */ | |
2049 | if (memslot->base_gfn + memslot->npages >= | |
2050 | (KVM_PHYS_SIZE >> PAGE_SHIFT)) | |
2051 | return -EFAULT; | |
2052 | ||
72f31048 | 2053 | down_read(¤t->mm->mmap_sem); |
8eef9123 AB |
2054 | /* |
2055 | * A memory region could potentially cover multiple VMAs, and any holes | |
2056 | * between them, so iterate over all of them to find out if we can map | |
2057 | * any of them right now. | |
2058 | * | |
2059 | * +--------------------------------------------+ | |
2060 | * +---------------+----------------+ +----------------+ | |
2061 | * | : VMA 1 | VMA 2 | | VMA 3 : | | |
2062 | * +---------------+----------------+ +----------------+ | |
2063 | * | memory region | | |
2064 | * +--------------------------------------------+ | |
2065 | */ | |
2066 | do { | |
2067 | struct vm_area_struct *vma = find_vma(current->mm, hva); | |
2068 | hva_t vm_start, vm_end; | |
2069 | ||
2070 | if (!vma || vma->vm_start >= reg_end) | |
2071 | break; | |
2072 | ||
2073 | /* | |
2074 | * Mapping a read-only VMA is only allowed if the | |
2075 | * memory region is configured as read-only. | |
2076 | */ | |
2077 | if (writable && !(vma->vm_flags & VM_WRITE)) { | |
2078 | ret = -EPERM; | |
2079 | break; | |
2080 | } | |
2081 | ||
2082 | /* | |
2083 | * Take the intersection of this VMA with the memory region | |
2084 | */ | |
2085 | vm_start = max(hva, vma->vm_start); | |
2086 | vm_end = min(reg_end, vma->vm_end); | |
2087 | ||
2088 | if (vma->vm_flags & VM_PFNMAP) { | |
2089 | gpa_t gpa = mem->guest_phys_addr + | |
2090 | (vm_start - mem->userspace_addr); | |
ca09f02f MM |
2091 | phys_addr_t pa; |
2092 | ||
2093 | pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT; | |
2094 | pa += vm_start - vma->vm_start; | |
8eef9123 | 2095 | |
15a49a44 | 2096 | /* IO region dirty page logging not allowed */ |
72f31048 MZ |
2097 | if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) { |
2098 | ret = -EINVAL; | |
2099 | goto out; | |
2100 | } | |
15a49a44 | 2101 | |
8eef9123 AB |
2102 | ret = kvm_phys_addr_ioremap(kvm, gpa, pa, |
2103 | vm_end - vm_start, | |
2104 | writable); | |
2105 | if (ret) | |
2106 | break; | |
2107 | } | |
2108 | hva = vm_end; | |
2109 | } while (hva < reg_end); | |
2110 | ||
15a49a44 | 2111 | if (change == KVM_MR_FLAGS_ONLY) |
72f31048 | 2112 | goto out; |
15a49a44 | 2113 | |
849260c7 AB |
2114 | spin_lock(&kvm->mmu_lock); |
2115 | if (ret) | |
8eef9123 | 2116 | unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size); |
849260c7 AB |
2117 | else |
2118 | stage2_flush_memslot(kvm, memslot); | |
2119 | spin_unlock(&kvm->mmu_lock); | |
72f31048 MZ |
2120 | out: |
2121 | up_read(¤t->mm->mmap_sem); | |
8eef9123 | 2122 | return ret; |
df6ce24f EA |
2123 | } |
2124 | ||
2125 | void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, | |
2126 | struct kvm_memory_slot *dont) | |
2127 | { | |
2128 | } | |
2129 | ||
2130 | int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, | |
2131 | unsigned long npages) | |
2132 | { | |
2133 | return 0; | |
2134 | } | |
2135 | ||
15f46015 | 2136 | void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots) |
df6ce24f EA |
2137 | { |
2138 | } | |
2139 | ||
2140 | void kvm_arch_flush_shadow_all(struct kvm *kvm) | |
2141 | { | |
293f2936 | 2142 | kvm_free_stage2_pgd(kvm); |
df6ce24f EA |
2143 | } |
2144 | ||
2145 | void kvm_arch_flush_shadow_memslot(struct kvm *kvm, | |
2146 | struct kvm_memory_slot *slot) | |
2147 | { | |
8eef9123 AB |
2148 | gpa_t gpa = slot->base_gfn << PAGE_SHIFT; |
2149 | phys_addr_t size = slot->npages << PAGE_SHIFT; | |
2150 | ||
2151 | spin_lock(&kvm->mmu_lock); | |
2152 | unmap_stage2_range(kvm, gpa, size); | |
2153 | spin_unlock(&kvm->mmu_lock); | |
df6ce24f | 2154 | } |
3c1e7165 MZ |
2155 | |
2156 | /* | |
2157 | * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized). | |
2158 | * | |
2159 | * Main problems: | |
2160 | * - S/W ops are local to a CPU (not broadcast) | |
2161 | * - We have line migration behind our back (speculation) | |
2162 | * - System caches don't support S/W at all (damn!) | |
2163 | * | |
2164 | * In the face of the above, the best we can do is to try and convert | |
2165 | * S/W ops to VA ops. Because the guest is not allowed to infer the | |
2166 | * S/W to PA mapping, it can only use S/W to nuke the whole cache, | |
2167 | * which is a rather good thing for us. | |
2168 | * | |
2169 | * Also, it is only used when turning caches on/off ("The expected | |
2170 | * usage of the cache maintenance instructions that operate by set/way | |
2171 | * is associated with the cache maintenance instructions associated | |
2172 | * with the powerdown and powerup of caches, if this is required by | |
2173 | * the implementation."). | |
2174 | * | |
2175 | * We use the following policy: | |
2176 | * | |
2177 | * - If we trap a S/W operation, we enable VM trapping to detect | |
2178 | * caches being turned on/off, and do a full clean. | |
2179 | * | |
2180 | * - We flush the caches on both caches being turned on and off. | |
2181 | * | |
2182 | * - Once the caches are enabled, we stop trapping VM ops. | |
2183 | */ | |
2184 | void kvm_set_way_flush(struct kvm_vcpu *vcpu) | |
2185 | { | |
3df59d8d | 2186 | unsigned long hcr = *vcpu_hcr(vcpu); |
3c1e7165 MZ |
2187 | |
2188 | /* | |
2189 | * If this is the first time we do a S/W operation | |
2190 | * (i.e. HCR_TVM not set) flush the whole memory, and set the | |
2191 | * VM trapping. | |
2192 | * | |
2193 | * Otherwise, rely on the VM trapping to wait for the MMU + | |
2194 | * Caches to be turned off. At that point, we'll be able to | |
2195 | * clean the caches again. | |
2196 | */ | |
2197 | if (!(hcr & HCR_TVM)) { | |
2198 | trace_kvm_set_way_flush(*vcpu_pc(vcpu), | |
2199 | vcpu_has_cache_enabled(vcpu)); | |
2200 | stage2_flush_vm(vcpu->kvm); | |
3df59d8d | 2201 | *vcpu_hcr(vcpu) = hcr | HCR_TVM; |
3c1e7165 MZ |
2202 | } |
2203 | } | |
2204 | ||
2205 | void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled) | |
2206 | { | |
2207 | bool now_enabled = vcpu_has_cache_enabled(vcpu); | |
2208 | ||
2209 | /* | |
2210 | * If switching the MMU+caches on, need to invalidate the caches. | |
2211 | * If switching it off, need to clean the caches. | |
2212 | * Clean + invalidate does the trick always. | |
2213 | */ | |
2214 | if (now_enabled != was_enabled) | |
2215 | stage2_flush_vm(vcpu->kvm); | |
2216 | ||
2217 | /* Caches are now on, stop trapping VM ops (until a S/W op) */ | |
2218 | if (now_enabled) | |
3df59d8d | 2219 | *vcpu_hcr(vcpu) &= ~HCR_TVM; |
3c1e7165 MZ |
2220 | |
2221 | trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled); | |
2222 | } |