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53e72406 MZ |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/cpu.h> | |
20 | #include <linux/of_irq.h> | |
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_host.h> | |
23 | #include <linux/interrupt.h> | |
24 | ||
372b7c1b | 25 | #include <clocksource/arm_arch_timer.h> |
53e72406 MZ |
26 | #include <asm/arch_timer.h> |
27 | ||
7275acdf MZ |
28 | #include <kvm/arm_vgic.h> |
29 | #include <kvm/arm_arch_timer.h> | |
53e72406 MZ |
30 | |
31 | static struct timecounter *timecounter; | |
32 | static struct workqueue_struct *wqueue; | |
5ae7f87a | 33 | static unsigned int host_vtimer_irq; |
53e72406 MZ |
34 | |
35 | static cycle_t kvm_phys_timer_read(void) | |
36 | { | |
37 | return timecounter->cc->read(timecounter->cc); | |
38 | } | |
39 | ||
40 | static bool timer_is_armed(struct arch_timer_cpu *timer) | |
41 | { | |
42 | return timer->armed; | |
43 | } | |
44 | ||
45 | /* timer_arm: as in "arm the timer", not as in ARM the company */ | |
46 | static void timer_arm(struct arch_timer_cpu *timer, u64 ns) | |
47 | { | |
48 | timer->armed = true; | |
49 | hrtimer_start(&timer->timer, ktime_add_ns(ktime_get(), ns), | |
50 | HRTIMER_MODE_ABS); | |
51 | } | |
52 | ||
53 | static void timer_disarm(struct arch_timer_cpu *timer) | |
54 | { | |
55 | if (timer_is_armed(timer)) { | |
56 | hrtimer_cancel(&timer->timer); | |
57 | cancel_work_sync(&timer->expired); | |
58 | timer->armed = false; | |
59 | } | |
60 | } | |
61 | ||
62 | static void kvm_timer_inject_irq(struct kvm_vcpu *vcpu) | |
63 | { | |
05971120 | 64 | int ret; |
53e72406 MZ |
65 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; |
66 | ||
372b7c1b | 67 | timer->cntv_ctl |= ARCH_TIMER_CTRL_IT_MASK; |
05971120 CD |
68 | ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, |
69 | timer->irq->irq, | |
70 | timer->irq->level); | |
71 | WARN_ON(ret); | |
53e72406 MZ |
72 | } |
73 | ||
74 | static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id) | |
75 | { | |
76 | struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id; | |
77 | ||
78 | /* | |
79 | * We disable the timer in the world switch and let it be | |
80 | * handled by kvm_timer_sync_hwstate(). Getting a timer | |
81 | * interrupt at this point is a sure sign of some major | |
82 | * breakage. | |
83 | */ | |
84 | pr_warn("Unexpected interrupt %d on vcpu %p\n", irq, vcpu); | |
85 | return IRQ_HANDLED; | |
86 | } | |
87 | ||
88 | static void kvm_timer_inject_irq_work(struct work_struct *work) | |
89 | { | |
90 | struct kvm_vcpu *vcpu; | |
91 | ||
92 | vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired); | |
93 | vcpu->arch.timer_cpu.armed = false; | |
94 | kvm_timer_inject_irq(vcpu); | |
95 | } | |
96 | ||
97 | static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt) | |
98 | { | |
99 | struct arch_timer_cpu *timer; | |
100 | timer = container_of(hrt, struct arch_timer_cpu, timer); | |
101 | queue_work(wqueue, &timer->expired); | |
102 | return HRTIMER_NORESTART; | |
103 | } | |
104 | ||
105 | /** | |
106 | * kvm_timer_flush_hwstate - prepare to move the virt timer to the cpu | |
107 | * @vcpu: The vcpu pointer | |
108 | * | |
109 | * Disarm any pending soft timers, since the world-switch code will write the | |
110 | * virtual timer state back to the physical CPU. | |
111 | */ | |
112 | void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) | |
113 | { | |
114 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
115 | ||
116 | /* | |
117 | * We're about to run this vcpu again, so there is no need to | |
118 | * keep the background timer running, as we're about to | |
119 | * populate the CPU timer again. | |
120 | */ | |
121 | timer_disarm(timer); | |
122 | } | |
123 | ||
124 | /** | |
125 | * kvm_timer_sync_hwstate - sync timer state from cpu | |
126 | * @vcpu: The vcpu pointer | |
127 | * | |
128 | * Check if the virtual timer was armed and either schedule a corresponding | |
129 | * soft timer or inject directly if already expired. | |
130 | */ | |
131 | void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) | |
132 | { | |
133 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
134 | cycle_t cval, now; | |
135 | u64 ns; | |
136 | ||
372b7c1b MR |
137 | if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) || |
138 | !(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE)) | |
53e72406 MZ |
139 | return; |
140 | ||
141 | cval = timer->cntv_cval; | |
142 | now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; | |
143 | ||
144 | BUG_ON(timer_is_armed(timer)); | |
145 | ||
146 | if (cval <= now) { | |
147 | /* | |
148 | * Timer has already expired while we were not | |
149 | * looking. Inject the interrupt and carry on. | |
150 | */ | |
151 | kvm_timer_inject_irq(vcpu); | |
152 | return; | |
153 | } | |
154 | ||
2eebdde6 RC |
155 | ns = cyclecounter_cyc2ns(timecounter->cc, cval - now, timecounter->mask, |
156 | &timecounter->frac); | |
53e72406 MZ |
157 | timer_arm(timer, ns); |
158 | } | |
159 | ||
5ae7f87a AP |
160 | void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu, |
161 | const struct kvm_irq_level *irq) | |
162 | { | |
163 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
164 | ||
165 | /* | |
166 | * The vcpu timer irq number cannot be determined in | |
167 | * kvm_timer_vcpu_init() because it is called much before | |
168 | * kvm_vcpu_set_target(). To handle this, we determine | |
169 | * vcpu timer irq number when the vcpu is reset. | |
170 | */ | |
171 | timer->irq = irq; | |
172 | } | |
173 | ||
53e72406 MZ |
174 | void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) |
175 | { | |
176 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
177 | ||
178 | INIT_WORK(&timer->expired, kvm_timer_inject_irq_work); | |
179 | hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
180 | timer->timer.function = kvm_timer_expire; | |
53e72406 MZ |
181 | } |
182 | ||
183 | static void kvm_timer_init_interrupt(void *info) | |
184 | { | |
5ae7f87a | 185 | enable_percpu_irq(host_vtimer_irq, 0); |
53e72406 MZ |
186 | } |
187 | ||
39735a3a AP |
188 | int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value) |
189 | { | |
190 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
191 | ||
192 | switch (regid) { | |
193 | case KVM_REG_ARM_TIMER_CTL: | |
194 | timer->cntv_ctl = value; | |
195 | break; | |
196 | case KVM_REG_ARM_TIMER_CNT: | |
197 | vcpu->kvm->arch.timer.cntvoff = kvm_phys_timer_read() - value; | |
198 | break; | |
199 | case KVM_REG_ARM_TIMER_CVAL: | |
200 | timer->cntv_cval = value; | |
201 | break; | |
202 | default: | |
203 | return -1; | |
204 | } | |
205 | return 0; | |
206 | } | |
207 | ||
208 | u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid) | |
209 | { | |
210 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
211 | ||
212 | switch (regid) { | |
213 | case KVM_REG_ARM_TIMER_CTL: | |
214 | return timer->cntv_ctl; | |
215 | case KVM_REG_ARM_TIMER_CNT: | |
216 | return kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; | |
217 | case KVM_REG_ARM_TIMER_CVAL: | |
218 | return timer->cntv_cval; | |
219 | } | |
220 | return (u64)-1; | |
221 | } | |
53e72406 MZ |
222 | |
223 | static int kvm_timer_cpu_notify(struct notifier_block *self, | |
224 | unsigned long action, void *cpu) | |
225 | { | |
226 | switch (action) { | |
227 | case CPU_STARTING: | |
228 | case CPU_STARTING_FROZEN: | |
229 | kvm_timer_init_interrupt(NULL); | |
230 | break; | |
231 | case CPU_DYING: | |
232 | case CPU_DYING_FROZEN: | |
5ae7f87a | 233 | disable_percpu_irq(host_vtimer_irq); |
53e72406 MZ |
234 | break; |
235 | } | |
236 | ||
237 | return NOTIFY_OK; | |
238 | } | |
239 | ||
240 | static struct notifier_block kvm_timer_cpu_nb = { | |
241 | .notifier_call = kvm_timer_cpu_notify, | |
242 | }; | |
243 | ||
244 | static const struct of_device_id arch_timer_of_match[] = { | |
245 | { .compatible = "arm,armv7-timer", }, | |
f61701e0 | 246 | { .compatible = "arm,armv8-timer", }, |
53e72406 MZ |
247 | {}, |
248 | }; | |
249 | ||
250 | int kvm_timer_hyp_init(void) | |
251 | { | |
252 | struct device_node *np; | |
253 | unsigned int ppi; | |
254 | int err; | |
255 | ||
256 | timecounter = arch_timer_get_timecounter(); | |
257 | if (!timecounter) | |
258 | return -ENODEV; | |
259 | ||
260 | np = of_find_matching_node(NULL, arch_timer_of_match); | |
261 | if (!np) { | |
262 | kvm_err("kvm_arch_timer: can't find DT node\n"); | |
263 | return -ENODEV; | |
264 | } | |
265 | ||
266 | ppi = irq_of_parse_and_map(np, 2); | |
267 | if (!ppi) { | |
268 | kvm_err("kvm_arch_timer: no virtual timer interrupt\n"); | |
269 | err = -EINVAL; | |
270 | goto out; | |
271 | } | |
272 | ||
273 | err = request_percpu_irq(ppi, kvm_arch_timer_handler, | |
274 | "kvm guest timer", kvm_get_running_vcpus()); | |
275 | if (err) { | |
276 | kvm_err("kvm_arch_timer: can't request interrupt %d (%d)\n", | |
277 | ppi, err); | |
278 | goto out; | |
279 | } | |
280 | ||
5ae7f87a | 281 | host_vtimer_irq = ppi; |
53e72406 | 282 | |
553f809e | 283 | err = __register_cpu_notifier(&kvm_timer_cpu_nb); |
53e72406 MZ |
284 | if (err) { |
285 | kvm_err("Cannot register timer CPU notifier\n"); | |
286 | goto out_free; | |
287 | } | |
288 | ||
289 | wqueue = create_singlethread_workqueue("kvm_arch_timer"); | |
290 | if (!wqueue) { | |
291 | err = -ENOMEM; | |
292 | goto out_free; | |
293 | } | |
294 | ||
295 | kvm_info("%s IRQ%d\n", np->name, ppi); | |
296 | on_each_cpu(kvm_timer_init_interrupt, NULL, 1); | |
297 | ||
298 | goto out; | |
299 | out_free: | |
300 | free_percpu_irq(ppi, kvm_get_running_vcpus()); | |
301 | out: | |
302 | of_node_put(np); | |
303 | return err; | |
304 | } | |
305 | ||
306 | void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu) | |
307 | { | |
308 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
309 | ||
310 | timer_disarm(timer); | |
311 | } | |
312 | ||
05971120 | 313 | void kvm_timer_enable(struct kvm *kvm) |
53e72406 | 314 | { |
05971120 CD |
315 | if (kvm->arch.timer.enabled) |
316 | return; | |
317 | ||
318 | /* | |
319 | * There is a potential race here between VCPUs starting for the first | |
320 | * time, which may be enabling the timer multiple times. That doesn't | |
321 | * hurt though, because we're just setting a variable to the same | |
322 | * variable that it already was. The important thing is that all | |
323 | * VCPUs have the enabled variable set, before entering the guest, if | |
324 | * the arch timers are enabled. | |
325 | */ | |
326 | if (timecounter && wqueue) | |
53e72406 | 327 | kvm->arch.timer.enabled = 1; |
05971120 | 328 | } |
53e72406 | 329 | |
05971120 CD |
330 | void kvm_timer_init(struct kvm *kvm) |
331 | { | |
332 | kvm->arch.timer.cntvoff = kvm_phys_timer_read(); | |
53e72406 | 333 | } |