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tools/power turbostat: Decode MSR_MISC_PWR_MGMT
[linux-block.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
d8af6f5f 36#include <getopt.h>
103a8fea
LB		 37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
88c3281f 40#include <sched.h>
2b92865e 41#include <cpuid.h>
98481e79
LB		 42#include <linux/capability.h>
43#include <errno.h>
103a8fea 44
103a8fea 45char *proc_stat = "/proc/stat";
d8af6f5f
LB		 46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
103a8fea
LB		 51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
fb5d4327 55unsigned int do_knl_cstates;
ee7e38e3
LB		 56unsigned int do_pc2;
57unsigned int do_pc3;
58unsigned int do_pc6;
59unsigned int do_pc7;
ca58710f 60unsigned int do_c8_c9_c10;
0b2bb692 61unsigned int do_skl_residency;
144b44b1
LB		 62unsigned int do_slm_cstates;
63unsigned int use_c1_residency_msr;
103a8fea 64unsigned int has_aperf;
889facbe 65unsigned int has_epb;
fc04cc67 66unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 67unsigned int genuine_intel;
68unsigned int has_invariant_tsc;
d7899447 69unsigned int do_nhm_platform_info;
2f32edf1
LB		 70unsigned int extra_msr_offset32;
71unsigned int extra_msr_offset64;
8e180f3c
LB		 72unsigned int extra_delta_offset32;
73unsigned int extra_delta_offset64;
b2b34dfe 74unsigned int aperf_mperf_multiplier = 1;
1ed51011 75int do_smi;
103a8fea 76double bclk;
a2b7b749 77double base_hz;
21ed5574 78unsigned int has_base_hz;
a2b7b749 79double tsc_tweak = 1.0;
103a8fea
LB		 80unsigned int show_pkg;
81unsigned int show_core;
82unsigned int show_cpu;
c98d5d94
LB		 83unsigned int show_pkg_only;
84unsigned int show_core_only;
85char *output_buffer, *outp;
889facbe
LB		 86unsigned int do_rapl;
87unsigned int do_dts;
88unsigned int do_ptm;
89unsigned int tcc_activation_temp;
90unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 91double rapl_power_units, rapl_time_units;
92double rapl_dram_energy_units, rapl_energy_units;
889facbe 93double rapl_joule_counter_range;
3a9a941d
LB		 94unsigned int do_core_perf_limit_reasons;
95unsigned int do_gfx_perf_limit_reasons;
96unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 97unsigned int crystal_hz;
98unsigned long long tsc_hz;
7ce7d5de 99int base_cpu;
21ed5574 100double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 101unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
102 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
103unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
104unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
105unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
106unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
889facbe 107
e6f9bb3c
LB		 108#define RAPL_PKG (1 << 0)
109 /* 0x610 MSR_PKG_POWER_LIMIT */
110 /* 0x611 MSR_PKG_ENERGY_STATUS */
111#define RAPL_PKG_PERF_STATUS (1 << 1)
112 /* 0x613 MSR_PKG_PERF_STATUS */
113#define RAPL_PKG_POWER_INFO (1 << 2)
114 /* 0x614 MSR_PKG_POWER_INFO */
115
116#define RAPL_DRAM (1 << 3)
117 /* 0x618 MSR_DRAM_POWER_LIMIT */
118 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 119#define RAPL_DRAM_PERF_STATUS (1 << 4)
120 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 121#define RAPL_DRAM_POWER_INFO (1 << 5)
122 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 123
0b2bb692 124#define RAPL_CORES (1 << 6)
e6f9bb3c
LB		 125 /* 0x638 MSR_PP0_POWER_LIMIT */
126 /* 0x639 MSR_PP0_ENERGY_STATUS */
0b2bb692 127#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 128 /* 0x63a MSR_PP0_POLICY */
129
0b2bb692 130#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 131 /* 0x640 MSR_PP1_POWER_LIMIT */
132 /* 0x641 MSR_PP1_ENERGY_STATUS */
133 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 134#define TJMAX_DEFAULT 100
135
136#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 137
138int aperf_mperf_unstable;
139int backwards_count;
140char *progname;
103a8fea 141
c98d5d94
LB		 142cpu_set_t *cpu_present_set, *cpu_affinity_set;
143size_t cpu_present_setsize, cpu_affinity_setsize;
144
145struct thread_data {
146 unsigned long long tsc;
147 unsigned long long aperf;
148 unsigned long long mperf;
144b44b1 149 unsigned long long c1;
2f32edf1 150 unsigned long long extra_msr64;
8e180f3c
LB		 151 unsigned long long extra_delta64;
152 unsigned long long extra_msr32;
153 unsigned long long extra_delta32;
1ed51011 154 unsigned int smi_count;
c98d5d94
LB		 155 unsigned int cpu_id;
156 unsigned int flags;
157#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
158#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
159} *thread_even, *thread_odd;
160
161struct core_data {
162 unsigned long long c3;
163 unsigned long long c6;
164 unsigned long long c7;
889facbe 165 unsigned int core_temp_c;
c98d5d94
LB		 166 unsigned int core_id;
167} *core_even, *core_odd;
168
169struct pkg_data {
170 unsigned long long pc2;
171 unsigned long long pc3;
172 unsigned long long pc6;
173 unsigned long long pc7;
ca58710f
KCA		 174 unsigned long long pc8;
175 unsigned long long pc9;
176 unsigned long long pc10;
0b2bb692
LB		 177 unsigned long long pkg_wtd_core_c0;
178 unsigned long long pkg_any_core_c0;
179 unsigned long long pkg_any_gfxe_c0;
180 unsigned long long pkg_both_core_gfxe_c0;
c98d5d94 181 unsigned int package_id;
889facbe
LB		 182 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
183 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
184 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
185 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
186 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
187 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
188 unsigned int pkg_temp_c;
189
c98d5d94
LB		 190} *package_even, *package_odd;
191
192#define ODD_COUNTERS thread_odd, core_odd, package_odd
193#define EVEN_COUNTERS thread_even, core_even, package_even
194
195#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
196 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
197 topo.num_threads_per_core + \
198 (core_no) * topo.num_threads_per_core + (thread_no))
199#define GET_CORE(core_base, core_no, pkg_no) \
200 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
201#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
202
203struct system_summary {
204 struct thread_data threads;
205 struct core_data cores;
206 struct pkg_data packages;
207} sum, average;
208
209
210struct topo_params {
211 int num_packages;
212 int num_cpus;
213 int num_cores;
214 int max_cpu_num;
215 int num_cores_per_pkg;
216 int num_threads_per_core;
217} topo;
218
219struct timeval tv_even, tv_odd, tv_delta;
220
221void setup_all_buffers(void);
222
223int cpu_is_not_present(int cpu)
d15cf7c1 224{
c98d5d94 225 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 226}
88c3281f 227/*
c98d5d94
LB		 228 * run func(thread, core, package) in topology order
229 * skip non-present cpus
88c3281f 230 */
c98d5d94
LB		 231
232int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
233 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 234{
c98d5d94 235 int retval, pkg_no, core_no, thread_no;
d15cf7c1 236
c98d5d94
LB		 237 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
238 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
239 for (thread_no = 0; thread_no <
240 topo.num_threads_per_core; ++thread_no) {
241 struct thread_data *t;
242 struct core_data *c;
243 struct pkg_data *p;
88c3281f 244
c98d5d94
LB		 245 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
246
247 if (cpu_is_not_present(t->cpu_id))
248 continue;
249
250 c = GET_CORE(core_base, core_no, pkg_no);
251 p = GET_PKG(pkg_base, pkg_no);
252
253 retval = func(t, c, p);
254 if (retval)
255 return retval;
256 }
257 }
258 }
259 return 0;
88c3281f
LB		 260}
261
262int cpu_migrate(int cpu)
263{
c98d5d94
LB		 264 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
265 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
266 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 267 return -1;
268 else
269 return 0;
270}
271
15aaa346 272int get_msr(int cpu, off_t offset, unsigned long long *msr)
103a8fea
LB		 273{
274 ssize_t retval;
103a8fea
LB		 275 char pathname[32];
276 int fd;
277
278 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
279 fd = open(pathname, O_RDONLY);
15aaa346 280 if (fd < 0)
98481e79 281 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 282
15aaa346 283 retval = pread(fd, msr, sizeof *msr, offset);
103a8fea 284 close(fd);
15aaa346 285
98481e79
LB		 286 if (retval != sizeof *msr)
287 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
15aaa346
LB		 288
289 return 0;
103a8fea
LB		 290}
291
fc04cc67
LB		 292/*
293 * Example Format w/ field column widths:
294 *
e7c95ff3
LB		 295 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
296 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 297 */
298
a829eb4d 299void print_header(void)
103a8fea
LB		 300{
301 if (show_pkg)
e7c95ff3 302 outp += sprintf(outp, " Package");
103a8fea 303 if (show_core)
e7c95ff3 304 outp += sprintf(outp, " Core");
103a8fea 305 if (show_cpu)
e7c95ff3 306 outp += sprintf(outp, " CPU");
fc04cc67 307 if (has_aperf)
e7c95ff3 308 outp += sprintf(outp, " Avg_MHz");
d7899447 309 if (has_aperf)
e7c95ff3 310 outp += sprintf(outp, " %%Busy");
103a8fea 311 if (has_aperf)
e7c95ff3
LB		 312 outp += sprintf(outp, " Bzy_MHz");
313 outp += sprintf(outp, " TSC_MHz");
1cc21f7b 314
8e180f3c 315 if (extra_delta_offset32)
e7c95ff3 316 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 317 if (extra_delta_offset64)
e7c95ff3 318 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 319 if (extra_msr_offset32)
e7c95ff3 320 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 321 if (extra_msr_offset64)
e7c95ff3 322 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
1cc21f7b
LB		 323
324 if (!debug)
325 goto done;
326
327 if (do_smi)
328 outp += sprintf(outp, " SMI");
329
103a8fea 330 if (do_nhm_cstates)
e7c95ff3 331 outp += sprintf(outp, " CPU%%c1");
fb5d4327 332 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
e7c95ff3 333 outp += sprintf(outp, " CPU%%c3");
103a8fea 334 if (do_nhm_cstates)
e7c95ff3 335 outp += sprintf(outp, " CPU%%c6");
103a8fea 336 if (do_snb_cstates)
e7c95ff3 337 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 338
339 if (do_dts)
e7c95ff3 340 outp += sprintf(outp, " CoreTmp");
889facbe 341 if (do_ptm)
e7c95ff3 342 outp += sprintf(outp, " PkgTmp");
889facbe 343
0b2bb692
LB		 344 if (do_skl_residency) {
345 outp += sprintf(outp, " Totl%%C0");
346 outp += sprintf(outp, " Any%%C0");
347 outp += sprintf(outp, " GFX%%C0");
348 outp += sprintf(outp, " CPUGFX%%");
349 }
350
ee7e38e3 351 if (do_pc2)
e7c95ff3 352 outp += sprintf(outp, " Pkg%%pc2");
ee7e38e3 353 if (do_pc3)
e7c95ff3 354 outp += sprintf(outp, " Pkg%%pc3");
ee7e38e3 355 if (do_pc6)
e7c95ff3 356 outp += sprintf(outp, " Pkg%%pc6");
ee7e38e3 357 if (do_pc7)
e7c95ff3 358 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 359 if (do_c8_c9_c10) {
e7c95ff3
LB		 360 outp += sprintf(outp, " Pkg%%pc8");
361 outp += sprintf(outp, " Pkg%%pc9");
362 outp += sprintf(outp, " Pk%%pc10");
ca58710f 363 }
103a8fea 364
5c56be9a
DB		 365 if (do_rapl && !rapl_joules) {
366 if (do_rapl & RAPL_PKG)
e7c95ff3 367 outp += sprintf(outp, " PkgWatt");
5c56be9a 368 if (do_rapl & RAPL_CORES)
e7c95ff3 369 outp += sprintf(outp, " CorWatt");
5c56be9a 370 if (do_rapl & RAPL_GFX)
e7c95ff3 371 outp += sprintf(outp, " GFXWatt");
5c56be9a 372 if (do_rapl & RAPL_DRAM)
e7c95ff3 373 outp += sprintf(outp, " RAMWatt");
5c56be9a 374 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 375 outp += sprintf(outp, " PKG_%%");
5c56be9a 376 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 377 outp += sprintf(outp, " RAM_%%");
d7899447 378 } else if (do_rapl && rapl_joules) {
5c56be9a 379 if (do_rapl & RAPL_PKG)
e7c95ff3 380 outp += sprintf(outp, " Pkg_J");
5c56be9a 381 if (do_rapl & RAPL_CORES)
e7c95ff3 382 outp += sprintf(outp, " Cor_J");
5c56be9a 383 if (do_rapl & RAPL_GFX)
e7c95ff3 384 outp += sprintf(outp, " GFX_J");
5c56be9a 385 if (do_rapl & RAPL_DRAM)
bd6906ed 386 outp += sprintf(outp, " RAM_J");
5c56be9a 387 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 388 outp += sprintf(outp, " PKG_%%");
5c56be9a 389 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 390 outp += sprintf(outp, " RAM_%%");
391 outp += sprintf(outp, " time");
889facbe 392
5c56be9a 393 }
1cc21f7b 394 done:
c98d5d94 395 outp += sprintf(outp, "\n");
103a8fea
LB		 396}
397
c98d5d94
LB		 398int dump_counters(struct thread_data *t, struct core_data *c,
399 struct pkg_data *p)
103a8fea 400{
3b4d5c7f 401 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 402
403 if (t) {
3b4d5c7f
AS		 404 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
405 t->cpu_id, t->flags);
406 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
407 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
408 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
409 outp += sprintf(outp, "c1: %016llX\n", t->c1);
410 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 411 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 412 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 413 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 414 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 415 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 416 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 417 extra_msr_offset64, t->extra_msr64);
1ed51011 418 if (do_smi)
3b4d5c7f 419 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 420 }
103a8fea 421
c98d5d94 422 if (c) {
3b4d5c7f
AS		 423 outp += sprintf(outp, "core: %d\n", c->core_id);
424 outp += sprintf(outp, "c3: %016llX\n", c->c3);
425 outp += sprintf(outp, "c6: %016llX\n", c->c6);
426 outp += sprintf(outp, "c7: %016llX\n", c->c7);
427 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 428 }
103a8fea 429
c98d5d94 430 if (p) {
3b4d5c7f 431 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 432
433 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
434 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
435 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
436 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
437
3b4d5c7f 438 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
ee7e38e3
LB		 439 if (do_pc3)
440 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
441 if (do_pc6)
442 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
443 if (do_pc7)
444 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 445 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
446 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
447 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
448 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
449 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
450 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
451 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
452 outp += sprintf(outp, "Throttle PKG: %0X\n",
453 p->rapl_pkg_perf_status);
454 outp += sprintf(outp, "Throttle RAM: %0X\n",
455 p->rapl_dram_perf_status);
456 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 457 }
3b4d5c7f
AS		 458
459 outp += sprintf(outp, "\n");
460
c98d5d94 461 return 0;
103a8fea
LB		 462}
463
e23da037
LB		 464/*
465 * column formatting convention & formats
e23da037 466 */
c98d5d94
LB		 467int format_counters(struct thread_data *t, struct core_data *c,
468 struct pkg_data *p)
103a8fea
LB		 469{
470 double interval_float;
fc04cc67 471 char *fmt8;
103a8fea 472
c98d5d94
LB		 473 /* if showing only 1st thread in core and this isn't one, bail out */
474 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
475 return 0;
476
477 /* if showing only 1st thread in pkg and this isn't one, bail out */
478 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
479 return 0;
480
103a8fea
LB		 481 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
482
c98d5d94
LB		 483 /* topo columns, print blanks on 1st (average) line */
484 if (t == &average.threads) {
103a8fea 485 if (show_pkg)
fc04cc67 486 outp += sprintf(outp, " -");
103a8fea 487 if (show_core)
fc04cc67 488 outp += sprintf(outp, " -");
103a8fea 489 if (show_cpu)
fc04cc67 490 outp += sprintf(outp, " -");
103a8fea 491 } else {
c98d5d94
LB		 492 if (show_pkg) {
493 if (p)
fc04cc67 494 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 495 else
fc04cc67 496 outp += sprintf(outp, " -");
c98d5d94 497 }
c98d5d94
LB		 498 if (show_core) {
499 if (c)
fc04cc67 500 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 501 else
fc04cc67 502 outp += sprintf(outp, " -");
c98d5d94 503 }
103a8fea 504 if (show_cpu)
fc04cc67 505 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 506 }
fc04cc67 507
d7899447 508 /* Avg_MHz */
fc04cc67
LB		 509 if (has_aperf)
510 outp += sprintf(outp, "%8.0f",
511 1.0 / units * t->aperf / interval_float);
512
d7899447
LB		 513 /* %Busy */
514 if (has_aperf) {
103a8fea 515 if (!skip_c0)
a2b7b749 516 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
103a8fea 517 else
fc04cc67 518 outp += sprintf(outp, "********");
103a8fea
LB		 519 }
520
d7899447 521 /* Bzy_MHz */
21ed5574
LB		 522 if (has_aperf) {
523 if (has_base_hz)
524 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
525 else
526 outp += sprintf(outp, "%8.0f",
527 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
528 }
103a8fea 529
d7899447 530 /* TSC_MHz */
fc04cc67 531 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 532
8e180f3c
LB		 533 /* delta */
534 if (extra_delta_offset32)
535 outp += sprintf(outp, " %11llu", t->extra_delta32);
536
537 /* DELTA */
538 if (extra_delta_offset64)
539 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 540 /* msr */
541 if (extra_msr_offset32)
8e180f3c 542 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 543
130ff304 544 /* MSR */
2f32edf1
LB		 545 if (extra_msr_offset64)
546 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 547
1cc21f7b
LB		 548 if (!debug)
549 goto done;
550
551 /* SMI */
552 if (do_smi)
553 outp += sprintf(outp, "%8d", t->smi_count);
554
103a8fea
LB		 555 if (do_nhm_cstates) {
556 if (!skip_c1)
fc04cc67 557 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 558 else
fc04cc67 559 outp += sprintf(outp, "********");
103a8fea 560 }
c98d5d94
LB		 561
562 /* print per-core data only for 1st thread in core */
563 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
564 goto done;
565
fb5d4327 566 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
fc04cc67 567 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 568 if (do_nhm_cstates)
fc04cc67 569 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 570 if (do_snb_cstates)
fc04cc67 571 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 572
889facbe 573 if (do_dts)
fc04cc67 574 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 575
c98d5d94
LB		 576 /* print per-package data only for 1st core in package */
577 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
578 goto done;
579
0b2bb692 580 /* PkgTmp */
889facbe 581 if (do_ptm)
fc04cc67 582 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 583
0b2bb692
LB		 584 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
585 if (do_skl_residency) {
586 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
587 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
588 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
589 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
590 }
591
ee7e38e3 592 if (do_pc2)
fc04cc67 593 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
ee7e38e3 594 if (do_pc3)
fc04cc67 595 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
ee7e38e3 596 if (do_pc6)
fc04cc67 597 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
ee7e38e3 598 if (do_pc7)
fc04cc67 599 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 600 if (do_c8_c9_c10) {
fc04cc67
LB		 601 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
602 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
603 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 604 }
889facbe
LB		 605
606 /*
607 * If measurement interval exceeds minimum RAPL Joule Counter range,
608 * indicate that results are suspect by printing "**" in fraction place.
609 */
fc04cc67
LB		 610 if (interval_float < rapl_joule_counter_range)
611 fmt8 = "%8.2f";
612 else
613 fmt8 = " %6.0f**";
889facbe 614
5c56be9a
DB		 615 if (do_rapl && !rapl_joules) {
616 if (do_rapl & RAPL_PKG)
fc04cc67 617 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 618 if (do_rapl & RAPL_CORES)
fc04cc67 619 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 620 if (do_rapl & RAPL_GFX)
fc04cc67 621 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 622 if (do_rapl & RAPL_DRAM)
40ee8e3b 623 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
5c56be9a 624 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 625 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 626 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 627 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 628 } else if (do_rapl && rapl_joules) {
5c56be9a 629 if (do_rapl & RAPL_PKG)
fc04cc67 630 outp += sprintf(outp, fmt8,
5c56be9a
DB		 631 p->energy_pkg * rapl_energy_units);
632 if (do_rapl & RAPL_CORES)
fc04cc67 633 outp += sprintf(outp, fmt8,
5c56be9a
DB		 634 p->energy_cores * rapl_energy_units);
635 if (do_rapl & RAPL_GFX)
fc04cc67 636 outp += sprintf(outp, fmt8,
5c56be9a
DB		 637 p->energy_gfx * rapl_energy_units);
638 if (do_rapl & RAPL_DRAM)
fc04cc67 639 outp += sprintf(outp, fmt8,
40ee8e3b 640 p->energy_dram * rapl_dram_energy_units);
5c56be9a 641 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 642 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 643 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 644 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 645
d7899447 646 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 647 }
c98d5d94 648done:
c98d5d94
LB		 649 outp += sprintf(outp, "\n");
650
651 return 0;
103a8fea
LB		 652}
653
c98d5d94
LB		 654void flush_stdout()
655{
656 fputs(output_buffer, stdout);
ddac0d68 657 fflush(stdout);
c98d5d94
LB		 658 outp = output_buffer;
659}
660void flush_stderr()
661{
662 fputs(output_buffer, stderr);
663 outp = output_buffer;
664}
665void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 666{
e23da037 667 static int printed;
103a8fea 668
e23da037
LB		 669 if (!printed || !summary_only)
670 print_header();
103a8fea 671
c98d5d94
LB		 672 if (topo.num_cpus > 1)
673 format_counters(&average.threads, &average.cores,
674 &average.packages);
103a8fea 675
e23da037
LB		 676 printed = 1;
677
678 if (summary_only)
679 return;
680
c98d5d94 681 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 682}
683
889facbe
LB		 684#define DELTA_WRAP32(new, old) \
685 if (new > old) { \
686 old = new - old; \
687 } else { \
688 old = 0x100000000 + new - old; \
689 }
690
c98d5d94
LB		 691void
692delta_package(struct pkg_data *new, struct pkg_data *old)
693{
0b2bb692
LB		 694
695 if (do_skl_residency) {
696 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
697 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
698 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
699 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
700 }
c98d5d94 701 old->pc2 = new->pc2 - old->pc2;
ee7e38e3
LB		 702 if (do_pc3)
703 old->pc3 = new->pc3 - old->pc3;
704 if (do_pc6)
705 old->pc6 = new->pc6 - old->pc6;
706 if (do_pc7)
707 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 708 old->pc8 = new->pc8 - old->pc8;
709 old->pc9 = new->pc9 - old->pc9;
710 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 711 old->pkg_temp_c = new->pkg_temp_c;
712
713 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
714 DELTA_WRAP32(new->energy_cores, old->energy_cores);
715 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
716 DELTA_WRAP32(new->energy_dram, old->energy_dram);
717 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
718 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 719}
103a8fea 720
c98d5d94
LB		 721void
722delta_core(struct core_data *new, struct core_data *old)
103a8fea 723{
c98d5d94
LB		 724 old->c3 = new->c3 - old->c3;
725 old->c6 = new->c6 - old->c6;
726 old->c7 = new->c7 - old->c7;
889facbe 727 old->core_temp_c = new->core_temp_c;
c98d5d94 728}
103a8fea 729
c3ae331d
LB		 730/*
731 * old = new - old
732 */
c98d5d94
LB		 733void
734delta_thread(struct thread_data *new, struct thread_data *old,
735 struct core_data *core_delta)
736{
737 old->tsc = new->tsc - old->tsc;
738
739 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 740 if (old->tsc < (1000 * 1000))
741 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
742 "You can disable all c-states by booting with \"idle=poll\"\n"
743 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 744
c98d5d94 745 old->c1 = new->c1 - old->c1;
103a8fea 746
a729617c
LB		 747 if (has_aperf) {
748 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
749 old->aperf = new->aperf - old->aperf;
750 old->mperf = new->mperf - old->mperf;
751 } else {
103a8fea 752
a729617c
LB		 753 if (!aperf_mperf_unstable) {
754 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
755 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
756 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 757
a729617c
LB		 758 aperf_mperf_unstable = 1;
759 }
760 /*
761 * mperf delta is likely a huge "positive" number
762 * can not use it for calculating c0 time
763 */
764 skip_c0 = 1;
765 skip_c1 = 1;
103a8fea 766 }
c98d5d94 767 }
103a8fea 768
103a8fea 769
144b44b1
LB		 770 if (use_c1_residency_msr) {
771 /*
772 * Some models have a dedicated C1 residency MSR,
773 * which should be more accurate than the derivation below.
774 */
775 } else {
776 /*
777 * As counter collection is not atomic,
778 * it is possible for mperf's non-halted cycles + idle states
779 * to exceed TSC's all cycles: show c1 = 0% in that case.
780 */
781 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
782 old->c1 = 0;
783 else {
784 /* normal case, derive c1 */
785 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 786 - core_delta->c6 - core_delta->c7;
144b44b1 787 }
c98d5d94 788 }
c3ae331d 789
c98d5d94 790 if (old->mperf == 0) {
d8af6f5f 791 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 792 old->mperf = 1; /* divide by 0 protection */
103a8fea 793 }
c98d5d94 794
8e180f3c
LB		 795 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
796 old->extra_delta32 &= 0xFFFFFFFF;
797
798 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
799
c98d5d94 800 /*
8e180f3c 801 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 802 */
2f32edf1
LB		 803 old->extra_msr32 = new->extra_msr32;
804 old->extra_msr64 = new->extra_msr64;
1ed51011
LB		 805
806 if (do_smi)
807 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 808}
809
810int delta_cpu(struct thread_data *t, struct core_data *c,
811 struct pkg_data *p, struct thread_data *t2,
812 struct core_data *c2, struct pkg_data *p2)
813{
814 /* calculate core delta only for 1st thread in core */
815 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
816 delta_core(c, c2);
817
818 /* always calculate thread delta */
819 delta_thread(t, t2, c2); /* c2 is core delta */
820
821 /* calculate package delta only for 1st core in package */
822 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
823 delta_package(p, p2);
824
103a8fea
LB		 825 return 0;
826}
827
c98d5d94
LB		 828void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
829{
830 t->tsc = 0;
831 t->aperf = 0;
832 t->mperf = 0;
833 t->c1 = 0;
834
1ed51011 835 t->smi_count = 0;
8e180f3c
LB		 836 t->extra_delta32 = 0;
837 t->extra_delta64 = 0;
838
c98d5d94
LB		 839 /* tells format_counters to dump all fields from this set */
840 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
841
842 c->c3 = 0;
843 c->c6 = 0;
844 c->c7 = 0;
889facbe 845 c->core_temp_c = 0;
c98d5d94 846
0b2bb692
LB		 847 p->pkg_wtd_core_c0 = 0;
848 p->pkg_any_core_c0 = 0;
849 p->pkg_any_gfxe_c0 = 0;
850 p->pkg_both_core_gfxe_c0 = 0;
851
c98d5d94 852 p->pc2 = 0;
ee7e38e3
LB		 853 if (do_pc3)
854 p->pc3 = 0;
855 if (do_pc6)
856 p->pc6 = 0;
857 if (do_pc7)
858 p->pc7 = 0;
ca58710f
KCA		 859 p->pc8 = 0;
860 p->pc9 = 0;
861 p->pc10 = 0;
889facbe
LB		 862
863 p->energy_pkg = 0;
864 p->energy_dram = 0;
865 p->energy_cores = 0;
866 p->energy_gfx = 0;
867 p->rapl_pkg_perf_status = 0;
868 p->rapl_dram_perf_status = 0;
869 p->pkg_temp_c = 0;
c98d5d94
LB		 870}
871int sum_counters(struct thread_data *t, struct core_data *c,
872 struct pkg_data *p)
103a8fea 873{
c98d5d94
LB		 874 average.threads.tsc += t->tsc;
875 average.threads.aperf += t->aperf;
876 average.threads.mperf += t->mperf;
877 average.threads.c1 += t->c1;
103a8fea 878
8e180f3c
LB		 879 average.threads.extra_delta32 += t->extra_delta32;
880 average.threads.extra_delta64 += t->extra_delta64;
881
c98d5d94
LB		 882 /* sum per-core values only for 1st thread in core */
883 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
884 return 0;
103a8fea 885
c98d5d94
LB		 886 average.cores.c3 += c->c3;
887 average.cores.c6 += c->c6;
888 average.cores.c7 += c->c7;
889
889facbe
LB		 890 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
891
c98d5d94
LB		 892 /* sum per-pkg values only for 1st core in pkg */
893 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
894 return 0;
895
0b2bb692
LB		 896 if (do_skl_residency) {
897 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
898 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
899 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
900 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
901 }
902
c98d5d94 903 average.packages.pc2 += p->pc2;
ee7e38e3
LB		 904 if (do_pc3)
905 average.packages.pc3 += p->pc3;
906 if (do_pc6)
907 average.packages.pc6 += p->pc6;
908 if (do_pc7)
909 average.packages.pc7 += p->pc7;
ca58710f
KCA		 910 average.packages.pc8 += p->pc8;
911 average.packages.pc9 += p->pc9;
912 average.packages.pc10 += p->pc10;
c98d5d94 913
889facbe
LB		 914 average.packages.energy_pkg += p->energy_pkg;
915 average.packages.energy_dram += p->energy_dram;
916 average.packages.energy_cores += p->energy_cores;
917 average.packages.energy_gfx += p->energy_gfx;
918
919 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
920
921 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
922 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 923 return 0;
924}
925/*
926 * sum the counters for all cpus in the system
927 * compute the weighted average
928 */
929void compute_average(struct thread_data *t, struct core_data *c,
930 struct pkg_data *p)
931{
932 clear_counters(&average.threads, &average.cores, &average.packages);
933
934 for_all_cpus(sum_counters, t, c, p);
935
936 average.threads.tsc /= topo.num_cpus;
937 average.threads.aperf /= topo.num_cpus;
938 average.threads.mperf /= topo.num_cpus;
939 average.threads.c1 /= topo.num_cpus;
940
8e180f3c
LB		 941 average.threads.extra_delta32 /= topo.num_cpus;
942 average.threads.extra_delta32 &= 0xFFFFFFFF;
943
944 average.threads.extra_delta64 /= topo.num_cpus;
945
c98d5d94
LB		 946 average.cores.c3 /= topo.num_cores;
947 average.cores.c6 /= topo.num_cores;
948 average.cores.c7 /= topo.num_cores;
949
0b2bb692
LB		 950 if (do_skl_residency) {
951 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
952 average.packages.pkg_any_core_c0 /= topo.num_packages;
953 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
954 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
955 }
956
c98d5d94 957 average.packages.pc2 /= topo.num_packages;
ee7e38e3
LB		 958 if (do_pc3)
959 average.packages.pc3 /= topo.num_packages;
960 if (do_pc6)
961 average.packages.pc6 /= topo.num_packages;
962 if (do_pc7)
963 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 964
965 average.packages.pc8 /= topo.num_packages;
966 average.packages.pc9 /= topo.num_packages;
967 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 968}
969
c98d5d94 970static unsigned long long rdtsc(void)
103a8fea 971{
c98d5d94 972 unsigned int low, high;
15aaa346 973
c98d5d94 974 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 975
c98d5d94
LB		 976 return low | ((unsigned long long)high) << 32;
977}
15aaa346 978
15aaa346 979
c98d5d94
LB		 980/*
981 * get_counters(...)
982 * migrate to cpu
983 * acquire and record local counters for that cpu
984 */
985int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
986{
987 int cpu = t->cpu_id;
889facbe 988 unsigned long long msr;
88c3281f 989
e52966c0
LB		 990 if (cpu_migrate(cpu)) {
991 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
c98d5d94 992 return -1;
e52966c0 993 }
15aaa346 994
c98d5d94
LB		 995 t->tsc = rdtsc(); /* we are running on local CPU of interest */
996
997 if (has_aperf) {
9c63a650 998 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 999 return -3;
9c63a650 1000 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 1001 return -4;
b2b34dfe
HC		 1002 t->aperf = t->aperf * aperf_mperf_multiplier;
1003 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 1004 }
1005
1ed51011
LB		 1006 if (do_smi) {
1007 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1008 return -5;
1009 t->smi_count = msr & 0xFFFFFFFF;
1010 }
8e180f3c 1011 if (extra_delta_offset32) {
889facbe 1012 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 1013 return -5;
889facbe 1014 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1015 }
1016
1017 if (extra_delta_offset64)
1018 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 1019 return -5;
1020
8e180f3c 1021 if (extra_msr_offset32) {
889facbe 1022 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 1023 return -5;
889facbe 1024 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1025 }
1026
2f32edf1
LB		 1027 if (extra_msr_offset64)
1028 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 1029 return -5;
1030
144b44b1
LB		 1031 if (use_c1_residency_msr) {
1032 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1033 return -6;
1034 }
1035
c98d5d94
LB		 1036 /* collect core counters only for 1st thread in core */
1037 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1038 return 0;
1039
fb5d4327 1040 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1041 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1042 return -6;
144b44b1
LB		 1043 }
1044
fb5d4327 1045 if (do_nhm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1046 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1047 return -7;
fb5d4327
DC		 1048 } else if (do_knl_cstates) {
1049 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1050 return -7;
c98d5d94
LB		 1051 }
1052
1053 if (do_snb_cstates)
1054 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1055 return -8;
1056
889facbe
LB		 1057 if (do_dts) {
1058 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1059 return -9;
1060 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1061 }
1062
1063
c98d5d94
LB		 1064 /* collect package counters only for 1st core in package */
1065 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1066 return 0;
1067
0b2bb692
LB		 1068 if (do_skl_residency) {
1069 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1070 return -10;
1071 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1072 return -11;
1073 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1074 return -12;
1075 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1076 return -13;
1077 }
ee7e38e3 1078 if (do_pc3)
c98d5d94
LB		 1079 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1080 return -9;
ee7e38e3 1081 if (do_pc6)
c98d5d94
LB		 1082 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1083 return -10;
ee7e38e3 1084 if (do_pc2)
c98d5d94
LB		 1085 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1086 return -11;
ee7e38e3 1087 if (do_pc7)
c98d5d94
LB		 1088 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1089 return -12;
ca58710f
KCA		 1090 if (do_c8_c9_c10) {
1091 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1092 return -13;
1093 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1094 return -13;
1095 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1096 return -13;
1097 }
889facbe
LB		 1098 if (do_rapl & RAPL_PKG) {
1099 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1100 return -13;
1101 p->energy_pkg = msr & 0xFFFFFFFF;
1102 }
1103 if (do_rapl & RAPL_CORES) {
1104 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1105 return -14;
1106 p->energy_cores = msr & 0xFFFFFFFF;
1107 }
1108 if (do_rapl & RAPL_DRAM) {
1109 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1110 return -15;
1111 p->energy_dram = msr & 0xFFFFFFFF;
1112 }
1113 if (do_rapl & RAPL_GFX) {
1114 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1115 return -16;
1116 p->energy_gfx = msr & 0xFFFFFFFF;
1117 }
1118 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1119 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1120 return -16;
1121 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1122 }
1123 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1124 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1125 return -16;
1126 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1127 }
1128 if (do_ptm) {
1129 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1130 return -17;
1131 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1132 }
15aaa346 1133 return 0;
103a8fea
LB		 1134}
1135
ee7e38e3
LB		 1136/*
1137 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1138 * If you change the values, note they are used both in comparisons
1139 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1140 */
1141
1142#define PCLUKN 0 /* Unknown */
1143#define PCLRSV 1 /* Reserved */
1144#define PCL__0 2 /* PC0 */
1145#define PCL__1 3 /* PC1 */
1146#define PCL__2 4 /* PC2 */
1147#define PCL__3 5 /* PC3 */
1148#define PCL__4 6 /* PC4 */
1149#define PCL__6 7 /* PC6 */
1150#define PCL_6N 8 /* PC6 No Retention */
1151#define PCL_6R 9 /* PC6 Retention */
1152#define PCL__7 10 /* PC7 */
1153#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1154#define PCL__8 12 /* PC8 */
1155#define PCL__9 13 /* PC9 */
1156#define PCLUNL 14 /* Unlimited */
ee7e38e3
LB		 1157
1158int pkg_cstate_limit = PCLUKN;
1159char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
0b2bb692 1160 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
ee7e38e3 1161
e9257f5f
LB		 1162int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1163int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1164int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1165int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1166int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1167int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 1168
a2b7b749
LB		 1169
1170static void
1171calculate_tsc_tweak()
1172{
a2b7b749
LB		 1173 tsc_tweak = base_hz / tsc_hz;
1174}
1175
fcd17211
LB		 1176static void
1177dump_nhm_platform_info(void)
103a8fea
LB		 1178{
1179 unsigned long long msr;
1180 unsigned int ratio;
1181
ec0adc53 1182 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 1183
ec0adc53 1184 fprintf(stderr, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 1185
103a8fea 1186 ratio = (msr >> 40) & 0xFF;
8f61f359 1187 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
103a8fea
LB		 1188 ratio, bclk, ratio * bclk);
1189
1190 ratio = (msr >> 8) & 0xFF;
8f61f359 1191 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
103a8fea
LB		 1192 ratio, bclk, ratio * bclk);
1193
7ce7d5de 1194 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
bfae2052
LB		 1195 fprintf(stderr, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1196 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 1197
fcd17211
LB		 1198 return;
1199}
1200
1201static void
1202dump_hsw_turbo_ratio_limits(void)
1203{
1204 unsigned long long msr;
1205 unsigned int ratio;
1206
7ce7d5de 1207 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 1208
bfae2052 1209 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 1210
1211 ratio = (msr >> 8) & 0xFF;
1212 if (ratio)
1213 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1214 ratio, bclk, ratio * bclk);
1215
1216 ratio = (msr >> 0) & 0xFF;
1217 if (ratio)
1218 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1219 ratio, bclk, ratio * bclk);
1220 return;
1221}
1222
1223static void
1224dump_ivt_turbo_ratio_limits(void)
1225{
1226 unsigned long long msr;
1227 unsigned int ratio;
6574a5d5 1228
7ce7d5de 1229 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 1230
bfae2052 1231 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1232
1233 ratio = (msr >> 56) & 0xFF;
1234 if (ratio)
1235 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1236 ratio, bclk, ratio * bclk);
1237
1238 ratio = (msr >> 48) & 0xFF;
1239 if (ratio)
1240 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1241 ratio, bclk, ratio * bclk);
1242
1243 ratio = (msr >> 40) & 0xFF;
1244 if (ratio)
1245 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1246 ratio, bclk, ratio * bclk);
1247
1248 ratio = (msr >> 32) & 0xFF;
1249 if (ratio)
1250 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1251 ratio, bclk, ratio * bclk);
1252
1253 ratio = (msr >> 24) & 0xFF;
1254 if (ratio)
1255 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1256 ratio, bclk, ratio * bclk);
1257
1258 ratio = (msr >> 16) & 0xFF;
1259 if (ratio)
1260 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1261 ratio, bclk, ratio * bclk);
1262
1263 ratio = (msr >> 8) & 0xFF;
1264 if (ratio)
1265 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1266 ratio, bclk, ratio * bclk);
1267
1268 ratio = (msr >> 0) & 0xFF;
1269 if (ratio)
1270 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1271 ratio, bclk, ratio * bclk);
fcd17211
LB		 1272 return;
1273}
6574a5d5 1274
fcd17211
LB		 1275static void
1276dump_nhm_turbo_ratio_limits(void)
1277{
1278 unsigned long long msr;
1279 unsigned int ratio;
103a8fea 1280
7ce7d5de 1281 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
103a8fea 1282
bfae2052 1283 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1284
1285 ratio = (msr >> 56) & 0xFF;
1286 if (ratio)
1287 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1288 ratio, bclk, ratio * bclk);
1289
1290 ratio = (msr >> 48) & 0xFF;
1291 if (ratio)
1292 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1293 ratio, bclk, ratio * bclk);
1294
1295 ratio = (msr >> 40) & 0xFF;
1296 if (ratio)
1297 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1298 ratio, bclk, ratio * bclk);
1299
1300 ratio = (msr >> 32) & 0xFF;
1301 if (ratio)
1302 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1303 ratio, bclk, ratio * bclk);
1304
103a8fea
LB		 1305 ratio = (msr >> 24) & 0xFF;
1306 if (ratio)
1307 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1308 ratio, bclk, ratio * bclk);
1309
1310 ratio = (msr >> 16) & 0xFF;
1311 if (ratio)
1312 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1313 ratio, bclk, ratio * bclk);
1314
1315 ratio = (msr >> 8) & 0xFF;
1316 if (ratio)
1317 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1318 ratio, bclk, ratio * bclk);
1319
1320 ratio = (msr >> 0) & 0xFF;
1321 if (ratio)
1322 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1323 ratio, bclk, ratio * bclk);
fcd17211
LB		 1324 return;
1325}
3a9a941d 1326
fb5d4327
DC		 1327static void
1328dump_knl_turbo_ratio_limits(void)
1329{
1330 int cores;
1331 unsigned int ratio;
1332 unsigned long long msr;
1333 int delta_cores;
1334 int delta_ratio;
1335 int i;
1336
7ce7d5de 1337 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
fb5d4327 1338
bfae2052
LB		 1339 fprintf(stderr, "cpu%d: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
1340 base_cpu, msr);
fb5d4327
DC		 1341
1342 /**
1343 * Turbo encoding in KNL is as follows:
1344 * [7:0] -- Base value of number of active cores of bucket 1.
1345 * [15:8] -- Base value of freq ratio of bucket 1.
1346 * [20:16] -- +ve delta of number of active cores of bucket 2.
1347 * i.e. active cores of bucket 2 =
1348 * active cores of bucket 1 + delta
1349 * [23:21] -- Negative delta of freq ratio of bucket 2.
1350 * i.e. freq ratio of bucket 2 =
1351 * freq ratio of bucket 1 - delta
1352 * [28:24]-- +ve delta of number of active cores of bucket 3.
1353 * [31:29]-- -ve delta of freq ratio of bucket 3.
1354 * [36:32]-- +ve delta of number of active cores of bucket 4.
1355 * [39:37]-- -ve delta of freq ratio of bucket 4.
1356 * [44:40]-- +ve delta of number of active cores of bucket 5.
1357 * [47:45]-- -ve delta of freq ratio of bucket 5.
1358 * [52:48]-- +ve delta of number of active cores of bucket 6.
1359 * [55:53]-- -ve delta of freq ratio of bucket 6.
1360 * [60:56]-- +ve delta of number of active cores of bucket 7.
1361 * [63:61]-- -ve delta of freq ratio of bucket 7.
1362 */
1363 cores = msr & 0xFF;
1364 ratio = (msr >> 8) && 0xFF;
1365 if (ratio > 0)
1366 fprintf(stderr,
1367 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1368 ratio, bclk, ratio * bclk, cores);
1369
1370 for (i = 16; i < 64; i = i + 8) {
1371 delta_cores = (msr >> i) & 0x1F;
1372 delta_ratio = (msr >> (i + 5)) && 0x7;
1373 if (!delta_cores || !delta_ratio)
1374 return;
1375 cores = cores + delta_cores;
1376 ratio = ratio - delta_ratio;
1377
1378 /** -ve ratios will make successive ratio calculations
1379 * negative. Hence return instead of carrying on.
1380 */
1381 if (ratio > 0)
1382 fprintf(stderr,
1383 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1384 ratio, bclk, ratio * bclk, cores);
1385 }
1386}
1387
fcd17211
LB		 1388static void
1389dump_nhm_cst_cfg(void)
1390{
1391 unsigned long long msr;
1392
7ce7d5de 1393 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
fcd17211
LB		 1394
1395#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1396#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1397
bfae2052 1398 fprintf(stderr, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
fcd17211
LB		 1399
1400 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1401 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1402 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1403 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1404 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1405 (msr & (1 << 15)) ? "" : "UN",
1406 (unsigned int)msr & 7,
1407 pkg_cstate_limit_strings[pkg_cstate_limit]);
1408 return;
103a8fea
LB		 1409}
1410
6fb3143b
LB		 1411static void
1412dump_config_tdp(void)
1413{
1414 unsigned long long msr;
1415
1416 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
1417 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1418 fprintf(stderr, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
1419
1420 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
1421 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
1422 if (msr) {
1423 fprintf(stderr, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1424 fprintf(stderr, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1425 fprintf(stderr, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1426 fprintf(stderr, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
1427 }
1428 fprintf(stderr, ")\n");
1429
1430 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
1431 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
1432 if (msr) {
1433 fprintf(stderr, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1434 fprintf(stderr, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1435 fprintf(stderr, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1436 fprintf(stderr, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
1437 }
1438 fprintf(stderr, ")\n");
1439
1440 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
1441 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
1442 if ((msr) & 0x3)
1443 fprintf(stderr, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1444 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1445 fprintf(stderr, ")\n");
1446
1447 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
1448 fprintf(stderr, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
759d2a93 1449 fprintf(stderr, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0x7F);
6fb3143b
LB		 1450 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1451 fprintf(stderr, ")\n");
1452}
1453
c98d5d94 1454void free_all_buffers(void)
103a8fea 1455{
c98d5d94
LB		 1456 CPU_FREE(cpu_present_set);
1457 cpu_present_set = NULL;
1458 cpu_present_set = 0;
103a8fea 1459
c98d5d94
LB		 1460 CPU_FREE(cpu_affinity_set);
1461 cpu_affinity_set = NULL;
1462 cpu_affinity_setsize = 0;
103a8fea 1463
c98d5d94
LB		 1464 free(thread_even);
1465 free(core_even);
1466 free(package_even);
103a8fea 1467
c98d5d94
LB		 1468 thread_even = NULL;
1469 core_even = NULL;
1470 package_even = NULL;
103a8fea 1471
c98d5d94
LB		 1472 free(thread_odd);
1473 free(core_odd);
1474 free(package_odd);
103a8fea 1475
c98d5d94
LB		 1476 thread_odd = NULL;
1477 core_odd = NULL;
1478 package_odd = NULL;
103a8fea 1479
c98d5d94
LB		 1480 free(output_buffer);
1481 output_buffer = NULL;
1482 outp = NULL;
103a8fea
LB		 1483}
1484
57a42a34
JT		 1485/*
1486 * Open a file, and exit on failure
1487 */
1488FILE *fopen_or_die(const char *path, const char *mode)
1489{
1490 FILE *filep = fopen(path, "r");
b2c95d90
JT		 1491 if (!filep)
1492 err(1, "%s: open failed", path);
57a42a34
JT		 1493 return filep;
1494}
1495
c98d5d94 1496/*
95aebc44 1497 * Parse a file containing a single int.
c98d5d94 1498 */
95aebc44 1499int parse_int_file(const char *fmt, ...)
103a8fea 1500{
95aebc44
JT		 1501 va_list args;
1502 char path[PATH_MAX];
c98d5d94 1503 FILE *filep;
95aebc44 1504 int value;
103a8fea 1505
95aebc44
JT		 1506 va_start(args, fmt);
1507 vsnprintf(path, sizeof(path), fmt, args);
1508 va_end(args);
57a42a34 1509 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1510 if (fscanf(filep, "%d", &value) != 1)
1511 err(1, "%s: failed to parse number from file", path);
c98d5d94 1512 fclose(filep);
95aebc44
JT		 1513 return value;
1514}
1515
1516/*
e275b388
DC		 1517 * get_cpu_position_in_core(cpu)
1518 * return the position of the CPU among its HT siblings in the core
1519 * return -1 if the sibling is not in list
95aebc44 1520 */
e275b388 1521int get_cpu_position_in_core(int cpu)
95aebc44 1522{
e275b388
DC		 1523 char path[64];
1524 FILE *filep;
1525 int this_cpu;
1526 char character;
1527 int i;
1528
1529 sprintf(path,
1530 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1531 cpu);
1532 filep = fopen(path, "r");
1533 if (filep == NULL) {
1534 perror(path);
1535 exit(1);
1536 }
1537
1538 for (i = 0; i < topo.num_threads_per_core; i++) {
1539 fscanf(filep, "%d", &this_cpu);
1540 if (this_cpu == cpu) {
1541 fclose(filep);
1542 return i;
1543 }
1544
1545 /* Account for no separator after last thread*/
1546 if (i != (topo.num_threads_per_core - 1))
1547 fscanf(filep, "%c", &character);
1548 }
1549
1550 fclose(filep);
1551 return -1;
103a8fea
LB		 1552}
1553
c98d5d94
LB		 1554/*
1555 * cpu_is_first_core_in_package(cpu)
1556 * return 1 if given CPU is 1st core in package
1557 */
1558int cpu_is_first_core_in_package(int cpu)
103a8fea 1559{
95aebc44 1560 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1561}
1562
1563int get_physical_package_id(int cpu)
1564{
95aebc44 1565 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1566}
1567
1568int get_core_id(int cpu)
1569{
95aebc44 1570 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1571}
1572
c98d5d94
LB		 1573int get_num_ht_siblings(int cpu)
1574{
1575 char path[80];
1576 FILE *filep;
e275b388
DC		 1577 int sib1;
1578 int matches = 0;
c98d5d94 1579 char character;
e275b388
DC		 1580 char str[100];
1581 char *ch;
c98d5d94
LB		 1582
1583 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1584 filep = fopen_or_die(path, "r");
e275b388 1585
c98d5d94
LB		 1586 /*
1587 * file format:
e275b388
DC		 1588 * A ',' separated or '-' separated set of numbers
1589 * (eg 1-2 or 1,3,4,5)
c98d5d94 1590 */
e275b388
DC		 1591 fscanf(filep, "%d%c\n", &sib1, &character);
1592 fseek(filep, 0, SEEK_SET);
1593 fgets(str, 100, filep);
1594 ch = strchr(str, character);
1595 while (ch != NULL) {
1596 matches++;
1597 ch = strchr(ch+1, character);
1598 }
c98d5d94
LB		 1599
1600 fclose(filep);
e275b388 1601 return matches+1;
c98d5d94
LB		 1602}
1603
103a8fea 1604/*
c98d5d94
LB		 1605 * run func(thread, core, package) in topology order
1606 * skip non-present cpus
103a8fea
LB		 1607 */
1608
c98d5d94
LB		 1609int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1610 struct pkg_data *, struct thread_data *, struct core_data *,
1611 struct pkg_data *), struct thread_data *thread_base,
1612 struct core_data *core_base, struct pkg_data *pkg_base,
1613 struct thread_data *thread_base2, struct core_data *core_base2,
1614 struct pkg_data *pkg_base2)
1615{
1616 int retval, pkg_no, core_no, thread_no;
1617
1618 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1619 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1620 for (thread_no = 0; thread_no <
1621 topo.num_threads_per_core; ++thread_no) {
1622 struct thread_data *t, *t2;
1623 struct core_data *c, *c2;
1624 struct pkg_data *p, *p2;
1625
1626 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1627
1628 if (cpu_is_not_present(t->cpu_id))
1629 continue;
1630
1631 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1632
1633 c = GET_CORE(core_base, core_no, pkg_no);
1634 c2 = GET_CORE(core_base2, core_no, pkg_no);
1635
1636 p = GET_PKG(pkg_base, pkg_no);
1637 p2 = GET_PKG(pkg_base2, pkg_no);
1638
1639 retval = func(t, c, p, t2, c2, p2);
1640 if (retval)
1641 return retval;
1642 }
1643 }
1644 }
1645 return 0;
1646}
1647
1648/*
1649 * run func(cpu) on every cpu in /proc/stat
1650 * return max_cpu number
1651 */
1652int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1653{
1654 FILE *fp;
c98d5d94 1655 int cpu_num;
103a8fea
LB		 1656 int retval;
1657
57a42a34 1658 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1659
1660 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1661 if (retval != 0)
1662 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1663
c98d5d94
LB		 1664 while (1) {
1665 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1666 if (retval != 1)
1667 break;
1668
c98d5d94
LB		 1669 retval = func(cpu_num);
1670 if (retval) {
1671 fclose(fp);
1672 return(retval);
1673 }
103a8fea
LB		 1674 }
1675 fclose(fp);
c98d5d94 1676 return 0;
103a8fea
LB		 1677}
1678
1679void re_initialize(void)
1680{
c98d5d94
LB		 1681 free_all_buffers();
1682 setup_all_buffers();
1683 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1684}
1685
c98d5d94 1686
103a8fea 1687/*
c98d5d94
LB		 1688 * count_cpus()
1689 * remember the last one seen, it will be the max
103a8fea 1690 */
c98d5d94 1691int count_cpus(int cpu)
103a8fea 1692{
c98d5d94
LB		 1693 if (topo.max_cpu_num < cpu)
1694 topo.max_cpu_num = cpu;
103a8fea 1695
c98d5d94
LB		 1696 topo.num_cpus += 1;
1697 return 0;
1698}
1699int mark_cpu_present(int cpu)
1700{
1701 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1702 return 0;
103a8fea
LB		 1703}
1704
1705void turbostat_loop()
1706{
c98d5d94 1707 int retval;
e52966c0 1708 int restarted = 0;
c98d5d94 1709
103a8fea 1710restart:
e52966c0
LB		 1711 restarted++;
1712
c98d5d94 1713 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1714 if (retval < -1) {
1715 exit(retval);
1716 } else if (retval == -1) {
e52966c0
LB		 1717 if (restarted > 1) {
1718 exit(retval);
1719 }
c98d5d94
LB		 1720 re_initialize();
1721 goto restart;
1722 }
e52966c0 1723 restarted = 0;
103a8fea
LB		 1724 gettimeofday(&tv_even, (struct timezone *)NULL);
1725
1726 while (1) {
c98d5d94 1727 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 1728 re_initialize();
1729 goto restart;
1730 }
1731 sleep(interval_sec);
c98d5d94 1732 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 1733 if (retval < -1) {
1734 exit(retval);
1735 } else if (retval == -1) {
15aaa346
LB		 1736 re_initialize();
1737 goto restart;
1738 }
103a8fea 1739 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 1740 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 1741 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1742 compute_average(EVEN_COUNTERS);
1743 format_all_counters(EVEN_COUNTERS);
1744 flush_stdout();
15aaa346 1745 sleep(interval_sec);
c98d5d94 1746 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1747 if (retval < -1) {
1748 exit(retval);
1749 } else if (retval == -1) {
103a8fea
LB		 1750 re_initialize();
1751 goto restart;
1752 }
103a8fea 1753 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 1754 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 1755 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1756 compute_average(ODD_COUNTERS);
1757 format_all_counters(ODD_COUNTERS);
1758 flush_stdout();
103a8fea
LB		 1759 }
1760}
1761
1762void check_dev_msr()
1763{
1764 struct stat sb;
7ce7d5de 1765 char pathname[32];
103a8fea 1766
7ce7d5de
PB		 1767 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1768 if (stat(pathname, &sb))
a21d38c8
LB		 1769 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1770 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 1771}
1772
98481e79 1773void check_permissions()
103a8fea 1774{
98481e79
LB		 1775 struct __user_cap_header_struct cap_header_data;
1776 cap_user_header_t cap_header = &cap_header_data;
1777 struct __user_cap_data_struct cap_data_data;
1778 cap_user_data_t cap_data = &cap_data_data;
1779 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1780 int do_exit = 0;
7ce7d5de 1781 char pathname[32];
98481e79
LB		 1782
1783 /* check for CAP_SYS_RAWIO */
1784 cap_header->pid = getpid();
1785 cap_header->version = _LINUX_CAPABILITY_VERSION;
1786 if (capget(cap_header, cap_data) < 0)
1787 err(-6, "capget(2) failed");
1788
1789 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1790 do_exit++;
1791 warnx("capget(CAP_SYS_RAWIO) failed,"
1792 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1793 }
1794
1795 /* test file permissions */
7ce7d5de
PB		 1796 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1797 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 1798 do_exit++;
1799 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1800 }
1801
1802 /* if all else fails, thell them to be root */
1803 if (do_exit)
1804 if (getuid() != 0)
d7899447 1805 warnx("... or simply run as root");
98481e79
LB		 1806
1807 if (do_exit)
1808 exit(-6);
103a8fea
LB		 1809}
1810
d7899447
LB		 1811/*
1812 * NHM adds support for additional MSRs:
1813 *
1814 * MSR_SMI_COUNT 0x00000034
1815 *
ec0adc53 1816 * MSR_PLATFORM_INFO 0x000000ce
d7899447
LB		 1817 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1818 *
1819 * MSR_PKG_C3_RESIDENCY 0x000003f8
1820 * MSR_PKG_C6_RESIDENCY 0x000003f9
1821 * MSR_CORE_C3_RESIDENCY 0x000003fc
1822 * MSR_CORE_C6_RESIDENCY 0x000003fd
1823 *
ee7e38e3
LB		 1824 * Side effect:
1825 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
d7899447 1826 */
ee7e38e3 1827int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 1828{
ee7e38e3 1829 unsigned long long msr;
21ed5574 1830 unsigned int base_ratio;
ee7e38e3
LB		 1831 int *pkg_cstate_limits;
1832
103a8fea
LB		 1833 if (!genuine_intel)
1834 return 0;
1835
1836 if (family != 6)
1837 return 0;
1838
21ed5574
LB		 1839 bclk = discover_bclk(family, model);
1840
103a8fea
LB		 1841 switch (model) {
1842 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1843 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1844 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1845 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1846 case 0x2C: /* Westmere EP - Gulftown */
ee7e38e3
LB		 1847 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1848 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1849 pkg_cstate_limits = nhm_pkg_cstate_limits;
1850 break;
103a8fea
LB		 1851 case 0x2A: /* SNB */
1852 case 0x2D: /* SNB Xeon */
553575f1 1853 case 0x3A: /* IVB */
1300651b 1854 case 0x3E: /* IVB Xeon */
ee7e38e3
LB		 1855 pkg_cstate_limits = snb_pkg_cstate_limits;
1856 break;
70b43400 1857 case 0x3C: /* HSW */
e6f9bb3c 1858 case 0x3F: /* HSX */
70b43400 1859 case 0x45: /* HSW */
149c2319 1860 case 0x46: /* HSW */
4e8e863f 1861 case 0x3D: /* BDW */
48a0631c 1862 case 0x47: /* BDW */
4e8e863f
LB		 1863 case 0x4F: /* BDX */
1864 case 0x56: /* BDX-DE */
0b2bb692
LB		 1865 case 0x4E: /* SKL */
1866 case 0x5E: /* SKL */
ee7e38e3
LB		 1867 pkg_cstate_limits = hsw_pkg_cstate_limits;
1868 break;
1869 case 0x37: /* BYT */
1870 case 0x4D: /* AVN */
1871 pkg_cstate_limits = slv_pkg_cstate_limits;
1872 break;
1873 case 0x4C: /* AMT */
1874 pkg_cstate_limits = amt_pkg_cstate_limits;
1875 break;
1876 case 0x57: /* PHI */
1877 pkg_cstate_limits = phi_pkg_cstate_limits;
1878 break;
103a8fea
LB		 1879 default:
1880 return 0;
1881 }
7ce7d5de 1882 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
e9257f5f 1883 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 1884
ec0adc53 1885 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 1886 base_ratio = (msr >> 8) & 0xFF;
1887
1888 base_hz = base_ratio * bclk * 1000000;
1889 has_base_hz = 1;
ee7e38e3 1890 return 1;
103a8fea 1891}
d7899447
LB		 1892int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1893{
d7899447
LB		 1894 switch (model) {
1895 /* Nehalem compatible, but do not include turbo-ratio limit support */
1896 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1897 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1898 return 0;
1899 default:
1900 return 1;
1901 }
1902}
6574a5d5
LB		 1903int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1904{
1905 if (!genuine_intel)
1906 return 0;
1907
1908 if (family != 6)
1909 return 0;
1910
1911 switch (model) {
1912 case 0x3E: /* IVB Xeon */
fcd17211
LB		 1913 case 0x3F: /* HSW Xeon */
1914 return 1;
1915 default:
1916 return 0;
1917 }
1918}
1919int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1920{
1921 if (!genuine_intel)
1922 return 0;
1923
1924 if (family != 6)
1925 return 0;
1926
1927 switch (model) {
1928 case 0x3F: /* HSW Xeon */
6574a5d5
LB		 1929 return 1;
1930 default:
1931 return 0;
1932 }
1933}
1934
fb5d4327
DC		 1935int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
1936{
1937 if (!genuine_intel)
1938 return 0;
1939
1940 if (family != 6)
1941 return 0;
1942
1943 switch (model) {
1944 case 0x57: /* Knights Landing */
1945 return 1;
1946 default:
1947 return 0;
1948 }
1949}
6fb3143b
LB		 1950int has_config_tdp(unsigned int family, unsigned int model)
1951{
1952 if (!genuine_intel)
1953 return 0;
1954
1955 if (family != 6)
1956 return 0;
1957
1958 switch (model) {
1959 case 0x3A: /* IVB */
6fb3143b
LB		 1960 case 0x3C: /* HSW */
1961 case 0x3F: /* HSX */
1962 case 0x45: /* HSW */
1963 case 0x46: /* HSW */
1964 case 0x3D: /* BDW */
1965 case 0x47: /* BDW */
1966 case 0x4F: /* BDX */
1967 case 0x56: /* BDX-DE */
1968 case 0x4E: /* SKL */
1969 case 0x5E: /* SKL */
1970
1971 case 0x57: /* Knights Landing */
1972 return 1;
1973 default:
1974 return 0;
1975 }
1976}
1977
fcd17211
LB		 1978static void
1979dump_cstate_pstate_config_info(family, model)
1980{
1981 if (!do_nhm_platform_info)
1982 return;
1983
1984 dump_nhm_platform_info();
1985
1986 if (has_hsw_turbo_ratio_limit(family, model))
1987 dump_hsw_turbo_ratio_limits();
1988
1989 if (has_ivt_turbo_ratio_limit(family, model))
1990 dump_ivt_turbo_ratio_limits();
1991
1992 if (has_nhm_turbo_ratio_limit(family, model))
1993 dump_nhm_turbo_ratio_limits();
1994
fb5d4327
DC		 1995 if (has_knl_turbo_ratio_limit(family, model))
1996 dump_knl_turbo_ratio_limits();
1997
6fb3143b
LB		 1998 if (has_config_tdp(family, model))
1999 dump_config_tdp();
2000
fcd17211
LB		 2001 dump_nhm_cst_cfg();
2002}
2003
2004
889facbe
LB		 2005/*
2006 * print_epb()
2007 * Decode the ENERGY_PERF_BIAS MSR
2008 */
2009int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2010{
2011 unsigned long long msr;
2012 char *epb_string;
2013 int cpu;
2014
2015 if (!has_epb)
2016 return 0;
2017
2018 cpu = t->cpu_id;
2019
2020 /* EPB is per-package */
2021 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2022 return 0;
2023
2024 if (cpu_migrate(cpu)) {
2025 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2026 return -1;
2027 }
2028
2029 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2030 return 0;
2031
e9be7dd6 2032 switch (msr & 0xF) {
889facbe
LB		 2033 case ENERGY_PERF_BIAS_PERFORMANCE:
2034 epb_string = "performance";
2035 break;
2036 case ENERGY_PERF_BIAS_NORMAL:
2037 epb_string = "balanced";
2038 break;
2039 case ENERGY_PERF_BIAS_POWERSAVE:
2040 epb_string = "powersave";
2041 break;
2042 default:
2043 epb_string = "custom";
2044 break;
2045 }
2046 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
2047
2048 return 0;
2049}
7f5c258e
LB		 2050/*
2051 * print_hwp()
2052 * Decode the MSR_HWP_CAPABILITIES
2053 */
2054int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2055{
2056 unsigned long long msr;
2057 int cpu;
2058
2059 if (!has_hwp)
2060 return 0;
2061
2062 cpu = t->cpu_id;
2063
2064 /* MSR_HWP_CAPABILITIES is per-package */
2065 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2066 return 0;
2067
2068 if (cpu_migrate(cpu)) {
2069 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2070 return -1;
2071 }
2072
2073 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2074 return 0;
2075
2076 fprintf(stderr, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
2077 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2078
2079 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2080 if ((msr & (1 << 0)) == 0)
2081 return 0;
2082
2083 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2084 return 0;
2085
2086 fprintf(stderr, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
2087 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2088 cpu, msr,
2089 (unsigned int)HWP_HIGHEST_PERF(msr),
2090 (unsigned int)HWP_GUARANTEED_PERF(msr),
2091 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2092 (unsigned int)HWP_LOWEST_PERF(msr));
2093
2094 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2095 return 0;
2096
2097 fprintf(stderr, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
2098 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2099 cpu, msr,
2100 (unsigned int)(((msr) >> 0) & 0xff),
2101 (unsigned int)(((msr) >> 8) & 0xff),
2102 (unsigned int)(((msr) >> 16) & 0xff),
2103 (unsigned int)(((msr) >> 24) & 0xff),
2104 (unsigned int)(((msr) >> 32) & 0xff3),
2105 (unsigned int)(((msr) >> 42) & 0x1));
2106
2107 if (has_hwp_pkg) {
2108 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2109 return 0;
2110
2111 fprintf(stderr, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
2112 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2113 cpu, msr,
2114 (unsigned int)(((msr) >> 0) & 0xff),
2115 (unsigned int)(((msr) >> 8) & 0xff),
2116 (unsigned int)(((msr) >> 16) & 0xff),
2117 (unsigned int)(((msr) >> 24) & 0xff),
2118 (unsigned int)(((msr) >> 32) & 0xff3));
2119 }
2120 if (has_hwp_notify) {
2121 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2122 return 0;
2123
2124 fprintf(stderr, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
2125 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2126 cpu, msr,
2127 ((msr) & 0x1) ? "EN" : "Dis",
2128 ((msr) & 0x2) ? "EN" : "Dis");
2129 }
2130 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2131 return 0;
2132
2133 fprintf(stderr, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
2134 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2135 cpu, msr,
2136 ((msr) & 0x1) ? "" : "No-",
2137 ((msr) & 0x2) ? "" : "No-");
2138
2139 return 0;
2140}
889facbe 2141
3a9a941d
LB		 2142/*
2143 * print_perf_limit()
2144 */
2145int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2146{
2147 unsigned long long msr;
2148 int cpu;
2149
2150 cpu = t->cpu_id;
2151
2152 /* per-package */
2153 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2154 return 0;
2155
2156 if (cpu_migrate(cpu)) {
2157 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2158 return -1;
2159 }
2160
2161 if (do_core_perf_limit_reasons) {
2162 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
2163 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2164 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 2165 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 2166 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 2167 (msr & 1 << 13) ? "Transitions, " : "",
2168 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2169 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2170 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2171 (msr & 1 << 9) ? "CorePwr, " : "",
2172 (msr & 1 << 8) ? "Amps, " : "",
2173 (msr & 1 << 6) ? "VR-Therm, " : "",
2174 (msr & 1 << 5) ? "Auto-HWP, " : "",
2175 (msr & 1 << 4) ? "Graphics, " : "",
2176 (msr & 1 << 2) ? "bit2, " : "",
2177 (msr & 1 << 1) ? "ThermStatus, " : "",
2178 (msr & 1 << 0) ? "PROCHOT, " : "");
3a9a941d 2179 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 2180 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 2181 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 2182 (msr & 1 << 29) ? "Transitions, " : "",
2183 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2184 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2185 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2186 (msr & 1 << 25) ? "CorePwr, " : "",
2187 (msr & 1 << 24) ? "Amps, " : "",
2188 (msr & 1 << 22) ? "VR-Therm, " : "",
2189 (msr & 1 << 21) ? "Auto-HWP, " : "",
2190 (msr & 1 << 20) ? "Graphics, " : "",
2191 (msr & 1 << 18) ? "bit18, " : "",
2192 (msr & 1 << 17) ? "ThermStatus, " : "",
2193 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 2194
2195 }
2196 if (do_gfx_perf_limit_reasons) {
2197 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
2198 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2199 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
2200 (msr & 1 << 0) ? "PROCHOT, " : "",
2201 (msr & 1 << 1) ? "ThermStatus, " : "",
2202 (msr & 1 << 4) ? "Graphics, " : "",
2203 (msr & 1 << 6) ? "VR-Therm, " : "",
2204 (msr & 1 << 8) ? "Amps, " : "",
2205 (msr & 1 << 9) ? "GFXPwr, " : "",
2206 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2207 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2208 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
2209 (msr & 1 << 16) ? "PROCHOT, " : "",
2210 (msr & 1 << 17) ? "ThermStatus, " : "",
2211 (msr & 1 << 20) ? "Graphics, " : "",
2212 (msr & 1 << 22) ? "VR-Therm, " : "",
2213 (msr & 1 << 24) ? "Amps, " : "",
2214 (msr & 1 << 25) ? "GFXPwr, " : "",
2215 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2216 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2217 }
2218 if (do_ring_perf_limit_reasons) {
2219 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
2220 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2221 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
2222 (msr & 1 << 0) ? "PROCHOT, " : "",
2223 (msr & 1 << 1) ? "ThermStatus, " : "",
2224 (msr & 1 << 6) ? "VR-Therm, " : "",
2225 (msr & 1 << 8) ? "Amps, " : "",
2226 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2227 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2228 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
2229 (msr & 1 << 16) ? "PROCHOT, " : "",
2230 (msr & 1 << 17) ? "ThermStatus, " : "",
2231 (msr & 1 << 22) ? "VR-Therm, " : "",
2232 (msr & 1 << 24) ? "Amps, " : "",
2233 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2234 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2235 }
2236 return 0;
2237}
2238
889facbe
LB		 2239#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2240#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2241
144b44b1
LB		 2242double get_tdp(model)
2243{
2244 unsigned long long msr;
2245
2246 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 2247 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 2248 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2249
2250 switch (model) {
2251 case 0x37:
2252 case 0x4D:
2253 return 30.0;
2254 default:
2255 return 135.0;
2256 }
2257}
2258
40ee8e3b
AS		 2259/*
2260 * rapl_dram_energy_units_probe()
2261 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2262 */
2263static double
2264rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2265{
2266 /* only called for genuine_intel, family 6 */
2267
2268 switch (model) {
2269 case 0x3F: /* HSX */
2270 case 0x4F: /* BDX */
2271 case 0x56: /* BDX-DE */
fb5d4327 2272 case 0x57: /* KNL */
40ee8e3b
AS		 2273 return (rapl_dram_energy_units = 15.3 / 1000000);
2274 default:
2275 return (rapl_energy_units);
2276 }
2277}
2278
144b44b1 2279
889facbe
LB		 2280/*
2281 * rapl_probe()
2282 *
144b44b1 2283 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 2284 */
2285void rapl_probe(unsigned int family, unsigned int model)
2286{
2287 unsigned long long msr;
144b44b1 2288 unsigned int time_unit;
889facbe
LB		 2289 double tdp;
2290
2291 if (!genuine_intel)
2292 return;
2293
2294 if (family != 6)
2295 return;
2296
2297 switch (model) {
2298 case 0x2A:
2299 case 0x3A:
70b43400 2300 case 0x3C: /* HSW */
70b43400 2301 case 0x45: /* HSW */
149c2319 2302 case 0x46: /* HSW */
4e8e863f 2303 case 0x3D: /* BDW */
48a0631c 2304 case 0x47: /* BDW */
144b44b1 2305 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 2306 break;
0b2bb692
LB		 2307 case 0x4E: /* SKL */
2308 case 0x5E: /* SKL */
2309 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2310 break;
e6f9bb3c 2311 case 0x3F: /* HSX */
4e8e863f
LB		 2312 case 0x4F: /* BDX */
2313 case 0x56: /* BDX-DE */
fb5d4327 2314 case 0x57: /* KNL */
0b2bb692 2315 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
e6f9bb3c 2316 break;
889facbe
LB		 2317 case 0x2D:
2318 case 0x3E:
0b2bb692 2319 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
144b44b1
LB		 2320 break;
2321 case 0x37: /* BYT */
2322 case 0x4D: /* AVN */
2323 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 2324 break;
2325 default:
2326 return;
2327 }
2328
2329 /* units on package 0, verify later other packages match */
7ce7d5de 2330 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 2331 return;
2332
2333 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 2334 if (model == 0x37)
2335 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2336 else
2337 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 2338
40ee8e3b
AS		 2339 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2340
144b44b1
LB		 2341 time_unit = msr >> 16 & 0xF;
2342 if (time_unit == 0)
2343 time_unit = 0xA;
889facbe 2344
144b44b1 2345 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 2346
144b44b1 2347 tdp = get_tdp(model);
889facbe 2348
144b44b1 2349 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
d8af6f5f 2350 if (debug)
144b44b1 2351 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 2352
2353 return;
2354}
2355
3a9a941d
LB		 2356void perf_limit_reasons_probe(family, model)
2357{
2358 if (!genuine_intel)
2359 return;
2360
2361 if (family != 6)
2362 return;
2363
2364 switch (model) {
2365 case 0x3C: /* HSW */
2366 case 0x45: /* HSW */
2367 case 0x46: /* HSW */
2368 do_gfx_perf_limit_reasons = 1;
2369 case 0x3F: /* HSX */
2370 do_core_perf_limit_reasons = 1;
2371 do_ring_perf_limit_reasons = 1;
2372 default:
2373 return;
2374 }
2375}
2376
889facbe
LB		 2377int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2378{
2379 unsigned long long msr;
2380 unsigned int dts;
2381 int cpu;
2382
2383 if (!(do_dts || do_ptm))
2384 return 0;
2385
2386 cpu = t->cpu_id;
2387
2388 /* DTS is per-core, no need to print for each thread */
2389 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2390 return 0;
2391
2392 if (cpu_migrate(cpu)) {
2393 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2394 return -1;
2395 }
2396
2397 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2398 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2399 return 0;
2400
2401 dts = (msr >> 16) & 0x7F;
2402 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2403 cpu, msr, tcc_activation_temp - dts);
2404
2405#ifdef THERM_DEBUG
2406 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2407 return 0;
2408
2409 dts = (msr >> 16) & 0x7F;
2410 dts2 = (msr >> 8) & 0x7F;
2411 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2412 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2413#endif
2414 }
2415
2416
2417 if (do_dts) {
2418 unsigned int resolution;
2419
2420 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2421 return 0;
2422
2423 dts = (msr >> 16) & 0x7F;
2424 resolution = (msr >> 27) & 0xF;
2425 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2426 cpu, msr, tcc_activation_temp - dts, resolution);
2427
2428#ifdef THERM_DEBUG
2429 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2430 return 0;
2431
2432 dts = (msr >> 16) & 0x7F;
2433 dts2 = (msr >> 8) & 0x7F;
2434 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2435 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2436#endif
2437 }
2438
2439 return 0;
2440}
2441
2442void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2443{
2444 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2445 cpu, label,
2446 ((msr >> 15) & 1) ? "EN" : "DIS",
2447 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2448 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2449 (((msr >> 16) & 1) ? "EN" : "DIS"));
2450
2451 return;
2452}
2453
2454int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2455{
2456 unsigned long long msr;
2457 int cpu;
889facbe
LB		 2458
2459 if (!do_rapl)
2460 return 0;
2461
2462 /* RAPL counters are per package, so print only for 1st thread/package */
2463 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2464 return 0;
2465
2466 cpu = t->cpu_id;
2467 if (cpu_migrate(cpu)) {
2468 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2469 return -1;
2470 }
2471
2472 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2473 return -1;
2474
d8af6f5f 2475 if (debug) {
889facbe
LB		 2476 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2477 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 2478 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 2479 }
144b44b1
LB		 2480 if (do_rapl & RAPL_PKG_POWER_INFO) {
2481
889facbe
LB		 2482 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2483 return -5;
2484
2485
2486 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2487 cpu, msr,
2488 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2489 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2490 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2491 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2492
144b44b1
LB		 2493 }
2494 if (do_rapl & RAPL_PKG) {
2495
889facbe
LB		 2496 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2497 return -9;
2498
2499 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2500 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2501
2502 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2503 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2504 cpu,
2505 ((msr >> 47) & 1) ? "EN" : "DIS",
2506 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2507 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2508 ((msr >> 48) & 1) ? "EN" : "DIS");
2509 }
2510
0b2bb692 2511 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 2512 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2513 return -6;
2514
889facbe
LB		 2515 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2516 cpu, msr,
2517 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2518 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2519 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2520 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 2521 }
2522 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 2523 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2524 return -9;
2525 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2526 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2527
2528 print_power_limit_msr(cpu, msr, "DRAM Limit");
2529 }
144b44b1 2530 if (do_rapl & RAPL_CORE_POLICY) {
d8af6f5f 2531 if (debug) {
889facbe
LB		 2532 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2533 return -7;
2534
2535 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 2536 }
2537 }
2538 if (do_rapl & RAPL_CORES) {
d8af6f5f 2539 if (debug) {
889facbe
LB		 2540
2541 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2542 return -9;
2543 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2544 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2545 print_power_limit_msr(cpu, msr, "Cores Limit");
2546 }
2547 }
2548 if (do_rapl & RAPL_GFX) {
d8af6f5f 2549 if (debug) {
889facbe
LB		 2550 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2551 return -8;
2552
2553 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2554
2555 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2556 return -9;
2557 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2558 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2559 print_power_limit_msr(cpu, msr, "GFX Limit");
2560 }
2561 }
2562 return 0;
2563}
2564
d7899447
LB		 2565/*
2566 * SNB adds support for additional MSRs:
2567 *
2568 * MSR_PKG_C7_RESIDENCY 0x000003fa
2569 * MSR_CORE_C7_RESIDENCY 0x000003fe
2570 * MSR_PKG_C2_RESIDENCY 0x0000060d
2571 */
103a8fea 2572
d7899447 2573int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2574{
2575 if (!genuine_intel)
2576 return 0;
2577
2578 switch (model) {
2579 case 0x2A:
2580 case 0x2D:
650a37f3 2581 case 0x3A: /* IVB */
1300651b 2582 case 0x3E: /* IVB Xeon */
70b43400
LB		 2583 case 0x3C: /* HSW */
2584 case 0x3F: /* HSW */
2585 case 0x45: /* HSW */
149c2319 2586 case 0x46: /* HSW */
4e8e863f 2587 case 0x3D: /* BDW */
48a0631c 2588 case 0x47: /* BDW */
4e8e863f
LB		 2589 case 0x4F: /* BDX */
2590 case 0x56: /* BDX-DE */
0b2bb692
LB		 2591 case 0x4E: /* SKL */
2592 case 0x5E: /* SKL */
103a8fea
LB		 2593 return 1;
2594 }
2595 return 0;
2596}
2597
d7899447
LB		 2598/*
2599 * HSW adds support for additional MSRs:
2600 *
2601 * MSR_PKG_C8_RESIDENCY 0x00000630
2602 * MSR_PKG_C9_RESIDENCY 0x00000631
2603 * MSR_PKG_C10_RESIDENCY 0x00000632
2604 */
2605int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2606{
2607 if (!genuine_intel)
2608 return 0;
2609
2610 switch (model) {
4e8e863f
LB		 2611 case 0x45: /* HSW */
2612 case 0x3D: /* BDW */
0b2bb692
LB		 2613 case 0x4E: /* SKL */
2614 case 0x5E: /* SKL */
2615 return 1;
2616 }
2617 return 0;
2618}
2619
2620/*
2621 * SKL adds support for additional MSRS:
2622 *
2623 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2624 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2625 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2626 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2627 */
2628int has_skl_msrs(unsigned int family, unsigned int model)
2629{
2630 if (!genuine_intel)
2631 return 0;
2632
2633 switch (model) {
2634 case 0x4E: /* SKL */
2635 case 0x5E: /* SKL */
ca58710f
KCA		 2636 return 1;
2637 }
2638 return 0;
2639}
2640
2641
0b2bb692 2642
144b44b1
LB		 2643int is_slm(unsigned int family, unsigned int model)
2644{
2645 if (!genuine_intel)
2646 return 0;
2647 switch (model) {
2648 case 0x37: /* BYT */
2649 case 0x4D: /* AVN */
2650 return 1;
2651 }
2652 return 0;
2653}
2654
fb5d4327
DC		 2655int is_knl(unsigned int family, unsigned int model)
2656{
2657 if (!genuine_intel)
2658 return 0;
2659 switch (model) {
2660 case 0x57: /* KNL */
2661 return 1;
2662 }
2663 return 0;
2664}
2665
b2b34dfe
HC		 2666unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2667{
2668 if (is_knl(family, model))
2669 return 1024;
2670 return 1;
2671}
2672
144b44b1
LB		 2673#define SLM_BCLK_FREQS 5
2674double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2675
2676double slm_bclk(void)
2677{
2678 unsigned long long msr = 3;
2679 unsigned int i;
2680 double freq;
2681
7ce7d5de 2682 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
144b44b1
LB		 2683 fprintf(stderr, "SLM BCLK: unknown\n");
2684
2685 i = msr & 0xf;
2686 if (i >= SLM_BCLK_FREQS) {
2687 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2688 msr = 3;
2689 }
2690 freq = slm_freq_table[i];
2691
2692 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2693
2694 return freq;
2695}
2696
103a8fea
LB		 2697double discover_bclk(unsigned int family, unsigned int model)
2698{
d7899447 2699 if (has_snb_msrs(family, model))
103a8fea 2700 return 100.00;
144b44b1
LB		 2701 else if (is_slm(family, model))
2702 return slm_bclk();
103a8fea
LB		 2703 else
2704 return 133.33;
2705}
2706
889facbe
LB		 2707/*
2708 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2709 * the Thermal Control Circuit (TCC) activates.
2710 * This is usually equal to tjMax.
2711 *
2712 * Older processors do not have this MSR, so there we guess,
2713 * but also allow cmdline over-ride with -T.
2714 *
2715 * Several MSR temperature values are in units of degrees-C
2716 * below this value, including the Digital Thermal Sensor (DTS),
2717 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2718 */
2719int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2720{
2721 unsigned long long msr;
2722 unsigned int target_c_local;
2723 int cpu;
2724
2725 /* tcc_activation_temp is used only for dts or ptm */
2726 if (!(do_dts || do_ptm))
2727 return 0;
2728
2729 /* this is a per-package concept */
2730 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2731 return 0;
2732
2733 cpu = t->cpu_id;
2734 if (cpu_migrate(cpu)) {
2735 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2736 return -1;
2737 }
2738
2739 if (tcc_activation_temp_override != 0) {
2740 tcc_activation_temp = tcc_activation_temp_override;
2741 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2742 cpu, tcc_activation_temp);
2743 return 0;
2744 }
2745
2746 /* Temperature Target MSR is Nehalem and newer only */
d7899447 2747 if (!do_nhm_platform_info)
889facbe
LB		 2748 goto guess;
2749
7ce7d5de 2750 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 2751 goto guess;
2752
3482124a 2753 target_c_local = (msr >> 16) & 0xFF;
889facbe 2754
d8af6f5f 2755 if (debug)
889facbe
LB		 2756 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2757 cpu, msr, target_c_local);
2758
3482124a 2759 if (!target_c_local)
889facbe
LB		 2760 goto guess;
2761
2762 tcc_activation_temp = target_c_local;
2763
2764 return 0;
2765
2766guess:
2767 tcc_activation_temp = TJMAX_DEFAULT;
2768 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2769 cpu, tcc_activation_temp);
2770
2771 return 0;
2772}
69807a63
LB		 2773
2774void decode_misc_enable_msr(void)
2775{
2776 unsigned long long msr;
2777
2778 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
2779 fprintf(stderr, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
2780 base_cpu, msr,
2781 msr & (1 << 3) ? "TCC" : "",
2782 msr & (1 << 16) ? "EIST" : "",
2783 msr & (1 << 18) ? "MONITOR" : "");
2784}
2785
f0057310
LB		 2786/*
2787 * Decode MSR_MISC_PWR_MGMT
2788 *
2789 * Decode the bits according to the Nehalem documentation
2790 * bit[0] seems to continue to have same meaning going forward
2791 * bit[1] less so...
2792 */
2793void decode_misc_pwr_mgmt_msr(void)
2794{
2795 unsigned long long msr;
2796
2797 if (!do_nhm_platform_info)
2798 return;
2799
2800 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
2801 fprintf(stderr, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
2802 base_cpu, msr,
2803 msr & (1 << 0) ? "DIS" : "EN",
2804 msr & (1 << 1) ? "EN" : "DIS");
2805}
7f5c258e 2806
fcd17211 2807void process_cpuid()
103a8fea 2808{
61a87ba7 2809 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
103a8fea
LB		 2810 unsigned int fms, family, model, stepping;
2811
2812 eax = ebx = ecx = edx = 0;
2813
2b92865e 2814 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
103a8fea
LB		 2815
2816 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2817 genuine_intel = 1;
2818
d8af6f5f 2819 if (debug)
889facbe 2820 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 2821 (char *)&ebx, (char *)&edx, (char *)&ecx);
2822
2b92865e 2823 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
103a8fea
LB		 2824 family = (fms >> 8) & 0xf;
2825 model = (fms >> 4) & 0xf;
2826 stepping = fms & 0xf;
2827 if (family == 6 || family == 0xf)
2828 model += ((fms >> 16) & 0xf) << 4;
2829
69807a63 2830 if (debug) {
103a8fea
LB		 2831 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2832 max_level, family, model, stepping, family, model, stepping);
69807a63
LB		 2833 fprintf(stderr, "CPUID(1): %s %s %s %s %s %s %s %s\n",
2834 ecx & (1 << 0) ? "SSE3" : "-",
2835 ecx & (1 << 3) ? "MONITOR" : "-",
2836 ecx & (1 << 7) ? "EIST" : "-",
2837 ecx & (1 << 8) ? "TM2" : "-",
2838 edx & (1 << 4) ? "TSC" : "-",
2839 edx & (1 << 5) ? "MSR" : "-",
2840 edx & (1 << 22) ? "ACPI-TM" : "-",
2841 edx & (1 << 29) ? "TM" : "-");
2842 }
103a8fea 2843
b2c95d90
JT		 2844 if (!(edx & (1 << 5)))
2845 errx(1, "CPUID: no MSR");
103a8fea
LB		 2846
2847 /*
2848 * check max extended function levels of CPUID.
2849 * This is needed to check for invariant TSC.
2850 * This check is valid for both Intel and AMD.
2851 */
2852 ebx = ecx = edx = 0;
61a87ba7 2853 __get_cpuid(0x80000000, &max_extended_level, &ebx, &ecx, &edx);
103a8fea 2854
61a87ba7 2855 if (max_extended_level >= 0x80000007) {
103a8fea 2856
d7899447
LB		 2857 /*
2858 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2859 * this check is valid for both Intel and AMD
2860 */
2861 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2862 has_invariant_tsc = edx & (1 << 8);
2863 }
103a8fea
LB		 2864
2865 /*
2866 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2867 * this check is valid for both Intel and AMD
2868 */
2869
2b92865e 2870 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
8209e054 2871 has_aperf = ecx & (1 << 0);
889facbe
LB		 2872 do_dts = eax & (1 << 0);
2873 do_ptm = eax & (1 << 6);
7f5c258e
LB		 2874 has_hwp = eax & (1 << 7);
2875 has_hwp_notify = eax & (1 << 8);
2876 has_hwp_activity_window = eax & (1 << 9);
2877 has_hwp_epp = eax & (1 << 10);
2878 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 2879 has_epb = ecx & (1 << 3);
2880
d8af6f5f 2881 if (debug)
7f5c258e
LB		 2882 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
2883 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
2884 has_aperf ? "" : "No-",
2885 do_dts ? "" : "No-",
2886 do_ptm ? "" : "No-",
2887 has_hwp ? "" : "No-",
2888 has_hwp_notify ? "" : "No-",
2889 has_hwp_activity_window ? "" : "No-",
2890 has_hwp_epp ? "" : "No-",
2891 has_hwp_pkg ? "" : "No-",
2892 has_epb ? "" : "No-");
103a8fea 2893
69807a63
LB		 2894 if (debug)
2895 decode_misc_enable_msr();
2896
61a87ba7 2897 if (max_level >= 0x15) {
8a5bdf41
LB		 2898 unsigned int eax_crystal;
2899 unsigned int ebx_tsc;
2900
2901 /*
2902 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
2903 */
2904 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
2905 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
2906
2907 if (ebx_tsc != 0) {
2908
2909 if (debug && (ebx != 0))
2910 fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
2911 eax_crystal, ebx_tsc, crystal_hz);
2912
2913 if (crystal_hz == 0)
2914 switch(model) {
2915 case 0x4E: /* SKL */
2916 case 0x5E: /* SKL */
2917 crystal_hz = 24000000; /* 24 MHz */
2918 break;
2919 default:
2920 crystal_hz = 0;
2921 }
2922
2923 if (crystal_hz) {
2924 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
2925 if (debug)
2926 fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
2927 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
2928 }
2929 }
2930 }
61a87ba7
LB		 2931 if (max_level >= 0x16) {
2932 unsigned int base_mhz, max_mhz, bus_mhz, edx;
2933
2934 /*
2935 * CPUID 16H Base MHz, Max MHz, Bus MHz
2936 */
2937 base_mhz = max_mhz = bus_mhz = edx = 0;
2938
2939 __get_cpuid(0x16, &base_mhz, &max_mhz, &bus_mhz, &edx);
2940 if (debug)
2941 fprintf(stderr, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
2942 base_mhz, max_mhz, bus_mhz);
2943 }
8a5bdf41 2944
b2b34dfe
HC		 2945 if (has_aperf)
2946 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
2947
ee7e38e3 2948 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
d7899447 2949 do_snb_cstates = has_snb_msrs(family, model);
ee7e38e3
LB		 2950 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2951 do_pc3 = (pkg_cstate_limit >= PCL__3);
2952 do_pc6 = (pkg_cstate_limit >= PCL__6);
2953 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
d7899447 2954 do_c8_c9_c10 = has_hsw_msrs(family, model);
0b2bb692 2955 do_skl_residency = has_skl_msrs(family, model);
144b44b1 2956 do_slm_cstates = is_slm(family, model);
fb5d4327 2957 do_knl_cstates = is_knl(family, model);
103a8fea 2958
f0057310
LB		 2959 if (debug)
2960 decode_misc_pwr_mgmt_msr();
2961
889facbe 2962 rapl_probe(family, model);
3a9a941d 2963 perf_limit_reasons_probe(family, model);
889facbe 2964
fcd17211
LB		 2965 if (debug)
2966 dump_cstate_pstate_config_info();
2967
a2b7b749
LB		 2968 if (has_skl_msrs(family, model))
2969 calculate_tsc_tweak();
2970
889facbe 2971 return;
103a8fea
LB		 2972}
2973
d8af6f5f 2974void help()
103a8fea 2975{
d8af6f5f
LB		 2976 fprintf(stderr,
2977 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2978 "\n"
2979 "Turbostat forks the specified COMMAND and prints statistics\n"
2980 "when COMMAND completes.\n"
2981 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2982 "to print statistics, until interrupted.\n"
2983 "--debug run in \"debug\" mode\n"
2984 "--interval sec Override default 5-second measurement interval\n"
2985 "--help print this help message\n"
2986 "--counter msr print 32-bit counter at address \"msr\"\n"
2987 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2988 "--msr msr print 32-bit value at address \"msr\"\n"
2989 "--MSR msr print 64-bit Value at address \"msr\"\n"
2990 "--version print version information\n"
2991 "\n"
2992 "For more help, run \"man turbostat\"\n");
103a8fea
LB		 2993}
2994
2995
2996/*
2997 * in /dev/cpu/ return success for names that are numbers
2998 * ie. filter out ".", "..", "microcode".
2999 */
3000int dir_filter(const struct dirent *dirp)
3001{
3002 if (isdigit(dirp->d_name[0]))
3003 return 1;
3004 else
3005 return 0;
3006}
3007
3008int open_dev_cpu_msr(int dummy1)
3009{
3010 return 0;
3011}
3012
c98d5d94
LB		 3013void topology_probe()
3014{
3015 int i;
3016 int max_core_id = 0;
3017 int max_package_id = 0;
3018 int max_siblings = 0;
3019 struct cpu_topology {
3020 int core_id;
3021 int physical_package_id;
3022 } *cpus;
3023
3024 /* Initialize num_cpus, max_cpu_num */
3025 topo.num_cpus = 0;
3026 topo.max_cpu_num = 0;
3027 for_all_proc_cpus(count_cpus);
3028 if (!summary_only && topo.num_cpus > 1)
3029 show_cpu = 1;
3030
d8af6f5f 3031 if (debug > 1)
c98d5d94
LB		 3032 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
3033
3034 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 3035 if (cpus == NULL)
3036 err(1, "calloc cpus");
c98d5d94
LB		 3037
3038 /*
3039 * Allocate and initialize cpu_present_set
3040 */
3041 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 3042 if (cpu_present_set == NULL)
3043 err(3, "CPU_ALLOC");
c98d5d94
LB		 3044 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3045 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3046 for_all_proc_cpus(mark_cpu_present);
3047
3048 /*
3049 * Allocate and initialize cpu_affinity_set
3050 */
3051 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 3052 if (cpu_affinity_set == NULL)
3053 err(3, "CPU_ALLOC");
c98d5d94
LB		 3054 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3055 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3056
3057
3058 /*
3059 * For online cpus
3060 * find max_core_id, max_package_id
3061 */
3062 for (i = 0; i <= topo.max_cpu_num; ++i) {
3063 int siblings;
3064
3065 if (cpu_is_not_present(i)) {
d8af6f5f 3066 if (debug > 1)
c98d5d94
LB		 3067 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
3068 continue;
3069 }
3070 cpus[i].core_id = get_core_id(i);
3071 if (cpus[i].core_id > max_core_id)
3072 max_core_id = cpus[i].core_id;
3073
3074 cpus[i].physical_package_id = get_physical_package_id(i);
3075 if (cpus[i].physical_package_id > max_package_id)
3076 max_package_id = cpus[i].physical_package_id;
3077
3078 siblings = get_num_ht_siblings(i);
3079 if (siblings > max_siblings)
3080 max_siblings = siblings;
d8af6f5f 3081 if (debug > 1)
c98d5d94
LB		 3082 fprintf(stderr, "cpu %d pkg %d core %d\n",
3083 i, cpus[i].physical_package_id, cpus[i].core_id);
3084 }
3085 topo.num_cores_per_pkg = max_core_id + 1;
d8af6f5f 3086 if (debug > 1)
c98d5d94
LB		 3087 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
3088 max_core_id, topo.num_cores_per_pkg);
1cc21f7b 3089 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
c98d5d94
LB		 3090 show_core = 1;
3091
3092 topo.num_packages = max_package_id + 1;
d8af6f5f 3093 if (debug > 1)
c98d5d94
LB		 3094 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
3095 max_package_id, topo.num_packages);
1cc21f7b 3096 if (debug && !summary_only && topo.num_packages > 1)
c98d5d94
LB		 3097 show_pkg = 1;
3098
3099 topo.num_threads_per_core = max_siblings;
d8af6f5f 3100 if (debug > 1)
c98d5d94
LB		 3101 fprintf(stderr, "max_siblings %d\n", max_siblings);
3102
3103 free(cpus);
3104}
3105
3106void
3107allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3108{
3109 int i;
3110
3111 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3112 topo.num_packages, sizeof(struct thread_data));
3113 if (*t == NULL)
3114 goto error;
3115
3116 for (i = 0; i < topo.num_threads_per_core *
3117 topo.num_cores_per_pkg * topo.num_packages; i++)
3118 (*t)[i].cpu_id = -1;
3119
3120 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3121 sizeof(struct core_data));
3122 if (*c == NULL)
3123 goto error;
3124
3125 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3126 (*c)[i].core_id = -1;
3127
3128 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3129 if (*p == NULL)
3130 goto error;
3131
3132 for (i = 0; i < topo.num_packages; i++)
3133 (*p)[i].package_id = i;
3134
3135 return;
3136error:
b2c95d90 3137 err(1, "calloc counters");
c98d5d94
LB		 3138}
3139/*
3140 * init_counter()
3141 *
3142 * set cpu_id, core_num, pkg_num
3143 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3144 *
3145 * increment topo.num_cores when 1st core in pkg seen
3146 */
3147void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3148 struct pkg_data *pkg_base, int thread_num, int core_num,
3149 int pkg_num, int cpu_id)
3150{
3151 struct thread_data *t;
3152 struct core_data *c;
3153 struct pkg_data *p;
3154
3155 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3156 c = GET_CORE(core_base, core_num, pkg_num);
3157 p = GET_PKG(pkg_base, pkg_num);
3158
3159 t->cpu_id = cpu_id;
3160 if (thread_num == 0) {
3161 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3162 if (cpu_is_first_core_in_package(cpu_id))
3163 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3164 }
3165
3166 c->core_id = core_num;
3167 p->package_id = pkg_num;
3168}
3169
3170
3171int initialize_counters(int cpu_id)
3172{
3173 int my_thread_id, my_core_id, my_package_id;
3174
3175 my_package_id = get_physical_package_id(cpu_id);
3176 my_core_id = get_core_id(cpu_id);
e275b388
DC		 3177 my_thread_id = get_cpu_position_in_core(cpu_id);
3178 if (!my_thread_id)
c98d5d94 3179 topo.num_cores++;
c98d5d94
LB		 3180
3181 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3182 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3183 return 0;
3184}
3185
3186void allocate_output_buffer()
3187{
3b4d5c7f 3188 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 3189 outp = output_buffer;
b2c95d90
JT		 3190 if (outp == NULL)
3191 err(-1, "calloc output buffer");
c98d5d94
LB		 3192}
3193
3194void setup_all_buffers(void)
3195{
3196 topology_probe();
3197 allocate_counters(&thread_even, &core_even, &package_even);
3198 allocate_counters(&thread_odd, &core_odd, &package_odd);
3199 allocate_output_buffer();
3200 for_all_proc_cpus(initialize_counters);
3201}
3b4d5c7f 3202
7ce7d5de
PB		 3203void set_base_cpu(void)
3204{
3205 base_cpu = sched_getcpu();
3206 if (base_cpu < 0)
3207 err(-ENODEV, "No valid cpus found");
3208
3209 if (debug > 1)
3210 fprintf(stderr, "base_cpu = %d\n", base_cpu);
3211}
3212
103a8fea
LB		 3213void turbostat_init()
3214{
7ce7d5de
PB		 3215 setup_all_buffers();
3216 set_base_cpu();
103a8fea 3217 check_dev_msr();
98481e79 3218 check_permissions();
fcd17211 3219 process_cpuid();
103a8fea 3220
103a8fea 3221
7f5c258e
LB		 3222 if (debug)
3223 for_all_cpus(print_hwp, ODD_COUNTERS);
3224
d8af6f5f 3225 if (debug)
889facbe
LB		 3226 for_all_cpus(print_epb, ODD_COUNTERS);
3227
d8af6f5f 3228 if (debug)
3a9a941d
LB		 3229 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3230
d8af6f5f 3231 if (debug)
889facbe
LB		 3232 for_all_cpus(print_rapl, ODD_COUNTERS);
3233
3234 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3235
d8af6f5f 3236 if (debug)
889facbe 3237 for_all_cpus(print_thermal, ODD_COUNTERS);
103a8fea
LB		 3238}
3239
3240int fork_it(char **argv)
3241{
103a8fea 3242 pid_t child_pid;
d91bb17c 3243 int status;
d15cf7c1 3244
d91bb17c
LB		 3245 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3246 if (status)
3247 exit(status);
c98d5d94
LB		 3248 /* clear affinity side-effect of get_counters() */
3249 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 3250 gettimeofday(&tv_even, (struct timezone *)NULL);
3251
3252 child_pid = fork();
3253 if (!child_pid) {
3254 /* child */
3255 execvp(argv[0], argv);
3256 } else {
103a8fea
LB		 3257
3258 /* parent */
b2c95d90
JT		 3259 if (child_pid == -1)
3260 err(1, "fork");
103a8fea
LB		 3261
3262 signal(SIGINT, SIG_IGN);
3263 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 3264 if (waitpid(child_pid, &status, 0) == -1)
3265 err(status, "waitpid");
103a8fea 3266 }
c98d5d94
LB		 3267 /*
3268 * n.b. fork_it() does not check for errors from for_all_cpus()
3269 * because re-starting is problematic when forking
3270 */
3271 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 3272 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3273 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 3274 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3275 compute_average(EVEN_COUNTERS);
3276 format_all_counters(EVEN_COUNTERS);
3277 flush_stderr();
103a8fea 3278
6eab04a8 3279 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
103a8fea 3280
d91bb17c 3281 return status;
103a8fea
LB		 3282}
3283
3b4d5c7f
AS		 3284int get_and_dump_counters(void)
3285{
3286 int status;
3287
3288 status = for_all_cpus(get_counters, ODD_COUNTERS);
3289 if (status)
3290 return status;
3291
3292 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3293 if (status)
3294 return status;
3295
3296 flush_stdout();
3297
3298 return status;
3299}
3300
d8af6f5f 3301void print_version() {
7f5c258e 3302 fprintf(stderr, "turbostat version 4.10 10 Dec, 2015"
d8af6f5f
LB		 3303 " - Len Brown <lenb@kernel.org>\n");
3304}
3305
103a8fea
LB		 3306void cmdline(int argc, char **argv)
3307{
3308 int opt;
d8af6f5f
LB		 3309 int option_index = 0;
3310 static struct option long_options[] = {
3311 {"Counter", required_argument, 0, 'C'},
3312 {"counter", required_argument, 0, 'c'},
3313 {"Dump", no_argument, 0, 'D'},
3314 {"debug", no_argument, 0, 'd'},
3315 {"interval", required_argument, 0, 'i'},
3316 {"help", no_argument, 0, 'h'},
3317 {"Joules", no_argument, 0, 'J'},
3318 {"MSR", required_argument, 0, 'M'},
3319 {"msr", required_argument, 0, 'm'},
3320 {"Package", no_argument, 0, 'p'},
3321 {"processor", no_argument, 0, 'p'},
3322 {"Summary", no_argument, 0, 'S'},
3323 {"TCC", required_argument, 0, 'T'},
3324 {"version", no_argument, 0, 'v' },
3325 {0, 0, 0, 0 }
3326 };
103a8fea
LB		 3327
3328 progname = argv[0];
3329
a01e72fb 3330 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:PpST:v",
d8af6f5f 3331 long_options, &option_index)) != -1) {
103a8fea 3332 switch (opt) {
d8af6f5f
LB		 3333 case 'C':
3334 sscanf(optarg, "%x", &extra_delta_offset64);
c98d5d94 3335 break;
d8af6f5f
LB		 3336 case 'c':
3337 sscanf(optarg, "%x", &extra_delta_offset32);
c98d5d94 3338 break;
d8af6f5f 3339 case 'D':
3b4d5c7f
AS		 3340 dump_only++;
3341 break;
d8af6f5f
LB		 3342 case 'd':
3343 debug++;
103a8fea 3344 break;
d8af6f5f
LB		 3345 case 'h':
3346 default:
3347 help();
3348 exit(1);
103a8fea
LB		 3349 case 'i':
3350 interval_sec = atoi(optarg);
3351 break;
d8af6f5f
LB		 3352 case 'J':
3353 rapl_joules++;
8e180f3c 3354 break;
d8af6f5f
LB		 3355 case 'M':
3356 sscanf(optarg, "%x", &extra_msr_offset64);
8e180f3c 3357 break;
2f32edf1
LB		 3358 case 'm':
3359 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 3360 break;
d8af6f5f
LB		 3361 case 'P':
3362 show_pkg_only++;
3363 break;
3364 case 'p':
3365 show_core_only++;
103a8fea 3366 break;
d8af6f5f
LB		 3367 case 'S':
3368 summary_only++;
889facbe
LB		 3369 break;
3370 case 'T':
3371 tcc_activation_temp_override = atoi(optarg);
3372 break;
d8af6f5f
LB		 3373 case 'v':
3374 print_version();
3375 exit(0);
5c56be9a 3376 break;
103a8fea
LB		 3377 }
3378 }
3379}
3380
3381int main(int argc, char **argv)
3382{
3383 cmdline(argc, argv);
3384
d8af6f5f
LB		 3385 if (debug)
3386 print_version();
103a8fea
LB		 3387
3388 turbostat_init();
3389
3b4d5c7f
AS		 3390 /* dump counters and exit */
3391 if (dump_only)
3392 return get_and_dump_counters();
3393
103a8fea
LB		 3394 /*
3395 * if any params left, it must be a command to fork
3396 */
3397 if (argc - optind)
3398 return fork_it(argv + optind);
3399 else
3400 turbostat_loop();
3401
3402 return 0;
3403}
Linux 6.x block layer and io_uring tree(s)