Commit | Line | Data |
---|---|---|
a61127c2 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
103a8fea LB |
2 | /* |
3 | * turbostat -- show CPU frequency and C-state residency | |
34041551 | 4 | * on modern Intel and AMD processors. |
103a8fea | 5 | * |
144b44b1 | 6 | * Copyright (c) 2013 Intel Corporation. |
103a8fea | 7 | * Len Brown <len.brown@intel.com> |
103a8fea LB |
8 | */ |
9 | ||
88c3281f | 10 | #define _GNU_SOURCE |
b731f311 | 11 | #include MSRHEADER |
869ce69e | 12 | #include INTEL_FAMILY_HEADER |
95aebc44 | 13 | #include <stdarg.h> |
103a8fea | 14 | #include <stdio.h> |
b2c95d90 | 15 | #include <err.h> |
103a8fea LB |
16 | #include <unistd.h> |
17 | #include <sys/types.h> | |
18 | #include <sys/wait.h> | |
19 | #include <sys/stat.h> | |
b9ad8ee0 | 20 | #include <sys/select.h> |
103a8fea LB |
21 | #include <sys/resource.h> |
22 | #include <fcntl.h> | |
23 | #include <signal.h> | |
24 | #include <sys/time.h> | |
25 | #include <stdlib.h> | |
d8af6f5f | 26 | #include <getopt.h> |
103a8fea LB |
27 | #include <dirent.h> |
28 | #include <string.h> | |
29 | #include <ctype.h> | |
88c3281f | 30 | #include <sched.h> |
2a0609c0 | 31 | #include <time.h> |
2b92865e | 32 | #include <cpuid.h> |
98481e79 LB |
33 | #include <linux/capability.h> |
34 | #include <errno.h> | |
9392bd98 | 35 | #include <math.h> |
103a8fea | 36 | |
103a8fea | 37 | char *proc_stat = "/proc/stat"; |
b7d8c148 | 38 | FILE *outf; |
36229897 | 39 | int *fd_percpu; |
b9ad8ee0 | 40 | struct timeval interval_tv = {5, 0}; |
47936f94 | 41 | struct timespec interval_ts = {5, 0}; |
023fe0ac | 42 | unsigned int num_iterations; |
d8af6f5f | 43 | unsigned int debug; |
96e47158 | 44 | unsigned int quiet; |
3f44a5c6 | 45 | unsigned int shown; |
0de6c0df | 46 | unsigned int sums_need_wide_columns; |
d8af6f5f LB |
47 | unsigned int rapl_joules; |
48 | unsigned int summary_only; | |
c8ade361 | 49 | unsigned int list_header_only; |
d8af6f5f | 50 | unsigned int dump_only; |
103a8fea | 51 | unsigned int do_snb_cstates; |
fb5d4327 | 52 | unsigned int do_knl_cstates; |
144b44b1 LB |
53 | unsigned int do_slm_cstates; |
54 | unsigned int use_c1_residency_msr; | |
103a8fea | 55 | unsigned int has_aperf; |
889facbe | 56 | unsigned int has_epb; |
5a63426e LB |
57 | unsigned int do_irtl_snb; |
58 | unsigned int do_irtl_hsw; | |
fc04cc67 | 59 | unsigned int units = 1000000; /* MHz etc */ |
103a8fea | 60 | unsigned int genuine_intel; |
34041551 | 61 | unsigned int authentic_amd; |
c1c10cc7 | 62 | unsigned int hygon_genuine; |
34041551 | 63 | unsigned int max_level, max_extended_level; |
103a8fea | 64 | unsigned int has_invariant_tsc; |
d7899447 | 65 | unsigned int do_nhm_platform_info; |
cf4cbe53 | 66 | unsigned int no_MSR_MISC_PWR_MGMT; |
b2b34dfe | 67 | unsigned int aperf_mperf_multiplier = 1; |
103a8fea | 68 | double bclk; |
a2b7b749 | 69 | double base_hz; |
21ed5574 | 70 | unsigned int has_base_hz; |
a2b7b749 | 71 | double tsc_tweak = 1.0; |
c98d5d94 LB |
72 | unsigned int show_pkg_only; |
73 | unsigned int show_core_only; | |
74 | char *output_buffer, *outp; | |
889facbe LB |
75 | unsigned int do_rapl; |
76 | unsigned int do_dts; | |
77 | unsigned int do_ptm; | |
fdf676e5 | 78 | unsigned long long gfx_cur_rc6_ms; |
be0e54c4 LB |
79 | unsigned long long cpuidle_cur_cpu_lpi_us; |
80 | unsigned long long cpuidle_cur_sys_lpi_us; | |
27d47356 | 81 | unsigned int gfx_cur_mhz; |
889facbe LB |
82 | unsigned int tcc_activation_temp; |
83 | unsigned int tcc_activation_temp_override; | |
40ee8e3b AS |
84 | double rapl_power_units, rapl_time_units; |
85 | double rapl_dram_energy_units, rapl_energy_units; | |
889facbe | 86 | double rapl_joule_counter_range; |
3a9a941d | 87 | unsigned int do_core_perf_limit_reasons; |
ac980e13 | 88 | unsigned int has_automatic_cstate_conversion; |
3a9a941d LB |
89 | unsigned int do_gfx_perf_limit_reasons; |
90 | unsigned int do_ring_perf_limit_reasons; | |
8a5bdf41 LB |
91 | unsigned int crystal_hz; |
92 | unsigned long long tsc_hz; | |
7ce7d5de | 93 | int base_cpu; |
21ed5574 | 94 | double discover_bclk(unsigned int family, unsigned int model); |
7f5c258e LB |
95 | unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */ |
96 | /* IA32_HWP_REQUEST, IA32_HWP_STATUS */ | |
97 | unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */ | |
98 | unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */ | |
99 | unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */ | |
100 | unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */ | |
33148d67 | 101 | unsigned int has_misc_feature_control; |
4c2122d4 | 102 | unsigned int first_counter_read = 1; |
c026c236 | 103 | int ignore_stdin; |
889facbe | 104 | |
e6f9bb3c LB |
105 | #define RAPL_PKG (1 << 0) |
106 | /* 0x610 MSR_PKG_POWER_LIMIT */ | |
107 | /* 0x611 MSR_PKG_ENERGY_STATUS */ | |
108 | #define RAPL_PKG_PERF_STATUS (1 << 1) | |
109 | /* 0x613 MSR_PKG_PERF_STATUS */ | |
110 | #define RAPL_PKG_POWER_INFO (1 << 2) | |
111 | /* 0x614 MSR_PKG_POWER_INFO */ | |
112 | ||
113 | #define RAPL_DRAM (1 << 3) | |
114 | /* 0x618 MSR_DRAM_POWER_LIMIT */ | |
115 | /* 0x619 MSR_DRAM_ENERGY_STATUS */ | |
e6f9bb3c LB |
116 | #define RAPL_DRAM_PERF_STATUS (1 << 4) |
117 | /* 0x61b MSR_DRAM_PERF_STATUS */ | |
0b2bb692 LB |
118 | #define RAPL_DRAM_POWER_INFO (1 << 5) |
119 | /* 0x61c MSR_DRAM_POWER_INFO */ | |
e6f9bb3c | 120 | |
9148494c | 121 | #define RAPL_CORES_POWER_LIMIT (1 << 6) |
e6f9bb3c | 122 | /* 0x638 MSR_PP0_POWER_LIMIT */ |
0b2bb692 | 123 | #define RAPL_CORE_POLICY (1 << 7) |
e6f9bb3c LB |
124 | /* 0x63a MSR_PP0_POLICY */ |
125 | ||
0b2bb692 | 126 | #define RAPL_GFX (1 << 8) |
e6f9bb3c LB |
127 | /* 0x640 MSR_PP1_POWER_LIMIT */ |
128 | /* 0x641 MSR_PP1_ENERGY_STATUS */ | |
129 | /* 0x642 MSR_PP1_POLICY */ | |
9148494c JP |
130 | |
131 | #define RAPL_CORES_ENERGY_STATUS (1 << 9) | |
132 | /* 0x639 MSR_PP0_ENERGY_STATUS */ | |
9392bd98 CW |
133 | #define RAPL_PER_CORE_ENERGY (1 << 10) |
134 | /* Indicates cores energy collection is per-core, | |
135 | * not per-package. */ | |
136 | #define RAPL_AMD_F17H (1 << 11) | |
137 | /* 0xc0010299 MSR_RAPL_PWR_UNIT */ | |
138 | /* 0xc001029a MSR_CORE_ENERGY_STAT */ | |
139 | /* 0xc001029b MSR_PKG_ENERGY_STAT */ | |
9148494c | 140 | #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT) |
889facbe LB |
141 | #define TJMAX_DEFAULT 100 |
142 | ||
9392bd98 CW |
143 | /* MSRs that are not yet in the kernel-provided header. */ |
144 | #define MSR_RAPL_PWR_UNIT 0xc0010299 | |
145 | #define MSR_CORE_ENERGY_STAT 0xc001029a | |
146 | #define MSR_PKG_ENERGY_STAT 0xc001029b | |
147 | ||
889facbe | 148 | #define MAX(a, b) ((a) > (b) ? (a) : (b)) |
103a8fea | 149 | |
388e9c81 LB |
150 | /* |
151 | * buffer size used by sscanf() for added column names | |
152 | * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters | |
153 | */ | |
154 | #define NAME_BYTES 20 | |
495c7654 | 155 | #define PATH_BYTES 128 |
388e9c81 | 156 | |
103a8fea LB |
157 | int backwards_count; |
158 | char *progname; | |
103a8fea | 159 | |
1ef7d21a LB |
160 | #define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */ |
161 | cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset; | |
162 | size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size; | |
0748eaf0 LB |
163 | #define MAX_ADDED_COUNTERS 8 |
164 | #define MAX_ADDED_THREAD_COUNTERS 24 | |
0e2d8f05 | 165 | #define BITMASK_SIZE 32 |
c98d5d94 LB |
166 | |
167 | struct thread_data { | |
f4fdf2b4 LB |
168 | struct timeval tv_begin; |
169 | struct timeval tv_end; | |
d4794f25 | 170 | struct timeval tv_delta; |
c98d5d94 LB |
171 | unsigned long long tsc; |
172 | unsigned long long aperf; | |
173 | unsigned long long mperf; | |
144b44b1 | 174 | unsigned long long c1; |
0de6c0df | 175 | unsigned long long irq_count; |
1ed51011 | 176 | unsigned int smi_count; |
c98d5d94 | 177 | unsigned int cpu_id; |
4c2122d4 LB |
178 | unsigned int apic_id; |
179 | unsigned int x2apic_id; | |
c98d5d94 LB |
180 | unsigned int flags; |
181 | #define CPU_IS_FIRST_THREAD_IN_CORE 0x2 | |
182 | #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4 | |
0748eaf0 | 183 | unsigned long long counter[MAX_ADDED_THREAD_COUNTERS]; |
c98d5d94 LB |
184 | } *thread_even, *thread_odd; |
185 | ||
186 | struct core_data { | |
187 | unsigned long long c3; | |
188 | unsigned long long c6; | |
189 | unsigned long long c7; | |
0539ba11 | 190 | unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */ |
889facbe | 191 | unsigned int core_temp_c; |
9392bd98 | 192 | unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */ |
c98d5d94 | 193 | unsigned int core_id; |
678a3bd1 | 194 | unsigned long long counter[MAX_ADDED_COUNTERS]; |
c98d5d94 LB |
195 | } *core_even, *core_odd; |
196 | ||
197 | struct pkg_data { | |
198 | unsigned long long pc2; | |
199 | unsigned long long pc3; | |
200 | unsigned long long pc6; | |
201 | unsigned long long pc7; | |
ca58710f KCA |
202 | unsigned long long pc8; |
203 | unsigned long long pc9; | |
204 | unsigned long long pc10; | |
be0e54c4 LB |
205 | unsigned long long cpu_lpi; |
206 | unsigned long long sys_lpi; | |
0b2bb692 LB |
207 | unsigned long long pkg_wtd_core_c0; |
208 | unsigned long long pkg_any_core_c0; | |
209 | unsigned long long pkg_any_gfxe_c0; | |
210 | unsigned long long pkg_both_core_gfxe_c0; | |
9185e988 | 211 | long long gfx_rc6_ms; |
27d47356 | 212 | unsigned int gfx_mhz; |
c98d5d94 | 213 | unsigned int package_id; |
889facbe LB |
214 | unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */ |
215 | unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */ | |
216 | unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */ | |
217 | unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */ | |
218 | unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */ | |
219 | unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */ | |
220 | unsigned int pkg_temp_c; | |
678a3bd1 | 221 | unsigned long long counter[MAX_ADDED_COUNTERS]; |
c98d5d94 LB |
222 | } *package_even, *package_odd; |
223 | ||
224 | #define ODD_COUNTERS thread_odd, core_odd, package_odd | |
225 | #define EVEN_COUNTERS thread_even, core_even, package_even | |
226 | ||
40f5cfe7 PB |
227 | #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \ |
228 | ((thread_base) + \ | |
229 | ((pkg_no) * \ | |
230 | topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \ | |
231 | ((node_no) * topo.cores_per_node * topo.threads_per_core) + \ | |
232 | ((core_no) * topo.threads_per_core) + \ | |
233 | (thread_no)) | |
234 | ||
235 | #define GET_CORE(core_base, core_no, node_no, pkg_no) \ | |
236 | ((core_base) + \ | |
237 | ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \ | |
238 | ((node_no) * topo.cores_per_node) + \ | |
239 | (core_no)) | |
240 | ||
241 | ||
c98d5d94 LB |
242 | #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no) |
243 | ||
388e9c81 | 244 | enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE}; |
41618e63 | 245 | enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC}; |
388e9c81 LB |
246 | enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT}; |
247 | ||
248 | struct msr_counter { | |
249 | unsigned int msr_num; | |
250 | char name[NAME_BYTES]; | |
495c7654 | 251 | char path[PATH_BYTES]; |
388e9c81 LB |
252 | unsigned int width; |
253 | enum counter_type type; | |
254 | enum counter_format format; | |
255 | struct msr_counter *next; | |
812db3f7 LB |
256 | unsigned int flags; |
257 | #define FLAGS_HIDE (1 << 0) | |
258 | #define FLAGS_SHOW (1 << 1) | |
41618e63 | 259 | #define SYSFS_PERCPU (1 << 1) |
388e9c81 LB |
260 | }; |
261 | ||
262 | struct sys_counters { | |
678a3bd1 LB |
263 | unsigned int added_thread_counters; |
264 | unsigned int added_core_counters; | |
265 | unsigned int added_package_counters; | |
388e9c81 LB |
266 | struct msr_counter *tp; |
267 | struct msr_counter *cp; | |
268 | struct msr_counter *pp; | |
269 | } sys; | |
270 | ||
c98d5d94 LB |
271 | struct system_summary { |
272 | struct thread_data threads; | |
273 | struct core_data cores; | |
274 | struct pkg_data packages; | |
388e9c81 | 275 | } average; |
c98d5d94 | 276 | |
0e2d8f05 LB |
277 | struct cpu_topology { |
278 | int physical_package_id; | |
6de68fe1 | 279 | int die_id; |
0e2d8f05 | 280 | int logical_cpu_id; |
ef605741 PB |
281 | int physical_node_id; |
282 | int logical_node_id; /* 0-based count within the package */ | |
0e2d8f05 | 283 | int physical_core_id; |
8cb48b32 | 284 | int thread_id; |
0e2d8f05 LB |
285 | cpu_set_t *put_ids; /* Processing Unit/Thread IDs */ |
286 | } *cpus; | |
c98d5d94 LB |
287 | |
288 | struct topo_params { | |
289 | int num_packages; | |
6de68fe1 | 290 | int num_die; |
c98d5d94 LB |
291 | int num_cpus; |
292 | int num_cores; | |
293 | int max_cpu_num; | |
ef605741 | 294 | int max_node_num; |
70a9c6e8 PB |
295 | int nodes_per_pkg; |
296 | int cores_per_node; | |
297 | int threads_per_core; | |
c98d5d94 LB |
298 | } topo; |
299 | ||
300 | struct timeval tv_even, tv_odd, tv_delta; | |
301 | ||
562a2d37 LB |
302 | int *irq_column_2_cpu; /* /proc/interrupts column numbers */ |
303 | int *irqs_per_cpu; /* indexed by cpu_num */ | |
304 | ||
c98d5d94 LB |
305 | void setup_all_buffers(void); |
306 | ||
307 | int cpu_is_not_present(int cpu) | |
d15cf7c1 | 308 | { |
c98d5d94 | 309 | return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set); |
d15cf7c1 | 310 | } |
88c3281f | 311 | /* |
c98d5d94 LB |
312 | * run func(thread, core, package) in topology order |
313 | * skip non-present cpus | |
88c3281f | 314 | */ |
c98d5d94 LB |
315 | |
316 | int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *), | |
317 | struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base) | |
88c3281f | 318 | { |
40f5cfe7 | 319 | int retval, pkg_no, core_no, thread_no, node_no; |
d15cf7c1 | 320 | |
c98d5d94 | 321 | for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) { |
df2f677d LB |
322 | for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) { |
323 | for (core_no = 0; core_no < topo.cores_per_node; ++core_no) { | |
40f5cfe7 PB |
324 | for (thread_no = 0; thread_no < |
325 | topo.threads_per_core; ++thread_no) { | |
326 | struct thread_data *t; | |
327 | struct core_data *c; | |
328 | struct pkg_data *p; | |
329 | ||
330 | t = GET_THREAD(thread_base, thread_no, | |
331 | core_no, node_no, | |
332 | pkg_no); | |
333 | ||
334 | if (cpu_is_not_present(t->cpu_id)) | |
335 | continue; | |
336 | ||
337 | c = GET_CORE(core_base, core_no, | |
338 | node_no, pkg_no); | |
339 | p = GET_PKG(pkg_base, pkg_no); | |
340 | ||
341 | retval = func(t, c, p); | |
342 | if (retval) | |
343 | return retval; | |
344 | } | |
c98d5d94 LB |
345 | } |
346 | } | |
347 | } | |
348 | return 0; | |
88c3281f LB |
349 | } |
350 | ||
351 | int cpu_migrate(int cpu) | |
352 | { | |
c98d5d94 LB |
353 | CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set); |
354 | CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set); | |
355 | if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1) | |
88c3281f LB |
356 | return -1; |
357 | else | |
358 | return 0; | |
359 | } | |
36229897 | 360 | int get_msr_fd(int cpu) |
103a8fea | 361 | { |
103a8fea LB |
362 | char pathname[32]; |
363 | int fd; | |
364 | ||
36229897 LB |
365 | fd = fd_percpu[cpu]; |
366 | ||
367 | if (fd) | |
368 | return fd; | |
369 | ||
103a8fea LB |
370 | sprintf(pathname, "/dev/cpu/%d/msr", cpu); |
371 | fd = open(pathname, O_RDONLY); | |
15aaa346 | 372 | if (fd < 0) |
98481e79 | 373 | err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname); |
103a8fea | 374 | |
36229897 LB |
375 | fd_percpu[cpu] = fd; |
376 | ||
377 | return fd; | |
378 | } | |
379 | ||
380 | int get_msr(int cpu, off_t offset, unsigned long long *msr) | |
381 | { | |
382 | ssize_t retval; | |
383 | ||
384 | retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset); | |
15aaa346 | 385 | |
98481e79 | 386 | if (retval != sizeof *msr) |
cf4cbe53 | 387 | err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset); |
15aaa346 LB |
388 | |
389 | return 0; | |
103a8fea LB |
390 | } |
391 | ||
fc04cc67 | 392 | /* |
bdd5ae3a LB |
393 | * This list matches the column headers, except |
394 | * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time | |
395 | * 2. Core and CPU are moved to the end, we can't have strings that contain them | |
396 | * matching on them for --show and --hide. | |
fc04cc67 | 397 | */ |
812db3f7 | 398 | struct msr_counter bic[] = { |
3f44a5c6 LB |
399 | { 0x0, "usec" }, |
400 | { 0x0, "Time_Of_Day_Seconds" }, | |
812db3f7 | 401 | { 0x0, "Package" }, |
bdd5ae3a | 402 | { 0x0, "Node" }, |
812db3f7 | 403 | { 0x0, "Avg_MHz" }, |
bdd5ae3a | 404 | { 0x0, "Busy%" }, |
812db3f7 LB |
405 | { 0x0, "Bzy_MHz" }, |
406 | { 0x0, "TSC_MHz" }, | |
407 | { 0x0, "IRQ" }, | |
495c7654 | 408 | { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL}, |
bdd5ae3a | 409 | { 0x0, "sysfs" }, |
812db3f7 LB |
410 | { 0x0, "CPU%c1" }, |
411 | { 0x0, "CPU%c3" }, | |
412 | { 0x0, "CPU%c6" }, | |
413 | { 0x0, "CPU%c7" }, | |
414 | { 0x0, "ThreadC" }, | |
415 | { 0x0, "CoreTmp" }, | |
416 | { 0x0, "CoreCnt" }, | |
417 | { 0x0, "PkgTmp" }, | |
418 | { 0x0, "GFX%rc6" }, | |
419 | { 0x0, "GFXMHz" }, | |
420 | { 0x0, "Pkg%pc2" }, | |
421 | { 0x0, "Pkg%pc3" }, | |
422 | { 0x0, "Pkg%pc6" }, | |
423 | { 0x0, "Pkg%pc7" }, | |
0f47c08d LB |
424 | { 0x0, "Pkg%pc8" }, |
425 | { 0x0, "Pkg%pc9" }, | |
4bd1f8f2 | 426 | { 0x0, "Pk%pc10" }, |
be0e54c4 LB |
427 | { 0x0, "CPU%LPI" }, |
428 | { 0x0, "SYS%LPI" }, | |
812db3f7 LB |
429 | { 0x0, "PkgWatt" }, |
430 | { 0x0, "CorWatt" }, | |
431 | { 0x0, "GFXWatt" }, | |
432 | { 0x0, "PkgCnt" }, | |
433 | { 0x0, "RAMWatt" }, | |
434 | { 0x0, "PKG_%" }, | |
435 | { 0x0, "RAM_%" }, | |
436 | { 0x0, "Pkg_J" }, | |
437 | { 0x0, "Cor_J" }, | |
438 | { 0x0, "GFX_J" }, | |
439 | { 0x0, "RAM_J" }, | |
0539ba11 | 440 | { 0x0, "Mod%c6" }, |
a99d8730 LB |
441 | { 0x0, "Totl%C0" }, |
442 | { 0x0, "Any%C0" }, | |
443 | { 0x0, "GFX%C0" }, | |
444 | { 0x0, "CPUGFX%" }, | |
bdd5ae3a LB |
445 | { 0x0, "Core" }, |
446 | { 0x0, "CPU" }, | |
4c2122d4 LB |
447 | { 0x0, "APIC" }, |
448 | { 0x0, "X2APIC" }, | |
6de68fe1 | 449 | { 0x0, "Die" }, |
812db3f7 LB |
450 | }; |
451 | ||
452 | #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter)) | |
3f44a5c6 LB |
453 | #define BIC_USEC (1ULL << 0) |
454 | #define BIC_TOD (1ULL << 1) | |
455 | #define BIC_Package (1ULL << 2) | |
bdd5ae3a LB |
456 | #define BIC_Node (1ULL << 3) |
457 | #define BIC_Avg_MHz (1ULL << 4) | |
458 | #define BIC_Busy (1ULL << 5) | |
459 | #define BIC_Bzy_MHz (1ULL << 6) | |
460 | #define BIC_TSC_MHz (1ULL << 7) | |
461 | #define BIC_IRQ (1ULL << 8) | |
462 | #define BIC_SMI (1ULL << 9) | |
463 | #define BIC_sysfs (1ULL << 10) | |
464 | #define BIC_CPU_c1 (1ULL << 11) | |
465 | #define BIC_CPU_c3 (1ULL << 12) | |
466 | #define BIC_CPU_c6 (1ULL << 13) | |
467 | #define BIC_CPU_c7 (1ULL << 14) | |
468 | #define BIC_ThreadC (1ULL << 15) | |
469 | #define BIC_CoreTmp (1ULL << 16) | |
470 | #define BIC_CoreCnt (1ULL << 17) | |
471 | #define BIC_PkgTmp (1ULL << 18) | |
472 | #define BIC_GFX_rc6 (1ULL << 19) | |
473 | #define BIC_GFXMHz (1ULL << 20) | |
474 | #define BIC_Pkgpc2 (1ULL << 21) | |
475 | #define BIC_Pkgpc3 (1ULL << 22) | |
476 | #define BIC_Pkgpc6 (1ULL << 23) | |
477 | #define BIC_Pkgpc7 (1ULL << 24) | |
478 | #define BIC_Pkgpc8 (1ULL << 25) | |
479 | #define BIC_Pkgpc9 (1ULL << 26) | |
480 | #define BIC_Pkgpc10 (1ULL << 27) | |
481 | #define BIC_CPU_LPI (1ULL << 28) | |
482 | #define BIC_SYS_LPI (1ULL << 29) | |
483 | #define BIC_PkgWatt (1ULL << 30) | |
484 | #define BIC_CorWatt (1ULL << 31) | |
485 | #define BIC_GFXWatt (1ULL << 32) | |
486 | #define BIC_PkgCnt (1ULL << 33) | |
487 | #define BIC_RAMWatt (1ULL << 34) | |
488 | #define BIC_PKG__ (1ULL << 35) | |
489 | #define BIC_RAM__ (1ULL << 36) | |
490 | #define BIC_Pkg_J (1ULL << 37) | |
491 | #define BIC_Cor_J (1ULL << 38) | |
492 | #define BIC_GFX_J (1ULL << 39) | |
493 | #define BIC_RAM_J (1ULL << 40) | |
494 | #define BIC_Mod_c6 (1ULL << 41) | |
495 | #define BIC_Totl_c0 (1ULL << 42) | |
496 | #define BIC_Any_c0 (1ULL << 43) | |
497 | #define BIC_GFX_c0 (1ULL << 44) | |
498 | #define BIC_CPUGFX (1ULL << 45) | |
499 | #define BIC_Core (1ULL << 46) | |
500 | #define BIC_CPU (1ULL << 47) | |
4c2122d4 LB |
501 | #define BIC_APIC (1ULL << 48) |
502 | #define BIC_X2APIC (1ULL << 49) | |
6de68fe1 | 503 | #define BIC_Die (1ULL << 50) |
3f44a5c6 | 504 | |
4c2122d4 | 505 | #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC) |
3f44a5c6 LB |
506 | |
507 | unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT); | |
4c2122d4 | 508 | unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC; |
812db3f7 LB |
509 | |
510 | #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME) | |
1e9042b9 | 511 | #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME) |
3f44a5c6 | 512 | #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME) |
812db3f7 | 513 | #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT) |
0f47c08d | 514 | #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT) |
812db3f7 | 515 | |
3f44a5c6 | 516 | |
dd778a5e LB |
517 | #define MAX_DEFERRED 16 |
518 | char *deferred_skip_names[MAX_DEFERRED]; | |
519 | int deferred_skip_index; | |
520 | ||
521 | /* | |
522 | * HIDE_LIST - hide this list of counters, show the rest [default] | |
523 | * SHOW_LIST - show this list of counters, hide the rest | |
524 | */ | |
525 | enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST; | |
526 | ||
527 | void help(void) | |
528 | { | |
529 | fprintf(outf, | |
530 | "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n" | |
531 | "\n" | |
532 | "Turbostat forks the specified COMMAND and prints statistics\n" | |
533 | "when COMMAND completes.\n" | |
534 | "If no COMMAND is specified, turbostat wakes every 5-seconds\n" | |
535 | "to print statistics, until interrupted.\n" | |
cc481650 NC |
536 | " -a, --add add a counter\n" |
537 | " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n" | |
538 | " -c, --cpu cpu-set limit output to summary plus cpu-set:\n" | |
539 | " {core | package | j,k,l..m,n-p }\n" | |
9ce80578 NC |
540 | " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n" |
541 | " -D, --Dump displays the raw counter values\n" | |
542 | " -e, --enable [all | column]\n" | |
543 | " shows all or the specified disabled column\n" | |
544 | " -H, --hide [column|column,column,...]\n" | |
545 | " hide the specified column(s)\n" | |
cc481650 NC |
546 | " -i, --interval sec.subsec\n" |
547 | " Override default 5-second measurement interval\n" | |
9ce80578 | 548 | " -J, --Joules displays energy in Joules instead of Watts\n" |
cc481650 NC |
549 | " -l, --list list column headers only\n" |
550 | " -n, --num_iterations num\n" | |
551 | " number of the measurement iterations\n" | |
552 | " -o, --out file\n" | |
553 | " create or truncate \"file\" for all output\n" | |
554 | " -q, --quiet skip decoding system configuration header\n" | |
9ce80578 NC |
555 | " -s, --show [column|column,column,...]\n" |
556 | " show only the specified column(s)\n" | |
557 | " -S, --Summary\n" | |
558 | " limits output to 1-line system summary per interval\n" | |
559 | " -T, --TCC temperature\n" | |
560 | " sets the Thermal Control Circuit temperature in\n" | |
561 | " degrees Celsius\n" | |
cc481650 NC |
562 | " -h, --help print this help message\n" |
563 | " -v, --version print version information\n" | |
dd778a5e LB |
564 | "\n" |
565 | "For more help, run \"man turbostat\"\n"); | |
566 | } | |
567 | ||
812db3f7 LB |
568 | /* |
569 | * bic_lookup | |
570 | * for all the strings in comma separate name_list, | |
571 | * set the approprate bit in return value. | |
572 | */ | |
dd778a5e | 573 | unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) |
812db3f7 LB |
574 | { |
575 | int i; | |
576 | unsigned long long retval = 0; | |
577 | ||
578 | while (name_list) { | |
579 | char *comma; | |
580 | ||
581 | comma = strchr(name_list, ','); | |
582 | ||
583 | if (comma) | |
584 | *comma = '\0'; | |
585 | ||
3f44a5c6 LB |
586 | if (!strcmp(name_list, "all")) |
587 | return ~0; | |
588 | ||
812db3f7 LB |
589 | for (i = 0; i < MAX_BIC; ++i) { |
590 | if (!strcmp(name_list, bic[i].name)) { | |
591 | retval |= (1ULL << i); | |
592 | break; | |
593 | } | |
594 | } | |
595 | if (i == MAX_BIC) { | |
dd778a5e LB |
596 | if (mode == SHOW_LIST) { |
597 | fprintf(stderr, "Invalid counter name: %s\n", name_list); | |
598 | exit(-1); | |
599 | } | |
600 | deferred_skip_names[deferred_skip_index++] = name_list; | |
601 | if (debug) | |
602 | fprintf(stderr, "deferred \"%s\"\n", name_list); | |
603 | if (deferred_skip_index >= MAX_DEFERRED) { | |
604 | fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n", | |
605 | MAX_DEFERRED, name_list); | |
606 | help(); | |
607 | exit(1); | |
608 | } | |
812db3f7 LB |
609 | } |
610 | ||
611 | name_list = comma; | |
612 | if (name_list) | |
613 | name_list++; | |
614 | ||
615 | } | |
616 | return retval; | |
617 | } | |
fc04cc67 | 618 | |
dd778a5e | 619 | |
c8ade361 | 620 | void print_header(char *delim) |
103a8fea | 621 | { |
388e9c81 | 622 | struct msr_counter *mp; |
6168c2e0 | 623 | int printed = 0; |
388e9c81 | 624 | |
3f44a5c6 LB |
625 | if (DO_BIC(BIC_USEC)) |
626 | outp += sprintf(outp, "%susec", (printed++ ? delim : "")); | |
627 | if (DO_BIC(BIC_TOD)) | |
628 | outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : "")); | |
812db3f7 | 629 | if (DO_BIC(BIC_Package)) |
6168c2e0 | 630 | outp += sprintf(outp, "%sPackage", (printed++ ? delim : "")); |
6de68fe1 LB |
631 | if (DO_BIC(BIC_Die)) |
632 | outp += sprintf(outp, "%sDie", (printed++ ? delim : "")); | |
01235041 PB |
633 | if (DO_BIC(BIC_Node)) |
634 | outp += sprintf(outp, "%sNode", (printed++ ? delim : "")); | |
812db3f7 | 635 | if (DO_BIC(BIC_Core)) |
6168c2e0 | 636 | outp += sprintf(outp, "%sCore", (printed++ ? delim : "")); |
812db3f7 | 637 | if (DO_BIC(BIC_CPU)) |
6168c2e0 | 638 | outp += sprintf(outp, "%sCPU", (printed++ ? delim : "")); |
4c2122d4 LB |
639 | if (DO_BIC(BIC_APIC)) |
640 | outp += sprintf(outp, "%sAPIC", (printed++ ? delim : "")); | |
641 | if (DO_BIC(BIC_X2APIC)) | |
642 | outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : "")); | |
812db3f7 | 643 | if (DO_BIC(BIC_Avg_MHz)) |
6168c2e0 | 644 | outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : "")); |
812db3f7 | 645 | if (DO_BIC(BIC_Busy)) |
6168c2e0 | 646 | outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : "")); |
812db3f7 | 647 | if (DO_BIC(BIC_Bzy_MHz)) |
6168c2e0 | 648 | outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : "")); |
812db3f7 | 649 | if (DO_BIC(BIC_TSC_MHz)) |
6168c2e0 | 650 | outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : "")); |
1cc21f7b | 651 | |
0de6c0df LB |
652 | if (DO_BIC(BIC_IRQ)) { |
653 | if (sums_need_wide_columns) | |
6168c2e0 | 654 | outp += sprintf(outp, "%s IRQ", (printed++ ? delim : "")); |
0de6c0df | 655 | else |
6168c2e0 | 656 | outp += sprintf(outp, "%sIRQ", (printed++ ? delim : "")); |
0de6c0df LB |
657 | } |
658 | ||
812db3f7 | 659 | if (DO_BIC(BIC_SMI)) |
6168c2e0 | 660 | outp += sprintf(outp, "%sSMI", (printed++ ? delim : "")); |
1cc21f7b | 661 | |
388e9c81 | 662 | for (mp = sys.tp; mp; mp = mp->next) { |
dd778a5e | 663 | |
388e9c81 LB |
664 | if (mp->format == FORMAT_RAW) { |
665 | if (mp->width == 64) | |
dd778a5e | 666 | outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name); |
388e9c81 | 667 | else |
dd778a5e | 668 | outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name); |
388e9c81 | 669 | } else { |
0de6c0df | 670 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
dd778a5e | 671 | outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name); |
0de6c0df | 672 | else |
dd778a5e | 673 | outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name); |
388e9c81 LB |
674 | } |
675 | } | |
676 | ||
41618e63 | 677 | if (DO_BIC(BIC_CPU_c1)) |
6168c2e0 | 678 | outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : "")); |
562855ee | 679 | if (DO_BIC(BIC_CPU_c3)) |
6168c2e0 | 680 | outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : "")); |
812db3f7 | 681 | if (DO_BIC(BIC_CPU_c6)) |
6168c2e0 | 682 | outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : "")); |
812db3f7 | 683 | if (DO_BIC(BIC_CPU_c7)) |
6168c2e0 | 684 | outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : "")); |
678a3bd1 | 685 | |
0539ba11 | 686 | if (DO_BIC(BIC_Mod_c6)) |
6168c2e0 | 687 | outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : "")); |
678a3bd1 | 688 | |
812db3f7 | 689 | if (DO_BIC(BIC_CoreTmp)) |
6168c2e0 | 690 | outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : "")); |
388e9c81 | 691 | |
9392bd98 CW |
692 | if (do_rapl && !rapl_joules) { |
693 | if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY)) | |
694 | outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : "")); | |
695 | } else if (do_rapl && rapl_joules) { | |
696 | if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY)) | |
697 | outp += sprintf(outp, "%sCor_J", (printed++ ? delim : "")); | |
698 | } | |
699 | ||
388e9c81 LB |
700 | for (mp = sys.cp; mp; mp = mp->next) { |
701 | if (mp->format == FORMAT_RAW) { | |
702 | if (mp->width == 64) | |
c8ade361 | 703 | outp += sprintf(outp, "%s%18.18s", delim, mp->name); |
388e9c81 | 704 | else |
c8ade361 | 705 | outp += sprintf(outp, "%s%10.10s", delim, mp->name); |
388e9c81 | 706 | } else { |
0de6c0df LB |
707 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
708 | outp += sprintf(outp, "%s%8s", delim, mp->name); | |
709 | else | |
710 | outp += sprintf(outp, "%s%s", delim, mp->name); | |
388e9c81 LB |
711 | } |
712 | } | |
713 | ||
812db3f7 | 714 | if (DO_BIC(BIC_PkgTmp)) |
6168c2e0 | 715 | outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : "")); |
889facbe | 716 | |
812db3f7 | 717 | if (DO_BIC(BIC_GFX_rc6)) |
6168c2e0 | 718 | outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : "")); |
fdf676e5 | 719 | |
812db3f7 | 720 | if (DO_BIC(BIC_GFXMHz)) |
6168c2e0 | 721 | outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : "")); |
27d47356 | 722 | |
a99d8730 | 723 | if (DO_BIC(BIC_Totl_c0)) |
6168c2e0 | 724 | outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : "")); |
a99d8730 | 725 | if (DO_BIC(BIC_Any_c0)) |
6168c2e0 | 726 | outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : "")); |
a99d8730 | 727 | if (DO_BIC(BIC_GFX_c0)) |
6168c2e0 | 728 | outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : "")); |
a99d8730 | 729 | if (DO_BIC(BIC_CPUGFX)) |
6168c2e0 | 730 | outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : "")); |
0b2bb692 | 731 | |
0f47c08d | 732 | if (DO_BIC(BIC_Pkgpc2)) |
6168c2e0 | 733 | outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : "")); |
0f47c08d | 734 | if (DO_BIC(BIC_Pkgpc3)) |
6168c2e0 | 735 | outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : "")); |
0f47c08d | 736 | if (DO_BIC(BIC_Pkgpc6)) |
6168c2e0 | 737 | outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : "")); |
0f47c08d | 738 | if (DO_BIC(BIC_Pkgpc7)) |
6168c2e0 | 739 | outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : "")); |
0f47c08d | 740 | if (DO_BIC(BIC_Pkgpc8)) |
6168c2e0 | 741 | outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : "")); |
0f47c08d | 742 | if (DO_BIC(BIC_Pkgpc9)) |
6168c2e0 | 743 | outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : "")); |
0f47c08d | 744 | if (DO_BIC(BIC_Pkgpc10)) |
6168c2e0 | 745 | outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : "")); |
be0e54c4 LB |
746 | if (DO_BIC(BIC_CPU_LPI)) |
747 | outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : "")); | |
748 | if (DO_BIC(BIC_SYS_LPI)) | |
749 | outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : "")); | |
103a8fea | 750 | |
5c56be9a | 751 | if (do_rapl && !rapl_joules) { |
812db3f7 | 752 | if (DO_BIC(BIC_PkgWatt)) |
6168c2e0 | 753 | outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : "")); |
9392bd98 | 754 | if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY)) |
6168c2e0 | 755 | outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : "")); |
812db3f7 | 756 | if (DO_BIC(BIC_GFXWatt)) |
6168c2e0 | 757 | outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : "")); |
812db3f7 | 758 | if (DO_BIC(BIC_RAMWatt)) |
6168c2e0 | 759 | outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : "")); |
812db3f7 | 760 | if (DO_BIC(BIC_PKG__)) |
6168c2e0 | 761 | outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : "")); |
812db3f7 | 762 | if (DO_BIC(BIC_RAM__)) |
6168c2e0 | 763 | outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : "")); |
d7899447 | 764 | } else if (do_rapl && rapl_joules) { |
812db3f7 | 765 | if (DO_BIC(BIC_Pkg_J)) |
6168c2e0 | 766 | outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : "")); |
9392bd98 | 767 | if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY)) |
6168c2e0 | 768 | outp += sprintf(outp, "%sCor_J", (printed++ ? delim : "")); |
812db3f7 | 769 | if (DO_BIC(BIC_GFX_J)) |
6168c2e0 | 770 | outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : "")); |
812db3f7 | 771 | if (DO_BIC(BIC_RAM_J)) |
6168c2e0 | 772 | outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : "")); |
812db3f7 | 773 | if (DO_BIC(BIC_PKG__)) |
6168c2e0 | 774 | outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : "")); |
812db3f7 | 775 | if (DO_BIC(BIC_RAM__)) |
6168c2e0 | 776 | outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : "")); |
5c56be9a | 777 | } |
388e9c81 LB |
778 | for (mp = sys.pp; mp; mp = mp->next) { |
779 | if (mp->format == FORMAT_RAW) { | |
780 | if (mp->width == 64) | |
c8ade361 | 781 | outp += sprintf(outp, "%s%18.18s", delim, mp->name); |
388e9c81 | 782 | else |
c8ade361 | 783 | outp += sprintf(outp, "%s%10.10s", delim, mp->name); |
388e9c81 | 784 | } else { |
0de6c0df LB |
785 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
786 | outp += sprintf(outp, "%s%8s", delim, mp->name); | |
787 | else | |
788 | outp += sprintf(outp, "%s%s", delim, mp->name); | |
388e9c81 LB |
789 | } |
790 | } | |
791 | ||
c98d5d94 | 792 | outp += sprintf(outp, "\n"); |
103a8fea LB |
793 | } |
794 | ||
c98d5d94 LB |
795 | int dump_counters(struct thread_data *t, struct core_data *c, |
796 | struct pkg_data *p) | |
103a8fea | 797 | { |
388e9c81 LB |
798 | int i; |
799 | struct msr_counter *mp; | |
800 | ||
3b4d5c7f | 801 | outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p); |
c98d5d94 LB |
802 | |
803 | if (t) { | |
3b4d5c7f AS |
804 | outp += sprintf(outp, "CPU: %d flags 0x%x\n", |
805 | t->cpu_id, t->flags); | |
806 | outp += sprintf(outp, "TSC: %016llX\n", t->tsc); | |
807 | outp += sprintf(outp, "aperf: %016llX\n", t->aperf); | |
808 | outp += sprintf(outp, "mperf: %016llX\n", t->mperf); | |
809 | outp += sprintf(outp, "c1: %016llX\n", t->c1); | |
6886fee4 | 810 | |
812db3f7 | 811 | if (DO_BIC(BIC_IRQ)) |
0de6c0df | 812 | outp += sprintf(outp, "IRQ: %lld\n", t->irq_count); |
812db3f7 | 813 | if (DO_BIC(BIC_SMI)) |
218f0e8d | 814 | outp += sprintf(outp, "SMI: %d\n", t->smi_count); |
388e9c81 LB |
815 | |
816 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { | |
817 | outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n", | |
818 | i, mp->msr_num, t->counter[i]); | |
819 | } | |
c98d5d94 | 820 | } |
103a8fea | 821 | |
c98d5d94 | 822 | if (c) { |
3b4d5c7f AS |
823 | outp += sprintf(outp, "core: %d\n", c->core_id); |
824 | outp += sprintf(outp, "c3: %016llX\n", c->c3); | |
825 | outp += sprintf(outp, "c6: %016llX\n", c->c6); | |
826 | outp += sprintf(outp, "c7: %016llX\n", c->c7); | |
827 | outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c); | |
9392bd98 | 828 | outp += sprintf(outp, "Joules: %0X\n", c->core_energy); |
388e9c81 LB |
829 | |
830 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { | |
831 | outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n", | |
832 | i, mp->msr_num, c->counter[i]); | |
833 | } | |
0539ba11 | 834 | outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us); |
c98d5d94 | 835 | } |
103a8fea | 836 | |
c98d5d94 | 837 | if (p) { |
3b4d5c7f | 838 | outp += sprintf(outp, "package: %d\n", p->package_id); |
0b2bb692 LB |
839 | |
840 | outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0); | |
841 | outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0); | |
842 | outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0); | |
843 | outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0); | |
844 | ||
3b4d5c7f | 845 | outp += sprintf(outp, "pc2: %016llX\n", p->pc2); |
0f47c08d | 846 | if (DO_BIC(BIC_Pkgpc3)) |
ee7e38e3 | 847 | outp += sprintf(outp, "pc3: %016llX\n", p->pc3); |
0f47c08d | 848 | if (DO_BIC(BIC_Pkgpc6)) |
ee7e38e3 | 849 | outp += sprintf(outp, "pc6: %016llX\n", p->pc6); |
0f47c08d | 850 | if (DO_BIC(BIC_Pkgpc7)) |
ee7e38e3 | 851 | outp += sprintf(outp, "pc7: %016llX\n", p->pc7); |
3b4d5c7f AS |
852 | outp += sprintf(outp, "pc8: %016llX\n", p->pc8); |
853 | outp += sprintf(outp, "pc9: %016llX\n", p->pc9); | |
854 | outp += sprintf(outp, "pc10: %016llX\n", p->pc10); | |
be0e54c4 LB |
855 | outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi); |
856 | outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi); | |
3b4d5c7f AS |
857 | outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg); |
858 | outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores); | |
859 | outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx); | |
860 | outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram); | |
861 | outp += sprintf(outp, "Throttle PKG: %0X\n", | |
862 | p->rapl_pkg_perf_status); | |
863 | outp += sprintf(outp, "Throttle RAM: %0X\n", | |
864 | p->rapl_dram_perf_status); | |
865 | outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c); | |
388e9c81 LB |
866 | |
867 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { | |
868 | outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n", | |
869 | i, mp->msr_num, p->counter[i]); | |
870 | } | |
c98d5d94 | 871 | } |
3b4d5c7f AS |
872 | |
873 | outp += sprintf(outp, "\n"); | |
874 | ||
c98d5d94 | 875 | return 0; |
103a8fea LB |
876 | } |
877 | ||
e23da037 LB |
878 | /* |
879 | * column formatting convention & formats | |
e23da037 | 880 | */ |
c98d5d94 LB |
881 | int format_counters(struct thread_data *t, struct core_data *c, |
882 | struct pkg_data *p) | |
103a8fea | 883 | { |
008d396e | 884 | double interval_float, tsc; |
fc04cc67 | 885 | char *fmt8; |
388e9c81 LB |
886 | int i; |
887 | struct msr_counter *mp; | |
6168c2e0 LB |
888 | char *delim = "\t"; |
889 | int printed = 0; | |
103a8fea | 890 | |
c98d5d94 LB |
891 | /* if showing only 1st thread in core and this isn't one, bail out */ |
892 | if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
893 | return 0; | |
894 | ||
895 | /* if showing only 1st thread in pkg and this isn't one, bail out */ | |
896 | if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
897 | return 0; | |
898 | ||
1ef7d21a LB |
899 | /*if not summary line and --cpu is used */ |
900 | if ((t != &average.threads) && | |
901 | (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset))) | |
902 | return 0; | |
903 | ||
3f44a5c6 | 904 | if (DO_BIC(BIC_USEC)) { |
f4fdf2b4 LB |
905 | /* on each row, print how many usec each timestamp took to gather */ |
906 | struct timeval tv; | |
907 | ||
908 | timersub(&t->tv_end, &t->tv_begin, &tv); | |
909 | outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec); | |
910 | } | |
911 | ||
3f44a5c6 LB |
912 | /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */ |
913 | if (DO_BIC(BIC_TOD)) | |
914 | outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec); | |
915 | ||
d4794f25 | 916 | interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0; |
103a8fea | 917 | |
008d396e LB |
918 | tsc = t->tsc * tsc_tweak; |
919 | ||
c98d5d94 LB |
920 | /* topo columns, print blanks on 1st (average) line */ |
921 | if (t == &average.threads) { | |
812db3f7 | 922 | if (DO_BIC(BIC_Package)) |
6168c2e0 | 923 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); |
6de68fe1 LB |
924 | if (DO_BIC(BIC_Die)) |
925 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); | |
01235041 PB |
926 | if (DO_BIC(BIC_Node)) |
927 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); | |
812db3f7 | 928 | if (DO_BIC(BIC_Core)) |
6168c2e0 | 929 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); |
812db3f7 | 930 | if (DO_BIC(BIC_CPU)) |
6168c2e0 | 931 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); |
4c2122d4 LB |
932 | if (DO_BIC(BIC_APIC)) |
933 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); | |
934 | if (DO_BIC(BIC_X2APIC)) | |
935 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); | |
103a8fea | 936 | } else { |
812db3f7 | 937 | if (DO_BIC(BIC_Package)) { |
c98d5d94 | 938 | if (p) |
6168c2e0 | 939 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id); |
c98d5d94 | 940 | else |
6168c2e0 | 941 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); |
c98d5d94 | 942 | } |
6de68fe1 LB |
943 | if (DO_BIC(BIC_Die)) { |
944 | if (c) | |
945 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id); | |
946 | else | |
947 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); | |
948 | } | |
01235041 PB |
949 | if (DO_BIC(BIC_Node)) { |
950 | if (t) | |
951 | outp += sprintf(outp, "%s%d", | |
952 | (printed++ ? delim : ""), | |
953 | cpus[t->cpu_id].physical_node_id); | |
954 | else | |
955 | outp += sprintf(outp, "%s-", | |
956 | (printed++ ? delim : "")); | |
957 | } | |
812db3f7 | 958 | if (DO_BIC(BIC_Core)) { |
c98d5d94 | 959 | if (c) |
6168c2e0 | 960 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id); |
c98d5d94 | 961 | else |
6168c2e0 | 962 | outp += sprintf(outp, "%s-", (printed++ ? delim : "")); |
c98d5d94 | 963 | } |
812db3f7 | 964 | if (DO_BIC(BIC_CPU)) |
6168c2e0 | 965 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id); |
4c2122d4 LB |
966 | if (DO_BIC(BIC_APIC)) |
967 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id); | |
968 | if (DO_BIC(BIC_X2APIC)) | |
969 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id); | |
103a8fea | 970 | } |
fc04cc67 | 971 | |
812db3f7 | 972 | if (DO_BIC(BIC_Avg_MHz)) |
6168c2e0 | 973 | outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), |
fc04cc67 LB |
974 | 1.0 / units * t->aperf / interval_float); |
975 | ||
812db3f7 | 976 | if (DO_BIC(BIC_Busy)) |
6168c2e0 | 977 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc); |
103a8fea | 978 | |
812db3f7 | 979 | if (DO_BIC(BIC_Bzy_MHz)) { |
21ed5574 | 980 | if (has_base_hz) |
6168c2e0 | 981 | outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf); |
21ed5574 | 982 | else |
6168c2e0 | 983 | outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), |
008d396e | 984 | tsc / units * t->aperf / t->mperf / interval_float); |
21ed5574 | 985 | } |
103a8fea | 986 | |
812db3f7 | 987 | if (DO_BIC(BIC_TSC_MHz)) |
6168c2e0 | 988 | outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float); |
103a8fea | 989 | |
562a2d37 | 990 | /* IRQ */ |
0de6c0df LB |
991 | if (DO_BIC(BIC_IRQ)) { |
992 | if (sums_need_wide_columns) | |
6168c2e0 | 993 | outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count); |
0de6c0df | 994 | else |
6168c2e0 | 995 | outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count); |
0de6c0df | 996 | } |
562a2d37 | 997 | |
1cc21f7b | 998 | /* SMI */ |
812db3f7 | 999 | if (DO_BIC(BIC_SMI)) |
6168c2e0 | 1000 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count); |
1cc21f7b | 1001 | |
678a3bd1 | 1002 | /* Added counters */ |
388e9c81 LB |
1003 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { |
1004 | if (mp->format == FORMAT_RAW) { | |
1005 | if (mp->width == 32) | |
5f3aea57 | 1006 | outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]); |
388e9c81 | 1007 | else |
6168c2e0 | 1008 | outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]); |
388e9c81 | 1009 | } else if (mp->format == FORMAT_DELTA) { |
0de6c0df | 1010 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
6168c2e0 | 1011 | outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]); |
0de6c0df | 1012 | else |
6168c2e0 | 1013 | outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]); |
388e9c81 | 1014 | } else if (mp->format == FORMAT_PERCENT) { |
41618e63 | 1015 | if (mp->type == COUNTER_USEC) |
6168c2e0 | 1016 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000); |
41618e63 | 1017 | else |
6168c2e0 | 1018 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc); |
388e9c81 LB |
1019 | } |
1020 | } | |
1021 | ||
41618e63 LB |
1022 | /* C1 */ |
1023 | if (DO_BIC(BIC_CPU_c1)) | |
6168c2e0 | 1024 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc); |
41618e63 LB |
1025 | |
1026 | ||
678a3bd1 LB |
1027 | /* print per-core data only for 1st thread in core */ |
1028 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
1029 | goto done; | |
1030 | ||
562855ee | 1031 | if (DO_BIC(BIC_CPU_c3)) |
6168c2e0 | 1032 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc); |
812db3f7 | 1033 | if (DO_BIC(BIC_CPU_c6)) |
6168c2e0 | 1034 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc); |
812db3f7 | 1035 | if (DO_BIC(BIC_CPU_c7)) |
6168c2e0 | 1036 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc); |
678a3bd1 | 1037 | |
0539ba11 LB |
1038 | /* Mod%c6 */ |
1039 | if (DO_BIC(BIC_Mod_c6)) | |
6168c2e0 | 1040 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc); |
0539ba11 | 1041 | |
812db3f7 | 1042 | if (DO_BIC(BIC_CoreTmp)) |
6168c2e0 | 1043 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c); |
889facbe | 1044 | |
388e9c81 LB |
1045 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
1046 | if (mp->format == FORMAT_RAW) { | |
1047 | if (mp->width == 32) | |
5f3aea57 | 1048 | outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]); |
388e9c81 | 1049 | else |
6168c2e0 | 1050 | outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]); |
388e9c81 | 1051 | } else if (mp->format == FORMAT_DELTA) { |
0de6c0df | 1052 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
6168c2e0 | 1053 | outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]); |
0de6c0df | 1054 | else |
6168c2e0 | 1055 | outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]); |
388e9c81 | 1056 | } else if (mp->format == FORMAT_PERCENT) { |
6168c2e0 | 1057 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc); |
388e9c81 LB |
1058 | } |
1059 | } | |
1060 | ||
9392bd98 CW |
1061 | /* |
1062 | * If measurement interval exceeds minimum RAPL Joule Counter range, | |
1063 | * indicate that results are suspect by printing "**" in fraction place. | |
1064 | */ | |
1065 | if (interval_float < rapl_joule_counter_range) | |
1066 | fmt8 = "%s%.2f"; | |
1067 | else | |
1068 | fmt8 = "%6.0f**"; | |
1069 | ||
1070 | if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY)) | |
1071 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float); | |
1072 | if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY)) | |
1073 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units); | |
1074 | ||
c98d5d94 LB |
1075 | /* print per-package data only for 1st core in package */ |
1076 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
1077 | goto done; | |
1078 | ||
0b2bb692 | 1079 | /* PkgTmp */ |
812db3f7 | 1080 | if (DO_BIC(BIC_PkgTmp)) |
6168c2e0 | 1081 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c); |
889facbe | 1082 | |
fdf676e5 | 1083 | /* GFXrc6 */ |
812db3f7 | 1084 | if (DO_BIC(BIC_GFX_rc6)) { |
ba3dec99 | 1085 | if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */ |
6168c2e0 | 1086 | outp += sprintf(outp, "%s**.**", (printed++ ? delim : "")); |
9185e988 | 1087 | } else { |
6168c2e0 | 1088 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), |
9185e988 LB |
1089 | p->gfx_rc6_ms / 10.0 / interval_float); |
1090 | } | |
1091 | } | |
fdf676e5 | 1092 | |
27d47356 | 1093 | /* GFXMHz */ |
812db3f7 | 1094 | if (DO_BIC(BIC_GFXMHz)) |
6168c2e0 | 1095 | outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz); |
27d47356 | 1096 | |
0b2bb692 | 1097 | /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */ |
a99d8730 | 1098 | if (DO_BIC(BIC_Totl_c0)) |
6168c2e0 | 1099 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc); |
a99d8730 | 1100 | if (DO_BIC(BIC_Any_c0)) |
6168c2e0 | 1101 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc); |
a99d8730 | 1102 | if (DO_BIC(BIC_GFX_c0)) |
6168c2e0 | 1103 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc); |
a99d8730 | 1104 | if (DO_BIC(BIC_CPUGFX)) |
6168c2e0 | 1105 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc); |
0b2bb692 | 1106 | |
0f47c08d | 1107 | if (DO_BIC(BIC_Pkgpc2)) |
6168c2e0 | 1108 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc); |
0f47c08d | 1109 | if (DO_BIC(BIC_Pkgpc3)) |
6168c2e0 | 1110 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc); |
0f47c08d | 1111 | if (DO_BIC(BIC_Pkgpc6)) |
6168c2e0 | 1112 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc); |
0f47c08d | 1113 | if (DO_BIC(BIC_Pkgpc7)) |
6168c2e0 | 1114 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc); |
0f47c08d | 1115 | if (DO_BIC(BIC_Pkgpc8)) |
6168c2e0 | 1116 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc); |
0f47c08d | 1117 | if (DO_BIC(BIC_Pkgpc9)) |
6168c2e0 | 1118 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc); |
0f47c08d | 1119 | if (DO_BIC(BIC_Pkgpc10)) |
6168c2e0 | 1120 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc); |
889facbe | 1121 | |
be0e54c4 LB |
1122 | if (DO_BIC(BIC_CPU_LPI)) |
1123 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float); | |
1124 | if (DO_BIC(BIC_SYS_LPI)) | |
1125 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float); | |
1126 | ||
812db3f7 | 1127 | if (DO_BIC(BIC_PkgWatt)) |
6168c2e0 | 1128 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float); |
9392bd98 | 1129 | if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY)) |
6168c2e0 | 1130 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float); |
812db3f7 | 1131 | if (DO_BIC(BIC_GFXWatt)) |
6168c2e0 | 1132 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float); |
812db3f7 | 1133 | if (DO_BIC(BIC_RAMWatt)) |
6168c2e0 | 1134 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float); |
812db3f7 | 1135 | if (DO_BIC(BIC_Pkg_J)) |
6168c2e0 | 1136 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units); |
9392bd98 | 1137 | if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY)) |
6168c2e0 | 1138 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units); |
812db3f7 | 1139 | if (DO_BIC(BIC_GFX_J)) |
6168c2e0 | 1140 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units); |
812db3f7 | 1141 | if (DO_BIC(BIC_RAM_J)) |
6168c2e0 | 1142 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units); |
812db3f7 | 1143 | if (DO_BIC(BIC_PKG__)) |
6168c2e0 | 1144 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float); |
812db3f7 | 1145 | if (DO_BIC(BIC_RAM__)) |
6168c2e0 | 1146 | outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float); |
812db3f7 | 1147 | |
388e9c81 LB |
1148 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { |
1149 | if (mp->format == FORMAT_RAW) { | |
1150 | if (mp->width == 32) | |
5f3aea57 | 1151 | outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]); |
388e9c81 | 1152 | else |
6168c2e0 | 1153 | outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]); |
388e9c81 | 1154 | } else if (mp->format == FORMAT_DELTA) { |
0de6c0df | 1155 | if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns) |
6168c2e0 | 1156 | outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]); |
0de6c0df | 1157 | else |
6168c2e0 | 1158 | outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]); |
388e9c81 | 1159 | } else if (mp->format == FORMAT_PERCENT) { |
6168c2e0 | 1160 | outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc); |
388e9c81 LB |
1161 | } |
1162 | } | |
1163 | ||
c98d5d94 | 1164 | done: |
94d6ab4b LB |
1165 | if (*(outp - 1) != '\n') |
1166 | outp += sprintf(outp, "\n"); | |
c98d5d94 LB |
1167 | |
1168 | return 0; | |
103a8fea LB |
1169 | } |
1170 | ||
b7d8c148 | 1171 | void flush_output_stdout(void) |
c98d5d94 | 1172 | { |
b7d8c148 LB |
1173 | FILE *filep; |
1174 | ||
1175 | if (outf == stderr) | |
1176 | filep = stdout; | |
1177 | else | |
1178 | filep = outf; | |
1179 | ||
1180 | fputs(output_buffer, filep); | |
1181 | fflush(filep); | |
1182 | ||
c98d5d94 LB |
1183 | outp = output_buffer; |
1184 | } | |
b7d8c148 | 1185 | void flush_output_stderr(void) |
c98d5d94 | 1186 | { |
b7d8c148 LB |
1187 | fputs(output_buffer, outf); |
1188 | fflush(outf); | |
c98d5d94 LB |
1189 | outp = output_buffer; |
1190 | } | |
1191 | void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
103a8fea | 1192 | { |
e23da037 | 1193 | static int printed; |
103a8fea | 1194 | |
e23da037 | 1195 | if (!printed || !summary_only) |
c8ade361 | 1196 | print_header("\t"); |
103a8fea | 1197 | |
9d83601a | 1198 | format_counters(&average.threads, &average.cores, &average.packages); |
103a8fea | 1199 | |
e23da037 LB |
1200 | printed = 1; |
1201 | ||
1202 | if (summary_only) | |
1203 | return; | |
1204 | ||
c98d5d94 | 1205 | for_all_cpus(format_counters, t, c, p); |
103a8fea LB |
1206 | } |
1207 | ||
889facbe LB |
1208 | #define DELTA_WRAP32(new, old) \ |
1209 | if (new > old) { \ | |
1210 | old = new - old; \ | |
1211 | } else { \ | |
1212 | old = 0x100000000 + new - old; \ | |
1213 | } | |
1214 | ||
ba3dec99 | 1215 | int |
c98d5d94 LB |
1216 | delta_package(struct pkg_data *new, struct pkg_data *old) |
1217 | { | |
388e9c81 LB |
1218 | int i; |
1219 | struct msr_counter *mp; | |
0b2bb692 | 1220 | |
a99d8730 LB |
1221 | |
1222 | if (DO_BIC(BIC_Totl_c0)) | |
0b2bb692 | 1223 | old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0; |
a99d8730 | 1224 | if (DO_BIC(BIC_Any_c0)) |
0b2bb692 | 1225 | old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0; |
a99d8730 | 1226 | if (DO_BIC(BIC_GFX_c0)) |
0b2bb692 | 1227 | old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0; |
a99d8730 | 1228 | if (DO_BIC(BIC_CPUGFX)) |
0b2bb692 | 1229 | old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0; |
a99d8730 | 1230 | |
c98d5d94 | 1231 | old->pc2 = new->pc2 - old->pc2; |
0f47c08d | 1232 | if (DO_BIC(BIC_Pkgpc3)) |
ee7e38e3 | 1233 | old->pc3 = new->pc3 - old->pc3; |
0f47c08d | 1234 | if (DO_BIC(BIC_Pkgpc6)) |
ee7e38e3 | 1235 | old->pc6 = new->pc6 - old->pc6; |
0f47c08d | 1236 | if (DO_BIC(BIC_Pkgpc7)) |
ee7e38e3 | 1237 | old->pc7 = new->pc7 - old->pc7; |
ca58710f KCA |
1238 | old->pc8 = new->pc8 - old->pc8; |
1239 | old->pc9 = new->pc9 - old->pc9; | |
1240 | old->pc10 = new->pc10 - old->pc10; | |
be0e54c4 LB |
1241 | old->cpu_lpi = new->cpu_lpi - old->cpu_lpi; |
1242 | old->sys_lpi = new->sys_lpi - old->sys_lpi; | |
889facbe LB |
1243 | old->pkg_temp_c = new->pkg_temp_c; |
1244 | ||
9185e988 LB |
1245 | /* flag an error when rc6 counter resets/wraps */ |
1246 | if (old->gfx_rc6_ms > new->gfx_rc6_ms) | |
1247 | old->gfx_rc6_ms = -1; | |
1248 | else | |
1249 | old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms; | |
1250 | ||
27d47356 LB |
1251 | old->gfx_mhz = new->gfx_mhz; |
1252 | ||
889facbe LB |
1253 | DELTA_WRAP32(new->energy_pkg, old->energy_pkg); |
1254 | DELTA_WRAP32(new->energy_cores, old->energy_cores); | |
1255 | DELTA_WRAP32(new->energy_gfx, old->energy_gfx); | |
1256 | DELTA_WRAP32(new->energy_dram, old->energy_dram); | |
1257 | DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status); | |
1258 | DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status); | |
ba3dec99 | 1259 | |
388e9c81 LB |
1260 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { |
1261 | if (mp->format == FORMAT_RAW) | |
1262 | old->counter[i] = new->counter[i]; | |
1263 | else | |
1264 | old->counter[i] = new->counter[i] - old->counter[i]; | |
1265 | } | |
1266 | ||
ba3dec99 | 1267 | return 0; |
c98d5d94 | 1268 | } |
103a8fea | 1269 | |
c98d5d94 LB |
1270 | void |
1271 | delta_core(struct core_data *new, struct core_data *old) | |
103a8fea | 1272 | { |
388e9c81 LB |
1273 | int i; |
1274 | struct msr_counter *mp; | |
1275 | ||
c98d5d94 LB |
1276 | old->c3 = new->c3 - old->c3; |
1277 | old->c6 = new->c6 - old->c6; | |
1278 | old->c7 = new->c7 - old->c7; | |
889facbe | 1279 | old->core_temp_c = new->core_temp_c; |
0539ba11 | 1280 | old->mc6_us = new->mc6_us - old->mc6_us; |
388e9c81 | 1281 | |
9392bd98 CW |
1282 | DELTA_WRAP32(new->core_energy, old->core_energy); |
1283 | ||
388e9c81 LB |
1284 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
1285 | if (mp->format == FORMAT_RAW) | |
1286 | old->counter[i] = new->counter[i]; | |
1287 | else | |
1288 | old->counter[i] = new->counter[i] - old->counter[i]; | |
1289 | } | |
c98d5d94 | 1290 | } |
103a8fea | 1291 | |
1e9042b9 SP |
1292 | int soft_c1_residency_display(int bic) |
1293 | { | |
1294 | if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr) | |
1295 | return 0; | |
1296 | ||
1297 | return DO_BIC_READ(bic); | |
1298 | } | |
1299 | ||
c3ae331d LB |
1300 | /* |
1301 | * old = new - old | |
1302 | */ | |
ba3dec99 | 1303 | int |
c98d5d94 LB |
1304 | delta_thread(struct thread_data *new, struct thread_data *old, |
1305 | struct core_data *core_delta) | |
1306 | { | |
388e9c81 LB |
1307 | int i; |
1308 | struct msr_counter *mp; | |
1309 | ||
4c2122d4 LB |
1310 | /* we run cpuid just the 1st time, copy the results */ |
1311 | if (DO_BIC(BIC_APIC)) | |
1312 | new->apic_id = old->apic_id; | |
1313 | if (DO_BIC(BIC_X2APIC)) | |
1314 | new->x2apic_id = old->x2apic_id; | |
1315 | ||
3f44a5c6 LB |
1316 | /* |
1317 | * the timestamps from start of measurement interval are in "old" | |
1318 | * the timestamp from end of measurement interval are in "new" | |
1319 | * over-write old w/ new so we can print end of interval values | |
1320 | */ | |
1321 | ||
d4794f25 | 1322 | timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta); |
3f44a5c6 LB |
1323 | old->tv_begin = new->tv_begin; |
1324 | old->tv_end = new->tv_end; | |
1325 | ||
c98d5d94 LB |
1326 | old->tsc = new->tsc - old->tsc; |
1327 | ||
1328 | /* check for TSC < 1 Mcycles over interval */ | |
b2c95d90 JT |
1329 | if (old->tsc < (1000 * 1000)) |
1330 | errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n" | |
1331 | "You can disable all c-states by booting with \"idle=poll\"\n" | |
1332 | "or just the deep ones with \"processor.max_cstate=1\""); | |
103a8fea | 1333 | |
c98d5d94 | 1334 | old->c1 = new->c1 - old->c1; |
103a8fea | 1335 | |
1e9042b9 SP |
1336 | if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) || |
1337 | soft_c1_residency_display(BIC_Avg_MHz)) { | |
a729617c LB |
1338 | if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) { |
1339 | old->aperf = new->aperf - old->aperf; | |
1340 | old->mperf = new->mperf - old->mperf; | |
1341 | } else { | |
ba3dec99 | 1342 | return -1; |
103a8fea | 1343 | } |
c98d5d94 | 1344 | } |
103a8fea | 1345 | |
103a8fea | 1346 | |
144b44b1 LB |
1347 | if (use_c1_residency_msr) { |
1348 | /* | |
1349 | * Some models have a dedicated C1 residency MSR, | |
1350 | * which should be more accurate than the derivation below. | |
1351 | */ | |
1352 | } else { | |
1353 | /* | |
1354 | * As counter collection is not atomic, | |
1355 | * it is possible for mperf's non-halted cycles + idle states | |
1356 | * to exceed TSC's all cycles: show c1 = 0% in that case. | |
1357 | */ | |
95149369 | 1358 | if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak)) |
144b44b1 LB |
1359 | old->c1 = 0; |
1360 | else { | |
1361 | /* normal case, derive c1 */ | |
008d396e | 1362 | old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3 |
c98d5d94 | 1363 | - core_delta->c6 - core_delta->c7; |
144b44b1 | 1364 | } |
c98d5d94 | 1365 | } |
c3ae331d | 1366 | |
c98d5d94 | 1367 | if (old->mperf == 0) { |
b7d8c148 LB |
1368 | if (debug > 1) |
1369 | fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id); | |
c98d5d94 | 1370 | old->mperf = 1; /* divide by 0 protection */ |
103a8fea | 1371 | } |
c98d5d94 | 1372 | |
812db3f7 | 1373 | if (DO_BIC(BIC_IRQ)) |
562a2d37 LB |
1374 | old->irq_count = new->irq_count - old->irq_count; |
1375 | ||
812db3f7 | 1376 | if (DO_BIC(BIC_SMI)) |
1ed51011 | 1377 | old->smi_count = new->smi_count - old->smi_count; |
ba3dec99 | 1378 | |
388e9c81 LB |
1379 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { |
1380 | if (mp->format == FORMAT_RAW) | |
1381 | old->counter[i] = new->counter[i]; | |
1382 | else | |
1383 | old->counter[i] = new->counter[i] - old->counter[i]; | |
1384 | } | |
ba3dec99 | 1385 | return 0; |
c98d5d94 LB |
1386 | } |
1387 | ||
1388 | int delta_cpu(struct thread_data *t, struct core_data *c, | |
1389 | struct pkg_data *p, struct thread_data *t2, | |
1390 | struct core_data *c2, struct pkg_data *p2) | |
1391 | { | |
ba3dec99 LB |
1392 | int retval = 0; |
1393 | ||
c98d5d94 LB |
1394 | /* calculate core delta only for 1st thread in core */ |
1395 | if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE) | |
1396 | delta_core(c, c2); | |
1397 | ||
1398 | /* always calculate thread delta */ | |
ba3dec99 LB |
1399 | retval = delta_thread(t, t2, c2); /* c2 is core delta */ |
1400 | if (retval) | |
1401 | return retval; | |
c98d5d94 LB |
1402 | |
1403 | /* calculate package delta only for 1st core in package */ | |
1404 | if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE) | |
ba3dec99 | 1405 | retval = delta_package(p, p2); |
c98d5d94 | 1406 | |
ba3dec99 | 1407 | return retval; |
103a8fea LB |
1408 | } |
1409 | ||
c98d5d94 LB |
1410 | void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
1411 | { | |
388e9c81 LB |
1412 | int i; |
1413 | struct msr_counter *mp; | |
1414 | ||
3f44a5c6 LB |
1415 | t->tv_begin.tv_sec = 0; |
1416 | t->tv_begin.tv_usec = 0; | |
1417 | t->tv_end.tv_sec = 0; | |
1418 | t->tv_end.tv_usec = 0; | |
d4794f25 YG |
1419 | t->tv_delta.tv_sec = 0; |
1420 | t->tv_delta.tv_usec = 0; | |
3f44a5c6 | 1421 | |
c98d5d94 LB |
1422 | t->tsc = 0; |
1423 | t->aperf = 0; | |
1424 | t->mperf = 0; | |
1425 | t->c1 = 0; | |
1426 | ||
562a2d37 LB |
1427 | t->irq_count = 0; |
1428 | t->smi_count = 0; | |
1429 | ||
c98d5d94 LB |
1430 | /* tells format_counters to dump all fields from this set */ |
1431 | t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE; | |
1432 | ||
1433 | c->c3 = 0; | |
1434 | c->c6 = 0; | |
1435 | c->c7 = 0; | |
0539ba11 | 1436 | c->mc6_us = 0; |
889facbe | 1437 | c->core_temp_c = 0; |
9392bd98 | 1438 | c->core_energy = 0; |
c98d5d94 | 1439 | |
0b2bb692 LB |
1440 | p->pkg_wtd_core_c0 = 0; |
1441 | p->pkg_any_core_c0 = 0; | |
1442 | p->pkg_any_gfxe_c0 = 0; | |
1443 | p->pkg_both_core_gfxe_c0 = 0; | |
1444 | ||
c98d5d94 | 1445 | p->pc2 = 0; |
0f47c08d | 1446 | if (DO_BIC(BIC_Pkgpc3)) |
ee7e38e3 | 1447 | p->pc3 = 0; |
0f47c08d | 1448 | if (DO_BIC(BIC_Pkgpc6)) |
ee7e38e3 | 1449 | p->pc6 = 0; |
0f47c08d | 1450 | if (DO_BIC(BIC_Pkgpc7)) |
ee7e38e3 | 1451 | p->pc7 = 0; |
ca58710f KCA |
1452 | p->pc8 = 0; |
1453 | p->pc9 = 0; | |
1454 | p->pc10 = 0; | |
be0e54c4 LB |
1455 | p->cpu_lpi = 0; |
1456 | p->sys_lpi = 0; | |
889facbe LB |
1457 | |
1458 | p->energy_pkg = 0; | |
1459 | p->energy_dram = 0; | |
1460 | p->energy_cores = 0; | |
1461 | p->energy_gfx = 0; | |
1462 | p->rapl_pkg_perf_status = 0; | |
1463 | p->rapl_dram_perf_status = 0; | |
1464 | p->pkg_temp_c = 0; | |
27d47356 | 1465 | |
fdf676e5 | 1466 | p->gfx_rc6_ms = 0; |
27d47356 | 1467 | p->gfx_mhz = 0; |
388e9c81 LB |
1468 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) |
1469 | t->counter[i] = 0; | |
1470 | ||
1471 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) | |
1472 | c->counter[i] = 0; | |
1473 | ||
1474 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) | |
1475 | p->counter[i] = 0; | |
c98d5d94 LB |
1476 | } |
1477 | int sum_counters(struct thread_data *t, struct core_data *c, | |
1478 | struct pkg_data *p) | |
103a8fea | 1479 | { |
388e9c81 LB |
1480 | int i; |
1481 | struct msr_counter *mp; | |
1482 | ||
4c2122d4 LB |
1483 | /* copy un-changing apic_id's */ |
1484 | if (DO_BIC(BIC_APIC)) | |
1485 | average.threads.apic_id = t->apic_id; | |
1486 | if (DO_BIC(BIC_X2APIC)) | |
1487 | average.threads.x2apic_id = t->x2apic_id; | |
1488 | ||
3f44a5c6 LB |
1489 | /* remember first tv_begin */ |
1490 | if (average.threads.tv_begin.tv_sec == 0) | |
1491 | average.threads.tv_begin = t->tv_begin; | |
1492 | ||
1493 | /* remember last tv_end */ | |
1494 | average.threads.tv_end = t->tv_end; | |
1495 | ||
c98d5d94 LB |
1496 | average.threads.tsc += t->tsc; |
1497 | average.threads.aperf += t->aperf; | |
1498 | average.threads.mperf += t->mperf; | |
1499 | average.threads.c1 += t->c1; | |
103a8fea | 1500 | |
562a2d37 LB |
1501 | average.threads.irq_count += t->irq_count; |
1502 | average.threads.smi_count += t->smi_count; | |
1503 | ||
388e9c81 LB |
1504 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { |
1505 | if (mp->format == FORMAT_RAW) | |
1506 | continue; | |
1507 | average.threads.counter[i] += t->counter[i]; | |
1508 | } | |
1509 | ||
c98d5d94 LB |
1510 | /* sum per-core values only for 1st thread in core */ |
1511 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
1512 | return 0; | |
103a8fea | 1513 | |
c98d5d94 LB |
1514 | average.cores.c3 += c->c3; |
1515 | average.cores.c6 += c->c6; | |
1516 | average.cores.c7 += c->c7; | |
0539ba11 | 1517 | average.cores.mc6_us += c->mc6_us; |
c98d5d94 | 1518 | |
889facbe LB |
1519 | average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c); |
1520 | ||
9392bd98 CW |
1521 | average.cores.core_energy += c->core_energy; |
1522 | ||
388e9c81 LB |
1523 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
1524 | if (mp->format == FORMAT_RAW) | |
1525 | continue; | |
1526 | average.cores.counter[i] += c->counter[i]; | |
1527 | } | |
1528 | ||
c98d5d94 LB |
1529 | /* sum per-pkg values only for 1st core in pkg */ |
1530 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
1531 | return 0; | |
1532 | ||
a99d8730 | 1533 | if (DO_BIC(BIC_Totl_c0)) |
0b2bb692 | 1534 | average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0; |
a99d8730 | 1535 | if (DO_BIC(BIC_Any_c0)) |
0b2bb692 | 1536 | average.packages.pkg_any_core_c0 += p->pkg_any_core_c0; |
a99d8730 | 1537 | if (DO_BIC(BIC_GFX_c0)) |
0b2bb692 | 1538 | average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0; |
a99d8730 | 1539 | if (DO_BIC(BIC_CPUGFX)) |
0b2bb692 | 1540 | average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0; |
0b2bb692 | 1541 | |
c98d5d94 | 1542 | average.packages.pc2 += p->pc2; |
0f47c08d | 1543 | if (DO_BIC(BIC_Pkgpc3)) |
ee7e38e3 | 1544 | average.packages.pc3 += p->pc3; |
0f47c08d | 1545 | if (DO_BIC(BIC_Pkgpc6)) |
ee7e38e3 | 1546 | average.packages.pc6 += p->pc6; |
0f47c08d | 1547 | if (DO_BIC(BIC_Pkgpc7)) |
ee7e38e3 | 1548 | average.packages.pc7 += p->pc7; |
ca58710f KCA |
1549 | average.packages.pc8 += p->pc8; |
1550 | average.packages.pc9 += p->pc9; | |
1551 | average.packages.pc10 += p->pc10; | |
c98d5d94 | 1552 | |
be0e54c4 LB |
1553 | average.packages.cpu_lpi = p->cpu_lpi; |
1554 | average.packages.sys_lpi = p->sys_lpi; | |
1555 | ||
889facbe LB |
1556 | average.packages.energy_pkg += p->energy_pkg; |
1557 | average.packages.energy_dram += p->energy_dram; | |
1558 | average.packages.energy_cores += p->energy_cores; | |
1559 | average.packages.energy_gfx += p->energy_gfx; | |
1560 | ||
fdf676e5 | 1561 | average.packages.gfx_rc6_ms = p->gfx_rc6_ms; |
27d47356 LB |
1562 | average.packages.gfx_mhz = p->gfx_mhz; |
1563 | ||
889facbe LB |
1564 | average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c); |
1565 | ||
1566 | average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status; | |
1567 | average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status; | |
388e9c81 LB |
1568 | |
1569 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { | |
1570 | if (mp->format == FORMAT_RAW) | |
1571 | continue; | |
1572 | average.packages.counter[i] += p->counter[i]; | |
1573 | } | |
c98d5d94 LB |
1574 | return 0; |
1575 | } | |
1576 | /* | |
1577 | * sum the counters for all cpus in the system | |
1578 | * compute the weighted average | |
1579 | */ | |
1580 | void compute_average(struct thread_data *t, struct core_data *c, | |
1581 | struct pkg_data *p) | |
1582 | { | |
388e9c81 LB |
1583 | int i; |
1584 | struct msr_counter *mp; | |
1585 | ||
c98d5d94 LB |
1586 | clear_counters(&average.threads, &average.cores, &average.packages); |
1587 | ||
1588 | for_all_cpus(sum_counters, t, c, p); | |
1589 | ||
d4794f25 YG |
1590 | /* Use the global time delta for the average. */ |
1591 | average.threads.tv_delta = tv_delta; | |
1592 | ||
c98d5d94 LB |
1593 | average.threads.tsc /= topo.num_cpus; |
1594 | average.threads.aperf /= topo.num_cpus; | |
1595 | average.threads.mperf /= topo.num_cpus; | |
1596 | average.threads.c1 /= topo.num_cpus; | |
1597 | ||
0de6c0df LB |
1598 | if (average.threads.irq_count > 9999999) |
1599 | sums_need_wide_columns = 1; | |
1600 | ||
c98d5d94 LB |
1601 | average.cores.c3 /= topo.num_cores; |
1602 | average.cores.c6 /= topo.num_cores; | |
1603 | average.cores.c7 /= topo.num_cores; | |
0539ba11 | 1604 | average.cores.mc6_us /= topo.num_cores; |
c98d5d94 | 1605 | |
a99d8730 | 1606 | if (DO_BIC(BIC_Totl_c0)) |
0b2bb692 | 1607 | average.packages.pkg_wtd_core_c0 /= topo.num_packages; |
a99d8730 | 1608 | if (DO_BIC(BIC_Any_c0)) |
0b2bb692 | 1609 | average.packages.pkg_any_core_c0 /= topo.num_packages; |
a99d8730 | 1610 | if (DO_BIC(BIC_GFX_c0)) |
0b2bb692 | 1611 | average.packages.pkg_any_gfxe_c0 /= topo.num_packages; |
a99d8730 | 1612 | if (DO_BIC(BIC_CPUGFX)) |
0b2bb692 | 1613 | average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages; |
0b2bb692 | 1614 | |
c98d5d94 | 1615 | average.packages.pc2 /= topo.num_packages; |
0f47c08d | 1616 | if (DO_BIC(BIC_Pkgpc3)) |
ee7e38e3 | 1617 | average.packages.pc3 /= topo.num_packages; |
0f47c08d | 1618 | if (DO_BIC(BIC_Pkgpc6)) |
ee7e38e3 | 1619 | average.packages.pc6 /= topo.num_packages; |
0f47c08d | 1620 | if (DO_BIC(BIC_Pkgpc7)) |
ee7e38e3 | 1621 | average.packages.pc7 /= topo.num_packages; |
ca58710f KCA |
1622 | |
1623 | average.packages.pc8 /= topo.num_packages; | |
1624 | average.packages.pc9 /= topo.num_packages; | |
1625 | average.packages.pc10 /= topo.num_packages; | |
388e9c81 LB |
1626 | |
1627 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { | |
1628 | if (mp->format == FORMAT_RAW) | |
1629 | continue; | |
0de6c0df LB |
1630 | if (mp->type == COUNTER_ITEMS) { |
1631 | if (average.threads.counter[i] > 9999999) | |
1632 | sums_need_wide_columns = 1; | |
41618e63 | 1633 | continue; |
0de6c0df | 1634 | } |
388e9c81 LB |
1635 | average.threads.counter[i] /= topo.num_cpus; |
1636 | } | |
1637 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { | |
1638 | if (mp->format == FORMAT_RAW) | |
1639 | continue; | |
0de6c0df LB |
1640 | if (mp->type == COUNTER_ITEMS) { |
1641 | if (average.cores.counter[i] > 9999999) | |
1642 | sums_need_wide_columns = 1; | |
1643 | } | |
388e9c81 LB |
1644 | average.cores.counter[i] /= topo.num_cores; |
1645 | } | |
1646 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { | |
1647 | if (mp->format == FORMAT_RAW) | |
1648 | continue; | |
0de6c0df LB |
1649 | if (mp->type == COUNTER_ITEMS) { |
1650 | if (average.packages.counter[i] > 9999999) | |
1651 | sums_need_wide_columns = 1; | |
1652 | } | |
388e9c81 LB |
1653 | average.packages.counter[i] /= topo.num_packages; |
1654 | } | |
103a8fea LB |
1655 | } |
1656 | ||
c98d5d94 | 1657 | static unsigned long long rdtsc(void) |
103a8fea | 1658 | { |
c98d5d94 | 1659 | unsigned int low, high; |
15aaa346 | 1660 | |
c98d5d94 | 1661 | asm volatile("rdtsc" : "=a" (low), "=d" (high)); |
15aaa346 | 1662 | |
c98d5d94 LB |
1663 | return low | ((unsigned long long)high) << 32; |
1664 | } | |
15aaa346 | 1665 | |
495c7654 LB |
1666 | /* |
1667 | * Open a file, and exit on failure | |
1668 | */ | |
1669 | FILE *fopen_or_die(const char *path, const char *mode) | |
1670 | { | |
1671 | FILE *filep = fopen(path, mode); | |
1672 | ||
1673 | if (!filep) | |
1674 | err(1, "%s: open failed", path); | |
1675 | return filep; | |
1676 | } | |
1677 | /* | |
1678 | * snapshot_sysfs_counter() | |
1679 | * | |
1680 | * return snapshot of given counter | |
1681 | */ | |
1682 | unsigned long long snapshot_sysfs_counter(char *path) | |
1683 | { | |
1684 | FILE *fp; | |
1685 | int retval; | |
1686 | unsigned long long counter; | |
1687 | ||
1688 | fp = fopen_or_die(path, "r"); | |
1689 | ||
1690 | retval = fscanf(fp, "%lld", &counter); | |
1691 | if (retval != 1) | |
1692 | err(1, "snapshot_sysfs_counter(%s)", path); | |
1693 | ||
1694 | fclose(fp); | |
1695 | ||
1696 | return counter; | |
1697 | } | |
1698 | ||
1699 | int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp) | |
1700 | { | |
1701 | if (mp->msr_num != 0) { | |
1702 | if (get_msr(cpu, mp->msr_num, counterp)) | |
1703 | return -1; | |
1704 | } else { | |
46c27978 | 1705 | char path[128 + PATH_BYTES]; |
41618e63 LB |
1706 | |
1707 | if (mp->flags & SYSFS_PERCPU) { | |
1708 | sprintf(path, "/sys/devices/system/cpu/cpu%d/%s", | |
1709 | cpu, mp->path); | |
1710 | ||
1711 | *counterp = snapshot_sysfs_counter(path); | |
1712 | } else { | |
1713 | *counterp = snapshot_sysfs_counter(mp->path); | |
1714 | } | |
495c7654 LB |
1715 | } |
1716 | ||
1717 | return 0; | |
1718 | } | |
1719 | ||
4c2122d4 LB |
1720 | void get_apic_id(struct thread_data *t) |
1721 | { | |
34041551 | 1722 | unsigned int eax, ebx, ecx, edx; |
4c2122d4 | 1723 | |
34041551 LB |
1724 | if (DO_BIC(BIC_APIC)) { |
1725 | eax = ebx = ecx = edx = 0; | |
1726 | __cpuid(1, eax, ebx, ecx, edx); | |
4c2122d4 | 1727 | |
34041551 LB |
1728 | t->apic_id = (ebx >> 24) & 0xff; |
1729 | } | |
1730 | ||
1731 | if (!DO_BIC(BIC_X2APIC)) | |
4c2122d4 LB |
1732 | return; |
1733 | ||
c1c10cc7 | 1734 | if (authentic_amd || hygon_genuine) { |
34041551 | 1735 | unsigned int topology_extensions; |
4c2122d4 | 1736 | |
34041551 LB |
1737 | if (max_extended_level < 0x8000001e) |
1738 | return; | |
4c2122d4 | 1739 | |
34041551 LB |
1740 | eax = ebx = ecx = edx = 0; |
1741 | __cpuid(0x80000001, eax, ebx, ecx, edx); | |
1742 | topology_extensions = ecx & (1 << 22); | |
1743 | ||
1744 | if (topology_extensions == 0) | |
1745 | return; | |
1746 | ||
1747 | eax = ebx = ecx = edx = 0; | |
1748 | __cpuid(0x8000001e, eax, ebx, ecx, edx); | |
1749 | ||
1750 | t->x2apic_id = eax; | |
4c2122d4 | 1751 | return; |
34041551 | 1752 | } |
4c2122d4 | 1753 | |
34041551 LB |
1754 | if (!genuine_intel) |
1755 | return; | |
1756 | ||
1757 | if (max_level < 0xb) | |
4c2122d4 LB |
1758 | return; |
1759 | ||
1760 | ecx = 0; | |
1761 | __cpuid(0xb, eax, ebx, ecx, edx); | |
1762 | t->x2apic_id = edx; | |
1763 | ||
34041551 LB |
1764 | if (debug && (t->apic_id != (t->x2apic_id & 0xff))) |
1765 | fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n", | |
1766 | t->cpu_id, t->apic_id, t->x2apic_id); | |
4c2122d4 LB |
1767 | } |
1768 | ||
c98d5d94 LB |
1769 | /* |
1770 | * get_counters(...) | |
1771 | * migrate to cpu | |
1772 | * acquire and record local counters for that cpu | |
1773 | */ | |
1774 | int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
1775 | { | |
1776 | int cpu = t->cpu_id; | |
889facbe | 1777 | unsigned long long msr; |
0102b067 | 1778 | int aperf_mperf_retry_count = 0; |
388e9c81 LB |
1779 | struct msr_counter *mp; |
1780 | int i; | |
88c3281f | 1781 | |
e52966c0 | 1782 | if (cpu_migrate(cpu)) { |
b7d8c148 | 1783 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
c98d5d94 | 1784 | return -1; |
e52966c0 | 1785 | } |
15aaa346 | 1786 | |
d4794f25 YG |
1787 | gettimeofday(&t->tv_begin, (struct timezone *)NULL); |
1788 | ||
4c2122d4 LB |
1789 | if (first_counter_read) |
1790 | get_apic_id(t); | |
0102b067 | 1791 | retry: |
c98d5d94 LB |
1792 | t->tsc = rdtsc(); /* we are running on local CPU of interest */ |
1793 | ||
1e9042b9 SP |
1794 | if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) || |
1795 | soft_c1_residency_display(BIC_Avg_MHz)) { | |
0102b067 LB |
1796 | unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time; |
1797 | ||
1798 | /* | |
1799 | * The TSC, APERF and MPERF must be read together for | |
1800 | * APERF/MPERF and MPERF/TSC to give accurate results. | |
1801 | * | |
1802 | * Unfortunately, APERF and MPERF are read by | |
1803 | * individual system call, so delays may occur | |
1804 | * between them. If the time to read them | |
1805 | * varies by a large amount, we re-read them. | |
1806 | */ | |
1807 | ||
1808 | /* | |
1809 | * This initial dummy APERF read has been seen to | |
1810 | * reduce jitter in the subsequent reads. | |
1811 | */ | |
1812 | ||
1813 | if (get_msr(cpu, MSR_IA32_APERF, &t->aperf)) | |
1814 | return -3; | |
1815 | ||
1816 | t->tsc = rdtsc(); /* re-read close to APERF */ | |
1817 | ||
1818 | tsc_before = t->tsc; | |
1819 | ||
9c63a650 | 1820 | if (get_msr(cpu, MSR_IA32_APERF, &t->aperf)) |
c98d5d94 | 1821 | return -3; |
0102b067 LB |
1822 | |
1823 | tsc_between = rdtsc(); | |
1824 | ||
9c63a650 | 1825 | if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf)) |
c98d5d94 | 1826 | return -4; |
0102b067 LB |
1827 | |
1828 | tsc_after = rdtsc(); | |
1829 | ||
1830 | aperf_time = tsc_between - tsc_before; | |
1831 | mperf_time = tsc_after - tsc_between; | |
1832 | ||
1833 | /* | |
1834 | * If the system call latency to read APERF and MPERF | |
1835 | * differ by more than 2x, then try again. | |
1836 | */ | |
1837 | if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) { | |
1838 | aperf_mperf_retry_count++; | |
1839 | if (aperf_mperf_retry_count < 5) | |
1840 | goto retry; | |
1841 | else | |
1842 | warnx("cpu%d jitter %lld %lld", | |
1843 | cpu, aperf_time, mperf_time); | |
1844 | } | |
1845 | aperf_mperf_retry_count = 0; | |
1846 | ||
b2b34dfe HC |
1847 | t->aperf = t->aperf * aperf_mperf_multiplier; |
1848 | t->mperf = t->mperf * aperf_mperf_multiplier; | |
c98d5d94 LB |
1849 | } |
1850 | ||
812db3f7 | 1851 | if (DO_BIC(BIC_IRQ)) |
562a2d37 | 1852 | t->irq_count = irqs_per_cpu[cpu]; |
812db3f7 | 1853 | if (DO_BIC(BIC_SMI)) { |
1ed51011 LB |
1854 | if (get_msr(cpu, MSR_SMI_COUNT, &msr)) |
1855 | return -5; | |
1856 | t->smi_count = msr & 0xFFFFFFFF; | |
1857 | } | |
0539ba11 | 1858 | if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) { |
144b44b1 LB |
1859 | if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1)) |
1860 | return -6; | |
1861 | } | |
1862 | ||
388e9c81 | 1863 | for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) { |
495c7654 | 1864 | if (get_mp(cpu, mp, &t->counter[i])) |
388e9c81 LB |
1865 | return -10; |
1866 | } | |
1867 | ||
c98d5d94 LB |
1868 | /* collect core counters only for 1st thread in core */ |
1869 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
f4fdf2b4 | 1870 | goto done; |
c98d5d94 | 1871 | |
1e9042b9 | 1872 | if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) { |
c98d5d94 LB |
1873 | if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3)) |
1874 | return -6; | |
144b44b1 LB |
1875 | } |
1876 | ||
1e9042b9 | 1877 | if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) { |
c98d5d94 LB |
1878 | if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6)) |
1879 | return -7; | |
1e9042b9 | 1880 | } else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) { |
fb5d4327 DC |
1881 | if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6)) |
1882 | return -7; | |
c98d5d94 LB |
1883 | } |
1884 | ||
1e9042b9 | 1885 | if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7)) |
c98d5d94 LB |
1886 | if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7)) |
1887 | return -8; | |
1888 | ||
0539ba11 LB |
1889 | if (DO_BIC(BIC_Mod_c6)) |
1890 | if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us)) | |
1891 | return -8; | |
1892 | ||
812db3f7 | 1893 | if (DO_BIC(BIC_CoreTmp)) { |
889facbe LB |
1894 | if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) |
1895 | return -9; | |
1896 | c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); | |
1897 | } | |
1898 | ||
9392bd98 CW |
1899 | if (do_rapl & RAPL_AMD_F17H) { |
1900 | if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr)) | |
1901 | return -14; | |
1902 | c->core_energy = msr & 0xFFFFFFFF; | |
1903 | } | |
1904 | ||
388e9c81 | 1905 | for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) { |
495c7654 | 1906 | if (get_mp(cpu, mp, &c->counter[i])) |
388e9c81 LB |
1907 | return -10; |
1908 | } | |
889facbe | 1909 | |
c98d5d94 LB |
1910 | /* collect package counters only for 1st core in package */ |
1911 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
f4fdf2b4 | 1912 | goto done; |
c98d5d94 | 1913 | |
a99d8730 | 1914 | if (DO_BIC(BIC_Totl_c0)) { |
0b2bb692 LB |
1915 | if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0)) |
1916 | return -10; | |
a99d8730 LB |
1917 | } |
1918 | if (DO_BIC(BIC_Any_c0)) { | |
0b2bb692 LB |
1919 | if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0)) |
1920 | return -11; | |
a99d8730 LB |
1921 | } |
1922 | if (DO_BIC(BIC_GFX_c0)) { | |
0b2bb692 LB |
1923 | if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0)) |
1924 | return -12; | |
a99d8730 LB |
1925 | } |
1926 | if (DO_BIC(BIC_CPUGFX)) { | |
0b2bb692 LB |
1927 | if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0)) |
1928 | return -13; | |
1929 | } | |
0f47c08d | 1930 | if (DO_BIC(BIC_Pkgpc3)) |
c98d5d94 LB |
1931 | if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3)) |
1932 | return -9; | |
0f47c08d | 1933 | if (DO_BIC(BIC_Pkgpc6)) { |
0539ba11 LB |
1934 | if (do_slm_cstates) { |
1935 | if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6)) | |
1936 | return -10; | |
1937 | } else { | |
1938 | if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6)) | |
1939 | return -10; | |
1940 | } | |
1941 | } | |
1942 | ||
0f47c08d | 1943 | if (DO_BIC(BIC_Pkgpc2)) |
c98d5d94 LB |
1944 | if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2)) |
1945 | return -11; | |
0f47c08d | 1946 | if (DO_BIC(BIC_Pkgpc7)) |
c98d5d94 LB |
1947 | if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7)) |
1948 | return -12; | |
0f47c08d | 1949 | if (DO_BIC(BIC_Pkgpc8)) |
ca58710f KCA |
1950 | if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8)) |
1951 | return -13; | |
0f47c08d | 1952 | if (DO_BIC(BIC_Pkgpc9)) |
ca58710f KCA |
1953 | if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9)) |
1954 | return -13; | |
0f47c08d | 1955 | if (DO_BIC(BIC_Pkgpc10)) |
ca58710f KCA |
1956 | if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10)) |
1957 | return -13; | |
0f47c08d | 1958 | |
be0e54c4 LB |
1959 | if (DO_BIC(BIC_CPU_LPI)) |
1960 | p->cpu_lpi = cpuidle_cur_cpu_lpi_us; | |
1961 | if (DO_BIC(BIC_SYS_LPI)) | |
1962 | p->sys_lpi = cpuidle_cur_sys_lpi_us; | |
1963 | ||
889facbe LB |
1964 | if (do_rapl & RAPL_PKG) { |
1965 | if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr)) | |
1966 | return -13; | |
1967 | p->energy_pkg = msr & 0xFFFFFFFF; | |
1968 | } | |
9148494c | 1969 | if (do_rapl & RAPL_CORES_ENERGY_STATUS) { |
889facbe LB |
1970 | if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr)) |
1971 | return -14; | |
1972 | p->energy_cores = msr & 0xFFFFFFFF; | |
1973 | } | |
1974 | if (do_rapl & RAPL_DRAM) { | |
1975 | if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr)) | |
1976 | return -15; | |
1977 | p->energy_dram = msr & 0xFFFFFFFF; | |
1978 | } | |
1979 | if (do_rapl & RAPL_GFX) { | |
1980 | if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr)) | |
1981 | return -16; | |
1982 | p->energy_gfx = msr & 0xFFFFFFFF; | |
1983 | } | |
1984 | if (do_rapl & RAPL_PKG_PERF_STATUS) { | |
1985 | if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr)) | |
1986 | return -16; | |
1987 | p->rapl_pkg_perf_status = msr & 0xFFFFFFFF; | |
1988 | } | |
1989 | if (do_rapl & RAPL_DRAM_PERF_STATUS) { | |
1990 | if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr)) | |
1991 | return -16; | |
1992 | p->rapl_dram_perf_status = msr & 0xFFFFFFFF; | |
1993 | } | |
3316f99a CW |
1994 | if (do_rapl & RAPL_AMD_F17H) { |
1995 | if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr)) | |
1996 | return -13; | |
1997 | p->energy_pkg = msr & 0xFFFFFFFF; | |
1998 | } | |
812db3f7 | 1999 | if (DO_BIC(BIC_PkgTmp)) { |
889facbe LB |
2000 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) |
2001 | return -17; | |
2002 | p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); | |
2003 | } | |
fdf676e5 | 2004 | |
812db3f7 | 2005 | if (DO_BIC(BIC_GFX_rc6)) |
fdf676e5 LB |
2006 | p->gfx_rc6_ms = gfx_cur_rc6_ms; |
2007 | ||
812db3f7 | 2008 | if (DO_BIC(BIC_GFXMHz)) |
27d47356 LB |
2009 | p->gfx_mhz = gfx_cur_mhz; |
2010 | ||
388e9c81 | 2011 | for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) { |
495c7654 | 2012 | if (get_mp(cpu, mp, &p->counter[i])) |
388e9c81 LB |
2013 | return -10; |
2014 | } | |
f4fdf2b4 LB |
2015 | done: |
2016 | gettimeofday(&t->tv_end, (struct timezone *)NULL); | |
388e9c81 | 2017 | |
15aaa346 | 2018 | return 0; |
103a8fea LB |
2019 | } |
2020 | ||
ee7e38e3 LB |
2021 | /* |
2022 | * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit: | |
2023 | * If you change the values, note they are used both in comparisons | |
2024 | * (>= PCL__7) and to index pkg_cstate_limit_strings[]. | |
2025 | */ | |
2026 | ||
2027 | #define PCLUKN 0 /* Unknown */ | |
2028 | #define PCLRSV 1 /* Reserved */ | |
2029 | #define PCL__0 2 /* PC0 */ | |
2030 | #define PCL__1 3 /* PC1 */ | |
2031 | #define PCL__2 4 /* PC2 */ | |
2032 | #define PCL__3 5 /* PC3 */ | |
2033 | #define PCL__4 6 /* PC4 */ | |
2034 | #define PCL__6 7 /* PC6 */ | |
2035 | #define PCL_6N 8 /* PC6 No Retention */ | |
2036 | #define PCL_6R 9 /* PC6 Retention */ | |
2037 | #define PCL__7 10 /* PC7 */ | |
2038 | #define PCL_7S 11 /* PC7 Shrink */ | |
0b2bb692 LB |
2039 | #define PCL__8 12 /* PC8 */ |
2040 | #define PCL__9 13 /* PC9 */ | |
445640a5 LB |
2041 | #define PCL_10 14 /* PC10 */ |
2042 | #define PCLUNL 15 /* Unlimited */ | |
ee7e38e3 LB |
2043 | |
2044 | int pkg_cstate_limit = PCLUKN; | |
2045 | char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2", | |
445640a5 | 2046 | "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"}; |
ee7e38e3 | 2047 | |
e9257f5f LB |
2048 | int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; |
2049 | int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; | |
2050 | int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; | |
0539ba11 | 2051 | int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7}; |
f2642888 | 2052 | int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; |
e9257f5f | 2053 | int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; |
445640a5 | 2054 | int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; |
2085e124 | 2055 | int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV}; |
ee7e38e3 | 2056 | |
a2b7b749 LB |
2057 | |
2058 | static void | |
2059 | calculate_tsc_tweak() | |
2060 | { | |
a2b7b749 LB |
2061 | tsc_tweak = base_hz / tsc_hz; |
2062 | } | |
2063 | ||
fcd17211 LB |
2064 | static void |
2065 | dump_nhm_platform_info(void) | |
103a8fea LB |
2066 | { |
2067 | unsigned long long msr; | |
2068 | unsigned int ratio; | |
2069 | ||
ec0adc53 | 2070 | get_msr(base_cpu, MSR_PLATFORM_INFO, &msr); |
103a8fea | 2071 | |
b7d8c148 | 2072 | fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr); |
6574a5d5 | 2073 | |
103a8fea | 2074 | ratio = (msr >> 40) & 0xFF; |
710f273b | 2075 | fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n", |
103a8fea LB |
2076 | ratio, bclk, ratio * bclk); |
2077 | ||
2078 | ratio = (msr >> 8) & 0xFF; | |
710f273b | 2079 | fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n", |
103a8fea LB |
2080 | ratio, bclk, ratio * bclk); |
2081 | ||
7ce7d5de | 2082 | get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr); |
b7d8c148 | 2083 | fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n", |
bfae2052 | 2084 | base_cpu, msr, msr & 0x2 ? "EN" : "DIS"); |
67920418 | 2085 | |
fcd17211 LB |
2086 | return; |
2087 | } | |
2088 | ||
2089 | static void | |
2090 | dump_hsw_turbo_ratio_limits(void) | |
2091 | { | |
2092 | unsigned long long msr; | |
2093 | unsigned int ratio; | |
2094 | ||
7ce7d5de | 2095 | get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr); |
fcd17211 | 2096 | |
b7d8c148 | 2097 | fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr); |
fcd17211 LB |
2098 | |
2099 | ratio = (msr >> 8) & 0xFF; | |
2100 | if (ratio) | |
710f273b | 2101 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n", |
fcd17211 LB |
2102 | ratio, bclk, ratio * bclk); |
2103 | ||
2104 | ratio = (msr >> 0) & 0xFF; | |
2105 | if (ratio) | |
710f273b | 2106 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n", |
fcd17211 LB |
2107 | ratio, bclk, ratio * bclk); |
2108 | return; | |
2109 | } | |
2110 | ||
2111 | static void | |
2112 | dump_ivt_turbo_ratio_limits(void) | |
2113 | { | |
2114 | unsigned long long msr; | |
2115 | unsigned int ratio; | |
6574a5d5 | 2116 | |
7ce7d5de | 2117 | get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr); |
6574a5d5 | 2118 | |
b7d8c148 | 2119 | fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr); |
6574a5d5 LB |
2120 | |
2121 | ratio = (msr >> 56) & 0xFF; | |
2122 | if (ratio) | |
710f273b | 2123 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n", |
6574a5d5 LB |
2124 | ratio, bclk, ratio * bclk); |
2125 | ||
2126 | ratio = (msr >> 48) & 0xFF; | |
2127 | if (ratio) | |
710f273b | 2128 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n", |
6574a5d5 LB |
2129 | ratio, bclk, ratio * bclk); |
2130 | ||
2131 | ratio = (msr >> 40) & 0xFF; | |
2132 | if (ratio) | |
710f273b | 2133 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n", |
6574a5d5 LB |
2134 | ratio, bclk, ratio * bclk); |
2135 | ||
2136 | ratio = (msr >> 32) & 0xFF; | |
2137 | if (ratio) | |
710f273b | 2138 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n", |
6574a5d5 LB |
2139 | ratio, bclk, ratio * bclk); |
2140 | ||
2141 | ratio = (msr >> 24) & 0xFF; | |
2142 | if (ratio) | |
710f273b | 2143 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n", |
6574a5d5 LB |
2144 | ratio, bclk, ratio * bclk); |
2145 | ||
2146 | ratio = (msr >> 16) & 0xFF; | |
2147 | if (ratio) | |
710f273b | 2148 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n", |
6574a5d5 LB |
2149 | ratio, bclk, ratio * bclk); |
2150 | ||
2151 | ratio = (msr >> 8) & 0xFF; | |
2152 | if (ratio) | |
710f273b | 2153 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n", |
6574a5d5 LB |
2154 | ratio, bclk, ratio * bclk); |
2155 | ||
2156 | ratio = (msr >> 0) & 0xFF; | |
2157 | if (ratio) | |
710f273b | 2158 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n", |
6574a5d5 | 2159 | ratio, bclk, ratio * bclk); |
fcd17211 LB |
2160 | return; |
2161 | } | |
31e07522 LB |
2162 | int has_turbo_ratio_group_limits(int family, int model) |
2163 | { | |
2164 | ||
2165 | if (!genuine_intel) | |
2166 | return 0; | |
2167 | ||
2168 | switch (model) { | |
2169 | case INTEL_FAM6_ATOM_GOLDMONT: | |
2170 | case INTEL_FAM6_SKYLAKE_X: | |
5ebb34ed | 2171 | case INTEL_FAM6_ATOM_GOLDMONT_D: |
31e07522 LB |
2172 | return 1; |
2173 | } | |
2174 | return 0; | |
2175 | } | |
6574a5d5 | 2176 | |
fcd17211 | 2177 | static void |
31e07522 | 2178 | dump_turbo_ratio_limits(int family, int model) |
fcd17211 | 2179 | { |
31e07522 LB |
2180 | unsigned long long msr, core_counts; |
2181 | unsigned int ratio, group_size; | |
103a8fea | 2182 | |
7ce7d5de | 2183 | get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); |
b7d8c148 | 2184 | fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr); |
6574a5d5 | 2185 | |
31e07522 LB |
2186 | if (has_turbo_ratio_group_limits(family, model)) { |
2187 | get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts); | |
2188 | fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts); | |
2189 | } else { | |
2190 | core_counts = 0x0807060504030201; | |
2191 | } | |
2192 | ||
6574a5d5 | 2193 | ratio = (msr >> 56) & 0xFF; |
31e07522 | 2194 | group_size = (core_counts >> 56) & 0xFF; |
6574a5d5 | 2195 | if (ratio) |
31e07522 LB |
2196 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2197 | ratio, bclk, ratio * bclk, group_size); | |
6574a5d5 LB |
2198 | |
2199 | ratio = (msr >> 48) & 0xFF; | |
31e07522 | 2200 | group_size = (core_counts >> 48) & 0xFF; |
6574a5d5 | 2201 | if (ratio) |
31e07522 LB |
2202 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2203 | ratio, bclk, ratio * bclk, group_size); | |
6574a5d5 LB |
2204 | |
2205 | ratio = (msr >> 40) & 0xFF; | |
31e07522 | 2206 | group_size = (core_counts >> 40) & 0xFF; |
6574a5d5 | 2207 | if (ratio) |
31e07522 LB |
2208 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2209 | ratio, bclk, ratio * bclk, group_size); | |
6574a5d5 LB |
2210 | |
2211 | ratio = (msr >> 32) & 0xFF; | |
31e07522 | 2212 | group_size = (core_counts >> 32) & 0xFF; |
6574a5d5 | 2213 | if (ratio) |
31e07522 LB |
2214 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2215 | ratio, bclk, ratio * bclk, group_size); | |
6574a5d5 | 2216 | |
103a8fea | 2217 | ratio = (msr >> 24) & 0xFF; |
31e07522 | 2218 | group_size = (core_counts >> 24) & 0xFF; |
103a8fea | 2219 | if (ratio) |
31e07522 LB |
2220 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2221 | ratio, bclk, ratio * bclk, group_size); | |
103a8fea LB |
2222 | |
2223 | ratio = (msr >> 16) & 0xFF; | |
31e07522 | 2224 | group_size = (core_counts >> 16) & 0xFF; |
103a8fea | 2225 | if (ratio) |
31e07522 LB |
2226 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2227 | ratio, bclk, ratio * bclk, group_size); | |
103a8fea LB |
2228 | |
2229 | ratio = (msr >> 8) & 0xFF; | |
31e07522 | 2230 | group_size = (core_counts >> 8) & 0xFF; |
103a8fea | 2231 | if (ratio) |
31e07522 LB |
2232 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2233 | ratio, bclk, ratio * bclk, group_size); | |
103a8fea LB |
2234 | |
2235 | ratio = (msr >> 0) & 0xFF; | |
31e07522 | 2236 | group_size = (core_counts >> 0) & 0xFF; |
103a8fea | 2237 | if (ratio) |
31e07522 LB |
2238 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
2239 | ratio, bclk, ratio * bclk, group_size); | |
fcd17211 LB |
2240 | return; |
2241 | } | |
3a9a941d | 2242 | |
0f7887c4 LB |
2243 | static void |
2244 | dump_atom_turbo_ratio_limits(void) | |
2245 | { | |
2246 | unsigned long long msr; | |
2247 | unsigned int ratio; | |
2248 | ||
2249 | get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr); | |
2250 | fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); | |
2251 | ||
2252 | ratio = (msr >> 0) & 0x3F; | |
2253 | if (ratio) | |
2254 | fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n", | |
2255 | ratio, bclk, ratio * bclk); | |
2256 | ||
2257 | ratio = (msr >> 8) & 0x3F; | |
2258 | if (ratio) | |
2259 | fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n", | |
2260 | ratio, bclk, ratio * bclk); | |
2261 | ||
2262 | ratio = (msr >> 16) & 0x3F; | |
2263 | if (ratio) | |
2264 | fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n", | |
2265 | ratio, bclk, ratio * bclk); | |
2266 | ||
2267 | get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr); | |
2268 | fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); | |
2269 | ||
2270 | ratio = (msr >> 24) & 0x3F; | |
2271 | if (ratio) | |
2272 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n", | |
2273 | ratio, bclk, ratio * bclk); | |
2274 | ||
2275 | ratio = (msr >> 16) & 0x3F; | |
2276 | if (ratio) | |
2277 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n", | |
2278 | ratio, bclk, ratio * bclk); | |
2279 | ||
2280 | ratio = (msr >> 8) & 0x3F; | |
2281 | if (ratio) | |
2282 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n", | |
2283 | ratio, bclk, ratio * bclk); | |
2284 | ||
2285 | ratio = (msr >> 0) & 0x3F; | |
2286 | if (ratio) | |
2287 | fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n", | |
2288 | ratio, bclk, ratio * bclk); | |
2289 | } | |
2290 | ||
fb5d4327 DC |
2291 | static void |
2292 | dump_knl_turbo_ratio_limits(void) | |
2293 | { | |
cbf97aba HC |
2294 | const unsigned int buckets_no = 7; |
2295 | ||
fb5d4327 | 2296 | unsigned long long msr; |
cbf97aba HC |
2297 | int delta_cores, delta_ratio; |
2298 | int i, b_nr; | |
2299 | unsigned int cores[buckets_no]; | |
2300 | unsigned int ratio[buckets_no]; | |
fb5d4327 | 2301 | |
ebf5926a | 2302 | get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr); |
fb5d4327 | 2303 | |
b7d8c148 | 2304 | fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", |
bfae2052 | 2305 | base_cpu, msr); |
fb5d4327 DC |
2306 | |
2307 | /** | |
2308 | * Turbo encoding in KNL is as follows: | |
cbf97aba HC |
2309 | * [0] -- Reserved |
2310 | * [7:1] -- Base value of number of active cores of bucket 1. | |
fb5d4327 DC |
2311 | * [15:8] -- Base value of freq ratio of bucket 1. |
2312 | * [20:16] -- +ve delta of number of active cores of bucket 2. | |
2313 | * i.e. active cores of bucket 2 = | |
2314 | * active cores of bucket 1 + delta | |
2315 | * [23:21] -- Negative delta of freq ratio of bucket 2. | |
2316 | * i.e. freq ratio of bucket 2 = | |
2317 | * freq ratio of bucket 1 - delta | |
2318 | * [28:24]-- +ve delta of number of active cores of bucket 3. | |
2319 | * [31:29]-- -ve delta of freq ratio of bucket 3. | |
2320 | * [36:32]-- +ve delta of number of active cores of bucket 4. | |
2321 | * [39:37]-- -ve delta of freq ratio of bucket 4. | |
2322 | * [44:40]-- +ve delta of number of active cores of bucket 5. | |
2323 | * [47:45]-- -ve delta of freq ratio of bucket 5. | |
2324 | * [52:48]-- +ve delta of number of active cores of bucket 6. | |
2325 | * [55:53]-- -ve delta of freq ratio of bucket 6. | |
2326 | * [60:56]-- +ve delta of number of active cores of bucket 7. | |
2327 | * [63:61]-- -ve delta of freq ratio of bucket 7. | |
2328 | */ | |
cbf97aba HC |
2329 | |
2330 | b_nr = 0; | |
2331 | cores[b_nr] = (msr & 0xFF) >> 1; | |
2332 | ratio[b_nr] = (msr >> 8) & 0xFF; | |
2333 | ||
2334 | for (i = 16; i < 64; i += 8) { | |
fb5d4327 | 2335 | delta_cores = (msr >> i) & 0x1F; |
cbf97aba HC |
2336 | delta_ratio = (msr >> (i + 5)) & 0x7; |
2337 | ||
2338 | cores[b_nr + 1] = cores[b_nr] + delta_cores; | |
2339 | ratio[b_nr + 1] = ratio[b_nr] - delta_ratio; | |
2340 | b_nr++; | |
fb5d4327 | 2341 | } |
cbf97aba HC |
2342 | |
2343 | for (i = buckets_no - 1; i >= 0; i--) | |
2344 | if (i > 0 ? ratio[i] != ratio[i - 1] : 1) | |
b7d8c148 | 2345 | fprintf(outf, |
710f273b | 2346 | "%d * %.1f = %.1f MHz max turbo %d active cores\n", |
cbf97aba | 2347 | ratio[i], bclk, ratio[i] * bclk, cores[i]); |
fb5d4327 DC |
2348 | } |
2349 | ||
fcd17211 LB |
2350 | static void |
2351 | dump_nhm_cst_cfg(void) | |
2352 | { | |
2353 | unsigned long long msr; | |
2354 | ||
1df2e55a | 2355 | get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr); |
fcd17211 | 2356 | |
1df2e55a | 2357 | fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr); |
fcd17211 | 2358 | |
3e8b62bf | 2359 | fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)", |
fcd17211 LB |
2360 | (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "", |
2361 | (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "", | |
2362 | (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "", | |
2363 | (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "", | |
2364 | (msr & (1 << 15)) ? "" : "UN", | |
6c34f160 | 2365 | (unsigned int)msr & 0xF, |
fcd17211 | 2366 | pkg_cstate_limit_strings[pkg_cstate_limit]); |
ac980e13 AB |
2367 | |
2368 | #define AUTOMATIC_CSTATE_CONVERSION (1UL << 16) | |
2369 | if (has_automatic_cstate_conversion) { | |
2370 | fprintf(outf, ", automatic c-state conversion=%s", | |
2371 | (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off"); | |
2372 | } | |
2373 | ||
2374 | fprintf(outf, ")\n"); | |
2375 | ||
fcd17211 | 2376 | return; |
103a8fea LB |
2377 | } |
2378 | ||
6fb3143b LB |
2379 | static void |
2380 | dump_config_tdp(void) | |
2381 | { | |
2382 | unsigned long long msr; | |
2383 | ||
2384 | get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr); | |
b7d8c148 | 2385 | fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr); |
685b535b | 2386 | fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF); |
6fb3143b LB |
2387 | |
2388 | get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr); | |
b7d8c148 | 2389 | fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr); |
6fb3143b | 2390 | if (msr) { |
685b535b CY |
2391 | fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF); |
2392 | fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF); | |
2393 | fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF); | |
2394 | fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF); | |
6fb3143b | 2395 | } |
b7d8c148 | 2396 | fprintf(outf, ")\n"); |
6fb3143b LB |
2397 | |
2398 | get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr); | |
b7d8c148 | 2399 | fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr); |
6fb3143b | 2400 | if (msr) { |
685b535b CY |
2401 | fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF); |
2402 | fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF); | |
2403 | fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF); | |
2404 | fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF); | |
6fb3143b | 2405 | } |
b7d8c148 | 2406 | fprintf(outf, ")\n"); |
6fb3143b LB |
2407 | |
2408 | get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr); | |
b7d8c148 | 2409 | fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr); |
6fb3143b | 2410 | if ((msr) & 0x3) |
b7d8c148 LB |
2411 | fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3); |
2412 | fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1); | |
2413 | fprintf(outf, ")\n"); | |
36229897 | 2414 | |
6fb3143b | 2415 | get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr); |
b7d8c148 | 2416 | fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr); |
685b535b | 2417 | fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF); |
b7d8c148 LB |
2418 | fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1); |
2419 | fprintf(outf, ")\n"); | |
6fb3143b | 2420 | } |
5a63426e LB |
2421 | |
2422 | unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 }; | |
2423 | ||
2424 | void print_irtl(void) | |
2425 | { | |
2426 | unsigned long long msr; | |
2427 | ||
2428 | get_msr(base_cpu, MSR_PKGC3_IRTL, &msr); | |
2429 | fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr); | |
2430 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2431 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2432 | ||
2433 | get_msr(base_cpu, MSR_PKGC6_IRTL, &msr); | |
2434 | fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr); | |
2435 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2436 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2437 | ||
2438 | get_msr(base_cpu, MSR_PKGC7_IRTL, &msr); | |
2439 | fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr); | |
2440 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2441 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2442 | ||
2443 | if (!do_irtl_hsw) | |
2444 | return; | |
2445 | ||
2446 | get_msr(base_cpu, MSR_PKGC8_IRTL, &msr); | |
2447 | fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr); | |
2448 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2449 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2450 | ||
2451 | get_msr(base_cpu, MSR_PKGC9_IRTL, &msr); | |
2452 | fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr); | |
2453 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2454 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2455 | ||
2456 | get_msr(base_cpu, MSR_PKGC10_IRTL, &msr); | |
2457 | fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr); | |
2458 | fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT", | |
2459 | (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]); | |
2460 | ||
2461 | } | |
36229897 LB |
2462 | void free_fd_percpu(void) |
2463 | { | |
2464 | int i; | |
2465 | ||
01a67adf | 2466 | for (i = 0; i < topo.max_cpu_num + 1; ++i) { |
36229897 LB |
2467 | if (fd_percpu[i] != 0) |
2468 | close(fd_percpu[i]); | |
2469 | } | |
2470 | ||
2471 | free(fd_percpu); | |
6fb3143b LB |
2472 | } |
2473 | ||
c98d5d94 | 2474 | void free_all_buffers(void) |
103a8fea | 2475 | { |
0e2d8f05 LB |
2476 | int i; |
2477 | ||
c98d5d94 LB |
2478 | CPU_FREE(cpu_present_set); |
2479 | cpu_present_set = NULL; | |
36229897 | 2480 | cpu_present_setsize = 0; |
103a8fea | 2481 | |
c98d5d94 LB |
2482 | CPU_FREE(cpu_affinity_set); |
2483 | cpu_affinity_set = NULL; | |
2484 | cpu_affinity_setsize = 0; | |
103a8fea | 2485 | |
c98d5d94 LB |
2486 | free(thread_even); |
2487 | free(core_even); | |
2488 | free(package_even); | |
103a8fea | 2489 | |
c98d5d94 LB |
2490 | thread_even = NULL; |
2491 | core_even = NULL; | |
2492 | package_even = NULL; | |
103a8fea | 2493 | |
c98d5d94 LB |
2494 | free(thread_odd); |
2495 | free(core_odd); | |
2496 | free(package_odd); | |
103a8fea | 2497 | |
c98d5d94 LB |
2498 | thread_odd = NULL; |
2499 | core_odd = NULL; | |
2500 | package_odd = NULL; | |
103a8fea | 2501 | |
c98d5d94 LB |
2502 | free(output_buffer); |
2503 | output_buffer = NULL; | |
2504 | outp = NULL; | |
36229897 LB |
2505 | |
2506 | free_fd_percpu(); | |
562a2d37 LB |
2507 | |
2508 | free(irq_column_2_cpu); | |
2509 | free(irqs_per_cpu); | |
0e2d8f05 LB |
2510 | |
2511 | for (i = 0; i <= topo.max_cpu_num; ++i) { | |
2512 | if (cpus[i].put_ids) | |
2513 | CPU_FREE(cpus[i].put_ids); | |
2514 | } | |
2515 | free(cpus); | |
103a8fea LB |
2516 | } |
2517 | ||
57a42a34 | 2518 | |
c98d5d94 | 2519 | /* |
95aebc44 | 2520 | * Parse a file containing a single int. |
6de68fe1 LB |
2521 | * Return 0 if file can not be opened |
2522 | * Exit if file can be opened, but can not be parsed | |
c98d5d94 | 2523 | */ |
95aebc44 | 2524 | int parse_int_file(const char *fmt, ...) |
103a8fea | 2525 | { |
95aebc44 JT |
2526 | va_list args; |
2527 | char path[PATH_MAX]; | |
c98d5d94 | 2528 | FILE *filep; |
95aebc44 | 2529 | int value; |
103a8fea | 2530 | |
95aebc44 JT |
2531 | va_start(args, fmt); |
2532 | vsnprintf(path, sizeof(path), fmt, args); | |
2533 | va_end(args); | |
6de68fe1 LB |
2534 | filep = fopen(path, "r"); |
2535 | if (!filep) | |
2536 | return 0; | |
b2c95d90 JT |
2537 | if (fscanf(filep, "%d", &value) != 1) |
2538 | err(1, "%s: failed to parse number from file", path); | |
c98d5d94 | 2539 | fclose(filep); |
95aebc44 JT |
2540 | return value; |
2541 | } | |
2542 | ||
c98d5d94 LB |
2543 | /* |
2544 | * cpu_is_first_core_in_package(cpu) | |
2545 | * return 1 if given CPU is 1st core in package | |
2546 | */ | |
2547 | int cpu_is_first_core_in_package(int cpu) | |
103a8fea | 2548 | { |
95aebc44 | 2549 | return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu); |
103a8fea LB |
2550 | } |
2551 | ||
2552 | int get_physical_package_id(int cpu) | |
2553 | { | |
95aebc44 | 2554 | return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu); |
103a8fea LB |
2555 | } |
2556 | ||
6de68fe1 LB |
2557 | int get_die_id(int cpu) |
2558 | { | |
2559 | return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu); | |
2560 | } | |
2561 | ||
103a8fea LB |
2562 | int get_core_id(int cpu) |
2563 | { | |
95aebc44 | 2564 | return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu); |
103a8fea LB |
2565 | } |
2566 | ||
ef605741 PB |
2567 | void set_node_data(void) |
2568 | { | |
2ffbb224 PB |
2569 | int pkg, node, lnode, cpu, cpux; |
2570 | int cpu_count; | |
2571 | ||
2572 | /* initialize logical_node_id */ | |
2573 | for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) | |
2574 | cpus[cpu].logical_node_id = -1; | |
2575 | ||
2576 | cpu_count = 0; | |
2577 | for (pkg = 0; pkg < topo.num_packages; pkg++) { | |
2578 | lnode = 0; | |
2579 | for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) { | |
2580 | if (cpus[cpu].physical_package_id != pkg) | |
2581 | continue; | |
2582 | /* find a cpu with an unset logical_node_id */ | |
2583 | if (cpus[cpu].logical_node_id != -1) | |
2584 | continue; | |
2585 | cpus[cpu].logical_node_id = lnode; | |
2586 | node = cpus[cpu].physical_node_id; | |
2587 | cpu_count++; | |
2588 | /* | |
2589 | * find all matching cpus on this pkg and set | |
2590 | * the logical_node_id | |
2591 | */ | |
2592 | for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) { | |
2593 | if ((cpus[cpux].physical_package_id == pkg) && | |
2594 | (cpus[cpux].physical_node_id == node)) { | |
2595 | cpus[cpux].logical_node_id = lnode; | |
2596 | cpu_count++; | |
2597 | } | |
2598 | } | |
2599 | lnode++; | |
2600 | if (lnode > topo.nodes_per_pkg) | |
2601 | topo.nodes_per_pkg = lnode; | |
2602 | } | |
2603 | if (cpu_count >= topo.max_cpu_num) | |
2604 | break; | |
ef605741 | 2605 | } |
ef605741 PB |
2606 | } |
2607 | ||
2608 | int get_physical_node_id(struct cpu_topology *thiscpu) | |
c98d5d94 LB |
2609 | { |
2610 | char path[80]; | |
2611 | FILE *filep; | |
0e2d8f05 LB |
2612 | int i; |
2613 | int cpu = thiscpu->logical_cpu_id; | |
e275b388 | 2614 | |
0e2d8f05 LB |
2615 | for (i = 0; i <= topo.max_cpu_num; i++) { |
2616 | sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist", | |
2617 | cpu, i); | |
2618 | filep = fopen(path, "r"); | |
2619 | if (!filep) | |
2620 | continue; | |
2621 | fclose(filep); | |
2622 | return i; | |
e275b388 | 2623 | } |
0e2d8f05 LB |
2624 | return -1; |
2625 | } | |
c98d5d94 | 2626 | |
0e2d8f05 LB |
2627 | int get_thread_siblings(struct cpu_topology *thiscpu) |
2628 | { | |
2629 | char path[80], character; | |
2630 | FILE *filep; | |
2631 | unsigned long map; | |
8cb48b32 | 2632 | int so, shift, sib_core; |
0e2d8f05 LB |
2633 | int cpu = thiscpu->logical_cpu_id; |
2634 | int offset = topo.max_cpu_num + 1; | |
2635 | size_t size; | |
8cb48b32 | 2636 | int thread_id = 0; |
0e2d8f05 LB |
2637 | |
2638 | thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1)); | |
8cb48b32 PB |
2639 | if (thiscpu->thread_id < 0) |
2640 | thiscpu->thread_id = thread_id++; | |
0e2d8f05 LB |
2641 | if (!thiscpu->put_ids) |
2642 | return -1; | |
2643 | ||
2644 | size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1)); | |
2645 | CPU_ZERO_S(size, thiscpu->put_ids); | |
2646 | ||
2647 | sprintf(path, | |
2648 | "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu); | |
2649 | filep = fopen_or_die(path, "r"); | |
2650 | do { | |
2651 | offset -= BITMASK_SIZE; | |
8173c336 BH |
2652 | if (fscanf(filep, "%lx%c", &map, &character) != 2) |
2653 | err(1, "%s: failed to parse file", path); | |
0e2d8f05 LB |
2654 | for (shift = 0; shift < BITMASK_SIZE; shift++) { |
2655 | if ((map >> shift) & 0x1) { | |
8cb48b32 PB |
2656 | so = shift + offset; |
2657 | sib_core = get_core_id(so); | |
2658 | if (sib_core == thiscpu->physical_core_id) { | |
2659 | CPU_SET_S(so, size, thiscpu->put_ids); | |
2660 | if ((so != cpu) && | |
2661 | (cpus[so].thread_id < 0)) | |
2662 | cpus[so].thread_id = | |
2663 | thread_id++; | |
2664 | } | |
0e2d8f05 LB |
2665 | } |
2666 | } | |
2667 | } while (!strncmp(&character, ",", 1)); | |
c98d5d94 | 2668 | fclose(filep); |
0e2d8f05 LB |
2669 | |
2670 | return CPU_COUNT_S(size, thiscpu->put_ids); | |
c98d5d94 LB |
2671 | } |
2672 | ||
103a8fea | 2673 | /* |
c98d5d94 LB |
2674 | * run func(thread, core, package) in topology order |
2675 | * skip non-present cpus | |
103a8fea LB |
2676 | */ |
2677 | ||
c98d5d94 LB |
2678 | int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *, |
2679 | struct pkg_data *, struct thread_data *, struct core_data *, | |
2680 | struct pkg_data *), struct thread_data *thread_base, | |
2681 | struct core_data *core_base, struct pkg_data *pkg_base, | |
2682 | struct thread_data *thread_base2, struct core_data *core_base2, | |
2683 | struct pkg_data *pkg_base2) | |
2684 | { | |
40f5cfe7 | 2685 | int retval, pkg_no, node_no, core_no, thread_no; |
c98d5d94 LB |
2686 | |
2687 | for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) { | |
40f5cfe7 PB |
2688 | for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) { |
2689 | for (core_no = 0; core_no < topo.cores_per_node; | |
2690 | ++core_no) { | |
2691 | for (thread_no = 0; thread_no < | |
2692 | topo.threads_per_core; ++thread_no) { | |
2693 | struct thread_data *t, *t2; | |
2694 | struct core_data *c, *c2; | |
2695 | struct pkg_data *p, *p2; | |
2696 | ||
2697 | t = GET_THREAD(thread_base, thread_no, | |
2698 | core_no, node_no, | |
2699 | pkg_no); | |
2700 | ||
2701 | if (cpu_is_not_present(t->cpu_id)) | |
2702 | continue; | |
2703 | ||
2704 | t2 = GET_THREAD(thread_base2, thread_no, | |
2705 | core_no, node_no, | |
2706 | pkg_no); | |
2707 | ||
2708 | c = GET_CORE(core_base, core_no, | |
2709 | node_no, pkg_no); | |
2710 | c2 = GET_CORE(core_base2, core_no, | |
2711 | node_no, | |
2712 | pkg_no); | |
2713 | ||
2714 | p = GET_PKG(pkg_base, pkg_no); | |
2715 | p2 = GET_PKG(pkg_base2, pkg_no); | |
2716 | ||
2717 | retval = func(t, c, p, t2, c2, p2); | |
2718 | if (retval) | |
2719 | return retval; | |
2720 | } | |
c98d5d94 LB |
2721 | } |
2722 | } | |
2723 | } | |
2724 | return 0; | |
2725 | } | |
2726 | ||
2727 | /* | |
2728 | * run func(cpu) on every cpu in /proc/stat | |
2729 | * return max_cpu number | |
2730 | */ | |
2731 | int for_all_proc_cpus(int (func)(int)) | |
103a8fea LB |
2732 | { |
2733 | FILE *fp; | |
c98d5d94 | 2734 | int cpu_num; |
103a8fea LB |
2735 | int retval; |
2736 | ||
57a42a34 | 2737 | fp = fopen_or_die(proc_stat, "r"); |
103a8fea LB |
2738 | |
2739 | retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n"); | |
b2c95d90 JT |
2740 | if (retval != 0) |
2741 | err(1, "%s: failed to parse format", proc_stat); | |
103a8fea | 2742 | |
c98d5d94 LB |
2743 | while (1) { |
2744 | retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num); | |
103a8fea LB |
2745 | if (retval != 1) |
2746 | break; | |
2747 | ||
c98d5d94 LB |
2748 | retval = func(cpu_num); |
2749 | if (retval) { | |
2750 | fclose(fp); | |
2751 | return(retval); | |
2752 | } | |
103a8fea LB |
2753 | } |
2754 | fclose(fp); | |
c98d5d94 | 2755 | return 0; |
103a8fea LB |
2756 | } |
2757 | ||
2758 | void re_initialize(void) | |
2759 | { | |
c98d5d94 LB |
2760 | free_all_buffers(); |
2761 | setup_all_buffers(); | |
2762 | printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus); | |
103a8fea LB |
2763 | } |
2764 | ||
843c5791 PB |
2765 | void set_max_cpu_num(void) |
2766 | { | |
2767 | FILE *filep; | |
2768 | unsigned long dummy; | |
2769 | ||
2770 | topo.max_cpu_num = 0; | |
2771 | filep = fopen_or_die( | |
2772 | "/sys/devices/system/cpu/cpu0/topology/thread_siblings", | |
2773 | "r"); | |
2774 | while (fscanf(filep, "%lx,", &dummy) == 1) | |
0e2d8f05 | 2775 | topo.max_cpu_num += BITMASK_SIZE; |
843c5791 PB |
2776 | fclose(filep); |
2777 | topo.max_cpu_num--; /* 0 based */ | |
2778 | } | |
c98d5d94 | 2779 | |
103a8fea | 2780 | /* |
c98d5d94 LB |
2781 | * count_cpus() |
2782 | * remember the last one seen, it will be the max | |
103a8fea | 2783 | */ |
c98d5d94 | 2784 | int count_cpus(int cpu) |
103a8fea | 2785 | { |
843c5791 | 2786 | topo.num_cpus++; |
c98d5d94 LB |
2787 | return 0; |
2788 | } | |
2789 | int mark_cpu_present(int cpu) | |
2790 | { | |
2791 | CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set); | |
15aaa346 | 2792 | return 0; |
103a8fea LB |
2793 | } |
2794 | ||
8cb48b32 PB |
2795 | int init_thread_id(int cpu) |
2796 | { | |
2797 | cpus[cpu].thread_id = -1; | |
2798 | return 0; | |
2799 | } | |
2800 | ||
562a2d37 LB |
2801 | /* |
2802 | * snapshot_proc_interrupts() | |
2803 | * | |
2804 | * read and record summary of /proc/interrupts | |
2805 | * | |
2806 | * return 1 if config change requires a restart, else return 0 | |
2807 | */ | |
2808 | int snapshot_proc_interrupts(void) | |
2809 | { | |
2810 | static FILE *fp; | |
2811 | int column, retval; | |
2812 | ||
2813 | if (fp == NULL) | |
2814 | fp = fopen_or_die("/proc/interrupts", "r"); | |
2815 | else | |
2816 | rewind(fp); | |
2817 | ||
2818 | /* read 1st line of /proc/interrupts to get cpu* name for each column */ | |
2819 | for (column = 0; column < topo.num_cpus; ++column) { | |
2820 | int cpu_number; | |
2821 | ||
2822 | retval = fscanf(fp, " CPU%d", &cpu_number); | |
2823 | if (retval != 1) | |
2824 | break; | |
2825 | ||
2826 | if (cpu_number > topo.max_cpu_num) { | |
2827 | warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num); | |
2828 | return 1; | |
2829 | } | |
2830 | ||
2831 | irq_column_2_cpu[column] = cpu_number; | |
2832 | irqs_per_cpu[cpu_number] = 0; | |
2833 | } | |
2834 | ||
2835 | /* read /proc/interrupt count lines and sum up irqs per cpu */ | |
2836 | while (1) { | |
2837 | int column; | |
2838 | char buf[64]; | |
2839 | ||
2840 | retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */ | |
2841 | if (retval != 1) | |
2842 | break; | |
2843 | ||
2844 | /* read the count per cpu */ | |
2845 | for (column = 0; column < topo.num_cpus; ++column) { | |
2846 | ||
2847 | int cpu_number, irq_count; | |
2848 | ||
2849 | retval = fscanf(fp, " %d", &irq_count); | |
2850 | if (retval != 1) | |
2851 | break; | |
2852 | ||
2853 | cpu_number = irq_column_2_cpu[column]; | |
2854 | irqs_per_cpu[cpu_number] += irq_count; | |
2855 | ||
2856 | } | |
2857 | ||
2858 | while (getc(fp) != '\n') | |
2859 | ; /* flush interrupt description */ | |
2860 | ||
2861 | } | |
2862 | return 0; | |
2863 | } | |
fdf676e5 LB |
2864 | /* |
2865 | * snapshot_gfx_rc6_ms() | |
2866 | * | |
2867 | * record snapshot of | |
2868 | * /sys/class/drm/card0/power/rc6_residency_ms | |
2869 | * | |
2870 | * return 1 if config change requires a restart, else return 0 | |
2871 | */ | |
2872 | int snapshot_gfx_rc6_ms(void) | |
2873 | { | |
2874 | FILE *fp; | |
2875 | int retval; | |
2876 | ||
2877 | fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r"); | |
2878 | ||
2879 | retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms); | |
2880 | if (retval != 1) | |
2881 | err(1, "GFX rc6"); | |
2882 | ||
2883 | fclose(fp); | |
2884 | ||
2885 | return 0; | |
2886 | } | |
27d47356 LB |
2887 | /* |
2888 | * snapshot_gfx_mhz() | |
2889 | * | |
2890 | * record snapshot of | |
2891 | * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz | |
2892 | * | |
2893 | * return 1 if config change requires a restart, else return 0 | |
2894 | */ | |
2895 | int snapshot_gfx_mhz(void) | |
2896 | { | |
2897 | static FILE *fp; | |
2898 | int retval; | |
2899 | ||
2900 | if (fp == NULL) | |
2901 | fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r"); | |
22048c54 | 2902 | else { |
27d47356 | 2903 | rewind(fp); |
22048c54 LB |
2904 | fflush(fp); |
2905 | } | |
27d47356 LB |
2906 | |
2907 | retval = fscanf(fp, "%d", &gfx_cur_mhz); | |
2908 | if (retval != 1) | |
2909 | err(1, "GFX MHz"); | |
2910 | ||
2911 | return 0; | |
2912 | } | |
562a2d37 | 2913 | |
be0e54c4 LB |
2914 | /* |
2915 | * snapshot_cpu_lpi() | |
2916 | * | |
2917 | * record snapshot of | |
2918 | * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us | |
2919 | * | |
2920 | * return 1 if config change requires a restart, else return 0 | |
2921 | */ | |
2922 | int snapshot_cpu_lpi_us(void) | |
2923 | { | |
2924 | FILE *fp; | |
2925 | int retval; | |
2926 | ||
2927 | fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r"); | |
2928 | ||
2929 | retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us); | |
5ea7647b PB |
2930 | if (retval != 1) { |
2931 | fprintf(stderr, "Disabling Low Power Idle CPU output\n"); | |
2932 | BIC_NOT_PRESENT(BIC_CPU_LPI); | |
605736c6 | 2933 | fclose(fp); |
5ea7647b PB |
2934 | return -1; |
2935 | } | |
be0e54c4 LB |
2936 | |
2937 | fclose(fp); | |
2938 | ||
2939 | return 0; | |
2940 | } | |
2941 | /* | |
2942 | * snapshot_sys_lpi() | |
2943 | * | |
2944 | * record snapshot of | |
2945 | * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us | |
2946 | * | |
2947 | * return 1 if config change requires a restart, else return 0 | |
2948 | */ | |
2949 | int snapshot_sys_lpi_us(void) | |
2950 | { | |
2951 | FILE *fp; | |
2952 | int retval; | |
2953 | ||
2954 | fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r"); | |
2955 | ||
2956 | retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us); | |
5ea7647b PB |
2957 | if (retval != 1) { |
2958 | fprintf(stderr, "Disabling Low Power Idle System output\n"); | |
2959 | BIC_NOT_PRESENT(BIC_SYS_LPI); | |
15423b95 | 2960 | fclose(fp); |
5ea7647b PB |
2961 | return -1; |
2962 | } | |
be0e54c4 LB |
2963 | fclose(fp); |
2964 | ||
2965 | return 0; | |
2966 | } | |
562a2d37 LB |
2967 | /* |
2968 | * snapshot /proc and /sys files | |
2969 | * | |
2970 | * return 1 if configuration restart needed, else return 0 | |
2971 | */ | |
2972 | int snapshot_proc_sysfs_files(void) | |
2973 | { | |
218f0e8d LB |
2974 | if (DO_BIC(BIC_IRQ)) |
2975 | if (snapshot_proc_interrupts()) | |
2976 | return 1; | |
562a2d37 | 2977 | |
812db3f7 | 2978 | if (DO_BIC(BIC_GFX_rc6)) |
fdf676e5 LB |
2979 | snapshot_gfx_rc6_ms(); |
2980 | ||
812db3f7 | 2981 | if (DO_BIC(BIC_GFXMHz)) |
27d47356 LB |
2982 | snapshot_gfx_mhz(); |
2983 | ||
be0e54c4 LB |
2984 | if (DO_BIC(BIC_CPU_LPI)) |
2985 | snapshot_cpu_lpi_us(); | |
2986 | ||
2987 | if (DO_BIC(BIC_SYS_LPI)) | |
2988 | snapshot_sys_lpi_us(); | |
2989 | ||
562a2d37 LB |
2990 | return 0; |
2991 | } | |
2992 | ||
8aa2ed0b LB |
2993 | int exit_requested; |
2994 | ||
2995 | static void signal_handler (int signal) | |
2996 | { | |
2997 | switch (signal) { | |
2998 | case SIGINT: | |
2999 | exit_requested = 1; | |
3000 | if (debug) | |
3001 | fprintf(stderr, " SIGINT\n"); | |
3002 | break; | |
07211960 LB |
3003 | case SIGUSR1: |
3004 | if (debug > 1) | |
3005 | fprintf(stderr, "SIGUSR1\n"); | |
3006 | break; | |
8aa2ed0b LB |
3007 | } |
3008 | } | |
3009 | ||
3010 | void setup_signal_handler(void) | |
3011 | { | |
3012 | struct sigaction sa; | |
3013 | ||
3014 | memset(&sa, 0, sizeof(sa)); | |
3015 | ||
3016 | sa.sa_handler = &signal_handler; | |
3017 | ||
3018 | if (sigaction(SIGINT, &sa, NULL) < 0) | |
3019 | err(1, "sigaction SIGINT"); | |
07211960 LB |
3020 | if (sigaction(SIGUSR1, &sa, NULL) < 0) |
3021 | err(1, "sigaction SIGUSR1"); | |
8aa2ed0b | 3022 | } |
b9ad8ee0 | 3023 | |
47936f94 | 3024 | void do_sleep(void) |
b9ad8ee0 | 3025 | { |
c026c236 AB |
3026 | struct timeval tout; |
3027 | struct timespec rest; | |
b9ad8ee0 LB |
3028 | fd_set readfds; |
3029 | int retval; | |
3030 | ||
3031 | FD_ZERO(&readfds); | |
3032 | FD_SET(0, &readfds); | |
3033 | ||
c026c236 | 3034 | if (ignore_stdin) { |
47936f94 AB |
3035 | nanosleep(&interval_ts, NULL); |
3036 | return; | |
3037 | } | |
b9ad8ee0 | 3038 | |
c026c236 AB |
3039 | tout = interval_tv; |
3040 | retval = select(1, &readfds, NULL, NULL, &tout); | |
b9ad8ee0 LB |
3041 | |
3042 | if (retval == 1) { | |
b9ad8ee0 LB |
3043 | switch (getc(stdin)) { |
3044 | case 'q': | |
3045 | exit_requested = 1; | |
3046 | break; | |
c026c236 AB |
3047 | case EOF: |
3048 | /* | |
3049 | * 'stdin' is a pipe closed on the other end. There | |
3050 | * won't be any further input. | |
3051 | */ | |
3052 | ignore_stdin = 1; | |
3053 | /* Sleep the rest of the time */ | |
3054 | rest.tv_sec = (tout.tv_sec + tout.tv_usec / 1000000); | |
3055 | rest.tv_nsec = (tout.tv_usec % 1000000) * 1000; | |
3056 | nanosleep(&rest, NULL); | |
b9ad8ee0 | 3057 | } |
b9ad8ee0 | 3058 | } |
b9ad8ee0 | 3059 | } |
47936f94 | 3060 | |
4c2122d4 | 3061 | |
103a8fea LB |
3062 | void turbostat_loop() |
3063 | { | |
c98d5d94 | 3064 | int retval; |
e52966c0 | 3065 | int restarted = 0; |
023fe0ac | 3066 | int done_iters = 0; |
c98d5d94 | 3067 | |
8aa2ed0b LB |
3068 | setup_signal_handler(); |
3069 | ||
103a8fea | 3070 | restart: |
e52966c0 LB |
3071 | restarted++; |
3072 | ||
562a2d37 | 3073 | snapshot_proc_sysfs_files(); |
c98d5d94 | 3074 | retval = for_all_cpus(get_counters, EVEN_COUNTERS); |
4c2122d4 | 3075 | first_counter_read = 0; |
d91bb17c LB |
3076 | if (retval < -1) { |
3077 | exit(retval); | |
3078 | } else if (retval == -1) { | |
e52966c0 LB |
3079 | if (restarted > 1) { |
3080 | exit(retval); | |
3081 | } | |
c98d5d94 LB |
3082 | re_initialize(); |
3083 | goto restart; | |
3084 | } | |
e52966c0 | 3085 | restarted = 0; |
023fe0ac | 3086 | done_iters = 0; |
103a8fea LB |
3087 | gettimeofday(&tv_even, (struct timezone *)NULL); |
3088 | ||
3089 | while (1) { | |
c98d5d94 | 3090 | if (for_all_proc_cpus(cpu_is_not_present)) { |
103a8fea LB |
3091 | re_initialize(); |
3092 | goto restart; | |
3093 | } | |
b9ad8ee0 | 3094 | do_sleep(); |
562a2d37 LB |
3095 | if (snapshot_proc_sysfs_files()) |
3096 | goto restart; | |
c98d5d94 | 3097 | retval = for_all_cpus(get_counters, ODD_COUNTERS); |
d91bb17c LB |
3098 | if (retval < -1) { |
3099 | exit(retval); | |
3100 | } else if (retval == -1) { | |
15aaa346 LB |
3101 | re_initialize(); |
3102 | goto restart; | |
3103 | } | |
103a8fea | 3104 | gettimeofday(&tv_odd, (struct timezone *)NULL); |
103a8fea | 3105 | timersub(&tv_odd, &tv_even, &tv_delta); |
ba3dec99 LB |
3106 | if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) { |
3107 | re_initialize(); | |
3108 | goto restart; | |
3109 | } | |
c98d5d94 LB |
3110 | compute_average(EVEN_COUNTERS); |
3111 | format_all_counters(EVEN_COUNTERS); | |
b7d8c148 | 3112 | flush_output_stdout(); |
8aa2ed0b LB |
3113 | if (exit_requested) |
3114 | break; | |
023fe0ac CY |
3115 | if (num_iterations && ++done_iters >= num_iterations) |
3116 | break; | |
b9ad8ee0 | 3117 | do_sleep(); |
562a2d37 LB |
3118 | if (snapshot_proc_sysfs_files()) |
3119 | goto restart; | |
c98d5d94 | 3120 | retval = for_all_cpus(get_counters, EVEN_COUNTERS); |
d91bb17c LB |
3121 | if (retval < -1) { |
3122 | exit(retval); | |
3123 | } else if (retval == -1) { | |
103a8fea LB |
3124 | re_initialize(); |
3125 | goto restart; | |
3126 | } | |
103a8fea | 3127 | gettimeofday(&tv_even, (struct timezone *)NULL); |
103a8fea | 3128 | timersub(&tv_even, &tv_odd, &tv_delta); |
ba3dec99 LB |
3129 | if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) { |
3130 | re_initialize(); | |
3131 | goto restart; | |
3132 | } | |
c98d5d94 LB |
3133 | compute_average(ODD_COUNTERS); |
3134 | format_all_counters(ODD_COUNTERS); | |
b7d8c148 | 3135 | flush_output_stdout(); |
8aa2ed0b LB |
3136 | if (exit_requested) |
3137 | break; | |
023fe0ac CY |
3138 | if (num_iterations && ++done_iters >= num_iterations) |
3139 | break; | |
103a8fea LB |
3140 | } |
3141 | } | |
3142 | ||
3143 | void check_dev_msr() | |
3144 | { | |
3145 | struct stat sb; | |
7ce7d5de | 3146 | char pathname[32]; |
103a8fea | 3147 | |
7ce7d5de PB |
3148 | sprintf(pathname, "/dev/cpu/%d/msr", base_cpu); |
3149 | if (stat(pathname, &sb)) | |
a21d38c8 LB |
3150 | if (system("/sbin/modprobe msr > /dev/null 2>&1")) |
3151 | err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" "); | |
103a8fea LB |
3152 | } |
3153 | ||
98481e79 | 3154 | void check_permissions() |
103a8fea | 3155 | { |
98481e79 LB |
3156 | struct __user_cap_header_struct cap_header_data; |
3157 | cap_user_header_t cap_header = &cap_header_data; | |
3158 | struct __user_cap_data_struct cap_data_data; | |
3159 | cap_user_data_t cap_data = &cap_data_data; | |
3160 | extern int capget(cap_user_header_t hdrp, cap_user_data_t datap); | |
3161 | int do_exit = 0; | |
7ce7d5de | 3162 | char pathname[32]; |
98481e79 LB |
3163 | |
3164 | /* check for CAP_SYS_RAWIO */ | |
3165 | cap_header->pid = getpid(); | |
3166 | cap_header->version = _LINUX_CAPABILITY_VERSION; | |
3167 | if (capget(cap_header, cap_data) < 0) | |
3168 | err(-6, "capget(2) failed"); | |
3169 | ||
3170 | if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) { | |
3171 | do_exit++; | |
3172 | warnx("capget(CAP_SYS_RAWIO) failed," | |
3173 | " try \"# setcap cap_sys_rawio=ep %s\"", progname); | |
3174 | } | |
3175 | ||
3176 | /* test file permissions */ | |
7ce7d5de PB |
3177 | sprintf(pathname, "/dev/cpu/%d/msr", base_cpu); |
3178 | if (euidaccess(pathname, R_OK)) { | |
98481e79 LB |
3179 | do_exit++; |
3180 | warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr"); | |
3181 | } | |
3182 | ||
3183 | /* if all else fails, thell them to be root */ | |
3184 | if (do_exit) | |
3185 | if (getuid() != 0) | |
d7899447 | 3186 | warnx("... or simply run as root"); |
98481e79 LB |
3187 | |
3188 | if (do_exit) | |
3189 | exit(-6); | |
103a8fea LB |
3190 | } |
3191 | ||
d7899447 LB |
3192 | /* |
3193 | * NHM adds support for additional MSRs: | |
3194 | * | |
3195 | * MSR_SMI_COUNT 0x00000034 | |
3196 | * | |
ec0adc53 | 3197 | * MSR_PLATFORM_INFO 0x000000ce |
1df2e55a | 3198 | * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2 |
d7899447 | 3199 | * |
cf4cbe53 LB |
3200 | * MSR_MISC_PWR_MGMT 0x000001aa |
3201 | * | |
d7899447 LB |
3202 | * MSR_PKG_C3_RESIDENCY 0x000003f8 |
3203 | * MSR_PKG_C6_RESIDENCY 0x000003f9 | |
3204 | * MSR_CORE_C3_RESIDENCY 0x000003fc | |
3205 | * MSR_CORE_C6_RESIDENCY 0x000003fd | |
3206 | * | |
ee7e38e3 | 3207 | * Side effect: |
1df2e55a | 3208 | * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL |
33148d67 | 3209 | * sets has_misc_feature_control |
d7899447 | 3210 | */ |
ee7e38e3 | 3211 | int probe_nhm_msrs(unsigned int family, unsigned int model) |
103a8fea | 3212 | { |
ee7e38e3 | 3213 | unsigned long long msr; |
21ed5574 | 3214 | unsigned int base_ratio; |
ee7e38e3 LB |
3215 | int *pkg_cstate_limits; |
3216 | ||
103a8fea LB |
3217 | if (!genuine_intel) |
3218 | return 0; | |
3219 | ||
3220 | if (family != 6) | |
3221 | return 0; | |
3222 | ||
21ed5574 LB |
3223 | bclk = discover_bclk(family, model); |
3224 | ||
103a8fea | 3225 | switch (model) { |
869ce69e | 3226 | case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ |
869ce69e | 3227 | case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ |
ee7e38e3 LB |
3228 | pkg_cstate_limits = nhm_pkg_cstate_limits; |
3229 | break; | |
869ce69e LB |
3230 | case INTEL_FAM6_SANDYBRIDGE: /* SNB */ |
3231 | case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */ | |
3232 | case INTEL_FAM6_IVYBRIDGE: /* IVB */ | |
3233 | case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ | |
ee7e38e3 | 3234 | pkg_cstate_limits = snb_pkg_cstate_limits; |
33148d67 | 3235 | has_misc_feature_control = 1; |
ee7e38e3 | 3236 | break; |
c66f78a6 | 3237 | case INTEL_FAM6_HASWELL: /* HSW */ |
5e741407 | 3238 | case INTEL_FAM6_HASWELL_G: /* HSW */ |
869ce69e | 3239 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
77e5517c | 3240 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
c66f78a6 | 3241 | case INTEL_FAM6_BROADWELL: /* BDW */ |
5e741407 | 3242 | case INTEL_FAM6_BROADWELL_G: /* BDW */ |
869ce69e | 3243 | case INTEL_FAM6_BROADWELL_X: /* BDX */ |
af239c44 PZ |
3244 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
3245 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
ee7e38e3 | 3246 | pkg_cstate_limits = hsw_pkg_cstate_limits; |
33148d67 | 3247 | has_misc_feature_control = 1; |
ee7e38e3 | 3248 | break; |
d8ebb442 LB |
3249 | case INTEL_FAM6_SKYLAKE_X: /* SKX */ |
3250 | pkg_cstate_limits = skx_pkg_cstate_limits; | |
33148d67 | 3251 | has_misc_feature_control = 1; |
d8ebb442 | 3252 | break; |
f2c4db1b | 3253 | case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ |
cf4cbe53 | 3254 | no_MSR_MISC_PWR_MGMT = 1; |
5ebb34ed | 3255 | case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */ |
ee7e38e3 LB |
3256 | pkg_cstate_limits = slv_pkg_cstate_limits; |
3257 | break; | |
869ce69e | 3258 | case INTEL_FAM6_ATOM_AIRMONT: /* AMT */ |
ee7e38e3 | 3259 | pkg_cstate_limits = amt_pkg_cstate_limits; |
cf4cbe53 | 3260 | no_MSR_MISC_PWR_MGMT = 1; |
ee7e38e3 | 3261 | break; |
869ce69e | 3262 | case INTEL_FAM6_XEON_PHI_KNL: /* PHI */ |
ee7e38e3 LB |
3263 | pkg_cstate_limits = phi_pkg_cstate_limits; |
3264 | break; | |
869ce69e | 3265 | case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ |
f2c4db1b | 3266 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
5ebb34ed | 3267 | case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */ |
445640a5 | 3268 | pkg_cstate_limits = glm_pkg_cstate_limits; |
e4085d54 | 3269 | break; |
103a8fea LB |
3270 | default: |
3271 | return 0; | |
3272 | } | |
1df2e55a | 3273 | get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr); |
e9257f5f | 3274 | pkg_cstate_limit = pkg_cstate_limits[msr & 0xF]; |
ee7e38e3 | 3275 | |
ec0adc53 | 3276 | get_msr(base_cpu, MSR_PLATFORM_INFO, &msr); |
21ed5574 LB |
3277 | base_ratio = (msr >> 8) & 0xFF; |
3278 | ||
3279 | base_hz = base_ratio * bclk * 1000000; | |
3280 | has_base_hz = 1; | |
ee7e38e3 | 3281 | return 1; |
103a8fea | 3282 | } |
0f7887c4 | 3283 | /* |
495c7654 | 3284 | * SLV client has support for unique MSRs: |
0f7887c4 LB |
3285 | * |
3286 | * MSR_CC6_DEMOTION_POLICY_CONFIG | |
3287 | * MSR_MC6_DEMOTION_POLICY_CONFIG | |
3288 | */ | |
3289 | ||
3290 | int has_slv_msrs(unsigned int family, unsigned int model) | |
3291 | { | |
3292 | if (!genuine_intel) | |
3293 | return 0; | |
3294 | ||
3295 | switch (model) { | |
f2c4db1b PZ |
3296 | case INTEL_FAM6_ATOM_SILVERMONT: |
3297 | case INTEL_FAM6_ATOM_SILVERMONT_MID: | |
3298 | case INTEL_FAM6_ATOM_AIRMONT_MID: | |
0f7887c4 LB |
3299 | return 1; |
3300 | } | |
3301 | return 0; | |
3302 | } | |
7170a374 LB |
3303 | int is_dnv(unsigned int family, unsigned int model) |
3304 | { | |
3305 | ||
3306 | if (!genuine_intel) | |
3307 | return 0; | |
3308 | ||
3309 | switch (model) { | |
5ebb34ed | 3310 | case INTEL_FAM6_ATOM_GOLDMONT_D: |
7170a374 LB |
3311 | return 1; |
3312 | } | |
3313 | return 0; | |
3314 | } | |
ade0ebac LB |
3315 | int is_bdx(unsigned int family, unsigned int model) |
3316 | { | |
3317 | ||
3318 | if (!genuine_intel) | |
3319 | return 0; | |
3320 | ||
3321 | switch (model) { | |
3322 | case INTEL_FAM6_BROADWELL_X: | |
ade0ebac LB |
3323 | return 1; |
3324 | } | |
3325 | return 0; | |
3326 | } | |
34c76197 LB |
3327 | int is_skx(unsigned int family, unsigned int model) |
3328 | { | |
3329 | ||
3330 | if (!genuine_intel) | |
3331 | return 0; | |
3332 | ||
3333 | switch (model) { | |
3334 | case INTEL_FAM6_SKYLAKE_X: | |
3335 | return 1; | |
3336 | } | |
3337 | return 0; | |
3338 | } | |
0f7887c4 | 3339 | |
31e07522 | 3340 | int has_turbo_ratio_limit(unsigned int family, unsigned int model) |
d7899447 | 3341 | { |
0f7887c4 LB |
3342 | if (has_slv_msrs(family, model)) |
3343 | return 0; | |
3344 | ||
d7899447 LB |
3345 | switch (model) { |
3346 | /* Nehalem compatible, but do not include turbo-ratio limit support */ | |
869ce69e | 3347 | case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ |
869ce69e | 3348 | case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */ |
d7899447 LB |
3349 | return 0; |
3350 | default: | |
3351 | return 1; | |
3352 | } | |
3353 | } | |
0f7887c4 LB |
3354 | int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model) |
3355 | { | |
3356 | if (has_slv_msrs(family, model)) | |
3357 | return 1; | |
3358 | ||
3359 | return 0; | |
3360 | } | |
6574a5d5 LB |
3361 | int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model) |
3362 | { | |
3363 | if (!genuine_intel) | |
3364 | return 0; | |
3365 | ||
3366 | if (family != 6) | |
3367 | return 0; | |
3368 | ||
3369 | switch (model) { | |
869ce69e LB |
3370 | case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ |
3371 | case INTEL_FAM6_HASWELL_X: /* HSW Xeon */ | |
fcd17211 LB |
3372 | return 1; |
3373 | default: | |
3374 | return 0; | |
3375 | } | |
3376 | } | |
3377 | int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model) | |
3378 | { | |
3379 | if (!genuine_intel) | |
3380 | return 0; | |
3381 | ||
3382 | if (family != 6) | |
3383 | return 0; | |
3384 | ||
3385 | switch (model) { | |
869ce69e | 3386 | case INTEL_FAM6_HASWELL_X: /* HSW Xeon */ |
6574a5d5 LB |
3387 | return 1; |
3388 | default: | |
3389 | return 0; | |
3390 | } | |
3391 | } | |
3392 | ||
fb5d4327 DC |
3393 | int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model) |
3394 | { | |
3395 | if (!genuine_intel) | |
3396 | return 0; | |
3397 | ||
3398 | if (family != 6) | |
3399 | return 0; | |
3400 | ||
3401 | switch (model) { | |
869ce69e | 3402 | case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ |
fb5d4327 DC |
3403 | return 1; |
3404 | default: | |
3405 | return 0; | |
3406 | } | |
3407 | } | |
31e07522 LB |
3408 | int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model) |
3409 | { | |
3410 | if (!genuine_intel) | |
3411 | return 0; | |
3412 | ||
3413 | if (family != 6) | |
3414 | return 0; | |
3415 | ||
3416 | switch (model) { | |
3417 | case INTEL_FAM6_ATOM_GOLDMONT: | |
3418 | case INTEL_FAM6_SKYLAKE_X: | |
3419 | return 1; | |
3420 | default: | |
3421 | return 0; | |
3422 | } | |
3423 | } | |
6fb3143b LB |
3424 | int has_config_tdp(unsigned int family, unsigned int model) |
3425 | { | |
3426 | if (!genuine_intel) | |
3427 | return 0; | |
3428 | ||
3429 | if (family != 6) | |
3430 | return 0; | |
3431 | ||
3432 | switch (model) { | |
869ce69e | 3433 | case INTEL_FAM6_IVYBRIDGE: /* IVB */ |
c66f78a6 | 3434 | case INTEL_FAM6_HASWELL: /* HSW */ |
869ce69e | 3435 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
77e5517c | 3436 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
5e741407 | 3437 | case INTEL_FAM6_HASWELL_G: /* HSW */ |
c66f78a6 | 3438 | case INTEL_FAM6_BROADWELL: /* BDW */ |
5e741407 | 3439 | case INTEL_FAM6_BROADWELL_G: /* BDW */ |
869ce69e | 3440 | case INTEL_FAM6_BROADWELL_X: /* BDX */ |
af239c44 PZ |
3441 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
3442 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
869ce69e LB |
3443 | case INTEL_FAM6_SKYLAKE_X: /* SKX */ |
3444 | ||
3445 | case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ | |
6fb3143b LB |
3446 | return 1; |
3447 | default: | |
3448 | return 0; | |
3449 | } | |
3450 | } | |
3451 | ||
fcd17211 | 3452 | static void |
1b69317d | 3453 | dump_cstate_pstate_config_info(unsigned int family, unsigned int model) |
fcd17211 LB |
3454 | { |
3455 | if (!do_nhm_platform_info) | |
3456 | return; | |
3457 | ||
3458 | dump_nhm_platform_info(); | |
3459 | ||
3460 | if (has_hsw_turbo_ratio_limit(family, model)) | |
3461 | dump_hsw_turbo_ratio_limits(); | |
3462 | ||
3463 | if (has_ivt_turbo_ratio_limit(family, model)) | |
3464 | dump_ivt_turbo_ratio_limits(); | |
3465 | ||
31e07522 LB |
3466 | if (has_turbo_ratio_limit(family, model)) |
3467 | dump_turbo_ratio_limits(family, model); | |
fcd17211 | 3468 | |
0f7887c4 LB |
3469 | if (has_atom_turbo_ratio_limit(family, model)) |
3470 | dump_atom_turbo_ratio_limits(); | |
3471 | ||
fb5d4327 DC |
3472 | if (has_knl_turbo_ratio_limit(family, model)) |
3473 | dump_knl_turbo_ratio_limits(); | |
3474 | ||
6fb3143b LB |
3475 | if (has_config_tdp(family, model)) |
3476 | dump_config_tdp(); | |
3477 | ||
fcd17211 LB |
3478 | dump_nhm_cst_cfg(); |
3479 | } | |
3480 | ||
41618e63 LB |
3481 | static void |
3482 | dump_sysfs_cstate_config(void) | |
3483 | { | |
3484 | char path[64]; | |
3485 | char name_buf[16]; | |
3486 | char desc[64]; | |
3487 | FILE *input; | |
3488 | int state; | |
3489 | char *sp; | |
3490 | ||
3491 | if (!DO_BIC(BIC_sysfs)) | |
3492 | return; | |
3493 | ||
3494 | for (state = 0; state < 10; ++state) { | |
3495 | ||
3496 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", | |
3497 | base_cpu, state); | |
3498 | input = fopen(path, "r"); | |
3499 | if (input == NULL) | |
3500 | continue; | |
8173c336 BH |
3501 | if (!fgets(name_buf, sizeof(name_buf), input)) |
3502 | err(1, "%s: failed to read file", path); | |
41618e63 LB |
3503 | |
3504 | /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */ | |
3505 | sp = strchr(name_buf, '-'); | |
3506 | if (!sp) | |
3507 | sp = strchrnul(name_buf, '\n'); | |
3508 | *sp = '\0'; | |
41618e63 LB |
3509 | fclose(input); |
3510 | ||
3511 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc", | |
3512 | base_cpu, state); | |
3513 | input = fopen(path, "r"); | |
3514 | if (input == NULL) | |
3515 | continue; | |
8173c336 BH |
3516 | if (!fgets(desc, sizeof(desc), input)) |
3517 | err(1, "%s: failed to read file", path); | |
41618e63 LB |
3518 | |
3519 | fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc); | |
3520 | fclose(input); | |
3521 | } | |
3522 | } | |
7293fccd LB |
3523 | static void |
3524 | dump_sysfs_pstate_config(void) | |
3525 | { | |
3526 | char path[64]; | |
3527 | char driver_buf[64]; | |
3528 | char governor_buf[64]; | |
3529 | FILE *input; | |
3530 | int turbo; | |
3531 | ||
3532 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver", | |
3533 | base_cpu); | |
3534 | input = fopen(path, "r"); | |
3535 | if (input == NULL) { | |
0a42d235 | 3536 | fprintf(outf, "NSFOD %s\n", path); |
7293fccd LB |
3537 | return; |
3538 | } | |
8173c336 BH |
3539 | if (!fgets(driver_buf, sizeof(driver_buf), input)) |
3540 | err(1, "%s: failed to read file", path); | |
7293fccd LB |
3541 | fclose(input); |
3542 | ||
3543 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor", | |
3544 | base_cpu); | |
3545 | input = fopen(path, "r"); | |
3546 | if (input == NULL) { | |
0a42d235 | 3547 | fprintf(outf, "NSFOD %s\n", path); |
7293fccd LB |
3548 | return; |
3549 | } | |
8173c336 BH |
3550 | if (!fgets(governor_buf, sizeof(governor_buf), input)) |
3551 | err(1, "%s: failed to read file", path); | |
7293fccd LB |
3552 | fclose(input); |
3553 | ||
3554 | fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf); | |
3555 | fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf); | |
3556 | ||
3557 | sprintf(path, "/sys/devices/system/cpu/cpufreq/boost"); | |
3558 | input = fopen(path, "r"); | |
3559 | if (input != NULL) { | |
8173c336 BH |
3560 | if (fscanf(input, "%d", &turbo) != 1) |
3561 | err(1, "%s: failed to parse number from file", path); | |
7293fccd LB |
3562 | fprintf(outf, "cpufreq boost: %d\n", turbo); |
3563 | fclose(input); | |
3564 | } | |
3565 | ||
3566 | sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo"); | |
3567 | input = fopen(path, "r"); | |
3568 | if (input != NULL) { | |
8173c336 BH |
3569 | if (fscanf(input, "%d", &turbo) != 1) |
3570 | err(1, "%s: failed to parse number from file", path); | |
7293fccd LB |
3571 | fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo); |
3572 | fclose(input); | |
3573 | } | |
3574 | } | |
41618e63 | 3575 | |
fcd17211 | 3576 | |
889facbe LB |
3577 | /* |
3578 | * print_epb() | |
3579 | * Decode the ENERGY_PERF_BIAS MSR | |
3580 | */ | |
3581 | int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
3582 | { | |
3583 | unsigned long long msr; | |
3584 | char *epb_string; | |
3585 | int cpu; | |
3586 | ||
3587 | if (!has_epb) | |
3588 | return 0; | |
3589 | ||
3590 | cpu = t->cpu_id; | |
3591 | ||
3592 | /* EPB is per-package */ | |
3593 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
3594 | return 0; | |
3595 | ||
3596 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 3597 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
889facbe LB |
3598 | return -1; |
3599 | } | |
3600 | ||
3601 | if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr)) | |
3602 | return 0; | |
3603 | ||
e9be7dd6 | 3604 | switch (msr & 0xF) { |
889facbe LB |
3605 | case ENERGY_PERF_BIAS_PERFORMANCE: |
3606 | epb_string = "performance"; | |
3607 | break; | |
3608 | case ENERGY_PERF_BIAS_NORMAL: | |
3609 | epb_string = "balanced"; | |
3610 | break; | |
3611 | case ENERGY_PERF_BIAS_POWERSAVE: | |
3612 | epb_string = "powersave"; | |
3613 | break; | |
3614 | default: | |
3615 | epb_string = "custom"; | |
3616 | break; | |
3617 | } | |
b7d8c148 | 3618 | fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string); |
889facbe LB |
3619 | |
3620 | return 0; | |
3621 | } | |
7f5c258e LB |
3622 | /* |
3623 | * print_hwp() | |
3624 | * Decode the MSR_HWP_CAPABILITIES | |
3625 | */ | |
3626 | int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
3627 | { | |
3628 | unsigned long long msr; | |
3629 | int cpu; | |
3630 | ||
3631 | if (!has_hwp) | |
3632 | return 0; | |
3633 | ||
3634 | cpu = t->cpu_id; | |
3635 | ||
3636 | /* MSR_HWP_CAPABILITIES is per-package */ | |
3637 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
3638 | return 0; | |
3639 | ||
3640 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 3641 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
7f5c258e LB |
3642 | return -1; |
3643 | } | |
3644 | ||
3645 | if (get_msr(cpu, MSR_PM_ENABLE, &msr)) | |
3646 | return 0; | |
3647 | ||
b7d8c148 | 3648 | fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n", |
7f5c258e LB |
3649 | cpu, msr, (msr & (1 << 0)) ? "" : "No-"); |
3650 | ||
3651 | /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */ | |
3652 | if ((msr & (1 << 0)) == 0) | |
3653 | return 0; | |
3654 | ||
3655 | if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr)) | |
3656 | return 0; | |
3657 | ||
b7d8c148 | 3658 | fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx " |
6dbd25a2 | 3659 | "(high %d guar %d eff %d low %d)\n", |
7f5c258e LB |
3660 | cpu, msr, |
3661 | (unsigned int)HWP_HIGHEST_PERF(msr), | |
3662 | (unsigned int)HWP_GUARANTEED_PERF(msr), | |
3663 | (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), | |
3664 | (unsigned int)HWP_LOWEST_PERF(msr)); | |
3665 | ||
3666 | if (get_msr(cpu, MSR_HWP_REQUEST, &msr)) | |
3667 | return 0; | |
3668 | ||
b7d8c148 | 3669 | fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx " |
6dbd25a2 | 3670 | "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n", |
7f5c258e LB |
3671 | cpu, msr, |
3672 | (unsigned int)(((msr) >> 0) & 0xff), | |
3673 | (unsigned int)(((msr) >> 8) & 0xff), | |
3674 | (unsigned int)(((msr) >> 16) & 0xff), | |
3675 | (unsigned int)(((msr) >> 24) & 0xff), | |
3676 | (unsigned int)(((msr) >> 32) & 0xff3), | |
3677 | (unsigned int)(((msr) >> 42) & 0x1)); | |
3678 | ||
3679 | if (has_hwp_pkg) { | |
3680 | if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr)) | |
3681 | return 0; | |
3682 | ||
b7d8c148 | 3683 | fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx " |
6dbd25a2 | 3684 | "(min %d max %d des %d epp 0x%x window 0x%x)\n", |
7f5c258e LB |
3685 | cpu, msr, |
3686 | (unsigned int)(((msr) >> 0) & 0xff), | |
3687 | (unsigned int)(((msr) >> 8) & 0xff), | |
3688 | (unsigned int)(((msr) >> 16) & 0xff), | |
3689 | (unsigned int)(((msr) >> 24) & 0xff), | |
3690 | (unsigned int)(((msr) >> 32) & 0xff3)); | |
3691 | } | |
3692 | if (has_hwp_notify) { | |
3693 | if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr)) | |
3694 | return 0; | |
3695 | ||
b7d8c148 | 3696 | fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx " |
7f5c258e LB |
3697 | "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n", |
3698 | cpu, msr, | |
3699 | ((msr) & 0x1) ? "EN" : "Dis", | |
3700 | ((msr) & 0x2) ? "EN" : "Dis"); | |
3701 | } | |
3702 | if (get_msr(cpu, MSR_HWP_STATUS, &msr)) | |
3703 | return 0; | |
3704 | ||
b7d8c148 | 3705 | fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx " |
7f5c258e LB |
3706 | "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n", |
3707 | cpu, msr, | |
3708 | ((msr) & 0x1) ? "" : "No-", | |
3709 | ((msr) & 0x2) ? "" : "No-"); | |
889facbe LB |
3710 | |
3711 | return 0; | |
3712 | } | |
3713 | ||
3a9a941d LB |
3714 | /* |
3715 | * print_perf_limit() | |
3716 | */ | |
3717 | int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
3718 | { | |
3719 | unsigned long long msr; | |
3720 | int cpu; | |
3721 | ||
3722 | cpu = t->cpu_id; | |
3723 | ||
3724 | /* per-package */ | |
3725 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
3726 | return 0; | |
3727 | ||
3728 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 3729 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
3a9a941d LB |
3730 | return -1; |
3731 | } | |
3732 | ||
3733 | if (do_core_perf_limit_reasons) { | |
3734 | get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr); | |
b7d8c148 LB |
3735 | fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); |
3736 | fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)", | |
e33cbe85 | 3737 | (msr & 1 << 15) ? "bit15, " : "", |
3a9a941d | 3738 | (msr & 1 << 14) ? "bit14, " : "", |
e33cbe85 LB |
3739 | (msr & 1 << 13) ? "Transitions, " : "", |
3740 | (msr & 1 << 12) ? "MultiCoreTurbo, " : "", | |
3741 | (msr & 1 << 11) ? "PkgPwrL2, " : "", | |
3742 | (msr & 1 << 10) ? "PkgPwrL1, " : "", | |
3743 | (msr & 1 << 9) ? "CorePwr, " : "", | |
3744 | (msr & 1 << 8) ? "Amps, " : "", | |
3745 | (msr & 1 << 6) ? "VR-Therm, " : "", | |
3746 | (msr & 1 << 5) ? "Auto-HWP, " : "", | |
3747 | (msr & 1 << 4) ? "Graphics, " : "", | |
3748 | (msr & 1 << 2) ? "bit2, " : "", | |
3749 | (msr & 1 << 1) ? "ThermStatus, " : "", | |
3750 | (msr & 1 << 0) ? "PROCHOT, " : ""); | |
b7d8c148 | 3751 | fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n", |
e33cbe85 | 3752 | (msr & 1 << 31) ? "bit31, " : "", |
3a9a941d | 3753 | (msr & 1 << 30) ? "bit30, " : "", |
e33cbe85 LB |
3754 | (msr & 1 << 29) ? "Transitions, " : "", |
3755 | (msr & 1 << 28) ? "MultiCoreTurbo, " : "", | |
3756 | (msr & 1 << 27) ? "PkgPwrL2, " : "", | |
3757 | (msr & 1 << 26) ? "PkgPwrL1, " : "", | |
3758 | (msr & 1 << 25) ? "CorePwr, " : "", | |
3759 | (msr & 1 << 24) ? "Amps, " : "", | |
3760 | (msr & 1 << 22) ? "VR-Therm, " : "", | |
3761 | (msr & 1 << 21) ? "Auto-HWP, " : "", | |
3762 | (msr & 1 << 20) ? "Graphics, " : "", | |
3763 | (msr & 1 << 18) ? "bit18, " : "", | |
3764 | (msr & 1 << 17) ? "ThermStatus, " : "", | |
3765 | (msr & 1 << 16) ? "PROCHOT, " : ""); | |
3a9a941d LB |
3766 | |
3767 | } | |
3768 | if (do_gfx_perf_limit_reasons) { | |
3769 | get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr); | |
b7d8c148 LB |
3770 | fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); |
3771 | fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)", | |
3a9a941d LB |
3772 | (msr & 1 << 0) ? "PROCHOT, " : "", |
3773 | (msr & 1 << 1) ? "ThermStatus, " : "", | |
3774 | (msr & 1 << 4) ? "Graphics, " : "", | |
3775 | (msr & 1 << 6) ? "VR-Therm, " : "", | |
3776 | (msr & 1 << 8) ? "Amps, " : "", | |
3777 | (msr & 1 << 9) ? "GFXPwr, " : "", | |
3778 | (msr & 1 << 10) ? "PkgPwrL1, " : "", | |
3779 | (msr & 1 << 11) ? "PkgPwrL2, " : ""); | |
b7d8c148 | 3780 | fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n", |
3a9a941d LB |
3781 | (msr & 1 << 16) ? "PROCHOT, " : "", |
3782 | (msr & 1 << 17) ? "ThermStatus, " : "", | |
3783 | (msr & 1 << 20) ? "Graphics, " : "", | |
3784 | (msr & 1 << 22) ? "VR-Therm, " : "", | |
3785 | (msr & 1 << 24) ? "Amps, " : "", | |
3786 | (msr & 1 << 25) ? "GFXPwr, " : "", | |
3787 | (msr & 1 << 26) ? "PkgPwrL1, " : "", | |
3788 | (msr & 1 << 27) ? "PkgPwrL2, " : ""); | |
3789 | } | |
3790 | if (do_ring_perf_limit_reasons) { | |
3791 | get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr); | |
b7d8c148 LB |
3792 | fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr); |
3793 | fprintf(outf, " (Active: %s%s%s%s%s%s)", | |
3a9a941d LB |
3794 | (msr & 1 << 0) ? "PROCHOT, " : "", |
3795 | (msr & 1 << 1) ? "ThermStatus, " : "", | |
3796 | (msr & 1 << 6) ? "VR-Therm, " : "", | |
3797 | (msr & 1 << 8) ? "Amps, " : "", | |
3798 | (msr & 1 << 10) ? "PkgPwrL1, " : "", | |
3799 | (msr & 1 << 11) ? "PkgPwrL2, " : ""); | |
b7d8c148 | 3800 | fprintf(outf, " (Logged: %s%s%s%s%s%s)\n", |
3a9a941d LB |
3801 | (msr & 1 << 16) ? "PROCHOT, " : "", |
3802 | (msr & 1 << 17) ? "ThermStatus, " : "", | |
3803 | (msr & 1 << 22) ? "VR-Therm, " : "", | |
3804 | (msr & 1 << 24) ? "Amps, " : "", | |
3805 | (msr & 1 << 26) ? "PkgPwrL1, " : "", | |
3806 | (msr & 1 << 27) ? "PkgPwrL2, " : ""); | |
3807 | } | |
3808 | return 0; | |
3809 | } | |
3810 | ||
889facbe LB |
3811 | #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */ |
3812 | #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */ | |
3813 | ||
9392bd98 | 3814 | double get_tdp_intel(unsigned int model) |
144b44b1 LB |
3815 | { |
3816 | unsigned long long msr; | |
3817 | ||
3818 | if (do_rapl & RAPL_PKG_POWER_INFO) | |
7ce7d5de | 3819 | if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr)) |
144b44b1 LB |
3820 | return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units; |
3821 | ||
3822 | switch (model) { | |
f2c4db1b | 3823 | case INTEL_FAM6_ATOM_SILVERMONT: |
5ebb34ed | 3824 | case INTEL_FAM6_ATOM_SILVERMONT_D: |
144b44b1 LB |
3825 | return 30.0; |
3826 | default: | |
3827 | return 135.0; | |
3828 | } | |
3829 | } | |
3830 | ||
9392bd98 CW |
3831 | double get_tdp_amd(unsigned int family) |
3832 | { | |
3833 | switch (family) { | |
3834 | case 0x17: | |
c1c10cc7 | 3835 | case 0x18: |
9392bd98 CW |
3836 | default: |
3837 | /* This is the max stock TDP of HEDT/Server Fam17h chips */ | |
3838 | return 250.0; | |
3839 | } | |
3840 | } | |
3841 | ||
40ee8e3b AS |
3842 | /* |
3843 | * rapl_dram_energy_units_probe() | |
3844 | * Energy units are either hard-coded, or come from RAPL Energy Unit MSR. | |
3845 | */ | |
3846 | static double | |
3847 | rapl_dram_energy_units_probe(int model, double rapl_energy_units) | |
3848 | { | |
3849 | /* only called for genuine_intel, family 6 */ | |
3850 | ||
3851 | switch (model) { | |
869ce69e LB |
3852 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
3853 | case INTEL_FAM6_BROADWELL_X: /* BDX */ | |
869ce69e | 3854 | case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
40ee8e3b AS |
3855 | return (rapl_dram_energy_units = 15.3 / 1000000); |
3856 | default: | |
3857 | return (rapl_energy_units); | |
3858 | } | |
3859 | } | |
3860 | ||
9392bd98 | 3861 | void rapl_probe_intel(unsigned int family, unsigned int model) |
889facbe LB |
3862 | { |
3863 | unsigned long long msr; | |
144b44b1 | 3864 | unsigned int time_unit; |
889facbe LB |
3865 | double tdp; |
3866 | ||
889facbe LB |
3867 | if (family != 6) |
3868 | return; | |
3869 | ||
3870 | switch (model) { | |
869ce69e LB |
3871 | case INTEL_FAM6_SANDYBRIDGE: |
3872 | case INTEL_FAM6_IVYBRIDGE: | |
c66f78a6 | 3873 | case INTEL_FAM6_HASWELL: /* HSW */ |
77e5517c | 3874 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
5e741407 | 3875 | case INTEL_FAM6_HASWELL_G: /* HSW */ |
c66f78a6 | 3876 | case INTEL_FAM6_BROADWELL: /* BDW */ |
5e741407 | 3877 | case INTEL_FAM6_BROADWELL_G: /* BDW */ |
144b44b1 | 3878 | do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; |
812db3f7 LB |
3879 | if (rapl_joules) { |
3880 | BIC_PRESENT(BIC_Pkg_J); | |
3881 | BIC_PRESENT(BIC_Cor_J); | |
3882 | BIC_PRESENT(BIC_GFX_J); | |
3883 | } else { | |
3884 | BIC_PRESENT(BIC_PkgWatt); | |
3885 | BIC_PRESENT(BIC_CorWatt); | |
3886 | BIC_PRESENT(BIC_GFXWatt); | |
3887 | } | |
889facbe | 3888 | break; |
869ce69e | 3889 | case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ |
f2c4db1b | 3890 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
e4085d54 | 3891 | do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO; |
812db3f7 LB |
3892 | if (rapl_joules) |
3893 | BIC_PRESENT(BIC_Pkg_J); | |
3894 | else | |
3895 | BIC_PRESENT(BIC_PkgWatt); | |
e4085d54 | 3896 | break; |
af239c44 PZ |
3897 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
3898 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
81824921 | 3899 | do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO; |
812db3f7 LB |
3900 | BIC_PRESENT(BIC_PKG__); |
3901 | BIC_PRESENT(BIC_RAM__); | |
3902 | if (rapl_joules) { | |
3903 | BIC_PRESENT(BIC_Pkg_J); | |
3904 | BIC_PRESENT(BIC_Cor_J); | |
3905 | BIC_PRESENT(BIC_RAM_J); | |
81824921 | 3906 | BIC_PRESENT(BIC_GFX_J); |
812db3f7 LB |
3907 | } else { |
3908 | BIC_PRESENT(BIC_PkgWatt); | |
3909 | BIC_PRESENT(BIC_CorWatt); | |
3910 | BIC_PRESENT(BIC_RAMWatt); | |
81824921 | 3911 | BIC_PRESENT(BIC_GFXWatt); |
812db3f7 | 3912 | } |
0b2bb692 | 3913 | break; |
869ce69e LB |
3914 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
3915 | case INTEL_FAM6_BROADWELL_X: /* BDX */ | |
869ce69e LB |
3916 | case INTEL_FAM6_SKYLAKE_X: /* SKX */ |
3917 | case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ | |
0b2bb692 | 3918 | do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; |
812db3f7 LB |
3919 | BIC_PRESENT(BIC_PKG__); |
3920 | BIC_PRESENT(BIC_RAM__); | |
3921 | if (rapl_joules) { | |
3922 | BIC_PRESENT(BIC_Pkg_J); | |
3923 | BIC_PRESENT(BIC_RAM_J); | |
3924 | } else { | |
3925 | BIC_PRESENT(BIC_PkgWatt); | |
3926 | BIC_PRESENT(BIC_RAMWatt); | |
3927 | } | |
e6f9bb3c | 3928 | break; |
869ce69e LB |
3929 | case INTEL_FAM6_SANDYBRIDGE_X: |
3930 | case INTEL_FAM6_IVYBRIDGE_X: | |
0b2bb692 | 3931 | do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO; |
812db3f7 LB |
3932 | BIC_PRESENT(BIC_PKG__); |
3933 | BIC_PRESENT(BIC_RAM__); | |
3934 | if (rapl_joules) { | |
3935 | BIC_PRESENT(BIC_Pkg_J); | |
3936 | BIC_PRESENT(BIC_Cor_J); | |
3937 | BIC_PRESENT(BIC_RAM_J); | |
3938 | } else { | |
3939 | BIC_PRESENT(BIC_PkgWatt); | |
3940 | BIC_PRESENT(BIC_CorWatt); | |
3941 | BIC_PRESENT(BIC_RAMWatt); | |
3942 | } | |
144b44b1 | 3943 | break; |
f2c4db1b | 3944 | case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ |
5ebb34ed | 3945 | case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */ |
9148494c | 3946 | do_rapl = RAPL_PKG | RAPL_CORES; |
812db3f7 LB |
3947 | if (rapl_joules) { |
3948 | BIC_PRESENT(BIC_Pkg_J); | |
3949 | BIC_PRESENT(BIC_Cor_J); | |
3950 | } else { | |
3951 | BIC_PRESENT(BIC_PkgWatt); | |
3952 | BIC_PRESENT(BIC_CorWatt); | |
3953 | } | |
889facbe | 3954 | break; |
5ebb34ed | 3955 | case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */ |
0f644909 | 3956 | do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS; |
812db3f7 LB |
3957 | BIC_PRESENT(BIC_PKG__); |
3958 | BIC_PRESENT(BIC_RAM__); | |
3959 | if (rapl_joules) { | |
3960 | BIC_PRESENT(BIC_Pkg_J); | |
3961 | BIC_PRESENT(BIC_Cor_J); | |
3962 | BIC_PRESENT(BIC_RAM_J); | |
3963 | } else { | |
3964 | BIC_PRESENT(BIC_PkgWatt); | |
3965 | BIC_PRESENT(BIC_CorWatt); | |
3966 | BIC_PRESENT(BIC_RAMWatt); | |
3967 | } | |
0f644909 | 3968 | break; |
889facbe LB |
3969 | default: |
3970 | return; | |
3971 | } | |
3972 | ||
3973 | /* units on package 0, verify later other packages match */ | |
7ce7d5de | 3974 | if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr)) |
889facbe LB |
3975 | return; |
3976 | ||
3977 | rapl_power_units = 1.0 / (1 << (msr & 0xF)); | |
f2c4db1b | 3978 | if (model == INTEL_FAM6_ATOM_SILVERMONT) |
144b44b1 LB |
3979 | rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000; |
3980 | else | |
3981 | rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F)); | |
889facbe | 3982 | |
40ee8e3b AS |
3983 | rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units); |
3984 | ||
144b44b1 LB |
3985 | time_unit = msr >> 16 & 0xF; |
3986 | if (time_unit == 0) | |
3987 | time_unit = 0xA; | |
889facbe | 3988 | |
144b44b1 | 3989 | rapl_time_units = 1.0 / (1 << (time_unit)); |
889facbe | 3990 | |
9392bd98 | 3991 | tdp = get_tdp_intel(model); |
889facbe | 3992 | |
144b44b1 | 3993 | rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; |
96e47158 | 3994 | if (!quiet) |
b7d8c148 | 3995 | fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); |
9392bd98 | 3996 | } |
889facbe | 3997 | |
9392bd98 CW |
3998 | void rapl_probe_amd(unsigned int family, unsigned int model) |
3999 | { | |
4000 | unsigned long long msr; | |
4001 | unsigned int eax, ebx, ecx, edx; | |
4002 | unsigned int has_rapl = 0; | |
4003 | double tdp; | |
4004 | ||
4005 | if (max_extended_level >= 0x80000007) { | |
4006 | __cpuid(0x80000007, eax, ebx, ecx, edx); | |
4007 | /* RAPL (Fam 17h) */ | |
4008 | has_rapl = edx & (1 << 14); | |
4009 | } | |
4010 | ||
4011 | if (!has_rapl) | |
4012 | return; | |
4013 | ||
4014 | switch (family) { | |
4015 | case 0x17: /* Zen, Zen+ */ | |
c1c10cc7 | 4016 | case 0x18: /* Hygon Dhyana */ |
9392bd98 | 4017 | do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY; |
3316f99a CW |
4018 | if (rapl_joules) { |
4019 | BIC_PRESENT(BIC_Pkg_J); | |
9392bd98 | 4020 | BIC_PRESENT(BIC_Cor_J); |
3316f99a CW |
4021 | } else { |
4022 | BIC_PRESENT(BIC_PkgWatt); | |
9392bd98 | 4023 | BIC_PRESENT(BIC_CorWatt); |
3316f99a | 4024 | } |
9392bd98 CW |
4025 | break; |
4026 | default: | |
4027 | return; | |
4028 | } | |
4029 | ||
4030 | if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr)) | |
4031 | return; | |
4032 | ||
4033 | rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf)); | |
4034 | rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f)); | |
4035 | rapl_power_units = ldexp(1.0, -(msr & 0xf)); | |
4036 | ||
9cfa8e04 | 4037 | tdp = get_tdp_amd(family); |
9392bd98 CW |
4038 | |
4039 | rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; | |
4040 | if (!quiet) | |
4041 | fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); | |
4042 | } | |
4043 | ||
4044 | /* | |
4045 | * rapl_probe() | |
4046 | * | |
4047 | * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units | |
4048 | */ | |
4049 | void rapl_probe(unsigned int family, unsigned int model) | |
4050 | { | |
4051 | if (genuine_intel) | |
4052 | rapl_probe_intel(family, model); | |
c1c10cc7 | 4053 | if (authentic_amd || hygon_genuine) |
9392bd98 | 4054 | rapl_probe_amd(family, model); |
889facbe LB |
4055 | } |
4056 | ||
1b69317d | 4057 | void perf_limit_reasons_probe(unsigned int family, unsigned int model) |
3a9a941d LB |
4058 | { |
4059 | if (!genuine_intel) | |
4060 | return; | |
4061 | ||
4062 | if (family != 6) | |
4063 | return; | |
4064 | ||
4065 | switch (model) { | |
c66f78a6 | 4066 | case INTEL_FAM6_HASWELL: /* HSW */ |
77e5517c | 4067 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
5e741407 | 4068 | case INTEL_FAM6_HASWELL_G: /* HSW */ |
3a9a941d | 4069 | do_gfx_perf_limit_reasons = 1; |
869ce69e | 4070 | case INTEL_FAM6_HASWELL_X: /* HSX */ |
3a9a941d LB |
4071 | do_core_perf_limit_reasons = 1; |
4072 | do_ring_perf_limit_reasons = 1; | |
4073 | default: | |
4074 | return; | |
4075 | } | |
4076 | } | |
4077 | ||
ac980e13 AB |
4078 | void automatic_cstate_conversion_probe(unsigned int family, unsigned int model) |
4079 | { | |
4080 | if (is_skx(family, model) || is_bdx(family, model)) | |
4081 | has_automatic_cstate_conversion = 1; | |
4082 | } | |
4083 | ||
889facbe LB |
4084 | int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
4085 | { | |
4086 | unsigned long long msr; | |
f4896fa5 | 4087 | unsigned int dts, dts2; |
889facbe LB |
4088 | int cpu; |
4089 | ||
4090 | if (!(do_dts || do_ptm)) | |
4091 | return 0; | |
4092 | ||
4093 | cpu = t->cpu_id; | |
4094 | ||
4095 | /* DTS is per-core, no need to print for each thread */ | |
388e9c81 | 4096 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) |
889facbe LB |
4097 | return 0; |
4098 | ||
4099 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 4100 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
889facbe LB |
4101 | return -1; |
4102 | } | |
4103 | ||
4104 | if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) { | |
4105 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) | |
4106 | return 0; | |
4107 | ||
4108 | dts = (msr >> 16) & 0x7F; | |
b7d8c148 | 4109 | fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", |
889facbe LB |
4110 | cpu, msr, tcc_activation_temp - dts); |
4111 | ||
889facbe LB |
4112 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr)) |
4113 | return 0; | |
4114 | ||
4115 | dts = (msr >> 16) & 0x7F; | |
4116 | dts2 = (msr >> 8) & 0x7F; | |
b7d8c148 | 4117 | fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", |
889facbe | 4118 | cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); |
889facbe LB |
4119 | } |
4120 | ||
4121 | ||
f4896fa5 | 4122 | if (do_dts && debug) { |
889facbe LB |
4123 | unsigned int resolution; |
4124 | ||
4125 | if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) | |
4126 | return 0; | |
4127 | ||
4128 | dts = (msr >> 16) & 0x7F; | |
4129 | resolution = (msr >> 27) & 0xF; | |
b7d8c148 | 4130 | fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n", |
889facbe LB |
4131 | cpu, msr, tcc_activation_temp - dts, resolution); |
4132 | ||
889facbe LB |
4133 | if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr)) |
4134 | return 0; | |
4135 | ||
4136 | dts = (msr >> 16) & 0x7F; | |
4137 | dts2 = (msr >> 8) & 0x7F; | |
b7d8c148 | 4138 | fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", |
889facbe | 4139 | cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); |
889facbe LB |
4140 | } |
4141 | ||
4142 | return 0; | |
4143 | } | |
36229897 | 4144 | |
889facbe LB |
4145 | void print_power_limit_msr(int cpu, unsigned long long msr, char *label) |
4146 | { | |
b7d8c148 | 4147 | fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n", |
889facbe LB |
4148 | cpu, label, |
4149 | ((msr >> 15) & 1) ? "EN" : "DIS", | |
4150 | ((msr >> 0) & 0x7FFF) * rapl_power_units, | |
4151 | (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units, | |
4152 | (((msr >> 16) & 1) ? "EN" : "DIS")); | |
4153 | ||
4154 | return; | |
4155 | } | |
4156 | ||
4157 | int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
4158 | { | |
4159 | unsigned long long msr; | |
9392bd98 | 4160 | const char *msr_name; |
889facbe | 4161 | int cpu; |
889facbe LB |
4162 | |
4163 | if (!do_rapl) | |
4164 | return 0; | |
4165 | ||
4166 | /* RAPL counters are per package, so print only for 1st thread/package */ | |
4167 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
4168 | return 0; | |
4169 | ||
4170 | cpu = t->cpu_id; | |
4171 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 4172 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
889facbe LB |
4173 | return -1; |
4174 | } | |
4175 | ||
9392bd98 CW |
4176 | if (do_rapl & RAPL_AMD_F17H) { |
4177 | msr_name = "MSR_RAPL_PWR_UNIT"; | |
4178 | if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr)) | |
4179 | return -1; | |
4180 | } else { | |
4181 | msr_name = "MSR_RAPL_POWER_UNIT"; | |
4182 | if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr)) | |
4183 | return -1; | |
4184 | } | |
889facbe | 4185 | |
9392bd98 | 4186 | fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, |
96e47158 LB |
4187 | rapl_power_units, rapl_energy_units, rapl_time_units); |
4188 | ||
144b44b1 LB |
4189 | if (do_rapl & RAPL_PKG_POWER_INFO) { |
4190 | ||
889facbe LB |
4191 | if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr)) |
4192 | return -5; | |
4193 | ||
4194 | ||
b7d8c148 | 4195 | fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n", |
889facbe LB |
4196 | cpu, msr, |
4197 | ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4198 | ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4199 | ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4200 | ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); | |
4201 | ||
144b44b1 LB |
4202 | } |
4203 | if (do_rapl & RAPL_PKG) { | |
4204 | ||
889facbe LB |
4205 | if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr)) |
4206 | return -9; | |
4207 | ||
b7d8c148 | 4208 | fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", |
96e47158 | 4209 | cpu, msr, (msr >> 63) & 1 ? "" : "UN"); |
889facbe LB |
4210 | |
4211 | print_power_limit_msr(cpu, msr, "PKG Limit #1"); | |
b7d8c148 | 4212 | fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n", |
889facbe LB |
4213 | cpu, |
4214 | ((msr >> 47) & 1) ? "EN" : "DIS", | |
4215 | ((msr >> 32) & 0x7FFF) * rapl_power_units, | |
4216 | (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, | |
4217 | ((msr >> 48) & 1) ? "EN" : "DIS"); | |
4218 | } | |
4219 | ||
0b2bb692 | 4220 | if (do_rapl & RAPL_DRAM_POWER_INFO) { |
889facbe LB |
4221 | if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr)) |
4222 | return -6; | |
4223 | ||
b7d8c148 | 4224 | fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n", |
889facbe LB |
4225 | cpu, msr, |
4226 | ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4227 | ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4228 | ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
4229 | ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); | |
0b2bb692 LB |
4230 | } |
4231 | if (do_rapl & RAPL_DRAM) { | |
889facbe LB |
4232 | if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr)) |
4233 | return -9; | |
b7d8c148 | 4234 | fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", |
96e47158 | 4235 | cpu, msr, (msr >> 31) & 1 ? "" : "UN"); |
889facbe LB |
4236 | |
4237 | print_power_limit_msr(cpu, msr, "DRAM Limit"); | |
4238 | } | |
144b44b1 | 4239 | if (do_rapl & RAPL_CORE_POLICY) { |
96e47158 LB |
4240 | if (get_msr(cpu, MSR_PP0_POLICY, &msr)) |
4241 | return -7; | |
889facbe | 4242 | |
96e47158 | 4243 | fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); |
144b44b1 | 4244 | } |
9148494c | 4245 | if (do_rapl & RAPL_CORES_POWER_LIMIT) { |
96e47158 LB |
4246 | if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) |
4247 | return -9; | |
4248 | fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
4249 | cpu, msr, (msr >> 31) & 1 ? "" : "UN"); | |
4250 | print_power_limit_msr(cpu, msr, "Cores Limit"); | |
889facbe LB |
4251 | } |
4252 | if (do_rapl & RAPL_GFX) { | |
96e47158 LB |
4253 | if (get_msr(cpu, MSR_PP1_POLICY, &msr)) |
4254 | return -8; | |
889facbe | 4255 | |
96e47158 | 4256 | fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF); |
889facbe | 4257 | |
96e47158 LB |
4258 | if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr)) |
4259 | return -9; | |
4260 | fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
4261 | cpu, msr, (msr >> 31) & 1 ? "" : "UN"); | |
4262 | print_power_limit_msr(cpu, msr, "GFX Limit"); | |
889facbe LB |
4263 | } |
4264 | return 0; | |
4265 | } | |
4266 | ||
d7899447 LB |
4267 | /* |
4268 | * SNB adds support for additional MSRs: | |
4269 | * | |
4270 | * MSR_PKG_C7_RESIDENCY 0x000003fa | |
4271 | * MSR_CORE_C7_RESIDENCY 0x000003fe | |
4272 | * MSR_PKG_C2_RESIDENCY 0x0000060d | |
4273 | */ | |
103a8fea | 4274 | |
d7899447 | 4275 | int has_snb_msrs(unsigned int family, unsigned int model) |
103a8fea LB |
4276 | { |
4277 | if (!genuine_intel) | |
4278 | return 0; | |
4279 | ||
4280 | switch (model) { | |
869ce69e LB |
4281 | case INTEL_FAM6_SANDYBRIDGE: |
4282 | case INTEL_FAM6_SANDYBRIDGE_X: | |
77e5517c IM |
4283 | case INTEL_FAM6_IVYBRIDGE: /* IVB */ |
4284 | case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */ | |
4285 | case INTEL_FAM6_HASWELL: /* HSW */ | |
4286 | case INTEL_FAM6_HASWELL_X: /* HSW */ | |
4287 | case INTEL_FAM6_HASWELL_L: /* HSW */ | |
4288 | case INTEL_FAM6_HASWELL_G: /* HSW */ | |
4289 | case INTEL_FAM6_BROADWELL: /* BDW */ | |
4290 | case INTEL_FAM6_BROADWELL_G: /* BDW */ | |
4291 | case INTEL_FAM6_BROADWELL_X: /* BDX */ | |
4292 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ | |
4293 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
4294 | case INTEL_FAM6_SKYLAKE_X: /* SKX */ | |
4295 | case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ | |
f2c4db1b | 4296 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
5ebb34ed | 4297 | case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */ |
103a8fea LB |
4298 | return 1; |
4299 | } | |
4300 | return 0; | |
4301 | } | |
4302 | ||
d7899447 | 4303 | /* |
570992fc | 4304 | * HSW ULT added support for C8/C9/C10 MSRs: |
d7899447 | 4305 | * |
5a63426e LB |
4306 | * MSR_PKG_C8_RESIDENCY 0x00000630 |
4307 | * MSR_PKG_C9_RESIDENCY 0x00000631 | |
4308 | * MSR_PKG_C10_RESIDENCY 0x00000632 | |
4309 | * | |
4310 | * MSR_PKGC8_IRTL 0x00000633 | |
4311 | * MSR_PKGC9_IRTL 0x00000634 | |
4312 | * MSR_PKGC10_IRTL 0x00000635 | |
4313 | * | |
d7899447 | 4314 | */ |
570992fc | 4315 | int has_c8910_msrs(unsigned int family, unsigned int model) |
ca58710f KCA |
4316 | { |
4317 | if (!genuine_intel) | |
4318 | return 0; | |
4319 | ||
4320 | switch (model) { | |
77e5517c | 4321 | case INTEL_FAM6_HASWELL_L: /* HSW */ |
c66f78a6 | 4322 | case INTEL_FAM6_BROADWELL: /* BDW */ |
af239c44 PZ |
4323 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
4324 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
869ce69e | 4325 | case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ |
f2c4db1b | 4326 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
0b2bb692 LB |
4327 | return 1; |
4328 | } | |
4329 | return 0; | |
4330 | } | |
4331 | ||
4332 | /* | |
4333 | * SKL adds support for additional MSRS: | |
4334 | * | |
4335 | * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658 | |
4336 | * MSR_PKG_ANY_CORE_C0_RES 0x00000659 | |
4337 | * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A | |
4338 | * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B | |
4339 | */ | |
4340 | int has_skl_msrs(unsigned int family, unsigned int model) | |
4341 | { | |
4342 | if (!genuine_intel) | |
4343 | return 0; | |
4344 | ||
4345 | switch (model) { | |
af239c44 PZ |
4346 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
4347 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ | |
ca58710f KCA |
4348 | return 1; |
4349 | } | |
4350 | return 0; | |
4351 | } | |
4352 | ||
144b44b1 LB |
4353 | int is_slm(unsigned int family, unsigned int model) |
4354 | { | |
4355 | if (!genuine_intel) | |
4356 | return 0; | |
4357 | switch (model) { | |
f2c4db1b | 4358 | case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */ |
5ebb34ed | 4359 | case INTEL_FAM6_ATOM_SILVERMONT_D: /* AVN */ |
144b44b1 LB |
4360 | return 1; |
4361 | } | |
4362 | return 0; | |
4363 | } | |
4364 | ||
fb5d4327 DC |
4365 | int is_knl(unsigned int family, unsigned int model) |
4366 | { | |
4367 | if (!genuine_intel) | |
4368 | return 0; | |
4369 | switch (model) { | |
869ce69e | 4370 | case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ |
fb5d4327 DC |
4371 | return 1; |
4372 | } | |
4373 | return 0; | |
4374 | } | |
4375 | ||
997e5395 SP |
4376 | int is_cnl(unsigned int family, unsigned int model) |
4377 | { | |
4378 | if (!genuine_intel) | |
4379 | return 0; | |
4380 | ||
4381 | switch (model) { | |
af239c44 | 4382 | case INTEL_FAM6_CANNONLAKE_L: /* CNL */ |
997e5395 SP |
4383 | return 1; |
4384 | } | |
4385 | ||
4386 | return 0; | |
4387 | } | |
4388 | ||
b2b34dfe HC |
4389 | unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model) |
4390 | { | |
4391 | if (is_knl(family, model)) | |
4392 | return 1024; | |
4393 | return 1; | |
4394 | } | |
4395 | ||
144b44b1 LB |
4396 | #define SLM_BCLK_FREQS 5 |
4397 | double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0}; | |
4398 | ||
4399 | double slm_bclk(void) | |
4400 | { | |
4401 | unsigned long long msr = 3; | |
4402 | unsigned int i; | |
4403 | double freq; | |
4404 | ||
7ce7d5de | 4405 | if (get_msr(base_cpu, MSR_FSB_FREQ, &msr)) |
b7d8c148 | 4406 | fprintf(outf, "SLM BCLK: unknown\n"); |
144b44b1 LB |
4407 | |
4408 | i = msr & 0xf; | |
4409 | if (i >= SLM_BCLK_FREQS) { | |
b7d8c148 | 4410 | fprintf(outf, "SLM BCLK[%d] invalid\n", i); |
0a91e551 | 4411 | i = 3; |
144b44b1 LB |
4412 | } |
4413 | freq = slm_freq_table[i]; | |
4414 | ||
96e47158 | 4415 | if (!quiet) |
8f6196c1 | 4416 | fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq); |
144b44b1 LB |
4417 | |
4418 | return freq; | |
4419 | } | |
4420 | ||
103a8fea LB |
4421 | double discover_bclk(unsigned int family, unsigned int model) |
4422 | { | |
121b48bb | 4423 | if (has_snb_msrs(family, model) || is_knl(family, model)) |
103a8fea | 4424 | return 100.00; |
144b44b1 LB |
4425 | else if (is_slm(family, model)) |
4426 | return slm_bclk(); | |
103a8fea LB |
4427 | else |
4428 | return 133.33; | |
4429 | } | |
4430 | ||
889facbe LB |
4431 | /* |
4432 | * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where | |
4433 | * the Thermal Control Circuit (TCC) activates. | |
4434 | * This is usually equal to tjMax. | |
4435 | * | |
4436 | * Older processors do not have this MSR, so there we guess, | |
4437 | * but also allow cmdline over-ride with -T. | |
4438 | * | |
4439 | * Several MSR temperature values are in units of degrees-C | |
4440 | * below this value, including the Digital Thermal Sensor (DTS), | |
4441 | * Package Thermal Management Sensor (PTM), and thermal event thresholds. | |
4442 | */ | |
4443 | int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
4444 | { | |
4445 | unsigned long long msr; | |
4446 | unsigned int target_c_local; | |
4447 | int cpu; | |
4448 | ||
4449 | /* tcc_activation_temp is used only for dts or ptm */ | |
4450 | if (!(do_dts || do_ptm)) | |
4451 | return 0; | |
4452 | ||
4453 | /* this is a per-package concept */ | |
4454 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
4455 | return 0; | |
4456 | ||
4457 | cpu = t->cpu_id; | |
4458 | if (cpu_migrate(cpu)) { | |
b7d8c148 | 4459 | fprintf(outf, "Could not migrate to CPU %d\n", cpu); |
889facbe LB |
4460 | return -1; |
4461 | } | |
4462 | ||
4463 | if (tcc_activation_temp_override != 0) { | |
4464 | tcc_activation_temp = tcc_activation_temp_override; | |
b7d8c148 | 4465 | fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n", |
889facbe LB |
4466 | cpu, tcc_activation_temp); |
4467 | return 0; | |
4468 | } | |
4469 | ||
4470 | /* Temperature Target MSR is Nehalem and newer only */ | |
d7899447 | 4471 | if (!do_nhm_platform_info) |
889facbe LB |
4472 | goto guess; |
4473 | ||
7ce7d5de | 4474 | if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr)) |
889facbe LB |
4475 | goto guess; |
4476 | ||
3482124a | 4477 | target_c_local = (msr >> 16) & 0xFF; |
889facbe | 4478 | |
96e47158 | 4479 | if (!quiet) |
b7d8c148 | 4480 | fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", |
889facbe LB |
4481 | cpu, msr, target_c_local); |
4482 | ||
3482124a | 4483 | if (!target_c_local) |
889facbe LB |
4484 | goto guess; |
4485 | ||
4486 | tcc_activation_temp = target_c_local; | |
4487 | ||
4488 | return 0; | |
4489 | ||
4490 | guess: | |
4491 | tcc_activation_temp = TJMAX_DEFAULT; | |
b7d8c148 | 4492 | fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n", |
889facbe LB |
4493 | cpu, tcc_activation_temp); |
4494 | ||
4495 | return 0; | |
4496 | } | |
69807a63 | 4497 | |
aa8d8cc7 LB |
4498 | void decode_feature_control_msr(void) |
4499 | { | |
4500 | unsigned long long msr; | |
4501 | ||
f6505c88 | 4502 | if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr)) |
aa8d8cc7 LB |
4503 | fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n", |
4504 | base_cpu, msr, | |
f6505c88 | 4505 | msr & FEAT_CTL_LOCKED ? "" : "UN-", |
aa8d8cc7 LB |
4506 | msr & (1 << 18) ? "SGX" : ""); |
4507 | } | |
4508 | ||
69807a63 LB |
4509 | void decode_misc_enable_msr(void) |
4510 | { | |
4511 | unsigned long long msr; | |
4512 | ||
f26b1519 LB |
4513 | if (!genuine_intel) |
4514 | return; | |
4515 | ||
69807a63 | 4516 | if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr)) |
e6512624 | 4517 | fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n", |
69807a63 | 4518 | base_cpu, msr, |
e6512624 LB |
4519 | msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", |
4520 | msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-", | |
fd3933ca | 4521 | msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-", |
e6512624 LB |
4522 | msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", |
4523 | msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : ""); | |
69807a63 LB |
4524 | } |
4525 | ||
33148d67 LB |
4526 | void decode_misc_feature_control(void) |
4527 | { | |
4528 | unsigned long long msr; | |
4529 | ||
4530 | if (!has_misc_feature_control) | |
4531 | return; | |
4532 | ||
4533 | if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr)) | |
4534 | fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n", | |
4535 | base_cpu, msr, | |
4536 | msr & (0 << 0) ? "No-" : "", | |
4537 | msr & (1 << 0) ? "No-" : "", | |
4538 | msr & (2 << 0) ? "No-" : "", | |
4539 | msr & (3 << 0) ? "No-" : ""); | |
4540 | } | |
f0057310 LB |
4541 | /* |
4542 | * Decode MSR_MISC_PWR_MGMT | |
4543 | * | |
4544 | * Decode the bits according to the Nehalem documentation | |
4545 | * bit[0] seems to continue to have same meaning going forward | |
4546 | * bit[1] less so... | |
4547 | */ | |
4548 | void decode_misc_pwr_mgmt_msr(void) | |
4549 | { | |
4550 | unsigned long long msr; | |
4551 | ||
4552 | if (!do_nhm_platform_info) | |
4553 | return; | |
4554 | ||
cf4cbe53 LB |
4555 | if (no_MSR_MISC_PWR_MGMT) |
4556 | return; | |
4557 | ||
f0057310 | 4558 | if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr)) |
ddadb8ad | 4559 | fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n", |
f0057310 LB |
4560 | base_cpu, msr, |
4561 | msr & (1 << 0) ? "DIS" : "EN", | |
ddadb8ad SP |
4562 | msr & (1 << 1) ? "EN" : "DIS", |
4563 | msr & (1 << 8) ? "EN" : "DIS"); | |
f0057310 | 4564 | } |
71616c8e LB |
4565 | /* |
4566 | * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG | |
4567 | * | |
4568 | * This MSRs are present on Silvermont processors, | |
4569 | * Intel Atom processor E3000 series (Baytrail), and friends. | |
4570 | */ | |
4571 | void decode_c6_demotion_policy_msr(void) | |
4572 | { | |
4573 | unsigned long long msr; | |
4574 | ||
4575 | if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr)) | |
4576 | fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", | |
4577 | base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); | |
4578 | ||
4579 | if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) | |
4580 | fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", | |
4581 | base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); | |
4582 | } | |
7f5c258e | 4583 | |
f5a4c76a LB |
4584 | /* |
4585 | * When models are the same, for the purpose of turbostat, reuse | |
4586 | */ | |
4587 | unsigned int intel_model_duplicates(unsigned int model) | |
4588 | { | |
4589 | ||
4590 | switch(model) { | |
4591 | case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */ | |
4592 | case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ | |
4593 | case 0x1F: /* Core i7 and i5 Processor - Nehalem */ | |
4594 | case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */ | |
4595 | case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */ | |
4596 | return INTEL_FAM6_NEHALEM; | |
4597 | ||
4598 | case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ | |
4599 | case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */ | |
4600 | return INTEL_FAM6_NEHALEM_EX; | |
4601 | ||
4602 | case INTEL_FAM6_XEON_PHI_KNM: | |
4603 | return INTEL_FAM6_XEON_PHI_KNL; | |
4604 | ||
f5a4c76a | 4605 | case INTEL_FAM6_BROADWELL_X: |
5ebb34ed | 4606 | case INTEL_FAM6_BROADWELL_D: /* BDX-DE */ |
f5a4c76a LB |
4607 | return INTEL_FAM6_BROADWELL_X; |
4608 | ||
af239c44 | 4609 | case INTEL_FAM6_SKYLAKE_L: |
c66f78a6 | 4610 | case INTEL_FAM6_SKYLAKE: |
af239c44 | 4611 | case INTEL_FAM6_KABYLAKE_L: |
c66f78a6 | 4612 | case INTEL_FAM6_KABYLAKE: |
081c5432 CY |
4613 | case INTEL_FAM6_COMETLAKE_L: |
4614 | case INTEL_FAM6_COMETLAKE: | |
af239c44 | 4615 | return INTEL_FAM6_SKYLAKE_L; |
937807d3 | 4616 | |
af239c44 | 4617 | case INTEL_FAM6_ICELAKE_L: |
d93ea567 | 4618 | case INTEL_FAM6_ICELAKE_NNPI: |
af239c44 | 4619 | return INTEL_FAM6_CANNONLAKE_L; |
b62b3184 | 4620 | |
77e5517c IM |
4621 | case INTEL_FAM6_ATOM_TREMONT_D: |
4622 | return INTEL_FAM6_ATOM_GOLDMONT_D; | |
f5a4c76a LB |
4623 | } |
4624 | return model; | |
4625 | } | |
fcd17211 | 4626 | void process_cpuid() |
103a8fea | 4627 | { |
34041551 LB |
4628 | unsigned int eax, ebx, ecx, edx; |
4629 | unsigned int fms, family, model, stepping, ecx_flags, edx_flags; | |
b3a34e93 | 4630 | unsigned int has_turbo; |
103a8fea LB |
4631 | |
4632 | eax = ebx = ecx = edx = 0; | |
4633 | ||
5aea2f7f | 4634 | __cpuid(0, max_level, ebx, ecx, edx); |
103a8fea | 4635 | |
34041551 | 4636 | if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69) |
103a8fea | 4637 | genuine_intel = 1; |
34041551 LB |
4638 | else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65) |
4639 | authentic_amd = 1; | |
c1c10cc7 PW |
4640 | else if (ebx == 0x6f677948 && ecx == 0x656e6975 && edx == 0x6e65476e) |
4641 | hygon_genuine = 1; | |
103a8fea | 4642 | |
96e47158 | 4643 | if (!quiet) |
b7d8c148 | 4644 | fprintf(outf, "CPUID(0): %.4s%.4s%.4s ", |
103a8fea LB |
4645 | (char *)&ebx, (char *)&edx, (char *)&ecx); |
4646 | ||
5aea2f7f | 4647 | __cpuid(1, fms, ebx, ecx, edx); |
103a8fea LB |
4648 | family = (fms >> 8) & 0xf; |
4649 | model = (fms >> 4) & 0xf; | |
4650 | stepping = fms & 0xf; | |
5aa3d1a2 CW |
4651 | if (family == 0xf) |
4652 | family += (fms >> 20) & 0xff; | |
4653 | if (family >= 6) | |
103a8fea | 4654 | model += ((fms >> 16) & 0xf) << 4; |
34041551 LB |
4655 | ecx_flags = ecx; |
4656 | edx_flags = edx; | |
103a8fea LB |
4657 | |
4658 | /* | |
4659 | * check max extended function levels of CPUID. | |
4660 | * This is needed to check for invariant TSC. | |
4661 | * This check is valid for both Intel and AMD. | |
4662 | */ | |
4663 | ebx = ecx = edx = 0; | |
5aea2f7f | 4664 | __cpuid(0x80000000, max_extended_level, ebx, ecx, edx); |
103a8fea | 4665 | |
34041551 LB |
4666 | if (!quiet) { |
4667 | fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n", | |
4668 | max_level, max_extended_level, family, model, stepping, family, model, stepping); | |
4669 | fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n", | |
4670 | ecx_flags & (1 << 0) ? "SSE3" : "-", | |
4671 | ecx_flags & (1 << 3) ? "MONITOR" : "-", | |
4672 | ecx_flags & (1 << 6) ? "SMX" : "-", | |
4673 | ecx_flags & (1 << 7) ? "EIST" : "-", | |
4674 | ecx_flags & (1 << 8) ? "TM2" : "-", | |
4675 | edx_flags & (1 << 4) ? "TSC" : "-", | |
4676 | edx_flags & (1 << 5) ? "MSR" : "-", | |
4677 | edx_flags & (1 << 22) ? "ACPI-TM" : "-", | |
4678 | edx_flags & (1 << 28) ? "HT" : "-", | |
4679 | edx_flags & (1 << 29) ? "TM" : "-"); | |
4680 | } | |
f5a4c76a LB |
4681 | if (genuine_intel) |
4682 | model = intel_model_duplicates(model); | |
34041551 LB |
4683 | |
4684 | if (!(edx_flags & (1 << 5))) | |
4685 | errx(1, "CPUID: no MSR"); | |
4686 | ||
61a87ba7 | 4687 | if (max_extended_level >= 0x80000007) { |
103a8fea | 4688 | |
d7899447 LB |
4689 | /* |
4690 | * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8 | |
4691 | * this check is valid for both Intel and AMD | |
4692 | */ | |
5aea2f7f | 4693 | __cpuid(0x80000007, eax, ebx, ecx, edx); |
d7899447 LB |
4694 | has_invariant_tsc = edx & (1 << 8); |
4695 | } | |
103a8fea LB |
4696 | |
4697 | /* | |
4698 | * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0 | |
4699 | * this check is valid for both Intel and AMD | |
4700 | */ | |
4701 | ||
5aea2f7f | 4702 | __cpuid(0x6, eax, ebx, ecx, edx); |
8209e054 | 4703 | has_aperf = ecx & (1 << 0); |
812db3f7 LB |
4704 | if (has_aperf) { |
4705 | BIC_PRESENT(BIC_Avg_MHz); | |
4706 | BIC_PRESENT(BIC_Busy); | |
4707 | BIC_PRESENT(BIC_Bzy_MHz); | |
4708 | } | |
889facbe | 4709 | do_dts = eax & (1 << 0); |
812db3f7 LB |
4710 | if (do_dts) |
4711 | BIC_PRESENT(BIC_CoreTmp); | |
b3a34e93 | 4712 | has_turbo = eax & (1 << 1); |
889facbe | 4713 | do_ptm = eax & (1 << 6); |
812db3f7 LB |
4714 | if (do_ptm) |
4715 | BIC_PRESENT(BIC_PkgTmp); | |
7f5c258e LB |
4716 | has_hwp = eax & (1 << 7); |
4717 | has_hwp_notify = eax & (1 << 8); | |
4718 | has_hwp_activity_window = eax & (1 << 9); | |
4719 | has_hwp_epp = eax & (1 << 10); | |
4720 | has_hwp_pkg = eax & (1 << 11); | |
889facbe LB |
4721 | has_epb = ecx & (1 << 3); |
4722 | ||
96e47158 | 4723 | if (!quiet) |
b3a34e93 | 4724 | fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, " |
7f5c258e LB |
4725 | "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n", |
4726 | has_aperf ? "" : "No-", | |
b3a34e93 | 4727 | has_turbo ? "" : "No-", |
7f5c258e LB |
4728 | do_dts ? "" : "No-", |
4729 | do_ptm ? "" : "No-", | |
4730 | has_hwp ? "" : "No-", | |
4731 | has_hwp_notify ? "" : "No-", | |
4732 | has_hwp_activity_window ? "" : "No-", | |
4733 | has_hwp_epp ? "" : "No-", | |
4734 | has_hwp_pkg ? "" : "No-", | |
4735 | has_epb ? "" : "No-"); | |
103a8fea | 4736 | |
96e47158 | 4737 | if (!quiet) |
69807a63 LB |
4738 | decode_misc_enable_msr(); |
4739 | ||
33148d67 | 4740 | |
96e47158 | 4741 | if (max_level >= 0x7 && !quiet) { |
aa8d8cc7 | 4742 | int has_sgx; |
103a8fea | 4743 | |
aa8d8cc7 LB |
4744 | ecx = 0; |
4745 | ||
4746 | __cpuid_count(0x7, 0, eax, ebx, ecx, edx); | |
4747 | ||
4748 | has_sgx = ebx & (1 << 2); | |
4749 | fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-"); | |
4750 | ||
4751 | if (has_sgx) | |
4752 | decode_feature_control_msr(); | |
4753 | } | |
4754 | ||
61a87ba7 | 4755 | if (max_level >= 0x15) { |
8a5bdf41 LB |
4756 | unsigned int eax_crystal; |
4757 | unsigned int ebx_tsc; | |
4758 | ||
4759 | /* | |
4760 | * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz | |
4761 | */ | |
4762 | eax_crystal = ebx_tsc = crystal_hz = edx = 0; | |
5aea2f7f | 4763 | __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx); |
8a5bdf41 LB |
4764 | |
4765 | if (ebx_tsc != 0) { | |
4766 | ||
96e47158 | 4767 | if (!quiet && (ebx != 0)) |
b7d8c148 | 4768 | fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n", |
8a5bdf41 LB |
4769 | eax_crystal, ebx_tsc, crystal_hz); |
4770 | ||
4771 | if (crystal_hz == 0) | |
4772 | switch(model) { | |
af239c44 | 4773 | case INTEL_FAM6_SKYLAKE_L: /* SKL */ |
e8efbc80 LB |
4774 | crystal_hz = 24000000; /* 24.0 MHz */ |
4775 | break; | |
5ebb34ed | 4776 | case INTEL_FAM6_ATOM_GOLDMONT_D: /* DNV */ |
ec53e594 LB |
4777 | crystal_hz = 25000000; /* 25.0 MHz */ |
4778 | break; | |
869ce69e | 4779 | case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ |
f2c4db1b | 4780 | case INTEL_FAM6_ATOM_GOLDMONT_PLUS: |
e8efbc80 | 4781 | crystal_hz = 19200000; /* 19.2 MHz */ |
8a5bdf41 LB |
4782 | break; |
4783 | default: | |
4784 | crystal_hz = 0; | |
4785 | } | |
4786 | ||
4787 | if (crystal_hz) { | |
4788 | tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal; | |
96e47158 | 4789 | if (!quiet) |
b7d8c148 | 4790 | fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n", |
8a5bdf41 LB |
4791 | tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal); |
4792 | } | |
4793 | } | |
4794 | } | |
61a87ba7 LB |
4795 | if (max_level >= 0x16) { |
4796 | unsigned int base_mhz, max_mhz, bus_mhz, edx; | |
4797 | ||
4798 | /* | |
4799 | * CPUID 16H Base MHz, Max MHz, Bus MHz | |
4800 | */ | |
4801 | base_mhz = max_mhz = bus_mhz = edx = 0; | |
4802 | ||
5aea2f7f | 4803 | __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx); |
96e47158 | 4804 | if (!quiet) |
b7d8c148 | 4805 | fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n", |
61a87ba7 LB |
4806 | base_mhz, max_mhz, bus_mhz); |
4807 | } | |
8a5bdf41 | 4808 | |
b2b34dfe HC |
4809 | if (has_aperf) |
4810 | aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model); | |
4811 | ||
812db3f7 LB |
4812 | BIC_PRESENT(BIC_IRQ); |
4813 | BIC_PRESENT(BIC_TSC_MHz); | |
4814 | ||
4815 | if (probe_nhm_msrs(family, model)) { | |
4816 | do_nhm_platform_info = 1; | |
4817 | BIC_PRESENT(BIC_CPU_c1); | |
4818 | BIC_PRESENT(BIC_CPU_c3); | |
4819 | BIC_PRESENT(BIC_CPU_c6); | |
4820 | BIC_PRESENT(BIC_SMI); | |
4821 | } | |
d7899447 | 4822 | do_snb_cstates = has_snb_msrs(family, model); |
812db3f7 LB |
4823 | |
4824 | if (do_snb_cstates) | |
4825 | BIC_PRESENT(BIC_CPU_c7); | |
4826 | ||
5a63426e | 4827 | do_irtl_snb = has_snb_msrs(family, model); |
0f47c08d LB |
4828 | if (do_snb_cstates && (pkg_cstate_limit >= PCL__2)) |
4829 | BIC_PRESENT(BIC_Pkgpc2); | |
4830 | if (pkg_cstate_limit >= PCL__3) | |
4831 | BIC_PRESENT(BIC_Pkgpc3); | |
4832 | if (pkg_cstate_limit >= PCL__6) | |
4833 | BIC_PRESENT(BIC_Pkgpc6); | |
4834 | if (do_snb_cstates && (pkg_cstate_limit >= PCL__7)) | |
4835 | BIC_PRESENT(BIC_Pkgpc7); | |
0539ba11 | 4836 | if (has_slv_msrs(family, model)) { |
0f47c08d LB |
4837 | BIC_NOT_PRESENT(BIC_Pkgpc2); |
4838 | BIC_NOT_PRESENT(BIC_Pkgpc3); | |
4839 | BIC_PRESENT(BIC_Pkgpc6); | |
4840 | BIC_NOT_PRESENT(BIC_Pkgpc7); | |
0539ba11 LB |
4841 | BIC_PRESENT(BIC_Mod_c6); |
4842 | use_c1_residency_msr = 1; | |
4843 | } | |
7170a374 LB |
4844 | if (is_dnv(family, model)) { |
4845 | BIC_PRESENT(BIC_CPU_c1); | |
4846 | BIC_NOT_PRESENT(BIC_CPU_c3); | |
4847 | BIC_NOT_PRESENT(BIC_Pkgpc3); | |
4848 | BIC_NOT_PRESENT(BIC_CPU_c7); | |
4849 | BIC_NOT_PRESENT(BIC_Pkgpc7); | |
4850 | use_c1_residency_msr = 1; | |
4851 | } | |
34c76197 LB |
4852 | if (is_skx(family, model)) { |
4853 | BIC_NOT_PRESENT(BIC_CPU_c3); | |
4854 | BIC_NOT_PRESENT(BIC_Pkgpc3); | |
4855 | BIC_NOT_PRESENT(BIC_CPU_c7); | |
4856 | BIC_NOT_PRESENT(BIC_Pkgpc7); | |
4857 | } | |
ade0ebac LB |
4858 | if (is_bdx(family, model)) { |
4859 | BIC_NOT_PRESENT(BIC_CPU_c7); | |
4860 | BIC_NOT_PRESENT(BIC_Pkgpc7); | |
4861 | } | |
570992fc | 4862 | if (has_c8910_msrs(family, model)) { |
0f47c08d LB |
4863 | BIC_PRESENT(BIC_Pkgpc8); |
4864 | BIC_PRESENT(BIC_Pkgpc9); | |
4865 | BIC_PRESENT(BIC_Pkgpc10); | |
4866 | } | |
570992fc | 4867 | do_irtl_hsw = has_c8910_msrs(family, model); |
a99d8730 LB |
4868 | if (has_skl_msrs(family, model)) { |
4869 | BIC_PRESENT(BIC_Totl_c0); | |
4870 | BIC_PRESENT(BIC_Any_c0); | |
4871 | BIC_PRESENT(BIC_GFX_c0); | |
4872 | BIC_PRESENT(BIC_CPUGFX); | |
4873 | } | |
144b44b1 | 4874 | do_slm_cstates = is_slm(family, model); |
fb5d4327 | 4875 | do_knl_cstates = is_knl(family, model); |
103a8fea | 4876 | |
31a1f15c | 4877 | if (do_slm_cstates || do_knl_cstates || is_cnl(family, model)) |
562855ee | 4878 | BIC_NOT_PRESENT(BIC_CPU_c3); |
103a8fea | 4879 | |
96e47158 | 4880 | if (!quiet) |
f0057310 LB |
4881 | decode_misc_pwr_mgmt_msr(); |
4882 | ||
96e47158 | 4883 | if (!quiet && has_slv_msrs(family, model)) |
71616c8e LB |
4884 | decode_c6_demotion_policy_msr(); |
4885 | ||
889facbe | 4886 | rapl_probe(family, model); |
3a9a941d | 4887 | perf_limit_reasons_probe(family, model); |
ac980e13 | 4888 | automatic_cstate_conversion_probe(family, model); |
889facbe | 4889 | |
96e47158 | 4890 | if (!quiet) |
1b69317d | 4891 | dump_cstate_pstate_config_info(family, model); |
fcd17211 | 4892 | |
41618e63 LB |
4893 | if (!quiet) |
4894 | dump_sysfs_cstate_config(); | |
7293fccd LB |
4895 | if (!quiet) |
4896 | dump_sysfs_pstate_config(); | |
41618e63 | 4897 | |
a2b7b749 LB |
4898 | if (has_skl_msrs(family, model)) |
4899 | calculate_tsc_tweak(); | |
4900 | ||
812db3f7 LB |
4901 | if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK)) |
4902 | BIC_PRESENT(BIC_GFX_rc6); | |
fdf676e5 | 4903 | |
812db3f7 LB |
4904 | if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK)) |
4905 | BIC_PRESENT(BIC_GFXMHz); | |
27d47356 | 4906 | |
be0e54c4 LB |
4907 | if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK)) |
4908 | BIC_PRESENT(BIC_CPU_LPI); | |
4909 | else | |
4910 | BIC_NOT_PRESENT(BIC_CPU_LPI); | |
4911 | ||
4912 | if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK)) | |
4913 | BIC_PRESENT(BIC_SYS_LPI); | |
4914 | else | |
4915 | BIC_NOT_PRESENT(BIC_SYS_LPI); | |
4916 | ||
96e47158 | 4917 | if (!quiet) |
33148d67 LB |
4918 | decode_misc_feature_control(); |
4919 | ||
889facbe | 4920 | return; |
103a8fea LB |
4921 | } |
4922 | ||
103a8fea LB |
4923 | /* |
4924 | * in /dev/cpu/ return success for names that are numbers | |
4925 | * ie. filter out ".", "..", "microcode". | |
4926 | */ | |
4927 | int dir_filter(const struct dirent *dirp) | |
4928 | { | |
4929 | if (isdigit(dirp->d_name[0])) | |
4930 | return 1; | |
4931 | else | |
4932 | return 0; | |
4933 | } | |
4934 | ||
4935 | int open_dev_cpu_msr(int dummy1) | |
4936 | { | |
4937 | return 0; | |
4938 | } | |
4939 | ||
c98d5d94 LB |
4940 | void topology_probe() |
4941 | { | |
4942 | int i; | |
4943 | int max_core_id = 0; | |
4944 | int max_package_id = 0; | |
6de68fe1 | 4945 | int max_die_id = 0; |
c98d5d94 | 4946 | int max_siblings = 0; |
c98d5d94 LB |
4947 | |
4948 | /* Initialize num_cpus, max_cpu_num */ | |
843c5791 | 4949 | set_max_cpu_num(); |
c98d5d94 | 4950 | topo.num_cpus = 0; |
c98d5d94 LB |
4951 | for_all_proc_cpus(count_cpus); |
4952 | if (!summary_only && topo.num_cpus > 1) | |
812db3f7 | 4953 | BIC_PRESENT(BIC_CPU); |
c98d5d94 | 4954 | |
d8af6f5f | 4955 | if (debug > 1) |
b7d8c148 | 4956 | fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num); |
c98d5d94 LB |
4957 | |
4958 | cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology)); | |
b2c95d90 JT |
4959 | if (cpus == NULL) |
4960 | err(1, "calloc cpus"); | |
c98d5d94 LB |
4961 | |
4962 | /* | |
4963 | * Allocate and initialize cpu_present_set | |
4964 | */ | |
4965 | cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1)); | |
b2c95d90 JT |
4966 | if (cpu_present_set == NULL) |
4967 | err(3, "CPU_ALLOC"); | |
c98d5d94 LB |
4968 | cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1)); |
4969 | CPU_ZERO_S(cpu_present_setsize, cpu_present_set); | |
4970 | for_all_proc_cpus(mark_cpu_present); | |
4971 | ||
1ef7d21a LB |
4972 | /* |
4973 | * Validate that all cpus in cpu_subset are also in cpu_present_set | |
4974 | */ | |
4975 | for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) { | |
4976 | if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset)) | |
4977 | if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set)) | |
4978 | err(1, "cpu%d not present", i); | |
4979 | } | |
4980 | ||
c98d5d94 LB |
4981 | /* |
4982 | * Allocate and initialize cpu_affinity_set | |
4983 | */ | |
4984 | cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1)); | |
b2c95d90 JT |
4985 | if (cpu_affinity_set == NULL) |
4986 | err(3, "CPU_ALLOC"); | |
c98d5d94 LB |
4987 | cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1)); |
4988 | CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set); | |
4989 | ||
8cb48b32 | 4990 | for_all_proc_cpus(init_thread_id); |
c98d5d94 LB |
4991 | |
4992 | /* | |
4993 | * For online cpus | |
4994 | * find max_core_id, max_package_id | |
4995 | */ | |
4996 | for (i = 0; i <= topo.max_cpu_num; ++i) { | |
4997 | int siblings; | |
4998 | ||
4999 | if (cpu_is_not_present(i)) { | |
d8af6f5f | 5000 | if (debug > 1) |
b7d8c148 | 5001 | fprintf(outf, "cpu%d NOT PRESENT\n", i); |
c98d5d94 LB |
5002 | continue; |
5003 | } | |
c98d5d94 | 5004 | |
0e2d8f05 LB |
5005 | cpus[i].logical_cpu_id = i; |
5006 | ||
5007 | /* get package information */ | |
c98d5d94 LB |
5008 | cpus[i].physical_package_id = get_physical_package_id(i); |
5009 | if (cpus[i].physical_package_id > max_package_id) | |
5010 | max_package_id = cpus[i].physical_package_id; | |
5011 | ||
6de68fe1 LB |
5012 | /* get die information */ |
5013 | cpus[i].die_id = get_die_id(i); | |
5014 | if (cpus[i].die_id > max_die_id) | |
5015 | max_die_id = cpus[i].die_id; | |
5016 | ||
0e2d8f05 | 5017 | /* get numa node information */ |
ef605741 PB |
5018 | cpus[i].physical_node_id = get_physical_node_id(&cpus[i]); |
5019 | if (cpus[i].physical_node_id > topo.max_node_num) | |
5020 | topo.max_node_num = cpus[i].physical_node_id; | |
0e2d8f05 LB |
5021 | |
5022 | /* get core information */ | |
5023 | cpus[i].physical_core_id = get_core_id(i); | |
5024 | if (cpus[i].physical_core_id > max_core_id) | |
5025 | max_core_id = cpus[i].physical_core_id; | |
5026 | ||
5027 | /* get thread information */ | |
5028 | siblings = get_thread_siblings(&cpus[i]); | |
c98d5d94 LB |
5029 | if (siblings > max_siblings) |
5030 | max_siblings = siblings; | |
4f206a0f | 5031 | if (cpus[i].thread_id == 0) |
8cb48b32 | 5032 | topo.num_cores++; |
c98d5d94 | 5033 | } |
ef605741 | 5034 | |
70a9c6e8 | 5035 | topo.cores_per_node = max_core_id + 1; |
d8af6f5f | 5036 | if (debug > 1) |
b7d8c148 | 5037 | fprintf(outf, "max_core_id %d, sizing for %d cores per package\n", |
70a9c6e8 PB |
5038 | max_core_id, topo.cores_per_node); |
5039 | if (!summary_only && topo.cores_per_node > 1) | |
812db3f7 | 5040 | BIC_PRESENT(BIC_Core); |
c98d5d94 | 5041 | |
6de68fe1 LB |
5042 | topo.num_die = max_die_id + 1; |
5043 | if (debug > 1) | |
5044 | fprintf(outf, "max_die_id %d, sizing for %d die\n", | |
5045 | max_die_id, topo.num_die); | |
5046 | if (!summary_only && topo.num_die > 1) | |
5047 | BIC_PRESENT(BIC_Die); | |
5048 | ||
c98d5d94 | 5049 | topo.num_packages = max_package_id + 1; |
d8af6f5f | 5050 | if (debug > 1) |
b7d8c148 | 5051 | fprintf(outf, "max_package_id %d, sizing for %d packages\n", |
c98d5d94 | 5052 | max_package_id, topo.num_packages); |
7da6e3e2 | 5053 | if (!summary_only && topo.num_packages > 1) |
812db3f7 | 5054 | BIC_PRESENT(BIC_Package); |
c98d5d94 | 5055 | |
ef605741 PB |
5056 | set_node_data(); |
5057 | if (debug > 1) | |
70a9c6e8 | 5058 | fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg); |
01235041 PB |
5059 | if (!summary_only && topo.nodes_per_pkg > 1) |
5060 | BIC_PRESENT(BIC_Node); | |
ef605741 | 5061 | |
70a9c6e8 | 5062 | topo.threads_per_core = max_siblings; |
d8af6f5f | 5063 | if (debug > 1) |
b7d8c148 | 5064 | fprintf(outf, "max_siblings %d\n", max_siblings); |
2ffbb224 PB |
5065 | |
5066 | if (debug < 1) | |
5067 | return; | |
5068 | ||
5069 | for (i = 0; i <= topo.max_cpu_num; ++i) { | |
0ec712e3 LB |
5070 | if (cpu_is_not_present(i)) |
5071 | continue; | |
2ffbb224 | 5072 | fprintf(outf, |
6de68fe1 LB |
5073 | "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n", |
5074 | i, cpus[i].physical_package_id, cpus[i].die_id, | |
2ffbb224 PB |
5075 | cpus[i].physical_node_id, |
5076 | cpus[i].logical_node_id, | |
5077 | cpus[i].physical_core_id, | |
5078 | cpus[i].thread_id); | |
5079 | } | |
5080 | ||
c98d5d94 LB |
5081 | } |
5082 | ||
5083 | void | |
40f5cfe7 PB |
5084 | allocate_counters(struct thread_data **t, struct core_data **c, |
5085 | struct pkg_data **p) | |
c98d5d94 LB |
5086 | { |
5087 | int i; | |
40f5cfe7 PB |
5088 | int num_cores = topo.cores_per_node * topo.nodes_per_pkg * |
5089 | topo.num_packages; | |
5090 | int num_threads = topo.threads_per_core * num_cores; | |
c98d5d94 | 5091 | |
40f5cfe7 | 5092 | *t = calloc(num_threads, sizeof(struct thread_data)); |
c98d5d94 LB |
5093 | if (*t == NULL) |
5094 | goto error; | |
5095 | ||
40f5cfe7 | 5096 | for (i = 0; i < num_threads; i++) |
c98d5d94 LB |
5097 | (*t)[i].cpu_id = -1; |
5098 | ||
40f5cfe7 | 5099 | *c = calloc(num_cores, sizeof(struct core_data)); |
c98d5d94 LB |
5100 | if (*c == NULL) |
5101 | goto error; | |
5102 | ||
40f5cfe7 | 5103 | for (i = 0; i < num_cores; i++) |
c98d5d94 LB |
5104 | (*c)[i].core_id = -1; |
5105 | ||
678a3bd1 | 5106 | *p = calloc(topo.num_packages, sizeof(struct pkg_data)); |
c98d5d94 LB |
5107 | if (*p == NULL) |
5108 | goto error; | |
5109 | ||
5110 | for (i = 0; i < topo.num_packages; i++) | |
5111 | (*p)[i].package_id = i; | |
5112 | ||
5113 | return; | |
5114 | error: | |
b2c95d90 | 5115 | err(1, "calloc counters"); |
c98d5d94 LB |
5116 | } |
5117 | /* | |
5118 | * init_counter() | |
5119 | * | |
c98d5d94 | 5120 | * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE |
c98d5d94 LB |
5121 | */ |
5122 | void init_counter(struct thread_data *thread_base, struct core_data *core_base, | |
8cb48b32 | 5123 | struct pkg_data *pkg_base, int cpu_id) |
c98d5d94 | 5124 | { |
8cb48b32 | 5125 | int pkg_id = cpus[cpu_id].physical_package_id; |
40f5cfe7 | 5126 | int node_id = cpus[cpu_id].logical_node_id; |
8cb48b32 PB |
5127 | int core_id = cpus[cpu_id].physical_core_id; |
5128 | int thread_id = cpus[cpu_id].thread_id; | |
c98d5d94 LB |
5129 | struct thread_data *t; |
5130 | struct core_data *c; | |
5131 | struct pkg_data *p; | |
5132 | ||
42dd4520 NC |
5133 | |
5134 | /* Workaround for systems where physical_node_id==-1 | |
5135 | * and logical_node_id==(-1 - topo.num_cpus) | |
5136 | */ | |
5137 | if (node_id < 0) | |
5138 | node_id = 0; | |
5139 | ||
40f5cfe7 PB |
5140 | t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id); |
5141 | c = GET_CORE(core_base, core_id, node_id, pkg_id); | |
8cb48b32 | 5142 | p = GET_PKG(pkg_base, pkg_id); |
c98d5d94 LB |
5143 | |
5144 | t->cpu_id = cpu_id; | |
8cb48b32 | 5145 | if (thread_id == 0) { |
c98d5d94 LB |
5146 | t->flags |= CPU_IS_FIRST_THREAD_IN_CORE; |
5147 | if (cpu_is_first_core_in_package(cpu_id)) | |
5148 | t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE; | |
5149 | } | |
5150 | ||
8cb48b32 PB |
5151 | c->core_id = core_id; |
5152 | p->package_id = pkg_id; | |
c98d5d94 LB |
5153 | } |
5154 | ||
5155 | ||
5156 | int initialize_counters(int cpu_id) | |
5157 | { | |
8cb48b32 PB |
5158 | init_counter(EVEN_COUNTERS, cpu_id); |
5159 | init_counter(ODD_COUNTERS, cpu_id); | |
c98d5d94 LB |
5160 | return 0; |
5161 | } | |
5162 | ||
5163 | void allocate_output_buffer() | |
5164 | { | |
eeb71c95 | 5165 | output_buffer = calloc(1, (1 + topo.num_cpus) * 2048); |
c98d5d94 | 5166 | outp = output_buffer; |
b2c95d90 JT |
5167 | if (outp == NULL) |
5168 | err(-1, "calloc output buffer"); | |
c98d5d94 | 5169 | } |
36229897 LB |
5170 | void allocate_fd_percpu(void) |
5171 | { | |
01a67adf | 5172 | fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int)); |
36229897 LB |
5173 | if (fd_percpu == NULL) |
5174 | err(-1, "calloc fd_percpu"); | |
5175 | } | |
562a2d37 LB |
5176 | void allocate_irq_buffers(void) |
5177 | { | |
5178 | irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int)); | |
5179 | if (irq_column_2_cpu == NULL) | |
5180 | err(-1, "calloc %d", topo.num_cpus); | |
c98d5d94 | 5181 | |
01a67adf | 5182 | irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int)); |
562a2d37 | 5183 | if (irqs_per_cpu == NULL) |
01a67adf | 5184 | err(-1, "calloc %d", topo.max_cpu_num + 1); |
562a2d37 | 5185 | } |
c98d5d94 LB |
5186 | void setup_all_buffers(void) |
5187 | { | |
5188 | topology_probe(); | |
562a2d37 | 5189 | allocate_irq_buffers(); |
36229897 | 5190 | allocate_fd_percpu(); |
c98d5d94 LB |
5191 | allocate_counters(&thread_even, &core_even, &package_even); |
5192 | allocate_counters(&thread_odd, &core_odd, &package_odd); | |
5193 | allocate_output_buffer(); | |
5194 | for_all_proc_cpus(initialize_counters); | |
5195 | } | |
3b4d5c7f | 5196 | |
7ce7d5de PB |
5197 | void set_base_cpu(void) |
5198 | { | |
5199 | base_cpu = sched_getcpu(); | |
5200 | if (base_cpu < 0) | |
5201 | err(-ENODEV, "No valid cpus found"); | |
5202 | ||
5203 | if (debug > 1) | |
b7d8c148 | 5204 | fprintf(outf, "base_cpu = %d\n", base_cpu); |
7ce7d5de PB |
5205 | } |
5206 | ||
103a8fea LB |
5207 | void turbostat_init() |
5208 | { | |
7ce7d5de PB |
5209 | setup_all_buffers(); |
5210 | set_base_cpu(); | |
103a8fea | 5211 | check_dev_msr(); |
98481e79 | 5212 | check_permissions(); |
fcd17211 | 5213 | process_cpuid(); |
103a8fea | 5214 | |
103a8fea | 5215 | |
96e47158 | 5216 | if (!quiet) |
7f5c258e LB |
5217 | for_all_cpus(print_hwp, ODD_COUNTERS); |
5218 | ||
96e47158 | 5219 | if (!quiet) |
889facbe LB |
5220 | for_all_cpus(print_epb, ODD_COUNTERS); |
5221 | ||
96e47158 | 5222 | if (!quiet) |
3a9a941d LB |
5223 | for_all_cpus(print_perf_limit, ODD_COUNTERS); |
5224 | ||
96e47158 | 5225 | if (!quiet) |
889facbe LB |
5226 | for_all_cpus(print_rapl, ODD_COUNTERS); |
5227 | ||
5228 | for_all_cpus(set_temperature_target, ODD_COUNTERS); | |
5229 | ||
96e47158 | 5230 | if (!quiet) |
889facbe | 5231 | for_all_cpus(print_thermal, ODD_COUNTERS); |
5a63426e | 5232 | |
96e47158 | 5233 | if (!quiet && do_irtl_snb) |
5a63426e | 5234 | print_irtl(); |
103a8fea LB |
5235 | } |
5236 | ||
5237 | int fork_it(char **argv) | |
5238 | { | |
103a8fea | 5239 | pid_t child_pid; |
d91bb17c | 5240 | int status; |
d15cf7c1 | 5241 | |
218f0e8d | 5242 | snapshot_proc_sysfs_files(); |
d91bb17c | 5243 | status = for_all_cpus(get_counters, EVEN_COUNTERS); |
4c2122d4 | 5244 | first_counter_read = 0; |
d91bb17c LB |
5245 | if (status) |
5246 | exit(status); | |
c98d5d94 LB |
5247 | /* clear affinity side-effect of get_counters() */ |
5248 | sched_setaffinity(0, cpu_present_setsize, cpu_present_set); | |
103a8fea LB |
5249 | gettimeofday(&tv_even, (struct timezone *)NULL); |
5250 | ||
5251 | child_pid = fork(); | |
5252 | if (!child_pid) { | |
5253 | /* child */ | |
5254 | execvp(argv[0], argv); | |
0815a3d0 | 5255 | err(errno, "exec %s", argv[0]); |
103a8fea | 5256 | } else { |
103a8fea LB |
5257 | |
5258 | /* parent */ | |
b2c95d90 JT |
5259 | if (child_pid == -1) |
5260 | err(1, "fork"); | |
103a8fea LB |
5261 | |
5262 | signal(SIGINT, SIG_IGN); | |
5263 | signal(SIGQUIT, SIG_IGN); | |
b2c95d90 JT |
5264 | if (waitpid(child_pid, &status, 0) == -1) |
5265 | err(status, "waitpid"); | |
2a954966 DA |
5266 | |
5267 | if (WIFEXITED(status)) | |
5268 | status = WEXITSTATUS(status); | |
103a8fea | 5269 | } |
c98d5d94 LB |
5270 | /* |
5271 | * n.b. fork_it() does not check for errors from for_all_cpus() | |
5272 | * because re-starting is problematic when forking | |
5273 | */ | |
218f0e8d | 5274 | snapshot_proc_sysfs_files(); |
c98d5d94 | 5275 | for_all_cpus(get_counters, ODD_COUNTERS); |
103a8fea | 5276 | gettimeofday(&tv_odd, (struct timezone *)NULL); |
103a8fea | 5277 | timersub(&tv_odd, &tv_even, &tv_delta); |
ba3dec99 LB |
5278 | if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) |
5279 | fprintf(outf, "%s: Counter reset detected\n", progname); | |
5280 | else { | |
5281 | compute_average(EVEN_COUNTERS); | |
5282 | format_all_counters(EVEN_COUNTERS); | |
5283 | } | |
103a8fea | 5284 | |
b7d8c148 LB |
5285 | fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0); |
5286 | ||
5287 | flush_output_stderr(); | |
103a8fea | 5288 | |
d91bb17c | 5289 | return status; |
103a8fea LB |
5290 | } |
5291 | ||
3b4d5c7f AS |
5292 | int get_and_dump_counters(void) |
5293 | { | |
5294 | int status; | |
5295 | ||
218f0e8d | 5296 | snapshot_proc_sysfs_files(); |
3b4d5c7f AS |
5297 | status = for_all_cpus(get_counters, ODD_COUNTERS); |
5298 | if (status) | |
5299 | return status; | |
5300 | ||
5301 | status = for_all_cpus(dump_counters, ODD_COUNTERS); | |
5302 | if (status) | |
5303 | return status; | |
5304 | ||
b7d8c148 | 5305 | flush_output_stdout(); |
3b4d5c7f AS |
5306 | |
5307 | return status; | |
5308 | } | |
5309 | ||
d8af6f5f | 5310 | void print_version() { |
9eb4b518 | 5311 | fprintf(outf, "turbostat version 19.08.31" |
d8af6f5f LB |
5312 | " - Len Brown <lenb@kernel.org>\n"); |
5313 | } | |
5314 | ||
495c7654 LB |
5315 | int add_counter(unsigned int msr_num, char *path, char *name, |
5316 | unsigned int width, enum counter_scope scope, | |
41618e63 | 5317 | enum counter_type type, enum counter_format format, int flags) |
388e9c81 LB |
5318 | { |
5319 | struct msr_counter *msrp; | |
5320 | ||
5321 | msrp = calloc(1, sizeof(struct msr_counter)); | |
5322 | if (msrp == NULL) { | |
5323 | perror("calloc"); | |
5324 | exit(1); | |
5325 | } | |
5326 | ||
5327 | msrp->msr_num = msr_num; | |
d8d005ba | 5328 | strncpy(msrp->name, name, NAME_BYTES - 1); |
495c7654 | 5329 | if (path) |
d8d005ba | 5330 | strncpy(msrp->path, path, PATH_BYTES - 1); |
388e9c81 LB |
5331 | msrp->width = width; |
5332 | msrp->type = type; | |
5333 | msrp->format = format; | |
41618e63 | 5334 | msrp->flags = flags; |
388e9c81 LB |
5335 | |
5336 | switch (scope) { | |
5337 | ||
5338 | case SCOPE_CPU: | |
388e9c81 LB |
5339 | msrp->next = sys.tp; |
5340 | sys.tp = msrp; | |
678a3bd1 | 5341 | sys.added_thread_counters++; |
0748eaf0 | 5342 | if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) { |
678a3bd1 LB |
5343 | fprintf(stderr, "exceeded max %d added thread counters\n", |
5344 | MAX_ADDED_COUNTERS); | |
5345 | exit(-1); | |
5346 | } | |
388e9c81 LB |
5347 | break; |
5348 | ||
5349 | case SCOPE_CORE: | |
388e9c81 LB |
5350 | msrp->next = sys.cp; |
5351 | sys.cp = msrp; | |
678a3bd1 LB |
5352 | sys.added_core_counters++; |
5353 | if (sys.added_core_counters > MAX_ADDED_COUNTERS) { | |
5354 | fprintf(stderr, "exceeded max %d added core counters\n", | |
5355 | MAX_ADDED_COUNTERS); | |
5356 | exit(-1); | |
5357 | } | |
388e9c81 LB |
5358 | break; |
5359 | ||
5360 | case SCOPE_PACKAGE: | |
388e9c81 LB |
5361 | msrp->next = sys.pp; |
5362 | sys.pp = msrp; | |
678a3bd1 LB |
5363 | sys.added_package_counters++; |
5364 | if (sys.added_package_counters > MAX_ADDED_COUNTERS) { | |
5365 | fprintf(stderr, "exceeded max %d added package counters\n", | |
5366 | MAX_ADDED_COUNTERS); | |
5367 | exit(-1); | |
5368 | } | |
388e9c81 LB |
5369 | break; |
5370 | } | |
5371 | ||
5372 | return 0; | |
5373 | } | |
5374 | ||
5375 | void parse_add_command(char *add_command) | |
5376 | { | |
5377 | int msr_num = 0; | |
495c7654 | 5378 | char *path = NULL; |
0f47c08d | 5379 | char name_buffer[NAME_BYTES] = ""; |
388e9c81 LB |
5380 | int width = 64; |
5381 | int fail = 0; | |
5382 | enum counter_scope scope = SCOPE_CPU; | |
5383 | enum counter_type type = COUNTER_CYCLES; | |
5384 | enum counter_format format = FORMAT_DELTA; | |
5385 | ||
5386 | while (add_command) { | |
5387 | ||
5388 | if (sscanf(add_command, "msr0x%x", &msr_num) == 1) | |
5389 | goto next; | |
5390 | ||
5391 | if (sscanf(add_command, "msr%d", &msr_num) == 1) | |
5392 | goto next; | |
5393 | ||
495c7654 LB |
5394 | if (*add_command == '/') { |
5395 | path = add_command; | |
5396 | goto next; | |
5397 | } | |
5398 | ||
388e9c81 LB |
5399 | if (sscanf(add_command, "u%d", &width) == 1) { |
5400 | if ((width == 32) || (width == 64)) | |
5401 | goto next; | |
5402 | width = 64; | |
5403 | } | |
5404 | if (!strncmp(add_command, "cpu", strlen("cpu"))) { | |
5405 | scope = SCOPE_CPU; | |
5406 | goto next; | |
5407 | } | |
5408 | if (!strncmp(add_command, "core", strlen("core"))) { | |
5409 | scope = SCOPE_CORE; | |
5410 | goto next; | |
5411 | } | |
5412 | if (!strncmp(add_command, "package", strlen("package"))) { | |
5413 | scope = SCOPE_PACKAGE; | |
5414 | goto next; | |
5415 | } | |
5416 | if (!strncmp(add_command, "cycles", strlen("cycles"))) { | |
5417 | type = COUNTER_CYCLES; | |
5418 | goto next; | |
5419 | } | |
5420 | if (!strncmp(add_command, "seconds", strlen("seconds"))) { | |
5421 | type = COUNTER_SECONDS; | |
5422 | goto next; | |
5423 | } | |
41618e63 LB |
5424 | if (!strncmp(add_command, "usec", strlen("usec"))) { |
5425 | type = COUNTER_USEC; | |
5426 | goto next; | |
5427 | } | |
388e9c81 LB |
5428 | if (!strncmp(add_command, "raw", strlen("raw"))) { |
5429 | format = FORMAT_RAW; | |
5430 | goto next; | |
5431 | } | |
5432 | if (!strncmp(add_command, "delta", strlen("delta"))) { | |
5433 | format = FORMAT_DELTA; | |
5434 | goto next; | |
5435 | } | |
5436 | if (!strncmp(add_command, "percent", strlen("percent"))) { | |
5437 | format = FORMAT_PERCENT; | |
5438 | goto next; | |
5439 | } | |
5440 | ||
5441 | if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */ | |
5442 | char *eos; | |
5443 | ||
5444 | eos = strchr(name_buffer, ','); | |
5445 | if (eos) | |
5446 | *eos = '\0'; | |
5447 | goto next; | |
5448 | } | |
5449 | ||
5450 | next: | |
5451 | add_command = strchr(add_command, ','); | |
495c7654 LB |
5452 | if (add_command) { |
5453 | *add_command = '\0'; | |
388e9c81 | 5454 | add_command++; |
495c7654 | 5455 | } |
388e9c81 LB |
5456 | |
5457 | } | |
495c7654 LB |
5458 | if ((msr_num == 0) && (path == NULL)) { |
5459 | fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n"); | |
388e9c81 LB |
5460 | fail++; |
5461 | } | |
5462 | ||
5463 | /* generate default column header */ | |
5464 | if (*name_buffer == '\0') { | |
5f3aea57 LB |
5465 | if (width == 32) |
5466 | sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : ""); | |
5467 | else | |
5468 | sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : ""); | |
388e9c81 LB |
5469 | } |
5470 | ||
41618e63 | 5471 | if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0)) |
388e9c81 LB |
5472 | fail++; |
5473 | ||
5474 | if (fail) { | |
5475 | help(); | |
5476 | exit(1); | |
5477 | } | |
5478 | } | |
41618e63 | 5479 | |
dd778a5e LB |
5480 | int is_deferred_skip(char *name) |
5481 | { | |
5482 | int i; | |
5483 | ||
5484 | for (i = 0; i < deferred_skip_index; ++i) | |
5485 | if (!strcmp(name, deferred_skip_names[i])) | |
5486 | return 1; | |
5487 | return 0; | |
5488 | } | |
5489 | ||
41618e63 LB |
5490 | void probe_sysfs(void) |
5491 | { | |
5492 | char path[64]; | |
5493 | char name_buf[16]; | |
5494 | FILE *input; | |
5495 | int state; | |
5496 | char *sp; | |
5497 | ||
5498 | if (!DO_BIC(BIC_sysfs)) | |
5499 | return; | |
5500 | ||
0748eaf0 | 5501 | for (state = 10; state >= 0; --state) { |
41618e63 LB |
5502 | |
5503 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", | |
5504 | base_cpu, state); | |
5505 | input = fopen(path, "r"); | |
5506 | if (input == NULL) | |
5507 | continue; | |
8173c336 BH |
5508 | if (!fgets(name_buf, sizeof(name_buf), input)) |
5509 | err(1, "%s: failed to read file", path); | |
41618e63 LB |
5510 | |
5511 | /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */ | |
5512 | sp = strchr(name_buf, '-'); | |
5513 | if (!sp) | |
5514 | sp = strchrnul(name_buf, '\n'); | |
5515 | *sp = '%'; | |
5516 | *(sp + 1) = '\0'; | |
5517 | ||
5518 | fclose(input); | |
5519 | ||
5520 | sprintf(path, "cpuidle/state%d/time", state); | |
5521 | ||
dd778a5e LB |
5522 | if (is_deferred_skip(name_buf)) |
5523 | continue; | |
5524 | ||
41618e63 LB |
5525 | add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC, |
5526 | FORMAT_PERCENT, SYSFS_PERCPU); | |
5527 | } | |
5528 | ||
0748eaf0 | 5529 | for (state = 10; state >= 0; --state) { |
41618e63 LB |
5530 | |
5531 | sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", | |
5532 | base_cpu, state); | |
5533 | input = fopen(path, "r"); | |
5534 | if (input == NULL) | |
5535 | continue; | |
8173c336 BH |
5536 | if (!fgets(name_buf, sizeof(name_buf), input)) |
5537 | err(1, "%s: failed to read file", path); | |
41618e63 LB |
5538 | /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */ |
5539 | sp = strchr(name_buf, '-'); | |
5540 | if (!sp) | |
5541 | sp = strchrnul(name_buf, '\n'); | |
5542 | *sp = '\0'; | |
5543 | fclose(input); | |
5544 | ||
5545 | sprintf(path, "cpuidle/state%d/usage", state); | |
5546 | ||
dd778a5e LB |
5547 | if (is_deferred_skip(name_buf)) |
5548 | continue; | |
5549 | ||
41618e63 LB |
5550 | add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS, |
5551 | FORMAT_DELTA, SYSFS_PERCPU); | |
5552 | } | |
5553 | ||
5554 | } | |
5555 | ||
1ef7d21a LB |
5556 | |
5557 | /* | |
5558 | * parse cpuset with following syntax | |
5559 | * 1,2,4..6,8-10 and set bits in cpu_subset | |
5560 | */ | |
5561 | void parse_cpu_command(char *optarg) | |
5562 | { | |
5563 | unsigned int start, end; | |
5564 | char *next; | |
5565 | ||
4e4e1e7c LB |
5566 | if (!strcmp(optarg, "core")) { |
5567 | if (cpu_subset) | |
5568 | goto error; | |
5569 | show_core_only++; | |
5570 | return; | |
5571 | } | |
5572 | if (!strcmp(optarg, "package")) { | |
5573 | if (cpu_subset) | |
5574 | goto error; | |
5575 | show_pkg_only++; | |
5576 | return; | |
5577 | } | |
5578 | if (show_core_only || show_pkg_only) | |
5579 | goto error; | |
5580 | ||
1ef7d21a LB |
5581 | cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS); |
5582 | if (cpu_subset == NULL) | |
5583 | err(3, "CPU_ALLOC"); | |
5584 | cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS); | |
5585 | ||
5586 | CPU_ZERO_S(cpu_subset_size, cpu_subset); | |
5587 | ||
5588 | next = optarg; | |
5589 | ||
5590 | while (next && *next) { | |
5591 | ||
5592 | if (*next == '-') /* no negative cpu numbers */ | |
5593 | goto error; | |
5594 | ||
5595 | start = strtoul(next, &next, 10); | |
5596 | ||
5597 | if (start >= CPU_SUBSET_MAXCPUS) | |
5598 | goto error; | |
5599 | CPU_SET_S(start, cpu_subset_size, cpu_subset); | |
5600 | ||
5601 | if (*next == '\0') | |
5602 | break; | |
5603 | ||
5604 | if (*next == ',') { | |
5605 | next += 1; | |
5606 | continue; | |
5607 | } | |
5608 | ||
5609 | if (*next == '-') { | |
5610 | next += 1; /* start range */ | |
5611 | } else if (*next == '.') { | |
5612 | next += 1; | |
5613 | if (*next == '.') | |
5614 | next += 1; /* start range */ | |
5615 | else | |
5616 | goto error; | |
5617 | } | |
5618 | ||
5619 | end = strtoul(next, &next, 10); | |
5620 | if (end <= start) | |
5621 | goto error; | |
5622 | ||
5623 | while (++start <= end) { | |
5624 | if (start >= CPU_SUBSET_MAXCPUS) | |
5625 | goto error; | |
5626 | CPU_SET_S(start, cpu_subset_size, cpu_subset); | |
5627 | } | |
5628 | ||
5629 | if (*next == ',') | |
5630 | next += 1; | |
5631 | else if (*next != '\0') | |
5632 | goto error; | |
5633 | } | |
5634 | ||
5635 | return; | |
5636 | ||
5637 | error: | |
4e4e1e7c LB |
5638 | fprintf(stderr, "\"--cpu %s\" malformed\n", optarg); |
5639 | help(); | |
1ef7d21a LB |
5640 | exit(-1); |
5641 | } | |
5642 | ||
812db3f7 | 5643 | |
103a8fea LB |
5644 | void cmdline(int argc, char **argv) |
5645 | { | |
5646 | int opt; | |
d8af6f5f LB |
5647 | int option_index = 0; |
5648 | static struct option long_options[] = { | |
388e9c81 | 5649 | {"add", required_argument, 0, 'a'}, |
1ef7d21a | 5650 | {"cpu", required_argument, 0, 'c'}, |
d8af6f5f | 5651 | {"Dump", no_argument, 0, 'D'}, |
96e47158 | 5652 | {"debug", no_argument, 0, 'd'}, /* internal, not documented */ |
3f44a5c6 | 5653 | {"enable", required_argument, 0, 'e'}, |
d8af6f5f | 5654 | {"interval", required_argument, 0, 'i'}, |
023fe0ac | 5655 | {"num_iterations", required_argument, 0, 'n'}, |
d8af6f5f | 5656 | {"help", no_argument, 0, 'h'}, |
812db3f7 | 5657 | {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help |
d8af6f5f | 5658 | {"Joules", no_argument, 0, 'J'}, |
c8ade361 | 5659 | {"list", no_argument, 0, 'l'}, |
b7d8c148 | 5660 | {"out", required_argument, 0, 'o'}, |
96e47158 | 5661 | {"quiet", no_argument, 0, 'q'}, |
812db3f7 | 5662 | {"show", required_argument, 0, 's'}, |
d8af6f5f LB |
5663 | {"Summary", no_argument, 0, 'S'}, |
5664 | {"TCC", required_argument, 0, 'T'}, | |
5665 | {"version", no_argument, 0, 'v' }, | |
5666 | {0, 0, 0, 0 } | |
5667 | }; | |
103a8fea LB |
5668 | |
5669 | progname = argv[0]; | |
5670 | ||
023fe0ac | 5671 | while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v", |
d8af6f5f | 5672 | long_options, &option_index)) != -1) { |
103a8fea | 5673 | switch (opt) { |
388e9c81 LB |
5674 | case 'a': |
5675 | parse_add_command(optarg); | |
5676 | break; | |
1ef7d21a LB |
5677 | case 'c': |
5678 | parse_cpu_command(optarg); | |
5679 | break; | |
d8af6f5f | 5680 | case 'D': |
3b4d5c7f AS |
5681 | dump_only++; |
5682 | break; | |
3f44a5c6 LB |
5683 | case 'e': |
5684 | /* --enable specified counter */ | |
4c2122d4 | 5685 | bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST); |
3f44a5c6 | 5686 | break; |
d8af6f5f LB |
5687 | case 'd': |
5688 | debug++; | |
3f44a5c6 | 5689 | ENABLE_BIC(BIC_DISABLED_BY_DEFAULT); |
103a8fea | 5690 | break; |
812db3f7 | 5691 | case 'H': |
3f44a5c6 LB |
5692 | /* |
5693 | * --hide: do not show those specified | |
5694 | * multiple invocations simply clear more bits in enabled mask | |
5695 | */ | |
5696 | bic_enabled &= ~bic_lookup(optarg, HIDE_LIST); | |
812db3f7 | 5697 | break; |
d8af6f5f LB |
5698 | case 'h': |
5699 | default: | |
5700 | help(); | |
5701 | exit(1); | |
103a8fea | 5702 | case 'i': |
2a0609c0 LB |
5703 | { |
5704 | double interval = strtod(optarg, NULL); | |
5705 | ||
5706 | if (interval < 0.001) { | |
b7d8c148 | 5707 | fprintf(outf, "interval %f seconds is too small\n", |
2a0609c0 LB |
5708 | interval); |
5709 | exit(2); | |
5710 | } | |
5711 | ||
47936f94 | 5712 | interval_tv.tv_sec = interval_ts.tv_sec = interval; |
b9ad8ee0 | 5713 | interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000; |
47936f94 | 5714 | interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000; |
2a0609c0 | 5715 | } |
103a8fea | 5716 | break; |
d8af6f5f LB |
5717 | case 'J': |
5718 | rapl_joules++; | |
8e180f3c | 5719 | break; |
c8ade361 | 5720 | case 'l': |
3f44a5c6 | 5721 | ENABLE_BIC(BIC_DISABLED_BY_DEFAULT); |
c8ade361 LB |
5722 | list_header_only++; |
5723 | quiet++; | |
5724 | break; | |
b7d8c148 LB |
5725 | case 'o': |
5726 | outf = fopen_or_die(optarg, "w"); | |
5727 | break; | |
96e47158 LB |
5728 | case 'q': |
5729 | quiet = 1; | |
5730 | break; | |
023fe0ac CY |
5731 | case 'n': |
5732 | num_iterations = strtod(optarg, NULL); | |
5733 | ||
5734 | if (num_iterations <= 0) { | |
5735 | fprintf(outf, "iterations %d should be positive number\n", | |
5736 | num_iterations); | |
5737 | exit(2); | |
5738 | } | |
5739 | break; | |
812db3f7 | 5740 | case 's': |
3f44a5c6 LB |
5741 | /* |
5742 | * --show: show only those specified | |
5743 | * The 1st invocation will clear and replace the enabled mask | |
5744 | * subsequent invocations can add to it. | |
5745 | */ | |
5746 | if (shown == 0) | |
5747 | bic_enabled = bic_lookup(optarg, SHOW_LIST); | |
5748 | else | |
5749 | bic_enabled |= bic_lookup(optarg, SHOW_LIST); | |
5750 | shown = 1; | |
812db3f7 | 5751 | break; |
d8af6f5f LB |
5752 | case 'S': |
5753 | summary_only++; | |
889facbe LB |
5754 | break; |
5755 | case 'T': | |
5756 | tcc_activation_temp_override = atoi(optarg); | |
5757 | break; | |
d8af6f5f LB |
5758 | case 'v': |
5759 | print_version(); | |
5760 | exit(0); | |
5c56be9a | 5761 | break; |
103a8fea LB |
5762 | } |
5763 | } | |
5764 | } | |
5765 | ||
5766 | int main(int argc, char **argv) | |
5767 | { | |
b7d8c148 | 5768 | outf = stderr; |
103a8fea LB |
5769 | cmdline(argc, argv); |
5770 | ||
96e47158 | 5771 | if (!quiet) |
d8af6f5f | 5772 | print_version(); |
103a8fea | 5773 | |
41618e63 LB |
5774 | probe_sysfs(); |
5775 | ||
103a8fea LB |
5776 | turbostat_init(); |
5777 | ||
3b4d5c7f AS |
5778 | /* dump counters and exit */ |
5779 | if (dump_only) | |
5780 | return get_and_dump_counters(); | |
5781 | ||
c8ade361 LB |
5782 | /* list header and exit */ |
5783 | if (list_header_only) { | |
5784 | print_header(","); | |
5785 | flush_output_stdout(); | |
5786 | return 0; | |
5787 | } | |
5788 | ||
103a8fea LB |
5789 | /* |
5790 | * if any params left, it must be a command to fork | |
5791 | */ | |
5792 | if (argc - optind) | |
5793 | return fork_it(argv + optind); | |
5794 | else | |
5795 | turbostat_loop(); | |
5796 | ||
5797 | return 0; | |
5798 | } |