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tools/power turbostat: Fix Haswell Core systems
[linux-block.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
a61127c2 1// SPDX-License-Identifier: GPL-2.0-only
103a8fea
LB		 2/*
3 * turbostat -- show CPU frequency and C-state residency
34041551 4 * on modern Intel and AMD processors.
103a8fea 5 *
144b44b1 6 * Copyright (c) 2013 Intel Corporation.
103a8fea 7 * Len Brown <len.brown@intel.com>
103a8fea
LB		 8 */
9
88c3281f 10#define _GNU_SOURCE
b731f311 11#include MSRHEADER
869ce69e 12#include INTEL_FAMILY_HEADER
95aebc44 13#include <stdarg.h>
103a8fea 14#include <stdio.h>
b2c95d90 15#include <err.h>
103a8fea
LB		 16#include <unistd.h>
17#include <sys/types.h>
18#include <sys/wait.h>
19#include <sys/stat.h>
b9ad8ee0 20#include <sys/select.h>
103a8fea
LB		 21#include <sys/resource.h>
22#include <fcntl.h>
23#include <signal.h>
24#include <sys/time.h>
25#include <stdlib.h>
d8af6f5f 26#include <getopt.h>
103a8fea
LB		 27#include <dirent.h>
28#include <string.h>
29#include <ctype.h>
88c3281f 30#include <sched.h>
2a0609c0 31#include <time.h>
2b92865e 32#include <cpuid.h>
98481e79
LB		 33#include <linux/capability.h>
34#include <errno.h>
9392bd98 35#include <math.h>
103a8fea 36
103a8fea 37char *proc_stat = "/proc/stat";
b7d8c148 38FILE *outf;
36229897 39int *fd_percpu;
b9ad8ee0 40struct timeval interval_tv = {5, 0};
47936f94 41struct timespec interval_ts = {5, 0};
b9ad8ee0 42struct timespec one_msec = {0, 1000000};
023fe0ac 43unsigned int num_iterations;
d8af6f5f 44unsigned int debug;
96e47158 45unsigned int quiet;
3f44a5c6 46unsigned int shown;
0de6c0df 47unsigned int sums_need_wide_columns;
d8af6f5f
LB		 48unsigned int rapl_joules;
49unsigned int summary_only;
c8ade361 50unsigned int list_header_only;
d8af6f5f 51unsigned int dump_only;
103a8fea 52unsigned int do_snb_cstates;
fb5d4327 53unsigned int do_knl_cstates;
144b44b1
LB		 54unsigned int do_slm_cstates;
55unsigned int use_c1_residency_msr;
103a8fea 56unsigned int has_aperf;
889facbe 57unsigned int has_epb;
5a63426e
LB		 58unsigned int do_irtl_snb;
59unsigned int do_irtl_hsw;
fc04cc67 60unsigned int units = 1000000; /* MHz etc */
103a8fea 61unsigned int genuine_intel;
34041551
LB		 62unsigned int authentic_amd;
63unsigned int max_level, max_extended_level;
103a8fea 64unsigned int has_invariant_tsc;
d7899447 65unsigned int do_nhm_platform_info;
cf4cbe53 66unsigned int no_MSR_MISC_PWR_MGMT;
b2b34dfe 67unsigned int aperf_mperf_multiplier = 1;
103a8fea 68double bclk;
a2b7b749 69double base_hz;
21ed5574 70unsigned int has_base_hz;
a2b7b749 71double tsc_tweak = 1.0;
c98d5d94
LB		 72unsigned int show_pkg_only;
73unsigned int show_core_only;
74char *output_buffer, *outp;
889facbe
LB		 75unsigned int do_rapl;
76unsigned int do_dts;
77unsigned int do_ptm;
fdf676e5 78unsigned long long gfx_cur_rc6_ms;
be0e54c4
LB		 79unsigned long long cpuidle_cur_cpu_lpi_us;
80unsigned long long cpuidle_cur_sys_lpi_us;
27d47356 81unsigned int gfx_cur_mhz;
889facbe
LB		 82unsigned int tcc_activation_temp;
83unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 84double rapl_power_units, rapl_time_units;
85double rapl_dram_energy_units, rapl_energy_units;
889facbe 86double rapl_joule_counter_range;
3a9a941d 87unsigned int do_core_perf_limit_reasons;
ac980e13 88unsigned int has_automatic_cstate_conversion;
3a9a941d
LB		 89unsigned int do_gfx_perf_limit_reasons;
90unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 91unsigned int crystal_hz;
92unsigned long long tsc_hz;
7ce7d5de 93int base_cpu;
21ed5574 94double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 95unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
96 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
97unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
98unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
99unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
100unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
33148d67 101unsigned int has_misc_feature_control;
4c2122d4 102unsigned int first_counter_read = 1;
889facbe 103
e6f9bb3c
LB		 104#define RAPL_PKG (1 << 0)
105 /* 0x610 MSR_PKG_POWER_LIMIT */
106 /* 0x611 MSR_PKG_ENERGY_STATUS */
107#define RAPL_PKG_PERF_STATUS (1 << 1)
108 /* 0x613 MSR_PKG_PERF_STATUS */
109#define RAPL_PKG_POWER_INFO (1 << 2)
110 /* 0x614 MSR_PKG_POWER_INFO */
111
112#define RAPL_DRAM (1 << 3)
113 /* 0x618 MSR_DRAM_POWER_LIMIT */
114 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 115#define RAPL_DRAM_PERF_STATUS (1 << 4)
116 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 117#define RAPL_DRAM_POWER_INFO (1 << 5)
118 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 119
9148494c 120#define RAPL_CORES_POWER_LIMIT (1 << 6)
e6f9bb3c 121 /* 0x638 MSR_PP0_POWER_LIMIT */
0b2bb692 122#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 123 /* 0x63a MSR_PP0_POLICY */
124
0b2bb692 125#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 126 /* 0x640 MSR_PP1_POWER_LIMIT */
127 /* 0x641 MSR_PP1_ENERGY_STATUS */
128 /* 0x642 MSR_PP1_POLICY */
9148494c
JP		 129
130#define RAPL_CORES_ENERGY_STATUS (1 << 9)
131 /* 0x639 MSR_PP0_ENERGY_STATUS */
9392bd98
CW		 132#define RAPL_PER_CORE_ENERGY (1 << 10)
133 /* Indicates cores energy collection is per-core,
134 * not per-package. */
135#define RAPL_AMD_F17H (1 << 11)
136 /* 0xc0010299 MSR_RAPL_PWR_UNIT */
137 /* 0xc001029a MSR_CORE_ENERGY_STAT */
138 /* 0xc001029b MSR_PKG_ENERGY_STAT */
9148494c 139#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
889facbe
LB		 140#define TJMAX_DEFAULT 100
141
9392bd98
CW		 142/* MSRs that are not yet in the kernel-provided header. */
143#define MSR_RAPL_PWR_UNIT 0xc0010299
144#define MSR_CORE_ENERGY_STAT 0xc001029a
145#define MSR_PKG_ENERGY_STAT 0xc001029b
146
889facbe 147#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea 148
388e9c81
LB		 149/*
150 * buffer size used by sscanf() for added column names
151 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
152 */
153#define NAME_BYTES 20
495c7654 154#define PATH_BYTES 128
388e9c81 155
103a8fea
LB		 156int backwards_count;
157char *progname;
103a8fea 158
1ef7d21a
LB		 159#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
160cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
161size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
0748eaf0
LB		 162#define MAX_ADDED_COUNTERS 8
163#define MAX_ADDED_THREAD_COUNTERS 24
0e2d8f05 164#define BITMASK_SIZE 32
c98d5d94
LB		 165
166struct thread_data {
f4fdf2b4
LB		 167 struct timeval tv_begin;
168 struct timeval tv_end;
d4794f25 169 struct timeval tv_delta;
c98d5d94
LB		 170 unsigned long long tsc;
171 unsigned long long aperf;
172 unsigned long long mperf;
144b44b1 173 unsigned long long c1;
0de6c0df 174 unsigned long long irq_count;
1ed51011 175 unsigned int smi_count;
c98d5d94 176 unsigned int cpu_id;
4c2122d4
LB		 177 unsigned int apic_id;
178 unsigned int x2apic_id;
c98d5d94
LB		 179 unsigned int flags;
180#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
181#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
0748eaf0 182 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
c98d5d94
LB		 183} *thread_even, *thread_odd;
184
185struct core_data {
186 unsigned long long c3;
187 unsigned long long c6;
188 unsigned long long c7;
0539ba11 189 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
889facbe 190 unsigned int core_temp_c;
9392bd98 191 unsigned int core_energy; /* MSR_CORE_ENERGY_STAT */
c98d5d94 192 unsigned int core_id;
678a3bd1 193 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 194} *core_even, *core_odd;
195
196struct pkg_data {
197 unsigned long long pc2;
198 unsigned long long pc3;
199 unsigned long long pc6;
200 unsigned long long pc7;
ca58710f
KCA		 201 unsigned long long pc8;
202 unsigned long long pc9;
203 unsigned long long pc10;
be0e54c4
LB		 204 unsigned long long cpu_lpi;
205 unsigned long long sys_lpi;
0b2bb692
LB		 206 unsigned long long pkg_wtd_core_c0;
207 unsigned long long pkg_any_core_c0;
208 unsigned long long pkg_any_gfxe_c0;
209 unsigned long long pkg_both_core_gfxe_c0;
9185e988 210 long long gfx_rc6_ms;
27d47356 211 unsigned int gfx_mhz;
c98d5d94 212 unsigned int package_id;
889facbe
LB		 213 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
214 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
215 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
216 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
217 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
218 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
219 unsigned int pkg_temp_c;
678a3bd1 220 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 221} *package_even, *package_odd;
222
223#define ODD_COUNTERS thread_odd, core_odd, package_odd
224#define EVEN_COUNTERS thread_even, core_even, package_even
225
40f5cfe7
PB		 226#define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
227 ((thread_base) + \
228 ((pkg_no) * \
229 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
230 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
231 ((core_no) * topo.threads_per_core) + \
232 (thread_no))
233
234#define GET_CORE(core_base, core_no, node_no, pkg_no) \
235 ((core_base) + \
236 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
237 ((node_no) * topo.cores_per_node) + \
238 (core_no))
239
240
c98d5d94
LB		 241#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
242
388e9c81 243enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
41618e63 244enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
388e9c81
LB		 245enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
246
247struct msr_counter {
248 unsigned int msr_num;
249 char name[NAME_BYTES];
495c7654 250 char path[PATH_BYTES];
388e9c81
LB		 251 unsigned int width;
252 enum counter_type type;
253 enum counter_format format;
254 struct msr_counter *next;
812db3f7
LB		 255 unsigned int flags;
256#define FLAGS_HIDE (1 << 0)
257#define FLAGS_SHOW (1 << 1)
41618e63 258#define SYSFS_PERCPU (1 << 1)
388e9c81
LB		 259};
260
261struct sys_counters {
678a3bd1
LB		 262 unsigned int added_thread_counters;
263 unsigned int added_core_counters;
264 unsigned int added_package_counters;
388e9c81
LB		 265 struct msr_counter *tp;
266 struct msr_counter *cp;
267 struct msr_counter *pp;
268} sys;
269
c98d5d94
LB		 270struct system_summary {
271 struct thread_data threads;
272 struct core_data cores;
273 struct pkg_data packages;
388e9c81 274} average;
c98d5d94 275
0e2d8f05
LB		 276struct cpu_topology {
277 int physical_package_id;
6de68fe1 278 int die_id;
0e2d8f05 279 int logical_cpu_id;
ef605741
PB		 280 int physical_node_id;
281 int logical_node_id; /* 0-based count within the package */
0e2d8f05 282 int physical_core_id;
8cb48b32 283 int thread_id;
0e2d8f05
LB		 284 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
285} *cpus;
c98d5d94
LB		 286
287struct topo_params {
288 int num_packages;
6de68fe1 289 int num_die;
c98d5d94
LB		 290 int num_cpus;
291 int num_cores;
292 int max_cpu_num;
ef605741 293 int max_node_num;
70a9c6e8
PB		 294 int nodes_per_pkg;
295 int cores_per_node;
296 int threads_per_core;
c98d5d94
LB		 297} topo;
298
299struct timeval tv_even, tv_odd, tv_delta;
300
562a2d37
LB		 301int *irq_column_2_cpu; /* /proc/interrupts column numbers */
302int *irqs_per_cpu; /* indexed by cpu_num */
303
c98d5d94
LB		 304void setup_all_buffers(void);
305
306int cpu_is_not_present(int cpu)
d15cf7c1 307{
c98d5d94 308 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 309}
88c3281f 310/*
c98d5d94
LB		 311 * run func(thread, core, package) in topology order
312 * skip non-present cpus
88c3281f 313 */
c98d5d94
LB		 314
315int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
316 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 317{
40f5cfe7 318 int retval, pkg_no, core_no, thread_no, node_no;
d15cf7c1 319
c98d5d94 320 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
df2f677d
LB		 321 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
322 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
40f5cfe7
PB		 323 for (thread_no = 0; thread_no <
324 topo.threads_per_core; ++thread_no) {
325 struct thread_data *t;
326 struct core_data *c;
327 struct pkg_data *p;
328
329 t = GET_THREAD(thread_base, thread_no,
330 core_no, node_no,
331 pkg_no);
332
333 if (cpu_is_not_present(t->cpu_id))
334 continue;
335
336 c = GET_CORE(core_base, core_no,
337 node_no, pkg_no);
338 p = GET_PKG(pkg_base, pkg_no);
339
340 retval = func(t, c, p);
341 if (retval)
342 return retval;
343 }
c98d5d94
LB		 344 }
345 }
346 }
347 return 0;
88c3281f
LB		 348}
349
350int cpu_migrate(int cpu)
351{
c98d5d94
LB		 352 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
353 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
354 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 355 return -1;
356 else
357 return 0;
358}
36229897 359int get_msr_fd(int cpu)
103a8fea 360{
103a8fea
LB		 361 char pathname[32];
362 int fd;
363
36229897
LB		 364 fd = fd_percpu[cpu];
365
366 if (fd)
367 return fd;
368
103a8fea
LB		 369 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
370 fd = open(pathname, O_RDONLY);
15aaa346 371 if (fd < 0)
98481e79 372 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 373
36229897
LB		 374 fd_percpu[cpu] = fd;
375
376 return fd;
377}
378
379int get_msr(int cpu, off_t offset, unsigned long long *msr)
380{
381 ssize_t retval;
382
383 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
15aaa346 384
98481e79 385 if (retval != sizeof *msr)
cf4cbe53 386 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
15aaa346
LB		 387
388 return 0;
103a8fea
LB		 389}
390
fc04cc67 391/*
bdd5ae3a
LB		 392 * This list matches the column headers, except
393 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
394 * 2. Core and CPU are moved to the end, we can't have strings that contain them
395 * matching on them for --show and --hide.
fc04cc67 396 */
812db3f7 397struct msr_counter bic[] = {
3f44a5c6
LB		 398 { 0x0, "usec" },
399 { 0x0, "Time_Of_Day_Seconds" },
812db3f7 400 { 0x0, "Package" },
bdd5ae3a 401 { 0x0, "Node" },
812db3f7 402 { 0x0, "Avg_MHz" },
bdd5ae3a 403 { 0x0, "Busy%" },
812db3f7
LB		 404 { 0x0, "Bzy_MHz" },
405 { 0x0, "TSC_MHz" },
406 { 0x0, "IRQ" },
495c7654 407 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
bdd5ae3a 408 { 0x0, "sysfs" },
812db3f7
LB		 409 { 0x0, "CPU%c1" },
410 { 0x0, "CPU%c3" },
411 { 0x0, "CPU%c6" },
412 { 0x0, "CPU%c7" },
413 { 0x0, "ThreadC" },
414 { 0x0, "CoreTmp" },
415 { 0x0, "CoreCnt" },
416 { 0x0, "PkgTmp" },
417 { 0x0, "GFX%rc6" },
418 { 0x0, "GFXMHz" },
419 { 0x0, "Pkg%pc2" },
420 { 0x0, "Pkg%pc3" },
421 { 0x0, "Pkg%pc6" },
422 { 0x0, "Pkg%pc7" },
0f47c08d
LB		 423 { 0x0, "Pkg%pc8" },
424 { 0x0, "Pkg%pc9" },
4bd1f8f2 425 { 0x0, "Pk%pc10" },
be0e54c4
LB		 426 { 0x0, "CPU%LPI" },
427 { 0x0, "SYS%LPI" },
812db3f7
LB		 428 { 0x0, "PkgWatt" },
429 { 0x0, "CorWatt" },
430 { 0x0, "GFXWatt" },
431 { 0x0, "PkgCnt" },
432 { 0x0, "RAMWatt" },
433 { 0x0, "PKG_%" },
434 { 0x0, "RAM_%" },
435 { 0x0, "Pkg_J" },
436 { 0x0, "Cor_J" },
437 { 0x0, "GFX_J" },
438 { 0x0, "RAM_J" },
0539ba11 439 { 0x0, "Mod%c6" },
a99d8730
LB		 440 { 0x0, "Totl%C0" },
441 { 0x0, "Any%C0" },
442 { 0x0, "GFX%C0" },
443 { 0x0, "CPUGFX%" },
bdd5ae3a
LB		 444 { 0x0, "Core" },
445 { 0x0, "CPU" },
4c2122d4
LB		 446 { 0x0, "APIC" },
447 { 0x0, "X2APIC" },
6de68fe1 448 { 0x0, "Die" },
812db3f7
LB		 449};
450
451#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
3f44a5c6
LB		 452#define BIC_USEC (1ULL << 0)
453#define BIC_TOD (1ULL << 1)
454#define BIC_Package (1ULL << 2)
bdd5ae3a
LB		 455#define BIC_Node (1ULL << 3)
456#define BIC_Avg_MHz (1ULL << 4)
457#define BIC_Busy (1ULL << 5)
458#define BIC_Bzy_MHz (1ULL << 6)
459#define BIC_TSC_MHz (1ULL << 7)
460#define BIC_IRQ (1ULL << 8)
461#define BIC_SMI (1ULL << 9)
462#define BIC_sysfs (1ULL << 10)
463#define BIC_CPU_c1 (1ULL << 11)
464#define BIC_CPU_c3 (1ULL << 12)
465#define BIC_CPU_c6 (1ULL << 13)
466#define BIC_CPU_c7 (1ULL << 14)
467#define BIC_ThreadC (1ULL << 15)
468#define BIC_CoreTmp (1ULL << 16)
469#define BIC_CoreCnt (1ULL << 17)
470#define BIC_PkgTmp (1ULL << 18)
471#define BIC_GFX_rc6 (1ULL << 19)
472#define BIC_GFXMHz (1ULL << 20)
473#define BIC_Pkgpc2 (1ULL << 21)
474#define BIC_Pkgpc3 (1ULL << 22)
475#define BIC_Pkgpc6 (1ULL << 23)
476#define BIC_Pkgpc7 (1ULL << 24)
477#define BIC_Pkgpc8 (1ULL << 25)
478#define BIC_Pkgpc9 (1ULL << 26)
479#define BIC_Pkgpc10 (1ULL << 27)
480#define BIC_CPU_LPI (1ULL << 28)
481#define BIC_SYS_LPI (1ULL << 29)
482#define BIC_PkgWatt (1ULL << 30)
483#define BIC_CorWatt (1ULL << 31)
484#define BIC_GFXWatt (1ULL << 32)
485#define BIC_PkgCnt (1ULL << 33)
486#define BIC_RAMWatt (1ULL << 34)
487#define BIC_PKG__ (1ULL << 35)
488#define BIC_RAM__ (1ULL << 36)
489#define BIC_Pkg_J (1ULL << 37)
490#define BIC_Cor_J (1ULL << 38)
491#define BIC_GFX_J (1ULL << 39)
492#define BIC_RAM_J (1ULL << 40)
493#define BIC_Mod_c6 (1ULL << 41)
494#define BIC_Totl_c0 (1ULL << 42)
495#define BIC_Any_c0 (1ULL << 43)
496#define BIC_GFX_c0 (1ULL << 44)
497#define BIC_CPUGFX (1ULL << 45)
498#define BIC_Core (1ULL << 46)
499#define BIC_CPU (1ULL << 47)
4c2122d4
LB		 500#define BIC_APIC (1ULL << 48)
501#define BIC_X2APIC (1ULL << 49)
6de68fe1 502#define BIC_Die (1ULL << 50)
3f44a5c6 503
4c2122d4 504#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
3f44a5c6
LB		 505
506unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
4c2122d4 507unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
812db3f7
LB		 508
509#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
3f44a5c6 510#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
812db3f7 511#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
0f47c08d 512#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
812db3f7 513
3f44a5c6 514
dd778a5e
LB		 515#define MAX_DEFERRED 16
516char *deferred_skip_names[MAX_DEFERRED];
517int deferred_skip_index;
518
519/*
520 * HIDE_LIST - hide this list of counters, show the rest [default]
521 * SHOW_LIST - show this list of counters, hide the rest
522 */
523enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
524
525void help(void)
526{
527 fprintf(outf,
528 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
529 "\n"
530 "Turbostat forks the specified COMMAND and prints statistics\n"
531 "when COMMAND completes.\n"
532 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
533 "to print statistics, until interrupted.\n"
cc481650
NC		 534 " -a, --add add a counter\n"
535 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
536 " -c, --cpu cpu-set limit output to summary plus cpu-set:\n"
537 " {core | package | j,k,l..m,n-p }\n"
9ce80578
NC		 538 " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n"
539 " -D, --Dump displays the raw counter values\n"
540 " -e, --enable [all | column]\n"
541 " shows all or the specified disabled column\n"
542 " -H, --hide [column|column,column,...]\n"
543 " hide the specified column(s)\n"
cc481650
NC		 544 " -i, --interval sec.subsec\n"
545 " Override default 5-second measurement interval\n"
9ce80578 546 " -J, --Joules displays energy in Joules instead of Watts\n"
cc481650
NC		 547 " -l, --list list column headers only\n"
548 " -n, --num_iterations num\n"
549 " number of the measurement iterations\n"
550 " -o, --out file\n"
551 " create or truncate \"file\" for all output\n"
552 " -q, --quiet skip decoding system configuration header\n"
9ce80578
NC		 553 " -s, --show [column|column,column,...]\n"
554 " show only the specified column(s)\n"
555 " -S, --Summary\n"
556 " limits output to 1-line system summary per interval\n"
557 " -T, --TCC temperature\n"
558 " sets the Thermal Control Circuit temperature in\n"
559 " degrees Celsius\n"
cc481650
NC		 560 " -h, --help print this help message\n"
561 " -v, --version print version information\n"
dd778a5e
LB		 562 "\n"
563 "For more help, run \"man turbostat\"\n");
564}
565
812db3f7
LB		 566/*
567 * bic_lookup
568 * for all the strings in comma separate name_list,
569 * set the approprate bit in return value.
570 */
dd778a5e 571unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
812db3f7
LB		 572{
573 int i;
574 unsigned long long retval = 0;
575
576 while (name_list) {
577 char *comma;
578
579 comma = strchr(name_list, ',');
580
581 if (comma)
582 *comma = '\0';
583
3f44a5c6
LB		 584 if (!strcmp(name_list, "all"))
585 return ~0;
586
812db3f7
LB		 587 for (i = 0; i < MAX_BIC; ++i) {
588 if (!strcmp(name_list, bic[i].name)) {
589 retval |= (1ULL << i);
590 break;
591 }
592 }
593 if (i == MAX_BIC) {
dd778a5e
LB		 594 if (mode == SHOW_LIST) {
595 fprintf(stderr, "Invalid counter name: %s\n", name_list);
596 exit(-1);
597 }
598 deferred_skip_names[deferred_skip_index++] = name_list;
599 if (debug)
600 fprintf(stderr, "deferred \"%s\"\n", name_list);
601 if (deferred_skip_index >= MAX_DEFERRED) {
602 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
603 MAX_DEFERRED, name_list);
604 help();
605 exit(1);
606 }
812db3f7
LB		 607 }
608
609 name_list = comma;
610 if (name_list)
611 name_list++;
612
613 }
614 return retval;
615}
fc04cc67 616
dd778a5e 617
c8ade361 618void print_header(char *delim)
103a8fea 619{
388e9c81 620 struct msr_counter *mp;
6168c2e0 621 int printed = 0;
388e9c81 622
3f44a5c6
LB		 623 if (DO_BIC(BIC_USEC))
624 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
625 if (DO_BIC(BIC_TOD))
626 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
812db3f7 627 if (DO_BIC(BIC_Package))
6168c2e0 628 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
6de68fe1
LB		 629 if (DO_BIC(BIC_Die))
630 outp += sprintf(outp, "%sDie", (printed++ ? delim : ""));
01235041
PB		 631 if (DO_BIC(BIC_Node))
632 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
812db3f7 633 if (DO_BIC(BIC_Core))
6168c2e0 634 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
812db3f7 635 if (DO_BIC(BIC_CPU))
6168c2e0 636 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
4c2122d4
LB		 637 if (DO_BIC(BIC_APIC))
638 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
639 if (DO_BIC(BIC_X2APIC))
640 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
812db3f7 641 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 642 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
812db3f7 643 if (DO_BIC(BIC_Busy))
6168c2e0 644 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
812db3f7 645 if (DO_BIC(BIC_Bzy_MHz))
6168c2e0 646 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
812db3f7 647 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 648 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
1cc21f7b 649
0de6c0df
LB		 650 if (DO_BIC(BIC_IRQ)) {
651 if (sums_need_wide_columns)
6168c2e0 652 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
0de6c0df 653 else
6168c2e0 654 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
0de6c0df
LB		 655 }
656
812db3f7 657 if (DO_BIC(BIC_SMI))
6168c2e0 658 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
1cc21f7b 659
388e9c81 660 for (mp = sys.tp; mp; mp = mp->next) {
dd778a5e 661
388e9c81
LB		 662 if (mp->format == FORMAT_RAW) {
663 if (mp->width == 64)
dd778a5e 664 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
388e9c81 665 else
dd778a5e 666 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
388e9c81 667 } else {
0de6c0df 668 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
dd778a5e 669 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
0de6c0df 670 else
dd778a5e 671 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
388e9c81
LB		 672 }
673 }
674
41618e63 675 if (DO_BIC(BIC_CPU_c1))
6168c2e0 676 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
562855ee 677 if (DO_BIC(BIC_CPU_c3))
6168c2e0 678 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
812db3f7 679 if (DO_BIC(BIC_CPU_c6))
6168c2e0 680 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
812db3f7 681 if (DO_BIC(BIC_CPU_c7))
6168c2e0 682 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
678a3bd1 683
0539ba11 684 if (DO_BIC(BIC_Mod_c6))
6168c2e0 685 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
678a3bd1 686
812db3f7 687 if (DO_BIC(BIC_CoreTmp))
6168c2e0 688 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
388e9c81 689
9392bd98
CW		 690 if (do_rapl && !rapl_joules) {
691 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
692 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
693 } else if (do_rapl && rapl_joules) {
694 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
695 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
696 }
697
388e9c81
LB		 698 for (mp = sys.cp; mp; mp = mp->next) {
699 if (mp->format == FORMAT_RAW) {
700 if (mp->width == 64)
c8ade361 701 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 702 else
c8ade361 703 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 704 } else {
0de6c0df
LB		 705 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
706 outp += sprintf(outp, "%s%8s", delim, mp->name);
707 else
708 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 709 }
710 }
711
812db3f7 712 if (DO_BIC(BIC_PkgTmp))
6168c2e0 713 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
889facbe 714
812db3f7 715 if (DO_BIC(BIC_GFX_rc6))
6168c2e0 716 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
fdf676e5 717
812db3f7 718 if (DO_BIC(BIC_GFXMHz))
6168c2e0 719 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
27d47356 720
a99d8730 721 if (DO_BIC(BIC_Totl_c0))
6168c2e0 722 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
a99d8730 723 if (DO_BIC(BIC_Any_c0))
6168c2e0 724 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
a99d8730 725 if (DO_BIC(BIC_GFX_c0))
6168c2e0 726 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
a99d8730 727 if (DO_BIC(BIC_CPUGFX))
6168c2e0 728 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
0b2bb692 729
0f47c08d 730 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 731 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
0f47c08d 732 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 733 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
0f47c08d 734 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 735 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
0f47c08d 736 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 737 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
0f47c08d 738 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 739 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
0f47c08d 740 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 741 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
0f47c08d 742 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 743 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
be0e54c4
LB		 744 if (DO_BIC(BIC_CPU_LPI))
745 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
746 if (DO_BIC(BIC_SYS_LPI))
747 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
103a8fea 748
5c56be9a 749 if (do_rapl && !rapl_joules) {
812db3f7 750 if (DO_BIC(BIC_PkgWatt))
6168c2e0 751 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
9392bd98 752 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 753 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
812db3f7 754 if (DO_BIC(BIC_GFXWatt))
6168c2e0 755 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
812db3f7 756 if (DO_BIC(BIC_RAMWatt))
6168c2e0 757 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
812db3f7 758 if (DO_BIC(BIC_PKG__))
6168c2e0 759 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 760 if (DO_BIC(BIC_RAM__))
6168c2e0 761 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
d7899447 762 } else if (do_rapl && rapl_joules) {
812db3f7 763 if (DO_BIC(BIC_Pkg_J))
6168c2e0 764 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
9392bd98 765 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 766 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
812db3f7 767 if (DO_BIC(BIC_GFX_J))
6168c2e0 768 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
812db3f7 769 if (DO_BIC(BIC_RAM_J))
6168c2e0 770 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
812db3f7 771 if (DO_BIC(BIC_PKG__))
6168c2e0 772 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 773 if (DO_BIC(BIC_RAM__))
6168c2e0 774 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
5c56be9a 775 }
388e9c81
LB		 776 for (mp = sys.pp; mp; mp = mp->next) {
777 if (mp->format == FORMAT_RAW) {
778 if (mp->width == 64)
c8ade361 779 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 780 else
c8ade361 781 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 782 } else {
0de6c0df
LB		 783 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
784 outp += sprintf(outp, "%s%8s", delim, mp->name);
785 else
786 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 787 }
788 }
789
c98d5d94 790 outp += sprintf(outp, "\n");
103a8fea
LB		 791}
792
c98d5d94
LB		 793int dump_counters(struct thread_data *t, struct core_data *c,
794 struct pkg_data *p)
103a8fea 795{
388e9c81
LB		 796 int i;
797 struct msr_counter *mp;
798
3b4d5c7f 799 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 800
801 if (t) {
3b4d5c7f
AS		 802 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
803 t->cpu_id, t->flags);
804 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
805 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
806 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
807 outp += sprintf(outp, "c1: %016llX\n", t->c1);
6886fee4 808
812db3f7 809 if (DO_BIC(BIC_IRQ))
0de6c0df 810 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
812db3f7 811 if (DO_BIC(BIC_SMI))
218f0e8d 812 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
388e9c81
LB		 813
814 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
815 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
816 i, mp->msr_num, t->counter[i]);
817 }
c98d5d94 818 }
103a8fea 819
c98d5d94 820 if (c) {
3b4d5c7f
AS		 821 outp += sprintf(outp, "core: %d\n", c->core_id);
822 outp += sprintf(outp, "c3: %016llX\n", c->c3);
823 outp += sprintf(outp, "c6: %016llX\n", c->c6);
824 outp += sprintf(outp, "c7: %016llX\n", c->c7);
825 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
9392bd98 826 outp += sprintf(outp, "Joules: %0X\n", c->core_energy);
388e9c81
LB		 827
828 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
829 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
830 i, mp->msr_num, c->counter[i]);
831 }
0539ba11 832 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
c98d5d94 833 }
103a8fea 834
c98d5d94 835 if (p) {
3b4d5c7f 836 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 837
838 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
839 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
840 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
841 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
842
3b4d5c7f 843 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
0f47c08d 844 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 845 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
0f47c08d 846 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 847 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
0f47c08d 848 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 849 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 850 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
851 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
852 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
be0e54c4
LB		 853 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
854 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
3b4d5c7f
AS		 855 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
856 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
857 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
858 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
859 outp += sprintf(outp, "Throttle PKG: %0X\n",
860 p->rapl_pkg_perf_status);
861 outp += sprintf(outp, "Throttle RAM: %0X\n",
862 p->rapl_dram_perf_status);
863 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
388e9c81
LB		 864
865 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
866 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
867 i, mp->msr_num, p->counter[i]);
868 }
c98d5d94 869 }
3b4d5c7f
AS		 870
871 outp += sprintf(outp, "\n");
872
c98d5d94 873 return 0;
103a8fea
LB		 874}
875
e23da037
LB		 876/*
877 * column formatting convention & formats
e23da037 878 */
c98d5d94
LB		 879int format_counters(struct thread_data *t, struct core_data *c,
880 struct pkg_data *p)
103a8fea 881{
008d396e 882 double interval_float, tsc;
fc04cc67 883 char *fmt8;
388e9c81
LB		 884 int i;
885 struct msr_counter *mp;
6168c2e0
LB		 886 char *delim = "\t";
887 int printed = 0;
103a8fea 888
c98d5d94
LB		 889 /* if showing only 1st thread in core and this isn't one, bail out */
890 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
891 return 0;
892
893 /* if showing only 1st thread in pkg and this isn't one, bail out */
894 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
895 return 0;
896
1ef7d21a
LB		 897 /*if not summary line and --cpu is used */
898 if ((t != &average.threads) &&
899 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
900 return 0;
901
3f44a5c6 902 if (DO_BIC(BIC_USEC)) {
f4fdf2b4
LB		 903 /* on each row, print how many usec each timestamp took to gather */
904 struct timeval tv;
905
906 timersub(&t->tv_end, &t->tv_begin, &tv);
907 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
908 }
909
3f44a5c6
LB		 910 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
911 if (DO_BIC(BIC_TOD))
912 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
913
d4794f25 914 interval_float = t->tv_delta.tv_sec + t->tv_delta.tv_usec/1000000.0;
103a8fea 915
008d396e
LB		 916 tsc = t->tsc * tsc_tweak;
917
c98d5d94
LB		 918 /* topo columns, print blanks on 1st (average) line */
919 if (t == &average.threads) {
812db3f7 920 if (DO_BIC(BIC_Package))
6168c2e0 921 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
6de68fe1
LB		 922 if (DO_BIC(BIC_Die))
923 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
01235041
PB		 924 if (DO_BIC(BIC_Node))
925 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 926 if (DO_BIC(BIC_Core))
6168c2e0 927 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 928 if (DO_BIC(BIC_CPU))
6168c2e0 929 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
4c2122d4
LB		 930 if (DO_BIC(BIC_APIC))
931 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
932 if (DO_BIC(BIC_X2APIC))
933 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
103a8fea 934 } else {
812db3f7 935 if (DO_BIC(BIC_Package)) {
c98d5d94 936 if (p)
6168c2e0 937 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
c98d5d94 938 else
6168c2e0 939 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 940 }
6de68fe1
LB		 941 if (DO_BIC(BIC_Die)) {
942 if (c)
943 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), cpus[t->cpu_id].die_id);
944 else
945 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
946 }
01235041
PB		 947 if (DO_BIC(BIC_Node)) {
948 if (t)
949 outp += sprintf(outp, "%s%d",
950 (printed++ ? delim : ""),
951 cpus[t->cpu_id].physical_node_id);
952 else
953 outp += sprintf(outp, "%s-",
954 (printed++ ? delim : ""));
955 }
812db3f7 956 if (DO_BIC(BIC_Core)) {
c98d5d94 957 if (c)
6168c2e0 958 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
c98d5d94 959 else
6168c2e0 960 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 961 }
812db3f7 962 if (DO_BIC(BIC_CPU))
6168c2e0 963 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
4c2122d4
LB		 964 if (DO_BIC(BIC_APIC))
965 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
966 if (DO_BIC(BIC_X2APIC))
967 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
103a8fea 968 }
fc04cc67 969
812db3f7 970 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 971 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
fc04cc67
LB		 972 1.0 / units * t->aperf / interval_float);
973
812db3f7 974 if (DO_BIC(BIC_Busy))
6168c2e0 975 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
103a8fea 976
812db3f7 977 if (DO_BIC(BIC_Bzy_MHz)) {
21ed5574 978 if (has_base_hz)
6168c2e0 979 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
21ed5574 980 else
6168c2e0 981 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
008d396e 982 tsc / units * t->aperf / t->mperf / interval_float);
21ed5574 983 }
103a8fea 984
812db3f7 985 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 986 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
103a8fea 987
562a2d37 988 /* IRQ */
0de6c0df
LB		 989 if (DO_BIC(BIC_IRQ)) {
990 if (sums_need_wide_columns)
6168c2e0 991 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 992 else
6168c2e0 993 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 994 }
562a2d37 995
1cc21f7b 996 /* SMI */
812db3f7 997 if (DO_BIC(BIC_SMI))
6168c2e0 998 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1cc21f7b 999
678a3bd1 1000 /* Added counters */
388e9c81
LB		 1001 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1002 if (mp->format == FORMAT_RAW) {
1003 if (mp->width == 32)
5f3aea57 1004 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
388e9c81 1005 else
6168c2e0 1006 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1007 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1008 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1009 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
0de6c0df 1010 else
6168c2e0 1011 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
388e9c81 1012 } else if (mp->format == FORMAT_PERCENT) {
41618e63 1013 if (mp->type == COUNTER_USEC)
6168c2e0 1014 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
41618e63 1015 else
6168c2e0 1016 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
388e9c81
LB		 1017 }
1018 }
1019
41618e63
LB		 1020 /* C1 */
1021 if (DO_BIC(BIC_CPU_c1))
6168c2e0 1022 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
41618e63
LB		 1023
1024
678a3bd1
LB		 1025 /* print per-core data only for 1st thread in core */
1026 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1027 goto done;
1028
562855ee 1029 if (DO_BIC(BIC_CPU_c3))
6168c2e0 1030 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
812db3f7 1031 if (DO_BIC(BIC_CPU_c6))
6168c2e0 1032 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
812db3f7 1033 if (DO_BIC(BIC_CPU_c7))
6168c2e0 1034 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
678a3bd1 1035
0539ba11
LB		 1036 /* Mod%c6 */
1037 if (DO_BIC(BIC_Mod_c6))
6168c2e0 1038 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
0539ba11 1039
812db3f7 1040 if (DO_BIC(BIC_CoreTmp))
6168c2e0 1041 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
889facbe 1042
388e9c81
LB		 1043 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1044 if (mp->format == FORMAT_RAW) {
1045 if (mp->width == 32)
5f3aea57 1046 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
388e9c81 1047 else
6168c2e0 1048 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1049 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1050 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1051 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
0de6c0df 1052 else
6168c2e0 1053 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1054 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1055 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
388e9c81
LB		 1056 }
1057 }
1058
9392bd98
CW		 1059 /*
1060 * If measurement interval exceeds minimum RAPL Joule Counter range,
1061 * indicate that results are suspect by printing "**" in fraction place.
1062 */
1063 if (interval_float < rapl_joule_counter_range)
1064 fmt8 = "%s%.2f";
1065 else
1066 fmt8 = "%6.0f**";
1067
1068 if (DO_BIC(BIC_CorWatt) && (do_rapl & RAPL_PER_CORE_ENERGY))
1069 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units / interval_float);
1070 if (DO_BIC(BIC_Cor_J) && (do_rapl & RAPL_PER_CORE_ENERGY))
1071 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), c->core_energy * rapl_energy_units);
1072
c98d5d94
LB		 1073 /* print per-package data only for 1st core in package */
1074 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1075 goto done;
1076
0b2bb692 1077 /* PkgTmp */
812db3f7 1078 if (DO_BIC(BIC_PkgTmp))
6168c2e0 1079 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
889facbe 1080
fdf676e5 1081 /* GFXrc6 */
812db3f7 1082 if (DO_BIC(BIC_GFX_rc6)) {
ba3dec99 1083 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
6168c2e0 1084 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
9185e988 1085 } else {
6168c2e0 1086 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
9185e988
LB		 1087 p->gfx_rc6_ms / 10.0 / interval_float);
1088 }
1089 }
fdf676e5 1090
27d47356 1091 /* GFXMHz */
812db3f7 1092 if (DO_BIC(BIC_GFXMHz))
6168c2e0 1093 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
27d47356 1094
0b2bb692 1095 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
a99d8730 1096 if (DO_BIC(BIC_Totl_c0))
6168c2e0 1097 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
a99d8730 1098 if (DO_BIC(BIC_Any_c0))
6168c2e0 1099 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
a99d8730 1100 if (DO_BIC(BIC_GFX_c0))
6168c2e0 1101 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
a99d8730 1102 if (DO_BIC(BIC_CPUGFX))
6168c2e0 1103 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
0b2bb692 1104
0f47c08d 1105 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 1106 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
0f47c08d 1107 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 1108 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
0f47c08d 1109 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 1110 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
0f47c08d 1111 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 1112 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
0f47c08d 1113 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 1114 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
0f47c08d 1115 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 1116 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
0f47c08d 1117 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 1118 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
889facbe 1119
be0e54c4
LB		 1120 if (DO_BIC(BIC_CPU_LPI))
1121 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1122 if (DO_BIC(BIC_SYS_LPI))
1123 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1124
812db3f7 1125 if (DO_BIC(BIC_PkgWatt))
6168c2e0 1126 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
9392bd98 1127 if (DO_BIC(BIC_CorWatt) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1128 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
812db3f7 1129 if (DO_BIC(BIC_GFXWatt))
6168c2e0 1130 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
812db3f7 1131 if (DO_BIC(BIC_RAMWatt))
6168c2e0 1132 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
812db3f7 1133 if (DO_BIC(BIC_Pkg_J))
6168c2e0 1134 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
9392bd98 1135 if (DO_BIC(BIC_Cor_J) && !(do_rapl & RAPL_PER_CORE_ENERGY))
6168c2e0 1136 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
812db3f7 1137 if (DO_BIC(BIC_GFX_J))
6168c2e0 1138 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
812db3f7 1139 if (DO_BIC(BIC_RAM_J))
6168c2e0 1140 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
812db3f7 1141 if (DO_BIC(BIC_PKG__))
6168c2e0 1142 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
812db3f7 1143 if (DO_BIC(BIC_RAM__))
6168c2e0 1144 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
812db3f7 1145
388e9c81
LB		 1146 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1147 if (mp->format == FORMAT_RAW) {
1148 if (mp->width == 32)
5f3aea57 1149 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
388e9c81 1150 else
6168c2e0 1151 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1152 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1153 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1154 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
0de6c0df 1155 else
6168c2e0 1156 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1157 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1158 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
388e9c81
LB		 1159 }
1160 }
1161
c98d5d94 1162done:
94d6ab4b
LB		 1163 if (*(outp - 1) != '\n')
1164 outp += sprintf(outp, "\n");
c98d5d94
LB		 1165
1166 return 0;
103a8fea
LB		 1167}
1168
b7d8c148 1169void flush_output_stdout(void)
c98d5d94 1170{
b7d8c148
LB		 1171 FILE *filep;
1172
1173 if (outf == stderr)
1174 filep = stdout;
1175 else
1176 filep = outf;
1177
1178 fputs(output_buffer, filep);
1179 fflush(filep);
1180
c98d5d94
LB		 1181 outp = output_buffer;
1182}
b7d8c148 1183void flush_output_stderr(void)
c98d5d94 1184{
b7d8c148
LB		 1185 fputs(output_buffer, outf);
1186 fflush(outf);
c98d5d94
LB		 1187 outp = output_buffer;
1188}
1189void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 1190{
e23da037 1191 static int printed;
103a8fea 1192
e23da037 1193 if (!printed || !summary_only)
c8ade361 1194 print_header("\t");
103a8fea 1195
9d83601a 1196 format_counters(&average.threads, &average.cores, &average.packages);
103a8fea 1197
e23da037
LB		 1198 printed = 1;
1199
1200 if (summary_only)
1201 return;
1202
c98d5d94 1203 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 1204}
1205
889facbe
LB		 1206#define DELTA_WRAP32(new, old) \
1207 if (new > old) { \
1208 old = new - old; \
1209 } else { \
1210 old = 0x100000000 + new - old; \
1211 }
1212
ba3dec99 1213int
c98d5d94
LB		 1214delta_package(struct pkg_data *new, struct pkg_data *old)
1215{
388e9c81
LB		 1216 int i;
1217 struct msr_counter *mp;
0b2bb692 1218
a99d8730
LB		 1219
1220 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1221 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
a99d8730 1222 if (DO_BIC(BIC_Any_c0))
0b2bb692 1223 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
a99d8730 1224 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1225 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
a99d8730 1226 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1227 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
a99d8730 1228
c98d5d94 1229 old->pc2 = new->pc2 - old->pc2;
0f47c08d 1230 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1231 old->pc3 = new->pc3 - old->pc3;
0f47c08d 1232 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1233 old->pc6 = new->pc6 - old->pc6;
0f47c08d 1234 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1235 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 1236 old->pc8 = new->pc8 - old->pc8;
1237 old->pc9 = new->pc9 - old->pc9;
1238 old->pc10 = new->pc10 - old->pc10;
be0e54c4
LB		 1239 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1240 old->sys_lpi = new->sys_lpi - old->sys_lpi;
889facbe
LB		 1241 old->pkg_temp_c = new->pkg_temp_c;
1242
9185e988
LB		 1243 /* flag an error when rc6 counter resets/wraps */
1244 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1245 old->gfx_rc6_ms = -1;
1246 else
1247 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1248
27d47356
LB		 1249 old->gfx_mhz = new->gfx_mhz;
1250
889facbe
LB		 1251 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1252 DELTA_WRAP32(new->energy_cores, old->energy_cores);
1253 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1254 DELTA_WRAP32(new->energy_dram, old->energy_dram);
1255 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1256 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
ba3dec99 1257
388e9c81
LB		 1258 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1259 if (mp->format == FORMAT_RAW)
1260 old->counter[i] = new->counter[i];
1261 else
1262 old->counter[i] = new->counter[i] - old->counter[i];
1263 }
1264
ba3dec99 1265 return 0;
c98d5d94 1266}
103a8fea 1267
c98d5d94
LB		 1268void
1269delta_core(struct core_data *new, struct core_data *old)
103a8fea 1270{
388e9c81
LB		 1271 int i;
1272 struct msr_counter *mp;
1273
c98d5d94
LB		 1274 old->c3 = new->c3 - old->c3;
1275 old->c6 = new->c6 - old->c6;
1276 old->c7 = new->c7 - old->c7;
889facbe 1277 old->core_temp_c = new->core_temp_c;
0539ba11 1278 old->mc6_us = new->mc6_us - old->mc6_us;
388e9c81 1279
9392bd98
CW		 1280 DELTA_WRAP32(new->core_energy, old->core_energy);
1281
388e9c81
LB		 1282 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1283 if (mp->format == FORMAT_RAW)
1284 old->counter[i] = new->counter[i];
1285 else
1286 old->counter[i] = new->counter[i] - old->counter[i];
1287 }
c98d5d94 1288}
103a8fea 1289
c3ae331d
LB		 1290/*
1291 * old = new - old
1292 */
ba3dec99 1293int
c98d5d94
LB		 1294delta_thread(struct thread_data *new, struct thread_data *old,
1295 struct core_data *core_delta)
1296{
388e9c81
LB		 1297 int i;
1298 struct msr_counter *mp;
1299
4c2122d4
LB		 1300 /* we run cpuid just the 1st time, copy the results */
1301 if (DO_BIC(BIC_APIC))
1302 new->apic_id = old->apic_id;
1303 if (DO_BIC(BIC_X2APIC))
1304 new->x2apic_id = old->x2apic_id;
1305
3f44a5c6
LB		 1306 /*
1307 * the timestamps from start of measurement interval are in "old"
1308 * the timestamp from end of measurement interval are in "new"
1309 * over-write old w/ new so we can print end of interval values
1310 */
1311
d4794f25 1312 timersub(&new->tv_begin, &old->tv_begin, &old->tv_delta);
3f44a5c6
LB		 1313 old->tv_begin = new->tv_begin;
1314 old->tv_end = new->tv_end;
1315
c98d5d94
LB		 1316 old->tsc = new->tsc - old->tsc;
1317
1318 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 1319 if (old->tsc < (1000 * 1000))
1320 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1321 "You can disable all c-states by booting with \"idle=poll\"\n"
1322 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 1323
c98d5d94 1324 old->c1 = new->c1 - old->c1;
103a8fea 1325
812db3f7 1326 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
a729617c
LB		 1327 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1328 old->aperf = new->aperf - old->aperf;
1329 old->mperf = new->mperf - old->mperf;
1330 } else {
ba3dec99 1331 return -1;
103a8fea 1332 }
c98d5d94 1333 }
103a8fea 1334
103a8fea 1335
144b44b1
LB		 1336 if (use_c1_residency_msr) {
1337 /*
1338 * Some models have a dedicated C1 residency MSR,
1339 * which should be more accurate than the derivation below.
1340 */
1341 } else {
1342 /*
1343 * As counter collection is not atomic,
1344 * it is possible for mperf's non-halted cycles + idle states
1345 * to exceed TSC's all cycles: show c1 = 0% in that case.
1346 */
95149369 1347 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
144b44b1
LB		 1348 old->c1 = 0;
1349 else {
1350 /* normal case, derive c1 */
008d396e 1351 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
c98d5d94 1352 - core_delta->c6 - core_delta->c7;
144b44b1 1353 }
c98d5d94 1354 }
c3ae331d 1355
c98d5d94 1356 if (old->mperf == 0) {
b7d8c148
LB		 1357 if (debug > 1)
1358 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 1359 old->mperf = 1; /* divide by 0 protection */
103a8fea 1360 }
c98d5d94 1361
812db3f7 1362 if (DO_BIC(BIC_IRQ))
562a2d37
LB		 1363 old->irq_count = new->irq_count - old->irq_count;
1364
812db3f7 1365 if (DO_BIC(BIC_SMI))
1ed51011 1366 old->smi_count = new->smi_count - old->smi_count;
ba3dec99 1367
388e9c81
LB		 1368 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1369 if (mp->format == FORMAT_RAW)
1370 old->counter[i] = new->counter[i];
1371 else
1372 old->counter[i] = new->counter[i] - old->counter[i];
1373 }
ba3dec99 1374 return 0;
c98d5d94
LB		 1375}
1376
1377int delta_cpu(struct thread_data *t, struct core_data *c,
1378 struct pkg_data *p, struct thread_data *t2,
1379 struct core_data *c2, struct pkg_data *p2)
1380{
ba3dec99
LB		 1381 int retval = 0;
1382
c98d5d94
LB		 1383 /* calculate core delta only for 1st thread in core */
1384 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1385 delta_core(c, c2);
1386
1387 /* always calculate thread delta */
ba3dec99
LB		 1388 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1389 if (retval)
1390 return retval;
c98d5d94
LB		 1391
1392 /* calculate package delta only for 1st core in package */
1393 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
ba3dec99 1394 retval = delta_package(p, p2);
c98d5d94 1395
ba3dec99 1396 return retval;
103a8fea
LB		 1397}
1398
c98d5d94
LB		 1399void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1400{
388e9c81
LB		 1401 int i;
1402 struct msr_counter *mp;
1403
3f44a5c6
LB		 1404 t->tv_begin.tv_sec = 0;
1405 t->tv_begin.tv_usec = 0;
1406 t->tv_end.tv_sec = 0;
1407 t->tv_end.tv_usec = 0;
d4794f25
YG		 1408 t->tv_delta.tv_sec = 0;
1409 t->tv_delta.tv_usec = 0;
3f44a5c6 1410
c98d5d94
LB		 1411 t->tsc = 0;
1412 t->aperf = 0;
1413 t->mperf = 0;
1414 t->c1 = 0;
1415
562a2d37
LB		 1416 t->irq_count = 0;
1417 t->smi_count = 0;
1418
c98d5d94
LB		 1419 /* tells format_counters to dump all fields from this set */
1420 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1421
1422 c->c3 = 0;
1423 c->c6 = 0;
1424 c->c7 = 0;
0539ba11 1425 c->mc6_us = 0;
889facbe 1426 c->core_temp_c = 0;
9392bd98 1427 c->core_energy = 0;
c98d5d94 1428
0b2bb692
LB		 1429 p->pkg_wtd_core_c0 = 0;
1430 p->pkg_any_core_c0 = 0;
1431 p->pkg_any_gfxe_c0 = 0;
1432 p->pkg_both_core_gfxe_c0 = 0;
1433
c98d5d94 1434 p->pc2 = 0;
0f47c08d 1435 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1436 p->pc3 = 0;
0f47c08d 1437 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1438 p->pc6 = 0;
0f47c08d 1439 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1440 p->pc7 = 0;
ca58710f
KCA		 1441 p->pc8 = 0;
1442 p->pc9 = 0;
1443 p->pc10 = 0;
be0e54c4
LB		 1444 p->cpu_lpi = 0;
1445 p->sys_lpi = 0;
889facbe
LB		 1446
1447 p->energy_pkg = 0;
1448 p->energy_dram = 0;
1449 p->energy_cores = 0;
1450 p->energy_gfx = 0;
1451 p->rapl_pkg_perf_status = 0;
1452 p->rapl_dram_perf_status = 0;
1453 p->pkg_temp_c = 0;
27d47356 1454
fdf676e5 1455 p->gfx_rc6_ms = 0;
27d47356 1456 p->gfx_mhz = 0;
388e9c81
LB		 1457 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1458 t->counter[i] = 0;
1459
1460 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1461 c->counter[i] = 0;
1462
1463 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1464 p->counter[i] = 0;
c98d5d94
LB		 1465}
1466int sum_counters(struct thread_data *t, struct core_data *c,
1467 struct pkg_data *p)
103a8fea 1468{
388e9c81
LB		 1469 int i;
1470 struct msr_counter *mp;
1471
4c2122d4
LB		 1472 /* copy un-changing apic_id's */
1473 if (DO_BIC(BIC_APIC))
1474 average.threads.apic_id = t->apic_id;
1475 if (DO_BIC(BIC_X2APIC))
1476 average.threads.x2apic_id = t->x2apic_id;
1477
3f44a5c6
LB		 1478 /* remember first tv_begin */
1479 if (average.threads.tv_begin.tv_sec == 0)
1480 average.threads.tv_begin = t->tv_begin;
1481
1482 /* remember last tv_end */
1483 average.threads.tv_end = t->tv_end;
1484
c98d5d94
LB		 1485 average.threads.tsc += t->tsc;
1486 average.threads.aperf += t->aperf;
1487 average.threads.mperf += t->mperf;
1488 average.threads.c1 += t->c1;
103a8fea 1489
562a2d37
LB		 1490 average.threads.irq_count += t->irq_count;
1491 average.threads.smi_count += t->smi_count;
1492
388e9c81
LB		 1493 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1494 if (mp->format == FORMAT_RAW)
1495 continue;
1496 average.threads.counter[i] += t->counter[i];
1497 }
1498
c98d5d94
LB		 1499 /* sum per-core values only for 1st thread in core */
1500 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1501 return 0;
103a8fea 1502
c98d5d94
LB		 1503 average.cores.c3 += c->c3;
1504 average.cores.c6 += c->c6;
1505 average.cores.c7 += c->c7;
0539ba11 1506 average.cores.mc6_us += c->mc6_us;
c98d5d94 1507
889facbe
LB		 1508 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1509
9392bd98
CW		 1510 average.cores.core_energy += c->core_energy;
1511
388e9c81
LB		 1512 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1513 if (mp->format == FORMAT_RAW)
1514 continue;
1515 average.cores.counter[i] += c->counter[i];
1516 }
1517
c98d5d94
LB		 1518 /* sum per-pkg values only for 1st core in pkg */
1519 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1520 return 0;
1521
a99d8730 1522 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1523 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
a99d8730 1524 if (DO_BIC(BIC_Any_c0))
0b2bb692 1525 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
a99d8730 1526 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1527 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
a99d8730 1528 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1529 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
0b2bb692 1530
c98d5d94 1531 average.packages.pc2 += p->pc2;
0f47c08d 1532 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1533 average.packages.pc3 += p->pc3;
0f47c08d 1534 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1535 average.packages.pc6 += p->pc6;
0f47c08d 1536 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1537 average.packages.pc7 += p->pc7;
ca58710f
KCA		 1538 average.packages.pc8 += p->pc8;
1539 average.packages.pc9 += p->pc9;
1540 average.packages.pc10 += p->pc10;
c98d5d94 1541
be0e54c4
LB		 1542 average.packages.cpu_lpi = p->cpu_lpi;
1543 average.packages.sys_lpi = p->sys_lpi;
1544
889facbe
LB		 1545 average.packages.energy_pkg += p->energy_pkg;
1546 average.packages.energy_dram += p->energy_dram;
1547 average.packages.energy_cores += p->energy_cores;
1548 average.packages.energy_gfx += p->energy_gfx;
1549
fdf676e5 1550 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
27d47356
LB		 1551 average.packages.gfx_mhz = p->gfx_mhz;
1552
889facbe
LB		 1553 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1554
1555 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1556 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
388e9c81
LB		 1557
1558 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1559 if (mp->format == FORMAT_RAW)
1560 continue;
1561 average.packages.counter[i] += p->counter[i];
1562 }
c98d5d94
LB		 1563 return 0;
1564}
1565/*
1566 * sum the counters for all cpus in the system
1567 * compute the weighted average
1568 */
1569void compute_average(struct thread_data *t, struct core_data *c,
1570 struct pkg_data *p)
1571{
388e9c81
LB		 1572 int i;
1573 struct msr_counter *mp;
1574
c98d5d94
LB		 1575 clear_counters(&average.threads, &average.cores, &average.packages);
1576
1577 for_all_cpus(sum_counters, t, c, p);
1578
d4794f25
YG		 1579 /* Use the global time delta for the average. */
1580 average.threads.tv_delta = tv_delta;
1581
c98d5d94
LB		 1582 average.threads.tsc /= topo.num_cpus;
1583 average.threads.aperf /= topo.num_cpus;
1584 average.threads.mperf /= topo.num_cpus;
1585 average.threads.c1 /= topo.num_cpus;
1586
0de6c0df
LB		 1587 if (average.threads.irq_count > 9999999)
1588 sums_need_wide_columns = 1;
1589
c98d5d94
LB		 1590 average.cores.c3 /= topo.num_cores;
1591 average.cores.c6 /= topo.num_cores;
1592 average.cores.c7 /= topo.num_cores;
0539ba11 1593 average.cores.mc6_us /= topo.num_cores;
c98d5d94 1594
a99d8730 1595 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1596 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
a99d8730 1597 if (DO_BIC(BIC_Any_c0))
0b2bb692 1598 average.packages.pkg_any_core_c0 /= topo.num_packages;
a99d8730 1599 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1600 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
a99d8730 1601 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1602 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
0b2bb692 1603
c98d5d94 1604 average.packages.pc2 /= topo.num_packages;
0f47c08d 1605 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1606 average.packages.pc3 /= topo.num_packages;
0f47c08d 1607 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1608 average.packages.pc6 /= topo.num_packages;
0f47c08d 1609 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1610 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 1611
1612 average.packages.pc8 /= topo.num_packages;
1613 average.packages.pc9 /= topo.num_packages;
1614 average.packages.pc10 /= topo.num_packages;
388e9c81
LB		 1615
1616 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1617 if (mp->format == FORMAT_RAW)
1618 continue;
0de6c0df
LB		 1619 if (mp->type == COUNTER_ITEMS) {
1620 if (average.threads.counter[i] > 9999999)
1621 sums_need_wide_columns = 1;
41618e63 1622 continue;
0de6c0df 1623 }
388e9c81
LB		 1624 average.threads.counter[i] /= topo.num_cpus;
1625 }
1626 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1627 if (mp->format == FORMAT_RAW)
1628 continue;
0de6c0df
LB		 1629 if (mp->type == COUNTER_ITEMS) {
1630 if (average.cores.counter[i] > 9999999)
1631 sums_need_wide_columns = 1;
1632 }
388e9c81
LB		 1633 average.cores.counter[i] /= topo.num_cores;
1634 }
1635 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1636 if (mp->format == FORMAT_RAW)
1637 continue;
0de6c0df
LB		 1638 if (mp->type == COUNTER_ITEMS) {
1639 if (average.packages.counter[i] > 9999999)
1640 sums_need_wide_columns = 1;
1641 }
388e9c81
LB		 1642 average.packages.counter[i] /= topo.num_packages;
1643 }
103a8fea
LB		 1644}
1645
c98d5d94 1646static unsigned long long rdtsc(void)
103a8fea 1647{
c98d5d94 1648 unsigned int low, high;
15aaa346 1649
c98d5d94 1650 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 1651
c98d5d94
LB		 1652 return low | ((unsigned long long)high) << 32;
1653}
15aaa346 1654
495c7654
LB		 1655/*
1656 * Open a file, and exit on failure
1657 */
1658FILE *fopen_or_die(const char *path, const char *mode)
1659{
1660 FILE *filep = fopen(path, mode);
1661
1662 if (!filep)
1663 err(1, "%s: open failed", path);
1664 return filep;
1665}
1666/*
1667 * snapshot_sysfs_counter()
1668 *
1669 * return snapshot of given counter
1670 */
1671unsigned long long snapshot_sysfs_counter(char *path)
1672{
1673 FILE *fp;
1674 int retval;
1675 unsigned long long counter;
1676
1677 fp = fopen_or_die(path, "r");
1678
1679 retval = fscanf(fp, "%lld", &counter);
1680 if (retval != 1)
1681 err(1, "snapshot_sysfs_counter(%s)", path);
1682
1683 fclose(fp);
1684
1685 return counter;
1686}
1687
1688int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1689{
1690 if (mp->msr_num != 0) {
1691 if (get_msr(cpu, mp->msr_num, counterp))
1692 return -1;
1693 } else {
46c27978 1694 char path[128 + PATH_BYTES];
41618e63
LB		 1695
1696 if (mp->flags & SYSFS_PERCPU) {
1697 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1698 cpu, mp->path);
1699
1700 *counterp = snapshot_sysfs_counter(path);
1701 } else {
1702 *counterp = snapshot_sysfs_counter(mp->path);
1703 }
495c7654
LB		 1704 }
1705
1706 return 0;
1707}
1708
4c2122d4
LB		 1709void get_apic_id(struct thread_data *t)
1710{
34041551 1711 unsigned int eax, ebx, ecx, edx;
4c2122d4 1712
34041551
LB		 1713 if (DO_BIC(BIC_APIC)) {
1714 eax = ebx = ecx = edx = 0;
1715 __cpuid(1, eax, ebx, ecx, edx);
4c2122d4 1716
34041551
LB		 1717 t->apic_id = (ebx >> 24) & 0xff;
1718 }
1719
1720 if (!DO_BIC(BIC_X2APIC))
4c2122d4
LB		 1721 return;
1722
34041551
LB		 1723 if (authentic_amd) {
1724 unsigned int topology_extensions;
4c2122d4 1725
34041551
LB		 1726 if (max_extended_level < 0x8000001e)
1727 return;
4c2122d4 1728
34041551
LB		 1729 eax = ebx = ecx = edx = 0;
1730 __cpuid(0x80000001, eax, ebx, ecx, edx);
1731 topology_extensions = ecx & (1 << 22);
1732
1733 if (topology_extensions == 0)
1734 return;
1735
1736 eax = ebx = ecx = edx = 0;
1737 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1738
1739 t->x2apic_id = eax;
4c2122d4 1740 return;
34041551 1741 }
4c2122d4 1742
34041551
LB		 1743 if (!genuine_intel)
1744 return;
1745
1746 if (max_level < 0xb)
4c2122d4
LB		 1747 return;
1748
1749 ecx = 0;
1750 __cpuid(0xb, eax, ebx, ecx, edx);
1751 t->x2apic_id = edx;
1752
34041551
LB		 1753 if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1754 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1755 t->cpu_id, t->apic_id, t->x2apic_id);
4c2122d4
LB		 1756}
1757
c98d5d94
LB		 1758/*
1759 * get_counters(...)
1760 * migrate to cpu
1761 * acquire and record local counters for that cpu
1762 */
1763int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1764{
1765 int cpu = t->cpu_id;
889facbe 1766 unsigned long long msr;
0102b067 1767 int aperf_mperf_retry_count = 0;
388e9c81
LB		 1768 struct msr_counter *mp;
1769 int i;
88c3281f 1770
e52966c0 1771 if (cpu_migrate(cpu)) {
b7d8c148 1772 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
c98d5d94 1773 return -1;
e52966c0 1774 }
15aaa346 1775
d4794f25
YG		 1776 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1777
4c2122d4
LB		 1778 if (first_counter_read)
1779 get_apic_id(t);
0102b067 1780retry:
c98d5d94
LB		 1781 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1782
812db3f7 1783 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
0102b067
LB		 1784 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1785
1786 /*
1787 * The TSC, APERF and MPERF must be read together for
1788 * APERF/MPERF and MPERF/TSC to give accurate results.
1789 *
1790 * Unfortunately, APERF and MPERF are read by
1791 * individual system call, so delays may occur
1792 * between them. If the time to read them
1793 * varies by a large amount, we re-read them.
1794 */
1795
1796 /*
1797 * This initial dummy APERF read has been seen to
1798 * reduce jitter in the subsequent reads.
1799 */
1800
1801 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1802 return -3;
1803
1804 t->tsc = rdtsc(); /* re-read close to APERF */
1805
1806 tsc_before = t->tsc;
1807
9c63a650 1808 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 1809 return -3;
0102b067
LB		 1810
1811 tsc_between = rdtsc();
1812
9c63a650 1813 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 1814 return -4;
0102b067
LB		 1815
1816 tsc_after = rdtsc();
1817
1818 aperf_time = tsc_between - tsc_before;
1819 mperf_time = tsc_after - tsc_between;
1820
1821 /*
1822 * If the system call latency to read APERF and MPERF
1823 * differ by more than 2x, then try again.
1824 */
1825 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1826 aperf_mperf_retry_count++;
1827 if (aperf_mperf_retry_count < 5)
1828 goto retry;
1829 else
1830 warnx("cpu%d jitter %lld %lld",
1831 cpu, aperf_time, mperf_time);
1832 }
1833 aperf_mperf_retry_count = 0;
1834
b2b34dfe
HC		 1835 t->aperf = t->aperf * aperf_mperf_multiplier;
1836 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 1837 }
1838
812db3f7 1839 if (DO_BIC(BIC_IRQ))
562a2d37 1840 t->irq_count = irqs_per_cpu[cpu];
812db3f7 1841 if (DO_BIC(BIC_SMI)) {
1ed51011
LB		 1842 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1843 return -5;
1844 t->smi_count = msr & 0xFFFFFFFF;
1845 }
0539ba11 1846 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
144b44b1
LB		 1847 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1848 return -6;
1849 }
1850
388e9c81 1851 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
495c7654 1852 if (get_mp(cpu, mp, &t->counter[i]))
388e9c81
LB		 1853 return -10;
1854 }
1855
c98d5d94
LB		 1856 /* collect core counters only for 1st thread in core */
1857 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
f4fdf2b4 1858 goto done;
c98d5d94 1859
562855ee 1860 if (DO_BIC(BIC_CPU_c3)) {
c98d5d94
LB		 1861 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1862 return -6;
144b44b1
LB		 1863 }
1864
812db3f7 1865 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
c98d5d94
LB		 1866 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1867 return -7;
fb5d4327
DC		 1868 } else if (do_knl_cstates) {
1869 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1870 return -7;
c98d5d94
LB		 1871 }
1872
812db3f7 1873 if (DO_BIC(BIC_CPU_c7))
c98d5d94
LB		 1874 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1875 return -8;
1876
0539ba11
LB		 1877 if (DO_BIC(BIC_Mod_c6))
1878 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1879 return -8;
1880
812db3f7 1881 if (DO_BIC(BIC_CoreTmp)) {
889facbe
LB		 1882 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1883 return -9;
1884 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1885 }
1886
9392bd98
CW		 1887 if (do_rapl & RAPL_AMD_F17H) {
1888 if (get_msr(cpu, MSR_CORE_ENERGY_STAT, &msr))
1889 return -14;
1890 c->core_energy = msr & 0xFFFFFFFF;
1891 }
1892
388e9c81 1893 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
495c7654 1894 if (get_mp(cpu, mp, &c->counter[i]))
388e9c81
LB		 1895 return -10;
1896 }
889facbe 1897
c98d5d94
LB		 1898 /* collect package counters only for 1st core in package */
1899 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
f4fdf2b4 1900 goto done;
c98d5d94 1901
a99d8730 1902 if (DO_BIC(BIC_Totl_c0)) {
0b2bb692
LB		 1903 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1904 return -10;
a99d8730
LB		 1905 }
1906 if (DO_BIC(BIC_Any_c0)) {
0b2bb692
LB		 1907 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1908 return -11;
a99d8730
LB		 1909 }
1910 if (DO_BIC(BIC_GFX_c0)) {
0b2bb692
LB		 1911 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1912 return -12;
a99d8730
LB		 1913 }
1914 if (DO_BIC(BIC_CPUGFX)) {
0b2bb692
LB		 1915 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1916 return -13;
1917 }
0f47c08d 1918 if (DO_BIC(BIC_Pkgpc3))
c98d5d94
LB		 1919 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1920 return -9;
0f47c08d 1921 if (DO_BIC(BIC_Pkgpc6)) {
0539ba11
LB		 1922 if (do_slm_cstates) {
1923 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1924 return -10;
1925 } else {
1926 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1927 return -10;
1928 }
1929 }
1930
0f47c08d 1931 if (DO_BIC(BIC_Pkgpc2))
c98d5d94
LB		 1932 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1933 return -11;
0f47c08d 1934 if (DO_BIC(BIC_Pkgpc7))
c98d5d94
LB		 1935 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1936 return -12;
0f47c08d 1937 if (DO_BIC(BIC_Pkgpc8))
ca58710f
KCA		 1938 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1939 return -13;
0f47c08d 1940 if (DO_BIC(BIC_Pkgpc9))
ca58710f
KCA		 1941 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1942 return -13;
0f47c08d 1943 if (DO_BIC(BIC_Pkgpc10))
ca58710f
KCA		 1944 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1945 return -13;
0f47c08d 1946
be0e54c4
LB		 1947 if (DO_BIC(BIC_CPU_LPI))
1948 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1949 if (DO_BIC(BIC_SYS_LPI))
1950 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1951
889facbe
LB		 1952 if (do_rapl & RAPL_PKG) {
1953 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1954 return -13;
1955 p->energy_pkg = msr & 0xFFFFFFFF;
1956 }
9148494c 1957 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
889facbe
LB		 1958 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1959 return -14;
1960 p->energy_cores = msr & 0xFFFFFFFF;
1961 }
1962 if (do_rapl & RAPL_DRAM) {
1963 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1964 return -15;
1965 p->energy_dram = msr & 0xFFFFFFFF;
1966 }
1967 if (do_rapl & RAPL_GFX) {
1968 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1969 return -16;
1970 p->energy_gfx = msr & 0xFFFFFFFF;
1971 }
1972 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1973 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1974 return -16;
1975 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1976 }
1977 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1978 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1979 return -16;
1980 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1981 }
3316f99a
CW		 1982 if (do_rapl & RAPL_AMD_F17H) {
1983 if (get_msr(cpu, MSR_PKG_ENERGY_STAT, &msr))
1984 return -13;
1985 p->energy_pkg = msr & 0xFFFFFFFF;
1986 }
812db3f7 1987 if (DO_BIC(BIC_PkgTmp)) {
889facbe
LB		 1988 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1989 return -17;
1990 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1991 }
fdf676e5 1992
812db3f7 1993 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 1994 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1995
812db3f7 1996 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 1997 p->gfx_mhz = gfx_cur_mhz;
1998
388e9c81 1999 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
495c7654 2000 if (get_mp(cpu, mp, &p->counter[i]))
388e9c81
LB		 2001 return -10;
2002 }
f4fdf2b4
LB		 2003done:
2004 gettimeofday(&t->tv_end, (struct timezone *)NULL);
388e9c81 2005
15aaa346 2006 return 0;
103a8fea
LB		 2007}
2008
ee7e38e3
LB		 2009/*
2010 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
2011 * If you change the values, note they are used both in comparisons
2012 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
2013 */
2014
2015#define PCLUKN 0 /* Unknown */
2016#define PCLRSV 1 /* Reserved */
2017#define PCL__0 2 /* PC0 */
2018#define PCL__1 3 /* PC1 */
2019#define PCL__2 4 /* PC2 */
2020#define PCL__3 5 /* PC3 */
2021#define PCL__4 6 /* PC4 */
2022#define PCL__6 7 /* PC6 */
2023#define PCL_6N 8 /* PC6 No Retention */
2024#define PCL_6R 9 /* PC6 Retention */
2025#define PCL__7 10 /* PC7 */
2026#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 2027#define PCL__8 12 /* PC8 */
2028#define PCL__9 13 /* PC9 */
445640a5
LB		 2029#define PCL_10 14 /* PC10 */
2030#define PCLUNL 15 /* Unlimited */
ee7e38e3
LB		 2031
2032int pkg_cstate_limit = PCLUKN;
2033char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
445640a5 2034 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
ee7e38e3 2035
e9257f5f
LB		 2036int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2037int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2038int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
0539ba11 2039int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
f2642888 2040int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
e9257f5f 2041int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
445640a5 2042int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2085e124 2043int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 2044
a2b7b749
LB		 2045
2046static void
2047calculate_tsc_tweak()
2048{
a2b7b749
LB		 2049 tsc_tweak = base_hz / tsc_hz;
2050}
2051
fcd17211
LB		 2052static void
2053dump_nhm_platform_info(void)
103a8fea
LB		 2054{
2055 unsigned long long msr;
2056 unsigned int ratio;
2057
ec0adc53 2058 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 2059
b7d8c148 2060 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 2061
103a8fea 2062 ratio = (msr >> 40) & 0xFF;
710f273b 2063 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
103a8fea
LB		 2064 ratio, bclk, ratio * bclk);
2065
2066 ratio = (msr >> 8) & 0xFF;
710f273b 2067 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
103a8fea
LB		 2068 ratio, bclk, ratio * bclk);
2069
7ce7d5de 2070 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
b7d8c148 2071 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
bfae2052 2072 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 2073
fcd17211
LB		 2074 return;
2075}
2076
2077static void
2078dump_hsw_turbo_ratio_limits(void)
2079{
2080 unsigned long long msr;
2081 unsigned int ratio;
2082
7ce7d5de 2083 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 2084
b7d8c148 2085 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 2086
2087 ratio = (msr >> 8) & 0xFF;
2088 if (ratio)
710f273b 2089 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
fcd17211
LB		 2090 ratio, bclk, ratio * bclk);
2091
2092 ratio = (msr >> 0) & 0xFF;
2093 if (ratio)
710f273b 2094 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
fcd17211
LB		 2095 ratio, bclk, ratio * bclk);
2096 return;
2097}
2098
2099static void
2100dump_ivt_turbo_ratio_limits(void)
2101{
2102 unsigned long long msr;
2103 unsigned int ratio;
6574a5d5 2104
7ce7d5de 2105 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 2106
b7d8c148 2107 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 2108
2109 ratio = (msr >> 56) & 0xFF;
2110 if (ratio)
710f273b 2111 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
6574a5d5
LB		 2112 ratio, bclk, ratio * bclk);
2113
2114 ratio = (msr >> 48) & 0xFF;
2115 if (ratio)
710f273b 2116 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
6574a5d5
LB		 2117 ratio, bclk, ratio * bclk);
2118
2119 ratio = (msr >> 40) & 0xFF;
2120 if (ratio)
710f273b 2121 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
6574a5d5
LB		 2122 ratio, bclk, ratio * bclk);
2123
2124 ratio = (msr >> 32) & 0xFF;
2125 if (ratio)
710f273b 2126 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
6574a5d5
LB		 2127 ratio, bclk, ratio * bclk);
2128
2129 ratio = (msr >> 24) & 0xFF;
2130 if (ratio)
710f273b 2131 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
6574a5d5
LB		 2132 ratio, bclk, ratio * bclk);
2133
2134 ratio = (msr >> 16) & 0xFF;
2135 if (ratio)
710f273b 2136 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
6574a5d5
LB		 2137 ratio, bclk, ratio * bclk);
2138
2139 ratio = (msr >> 8) & 0xFF;
2140 if (ratio)
710f273b 2141 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
6574a5d5
LB		 2142 ratio, bclk, ratio * bclk);
2143
2144 ratio = (msr >> 0) & 0xFF;
2145 if (ratio)
710f273b 2146 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
6574a5d5 2147 ratio, bclk, ratio * bclk);
fcd17211
LB		 2148 return;
2149}
31e07522
LB		 2150int has_turbo_ratio_group_limits(int family, int model)
2151{
2152
2153 if (!genuine_intel)
2154 return 0;
2155
2156 switch (model) {
2157 case INTEL_FAM6_ATOM_GOLDMONT:
2158 case INTEL_FAM6_SKYLAKE_X:
f2c4db1b 2159 case INTEL_FAM6_ATOM_GOLDMONT_X:
31e07522
LB		 2160 return 1;
2161 }
2162 return 0;
2163}
6574a5d5 2164
fcd17211 2165static void
31e07522 2166dump_turbo_ratio_limits(int family, int model)
fcd17211 2167{
31e07522
LB		 2168 unsigned long long msr, core_counts;
2169 unsigned int ratio, group_size;
103a8fea 2170
7ce7d5de 2171 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
b7d8c148 2172 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5 2173
31e07522
LB		 2174 if (has_turbo_ratio_group_limits(family, model)) {
2175 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2176 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2177 } else {
2178 core_counts = 0x0807060504030201;
2179 }
2180
6574a5d5 2181 ratio = (msr >> 56) & 0xFF;
31e07522 2182 group_size = (core_counts >> 56) & 0xFF;
6574a5d5 2183 if (ratio)
31e07522
LB		 2184 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2185 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2186
2187 ratio = (msr >> 48) & 0xFF;
31e07522 2188 group_size = (core_counts >> 48) & 0xFF;
6574a5d5 2189 if (ratio)
31e07522
LB		 2190 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2191 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2192
2193 ratio = (msr >> 40) & 0xFF;
31e07522 2194 group_size = (core_counts >> 40) & 0xFF;
6574a5d5 2195 if (ratio)
31e07522
LB		 2196 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2197 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2198
2199 ratio = (msr >> 32) & 0xFF;
31e07522 2200 group_size = (core_counts >> 32) & 0xFF;
6574a5d5 2201 if (ratio)
31e07522
LB		 2202 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2203 ratio, bclk, ratio * bclk, group_size);
6574a5d5 2204
103a8fea 2205 ratio = (msr >> 24) & 0xFF;
31e07522 2206 group_size = (core_counts >> 24) & 0xFF;
103a8fea 2207 if (ratio)
31e07522
LB		 2208 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2209 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2210
2211 ratio = (msr >> 16) & 0xFF;
31e07522 2212 group_size = (core_counts >> 16) & 0xFF;
103a8fea 2213 if (ratio)
31e07522
LB		 2214 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2215 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2216
2217 ratio = (msr >> 8) & 0xFF;
31e07522 2218 group_size = (core_counts >> 8) & 0xFF;
103a8fea 2219 if (ratio)
31e07522
LB		 2220 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2221 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2222
2223 ratio = (msr >> 0) & 0xFF;
31e07522 2224 group_size = (core_counts >> 0) & 0xFF;
103a8fea 2225 if (ratio)
31e07522
LB		 2226 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2227 ratio, bclk, ratio * bclk, group_size);
fcd17211
LB		 2228 return;
2229}
3a9a941d 2230
0f7887c4
LB		 2231static void
2232dump_atom_turbo_ratio_limits(void)
2233{
2234 unsigned long long msr;
2235 unsigned int ratio;
2236
2237 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2238 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2239
2240 ratio = (msr >> 0) & 0x3F;
2241 if (ratio)
2242 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2243 ratio, bclk, ratio * bclk);
2244
2245 ratio = (msr >> 8) & 0x3F;
2246 if (ratio)
2247 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2248 ratio, bclk, ratio * bclk);
2249
2250 ratio = (msr >> 16) & 0x3F;
2251 if (ratio)
2252 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2253 ratio, bclk, ratio * bclk);
2254
2255 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2256 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2257
2258 ratio = (msr >> 24) & 0x3F;
2259 if (ratio)
2260 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2261 ratio, bclk, ratio * bclk);
2262
2263 ratio = (msr >> 16) & 0x3F;
2264 if (ratio)
2265 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2266 ratio, bclk, ratio * bclk);
2267
2268 ratio = (msr >> 8) & 0x3F;
2269 if (ratio)
2270 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2271 ratio, bclk, ratio * bclk);
2272
2273 ratio = (msr >> 0) & 0x3F;
2274 if (ratio)
2275 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2276 ratio, bclk, ratio * bclk);
2277}
2278
fb5d4327
DC		 2279static void
2280dump_knl_turbo_ratio_limits(void)
2281{
cbf97aba
HC		 2282 const unsigned int buckets_no = 7;
2283
fb5d4327 2284 unsigned long long msr;
cbf97aba
HC		 2285 int delta_cores, delta_ratio;
2286 int i, b_nr;
2287 unsigned int cores[buckets_no];
2288 unsigned int ratio[buckets_no];
fb5d4327 2289
ebf5926a 2290 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
fb5d4327 2291
b7d8c148 2292 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
bfae2052 2293 base_cpu, msr);
fb5d4327
DC		 2294
2295 /**
2296 * Turbo encoding in KNL is as follows:
cbf97aba
HC		 2297 * [0] -- Reserved
2298 * [7:1] -- Base value of number of active cores of bucket 1.
fb5d4327
DC		 2299 * [15:8] -- Base value of freq ratio of bucket 1.
2300 * [20:16] -- +ve delta of number of active cores of bucket 2.
2301 * i.e. active cores of bucket 2 =
2302 * active cores of bucket 1 + delta
2303 * [23:21] -- Negative delta of freq ratio of bucket 2.
2304 * i.e. freq ratio of bucket 2 =
2305 * freq ratio of bucket 1 - delta
2306 * [28:24]-- +ve delta of number of active cores of bucket 3.
2307 * [31:29]-- -ve delta of freq ratio of bucket 3.
2308 * [36:32]-- +ve delta of number of active cores of bucket 4.
2309 * [39:37]-- -ve delta of freq ratio of bucket 4.
2310 * [44:40]-- +ve delta of number of active cores of bucket 5.
2311 * [47:45]-- -ve delta of freq ratio of bucket 5.
2312 * [52:48]-- +ve delta of number of active cores of bucket 6.
2313 * [55:53]-- -ve delta of freq ratio of bucket 6.
2314 * [60:56]-- +ve delta of number of active cores of bucket 7.
2315 * [63:61]-- -ve delta of freq ratio of bucket 7.
2316 */
cbf97aba
HC		 2317
2318 b_nr = 0;
2319 cores[b_nr] = (msr & 0xFF) >> 1;
2320 ratio[b_nr] = (msr >> 8) & 0xFF;
2321
2322 for (i = 16; i < 64; i += 8) {
fb5d4327 2323 delta_cores = (msr >> i) & 0x1F;
cbf97aba
HC		 2324 delta_ratio = (msr >> (i + 5)) & 0x7;
2325
2326 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2327 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2328 b_nr++;
fb5d4327 2329 }
cbf97aba
HC		 2330
2331 for (i = buckets_no - 1; i >= 0; i--)
2332 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
b7d8c148 2333 fprintf(outf,
710f273b 2334 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
cbf97aba 2335 ratio[i], bclk, ratio[i] * bclk, cores[i]);
fb5d4327
DC		 2336}
2337
fcd17211
LB		 2338static void
2339dump_nhm_cst_cfg(void)
2340{
2341 unsigned long long msr;
2342
1df2e55a 2343 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
fcd17211 2344
1df2e55a 2345 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
fcd17211 2346
3e8b62bf 2347 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
fcd17211
LB		 2348 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2349 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2350 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2351 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2352 (msr & (1 << 15)) ? "" : "UN",
6c34f160 2353 (unsigned int)msr & 0xF,
fcd17211 2354 pkg_cstate_limit_strings[pkg_cstate_limit]);
ac980e13
AB		 2355
2356#define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2357 if (has_automatic_cstate_conversion) {
2358 fprintf(outf, ", automatic c-state conversion=%s",
2359 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2360 }
2361
2362 fprintf(outf, ")\n");
2363
fcd17211 2364 return;
103a8fea
LB		 2365}
2366
6fb3143b
LB		 2367static void
2368dump_config_tdp(void)
2369{
2370 unsigned long long msr;
2371
2372 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
b7d8c148 2373 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
685b535b 2374 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
6fb3143b
LB		 2375
2376 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
b7d8c148 2377 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
6fb3143b 2378 if (msr) {
685b535b
CY		 2379 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2380 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2381 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2382 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2383 }
b7d8c148 2384 fprintf(outf, ")\n");
6fb3143b
LB		 2385
2386 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
b7d8c148 2387 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
6fb3143b 2388 if (msr) {
685b535b
CY		 2389 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2390 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2391 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2392 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2393 }
b7d8c148 2394 fprintf(outf, ")\n");
6fb3143b
LB		 2395
2396 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
b7d8c148 2397 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
6fb3143b 2398 if ((msr) & 0x3)
b7d8c148
LB		 2399 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2400 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2401 fprintf(outf, ")\n");
36229897 2402
6fb3143b 2403 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
b7d8c148 2404 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
685b535b 2405 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
b7d8c148
LB		 2406 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2407 fprintf(outf, ")\n");
6fb3143b 2408}
5a63426e
LB		 2409
2410unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2411
2412void print_irtl(void)
2413{
2414 unsigned long long msr;
2415
2416 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2417 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2418 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2419 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2420
2421 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2422 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2423 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2424 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2425
2426 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2427 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2428 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2429 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2430
2431 if (!do_irtl_hsw)
2432 return;
2433
2434 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2435 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2436 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2437 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2438
2439 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2440 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2441 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2442 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2443
2444 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2445 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2446 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2447 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2448
2449}
36229897
LB		 2450void free_fd_percpu(void)
2451{
2452 int i;
2453
01a67adf 2454 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
36229897
LB		 2455 if (fd_percpu[i] != 0)
2456 close(fd_percpu[i]);
2457 }
2458
2459 free(fd_percpu);
6fb3143b
LB		 2460}
2461
c98d5d94 2462void free_all_buffers(void)
103a8fea 2463{
0e2d8f05
LB		 2464 int i;
2465
c98d5d94
LB		 2466 CPU_FREE(cpu_present_set);
2467 cpu_present_set = NULL;
36229897 2468 cpu_present_setsize = 0;
103a8fea 2469
c98d5d94
LB		 2470 CPU_FREE(cpu_affinity_set);
2471 cpu_affinity_set = NULL;
2472 cpu_affinity_setsize = 0;
103a8fea 2473
c98d5d94
LB		 2474 free(thread_even);
2475 free(core_even);
2476 free(package_even);
103a8fea 2477
c98d5d94
LB		 2478 thread_even = NULL;
2479 core_even = NULL;
2480 package_even = NULL;
103a8fea 2481
c98d5d94
LB		 2482 free(thread_odd);
2483 free(core_odd);
2484 free(package_odd);
103a8fea 2485
c98d5d94
LB		 2486 thread_odd = NULL;
2487 core_odd = NULL;
2488 package_odd = NULL;
103a8fea 2489
c98d5d94
LB		 2490 free(output_buffer);
2491 output_buffer = NULL;
2492 outp = NULL;
36229897
LB		 2493
2494 free_fd_percpu();
562a2d37
LB		 2495
2496 free(irq_column_2_cpu);
2497 free(irqs_per_cpu);
0e2d8f05
LB		 2498
2499 for (i = 0; i <= topo.max_cpu_num; ++i) {
2500 if (cpus[i].put_ids)
2501 CPU_FREE(cpus[i].put_ids);
2502 }
2503 free(cpus);
103a8fea
LB		 2504}
2505
57a42a34 2506
c98d5d94 2507/*
95aebc44 2508 * Parse a file containing a single int.
6de68fe1
LB		 2509 * Return 0 if file can not be opened
2510 * Exit if file can be opened, but can not be parsed
c98d5d94 2511 */
95aebc44 2512int parse_int_file(const char *fmt, ...)
103a8fea 2513{
95aebc44
JT		 2514 va_list args;
2515 char path[PATH_MAX];
c98d5d94 2516 FILE *filep;
95aebc44 2517 int value;
103a8fea 2518
95aebc44
JT		 2519 va_start(args, fmt);
2520 vsnprintf(path, sizeof(path), fmt, args);
2521 va_end(args);
6de68fe1
LB		 2522 filep = fopen(path, "r");
2523 if (!filep)
2524 return 0;
b2c95d90
JT		 2525 if (fscanf(filep, "%d", &value) != 1)
2526 err(1, "%s: failed to parse number from file", path);
c98d5d94 2527 fclose(filep);
95aebc44
JT		 2528 return value;
2529}
2530
c98d5d94
LB		 2531/*
2532 * cpu_is_first_core_in_package(cpu)
2533 * return 1 if given CPU is 1st core in package
2534 */
2535int cpu_is_first_core_in_package(int cpu)
103a8fea 2536{
95aebc44 2537 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 2538}
2539
2540int get_physical_package_id(int cpu)
2541{
95aebc44 2542 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 2543}
2544
6de68fe1
LB		 2545int get_die_id(int cpu)
2546{
2547 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/die_id", cpu);
2548}
2549
103a8fea
LB		 2550int get_core_id(int cpu)
2551{
95aebc44 2552 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 2553}
2554
ef605741
PB		 2555void set_node_data(void)
2556{
2ffbb224
PB		 2557 int pkg, node, lnode, cpu, cpux;
2558 int cpu_count;
2559
2560 /* initialize logical_node_id */
2561 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2562 cpus[cpu].logical_node_id = -1;
2563
2564 cpu_count = 0;
2565 for (pkg = 0; pkg < topo.num_packages; pkg++) {
2566 lnode = 0;
2567 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2568 if (cpus[cpu].physical_package_id != pkg)
2569 continue;
2570 /* find a cpu with an unset logical_node_id */
2571 if (cpus[cpu].logical_node_id != -1)
2572 continue;
2573 cpus[cpu].logical_node_id = lnode;
2574 node = cpus[cpu].physical_node_id;
2575 cpu_count++;
2576 /*
2577 * find all matching cpus on this pkg and set
2578 * the logical_node_id
2579 */
2580 for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2581 if ((cpus[cpux].physical_package_id == pkg) &&
2582 (cpus[cpux].physical_node_id == node)) {
2583 cpus[cpux].logical_node_id = lnode;
2584 cpu_count++;
2585 }
2586 }
2587 lnode++;
2588 if (lnode > topo.nodes_per_pkg)
2589 topo.nodes_per_pkg = lnode;
2590 }
2591 if (cpu_count >= topo.max_cpu_num)
2592 break;
ef605741 2593 }
ef605741
PB		 2594}
2595
2596int get_physical_node_id(struct cpu_topology *thiscpu)
c98d5d94
LB		 2597{
2598 char path[80];
2599 FILE *filep;
0e2d8f05
LB		 2600 int i;
2601 int cpu = thiscpu->logical_cpu_id;
e275b388 2602
0e2d8f05
LB		 2603 for (i = 0; i <= topo.max_cpu_num; i++) {
2604 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2605 cpu, i);
2606 filep = fopen(path, "r");
2607 if (!filep)
2608 continue;
2609 fclose(filep);
2610 return i;
e275b388 2611 }
0e2d8f05
LB		 2612 return -1;
2613}
c98d5d94 2614
0e2d8f05
LB		 2615int get_thread_siblings(struct cpu_topology *thiscpu)
2616{
2617 char path[80], character;
2618 FILE *filep;
2619 unsigned long map;
8cb48b32 2620 int so, shift, sib_core;
0e2d8f05
LB		 2621 int cpu = thiscpu->logical_cpu_id;
2622 int offset = topo.max_cpu_num + 1;
2623 size_t size;
8cb48b32 2624 int thread_id = 0;
0e2d8f05
LB		 2625
2626 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
8cb48b32
PB		 2627 if (thiscpu->thread_id < 0)
2628 thiscpu->thread_id = thread_id++;
0e2d8f05
LB		 2629 if (!thiscpu->put_ids)
2630 return -1;
2631
2632 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2633 CPU_ZERO_S(size, thiscpu->put_ids);
2634
2635 sprintf(path,
2636 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2637 filep = fopen_or_die(path, "r");
2638 do {
2639 offset -= BITMASK_SIZE;
8173c336
BH		 2640 if (fscanf(filep, "%lx%c", &map, &character) != 2)
2641 err(1, "%s: failed to parse file", path);
0e2d8f05
LB		 2642 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2643 if ((map >> shift) & 0x1) {
8cb48b32
PB		 2644 so = shift + offset;
2645 sib_core = get_core_id(so);
2646 if (sib_core == thiscpu->physical_core_id) {
2647 CPU_SET_S(so, size, thiscpu->put_ids);
2648 if ((so != cpu) &&
2649 (cpus[so].thread_id < 0))
2650 cpus[so].thread_id =
2651 thread_id++;
2652 }
0e2d8f05
LB		 2653 }
2654 }
2655 } while (!strncmp(&character, ",", 1));
c98d5d94 2656 fclose(filep);
0e2d8f05
LB		 2657
2658 return CPU_COUNT_S(size, thiscpu->put_ids);
c98d5d94
LB		 2659}
2660
103a8fea 2661/*
c98d5d94
LB		 2662 * run func(thread, core, package) in topology order
2663 * skip non-present cpus
103a8fea
LB		 2664 */
2665
c98d5d94
LB		 2666int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2667 struct pkg_data *, struct thread_data *, struct core_data *,
2668 struct pkg_data *), struct thread_data *thread_base,
2669 struct core_data *core_base, struct pkg_data *pkg_base,
2670 struct thread_data *thread_base2, struct core_data *core_base2,
2671 struct pkg_data *pkg_base2)
2672{
40f5cfe7 2673 int retval, pkg_no, node_no, core_no, thread_no;
c98d5d94
LB		 2674
2675 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
40f5cfe7
PB		 2676 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2677 for (core_no = 0; core_no < topo.cores_per_node;
2678 ++core_no) {
2679 for (thread_no = 0; thread_no <
2680 topo.threads_per_core; ++thread_no) {
2681 struct thread_data *t, *t2;
2682 struct core_data *c, *c2;
2683 struct pkg_data *p, *p2;
2684
2685 t = GET_THREAD(thread_base, thread_no,
2686 core_no, node_no,
2687 pkg_no);
2688
2689 if (cpu_is_not_present(t->cpu_id))
2690 continue;
2691
2692 t2 = GET_THREAD(thread_base2, thread_no,
2693 core_no, node_no,
2694 pkg_no);
2695
2696 c = GET_CORE(core_base, core_no,
2697 node_no, pkg_no);
2698 c2 = GET_CORE(core_base2, core_no,
2699 node_no,
2700 pkg_no);
2701
2702 p = GET_PKG(pkg_base, pkg_no);
2703 p2 = GET_PKG(pkg_base2, pkg_no);
2704
2705 retval = func(t, c, p, t2, c2, p2);
2706 if (retval)
2707 return retval;
2708 }
c98d5d94
LB		 2709 }
2710 }
2711 }
2712 return 0;
2713}
2714
2715/*
2716 * run func(cpu) on every cpu in /proc/stat
2717 * return max_cpu number
2718 */
2719int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 2720{
2721 FILE *fp;
c98d5d94 2722 int cpu_num;
103a8fea
LB		 2723 int retval;
2724
57a42a34 2725 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 2726
2727 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 2728 if (retval != 0)
2729 err(1, "%s: failed to parse format", proc_stat);
103a8fea 2730
c98d5d94
LB		 2731 while (1) {
2732 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 2733 if (retval != 1)
2734 break;
2735
c98d5d94
LB		 2736 retval = func(cpu_num);
2737 if (retval) {
2738 fclose(fp);
2739 return(retval);
2740 }
103a8fea
LB		 2741 }
2742 fclose(fp);
c98d5d94 2743 return 0;
103a8fea
LB		 2744}
2745
2746void re_initialize(void)
2747{
c98d5d94
LB		 2748 free_all_buffers();
2749 setup_all_buffers();
2750 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 2751}
2752
843c5791
PB		 2753void set_max_cpu_num(void)
2754{
2755 FILE *filep;
2756 unsigned long dummy;
2757
2758 topo.max_cpu_num = 0;
2759 filep = fopen_or_die(
2760 "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2761 "r");
2762 while (fscanf(filep, "%lx,", &dummy) == 1)
0e2d8f05 2763 topo.max_cpu_num += BITMASK_SIZE;
843c5791
PB		 2764 fclose(filep);
2765 topo.max_cpu_num--; /* 0 based */
2766}
c98d5d94 2767
103a8fea 2768/*
c98d5d94
LB		 2769 * count_cpus()
2770 * remember the last one seen, it will be the max
103a8fea 2771 */
c98d5d94 2772int count_cpus(int cpu)
103a8fea 2773{
843c5791 2774 topo.num_cpus++;
c98d5d94
LB		 2775 return 0;
2776}
2777int mark_cpu_present(int cpu)
2778{
2779 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 2780 return 0;
103a8fea
LB		 2781}
2782
8cb48b32
PB		 2783int init_thread_id(int cpu)
2784{
2785 cpus[cpu].thread_id = -1;
2786 return 0;
2787}
2788
562a2d37
LB		 2789/*
2790 * snapshot_proc_interrupts()
2791 *
2792 * read and record summary of /proc/interrupts
2793 *
2794 * return 1 if config change requires a restart, else return 0
2795 */
2796int snapshot_proc_interrupts(void)
2797{
2798 static FILE *fp;
2799 int column, retval;
2800
2801 if (fp == NULL)
2802 fp = fopen_or_die("/proc/interrupts", "r");
2803 else
2804 rewind(fp);
2805
2806 /* read 1st line of /proc/interrupts to get cpu* name for each column */
2807 for (column = 0; column < topo.num_cpus; ++column) {
2808 int cpu_number;
2809
2810 retval = fscanf(fp, " CPU%d", &cpu_number);
2811 if (retval != 1)
2812 break;
2813
2814 if (cpu_number > topo.max_cpu_num) {
2815 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2816 return 1;
2817 }
2818
2819 irq_column_2_cpu[column] = cpu_number;
2820 irqs_per_cpu[cpu_number] = 0;
2821 }
2822
2823 /* read /proc/interrupt count lines and sum up irqs per cpu */
2824 while (1) {
2825 int column;
2826 char buf[64];
2827
2828 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
2829 if (retval != 1)
2830 break;
2831
2832 /* read the count per cpu */
2833 for (column = 0; column < topo.num_cpus; ++column) {
2834
2835 int cpu_number, irq_count;
2836
2837 retval = fscanf(fp, " %d", &irq_count);
2838 if (retval != 1)
2839 break;
2840
2841 cpu_number = irq_column_2_cpu[column];
2842 irqs_per_cpu[cpu_number] += irq_count;
2843
2844 }
2845
2846 while (getc(fp) != '\n')
2847 ; /* flush interrupt description */
2848
2849 }
2850 return 0;
2851}
fdf676e5
LB		 2852/*
2853 * snapshot_gfx_rc6_ms()
2854 *
2855 * record snapshot of
2856 * /sys/class/drm/card0/power/rc6_residency_ms
2857 *
2858 * return 1 if config change requires a restart, else return 0
2859 */
2860int snapshot_gfx_rc6_ms(void)
2861{
2862 FILE *fp;
2863 int retval;
2864
2865 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2866
2867 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2868 if (retval != 1)
2869 err(1, "GFX rc6");
2870
2871 fclose(fp);
2872
2873 return 0;
2874}
27d47356
LB		 2875/*
2876 * snapshot_gfx_mhz()
2877 *
2878 * record snapshot of
2879 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2880 *
2881 * return 1 if config change requires a restart, else return 0
2882 */
2883int snapshot_gfx_mhz(void)
2884{
2885 static FILE *fp;
2886 int retval;
2887
2888 if (fp == NULL)
2889 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
22048c54 2890 else {
27d47356 2891 rewind(fp);
22048c54
LB		 2892 fflush(fp);
2893 }
27d47356
LB		 2894
2895 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2896 if (retval != 1)
2897 err(1, "GFX MHz");
2898
2899 return 0;
2900}
562a2d37 2901
be0e54c4
LB		 2902/*
2903 * snapshot_cpu_lpi()
2904 *
2905 * record snapshot of
2906 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2907 *
2908 * return 1 if config change requires a restart, else return 0
2909 */
2910int snapshot_cpu_lpi_us(void)
2911{
2912 FILE *fp;
2913 int retval;
2914
2915 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2916
2917 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
5ea7647b
PB		 2918 if (retval != 1) {
2919 fprintf(stderr, "Disabling Low Power Idle CPU output\n");
2920 BIC_NOT_PRESENT(BIC_CPU_LPI);
605736c6 2921 fclose(fp);
5ea7647b
PB		 2922 return -1;
2923 }
be0e54c4
LB		 2924
2925 fclose(fp);
2926
2927 return 0;
2928}
2929/*
2930 * snapshot_sys_lpi()
2931 *
2932 * record snapshot of
2933 * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2934 *
2935 * return 1 if config change requires a restart, else return 0
2936 */
2937int snapshot_sys_lpi_us(void)
2938{
2939 FILE *fp;
2940 int retval;
2941
2942 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2943
2944 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
5ea7647b
PB		 2945 if (retval != 1) {
2946 fprintf(stderr, "Disabling Low Power Idle System output\n");
2947 BIC_NOT_PRESENT(BIC_SYS_LPI);
15423b95 2948 fclose(fp);
5ea7647b
PB		 2949 return -1;
2950 }
be0e54c4
LB		 2951 fclose(fp);
2952
2953 return 0;
2954}
562a2d37
LB		 2955/*
2956 * snapshot /proc and /sys files
2957 *
2958 * return 1 if configuration restart needed, else return 0
2959 */
2960int snapshot_proc_sysfs_files(void)
2961{
218f0e8d
LB		 2962 if (DO_BIC(BIC_IRQ))
2963 if (snapshot_proc_interrupts())
2964 return 1;
562a2d37 2965
812db3f7 2966 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 2967 snapshot_gfx_rc6_ms();
2968
812db3f7 2969 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 2970 snapshot_gfx_mhz();
2971
be0e54c4
LB		 2972 if (DO_BIC(BIC_CPU_LPI))
2973 snapshot_cpu_lpi_us();
2974
2975 if (DO_BIC(BIC_SYS_LPI))
2976 snapshot_sys_lpi_us();
2977
562a2d37
LB		 2978 return 0;
2979}
2980
8aa2ed0b
LB		 2981int exit_requested;
2982
2983static void signal_handler (int signal)
2984{
2985 switch (signal) {
2986 case SIGINT:
2987 exit_requested = 1;
2988 if (debug)
2989 fprintf(stderr, " SIGINT\n");
2990 break;
07211960
LB		 2991 case SIGUSR1:
2992 if (debug > 1)
2993 fprintf(stderr, "SIGUSR1\n");
2994 break;
8aa2ed0b 2995 }
b9ad8ee0
LB		 2996 /* make sure this manually-invoked interval is at least 1ms long */
2997 nanosleep(&one_msec, NULL);
8aa2ed0b
LB		 2998}
2999
3000void setup_signal_handler(void)
3001{
3002 struct sigaction sa;
3003
3004 memset(&sa, 0, sizeof(sa));
3005
3006 sa.sa_handler = &signal_handler;
3007
3008 if (sigaction(SIGINT, &sa, NULL) < 0)
3009 err(1, "sigaction SIGINT");
07211960
LB		 3010 if (sigaction(SIGUSR1, &sa, NULL) < 0)
3011 err(1, "sigaction SIGUSR1");
8aa2ed0b 3012}
b9ad8ee0 3013
47936f94 3014void do_sleep(void)
b9ad8ee0
LB		 3015{
3016 struct timeval select_timeout;
3017 fd_set readfds;
3018 int retval;
3019
3020 FD_ZERO(&readfds);
3021 FD_SET(0, &readfds);
3022
47936f94
AB		 3023 if (!isatty(fileno(stdin))) {
3024 nanosleep(&interval_ts, NULL);
3025 return;
3026 }
b9ad8ee0 3027
47936f94 3028 select_timeout = interval_tv;
b9ad8ee0
LB		 3029 retval = select(1, &readfds, NULL, NULL, &select_timeout);
3030
3031 if (retval == 1) {
b9ad8ee0
LB		 3032 switch (getc(stdin)) {
3033 case 'q':
3034 exit_requested = 1;
3035 break;
3036 }
3037 /* make sure this manually-invoked interval is at least 1ms long */
3038 nanosleep(&one_msec, NULL);
3039 }
b9ad8ee0 3040}
47936f94 3041
4c2122d4 3042
103a8fea
LB		 3043void turbostat_loop()
3044{
c98d5d94 3045 int retval;
e52966c0 3046 int restarted = 0;
023fe0ac 3047 int done_iters = 0;
c98d5d94 3048
8aa2ed0b
LB		 3049 setup_signal_handler();
3050
103a8fea 3051restart:
e52966c0
LB		 3052 restarted++;
3053
562a2d37 3054 snapshot_proc_sysfs_files();
c98d5d94 3055 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 3056 first_counter_read = 0;
d91bb17c
LB		 3057 if (retval < -1) {
3058 exit(retval);
3059 } else if (retval == -1) {
e52966c0
LB		 3060 if (restarted > 1) {
3061 exit(retval);
3062 }
c98d5d94
LB		 3063 re_initialize();
3064 goto restart;
3065 }
e52966c0 3066 restarted = 0;
023fe0ac 3067 done_iters = 0;
103a8fea
LB		 3068 gettimeofday(&tv_even, (struct timezone *)NULL);
3069
3070 while (1) {
c98d5d94 3071 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 3072 re_initialize();
3073 goto restart;
3074 }
b9ad8ee0 3075 do_sleep();
562a2d37
LB		 3076 if (snapshot_proc_sysfs_files())
3077 goto restart;
c98d5d94 3078 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 3079 if (retval < -1) {
3080 exit(retval);
3081 } else if (retval == -1) {
15aaa346
LB		 3082 re_initialize();
3083 goto restart;
3084 }
103a8fea 3085 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3086 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 3087 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3088 re_initialize();
3089 goto restart;
3090 }
c98d5d94
LB		 3091 compute_average(EVEN_COUNTERS);
3092 format_all_counters(EVEN_COUNTERS);
b7d8c148 3093 flush_output_stdout();
8aa2ed0b
LB		 3094 if (exit_requested)
3095 break;
023fe0ac
CY		 3096 if (num_iterations && ++done_iters >= num_iterations)
3097 break;
b9ad8ee0 3098 do_sleep();
562a2d37
LB		 3099 if (snapshot_proc_sysfs_files())
3100 goto restart;
c98d5d94 3101 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 3102 if (retval < -1) {
3103 exit(retval);
3104 } else if (retval == -1) {
103a8fea
LB		 3105 re_initialize();
3106 goto restart;
3107 }
103a8fea 3108 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 3109 timersub(&tv_even, &tv_odd, &tv_delta);
ba3dec99
LB		 3110 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3111 re_initialize();
3112 goto restart;
3113 }
c98d5d94
LB		 3114 compute_average(ODD_COUNTERS);
3115 format_all_counters(ODD_COUNTERS);
b7d8c148 3116 flush_output_stdout();
8aa2ed0b
LB		 3117 if (exit_requested)
3118 break;
023fe0ac
CY		 3119 if (num_iterations && ++done_iters >= num_iterations)
3120 break;
103a8fea
LB		 3121 }
3122}
3123
3124void check_dev_msr()
3125{
3126 struct stat sb;
7ce7d5de 3127 char pathname[32];
103a8fea 3128
7ce7d5de
PB		 3129 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3130 if (stat(pathname, &sb))
a21d38c8
LB		 3131 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3132 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 3133}
3134
98481e79 3135void check_permissions()
103a8fea 3136{
98481e79
LB		 3137 struct __user_cap_header_struct cap_header_data;
3138 cap_user_header_t cap_header = &cap_header_data;
3139 struct __user_cap_data_struct cap_data_data;
3140 cap_user_data_t cap_data = &cap_data_data;
3141 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
3142 int do_exit = 0;
7ce7d5de 3143 char pathname[32];
98481e79
LB		 3144
3145 /* check for CAP_SYS_RAWIO */
3146 cap_header->pid = getpid();
3147 cap_header->version = _LINUX_CAPABILITY_VERSION;
3148 if (capget(cap_header, cap_data) < 0)
3149 err(-6, "capget(2) failed");
3150
3151 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
3152 do_exit++;
3153 warnx("capget(CAP_SYS_RAWIO) failed,"
3154 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3155 }
3156
3157 /* test file permissions */
7ce7d5de
PB		 3158 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3159 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 3160 do_exit++;
3161 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3162 }
3163
3164 /* if all else fails, thell them to be root */
3165 if (do_exit)
3166 if (getuid() != 0)
d7899447 3167 warnx("... or simply run as root");
98481e79
LB		 3168
3169 if (do_exit)
3170 exit(-6);
103a8fea
LB		 3171}
3172
d7899447
LB		 3173/*
3174 * NHM adds support for additional MSRs:
3175 *
3176 * MSR_SMI_COUNT 0x00000034
3177 *
ec0adc53 3178 * MSR_PLATFORM_INFO 0x000000ce
1df2e55a 3179 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
d7899447 3180 *
cf4cbe53
LB		 3181 * MSR_MISC_PWR_MGMT 0x000001aa
3182 *
d7899447
LB		 3183 * MSR_PKG_C3_RESIDENCY 0x000003f8
3184 * MSR_PKG_C6_RESIDENCY 0x000003f9
3185 * MSR_CORE_C3_RESIDENCY 0x000003fc
3186 * MSR_CORE_C6_RESIDENCY 0x000003fd
3187 *
ee7e38e3 3188 * Side effect:
1df2e55a 3189 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
33148d67 3190 * sets has_misc_feature_control
d7899447 3191 */
ee7e38e3 3192int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 3193{
ee7e38e3 3194 unsigned long long msr;
21ed5574 3195 unsigned int base_ratio;
ee7e38e3
LB		 3196 int *pkg_cstate_limits;
3197
103a8fea
LB		 3198 if (!genuine_intel)
3199 return 0;
3200
3201 if (family != 6)
3202 return 0;
3203
21ed5574
LB		 3204 bclk = discover_bclk(family, model);
3205
103a8fea 3206 switch (model) {
869ce69e 3207 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
869ce69e 3208 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
ee7e38e3
LB		 3209 pkg_cstate_limits = nhm_pkg_cstate_limits;
3210 break;
869ce69e
LB		 3211 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3212 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3213 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3214 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
ee7e38e3 3215 pkg_cstate_limits = snb_pkg_cstate_limits;
33148d67 3216 has_misc_feature_control = 1;
ee7e38e3 3217 break;
869ce69e
LB		 3218 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3219 case INTEL_FAM6_HASWELL_X: /* HSX */
cd188af5 3220 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e
LB		 3221 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3222 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3223 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3224 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3225 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3226 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
ee7e38e3 3227 pkg_cstate_limits = hsw_pkg_cstate_limits;
33148d67 3228 has_misc_feature_control = 1;
ee7e38e3 3229 break;
d8ebb442
LB		 3230 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3231 pkg_cstate_limits = skx_pkg_cstate_limits;
33148d67 3232 has_misc_feature_control = 1;
d8ebb442 3233 break;
f2c4db1b 3234 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
cf4cbe53 3235 no_MSR_MISC_PWR_MGMT = 1;
f2c4db1b 3236 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
ee7e38e3
LB		 3237 pkg_cstate_limits = slv_pkg_cstate_limits;
3238 break;
869ce69e 3239 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
ee7e38e3 3240 pkg_cstate_limits = amt_pkg_cstate_limits;
cf4cbe53 3241 no_MSR_MISC_PWR_MGMT = 1;
ee7e38e3 3242 break;
869ce69e 3243 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
ee7e38e3
LB		 3244 pkg_cstate_limits = phi_pkg_cstate_limits;
3245 break;
869ce69e 3246 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 3247 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3248 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
445640a5 3249 pkg_cstate_limits = glm_pkg_cstate_limits;
e4085d54 3250 break;
103a8fea
LB		 3251 default:
3252 return 0;
3253 }
1df2e55a 3254 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
e9257f5f 3255 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 3256
ec0adc53 3257 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 3258 base_ratio = (msr >> 8) & 0xFF;
3259
3260 base_hz = base_ratio * bclk * 1000000;
3261 has_base_hz = 1;
ee7e38e3 3262 return 1;
103a8fea 3263}
0f7887c4 3264/*
495c7654 3265 * SLV client has support for unique MSRs:
0f7887c4
LB		 3266 *
3267 * MSR_CC6_DEMOTION_POLICY_CONFIG
3268 * MSR_MC6_DEMOTION_POLICY_CONFIG
3269 */
3270
3271int has_slv_msrs(unsigned int family, unsigned int model)
3272{
3273 if (!genuine_intel)
3274 return 0;
3275
3276 switch (model) {
f2c4db1b
PZ		 3277 case INTEL_FAM6_ATOM_SILVERMONT:
3278 case INTEL_FAM6_ATOM_SILVERMONT_MID:
3279 case INTEL_FAM6_ATOM_AIRMONT_MID:
0f7887c4
LB		 3280 return 1;
3281 }
3282 return 0;
3283}
7170a374
LB		 3284int is_dnv(unsigned int family, unsigned int model)
3285{
3286
3287 if (!genuine_intel)
3288 return 0;
3289
3290 switch (model) {
f2c4db1b 3291 case INTEL_FAM6_ATOM_GOLDMONT_X:
7170a374
LB		 3292 return 1;
3293 }
3294 return 0;
3295}
ade0ebac
LB		 3296int is_bdx(unsigned int family, unsigned int model)
3297{
3298
3299 if (!genuine_intel)
3300 return 0;
3301
3302 switch (model) {
3303 case INTEL_FAM6_BROADWELL_X:
ade0ebac
LB		 3304 return 1;
3305 }
3306 return 0;
3307}
34c76197
LB		 3308int is_skx(unsigned int family, unsigned int model)
3309{
3310
3311 if (!genuine_intel)
3312 return 0;
3313
3314 switch (model) {
3315 case INTEL_FAM6_SKYLAKE_X:
3316 return 1;
3317 }
3318 return 0;
3319}
0f7887c4 3320
31e07522 3321int has_turbo_ratio_limit(unsigned int family, unsigned int model)
d7899447 3322{
0f7887c4
LB		 3323 if (has_slv_msrs(family, model))
3324 return 0;
3325
d7899447
LB		 3326 switch (model) {
3327 /* Nehalem compatible, but do not include turbo-ratio limit support */
869ce69e 3328 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
869ce69e 3329 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
d7899447
LB		 3330 return 0;
3331 default:
3332 return 1;
3333 }
3334}
0f7887c4
LB		 3335int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3336{
3337 if (has_slv_msrs(family, model))
3338 return 1;
3339
3340 return 0;
3341}
6574a5d5
LB		 3342int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3343{
3344 if (!genuine_intel)
3345 return 0;
3346
3347 if (family != 6)
3348 return 0;
3349
3350 switch (model) {
869ce69e
LB		 3351 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3352 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
fcd17211
LB		 3353 return 1;
3354 default:
3355 return 0;
3356 }
3357}
3358int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3359{
3360 if (!genuine_intel)
3361 return 0;
3362
3363 if (family != 6)
3364 return 0;
3365
3366 switch (model) {
869ce69e 3367 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
6574a5d5
LB		 3368 return 1;
3369 default:
3370 return 0;
3371 }
3372}
3373
fb5d4327
DC		 3374int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3375{
3376 if (!genuine_intel)
3377 return 0;
3378
3379 if (family != 6)
3380 return 0;
3381
3382 switch (model) {
869ce69e 3383 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
fb5d4327
DC		 3384 return 1;
3385 default:
3386 return 0;
3387 }
3388}
31e07522
LB		 3389int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3390{
3391 if (!genuine_intel)
3392 return 0;
3393
3394 if (family != 6)
3395 return 0;
3396
3397 switch (model) {
3398 case INTEL_FAM6_ATOM_GOLDMONT:
3399 case INTEL_FAM6_SKYLAKE_X:
3400 return 1;
3401 default:
3402 return 0;
3403 }
3404}
6fb3143b
LB		 3405int has_config_tdp(unsigned int family, unsigned int model)
3406{
3407 if (!genuine_intel)
3408 return 0;
3409
3410 if (family != 6)
3411 return 0;
3412
3413 switch (model) {
869ce69e
LB		 3414 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3415 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3416 case INTEL_FAM6_HASWELL_X: /* HSX */
cd188af5 3417 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e
LB		 3418 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3419 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3420 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3421 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3422 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3423 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e
LB		 3424 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3425
3426 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
6fb3143b
LB		 3427 return 1;
3428 default:
3429 return 0;
3430 }
3431}
3432
fcd17211 3433static void
1b69317d 3434dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
fcd17211
LB		 3435{
3436 if (!do_nhm_platform_info)
3437 return;
3438
3439 dump_nhm_platform_info();
3440
3441 if (has_hsw_turbo_ratio_limit(family, model))
3442 dump_hsw_turbo_ratio_limits();
3443
3444 if (has_ivt_turbo_ratio_limit(family, model))
3445 dump_ivt_turbo_ratio_limits();
3446
31e07522
LB		 3447 if (has_turbo_ratio_limit(family, model))
3448 dump_turbo_ratio_limits(family, model);
fcd17211 3449
0f7887c4
LB		 3450 if (has_atom_turbo_ratio_limit(family, model))
3451 dump_atom_turbo_ratio_limits();
3452
fb5d4327
DC		 3453 if (has_knl_turbo_ratio_limit(family, model))
3454 dump_knl_turbo_ratio_limits();
3455
6fb3143b
LB		 3456 if (has_config_tdp(family, model))
3457 dump_config_tdp();
3458
fcd17211
LB		 3459 dump_nhm_cst_cfg();
3460}
3461
41618e63
LB		 3462static void
3463dump_sysfs_cstate_config(void)
3464{
3465 char path[64];
3466 char name_buf[16];
3467 char desc[64];
3468 FILE *input;
3469 int state;
3470 char *sp;
3471
3472 if (!DO_BIC(BIC_sysfs))
3473 return;
3474
3475 for (state = 0; state < 10; ++state) {
3476
3477 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3478 base_cpu, state);
3479 input = fopen(path, "r");
3480 if (input == NULL)
3481 continue;
8173c336
BH		 3482 if (!fgets(name_buf, sizeof(name_buf), input))
3483 err(1, "%s: failed to read file", path);
41618e63
LB		 3484
3485 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3486 sp = strchr(name_buf, '-');
3487 if (!sp)
3488 sp = strchrnul(name_buf, '\n');
3489 *sp = '\0';
41618e63
LB		 3490 fclose(input);
3491
3492 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3493 base_cpu, state);
3494 input = fopen(path, "r");
3495 if (input == NULL)
3496 continue;
8173c336
BH		 3497 if (!fgets(desc, sizeof(desc), input))
3498 err(1, "%s: failed to read file", path);
41618e63
LB		 3499
3500 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3501 fclose(input);
3502 }
3503}
7293fccd
LB		 3504static void
3505dump_sysfs_pstate_config(void)
3506{
3507 char path[64];
3508 char driver_buf[64];
3509 char governor_buf[64];
3510 FILE *input;
3511 int turbo;
3512
3513 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3514 base_cpu);
3515 input = fopen(path, "r");
3516 if (input == NULL) {
0a42d235 3517 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3518 return;
3519 }
8173c336
BH		 3520 if (!fgets(driver_buf, sizeof(driver_buf), input))
3521 err(1, "%s: failed to read file", path);
7293fccd
LB		 3522 fclose(input);
3523
3524 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3525 base_cpu);
3526 input = fopen(path, "r");
3527 if (input == NULL) {
0a42d235 3528 fprintf(outf, "NSFOD %s\n", path);
7293fccd
LB		 3529 return;
3530 }
8173c336
BH		 3531 if (!fgets(governor_buf, sizeof(governor_buf), input))
3532 err(1, "%s: failed to read file", path);
7293fccd
LB		 3533 fclose(input);
3534
3535 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3536 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3537
3538 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3539 input = fopen(path, "r");
3540 if (input != NULL) {
8173c336
BH		 3541 if (fscanf(input, "%d", &turbo) != 1)
3542 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3543 fprintf(outf, "cpufreq boost: %d\n", turbo);
3544 fclose(input);
3545 }
3546
3547 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3548 input = fopen(path, "r");
3549 if (input != NULL) {
8173c336
BH		 3550 if (fscanf(input, "%d", &turbo) != 1)
3551 err(1, "%s: failed to parse number from file", path);
7293fccd
LB		 3552 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3553 fclose(input);
3554 }
3555}
41618e63 3556
fcd17211 3557
889facbe
LB		 3558/*
3559 * print_epb()
3560 * Decode the ENERGY_PERF_BIAS MSR
3561 */
3562int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3563{
3564 unsigned long long msr;
3565 char *epb_string;
3566 int cpu;
3567
3568 if (!has_epb)
3569 return 0;
3570
3571 cpu = t->cpu_id;
3572
3573 /* EPB is per-package */
3574 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3575 return 0;
3576
3577 if (cpu_migrate(cpu)) {
b7d8c148 3578 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 3579 return -1;
3580 }
3581
3582 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3583 return 0;
3584
e9be7dd6 3585 switch (msr & 0xF) {
889facbe
LB		 3586 case ENERGY_PERF_BIAS_PERFORMANCE:
3587 epb_string = "performance";
3588 break;
3589 case ENERGY_PERF_BIAS_NORMAL:
3590 epb_string = "balanced";
3591 break;
3592 case ENERGY_PERF_BIAS_POWERSAVE:
3593 epb_string = "powersave";
3594 break;
3595 default:
3596 epb_string = "custom";
3597 break;
3598 }
b7d8c148 3599 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
889facbe
LB		 3600
3601 return 0;
3602}
7f5c258e
LB		 3603/*
3604 * print_hwp()
3605 * Decode the MSR_HWP_CAPABILITIES
3606 */
3607int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3608{
3609 unsigned long long msr;
3610 int cpu;
3611
3612 if (!has_hwp)
3613 return 0;
3614
3615 cpu = t->cpu_id;
3616
3617 /* MSR_HWP_CAPABILITIES is per-package */
3618 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3619 return 0;
3620
3621 if (cpu_migrate(cpu)) {
b7d8c148 3622 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
7f5c258e
LB		 3623 return -1;
3624 }
3625
3626 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3627 return 0;
3628
b7d8c148 3629 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
7f5c258e
LB		 3630 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3631
3632 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3633 if ((msr & (1 << 0)) == 0)
3634 return 0;
3635
3636 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3637 return 0;
3638
b7d8c148 3639 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
6dbd25a2 3640 "(high %d guar %d eff %d low %d)\n",
7f5c258e
LB		 3641 cpu, msr,
3642 (unsigned int)HWP_HIGHEST_PERF(msr),
3643 (unsigned int)HWP_GUARANTEED_PERF(msr),
3644 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3645 (unsigned int)HWP_LOWEST_PERF(msr));
3646
3647 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3648 return 0;
3649
b7d8c148 3650 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
6dbd25a2 3651 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
7f5c258e
LB		 3652 cpu, msr,
3653 (unsigned int)(((msr) >> 0) & 0xff),
3654 (unsigned int)(((msr) >> 8) & 0xff),
3655 (unsigned int)(((msr) >> 16) & 0xff),
3656 (unsigned int)(((msr) >> 24) & 0xff),
3657 (unsigned int)(((msr) >> 32) & 0xff3),
3658 (unsigned int)(((msr) >> 42) & 0x1));
3659
3660 if (has_hwp_pkg) {
3661 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3662 return 0;
3663
b7d8c148 3664 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
6dbd25a2 3665 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
7f5c258e
LB		 3666 cpu, msr,
3667 (unsigned int)(((msr) >> 0) & 0xff),
3668 (unsigned int)(((msr) >> 8) & 0xff),
3669 (unsigned int)(((msr) >> 16) & 0xff),
3670 (unsigned int)(((msr) >> 24) & 0xff),
3671 (unsigned int)(((msr) >> 32) & 0xff3));
3672 }
3673 if (has_hwp_notify) {
3674 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3675 return 0;
3676
b7d8c148 3677 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
7f5c258e
LB		 3678 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3679 cpu, msr,
3680 ((msr) & 0x1) ? "EN" : "Dis",
3681 ((msr) & 0x2) ? "EN" : "Dis");
3682 }
3683 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3684 return 0;
3685
b7d8c148 3686 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
7f5c258e
LB		 3687 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3688 cpu, msr,
3689 ((msr) & 0x1) ? "" : "No-",
3690 ((msr) & 0x2) ? "" : "No-");
889facbe
LB		 3691
3692 return 0;
3693}
3694
3a9a941d
LB		 3695/*
3696 * print_perf_limit()
3697 */
3698int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3699{
3700 unsigned long long msr;
3701 int cpu;
3702
3703 cpu = t->cpu_id;
3704
3705 /* per-package */
3706 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3707 return 0;
3708
3709 if (cpu_migrate(cpu)) {
b7d8c148 3710 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3a9a941d
LB		 3711 return -1;
3712 }
3713
3714 if (do_core_perf_limit_reasons) {
3715 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3716 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3717 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 3718 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 3719 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 3720 (msr & 1 << 13) ? "Transitions, " : "",
3721 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3722 (msr & 1 << 11) ? "PkgPwrL2, " : "",
3723 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3724 (msr & 1 << 9) ? "CorePwr, " : "",
3725 (msr & 1 << 8) ? "Amps, " : "",
3726 (msr & 1 << 6) ? "VR-Therm, " : "",
3727 (msr & 1 << 5) ? "Auto-HWP, " : "",
3728 (msr & 1 << 4) ? "Graphics, " : "",
3729 (msr & 1 << 2) ? "bit2, " : "",
3730 (msr & 1 << 1) ? "ThermStatus, " : "",
3731 (msr & 1 << 0) ? "PROCHOT, " : "");
b7d8c148 3732 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 3733 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 3734 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 3735 (msr & 1 << 29) ? "Transitions, " : "",
3736 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3737 (msr & 1 << 27) ? "PkgPwrL2, " : "",
3738 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3739 (msr & 1 << 25) ? "CorePwr, " : "",
3740 (msr & 1 << 24) ? "Amps, " : "",
3741 (msr & 1 << 22) ? "VR-Therm, " : "",
3742 (msr & 1 << 21) ? "Auto-HWP, " : "",
3743 (msr & 1 << 20) ? "Graphics, " : "",
3744 (msr & 1 << 18) ? "bit18, " : "",
3745 (msr & 1 << 17) ? "ThermStatus, " : "",
3746 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 3747
3748 }
3749 if (do_gfx_perf_limit_reasons) {
3750 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3751 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3752 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3a9a941d
LB		 3753 (msr & 1 << 0) ? "PROCHOT, " : "",
3754 (msr & 1 << 1) ? "ThermStatus, " : "",
3755 (msr & 1 << 4) ? "Graphics, " : "",
3756 (msr & 1 << 6) ? "VR-Therm, " : "",
3757 (msr & 1 << 8) ? "Amps, " : "",
3758 (msr & 1 << 9) ? "GFXPwr, " : "",
3759 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3760 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3761 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3a9a941d
LB		 3762 (msr & 1 << 16) ? "PROCHOT, " : "",
3763 (msr & 1 << 17) ? "ThermStatus, " : "",
3764 (msr & 1 << 20) ? "Graphics, " : "",
3765 (msr & 1 << 22) ? "VR-Therm, " : "",
3766 (msr & 1 << 24) ? "Amps, " : "",
3767 (msr & 1 << 25) ? "GFXPwr, " : "",
3768 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3769 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3770 }
3771 if (do_ring_perf_limit_reasons) {
3772 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3773 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3774 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3a9a941d
LB		 3775 (msr & 1 << 0) ? "PROCHOT, " : "",
3776 (msr & 1 << 1) ? "ThermStatus, " : "",
3777 (msr & 1 << 6) ? "VR-Therm, " : "",
3778 (msr & 1 << 8) ? "Amps, " : "",
3779 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3780 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3781 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3a9a941d
LB		 3782 (msr & 1 << 16) ? "PROCHOT, " : "",
3783 (msr & 1 << 17) ? "ThermStatus, " : "",
3784 (msr & 1 << 22) ? "VR-Therm, " : "",
3785 (msr & 1 << 24) ? "Amps, " : "",
3786 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3787 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3788 }
3789 return 0;
3790}
3791
889facbe
LB		 3792#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
3793#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
3794
9392bd98 3795double get_tdp_intel(unsigned int model)
144b44b1
LB		 3796{
3797 unsigned long long msr;
3798
3799 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 3800 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 3801 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3802
3803 switch (model) {
f2c4db1b
PZ		 3804 case INTEL_FAM6_ATOM_SILVERMONT:
3805 case INTEL_FAM6_ATOM_SILVERMONT_X:
144b44b1
LB		 3806 return 30.0;
3807 default:
3808 return 135.0;
3809 }
3810}
3811
9392bd98
CW		 3812double get_tdp_amd(unsigned int family)
3813{
3814 switch (family) {
3815 case 0x17:
3816 default:
3817 /* This is the max stock TDP of HEDT/Server Fam17h chips */
3818 return 250.0;
3819 }
3820}
3821
40ee8e3b
AS		 3822/*
3823 * rapl_dram_energy_units_probe()
3824 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3825 */
3826static double
3827rapl_dram_energy_units_probe(int model, double rapl_energy_units)
3828{
3829 /* only called for genuine_intel, family 6 */
3830
3831 switch (model) {
869ce69e
LB		 3832 case INTEL_FAM6_HASWELL_X: /* HSX */
3833 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3834 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
40ee8e3b
AS		 3835 return (rapl_dram_energy_units = 15.3 / 1000000);
3836 default:
3837 return (rapl_energy_units);
3838 }
3839}
3840
9392bd98 3841void rapl_probe_intel(unsigned int family, unsigned int model)
889facbe
LB		 3842{
3843 unsigned long long msr;
144b44b1 3844 unsigned int time_unit;
889facbe
LB		 3845 double tdp;
3846
889facbe
LB		 3847 if (family != 6)
3848 return;
3849
3850 switch (model) {
869ce69e
LB		 3851 case INTEL_FAM6_SANDYBRIDGE:
3852 case INTEL_FAM6_IVYBRIDGE:
3853 case INTEL_FAM6_HASWELL_CORE: /* HSW */
cd188af5 3854 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e
LB		 3855 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3856 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3857 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
144b44b1 3858 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3859 if (rapl_joules) {
3860 BIC_PRESENT(BIC_Pkg_J);
3861 BIC_PRESENT(BIC_Cor_J);
3862 BIC_PRESENT(BIC_GFX_J);
3863 } else {
3864 BIC_PRESENT(BIC_PkgWatt);
3865 BIC_PRESENT(BIC_CorWatt);
3866 BIC_PRESENT(BIC_GFXWatt);
3867 }
889facbe 3868 break;
869ce69e 3869 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 3870 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e4085d54 3871 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3872 if (rapl_joules)
3873 BIC_PRESENT(BIC_Pkg_J);
3874 else
3875 BIC_PRESENT(BIC_PkgWatt);
e4085d54 3876 break;
869ce69e 3877 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3878 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
81824921 3879 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3880 BIC_PRESENT(BIC_PKG__);
3881 BIC_PRESENT(BIC_RAM__);
3882 if (rapl_joules) {
3883 BIC_PRESENT(BIC_Pkg_J);
3884 BIC_PRESENT(BIC_Cor_J);
3885 BIC_PRESENT(BIC_RAM_J);
81824921 3886 BIC_PRESENT(BIC_GFX_J);
812db3f7
LB		 3887 } else {
3888 BIC_PRESENT(BIC_PkgWatt);
3889 BIC_PRESENT(BIC_CorWatt);
3890 BIC_PRESENT(BIC_RAMWatt);
81824921 3891 BIC_PRESENT(BIC_GFXWatt);
812db3f7 3892 }
0b2bb692 3893 break;
869ce69e
LB		 3894 case INTEL_FAM6_HASWELL_X: /* HSX */
3895 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e
LB		 3896 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3897 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
0b2bb692 3898 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3899 BIC_PRESENT(BIC_PKG__);
3900 BIC_PRESENT(BIC_RAM__);
3901 if (rapl_joules) {
3902 BIC_PRESENT(BIC_Pkg_J);
3903 BIC_PRESENT(BIC_RAM_J);
3904 } else {
3905 BIC_PRESENT(BIC_PkgWatt);
3906 BIC_PRESENT(BIC_RAMWatt);
3907 }
e6f9bb3c 3908 break;
869ce69e
LB		 3909 case INTEL_FAM6_SANDYBRIDGE_X:
3910 case INTEL_FAM6_IVYBRIDGE_X:
0b2bb692 3911 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3912 BIC_PRESENT(BIC_PKG__);
3913 BIC_PRESENT(BIC_RAM__);
3914 if (rapl_joules) {
3915 BIC_PRESENT(BIC_Pkg_J);
3916 BIC_PRESENT(BIC_Cor_J);
3917 BIC_PRESENT(BIC_RAM_J);
3918 } else {
3919 BIC_PRESENT(BIC_PkgWatt);
3920 BIC_PRESENT(BIC_CorWatt);
3921 BIC_PRESENT(BIC_RAMWatt);
3922 }
144b44b1 3923 break;
f2c4db1b
PZ		 3924 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
3925 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
9148494c 3926 do_rapl = RAPL_PKG | RAPL_CORES;
812db3f7
LB		 3927 if (rapl_joules) {
3928 BIC_PRESENT(BIC_Pkg_J);
3929 BIC_PRESENT(BIC_Cor_J);
3930 } else {
3931 BIC_PRESENT(BIC_PkgWatt);
3932 BIC_PRESENT(BIC_CorWatt);
3933 }
889facbe 3934 break;
f2c4db1b 3935 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
0f644909 3936 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
812db3f7
LB		 3937 BIC_PRESENT(BIC_PKG__);
3938 BIC_PRESENT(BIC_RAM__);
3939 if (rapl_joules) {
3940 BIC_PRESENT(BIC_Pkg_J);
3941 BIC_PRESENT(BIC_Cor_J);
3942 BIC_PRESENT(BIC_RAM_J);
3943 } else {
3944 BIC_PRESENT(BIC_PkgWatt);
3945 BIC_PRESENT(BIC_CorWatt);
3946 BIC_PRESENT(BIC_RAMWatt);
3947 }
0f644909 3948 break;
889facbe
LB		 3949 default:
3950 return;
3951 }
3952
3953 /* units on package 0, verify later other packages match */
7ce7d5de 3954 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 3955 return;
3956
3957 rapl_power_units = 1.0 / (1 << (msr & 0xF));
f2c4db1b 3958 if (model == INTEL_FAM6_ATOM_SILVERMONT)
144b44b1
LB		 3959 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3960 else
3961 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 3962
40ee8e3b
AS		 3963 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3964
144b44b1
LB		 3965 time_unit = msr >> 16 & 0xF;
3966 if (time_unit == 0)
3967 time_unit = 0xA;
889facbe 3968
144b44b1 3969 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 3970
9392bd98 3971 tdp = get_tdp_intel(model);
889facbe 3972
144b44b1 3973 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
96e47158 3974 if (!quiet)
b7d8c148 3975 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
9392bd98 3976}
889facbe 3977
9392bd98
CW		 3978void rapl_probe_amd(unsigned int family, unsigned int model)
3979{
3980 unsigned long long msr;
3981 unsigned int eax, ebx, ecx, edx;
3982 unsigned int has_rapl = 0;
3983 double tdp;
3984
3985 if (max_extended_level >= 0x80000007) {
3986 __cpuid(0x80000007, eax, ebx, ecx, edx);
3987 /* RAPL (Fam 17h) */
3988 has_rapl = edx & (1 << 14);
3989 }
3990
3991 if (!has_rapl)
3992 return;
3993
3994 switch (family) {
3995 case 0x17: /* Zen, Zen+ */
3996 do_rapl = RAPL_AMD_F17H | RAPL_PER_CORE_ENERGY;
3316f99a
CW		 3997 if (rapl_joules) {
3998 BIC_PRESENT(BIC_Pkg_J);
9392bd98 3999 BIC_PRESENT(BIC_Cor_J);
3316f99a
CW		 4000 } else {
4001 BIC_PRESENT(BIC_PkgWatt);
9392bd98 4002 BIC_PRESENT(BIC_CorWatt);
3316f99a 4003 }
9392bd98
CW		 4004 break;
4005 default:
4006 return;
4007 }
4008
4009 if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
4010 return;
4011
4012 rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
4013 rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
4014 rapl_power_units = ldexp(1.0, -(msr & 0xf));
4015
4016 tdp = get_tdp_amd(model);
4017
4018 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
4019 if (!quiet)
4020 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
4021}
4022
4023/*
4024 * rapl_probe()
4025 *
4026 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
4027 */
4028void rapl_probe(unsigned int family, unsigned int model)
4029{
4030 if (genuine_intel)
4031 rapl_probe_intel(family, model);
4032 if (authentic_amd)
4033 rapl_probe_amd(family, model);
889facbe
LB		 4034}
4035
1b69317d 4036void perf_limit_reasons_probe(unsigned int family, unsigned int model)
3a9a941d
LB		 4037{
4038 if (!genuine_intel)
4039 return;
4040
4041 if (family != 6)
4042 return;
4043
4044 switch (model) {
869ce69e 4045 case INTEL_FAM6_HASWELL_CORE: /* HSW */
cd188af5 4046 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e 4047 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3a9a941d 4048 do_gfx_perf_limit_reasons = 1;
869ce69e 4049 case INTEL_FAM6_HASWELL_X: /* HSX */
3a9a941d
LB		 4050 do_core_perf_limit_reasons = 1;
4051 do_ring_perf_limit_reasons = 1;
4052 default:
4053 return;
4054 }
4055}
4056
ac980e13
AB		 4057void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
4058{
4059 if (is_skx(family, model) || is_bdx(family, model))
4060 has_automatic_cstate_conversion = 1;
4061}
4062
889facbe
LB		 4063int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4064{
4065 unsigned long long msr;
f4896fa5 4066 unsigned int dts, dts2;
889facbe
LB		 4067 int cpu;
4068
4069 if (!(do_dts || do_ptm))
4070 return 0;
4071
4072 cpu = t->cpu_id;
4073
4074 /* DTS is per-core, no need to print for each thread */
388e9c81 4075 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
889facbe
LB		 4076 return 0;
4077
4078 if (cpu_migrate(cpu)) {
b7d8c148 4079 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4080 return -1;
4081 }
4082
4083 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
4084 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
4085 return 0;
4086
4087 dts = (msr >> 16) & 0x7F;
b7d8c148 4088 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
889facbe
LB		 4089 cpu, msr, tcc_activation_temp - dts);
4090
889facbe
LB		 4091 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
4092 return 0;
4093
4094 dts = (msr >> 16) & 0x7F;
4095 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4096 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4097 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4098 }
4099
4100
f4896fa5 4101 if (do_dts && debug) {
889facbe
LB		 4102 unsigned int resolution;
4103
4104 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
4105 return 0;
4106
4107 dts = (msr >> 16) & 0x7F;
4108 resolution = (msr >> 27) & 0xF;
b7d8c148 4109 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
889facbe
LB		 4110 cpu, msr, tcc_activation_temp - dts, resolution);
4111
889facbe
LB		 4112 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
4113 return 0;
4114
4115 dts = (msr >> 16) & 0x7F;
4116 dts2 = (msr >> 8) & 0x7F;
b7d8c148 4117 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 4118 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 4119 }
4120
4121 return 0;
4122}
36229897 4123
889facbe
LB		 4124void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
4125{
b7d8c148 4126 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
889facbe
LB		 4127 cpu, label,
4128 ((msr >> 15) & 1) ? "EN" : "DIS",
4129 ((msr >> 0) & 0x7FFF) * rapl_power_units,
4130 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
4131 (((msr >> 16) & 1) ? "EN" : "DIS"));
4132
4133 return;
4134}
4135
4136int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4137{
4138 unsigned long long msr;
9392bd98 4139 const char *msr_name;
889facbe 4140 int cpu;
889facbe
LB		 4141
4142 if (!do_rapl)
4143 return 0;
4144
4145 /* RAPL counters are per package, so print only for 1st thread/package */
4146 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4147 return 0;
4148
4149 cpu = t->cpu_id;
4150 if (cpu_migrate(cpu)) {
b7d8c148 4151 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4152 return -1;
4153 }
4154
9392bd98
CW		 4155 if (do_rapl & RAPL_AMD_F17H) {
4156 msr_name = "MSR_RAPL_PWR_UNIT";
4157 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
4158 return -1;
4159 } else {
4160 msr_name = "MSR_RAPL_POWER_UNIT";
4161 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4162 return -1;
4163 }
889facbe 4164
9392bd98 4165 fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
96e47158
LB		 4166 rapl_power_units, rapl_energy_units, rapl_time_units);
4167
144b44b1
LB		 4168 if (do_rapl & RAPL_PKG_POWER_INFO) {
4169
889facbe
LB		 4170 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4171 return -5;
4172
4173
b7d8c148 4174 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4175 cpu, msr,
4176 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4177 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4178 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4179 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4180
144b44b1
LB		 4181 }
4182 if (do_rapl & RAPL_PKG) {
4183
889facbe
LB		 4184 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4185 return -9;
4186
b7d8c148 4187 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4188 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
889facbe
LB		 4189
4190 print_power_limit_msr(cpu, msr, "PKG Limit #1");
b7d8c148 4191 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
889facbe
LB		 4192 cpu,
4193 ((msr >> 47) & 1) ? "EN" : "DIS",
4194 ((msr >> 32) & 0x7FFF) * rapl_power_units,
4195 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4196 ((msr >> 48) & 1) ? "EN" : "DIS");
4197 }
4198
0b2bb692 4199 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 4200 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4201 return -6;
4202
b7d8c148 4203 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4204 cpu, msr,
4205 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4206 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4207 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4208 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 4209 }
4210 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 4211 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4212 return -9;
b7d8c148 4213 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4214 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
889facbe
LB		 4215
4216 print_power_limit_msr(cpu, msr, "DRAM Limit");
4217 }
144b44b1 4218 if (do_rapl & RAPL_CORE_POLICY) {
96e47158
LB		 4219 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4220 return -7;
889facbe 4221
96e47158 4222 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1 4223 }
9148494c 4224 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
96e47158
LB		 4225 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4226 return -9;
4227 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4228 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4229 print_power_limit_msr(cpu, msr, "Cores Limit");
889facbe
LB		 4230 }
4231 if (do_rapl & RAPL_GFX) {
96e47158
LB		 4232 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4233 return -8;
889facbe 4234
96e47158 4235 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
889facbe 4236
96e47158
LB		 4237 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4238 return -9;
4239 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4240 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4241 print_power_limit_msr(cpu, msr, "GFX Limit");
889facbe
LB		 4242 }
4243 return 0;
4244}
4245
d7899447
LB		 4246/*
4247 * SNB adds support for additional MSRs:
4248 *
4249 * MSR_PKG_C7_RESIDENCY 0x000003fa
4250 * MSR_CORE_C7_RESIDENCY 0x000003fe
4251 * MSR_PKG_C2_RESIDENCY 0x0000060d
4252 */
103a8fea 4253
d7899447 4254int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 4255{
4256 if (!genuine_intel)
4257 return 0;
4258
4259 switch (model) {
869ce69e
LB		 4260 case INTEL_FAM6_SANDYBRIDGE:
4261 case INTEL_FAM6_SANDYBRIDGE_X:
4262 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4263 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
4264 case INTEL_FAM6_HASWELL_CORE: /* HSW */
4265 case INTEL_FAM6_HASWELL_X: /* HSW */
cd188af5 4266 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e
LB		 4267 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
4268 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4269 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
4270 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 4271 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4272 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e
LB		 4273 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4274 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 4275 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4276 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
103a8fea
LB		 4277 return 1;
4278 }
4279 return 0;
4280}
4281
d7899447
LB		 4282/*
4283 * HSW adds support for additional MSRs:
4284 *
5a63426e
LB		 4285 * MSR_PKG_C8_RESIDENCY 0x00000630
4286 * MSR_PKG_C9_RESIDENCY 0x00000631
4287 * MSR_PKG_C10_RESIDENCY 0x00000632
4288 *
4289 * MSR_PKGC8_IRTL 0x00000633
4290 * MSR_PKGC9_IRTL 0x00000634
4291 * MSR_PKGC10_IRTL 0x00000635
4292 *
d7899447
LB		 4293 */
4294int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 4295{
4296 if (!genuine_intel)
4297 return 0;
4298
4299 switch (model) {
cd188af5 4300 case INTEL_FAM6_HASWELL_ULT: /* HSW */
869ce69e
LB		 4301 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4302 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4303 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e 4304 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4305 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
0b2bb692
LB		 4306 return 1;
4307 }
4308 return 0;
4309}
4310
4311/*
4312 * SKL adds support for additional MSRS:
4313 *
4314 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4315 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4316 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4317 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4318 */
4319int has_skl_msrs(unsigned int family, unsigned int model)
4320{
4321 if (!genuine_intel)
4322 return 0;
4323
4324 switch (model) {
869ce69e 4325 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4326 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
ca58710f
KCA		 4327 return 1;
4328 }
4329 return 0;
4330}
4331
144b44b1
LB		 4332int is_slm(unsigned int family, unsigned int model)
4333{
4334 if (!genuine_intel)
4335 return 0;
4336 switch (model) {
f2c4db1b
PZ		 4337 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
4338 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
144b44b1
LB		 4339 return 1;
4340 }
4341 return 0;
4342}
4343
fb5d4327
DC		 4344int is_knl(unsigned int family, unsigned int model)
4345{
4346 if (!genuine_intel)
4347 return 0;
4348 switch (model) {
869ce69e 4349 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
fb5d4327
DC		 4350 return 1;
4351 }
4352 return 0;
4353}
4354
997e5395
SP		 4355int is_cnl(unsigned int family, unsigned int model)
4356{
4357 if (!genuine_intel)
4358 return 0;
4359
4360 switch (model) {
4361 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4362 return 1;
4363 }
4364
4365 return 0;
4366}
4367
b2b34dfe
HC		 4368unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4369{
4370 if (is_knl(family, model))
4371 return 1024;
4372 return 1;
4373}
4374
144b44b1
LB		 4375#define SLM_BCLK_FREQS 5
4376double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4377
4378double slm_bclk(void)
4379{
4380 unsigned long long msr = 3;
4381 unsigned int i;
4382 double freq;
4383
7ce7d5de 4384 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
b7d8c148 4385 fprintf(outf, "SLM BCLK: unknown\n");
144b44b1
LB		 4386
4387 i = msr & 0xf;
4388 if (i >= SLM_BCLK_FREQS) {
b7d8c148 4389 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
0a91e551 4390 i = 3;
144b44b1
LB		 4391 }
4392 freq = slm_freq_table[i];
4393
96e47158 4394 if (!quiet)
8f6196c1 4395 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
144b44b1
LB		 4396
4397 return freq;
4398}
4399
103a8fea
LB		 4400double discover_bclk(unsigned int family, unsigned int model)
4401{
121b48bb 4402 if (has_snb_msrs(family, model) || is_knl(family, model))
103a8fea 4403 return 100.00;
144b44b1
LB		 4404 else if (is_slm(family, model))
4405 return slm_bclk();
103a8fea
LB		 4406 else
4407 return 133.33;
4408}
4409
889facbe
LB		 4410/*
4411 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4412 * the Thermal Control Circuit (TCC) activates.
4413 * This is usually equal to tjMax.
4414 *
4415 * Older processors do not have this MSR, so there we guess,
4416 * but also allow cmdline over-ride with -T.
4417 *
4418 * Several MSR temperature values are in units of degrees-C
4419 * below this value, including the Digital Thermal Sensor (DTS),
4420 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4421 */
4422int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4423{
4424 unsigned long long msr;
4425 unsigned int target_c_local;
4426 int cpu;
4427
4428 /* tcc_activation_temp is used only for dts or ptm */
4429 if (!(do_dts || do_ptm))
4430 return 0;
4431
4432 /* this is a per-package concept */
4433 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4434 return 0;
4435
4436 cpu = t->cpu_id;
4437 if (cpu_migrate(cpu)) {
b7d8c148 4438 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4439 return -1;
4440 }
4441
4442 if (tcc_activation_temp_override != 0) {
4443 tcc_activation_temp = tcc_activation_temp_override;
b7d8c148 4444 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
889facbe
LB		 4445 cpu, tcc_activation_temp);
4446 return 0;
4447 }
4448
4449 /* Temperature Target MSR is Nehalem and newer only */
d7899447 4450 if (!do_nhm_platform_info)
889facbe
LB		 4451 goto guess;
4452
7ce7d5de 4453 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 4454 goto guess;
4455
3482124a 4456 target_c_local = (msr >> 16) & 0xFF;
889facbe 4457
96e47158 4458 if (!quiet)
b7d8c148 4459 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
889facbe
LB		 4460 cpu, msr, target_c_local);
4461
3482124a 4462 if (!target_c_local)
889facbe
LB		 4463 goto guess;
4464
4465 tcc_activation_temp = target_c_local;
4466
4467 return 0;
4468
4469guess:
4470 tcc_activation_temp = TJMAX_DEFAULT;
b7d8c148 4471 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
889facbe
LB		 4472 cpu, tcc_activation_temp);
4473
4474 return 0;
4475}
69807a63 4476
aa8d8cc7
LB		 4477void decode_feature_control_msr(void)
4478{
4479 unsigned long long msr;
4480
4481 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4482 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4483 base_cpu, msr,
4484 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4485 msr & (1 << 18) ? "SGX" : "");
4486}
4487
69807a63
LB		 4488void decode_misc_enable_msr(void)
4489{
4490 unsigned long long msr;
4491
f26b1519
LB		 4492 if (!genuine_intel)
4493 return;
4494
69807a63 4495 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
e6512624 4496 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
69807a63 4497 base_cpu, msr,
e6512624
LB		 4498 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4499 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
fd3933ca 4500 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
e6512624
LB		 4501 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4502 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
69807a63
LB		 4503}
4504
33148d67
LB		 4505void decode_misc_feature_control(void)
4506{
4507 unsigned long long msr;
4508
4509 if (!has_misc_feature_control)
4510 return;
4511
4512 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4513 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4514 base_cpu, msr,
4515 msr & (0 << 0) ? "No-" : "",
4516 msr & (1 << 0) ? "No-" : "",
4517 msr & (2 << 0) ? "No-" : "",
4518 msr & (3 << 0) ? "No-" : "");
4519}
f0057310
LB		 4520/*
4521 * Decode MSR_MISC_PWR_MGMT
4522 *
4523 * Decode the bits according to the Nehalem documentation
4524 * bit[0] seems to continue to have same meaning going forward
4525 * bit[1] less so...
4526 */
4527void decode_misc_pwr_mgmt_msr(void)
4528{
4529 unsigned long long msr;
4530
4531 if (!do_nhm_platform_info)
4532 return;
4533
cf4cbe53
LB		 4534 if (no_MSR_MISC_PWR_MGMT)
4535 return;
4536
f0057310 4537 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
ddadb8ad 4538 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
f0057310
LB		 4539 base_cpu, msr,
4540 msr & (1 << 0) ? "DIS" : "EN",
ddadb8ad
SP		 4541 msr & (1 << 1) ? "EN" : "DIS",
4542 msr & (1 << 8) ? "EN" : "DIS");
f0057310 4543}
71616c8e
LB		 4544/*
4545 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4546 *
4547 * This MSRs are present on Silvermont processors,
4548 * Intel Atom processor E3000 series (Baytrail), and friends.
4549 */
4550void decode_c6_demotion_policy_msr(void)
4551{
4552 unsigned long long msr;
4553
4554 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4555 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4556 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4557
4558 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4559 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4560 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4561}
7f5c258e 4562
f5a4c76a
LB		 4563/*
4564 * When models are the same, for the purpose of turbostat, reuse
4565 */
4566unsigned int intel_model_duplicates(unsigned int model)
4567{
4568
4569 switch(model) {
4570 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4571 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4572 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
4573 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
4574 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
4575 return INTEL_FAM6_NEHALEM;
4576
4577 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
4578 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
4579 return INTEL_FAM6_NEHALEM_EX;
4580
4581 case INTEL_FAM6_XEON_PHI_KNM:
4582 return INTEL_FAM6_XEON_PHI_KNL;
4583
f5a4c76a
LB		 4584 case INTEL_FAM6_BROADWELL_X:
4585 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
4586 return INTEL_FAM6_BROADWELL_X;
4587
4588 case INTEL_FAM6_SKYLAKE_MOBILE:
4589 case INTEL_FAM6_SKYLAKE_DESKTOP:
4590 case INTEL_FAM6_KABYLAKE_MOBILE:
4591 case INTEL_FAM6_KABYLAKE_DESKTOP:
4592 return INTEL_FAM6_SKYLAKE_MOBILE;
937807d3
LB		 4593
4594 case INTEL_FAM6_ICELAKE_MOBILE:
4595 return INTEL_FAM6_CANNONLAKE_MOBILE;
b62b3184
ZR		 4596
4597 case INTEL_FAM6_ATOM_TREMONT_X:
4598 return INTEL_FAM6_ATOM_GOLDMONT_X;
f5a4c76a
LB		 4599 }
4600 return model;
4601}
fcd17211 4602void process_cpuid()
103a8fea 4603{
34041551
LB		 4604 unsigned int eax, ebx, ecx, edx;
4605 unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
b3a34e93 4606 unsigned int has_turbo;
103a8fea
LB		 4607
4608 eax = ebx = ecx = edx = 0;
4609
5aea2f7f 4610 __cpuid(0, max_level, ebx, ecx, edx);
103a8fea 4611
34041551 4612 if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
103a8fea 4613 genuine_intel = 1;
34041551
LB		 4614 else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4615 authentic_amd = 1;
103a8fea 4616
96e47158 4617 if (!quiet)
b7d8c148 4618 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 4619 (char *)&ebx, (char *)&edx, (char *)&ecx);
4620
5aea2f7f 4621 __cpuid(1, fms, ebx, ecx, edx);
103a8fea
LB		 4622 family = (fms >> 8) & 0xf;
4623 model = (fms >> 4) & 0xf;
4624 stepping = fms & 0xf;
5aa3d1a2
CW		 4625 if (family == 0xf)
4626 family += (fms >> 20) & 0xff;
4627 if (family >= 6)
103a8fea 4628 model += ((fms >> 16) & 0xf) << 4;
34041551
LB		 4629 ecx_flags = ecx;
4630 edx_flags = edx;
103a8fea
LB		 4631
4632 /*
4633 * check max extended function levels of CPUID.
4634 * This is needed to check for invariant TSC.
4635 * This check is valid for both Intel and AMD.
4636 */
4637 ebx = ecx = edx = 0;
5aea2f7f 4638 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
103a8fea 4639
34041551
LB		 4640 if (!quiet) {
4641 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4642 max_level, max_extended_level, family, model, stepping, family, model, stepping);
4643 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4644 ecx_flags & (1 << 0) ? "SSE3" : "-",
4645 ecx_flags & (1 << 3) ? "MONITOR" : "-",
4646 ecx_flags & (1 << 6) ? "SMX" : "-",
4647 ecx_flags & (1 << 7) ? "EIST" : "-",
4648 ecx_flags & (1 << 8) ? "TM2" : "-",
4649 edx_flags & (1 << 4) ? "TSC" : "-",
4650 edx_flags & (1 << 5) ? "MSR" : "-",
4651 edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4652 edx_flags & (1 << 28) ? "HT" : "-",
4653 edx_flags & (1 << 29) ? "TM" : "-");
4654 }
f5a4c76a
LB		 4655 if (genuine_intel)
4656 model = intel_model_duplicates(model);
34041551
LB		 4657
4658 if (!(edx_flags & (1 << 5)))
4659 errx(1, "CPUID: no MSR");
4660
61a87ba7 4661 if (max_extended_level >= 0x80000007) {
103a8fea 4662
d7899447
LB		 4663 /*
4664 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4665 * this check is valid for both Intel and AMD
4666 */
5aea2f7f 4667 __cpuid(0x80000007, eax, ebx, ecx, edx);
d7899447
LB		 4668 has_invariant_tsc = edx & (1 << 8);
4669 }
103a8fea
LB		 4670
4671 /*
4672 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4673 * this check is valid for both Intel and AMD
4674 */
4675
5aea2f7f 4676 __cpuid(0x6, eax, ebx, ecx, edx);
8209e054 4677 has_aperf = ecx & (1 << 0);
812db3f7
LB		 4678 if (has_aperf) {
4679 BIC_PRESENT(BIC_Avg_MHz);
4680 BIC_PRESENT(BIC_Busy);
4681 BIC_PRESENT(BIC_Bzy_MHz);
4682 }
889facbe 4683 do_dts = eax & (1 << 0);
812db3f7
LB		 4684 if (do_dts)
4685 BIC_PRESENT(BIC_CoreTmp);
b3a34e93 4686 has_turbo = eax & (1 << 1);
889facbe 4687 do_ptm = eax & (1 << 6);
812db3f7
LB		 4688 if (do_ptm)
4689 BIC_PRESENT(BIC_PkgTmp);
7f5c258e
LB		 4690 has_hwp = eax & (1 << 7);
4691 has_hwp_notify = eax & (1 << 8);
4692 has_hwp_activity_window = eax & (1 << 9);
4693 has_hwp_epp = eax & (1 << 10);
4694 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 4695 has_epb = ecx & (1 << 3);
4696
96e47158 4697 if (!quiet)
b3a34e93 4698 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
7f5c258e
LB		 4699 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4700 has_aperf ? "" : "No-",
b3a34e93 4701 has_turbo ? "" : "No-",
7f5c258e
LB		 4702 do_dts ? "" : "No-",
4703 do_ptm ? "" : "No-",
4704 has_hwp ? "" : "No-",
4705 has_hwp_notify ? "" : "No-",
4706 has_hwp_activity_window ? "" : "No-",
4707 has_hwp_epp ? "" : "No-",
4708 has_hwp_pkg ? "" : "No-",
4709 has_epb ? "" : "No-");
103a8fea 4710
96e47158 4711 if (!quiet)
69807a63
LB		 4712 decode_misc_enable_msr();
4713
33148d67 4714
96e47158 4715 if (max_level >= 0x7 && !quiet) {
aa8d8cc7 4716 int has_sgx;
103a8fea 4717
aa8d8cc7
LB		 4718 ecx = 0;
4719
4720 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4721
4722 has_sgx = ebx & (1 << 2);
4723 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4724
4725 if (has_sgx)
4726 decode_feature_control_msr();
4727 }
4728
61a87ba7 4729 if (max_level >= 0x15) {
8a5bdf41
LB		 4730 unsigned int eax_crystal;
4731 unsigned int ebx_tsc;
4732
4733 /*
4734 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4735 */
4736 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5aea2f7f 4737 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
8a5bdf41
LB		 4738
4739 if (ebx_tsc != 0) {
4740
96e47158 4741 if (!quiet && (ebx != 0))
b7d8c148 4742 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
8a5bdf41
LB		 4743 eax_crystal, ebx_tsc, crystal_hz);
4744
4745 if (crystal_hz == 0)
4746 switch(model) {
869ce69e 4747 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
e8efbc80
LB		 4748 crystal_hz = 24000000; /* 24.0 MHz */
4749 break;
f2c4db1b 4750 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
ec53e594
LB		 4751 crystal_hz = 25000000; /* 25.0 MHz */
4752 break;
869ce69e 4753 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4754 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e8efbc80 4755 crystal_hz = 19200000; /* 19.2 MHz */
8a5bdf41
LB		 4756 break;
4757 default:
4758 crystal_hz = 0;
4759 }
4760
4761 if (crystal_hz) {
4762 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
96e47158 4763 if (!quiet)
b7d8c148 4764 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
8a5bdf41
LB		 4765 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
4766 }
4767 }
4768 }
61a87ba7
LB		 4769 if (max_level >= 0x16) {
4770 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4771
4772 /*
4773 * CPUID 16H Base MHz, Max MHz, Bus MHz
4774 */
4775 base_mhz = max_mhz = bus_mhz = edx = 0;
4776
5aea2f7f 4777 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
96e47158 4778 if (!quiet)
b7d8c148 4779 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
61a87ba7
LB		 4780 base_mhz, max_mhz, bus_mhz);
4781 }
8a5bdf41 4782
b2b34dfe
HC		 4783 if (has_aperf)
4784 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4785
812db3f7
LB		 4786 BIC_PRESENT(BIC_IRQ);
4787 BIC_PRESENT(BIC_TSC_MHz);
4788
4789 if (probe_nhm_msrs(family, model)) {
4790 do_nhm_platform_info = 1;
4791 BIC_PRESENT(BIC_CPU_c1);
4792 BIC_PRESENT(BIC_CPU_c3);
4793 BIC_PRESENT(BIC_CPU_c6);
4794 BIC_PRESENT(BIC_SMI);
4795 }
d7899447 4796 do_snb_cstates = has_snb_msrs(family, model);
812db3f7
LB		 4797
4798 if (do_snb_cstates)
4799 BIC_PRESENT(BIC_CPU_c7);
4800
5a63426e 4801 do_irtl_snb = has_snb_msrs(family, model);
0f47c08d
LB		 4802 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4803 BIC_PRESENT(BIC_Pkgpc2);
4804 if (pkg_cstate_limit >= PCL__3)
4805 BIC_PRESENT(BIC_Pkgpc3);
4806 if (pkg_cstate_limit >= PCL__6)
4807 BIC_PRESENT(BIC_Pkgpc6);
4808 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4809 BIC_PRESENT(BIC_Pkgpc7);
0539ba11 4810 if (has_slv_msrs(family, model)) {
0f47c08d
LB		 4811 BIC_NOT_PRESENT(BIC_Pkgpc2);
4812 BIC_NOT_PRESENT(BIC_Pkgpc3);
4813 BIC_PRESENT(BIC_Pkgpc6);
4814 BIC_NOT_PRESENT(BIC_Pkgpc7);
0539ba11
LB		 4815 BIC_PRESENT(BIC_Mod_c6);
4816 use_c1_residency_msr = 1;
4817 }
7170a374
LB		 4818 if (is_dnv(family, model)) {
4819 BIC_PRESENT(BIC_CPU_c1);
4820 BIC_NOT_PRESENT(BIC_CPU_c3);
4821 BIC_NOT_PRESENT(BIC_Pkgpc3);
4822 BIC_NOT_PRESENT(BIC_CPU_c7);
4823 BIC_NOT_PRESENT(BIC_Pkgpc7);
4824 use_c1_residency_msr = 1;
4825 }
34c76197
LB		 4826 if (is_skx(family, model)) {
4827 BIC_NOT_PRESENT(BIC_CPU_c3);
4828 BIC_NOT_PRESENT(BIC_Pkgpc3);
4829 BIC_NOT_PRESENT(BIC_CPU_c7);
4830 BIC_NOT_PRESENT(BIC_Pkgpc7);
4831 }
ade0ebac
LB		 4832 if (is_bdx(family, model)) {
4833 BIC_NOT_PRESENT(BIC_CPU_c7);
4834 BIC_NOT_PRESENT(BIC_Pkgpc7);
4835 }
0f47c08d
LB		 4836 if (has_hsw_msrs(family, model)) {
4837 BIC_PRESENT(BIC_Pkgpc8);
4838 BIC_PRESENT(BIC_Pkgpc9);
4839 BIC_PRESENT(BIC_Pkgpc10);
4840 }
5a63426e 4841 do_irtl_hsw = has_hsw_msrs(family, model);
a99d8730
LB		 4842 if (has_skl_msrs(family, model)) {
4843 BIC_PRESENT(BIC_Totl_c0);
4844 BIC_PRESENT(BIC_Any_c0);
4845 BIC_PRESENT(BIC_GFX_c0);
4846 BIC_PRESENT(BIC_CPUGFX);
4847 }
144b44b1 4848 do_slm_cstates = is_slm(family, model);
fb5d4327 4849 do_knl_cstates = is_knl(family, model);
103a8fea 4850
31a1f15c 4851 if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
562855ee 4852 BIC_NOT_PRESENT(BIC_CPU_c3);
103a8fea 4853
96e47158 4854 if (!quiet)
f0057310
LB		 4855 decode_misc_pwr_mgmt_msr();
4856
96e47158 4857 if (!quiet && has_slv_msrs(family, model))
71616c8e
LB		 4858 decode_c6_demotion_policy_msr();
4859
889facbe 4860 rapl_probe(family, model);
3a9a941d 4861 perf_limit_reasons_probe(family, model);
ac980e13 4862 automatic_cstate_conversion_probe(family, model);
889facbe 4863
96e47158 4864 if (!quiet)
1b69317d 4865 dump_cstate_pstate_config_info(family, model);
fcd17211 4866
41618e63
LB		 4867 if (!quiet)
4868 dump_sysfs_cstate_config();
7293fccd
LB		 4869 if (!quiet)
4870 dump_sysfs_pstate_config();
41618e63 4871
a2b7b749
LB		 4872 if (has_skl_msrs(family, model))
4873 calculate_tsc_tweak();
4874
812db3f7
LB		 4875 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4876 BIC_PRESENT(BIC_GFX_rc6);
fdf676e5 4877
812db3f7
LB		 4878 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4879 BIC_PRESENT(BIC_GFXMHz);
27d47356 4880
be0e54c4
LB		 4881 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4882 BIC_PRESENT(BIC_CPU_LPI);
4883 else
4884 BIC_NOT_PRESENT(BIC_CPU_LPI);
4885
4886 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4887 BIC_PRESENT(BIC_SYS_LPI);
4888 else
4889 BIC_NOT_PRESENT(BIC_SYS_LPI);
4890
96e47158 4891 if (!quiet)
33148d67
LB		 4892 decode_misc_feature_control();
4893
889facbe 4894 return;
103a8fea
LB		 4895}
4896
103a8fea
LB		 4897/*
4898 * in /dev/cpu/ return success for names that are numbers
4899 * ie. filter out ".", "..", "microcode".
4900 */
4901int dir_filter(const struct dirent *dirp)
4902{
4903 if (isdigit(dirp->d_name[0]))
4904 return 1;
4905 else
4906 return 0;
4907}
4908
4909int open_dev_cpu_msr(int dummy1)
4910{
4911 return 0;
4912}
4913
c98d5d94
LB		 4914void topology_probe()
4915{
4916 int i;
4917 int max_core_id = 0;
4918 int max_package_id = 0;
6de68fe1 4919 int max_die_id = 0;
c98d5d94 4920 int max_siblings = 0;
c98d5d94
LB		 4921
4922 /* Initialize num_cpus, max_cpu_num */
843c5791 4923 set_max_cpu_num();
c98d5d94 4924 topo.num_cpus = 0;
c98d5d94
LB		 4925 for_all_proc_cpus(count_cpus);
4926 if (!summary_only && topo.num_cpus > 1)
812db3f7 4927 BIC_PRESENT(BIC_CPU);
c98d5d94 4928
d8af6f5f 4929 if (debug > 1)
b7d8c148 4930 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
c98d5d94
LB		 4931
4932 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 4933 if (cpus == NULL)
4934 err(1, "calloc cpus");
c98d5d94
LB		 4935
4936 /*
4937 * Allocate and initialize cpu_present_set
4938 */
4939 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4940 if (cpu_present_set == NULL)
4941 err(3, "CPU_ALLOC");
c98d5d94
LB		 4942 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4943 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4944 for_all_proc_cpus(mark_cpu_present);
4945
1ef7d21a
LB		 4946 /*
4947 * Validate that all cpus in cpu_subset are also in cpu_present_set
4948 */
4949 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4950 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4951 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4952 err(1, "cpu%d not present", i);
4953 }
4954
c98d5d94
LB		 4955 /*
4956 * Allocate and initialize cpu_affinity_set
4957 */
4958 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4959 if (cpu_affinity_set == NULL)
4960 err(3, "CPU_ALLOC");
c98d5d94
LB		 4961 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4962 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4963
8cb48b32 4964 for_all_proc_cpus(init_thread_id);
c98d5d94
LB		 4965
4966 /*
4967 * For online cpus
4968 * find max_core_id, max_package_id
4969 */
4970 for (i = 0; i <= topo.max_cpu_num; ++i) {
4971 int siblings;
4972
4973 if (cpu_is_not_present(i)) {
d8af6f5f 4974 if (debug > 1)
b7d8c148 4975 fprintf(outf, "cpu%d NOT PRESENT\n", i);
c98d5d94
LB		 4976 continue;
4977 }
c98d5d94 4978
0e2d8f05
LB		 4979 cpus[i].logical_cpu_id = i;
4980
4981 /* get package information */
c98d5d94
LB		 4982 cpus[i].physical_package_id = get_physical_package_id(i);
4983 if (cpus[i].physical_package_id > max_package_id)
4984 max_package_id = cpus[i].physical_package_id;
4985
6de68fe1
LB		 4986 /* get die information */
4987 cpus[i].die_id = get_die_id(i);
4988 if (cpus[i].die_id > max_die_id)
4989 max_die_id = cpus[i].die_id;
4990
0e2d8f05 4991 /* get numa node information */
ef605741
PB		 4992 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4993 if (cpus[i].physical_node_id > topo.max_node_num)
4994 topo.max_node_num = cpus[i].physical_node_id;
0e2d8f05
LB		 4995
4996 /* get core information */
4997 cpus[i].physical_core_id = get_core_id(i);
4998 if (cpus[i].physical_core_id > max_core_id)
4999 max_core_id = cpus[i].physical_core_id;
5000
5001 /* get thread information */
5002 siblings = get_thread_siblings(&cpus[i]);
c98d5d94
LB		 5003 if (siblings > max_siblings)
5004 max_siblings = siblings;
4f206a0f 5005 if (cpus[i].thread_id == 0)
8cb48b32 5006 topo.num_cores++;
c98d5d94 5007 }
ef605741 5008
70a9c6e8 5009 topo.cores_per_node = max_core_id + 1;
d8af6f5f 5010 if (debug > 1)
b7d8c148 5011 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
70a9c6e8
PB		 5012 max_core_id, topo.cores_per_node);
5013 if (!summary_only && topo.cores_per_node > 1)
812db3f7 5014 BIC_PRESENT(BIC_Core);
c98d5d94 5015
6de68fe1
LB		 5016 topo.num_die = max_die_id + 1;
5017 if (debug > 1)
5018 fprintf(outf, "max_die_id %d, sizing for %d die\n",
5019 max_die_id, topo.num_die);
5020 if (!summary_only && topo.num_die > 1)
5021 BIC_PRESENT(BIC_Die);
5022
c98d5d94 5023 topo.num_packages = max_package_id + 1;
d8af6f5f 5024 if (debug > 1)
b7d8c148 5025 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
c98d5d94 5026 max_package_id, topo.num_packages);
7da6e3e2 5027 if (!summary_only && topo.num_packages > 1)
812db3f7 5028 BIC_PRESENT(BIC_Package);
c98d5d94 5029
ef605741
PB		 5030 set_node_data();
5031 if (debug > 1)
70a9c6e8 5032 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
01235041
PB		 5033 if (!summary_only && topo.nodes_per_pkg > 1)
5034 BIC_PRESENT(BIC_Node);
ef605741 5035
70a9c6e8 5036 topo.threads_per_core = max_siblings;
d8af6f5f 5037 if (debug > 1)
b7d8c148 5038 fprintf(outf, "max_siblings %d\n", max_siblings);
2ffbb224
PB		 5039
5040 if (debug < 1)
5041 return;
5042
5043 for (i = 0; i <= topo.max_cpu_num; ++i) {
0ec712e3
LB		 5044 if (cpu_is_not_present(i))
5045 continue;
2ffbb224 5046 fprintf(outf,
6de68fe1
LB		 5047 "cpu %d pkg %d die %d node %d lnode %d core %d thread %d\n",
5048 i, cpus[i].physical_package_id, cpus[i].die_id,
2ffbb224
PB		 5049 cpus[i].physical_node_id,
5050 cpus[i].logical_node_id,
5051 cpus[i].physical_core_id,
5052 cpus[i].thread_id);
5053 }
5054
c98d5d94
LB		 5055}
5056
5057void
40f5cfe7
PB		 5058allocate_counters(struct thread_data **t, struct core_data **c,
5059 struct pkg_data **p)
c98d5d94
LB		 5060{
5061 int i;
40f5cfe7
PB		 5062 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
5063 topo.num_packages;
5064 int num_threads = topo.threads_per_core * num_cores;
c98d5d94 5065
40f5cfe7 5066 *t = calloc(num_threads, sizeof(struct thread_data));
c98d5d94
LB		 5067 if (*t == NULL)
5068 goto error;
5069
40f5cfe7 5070 for (i = 0; i < num_threads; i++)
c98d5d94
LB		 5071 (*t)[i].cpu_id = -1;
5072
40f5cfe7 5073 *c = calloc(num_cores, sizeof(struct core_data));
c98d5d94
LB		 5074 if (*c == NULL)
5075 goto error;
5076
40f5cfe7 5077 for (i = 0; i < num_cores; i++)
c98d5d94
LB		 5078 (*c)[i].core_id = -1;
5079
678a3bd1 5080 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
c98d5d94
LB		 5081 if (*p == NULL)
5082 goto error;
5083
5084 for (i = 0; i < topo.num_packages; i++)
5085 (*p)[i].package_id = i;
5086
5087 return;
5088error:
b2c95d90 5089 err(1, "calloc counters");
c98d5d94
LB		 5090}
5091/*
5092 * init_counter()
5093 *
c98d5d94 5094 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
c98d5d94
LB		 5095 */
5096void init_counter(struct thread_data *thread_base, struct core_data *core_base,
8cb48b32 5097 struct pkg_data *pkg_base, int cpu_id)
c98d5d94 5098{
8cb48b32 5099 int pkg_id = cpus[cpu_id].physical_package_id;
40f5cfe7 5100 int node_id = cpus[cpu_id].logical_node_id;
8cb48b32
PB		 5101 int core_id = cpus[cpu_id].physical_core_id;
5102 int thread_id = cpus[cpu_id].thread_id;
c98d5d94
LB		 5103 struct thread_data *t;
5104 struct core_data *c;
5105 struct pkg_data *p;
5106
42dd4520
NC		 5107
5108 /* Workaround for systems where physical_node_id==-1
5109 * and logical_node_id==(-1 - topo.num_cpus)
5110 */
5111 if (node_id < 0)
5112 node_id = 0;
5113
40f5cfe7
PB		 5114 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
5115 c = GET_CORE(core_base, core_id, node_id, pkg_id);
8cb48b32 5116 p = GET_PKG(pkg_base, pkg_id);
c98d5d94
LB		 5117
5118 t->cpu_id = cpu_id;
8cb48b32 5119 if (thread_id == 0) {
c98d5d94
LB		 5120 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
5121 if (cpu_is_first_core_in_package(cpu_id))
5122 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
5123 }
5124
8cb48b32
PB		 5125 c->core_id = core_id;
5126 p->package_id = pkg_id;
c98d5d94
LB		 5127}
5128
5129
5130int initialize_counters(int cpu_id)
5131{
8cb48b32
PB		 5132 init_counter(EVEN_COUNTERS, cpu_id);
5133 init_counter(ODD_COUNTERS, cpu_id);
c98d5d94
LB		 5134 return 0;
5135}
5136
5137void allocate_output_buffer()
5138{
eeb71c95 5139 output_buffer = calloc(1, (1 + topo.num_cpus) * 2048);
c98d5d94 5140 outp = output_buffer;
b2c95d90
JT		 5141 if (outp == NULL)
5142 err(-1, "calloc output buffer");
c98d5d94 5143}
36229897
LB		 5144void allocate_fd_percpu(void)
5145{
01a67adf 5146 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
36229897
LB		 5147 if (fd_percpu == NULL)
5148 err(-1, "calloc fd_percpu");
5149}
562a2d37
LB		 5150void allocate_irq_buffers(void)
5151{
5152 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
5153 if (irq_column_2_cpu == NULL)
5154 err(-1, "calloc %d", topo.num_cpus);
c98d5d94 5155
01a67adf 5156 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
562a2d37 5157 if (irqs_per_cpu == NULL)
01a67adf 5158 err(-1, "calloc %d", topo.max_cpu_num + 1);
562a2d37 5159}
c98d5d94
LB		 5160void setup_all_buffers(void)
5161{
5162 topology_probe();
562a2d37 5163 allocate_irq_buffers();
36229897 5164 allocate_fd_percpu();
c98d5d94
LB		 5165 allocate_counters(&thread_even, &core_even, &package_even);
5166 allocate_counters(&thread_odd, &core_odd, &package_odd);
5167 allocate_output_buffer();
5168 for_all_proc_cpus(initialize_counters);
5169}
3b4d5c7f 5170
7ce7d5de
PB		 5171void set_base_cpu(void)
5172{
5173 base_cpu = sched_getcpu();
5174 if (base_cpu < 0)
5175 err(-ENODEV, "No valid cpus found");
5176
5177 if (debug > 1)
b7d8c148 5178 fprintf(outf, "base_cpu = %d\n", base_cpu);
7ce7d5de
PB		 5179}
5180
103a8fea
LB		 5181void turbostat_init()
5182{
7ce7d5de
PB		 5183 setup_all_buffers();
5184 set_base_cpu();
103a8fea 5185 check_dev_msr();
98481e79 5186 check_permissions();
fcd17211 5187 process_cpuid();
103a8fea 5188
103a8fea 5189
96e47158 5190 if (!quiet)
7f5c258e
LB		 5191 for_all_cpus(print_hwp, ODD_COUNTERS);
5192
96e47158 5193 if (!quiet)
889facbe
LB		 5194 for_all_cpus(print_epb, ODD_COUNTERS);
5195
96e47158 5196 if (!quiet)
3a9a941d
LB		 5197 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5198
96e47158 5199 if (!quiet)
889facbe
LB		 5200 for_all_cpus(print_rapl, ODD_COUNTERS);
5201
5202 for_all_cpus(set_temperature_target, ODD_COUNTERS);
5203
96e47158 5204 if (!quiet)
889facbe 5205 for_all_cpus(print_thermal, ODD_COUNTERS);
5a63426e 5206
96e47158 5207 if (!quiet && do_irtl_snb)
5a63426e 5208 print_irtl();
103a8fea
LB		 5209}
5210
5211int fork_it(char **argv)
5212{
103a8fea 5213 pid_t child_pid;
d91bb17c 5214 int status;
d15cf7c1 5215
218f0e8d 5216 snapshot_proc_sysfs_files();
d91bb17c 5217 status = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 5218 first_counter_read = 0;
d91bb17c
LB		 5219 if (status)
5220 exit(status);
c98d5d94
LB		 5221 /* clear affinity side-effect of get_counters() */
5222 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 5223 gettimeofday(&tv_even, (struct timezone *)NULL);
5224
5225 child_pid = fork();
5226 if (!child_pid) {
5227 /* child */
5228 execvp(argv[0], argv);
0815a3d0 5229 err(errno, "exec %s", argv[0]);
103a8fea 5230 } else {
103a8fea
LB		 5231
5232 /* parent */
b2c95d90
JT		 5233 if (child_pid == -1)
5234 err(1, "fork");
103a8fea
LB		 5235
5236 signal(SIGINT, SIG_IGN);
5237 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 5238 if (waitpid(child_pid, &status, 0) == -1)
5239 err(status, "waitpid");
2a954966
DA		 5240
5241 if (WIFEXITED(status))
5242 status = WEXITSTATUS(status);
103a8fea 5243 }
c98d5d94
LB		 5244 /*
5245 * n.b. fork_it() does not check for errors from for_all_cpus()
5246 * because re-starting is problematic when forking
5247 */
218f0e8d 5248 snapshot_proc_sysfs_files();
c98d5d94 5249 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 5250 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 5251 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 5252 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5253 fprintf(outf, "%s: Counter reset detected\n", progname);
5254 else {
5255 compute_average(EVEN_COUNTERS);
5256 format_all_counters(EVEN_COUNTERS);
5257 }
103a8fea 5258
b7d8c148
LB		 5259 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5260
5261 flush_output_stderr();
103a8fea 5262
d91bb17c 5263 return status;
103a8fea
LB		 5264}
5265
3b4d5c7f
AS		 5266int get_and_dump_counters(void)
5267{
5268 int status;
5269
218f0e8d 5270 snapshot_proc_sysfs_files();
3b4d5c7f
AS		 5271 status = for_all_cpus(get_counters, ODD_COUNTERS);
5272 if (status)
5273 return status;
5274
5275 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5276 if (status)
5277 return status;
5278
b7d8c148 5279 flush_output_stdout();
3b4d5c7f
AS		 5280
5281 return status;
5282}
5283
d8af6f5f 5284void print_version() {
0f71d089 5285 fprintf(outf, "turbostat version 19.03.20"
d8af6f5f
LB		 5286 " - Len Brown <lenb@kernel.org>\n");
5287}
5288
495c7654
LB		 5289int add_counter(unsigned int msr_num, char *path, char *name,
5290 unsigned int width, enum counter_scope scope,
41618e63 5291 enum counter_type type, enum counter_format format, int flags)
388e9c81
LB		 5292{
5293 struct msr_counter *msrp;
5294
5295 msrp = calloc(1, sizeof(struct msr_counter));
5296 if (msrp == NULL) {
5297 perror("calloc");
5298 exit(1);
5299 }
5300
5301 msrp->msr_num = msr_num;
5302 strncpy(msrp->name, name, NAME_BYTES);
495c7654
LB		 5303 if (path)
5304 strncpy(msrp->path, path, PATH_BYTES);
388e9c81
LB		 5305 msrp->width = width;
5306 msrp->type = type;
5307 msrp->format = format;
41618e63 5308 msrp->flags = flags;
388e9c81
LB		 5309
5310 switch (scope) {
5311
5312 case SCOPE_CPU:
388e9c81
LB		 5313 msrp->next = sys.tp;
5314 sys.tp = msrp;
678a3bd1 5315 sys.added_thread_counters++;
0748eaf0 5316 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
678a3bd1
LB		 5317 fprintf(stderr, "exceeded max %d added thread counters\n",
5318 MAX_ADDED_COUNTERS);
5319 exit(-1);
5320 }
388e9c81
LB		 5321 break;
5322
5323 case SCOPE_CORE:
388e9c81
LB		 5324 msrp->next = sys.cp;
5325 sys.cp = msrp;
678a3bd1
LB		 5326 sys.added_core_counters++;
5327 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5328 fprintf(stderr, "exceeded max %d added core counters\n",
5329 MAX_ADDED_COUNTERS);
5330 exit(-1);
5331 }
388e9c81
LB		 5332 break;
5333
5334 case SCOPE_PACKAGE:
388e9c81
LB		 5335 msrp->next = sys.pp;
5336 sys.pp = msrp;
678a3bd1
LB		 5337 sys.added_package_counters++;
5338 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5339 fprintf(stderr, "exceeded max %d added package counters\n",
5340 MAX_ADDED_COUNTERS);
5341 exit(-1);
5342 }
388e9c81
LB		 5343 break;
5344 }
5345
5346 return 0;
5347}
5348
5349void parse_add_command(char *add_command)
5350{
5351 int msr_num = 0;
495c7654 5352 char *path = NULL;
0f47c08d 5353 char name_buffer[NAME_BYTES] = "";
388e9c81
LB		 5354 int width = 64;
5355 int fail = 0;
5356 enum counter_scope scope = SCOPE_CPU;
5357 enum counter_type type = COUNTER_CYCLES;
5358 enum counter_format format = FORMAT_DELTA;
5359
5360 while (add_command) {
5361
5362 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5363 goto next;
5364
5365 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5366 goto next;
5367
495c7654
LB		 5368 if (*add_command == '/') {
5369 path = add_command;
5370 goto next;
5371 }
5372
388e9c81
LB		 5373 if (sscanf(add_command, "u%d", &width) == 1) {
5374 if ((width == 32) || (width == 64))
5375 goto next;
5376 width = 64;
5377 }
5378 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5379 scope = SCOPE_CPU;
5380 goto next;
5381 }
5382 if (!strncmp(add_command, "core", strlen("core"))) {
5383 scope = SCOPE_CORE;
5384 goto next;
5385 }
5386 if (!strncmp(add_command, "package", strlen("package"))) {
5387 scope = SCOPE_PACKAGE;
5388 goto next;
5389 }
5390 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5391 type = COUNTER_CYCLES;
5392 goto next;
5393 }
5394 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5395 type = COUNTER_SECONDS;
5396 goto next;
5397 }
41618e63
LB		 5398 if (!strncmp(add_command, "usec", strlen("usec"))) {
5399 type = COUNTER_USEC;
5400 goto next;
5401 }
388e9c81
LB		 5402 if (!strncmp(add_command, "raw", strlen("raw"))) {
5403 format = FORMAT_RAW;
5404 goto next;
5405 }
5406 if (!strncmp(add_command, "delta", strlen("delta"))) {
5407 format = FORMAT_DELTA;
5408 goto next;
5409 }
5410 if (!strncmp(add_command, "percent", strlen("percent"))) {
5411 format = FORMAT_PERCENT;
5412 goto next;
5413 }
5414
5415 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5416 char *eos;
5417
5418 eos = strchr(name_buffer, ',');
5419 if (eos)
5420 *eos = '\0';
5421 goto next;
5422 }
5423
5424next:
5425 add_command = strchr(add_command, ',');
495c7654
LB		 5426 if (add_command) {
5427 *add_command = '\0';
388e9c81 5428 add_command++;
495c7654 5429 }
388e9c81
LB		 5430
5431 }
495c7654
LB		 5432 if ((msr_num == 0) && (path == NULL)) {
5433 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
388e9c81
LB		 5434 fail++;
5435 }
5436
5437 /* generate default column header */
5438 if (*name_buffer == '\0') {
5f3aea57
LB		 5439 if (width == 32)
5440 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5441 else
5442 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
388e9c81
LB		 5443 }
5444
41618e63 5445 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
388e9c81
LB		 5446 fail++;
5447
5448 if (fail) {
5449 help();
5450 exit(1);
5451 }
5452}
41618e63 5453
dd778a5e
LB		 5454int is_deferred_skip(char *name)
5455{
5456 int i;
5457
5458 for (i = 0; i < deferred_skip_index; ++i)
5459 if (!strcmp(name, deferred_skip_names[i]))
5460 return 1;
5461 return 0;
5462}
5463
41618e63
LB		 5464void probe_sysfs(void)
5465{
5466 char path[64];
5467 char name_buf[16];
5468 FILE *input;
5469 int state;
5470 char *sp;
5471
5472 if (!DO_BIC(BIC_sysfs))
5473 return;
5474
0748eaf0 5475 for (state = 10; state >= 0; --state) {
41618e63
LB		 5476
5477 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5478 base_cpu, state);
5479 input = fopen(path, "r");
5480 if (input == NULL)
5481 continue;
8173c336
BH		 5482 if (!fgets(name_buf, sizeof(name_buf), input))
5483 err(1, "%s: failed to read file", path);
41618e63
LB		 5484
5485 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5486 sp = strchr(name_buf, '-');
5487 if (!sp)
5488 sp = strchrnul(name_buf, '\n');
5489 *sp = '%';
5490 *(sp + 1) = '\0';
5491
5492 fclose(input);
5493
5494 sprintf(path, "cpuidle/state%d/time", state);
5495
dd778a5e
LB		 5496 if (is_deferred_skip(name_buf))
5497 continue;
5498
41618e63
LB		 5499 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5500 FORMAT_PERCENT, SYSFS_PERCPU);
5501 }
5502
0748eaf0 5503 for (state = 10; state >= 0; --state) {
41618e63
LB		 5504
5505 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5506 base_cpu, state);
5507 input = fopen(path, "r");
5508 if (input == NULL)
5509 continue;
8173c336
BH		 5510 if (!fgets(name_buf, sizeof(name_buf), input))
5511 err(1, "%s: failed to read file", path);
41618e63
LB		 5512 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5513 sp = strchr(name_buf, '-');
5514 if (!sp)
5515 sp = strchrnul(name_buf, '\n');
5516 *sp = '\0';
5517 fclose(input);
5518
5519 sprintf(path, "cpuidle/state%d/usage", state);
5520
dd778a5e
LB		 5521 if (is_deferred_skip(name_buf))
5522 continue;
5523
41618e63
LB		 5524 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5525 FORMAT_DELTA, SYSFS_PERCPU);
5526 }
5527
5528}
5529
1ef7d21a
LB		 5530
5531/*
5532 * parse cpuset with following syntax
5533 * 1,2,4..6,8-10 and set bits in cpu_subset
5534 */
5535void parse_cpu_command(char *optarg)
5536{
5537 unsigned int start, end;
5538 char *next;
5539
4e4e1e7c
LB		 5540 if (!strcmp(optarg, "core")) {
5541 if (cpu_subset)
5542 goto error;
5543 show_core_only++;
5544 return;
5545 }
5546 if (!strcmp(optarg, "package")) {
5547 if (cpu_subset)
5548 goto error;
5549 show_pkg_only++;
5550 return;
5551 }
5552 if (show_core_only || show_pkg_only)
5553 goto error;
5554
1ef7d21a
LB		 5555 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5556 if (cpu_subset == NULL)
5557 err(3, "CPU_ALLOC");
5558 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5559
5560 CPU_ZERO_S(cpu_subset_size, cpu_subset);
5561
5562 next = optarg;
5563
5564 while (next && *next) {
5565
5566 if (*next == '-') /* no negative cpu numbers */
5567 goto error;
5568
5569 start = strtoul(next, &next, 10);
5570
5571 if (start >= CPU_SUBSET_MAXCPUS)
5572 goto error;
5573 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5574
5575 if (*next == '\0')
5576 break;
5577
5578 if (*next == ',') {
5579 next += 1;
5580 continue;
5581 }
5582
5583 if (*next == '-') {
5584 next += 1; /* start range */
5585 } else if (*next == '.') {
5586 next += 1;
5587 if (*next == '.')
5588 next += 1; /* start range */
5589 else
5590 goto error;
5591 }
5592
5593 end = strtoul(next, &next, 10);
5594 if (end <= start)
5595 goto error;
5596
5597 while (++start <= end) {
5598 if (start >= CPU_SUBSET_MAXCPUS)
5599 goto error;
5600 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5601 }
5602
5603 if (*next == ',')
5604 next += 1;
5605 else if (*next != '\0')
5606 goto error;
5607 }
5608
5609 return;
5610
5611error:
4e4e1e7c
LB		 5612 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5613 help();
1ef7d21a
LB		 5614 exit(-1);
5615}
5616
812db3f7 5617
103a8fea
LB		 5618void cmdline(int argc, char **argv)
5619{
5620 int opt;
d8af6f5f
LB		 5621 int option_index = 0;
5622 static struct option long_options[] = {
388e9c81 5623 {"add", required_argument, 0, 'a'},
1ef7d21a 5624 {"cpu", required_argument, 0, 'c'},
d8af6f5f 5625 {"Dump", no_argument, 0, 'D'},
96e47158 5626 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
3f44a5c6 5627 {"enable", required_argument, 0, 'e'},
d8af6f5f 5628 {"interval", required_argument, 0, 'i'},
023fe0ac 5629 {"num_iterations", required_argument, 0, 'n'},
d8af6f5f 5630 {"help", no_argument, 0, 'h'},
812db3f7 5631 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
d8af6f5f 5632 {"Joules", no_argument, 0, 'J'},
c8ade361 5633 {"list", no_argument, 0, 'l'},
b7d8c148 5634 {"out", required_argument, 0, 'o'},
96e47158 5635 {"quiet", no_argument, 0, 'q'},
812db3f7 5636 {"show", required_argument, 0, 's'},
d8af6f5f
LB		 5637 {"Summary", no_argument, 0, 'S'},
5638 {"TCC", required_argument, 0, 'T'},
5639 {"version", no_argument, 0, 'v' },
5640 {0, 0, 0, 0 }
5641 };
103a8fea
LB		 5642
5643 progname = argv[0];
5644
023fe0ac 5645 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
d8af6f5f 5646 long_options, &option_index)) != -1) {
103a8fea 5647 switch (opt) {
388e9c81
LB		 5648 case 'a':
5649 parse_add_command(optarg);
5650 break;
1ef7d21a
LB		 5651 case 'c':
5652 parse_cpu_command(optarg);
5653 break;
d8af6f5f 5654 case 'D':
3b4d5c7f
AS		 5655 dump_only++;
5656 break;
3f44a5c6
LB		 5657 case 'e':
5658 /* --enable specified counter */
4c2122d4 5659 bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
3f44a5c6 5660 break;
d8af6f5f
LB		 5661 case 'd':
5662 debug++;
3f44a5c6 5663 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
103a8fea 5664 break;
812db3f7 5665 case 'H':
3f44a5c6
LB		 5666 /*
5667 * --hide: do not show those specified
5668 * multiple invocations simply clear more bits in enabled mask
5669 */
5670 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
812db3f7 5671 break;
d8af6f5f
LB		 5672 case 'h':
5673 default:
5674 help();
5675 exit(1);
103a8fea 5676 case 'i':
2a0609c0
LB		 5677 {
5678 double interval = strtod(optarg, NULL);
5679
5680 if (interval < 0.001) {
b7d8c148 5681 fprintf(outf, "interval %f seconds is too small\n",
2a0609c0
LB		 5682 interval);
5683 exit(2);
5684 }
5685
47936f94 5686 interval_tv.tv_sec = interval_ts.tv_sec = interval;
b9ad8ee0 5687 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
47936f94 5688 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
2a0609c0 5689 }
103a8fea 5690 break;
d8af6f5f
LB		 5691 case 'J':
5692 rapl_joules++;
8e180f3c 5693 break;
c8ade361 5694 case 'l':
3f44a5c6 5695 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
c8ade361
LB		 5696 list_header_only++;
5697 quiet++;
5698 break;
b7d8c148
LB		 5699 case 'o':
5700 outf = fopen_or_die(optarg, "w");
5701 break;
96e47158
LB		 5702 case 'q':
5703 quiet = 1;
5704 break;
023fe0ac
CY		 5705 case 'n':
5706 num_iterations = strtod(optarg, NULL);
5707
5708 if (num_iterations <= 0) {
5709 fprintf(outf, "iterations %d should be positive number\n",
5710 num_iterations);
5711 exit(2);
5712 }
5713 break;
812db3f7 5714 case 's':
3f44a5c6
LB		 5715 /*
5716 * --show: show only those specified
5717 * The 1st invocation will clear and replace the enabled mask
5718 * subsequent invocations can add to it.
5719 */
5720 if (shown == 0)
5721 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5722 else
5723 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5724 shown = 1;
812db3f7 5725 break;
d8af6f5f
LB		 5726 case 'S':
5727 summary_only++;
889facbe
LB		 5728 break;
5729 case 'T':
5730 tcc_activation_temp_override = atoi(optarg);
5731 break;
d8af6f5f
LB		 5732 case 'v':
5733 print_version();
5734 exit(0);
5c56be9a 5735 break;
103a8fea
LB		 5736 }
5737 }
5738}
5739
5740int main(int argc, char **argv)
5741{
b7d8c148 5742 outf = stderr;
103a8fea
LB		 5743 cmdline(argc, argv);
5744
96e47158 5745 if (!quiet)
d8af6f5f 5746 print_version();
103a8fea 5747
41618e63
LB		 5748 probe_sysfs();
5749
103a8fea
LB		 5750 turbostat_init();
5751
3b4d5c7f
AS		 5752 /* dump counters and exit */
5753 if (dump_only)
5754 return get_and_dump_counters();
5755
c8ade361
LB		 5756 /* list header and exit */
5757 if (list_header_only) {
5758 print_header(",");
5759 flush_output_stdout();
5760 return 0;
5761 }
5762
103a8fea
LB		 5763 /*
5764 * if any params left, it must be a command to fork
5765 */
5766 if (argc - optind)
5767 return fork_it(argv + optind);
5768 else
5769 turbostat_loop();
5770
5771 return 0;
5772}
Linux 6.x block layer and io_uring tree(s)