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tools/power turbostat: Add Icelake support
[linux-block.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
34041551 3 * on modern Intel and AMD processors.
103a8fea 4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
869ce69e 24#include INTEL_FAMILY_HEADER
95aebc44 25#include <stdarg.h>
103a8fea 26#include <stdio.h>
b2c95d90 27#include <err.h>
103a8fea
LB		 28#include <unistd.h>
29#include <sys/types.h>
30#include <sys/wait.h>
31#include <sys/stat.h>
b9ad8ee0 32#include <sys/select.h>
103a8fea
LB		 33#include <sys/resource.h>
34#include <fcntl.h>
35#include <signal.h>
36#include <sys/time.h>
37#include <stdlib.h>
d8af6f5f 38#include <getopt.h>
103a8fea
LB		 39#include <dirent.h>
40#include <string.h>
41#include <ctype.h>
88c3281f 42#include <sched.h>
2a0609c0 43#include <time.h>
2b92865e 44#include <cpuid.h>
98481e79
LB		 45#include <linux/capability.h>
46#include <errno.h>
103a8fea 47
103a8fea 48char *proc_stat = "/proc/stat";
b7d8c148 49FILE *outf;
36229897 50int *fd_percpu;
b9ad8ee0 51struct timeval interval_tv = {5, 0};
47936f94 52struct timespec interval_ts = {5, 0};
b9ad8ee0 53struct timespec one_msec = {0, 1000000};
023fe0ac 54unsigned int num_iterations;
d8af6f5f 55unsigned int debug;
96e47158 56unsigned int quiet;
3f44a5c6 57unsigned int shown;
0de6c0df 58unsigned int sums_need_wide_columns;
d8af6f5f
LB		 59unsigned int rapl_joules;
60unsigned int summary_only;
c8ade361 61unsigned int list_header_only;
d8af6f5f 62unsigned int dump_only;
103a8fea 63unsigned int do_snb_cstates;
fb5d4327 64unsigned int do_knl_cstates;
144b44b1
LB		 65unsigned int do_slm_cstates;
66unsigned int use_c1_residency_msr;
103a8fea 67unsigned int has_aperf;
889facbe 68unsigned int has_epb;
5a63426e
LB		 69unsigned int do_irtl_snb;
70unsigned int do_irtl_hsw;
fc04cc67 71unsigned int units = 1000000; /* MHz etc */
103a8fea 72unsigned int genuine_intel;
34041551
LB		 73unsigned int authentic_amd;
74unsigned int max_level, max_extended_level;
103a8fea 75unsigned int has_invariant_tsc;
d7899447 76unsigned int do_nhm_platform_info;
cf4cbe53 77unsigned int no_MSR_MISC_PWR_MGMT;
b2b34dfe 78unsigned int aperf_mperf_multiplier = 1;
103a8fea 79double bclk;
a2b7b749 80double base_hz;
21ed5574 81unsigned int has_base_hz;
a2b7b749 82double tsc_tweak = 1.0;
c98d5d94
LB		 83unsigned int show_pkg_only;
84unsigned int show_core_only;
85char *output_buffer, *outp;
889facbe
LB		 86unsigned int do_rapl;
87unsigned int do_dts;
88unsigned int do_ptm;
fdf676e5 89unsigned long long gfx_cur_rc6_ms;
be0e54c4
LB		 90unsigned long long cpuidle_cur_cpu_lpi_us;
91unsigned long long cpuidle_cur_sys_lpi_us;
27d47356 92unsigned int gfx_cur_mhz;
889facbe
LB		 93unsigned int tcc_activation_temp;
94unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 95double rapl_power_units, rapl_time_units;
96double rapl_dram_energy_units, rapl_energy_units;
889facbe 97double rapl_joule_counter_range;
3a9a941d 98unsigned int do_core_perf_limit_reasons;
ac980e13 99unsigned int has_automatic_cstate_conversion;
3a9a941d
LB		 100unsigned int do_gfx_perf_limit_reasons;
101unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 102unsigned int crystal_hz;
103unsigned long long tsc_hz;
7ce7d5de 104int base_cpu;
21ed5574 105double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 106unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
107 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
108unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
109unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
110unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
111unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
33148d67 112unsigned int has_misc_feature_control;
4c2122d4 113unsigned int first_counter_read = 1;
889facbe 114
e6f9bb3c
LB		 115#define RAPL_PKG (1 << 0)
116 /* 0x610 MSR_PKG_POWER_LIMIT */
117 /* 0x611 MSR_PKG_ENERGY_STATUS */
118#define RAPL_PKG_PERF_STATUS (1 << 1)
119 /* 0x613 MSR_PKG_PERF_STATUS */
120#define RAPL_PKG_POWER_INFO (1 << 2)
121 /* 0x614 MSR_PKG_POWER_INFO */
122
123#define RAPL_DRAM (1 << 3)
124 /* 0x618 MSR_DRAM_POWER_LIMIT */
125 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 126#define RAPL_DRAM_PERF_STATUS (1 << 4)
127 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 128#define RAPL_DRAM_POWER_INFO (1 << 5)
129 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 130
9148494c 131#define RAPL_CORES_POWER_LIMIT (1 << 6)
e6f9bb3c 132 /* 0x638 MSR_PP0_POWER_LIMIT */
0b2bb692 133#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 134 /* 0x63a MSR_PP0_POLICY */
135
0b2bb692 136#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 137 /* 0x640 MSR_PP1_POWER_LIMIT */
138 /* 0x641 MSR_PP1_ENERGY_STATUS */
139 /* 0x642 MSR_PP1_POLICY */
9148494c
JP		 140
141#define RAPL_CORES_ENERGY_STATUS (1 << 9)
142 /* 0x639 MSR_PP0_ENERGY_STATUS */
143#define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
889facbe
LB		 144#define TJMAX_DEFAULT 100
145
146#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea 147
388e9c81
LB		 148/*
149 * buffer size used by sscanf() for added column names
150 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
151 */
152#define NAME_BYTES 20
495c7654 153#define PATH_BYTES 128
388e9c81 154
103a8fea
LB		 155int backwards_count;
156char *progname;
103a8fea 157
1ef7d21a
LB		 158#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
159cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
160size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
0748eaf0
LB		 161#define MAX_ADDED_COUNTERS 8
162#define MAX_ADDED_THREAD_COUNTERS 24
0e2d8f05 163#define BITMASK_SIZE 32
c98d5d94
LB		 164
165struct thread_data {
f4fdf2b4
LB		 166 struct timeval tv_begin;
167 struct timeval tv_end;
c98d5d94
LB		 168 unsigned long long tsc;
169 unsigned long long aperf;
170 unsigned long long mperf;
144b44b1 171 unsigned long long c1;
0de6c0df 172 unsigned long long irq_count;
1ed51011 173 unsigned int smi_count;
c98d5d94 174 unsigned int cpu_id;
4c2122d4
LB		 175 unsigned int apic_id;
176 unsigned int x2apic_id;
c98d5d94
LB		 177 unsigned int flags;
178#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
179#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
0748eaf0 180 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
c98d5d94
LB		 181} *thread_even, *thread_odd;
182
183struct core_data {
184 unsigned long long c3;
185 unsigned long long c6;
186 unsigned long long c7;
0539ba11 187 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
889facbe 188 unsigned int core_temp_c;
c98d5d94 189 unsigned int core_id;
678a3bd1 190 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 191} *core_even, *core_odd;
192
193struct pkg_data {
194 unsigned long long pc2;
195 unsigned long long pc3;
196 unsigned long long pc6;
197 unsigned long long pc7;
ca58710f
KCA		 198 unsigned long long pc8;
199 unsigned long long pc9;
200 unsigned long long pc10;
be0e54c4
LB		 201 unsigned long long cpu_lpi;
202 unsigned long long sys_lpi;
0b2bb692
LB		 203 unsigned long long pkg_wtd_core_c0;
204 unsigned long long pkg_any_core_c0;
205 unsigned long long pkg_any_gfxe_c0;
206 unsigned long long pkg_both_core_gfxe_c0;
9185e988 207 long long gfx_rc6_ms;
27d47356 208 unsigned int gfx_mhz;
c98d5d94 209 unsigned int package_id;
889facbe
LB		 210 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
211 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
212 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
213 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
214 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
215 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
216 unsigned int pkg_temp_c;
678a3bd1 217 unsigned long long counter[MAX_ADDED_COUNTERS];
c98d5d94
LB		 218} *package_even, *package_odd;
219
220#define ODD_COUNTERS thread_odd, core_odd, package_odd
221#define EVEN_COUNTERS thread_even, core_even, package_even
222
40f5cfe7
PB		 223#define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
224 ((thread_base) + \
225 ((pkg_no) * \
226 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
227 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
228 ((core_no) * topo.threads_per_core) + \
229 (thread_no))
230
231#define GET_CORE(core_base, core_no, node_no, pkg_no) \
232 ((core_base) + \
233 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
234 ((node_no) * topo.cores_per_node) + \
235 (core_no))
236
237
c98d5d94
LB		 238#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
239
388e9c81 240enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
41618e63 241enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
388e9c81
LB		 242enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
243
244struct msr_counter {
245 unsigned int msr_num;
246 char name[NAME_BYTES];
495c7654 247 char path[PATH_BYTES];
388e9c81
LB		 248 unsigned int width;
249 enum counter_type type;
250 enum counter_format format;
251 struct msr_counter *next;
812db3f7
LB		 252 unsigned int flags;
253#define FLAGS_HIDE (1 << 0)
254#define FLAGS_SHOW (1 << 1)
41618e63 255#define SYSFS_PERCPU (1 << 1)
388e9c81
LB		 256};
257
258struct sys_counters {
678a3bd1
LB		 259 unsigned int added_thread_counters;
260 unsigned int added_core_counters;
261 unsigned int added_package_counters;
388e9c81
LB		 262 struct msr_counter *tp;
263 struct msr_counter *cp;
264 struct msr_counter *pp;
265} sys;
266
c98d5d94
LB		 267struct system_summary {
268 struct thread_data threads;
269 struct core_data cores;
270 struct pkg_data packages;
388e9c81 271} average;
c98d5d94 272
0e2d8f05
LB		 273struct cpu_topology {
274 int physical_package_id;
275 int logical_cpu_id;
ef605741
PB		 276 int physical_node_id;
277 int logical_node_id; /* 0-based count within the package */
0e2d8f05 278 int physical_core_id;
8cb48b32 279 int thread_id;
0e2d8f05
LB		 280 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
281} *cpus;
c98d5d94
LB		 282
283struct topo_params {
284 int num_packages;
285 int num_cpus;
286 int num_cores;
287 int max_cpu_num;
ef605741 288 int max_node_num;
70a9c6e8
PB		 289 int nodes_per_pkg;
290 int cores_per_node;
291 int threads_per_core;
c98d5d94
LB		 292} topo;
293
294struct timeval tv_even, tv_odd, tv_delta;
295
562a2d37
LB		 296int *irq_column_2_cpu; /* /proc/interrupts column numbers */
297int *irqs_per_cpu; /* indexed by cpu_num */
298
c98d5d94
LB		 299void setup_all_buffers(void);
300
301int cpu_is_not_present(int cpu)
d15cf7c1 302{
c98d5d94 303 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 304}
88c3281f 305/*
c98d5d94
LB		 306 * run func(thread, core, package) in topology order
307 * skip non-present cpus
88c3281f 308 */
c98d5d94
LB		 309
310int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
311 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 312{
40f5cfe7 313 int retval, pkg_no, core_no, thread_no, node_no;
d15cf7c1 314
c98d5d94 315 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
df2f677d
LB		 316 for (node_no = 0; node_no < topo.nodes_per_pkg; node_no++) {
317 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
40f5cfe7
PB		 318 for (thread_no = 0; thread_no <
319 topo.threads_per_core; ++thread_no) {
320 struct thread_data *t;
321 struct core_data *c;
322 struct pkg_data *p;
323
324 t = GET_THREAD(thread_base, thread_no,
325 core_no, node_no,
326 pkg_no);
327
328 if (cpu_is_not_present(t->cpu_id))
329 continue;
330
331 c = GET_CORE(core_base, core_no,
332 node_no, pkg_no);
333 p = GET_PKG(pkg_base, pkg_no);
334
335 retval = func(t, c, p);
336 if (retval)
337 return retval;
338 }
c98d5d94
LB		 339 }
340 }
341 }
342 return 0;
88c3281f
LB		 343}
344
345int cpu_migrate(int cpu)
346{
c98d5d94
LB		 347 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
348 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
349 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 350 return -1;
351 else
352 return 0;
353}
36229897 354int get_msr_fd(int cpu)
103a8fea 355{
103a8fea
LB		 356 char pathname[32];
357 int fd;
358
36229897
LB		 359 fd = fd_percpu[cpu];
360
361 if (fd)
362 return fd;
363
103a8fea
LB		 364 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
365 fd = open(pathname, O_RDONLY);
15aaa346 366 if (fd < 0)
98481e79 367 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 368
36229897
LB		 369 fd_percpu[cpu] = fd;
370
371 return fd;
372}
373
374int get_msr(int cpu, off_t offset, unsigned long long *msr)
375{
376 ssize_t retval;
377
378 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
15aaa346 379
98481e79 380 if (retval != sizeof *msr)
cf4cbe53 381 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
15aaa346
LB		 382
383 return 0;
103a8fea
LB		 384}
385
fc04cc67 386/*
bdd5ae3a
LB		 387 * This list matches the column headers, except
388 * 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
389 * 2. Core and CPU are moved to the end, we can't have strings that contain them
390 * matching on them for --show and --hide.
fc04cc67 391 */
812db3f7 392struct msr_counter bic[] = {
3f44a5c6
LB		 393 { 0x0, "usec" },
394 { 0x0, "Time_Of_Day_Seconds" },
812db3f7 395 { 0x0, "Package" },
bdd5ae3a 396 { 0x0, "Node" },
812db3f7 397 { 0x0, "Avg_MHz" },
bdd5ae3a 398 { 0x0, "Busy%" },
812db3f7
LB		 399 { 0x0, "Bzy_MHz" },
400 { 0x0, "TSC_MHz" },
401 { 0x0, "IRQ" },
495c7654 402 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
bdd5ae3a 403 { 0x0, "sysfs" },
812db3f7
LB		 404 { 0x0, "CPU%c1" },
405 { 0x0, "CPU%c3" },
406 { 0x0, "CPU%c6" },
407 { 0x0, "CPU%c7" },
408 { 0x0, "ThreadC" },
409 { 0x0, "CoreTmp" },
410 { 0x0, "CoreCnt" },
411 { 0x0, "PkgTmp" },
412 { 0x0, "GFX%rc6" },
413 { 0x0, "GFXMHz" },
414 { 0x0, "Pkg%pc2" },
415 { 0x0, "Pkg%pc3" },
416 { 0x0, "Pkg%pc6" },
417 { 0x0, "Pkg%pc7" },
0f47c08d
LB		 418 { 0x0, "Pkg%pc8" },
419 { 0x0, "Pkg%pc9" },
4bd1f8f2 420 { 0x0, "Pk%pc10" },
be0e54c4
LB		 421 { 0x0, "CPU%LPI" },
422 { 0x0, "SYS%LPI" },
812db3f7
LB		 423 { 0x0, "PkgWatt" },
424 { 0x0, "CorWatt" },
425 { 0x0, "GFXWatt" },
426 { 0x0, "PkgCnt" },
427 { 0x0, "RAMWatt" },
428 { 0x0, "PKG_%" },
429 { 0x0, "RAM_%" },
430 { 0x0, "Pkg_J" },
431 { 0x0, "Cor_J" },
432 { 0x0, "GFX_J" },
433 { 0x0, "RAM_J" },
0539ba11 434 { 0x0, "Mod%c6" },
a99d8730
LB		 435 { 0x0, "Totl%C0" },
436 { 0x0, "Any%C0" },
437 { 0x0, "GFX%C0" },
438 { 0x0, "CPUGFX%" },
bdd5ae3a
LB		 439 { 0x0, "Core" },
440 { 0x0, "CPU" },
4c2122d4
LB		 441 { 0x0, "APIC" },
442 { 0x0, "X2APIC" },
812db3f7
LB		 443};
444
445#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
3f44a5c6
LB		 446#define BIC_USEC (1ULL << 0)
447#define BIC_TOD (1ULL << 1)
448#define BIC_Package (1ULL << 2)
bdd5ae3a
LB		 449#define BIC_Node (1ULL << 3)
450#define BIC_Avg_MHz (1ULL << 4)
451#define BIC_Busy (1ULL << 5)
452#define BIC_Bzy_MHz (1ULL << 6)
453#define BIC_TSC_MHz (1ULL << 7)
454#define BIC_IRQ (1ULL << 8)
455#define BIC_SMI (1ULL << 9)
456#define BIC_sysfs (1ULL << 10)
457#define BIC_CPU_c1 (1ULL << 11)
458#define BIC_CPU_c3 (1ULL << 12)
459#define BIC_CPU_c6 (1ULL << 13)
460#define BIC_CPU_c7 (1ULL << 14)
461#define BIC_ThreadC (1ULL << 15)
462#define BIC_CoreTmp (1ULL << 16)
463#define BIC_CoreCnt (1ULL << 17)
464#define BIC_PkgTmp (1ULL << 18)
465#define BIC_GFX_rc6 (1ULL << 19)
466#define BIC_GFXMHz (1ULL << 20)
467#define BIC_Pkgpc2 (1ULL << 21)
468#define BIC_Pkgpc3 (1ULL << 22)
469#define BIC_Pkgpc6 (1ULL << 23)
470#define BIC_Pkgpc7 (1ULL << 24)
471#define BIC_Pkgpc8 (1ULL << 25)
472#define BIC_Pkgpc9 (1ULL << 26)
473#define BIC_Pkgpc10 (1ULL << 27)
474#define BIC_CPU_LPI (1ULL << 28)
475#define BIC_SYS_LPI (1ULL << 29)
476#define BIC_PkgWatt (1ULL << 30)
477#define BIC_CorWatt (1ULL << 31)
478#define BIC_GFXWatt (1ULL << 32)
479#define BIC_PkgCnt (1ULL << 33)
480#define BIC_RAMWatt (1ULL << 34)
481#define BIC_PKG__ (1ULL << 35)
482#define BIC_RAM__ (1ULL << 36)
483#define BIC_Pkg_J (1ULL << 37)
484#define BIC_Cor_J (1ULL << 38)
485#define BIC_GFX_J (1ULL << 39)
486#define BIC_RAM_J (1ULL << 40)
487#define BIC_Mod_c6 (1ULL << 41)
488#define BIC_Totl_c0 (1ULL << 42)
489#define BIC_Any_c0 (1ULL << 43)
490#define BIC_GFX_c0 (1ULL << 44)
491#define BIC_CPUGFX (1ULL << 45)
492#define BIC_Core (1ULL << 46)
493#define BIC_CPU (1ULL << 47)
4c2122d4
LB		 494#define BIC_APIC (1ULL << 48)
495#define BIC_X2APIC (1ULL << 49)
3f44a5c6 496
4c2122d4 497#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
3f44a5c6
LB		 498
499unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
4c2122d4 500unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
812db3f7
LB		 501
502#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
3f44a5c6 503#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
812db3f7 504#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
0f47c08d 505#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
812db3f7 506
3f44a5c6 507
dd778a5e
LB		 508#define MAX_DEFERRED 16
509char *deferred_skip_names[MAX_DEFERRED];
510int deferred_skip_index;
511
512/*
513 * HIDE_LIST - hide this list of counters, show the rest [default]
514 * SHOW_LIST - show this list of counters, hide the rest
515 */
516enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
517
518void help(void)
519{
520 fprintf(outf,
521 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
522 "\n"
523 "Turbostat forks the specified COMMAND and prints statistics\n"
524 "when COMMAND completes.\n"
525 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
526 "to print statistics, until interrupted.\n"
cc481650
NC		 527 " -a, --add add a counter\n"
528 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
529 " -c, --cpu cpu-set limit output to summary plus cpu-set:\n"
530 " {core | package | j,k,l..m,n-p }\n"
9ce80578
NC		 531 " -d, --debug displays usec, Time_Of_Day_Seconds and more debugging\n"
532 " -D, --Dump displays the raw counter values\n"
533 " -e, --enable [all | column]\n"
534 " shows all or the specified disabled column\n"
535 " -H, --hide [column|column,column,...]\n"
536 " hide the specified column(s)\n"
cc481650
NC		 537 " -i, --interval sec.subsec\n"
538 " Override default 5-second measurement interval\n"
9ce80578 539 " -J, --Joules displays energy in Joules instead of Watts\n"
cc481650
NC		 540 " -l, --list list column headers only\n"
541 " -n, --num_iterations num\n"
542 " number of the measurement iterations\n"
543 " -o, --out file\n"
544 " create or truncate \"file\" for all output\n"
545 " -q, --quiet skip decoding system configuration header\n"
9ce80578
NC		 546 " -s, --show [column|column,column,...]\n"
547 " show only the specified column(s)\n"
548 " -S, --Summary\n"
549 " limits output to 1-line system summary per interval\n"
550 " -T, --TCC temperature\n"
551 " sets the Thermal Control Circuit temperature in\n"
552 " degrees Celsius\n"
cc481650
NC		 553 " -h, --help print this help message\n"
554 " -v, --version print version information\n"
dd778a5e
LB		 555 "\n"
556 "For more help, run \"man turbostat\"\n");
557}
558
812db3f7
LB		 559/*
560 * bic_lookup
561 * for all the strings in comma separate name_list,
562 * set the approprate bit in return value.
563 */
dd778a5e 564unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
812db3f7
LB		 565{
566 int i;
567 unsigned long long retval = 0;
568
569 while (name_list) {
570 char *comma;
571
572 comma = strchr(name_list, ',');
573
574 if (comma)
575 *comma = '\0';
576
3f44a5c6
LB		 577 if (!strcmp(name_list, "all"))
578 return ~0;
579
812db3f7
LB		 580 for (i = 0; i < MAX_BIC; ++i) {
581 if (!strcmp(name_list, bic[i].name)) {
582 retval |= (1ULL << i);
583 break;
584 }
585 }
586 if (i == MAX_BIC) {
dd778a5e
LB		 587 if (mode == SHOW_LIST) {
588 fprintf(stderr, "Invalid counter name: %s\n", name_list);
589 exit(-1);
590 }
591 deferred_skip_names[deferred_skip_index++] = name_list;
592 if (debug)
593 fprintf(stderr, "deferred \"%s\"\n", name_list);
594 if (deferred_skip_index >= MAX_DEFERRED) {
595 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
596 MAX_DEFERRED, name_list);
597 help();
598 exit(1);
599 }
812db3f7
LB		 600 }
601
602 name_list = comma;
603 if (name_list)
604 name_list++;
605
606 }
607 return retval;
608}
fc04cc67 609
dd778a5e 610
c8ade361 611void print_header(char *delim)
103a8fea 612{
388e9c81 613 struct msr_counter *mp;
6168c2e0 614 int printed = 0;
388e9c81 615
3f44a5c6
LB		 616 if (DO_BIC(BIC_USEC))
617 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
618 if (DO_BIC(BIC_TOD))
619 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
812db3f7 620 if (DO_BIC(BIC_Package))
6168c2e0 621 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
01235041
PB		 622 if (DO_BIC(BIC_Node))
623 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
812db3f7 624 if (DO_BIC(BIC_Core))
6168c2e0 625 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
812db3f7 626 if (DO_BIC(BIC_CPU))
6168c2e0 627 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
4c2122d4
LB		 628 if (DO_BIC(BIC_APIC))
629 outp += sprintf(outp, "%sAPIC", (printed++ ? delim : ""));
630 if (DO_BIC(BIC_X2APIC))
631 outp += sprintf(outp, "%sX2APIC", (printed++ ? delim : ""));
812db3f7 632 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 633 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
812db3f7 634 if (DO_BIC(BIC_Busy))
6168c2e0 635 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
812db3f7 636 if (DO_BIC(BIC_Bzy_MHz))
6168c2e0 637 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
812db3f7 638 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 639 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
1cc21f7b 640
0de6c0df
LB		 641 if (DO_BIC(BIC_IRQ)) {
642 if (sums_need_wide_columns)
6168c2e0 643 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
0de6c0df 644 else
6168c2e0 645 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
0de6c0df
LB		 646 }
647
812db3f7 648 if (DO_BIC(BIC_SMI))
6168c2e0 649 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
1cc21f7b 650
388e9c81 651 for (mp = sys.tp; mp; mp = mp->next) {
dd778a5e 652
388e9c81
LB		 653 if (mp->format == FORMAT_RAW) {
654 if (mp->width == 64)
dd778a5e 655 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
388e9c81 656 else
dd778a5e 657 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
388e9c81 658 } else {
0de6c0df 659 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
dd778a5e 660 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
0de6c0df 661 else
dd778a5e 662 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
388e9c81
LB		 663 }
664 }
665
41618e63 666 if (DO_BIC(BIC_CPU_c1))
6168c2e0 667 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
562855ee 668 if (DO_BIC(BIC_CPU_c3))
6168c2e0 669 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
812db3f7 670 if (DO_BIC(BIC_CPU_c6))
6168c2e0 671 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
812db3f7 672 if (DO_BIC(BIC_CPU_c7))
6168c2e0 673 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
678a3bd1 674
0539ba11 675 if (DO_BIC(BIC_Mod_c6))
6168c2e0 676 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
678a3bd1 677
812db3f7 678 if (DO_BIC(BIC_CoreTmp))
6168c2e0 679 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
388e9c81
LB		 680
681 for (mp = sys.cp; mp; mp = mp->next) {
682 if (mp->format == FORMAT_RAW) {
683 if (mp->width == 64)
c8ade361 684 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 685 else
c8ade361 686 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 687 } else {
0de6c0df
LB		 688 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
689 outp += sprintf(outp, "%s%8s", delim, mp->name);
690 else
691 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 692 }
693 }
694
812db3f7 695 if (DO_BIC(BIC_PkgTmp))
6168c2e0 696 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
889facbe 697
812db3f7 698 if (DO_BIC(BIC_GFX_rc6))
6168c2e0 699 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
fdf676e5 700
812db3f7 701 if (DO_BIC(BIC_GFXMHz))
6168c2e0 702 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
27d47356 703
a99d8730 704 if (DO_BIC(BIC_Totl_c0))
6168c2e0 705 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
a99d8730 706 if (DO_BIC(BIC_Any_c0))
6168c2e0 707 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
a99d8730 708 if (DO_BIC(BIC_GFX_c0))
6168c2e0 709 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
a99d8730 710 if (DO_BIC(BIC_CPUGFX))
6168c2e0 711 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
0b2bb692 712
0f47c08d 713 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 714 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
0f47c08d 715 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 716 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
0f47c08d 717 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 718 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
0f47c08d 719 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 720 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
0f47c08d 721 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 722 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
0f47c08d 723 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 724 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
0f47c08d 725 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 726 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
be0e54c4
LB		 727 if (DO_BIC(BIC_CPU_LPI))
728 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
729 if (DO_BIC(BIC_SYS_LPI))
730 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
103a8fea 731
5c56be9a 732 if (do_rapl && !rapl_joules) {
812db3f7 733 if (DO_BIC(BIC_PkgWatt))
6168c2e0 734 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
812db3f7 735 if (DO_BIC(BIC_CorWatt))
6168c2e0 736 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
812db3f7 737 if (DO_BIC(BIC_GFXWatt))
6168c2e0 738 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
812db3f7 739 if (DO_BIC(BIC_RAMWatt))
6168c2e0 740 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
812db3f7 741 if (DO_BIC(BIC_PKG__))
6168c2e0 742 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 743 if (DO_BIC(BIC_RAM__))
6168c2e0 744 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
d7899447 745 } else if (do_rapl && rapl_joules) {
812db3f7 746 if (DO_BIC(BIC_Pkg_J))
6168c2e0 747 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
812db3f7 748 if (DO_BIC(BIC_Cor_J))
6168c2e0 749 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
812db3f7 750 if (DO_BIC(BIC_GFX_J))
6168c2e0 751 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
812db3f7 752 if (DO_BIC(BIC_RAM_J))
6168c2e0 753 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
812db3f7 754 if (DO_BIC(BIC_PKG__))
6168c2e0 755 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
812db3f7 756 if (DO_BIC(BIC_RAM__))
6168c2e0 757 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
5c56be9a 758 }
388e9c81
LB		 759 for (mp = sys.pp; mp; mp = mp->next) {
760 if (mp->format == FORMAT_RAW) {
761 if (mp->width == 64)
c8ade361 762 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
388e9c81 763 else
c8ade361 764 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
388e9c81 765 } else {
0de6c0df
LB		 766 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
767 outp += sprintf(outp, "%s%8s", delim, mp->name);
768 else
769 outp += sprintf(outp, "%s%s", delim, mp->name);
388e9c81
LB		 770 }
771 }
772
c98d5d94 773 outp += sprintf(outp, "\n");
103a8fea
LB		 774}
775
c98d5d94
LB		 776int dump_counters(struct thread_data *t, struct core_data *c,
777 struct pkg_data *p)
103a8fea 778{
388e9c81
LB		 779 int i;
780 struct msr_counter *mp;
781
3b4d5c7f 782 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 783
784 if (t) {
3b4d5c7f
AS		 785 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
786 t->cpu_id, t->flags);
787 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
788 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
789 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
790 outp += sprintf(outp, "c1: %016llX\n", t->c1);
6886fee4 791
812db3f7 792 if (DO_BIC(BIC_IRQ))
0de6c0df 793 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
812db3f7 794 if (DO_BIC(BIC_SMI))
218f0e8d 795 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
388e9c81
LB		 796
797 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
798 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
799 i, mp->msr_num, t->counter[i]);
800 }
c98d5d94 801 }
103a8fea 802
c98d5d94 803 if (c) {
3b4d5c7f
AS		 804 outp += sprintf(outp, "core: %d\n", c->core_id);
805 outp += sprintf(outp, "c3: %016llX\n", c->c3);
806 outp += sprintf(outp, "c6: %016llX\n", c->c6);
807 outp += sprintf(outp, "c7: %016llX\n", c->c7);
808 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
388e9c81
LB		 809
810 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
811 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
812 i, mp->msr_num, c->counter[i]);
813 }
0539ba11 814 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
c98d5d94 815 }
103a8fea 816
c98d5d94 817 if (p) {
3b4d5c7f 818 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 819
820 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
821 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
822 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
823 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
824
3b4d5c7f 825 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
0f47c08d 826 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 827 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
0f47c08d 828 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 829 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
0f47c08d 830 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 831 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 832 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
833 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
834 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
be0e54c4
LB		 835 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
836 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
837 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
3b4d5c7f
AS		 838 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
839 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
840 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
841 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
842 outp += sprintf(outp, "Throttle PKG: %0X\n",
843 p->rapl_pkg_perf_status);
844 outp += sprintf(outp, "Throttle RAM: %0X\n",
845 p->rapl_dram_perf_status);
846 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
388e9c81
LB		 847
848 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
849 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
850 i, mp->msr_num, p->counter[i]);
851 }
c98d5d94 852 }
3b4d5c7f
AS		 853
854 outp += sprintf(outp, "\n");
855
c98d5d94 856 return 0;
103a8fea
LB		 857}
858
e23da037
LB		 859/*
860 * column formatting convention & formats
e23da037 861 */
c98d5d94
LB		 862int format_counters(struct thread_data *t, struct core_data *c,
863 struct pkg_data *p)
103a8fea 864{
008d396e 865 double interval_float, tsc;
fc04cc67 866 char *fmt8;
388e9c81
LB		 867 int i;
868 struct msr_counter *mp;
6168c2e0
LB		 869 char *delim = "\t";
870 int printed = 0;
103a8fea 871
c98d5d94
LB		 872 /* if showing only 1st thread in core and this isn't one, bail out */
873 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
874 return 0;
875
876 /* if showing only 1st thread in pkg and this isn't one, bail out */
877 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
878 return 0;
879
1ef7d21a
LB		 880 /*if not summary line and --cpu is used */
881 if ((t != &average.threads) &&
882 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
883 return 0;
884
3f44a5c6 885 if (DO_BIC(BIC_USEC)) {
f4fdf2b4
LB		 886 /* on each row, print how many usec each timestamp took to gather */
887 struct timeval tv;
888
889 timersub(&t->tv_end, &t->tv_begin, &tv);
890 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
891 }
892
3f44a5c6
LB		 893 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
894 if (DO_BIC(BIC_TOD))
895 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
896
103a8fea
LB		 897 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
898
008d396e
LB		 899 tsc = t->tsc * tsc_tweak;
900
c98d5d94
LB		 901 /* topo columns, print blanks on 1st (average) line */
902 if (t == &average.threads) {
812db3f7 903 if (DO_BIC(BIC_Package))
6168c2e0 904 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
01235041
PB		 905 if (DO_BIC(BIC_Node))
906 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 907 if (DO_BIC(BIC_Core))
6168c2e0 908 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
812db3f7 909 if (DO_BIC(BIC_CPU))
6168c2e0 910 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
4c2122d4
LB		 911 if (DO_BIC(BIC_APIC))
912 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
913 if (DO_BIC(BIC_X2APIC))
914 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
103a8fea 915 } else {
812db3f7 916 if (DO_BIC(BIC_Package)) {
c98d5d94 917 if (p)
6168c2e0 918 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
c98d5d94 919 else
6168c2e0 920 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 921 }
01235041
PB		 922 if (DO_BIC(BIC_Node)) {
923 if (t)
924 outp += sprintf(outp, "%s%d",
925 (printed++ ? delim : ""),
926 cpus[t->cpu_id].physical_node_id);
927 else
928 outp += sprintf(outp, "%s-",
929 (printed++ ? delim : ""));
930 }
812db3f7 931 if (DO_BIC(BIC_Core)) {
c98d5d94 932 if (c)
6168c2e0 933 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
c98d5d94 934 else
6168c2e0 935 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
c98d5d94 936 }
812db3f7 937 if (DO_BIC(BIC_CPU))
6168c2e0 938 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
4c2122d4
LB		 939 if (DO_BIC(BIC_APIC))
940 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->apic_id);
941 if (DO_BIC(BIC_X2APIC))
942 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->x2apic_id);
103a8fea 943 }
fc04cc67 944
812db3f7 945 if (DO_BIC(BIC_Avg_MHz))
6168c2e0 946 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
fc04cc67
LB		 947 1.0 / units * t->aperf / interval_float);
948
812db3f7 949 if (DO_BIC(BIC_Busy))
6168c2e0 950 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
103a8fea 951
812db3f7 952 if (DO_BIC(BIC_Bzy_MHz)) {
21ed5574 953 if (has_base_hz)
6168c2e0 954 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
21ed5574 955 else
6168c2e0 956 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
008d396e 957 tsc / units * t->aperf / t->mperf / interval_float);
21ed5574 958 }
103a8fea 959
812db3f7 960 if (DO_BIC(BIC_TSC_MHz))
6168c2e0 961 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
103a8fea 962
562a2d37 963 /* IRQ */
0de6c0df
LB		 964 if (DO_BIC(BIC_IRQ)) {
965 if (sums_need_wide_columns)
6168c2e0 966 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 967 else
6168c2e0 968 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
0de6c0df 969 }
562a2d37 970
1cc21f7b 971 /* SMI */
812db3f7 972 if (DO_BIC(BIC_SMI))
6168c2e0 973 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
1cc21f7b 974
678a3bd1 975 /* Added counters */
388e9c81
LB		 976 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
977 if (mp->format == FORMAT_RAW) {
978 if (mp->width == 32)
5f3aea57 979 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
388e9c81 980 else
6168c2e0 981 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
388e9c81 982 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 983 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 984 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
0de6c0df 985 else
6168c2e0 986 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
388e9c81 987 } else if (mp->format == FORMAT_PERCENT) {
41618e63 988 if (mp->type == COUNTER_USEC)
6168c2e0 989 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
41618e63 990 else
6168c2e0 991 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
388e9c81
LB		 992 }
993 }
994
41618e63
LB		 995 /* C1 */
996 if (DO_BIC(BIC_CPU_c1))
6168c2e0 997 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
41618e63
LB		 998
999
678a3bd1
LB		 1000 /* print per-core data only for 1st thread in core */
1001 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1002 goto done;
1003
562855ee 1004 if (DO_BIC(BIC_CPU_c3))
6168c2e0 1005 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
812db3f7 1006 if (DO_BIC(BIC_CPU_c6))
6168c2e0 1007 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
812db3f7 1008 if (DO_BIC(BIC_CPU_c7))
6168c2e0 1009 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
678a3bd1 1010
0539ba11
LB		 1011 /* Mod%c6 */
1012 if (DO_BIC(BIC_Mod_c6))
6168c2e0 1013 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
0539ba11 1014
812db3f7 1015 if (DO_BIC(BIC_CoreTmp))
6168c2e0 1016 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
889facbe 1017
388e9c81
LB		 1018 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1019 if (mp->format == FORMAT_RAW) {
1020 if (mp->width == 32)
5f3aea57 1021 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
388e9c81 1022 else
6168c2e0 1023 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1024 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1025 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1026 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
0de6c0df 1027 else
6168c2e0 1028 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
388e9c81 1029 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1030 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
388e9c81
LB		 1031 }
1032 }
1033
c98d5d94
LB		 1034 /* print per-package data only for 1st core in package */
1035 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1036 goto done;
1037
0b2bb692 1038 /* PkgTmp */
812db3f7 1039 if (DO_BIC(BIC_PkgTmp))
6168c2e0 1040 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
889facbe 1041
fdf676e5 1042 /* GFXrc6 */
812db3f7 1043 if (DO_BIC(BIC_GFX_rc6)) {
ba3dec99 1044 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
6168c2e0 1045 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
9185e988 1046 } else {
6168c2e0 1047 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
9185e988
LB		 1048 p->gfx_rc6_ms / 10.0 / interval_float);
1049 }
1050 }
fdf676e5 1051
27d47356 1052 /* GFXMHz */
812db3f7 1053 if (DO_BIC(BIC_GFXMHz))
6168c2e0 1054 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
27d47356 1055
0b2bb692 1056 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
a99d8730 1057 if (DO_BIC(BIC_Totl_c0))
6168c2e0 1058 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
a99d8730 1059 if (DO_BIC(BIC_Any_c0))
6168c2e0 1060 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
a99d8730 1061 if (DO_BIC(BIC_GFX_c0))
6168c2e0 1062 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
a99d8730 1063 if (DO_BIC(BIC_CPUGFX))
6168c2e0 1064 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
0b2bb692 1065
0f47c08d 1066 if (DO_BIC(BIC_Pkgpc2))
6168c2e0 1067 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
0f47c08d 1068 if (DO_BIC(BIC_Pkgpc3))
6168c2e0 1069 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
0f47c08d 1070 if (DO_BIC(BIC_Pkgpc6))
6168c2e0 1071 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
0f47c08d 1072 if (DO_BIC(BIC_Pkgpc7))
6168c2e0 1073 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
0f47c08d 1074 if (DO_BIC(BIC_Pkgpc8))
6168c2e0 1075 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
0f47c08d 1076 if (DO_BIC(BIC_Pkgpc9))
6168c2e0 1077 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
0f47c08d 1078 if (DO_BIC(BIC_Pkgpc10))
6168c2e0 1079 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
889facbe 1080
be0e54c4
LB		 1081 if (DO_BIC(BIC_CPU_LPI))
1082 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1083 if (DO_BIC(BIC_SYS_LPI))
1084 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1085
889facbe
LB		 1086 /*
1087 * If measurement interval exceeds minimum RAPL Joule Counter range,
1088 * indicate that results are suspect by printing "**" in fraction place.
1089 */
fc04cc67 1090 if (interval_float < rapl_joule_counter_range)
6168c2e0 1091 fmt8 = "%s%.2f";
fc04cc67 1092 else
e975db5d 1093 fmt8 = "%6.0f**";
889facbe 1094
812db3f7 1095 if (DO_BIC(BIC_PkgWatt))
6168c2e0 1096 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
812db3f7 1097 if (DO_BIC(BIC_CorWatt))
6168c2e0 1098 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
812db3f7 1099 if (DO_BIC(BIC_GFXWatt))
6168c2e0 1100 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
812db3f7 1101 if (DO_BIC(BIC_RAMWatt))
6168c2e0 1102 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
812db3f7 1103 if (DO_BIC(BIC_Pkg_J))
6168c2e0 1104 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
812db3f7 1105 if (DO_BIC(BIC_Cor_J))
6168c2e0 1106 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
812db3f7 1107 if (DO_BIC(BIC_GFX_J))
6168c2e0 1108 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
812db3f7 1109 if (DO_BIC(BIC_RAM_J))
6168c2e0 1110 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
812db3f7 1111 if (DO_BIC(BIC_PKG__))
6168c2e0 1112 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
812db3f7 1113 if (DO_BIC(BIC_RAM__))
6168c2e0 1114 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
812db3f7 1115
388e9c81
LB		 1116 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1117 if (mp->format == FORMAT_RAW) {
1118 if (mp->width == 32)
5f3aea57 1119 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
388e9c81 1120 else
6168c2e0 1121 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1122 } else if (mp->format == FORMAT_DELTA) {
0de6c0df 1123 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
6168c2e0 1124 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
0de6c0df 1125 else
6168c2e0 1126 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
388e9c81 1127 } else if (mp->format == FORMAT_PERCENT) {
6168c2e0 1128 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
388e9c81
LB		 1129 }
1130 }
1131
c98d5d94 1132done:
94d6ab4b
LB		 1133 if (*(outp - 1) != '\n')
1134 outp += sprintf(outp, "\n");
c98d5d94
LB		 1135
1136 return 0;
103a8fea
LB		 1137}
1138
b7d8c148 1139void flush_output_stdout(void)
c98d5d94 1140{
b7d8c148
LB		 1141 FILE *filep;
1142
1143 if (outf == stderr)
1144 filep = stdout;
1145 else
1146 filep = outf;
1147
1148 fputs(output_buffer, filep);
1149 fflush(filep);
1150
c98d5d94
LB		 1151 outp = output_buffer;
1152}
b7d8c148 1153void flush_output_stderr(void)
c98d5d94 1154{
b7d8c148
LB		 1155 fputs(output_buffer, outf);
1156 fflush(outf);
c98d5d94
LB		 1157 outp = output_buffer;
1158}
1159void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 1160{
e23da037 1161 static int printed;
103a8fea 1162
e23da037 1163 if (!printed || !summary_only)
c8ade361 1164 print_header("\t");
103a8fea 1165
9d83601a 1166 format_counters(&average.threads, &average.cores, &average.packages);
103a8fea 1167
e23da037
LB		 1168 printed = 1;
1169
1170 if (summary_only)
1171 return;
1172
c98d5d94 1173 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 1174}
1175
889facbe
LB		 1176#define DELTA_WRAP32(new, old) \
1177 if (new > old) { \
1178 old = new - old; \
1179 } else { \
1180 old = 0x100000000 + new - old; \
1181 }
1182
ba3dec99 1183int
c98d5d94
LB		 1184delta_package(struct pkg_data *new, struct pkg_data *old)
1185{
388e9c81
LB		 1186 int i;
1187 struct msr_counter *mp;
0b2bb692 1188
a99d8730
LB		 1189
1190 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1191 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
a99d8730 1192 if (DO_BIC(BIC_Any_c0))
0b2bb692 1193 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
a99d8730 1194 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1195 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
a99d8730 1196 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1197 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
a99d8730 1198
c98d5d94 1199 old->pc2 = new->pc2 - old->pc2;
0f47c08d 1200 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1201 old->pc3 = new->pc3 - old->pc3;
0f47c08d 1202 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1203 old->pc6 = new->pc6 - old->pc6;
0f47c08d 1204 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1205 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 1206 old->pc8 = new->pc8 - old->pc8;
1207 old->pc9 = new->pc9 - old->pc9;
1208 old->pc10 = new->pc10 - old->pc10;
be0e54c4
LB		 1209 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1210 old->sys_lpi = new->sys_lpi - old->sys_lpi;
889facbe
LB		 1211 old->pkg_temp_c = new->pkg_temp_c;
1212
9185e988
LB		 1213 /* flag an error when rc6 counter resets/wraps */
1214 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1215 old->gfx_rc6_ms = -1;
1216 else
1217 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1218
27d47356
LB		 1219 old->gfx_mhz = new->gfx_mhz;
1220
889facbe
LB		 1221 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1222 DELTA_WRAP32(new->energy_cores, old->energy_cores);
1223 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1224 DELTA_WRAP32(new->energy_dram, old->energy_dram);
1225 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1226 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
ba3dec99 1227
388e9c81
LB		 1228 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1229 if (mp->format == FORMAT_RAW)
1230 old->counter[i] = new->counter[i];
1231 else
1232 old->counter[i] = new->counter[i] - old->counter[i];
1233 }
1234
ba3dec99 1235 return 0;
c98d5d94 1236}
103a8fea 1237
c98d5d94
LB		 1238void
1239delta_core(struct core_data *new, struct core_data *old)
103a8fea 1240{
388e9c81
LB		 1241 int i;
1242 struct msr_counter *mp;
1243
c98d5d94
LB		 1244 old->c3 = new->c3 - old->c3;
1245 old->c6 = new->c6 - old->c6;
1246 old->c7 = new->c7 - old->c7;
889facbe 1247 old->core_temp_c = new->core_temp_c;
0539ba11 1248 old->mc6_us = new->mc6_us - old->mc6_us;
388e9c81
LB		 1249
1250 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1251 if (mp->format == FORMAT_RAW)
1252 old->counter[i] = new->counter[i];
1253 else
1254 old->counter[i] = new->counter[i] - old->counter[i];
1255 }
c98d5d94 1256}
103a8fea 1257
c3ae331d
LB		 1258/*
1259 * old = new - old
1260 */
ba3dec99 1261int
c98d5d94
LB		 1262delta_thread(struct thread_data *new, struct thread_data *old,
1263 struct core_data *core_delta)
1264{
388e9c81
LB		 1265 int i;
1266 struct msr_counter *mp;
1267
4c2122d4
LB		 1268 /* we run cpuid just the 1st time, copy the results */
1269 if (DO_BIC(BIC_APIC))
1270 new->apic_id = old->apic_id;
1271 if (DO_BIC(BIC_X2APIC))
1272 new->x2apic_id = old->x2apic_id;
1273
3f44a5c6
LB		 1274 /*
1275 * the timestamps from start of measurement interval are in "old"
1276 * the timestamp from end of measurement interval are in "new"
1277 * over-write old w/ new so we can print end of interval values
1278 */
1279
1280 old->tv_begin = new->tv_begin;
1281 old->tv_end = new->tv_end;
1282
c98d5d94
LB		 1283 old->tsc = new->tsc - old->tsc;
1284
1285 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 1286 if (old->tsc < (1000 * 1000))
1287 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1288 "You can disable all c-states by booting with \"idle=poll\"\n"
1289 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 1290
c98d5d94 1291 old->c1 = new->c1 - old->c1;
103a8fea 1292
812db3f7 1293 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
a729617c
LB		 1294 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1295 old->aperf = new->aperf - old->aperf;
1296 old->mperf = new->mperf - old->mperf;
1297 } else {
ba3dec99 1298 return -1;
103a8fea 1299 }
c98d5d94 1300 }
103a8fea 1301
103a8fea 1302
144b44b1
LB		 1303 if (use_c1_residency_msr) {
1304 /*
1305 * Some models have a dedicated C1 residency MSR,
1306 * which should be more accurate than the derivation below.
1307 */
1308 } else {
1309 /*
1310 * As counter collection is not atomic,
1311 * it is possible for mperf's non-halted cycles + idle states
1312 * to exceed TSC's all cycles: show c1 = 0% in that case.
1313 */
95149369 1314 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
144b44b1
LB		 1315 old->c1 = 0;
1316 else {
1317 /* normal case, derive c1 */
008d396e 1318 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
c98d5d94 1319 - core_delta->c6 - core_delta->c7;
144b44b1 1320 }
c98d5d94 1321 }
c3ae331d 1322
c98d5d94 1323 if (old->mperf == 0) {
b7d8c148
LB		 1324 if (debug > 1)
1325 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 1326 old->mperf = 1; /* divide by 0 protection */
103a8fea 1327 }
c98d5d94 1328
812db3f7 1329 if (DO_BIC(BIC_IRQ))
562a2d37
LB		 1330 old->irq_count = new->irq_count - old->irq_count;
1331
812db3f7 1332 if (DO_BIC(BIC_SMI))
1ed51011 1333 old->smi_count = new->smi_count - old->smi_count;
ba3dec99 1334
388e9c81
LB		 1335 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1336 if (mp->format == FORMAT_RAW)
1337 old->counter[i] = new->counter[i];
1338 else
1339 old->counter[i] = new->counter[i] - old->counter[i];
1340 }
ba3dec99 1341 return 0;
c98d5d94
LB		 1342}
1343
1344int delta_cpu(struct thread_data *t, struct core_data *c,
1345 struct pkg_data *p, struct thread_data *t2,
1346 struct core_data *c2, struct pkg_data *p2)
1347{
ba3dec99
LB		 1348 int retval = 0;
1349
c98d5d94
LB		 1350 /* calculate core delta only for 1st thread in core */
1351 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1352 delta_core(c, c2);
1353
1354 /* always calculate thread delta */
ba3dec99
LB		 1355 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1356 if (retval)
1357 return retval;
c98d5d94
LB		 1358
1359 /* calculate package delta only for 1st core in package */
1360 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
ba3dec99 1361 retval = delta_package(p, p2);
c98d5d94 1362
ba3dec99 1363 return retval;
103a8fea
LB		 1364}
1365
c98d5d94
LB		 1366void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1367{
388e9c81
LB		 1368 int i;
1369 struct msr_counter *mp;
1370
3f44a5c6
LB		 1371 t->tv_begin.tv_sec = 0;
1372 t->tv_begin.tv_usec = 0;
1373 t->tv_end.tv_sec = 0;
1374 t->tv_end.tv_usec = 0;
1375
c98d5d94
LB		 1376 t->tsc = 0;
1377 t->aperf = 0;
1378 t->mperf = 0;
1379 t->c1 = 0;
1380
562a2d37
LB		 1381 t->irq_count = 0;
1382 t->smi_count = 0;
1383
c98d5d94
LB		 1384 /* tells format_counters to dump all fields from this set */
1385 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1386
1387 c->c3 = 0;
1388 c->c6 = 0;
1389 c->c7 = 0;
0539ba11 1390 c->mc6_us = 0;
889facbe 1391 c->core_temp_c = 0;
c98d5d94 1392
0b2bb692
LB		 1393 p->pkg_wtd_core_c0 = 0;
1394 p->pkg_any_core_c0 = 0;
1395 p->pkg_any_gfxe_c0 = 0;
1396 p->pkg_both_core_gfxe_c0 = 0;
1397
c98d5d94 1398 p->pc2 = 0;
0f47c08d 1399 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1400 p->pc3 = 0;
0f47c08d 1401 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1402 p->pc6 = 0;
0f47c08d 1403 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1404 p->pc7 = 0;
ca58710f
KCA		 1405 p->pc8 = 0;
1406 p->pc9 = 0;
1407 p->pc10 = 0;
be0e54c4
LB		 1408 p->cpu_lpi = 0;
1409 p->sys_lpi = 0;
889facbe
LB		 1410
1411 p->energy_pkg = 0;
1412 p->energy_dram = 0;
1413 p->energy_cores = 0;
1414 p->energy_gfx = 0;
1415 p->rapl_pkg_perf_status = 0;
1416 p->rapl_dram_perf_status = 0;
1417 p->pkg_temp_c = 0;
27d47356 1418
fdf676e5 1419 p->gfx_rc6_ms = 0;
27d47356 1420 p->gfx_mhz = 0;
388e9c81
LB		 1421 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1422 t->counter[i] = 0;
1423
1424 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1425 c->counter[i] = 0;
1426
1427 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1428 p->counter[i] = 0;
c98d5d94
LB		 1429}
1430int sum_counters(struct thread_data *t, struct core_data *c,
1431 struct pkg_data *p)
103a8fea 1432{
388e9c81
LB		 1433 int i;
1434 struct msr_counter *mp;
1435
4c2122d4
LB		 1436 /* copy un-changing apic_id's */
1437 if (DO_BIC(BIC_APIC))
1438 average.threads.apic_id = t->apic_id;
1439 if (DO_BIC(BIC_X2APIC))
1440 average.threads.x2apic_id = t->x2apic_id;
1441
3f44a5c6
LB		 1442 /* remember first tv_begin */
1443 if (average.threads.tv_begin.tv_sec == 0)
1444 average.threads.tv_begin = t->tv_begin;
1445
1446 /* remember last tv_end */
1447 average.threads.tv_end = t->tv_end;
1448
c98d5d94
LB		 1449 average.threads.tsc += t->tsc;
1450 average.threads.aperf += t->aperf;
1451 average.threads.mperf += t->mperf;
1452 average.threads.c1 += t->c1;
103a8fea 1453
562a2d37
LB		 1454 average.threads.irq_count += t->irq_count;
1455 average.threads.smi_count += t->smi_count;
1456
388e9c81
LB		 1457 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1458 if (mp->format == FORMAT_RAW)
1459 continue;
1460 average.threads.counter[i] += t->counter[i];
1461 }
1462
c98d5d94
LB		 1463 /* sum per-core values only for 1st thread in core */
1464 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1465 return 0;
103a8fea 1466
c98d5d94
LB		 1467 average.cores.c3 += c->c3;
1468 average.cores.c6 += c->c6;
1469 average.cores.c7 += c->c7;
0539ba11 1470 average.cores.mc6_us += c->mc6_us;
c98d5d94 1471
889facbe
LB		 1472 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1473
388e9c81
LB		 1474 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1475 if (mp->format == FORMAT_RAW)
1476 continue;
1477 average.cores.counter[i] += c->counter[i];
1478 }
1479
c98d5d94
LB		 1480 /* sum per-pkg values only for 1st core in pkg */
1481 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1482 return 0;
1483
a99d8730 1484 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1485 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
a99d8730 1486 if (DO_BIC(BIC_Any_c0))
0b2bb692 1487 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
a99d8730 1488 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1489 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
a99d8730 1490 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1491 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
0b2bb692 1492
c98d5d94 1493 average.packages.pc2 += p->pc2;
0f47c08d 1494 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1495 average.packages.pc3 += p->pc3;
0f47c08d 1496 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1497 average.packages.pc6 += p->pc6;
0f47c08d 1498 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1499 average.packages.pc7 += p->pc7;
ca58710f
KCA		 1500 average.packages.pc8 += p->pc8;
1501 average.packages.pc9 += p->pc9;
1502 average.packages.pc10 += p->pc10;
c98d5d94 1503
be0e54c4
LB		 1504 average.packages.cpu_lpi = p->cpu_lpi;
1505 average.packages.sys_lpi = p->sys_lpi;
1506
889facbe
LB		 1507 average.packages.energy_pkg += p->energy_pkg;
1508 average.packages.energy_dram += p->energy_dram;
1509 average.packages.energy_cores += p->energy_cores;
1510 average.packages.energy_gfx += p->energy_gfx;
1511
fdf676e5 1512 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
27d47356
LB		 1513 average.packages.gfx_mhz = p->gfx_mhz;
1514
889facbe
LB		 1515 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1516
1517 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1518 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
388e9c81
LB		 1519
1520 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1521 if (mp->format == FORMAT_RAW)
1522 continue;
1523 average.packages.counter[i] += p->counter[i];
1524 }
c98d5d94
LB		 1525 return 0;
1526}
1527/*
1528 * sum the counters for all cpus in the system
1529 * compute the weighted average
1530 */
1531void compute_average(struct thread_data *t, struct core_data *c,
1532 struct pkg_data *p)
1533{
388e9c81
LB		 1534 int i;
1535 struct msr_counter *mp;
1536
c98d5d94
LB		 1537 clear_counters(&average.threads, &average.cores, &average.packages);
1538
1539 for_all_cpus(sum_counters, t, c, p);
1540
1541 average.threads.tsc /= topo.num_cpus;
1542 average.threads.aperf /= topo.num_cpus;
1543 average.threads.mperf /= topo.num_cpus;
1544 average.threads.c1 /= topo.num_cpus;
1545
0de6c0df
LB		 1546 if (average.threads.irq_count > 9999999)
1547 sums_need_wide_columns = 1;
1548
c98d5d94
LB		 1549 average.cores.c3 /= topo.num_cores;
1550 average.cores.c6 /= topo.num_cores;
1551 average.cores.c7 /= topo.num_cores;
0539ba11 1552 average.cores.mc6_us /= topo.num_cores;
c98d5d94 1553
a99d8730 1554 if (DO_BIC(BIC_Totl_c0))
0b2bb692 1555 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
a99d8730 1556 if (DO_BIC(BIC_Any_c0))
0b2bb692 1557 average.packages.pkg_any_core_c0 /= topo.num_packages;
a99d8730 1558 if (DO_BIC(BIC_GFX_c0))
0b2bb692 1559 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
a99d8730 1560 if (DO_BIC(BIC_CPUGFX))
0b2bb692 1561 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
0b2bb692 1562
c98d5d94 1563 average.packages.pc2 /= topo.num_packages;
0f47c08d 1564 if (DO_BIC(BIC_Pkgpc3))
ee7e38e3 1565 average.packages.pc3 /= topo.num_packages;
0f47c08d 1566 if (DO_BIC(BIC_Pkgpc6))
ee7e38e3 1567 average.packages.pc6 /= topo.num_packages;
0f47c08d 1568 if (DO_BIC(BIC_Pkgpc7))
ee7e38e3 1569 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 1570
1571 average.packages.pc8 /= topo.num_packages;
1572 average.packages.pc9 /= topo.num_packages;
1573 average.packages.pc10 /= topo.num_packages;
388e9c81
LB		 1574
1575 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1576 if (mp->format == FORMAT_RAW)
1577 continue;
0de6c0df
LB		 1578 if (mp->type == COUNTER_ITEMS) {
1579 if (average.threads.counter[i] > 9999999)
1580 sums_need_wide_columns = 1;
41618e63 1581 continue;
0de6c0df 1582 }
388e9c81
LB		 1583 average.threads.counter[i] /= topo.num_cpus;
1584 }
1585 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1586 if (mp->format == FORMAT_RAW)
1587 continue;
0de6c0df
LB		 1588 if (mp->type == COUNTER_ITEMS) {
1589 if (average.cores.counter[i] > 9999999)
1590 sums_need_wide_columns = 1;
1591 }
388e9c81
LB		 1592 average.cores.counter[i] /= topo.num_cores;
1593 }
1594 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1595 if (mp->format == FORMAT_RAW)
1596 continue;
0de6c0df
LB		 1597 if (mp->type == COUNTER_ITEMS) {
1598 if (average.packages.counter[i] > 9999999)
1599 sums_need_wide_columns = 1;
1600 }
388e9c81
LB		 1601 average.packages.counter[i] /= topo.num_packages;
1602 }
103a8fea
LB		 1603}
1604
c98d5d94 1605static unsigned long long rdtsc(void)
103a8fea 1606{
c98d5d94 1607 unsigned int low, high;
15aaa346 1608
c98d5d94 1609 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 1610
c98d5d94
LB		 1611 return low | ((unsigned long long)high) << 32;
1612}
15aaa346 1613
495c7654
LB		 1614/*
1615 * Open a file, and exit on failure
1616 */
1617FILE *fopen_or_die(const char *path, const char *mode)
1618{
1619 FILE *filep = fopen(path, mode);
1620
1621 if (!filep)
1622 err(1, "%s: open failed", path);
1623 return filep;
1624}
1625/*
1626 * snapshot_sysfs_counter()
1627 *
1628 * return snapshot of given counter
1629 */
1630unsigned long long snapshot_sysfs_counter(char *path)
1631{
1632 FILE *fp;
1633 int retval;
1634 unsigned long long counter;
1635
1636 fp = fopen_or_die(path, "r");
1637
1638 retval = fscanf(fp, "%lld", &counter);
1639 if (retval != 1)
1640 err(1, "snapshot_sysfs_counter(%s)", path);
1641
1642 fclose(fp);
1643
1644 return counter;
1645}
1646
1647int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1648{
1649 if (mp->msr_num != 0) {
1650 if (get_msr(cpu, mp->msr_num, counterp))
1651 return -1;
1652 } else {
46c27978 1653 char path[128 + PATH_BYTES];
41618e63
LB		 1654
1655 if (mp->flags & SYSFS_PERCPU) {
1656 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1657 cpu, mp->path);
1658
1659 *counterp = snapshot_sysfs_counter(path);
1660 } else {
1661 *counterp = snapshot_sysfs_counter(mp->path);
1662 }
495c7654
LB		 1663 }
1664
1665 return 0;
1666}
1667
4c2122d4
LB		 1668void get_apic_id(struct thread_data *t)
1669{
34041551 1670 unsigned int eax, ebx, ecx, edx;
4c2122d4 1671
34041551
LB		 1672 if (DO_BIC(BIC_APIC)) {
1673 eax = ebx = ecx = edx = 0;
1674 __cpuid(1, eax, ebx, ecx, edx);
4c2122d4 1675
34041551
LB		 1676 t->apic_id = (ebx >> 24) & 0xff;
1677 }
1678
1679 if (!DO_BIC(BIC_X2APIC))
4c2122d4
LB		 1680 return;
1681
34041551
LB		 1682 if (authentic_amd) {
1683 unsigned int topology_extensions;
4c2122d4 1684
34041551
LB		 1685 if (max_extended_level < 0x8000001e)
1686 return;
4c2122d4 1687
34041551
LB		 1688 eax = ebx = ecx = edx = 0;
1689 __cpuid(0x80000001, eax, ebx, ecx, edx);
1690 topology_extensions = ecx & (1 << 22);
1691
1692 if (topology_extensions == 0)
1693 return;
1694
1695 eax = ebx = ecx = edx = 0;
1696 __cpuid(0x8000001e, eax, ebx, ecx, edx);
1697
1698 t->x2apic_id = eax;
4c2122d4 1699 return;
34041551 1700 }
4c2122d4 1701
34041551
LB		 1702 if (!genuine_intel)
1703 return;
1704
1705 if (max_level < 0xb)
4c2122d4
LB		 1706 return;
1707
1708 ecx = 0;
1709 __cpuid(0xb, eax, ebx, ecx, edx);
1710 t->x2apic_id = edx;
1711
34041551
LB		 1712 if (debug && (t->apic_id != (t->x2apic_id & 0xff)))
1713 fprintf(outf, "cpu%d: BIOS BUG: apic 0x%x x2apic 0x%x\n",
1714 t->cpu_id, t->apic_id, t->x2apic_id);
4c2122d4
LB		 1715}
1716
c98d5d94
LB		 1717/*
1718 * get_counters(...)
1719 * migrate to cpu
1720 * acquire and record local counters for that cpu
1721 */
1722int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1723{
1724 int cpu = t->cpu_id;
889facbe 1725 unsigned long long msr;
0102b067 1726 int aperf_mperf_retry_count = 0;
388e9c81
LB		 1727 struct msr_counter *mp;
1728 int i;
88c3281f 1729
f4fdf2b4
LB		 1730 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1731
e52966c0 1732 if (cpu_migrate(cpu)) {
b7d8c148 1733 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
c98d5d94 1734 return -1;
e52966c0 1735 }
15aaa346 1736
4c2122d4
LB		 1737 if (first_counter_read)
1738 get_apic_id(t);
0102b067 1739retry:
c98d5d94
LB		 1740 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1741
812db3f7 1742 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
0102b067
LB		 1743 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1744
1745 /*
1746 * The TSC, APERF and MPERF must be read together for
1747 * APERF/MPERF and MPERF/TSC to give accurate results.
1748 *
1749 * Unfortunately, APERF and MPERF are read by
1750 * individual system call, so delays may occur
1751 * between them. If the time to read them
1752 * varies by a large amount, we re-read them.
1753 */
1754
1755 /*
1756 * This initial dummy APERF read has been seen to
1757 * reduce jitter in the subsequent reads.
1758 */
1759
1760 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1761 return -3;
1762
1763 t->tsc = rdtsc(); /* re-read close to APERF */
1764
1765 tsc_before = t->tsc;
1766
9c63a650 1767 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 1768 return -3;
0102b067
LB		 1769
1770 tsc_between = rdtsc();
1771
9c63a650 1772 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 1773 return -4;
0102b067
LB		 1774
1775 tsc_after = rdtsc();
1776
1777 aperf_time = tsc_between - tsc_before;
1778 mperf_time = tsc_after - tsc_between;
1779
1780 /*
1781 * If the system call latency to read APERF and MPERF
1782 * differ by more than 2x, then try again.
1783 */
1784 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1785 aperf_mperf_retry_count++;
1786 if (aperf_mperf_retry_count < 5)
1787 goto retry;
1788 else
1789 warnx("cpu%d jitter %lld %lld",
1790 cpu, aperf_time, mperf_time);
1791 }
1792 aperf_mperf_retry_count = 0;
1793
b2b34dfe
HC		 1794 t->aperf = t->aperf * aperf_mperf_multiplier;
1795 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 1796 }
1797
812db3f7 1798 if (DO_BIC(BIC_IRQ))
562a2d37 1799 t->irq_count = irqs_per_cpu[cpu];
812db3f7 1800 if (DO_BIC(BIC_SMI)) {
1ed51011
LB		 1801 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1802 return -5;
1803 t->smi_count = msr & 0xFFFFFFFF;
1804 }
0539ba11 1805 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
144b44b1
LB		 1806 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1807 return -6;
1808 }
1809
388e9c81 1810 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
495c7654 1811 if (get_mp(cpu, mp, &t->counter[i]))
388e9c81
LB		 1812 return -10;
1813 }
1814
c98d5d94
LB		 1815 /* collect core counters only for 1st thread in core */
1816 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
f4fdf2b4 1817 goto done;
c98d5d94 1818
562855ee 1819 if (DO_BIC(BIC_CPU_c3)) {
c98d5d94
LB		 1820 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1821 return -6;
144b44b1
LB		 1822 }
1823
812db3f7 1824 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
c98d5d94
LB		 1825 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1826 return -7;
fb5d4327
DC		 1827 } else if (do_knl_cstates) {
1828 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1829 return -7;
c98d5d94
LB		 1830 }
1831
812db3f7 1832 if (DO_BIC(BIC_CPU_c7))
c98d5d94
LB		 1833 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1834 return -8;
1835
0539ba11
LB		 1836 if (DO_BIC(BIC_Mod_c6))
1837 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1838 return -8;
1839
812db3f7 1840 if (DO_BIC(BIC_CoreTmp)) {
889facbe
LB		 1841 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1842 return -9;
1843 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1844 }
1845
388e9c81 1846 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
495c7654 1847 if (get_mp(cpu, mp, &c->counter[i]))
388e9c81
LB		 1848 return -10;
1849 }
889facbe 1850
c98d5d94
LB		 1851 /* collect package counters only for 1st core in package */
1852 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
f4fdf2b4 1853 goto done;
c98d5d94 1854
a99d8730 1855 if (DO_BIC(BIC_Totl_c0)) {
0b2bb692
LB		 1856 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1857 return -10;
a99d8730
LB		 1858 }
1859 if (DO_BIC(BIC_Any_c0)) {
0b2bb692
LB		 1860 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1861 return -11;
a99d8730
LB		 1862 }
1863 if (DO_BIC(BIC_GFX_c0)) {
0b2bb692
LB		 1864 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1865 return -12;
a99d8730
LB		 1866 }
1867 if (DO_BIC(BIC_CPUGFX)) {
0b2bb692
LB		 1868 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1869 return -13;
1870 }
0f47c08d 1871 if (DO_BIC(BIC_Pkgpc3))
c98d5d94
LB		 1872 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1873 return -9;
0f47c08d 1874 if (DO_BIC(BIC_Pkgpc6)) {
0539ba11
LB		 1875 if (do_slm_cstates) {
1876 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1877 return -10;
1878 } else {
1879 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1880 return -10;
1881 }
1882 }
1883
0f47c08d 1884 if (DO_BIC(BIC_Pkgpc2))
c98d5d94
LB		 1885 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1886 return -11;
0f47c08d 1887 if (DO_BIC(BIC_Pkgpc7))
c98d5d94
LB		 1888 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1889 return -12;
0f47c08d 1890 if (DO_BIC(BIC_Pkgpc8))
ca58710f
KCA		 1891 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1892 return -13;
0f47c08d 1893 if (DO_BIC(BIC_Pkgpc9))
ca58710f
KCA		 1894 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1895 return -13;
0f47c08d 1896 if (DO_BIC(BIC_Pkgpc10))
ca58710f
KCA		 1897 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1898 return -13;
0f47c08d 1899
be0e54c4
LB		 1900 if (DO_BIC(BIC_CPU_LPI))
1901 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1902 if (DO_BIC(BIC_SYS_LPI))
1903 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1904
889facbe
LB		 1905 if (do_rapl & RAPL_PKG) {
1906 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1907 return -13;
1908 p->energy_pkg = msr & 0xFFFFFFFF;
1909 }
9148494c 1910 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
889facbe
LB		 1911 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1912 return -14;
1913 p->energy_cores = msr & 0xFFFFFFFF;
1914 }
1915 if (do_rapl & RAPL_DRAM) {
1916 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1917 return -15;
1918 p->energy_dram = msr & 0xFFFFFFFF;
1919 }
1920 if (do_rapl & RAPL_GFX) {
1921 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1922 return -16;
1923 p->energy_gfx = msr & 0xFFFFFFFF;
1924 }
1925 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1926 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1927 return -16;
1928 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1929 }
1930 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1931 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1932 return -16;
1933 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1934 }
812db3f7 1935 if (DO_BIC(BIC_PkgTmp)) {
889facbe
LB		 1936 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1937 return -17;
1938 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1939 }
fdf676e5 1940
812db3f7 1941 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 1942 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1943
812db3f7 1944 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 1945 p->gfx_mhz = gfx_cur_mhz;
1946
388e9c81 1947 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
495c7654 1948 if (get_mp(cpu, mp, &p->counter[i]))
388e9c81
LB		 1949 return -10;
1950 }
f4fdf2b4
LB		 1951done:
1952 gettimeofday(&t->tv_end, (struct timezone *)NULL);
388e9c81 1953
15aaa346 1954 return 0;
103a8fea
LB		 1955}
1956
ee7e38e3
LB		 1957/*
1958 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1959 * If you change the values, note they are used both in comparisons
1960 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1961 */
1962
1963#define PCLUKN 0 /* Unknown */
1964#define PCLRSV 1 /* Reserved */
1965#define PCL__0 2 /* PC0 */
1966#define PCL__1 3 /* PC1 */
1967#define PCL__2 4 /* PC2 */
1968#define PCL__3 5 /* PC3 */
1969#define PCL__4 6 /* PC4 */
1970#define PCL__6 7 /* PC6 */
1971#define PCL_6N 8 /* PC6 No Retention */
1972#define PCL_6R 9 /* PC6 Retention */
1973#define PCL__7 10 /* PC7 */
1974#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1975#define PCL__8 12 /* PC8 */
1976#define PCL__9 13 /* PC9 */
445640a5
LB		 1977#define PCL_10 14 /* PC10 */
1978#define PCLUNL 15 /* Unlimited */
ee7e38e3
LB		 1979
1980int pkg_cstate_limit = PCLUKN;
1981char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
445640a5 1982 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "pc10", "unlimited"};
ee7e38e3 1983
e9257f5f
LB		 1984int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1985int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1986int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
0539ba11 1987int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
f2642888 1988int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
e9257f5f 1989int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
445640a5 1990int glm_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCL_10, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
2085e124 1991int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 1992
a2b7b749
LB		 1993
1994static void
1995calculate_tsc_tweak()
1996{
a2b7b749
LB		 1997 tsc_tweak = base_hz / tsc_hz;
1998}
1999
fcd17211
LB		 2000static void
2001dump_nhm_platform_info(void)
103a8fea
LB		 2002{
2003 unsigned long long msr;
2004 unsigned int ratio;
2005
ec0adc53 2006 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 2007
b7d8c148 2008 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 2009
103a8fea 2010 ratio = (msr >> 40) & 0xFF;
710f273b 2011 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
103a8fea
LB		 2012 ratio, bclk, ratio * bclk);
2013
2014 ratio = (msr >> 8) & 0xFF;
710f273b 2015 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
103a8fea
LB		 2016 ratio, bclk, ratio * bclk);
2017
7ce7d5de 2018 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
b7d8c148 2019 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
bfae2052 2020 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 2021
fcd17211
LB		 2022 return;
2023}
2024
2025static void
2026dump_hsw_turbo_ratio_limits(void)
2027{
2028 unsigned long long msr;
2029 unsigned int ratio;
2030
7ce7d5de 2031 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 2032
b7d8c148 2033 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 2034
2035 ratio = (msr >> 8) & 0xFF;
2036 if (ratio)
710f273b 2037 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
fcd17211
LB		 2038 ratio, bclk, ratio * bclk);
2039
2040 ratio = (msr >> 0) & 0xFF;
2041 if (ratio)
710f273b 2042 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
fcd17211
LB		 2043 ratio, bclk, ratio * bclk);
2044 return;
2045}
2046
2047static void
2048dump_ivt_turbo_ratio_limits(void)
2049{
2050 unsigned long long msr;
2051 unsigned int ratio;
6574a5d5 2052
7ce7d5de 2053 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 2054
b7d8c148 2055 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 2056
2057 ratio = (msr >> 56) & 0xFF;
2058 if (ratio)
710f273b 2059 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
6574a5d5
LB		 2060 ratio, bclk, ratio * bclk);
2061
2062 ratio = (msr >> 48) & 0xFF;
2063 if (ratio)
710f273b 2064 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
6574a5d5
LB		 2065 ratio, bclk, ratio * bclk);
2066
2067 ratio = (msr >> 40) & 0xFF;
2068 if (ratio)
710f273b 2069 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
6574a5d5
LB		 2070 ratio, bclk, ratio * bclk);
2071
2072 ratio = (msr >> 32) & 0xFF;
2073 if (ratio)
710f273b 2074 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
6574a5d5
LB		 2075 ratio, bclk, ratio * bclk);
2076
2077 ratio = (msr >> 24) & 0xFF;
2078 if (ratio)
710f273b 2079 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
6574a5d5
LB		 2080 ratio, bclk, ratio * bclk);
2081
2082 ratio = (msr >> 16) & 0xFF;
2083 if (ratio)
710f273b 2084 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
6574a5d5
LB		 2085 ratio, bclk, ratio * bclk);
2086
2087 ratio = (msr >> 8) & 0xFF;
2088 if (ratio)
710f273b 2089 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
6574a5d5
LB		 2090 ratio, bclk, ratio * bclk);
2091
2092 ratio = (msr >> 0) & 0xFF;
2093 if (ratio)
710f273b 2094 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
6574a5d5 2095 ratio, bclk, ratio * bclk);
fcd17211
LB		 2096 return;
2097}
31e07522
LB		 2098int has_turbo_ratio_group_limits(int family, int model)
2099{
2100
2101 if (!genuine_intel)
2102 return 0;
2103
2104 switch (model) {
2105 case INTEL_FAM6_ATOM_GOLDMONT:
2106 case INTEL_FAM6_SKYLAKE_X:
f2c4db1b 2107 case INTEL_FAM6_ATOM_GOLDMONT_X:
31e07522
LB		 2108 return 1;
2109 }
2110 return 0;
2111}
6574a5d5 2112
fcd17211 2113static void
31e07522 2114dump_turbo_ratio_limits(int family, int model)
fcd17211 2115{
31e07522
LB		 2116 unsigned long long msr, core_counts;
2117 unsigned int ratio, group_size;
103a8fea 2118
7ce7d5de 2119 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
b7d8c148 2120 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5 2121
31e07522
LB		 2122 if (has_turbo_ratio_group_limits(family, model)) {
2123 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2124 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2125 } else {
2126 core_counts = 0x0807060504030201;
2127 }
2128
6574a5d5 2129 ratio = (msr >> 56) & 0xFF;
31e07522 2130 group_size = (core_counts >> 56) & 0xFF;
6574a5d5 2131 if (ratio)
31e07522
LB		 2132 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2133 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2134
2135 ratio = (msr >> 48) & 0xFF;
31e07522 2136 group_size = (core_counts >> 48) & 0xFF;
6574a5d5 2137 if (ratio)
31e07522
LB		 2138 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2139 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2140
2141 ratio = (msr >> 40) & 0xFF;
31e07522 2142 group_size = (core_counts >> 40) & 0xFF;
6574a5d5 2143 if (ratio)
31e07522
LB		 2144 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2145 ratio, bclk, ratio * bclk, group_size);
6574a5d5
LB		 2146
2147 ratio = (msr >> 32) & 0xFF;
31e07522 2148 group_size = (core_counts >> 32) & 0xFF;
6574a5d5 2149 if (ratio)
31e07522
LB		 2150 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2151 ratio, bclk, ratio * bclk, group_size);
6574a5d5 2152
103a8fea 2153 ratio = (msr >> 24) & 0xFF;
31e07522 2154 group_size = (core_counts >> 24) & 0xFF;
103a8fea 2155 if (ratio)
31e07522
LB		 2156 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2157 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2158
2159 ratio = (msr >> 16) & 0xFF;
31e07522 2160 group_size = (core_counts >> 16) & 0xFF;
103a8fea 2161 if (ratio)
31e07522
LB		 2162 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2163 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2164
2165 ratio = (msr >> 8) & 0xFF;
31e07522 2166 group_size = (core_counts >> 8) & 0xFF;
103a8fea 2167 if (ratio)
31e07522
LB		 2168 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2169 ratio, bclk, ratio * bclk, group_size);
103a8fea
LB		 2170
2171 ratio = (msr >> 0) & 0xFF;
31e07522 2172 group_size = (core_counts >> 0) & 0xFF;
103a8fea 2173 if (ratio)
31e07522
LB		 2174 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2175 ratio, bclk, ratio * bclk, group_size);
fcd17211
LB		 2176 return;
2177}
3a9a941d 2178
0f7887c4
LB		 2179static void
2180dump_atom_turbo_ratio_limits(void)
2181{
2182 unsigned long long msr;
2183 unsigned int ratio;
2184
2185 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2186 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2187
2188 ratio = (msr >> 0) & 0x3F;
2189 if (ratio)
2190 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2191 ratio, bclk, ratio * bclk);
2192
2193 ratio = (msr >> 8) & 0x3F;
2194 if (ratio)
2195 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2196 ratio, bclk, ratio * bclk);
2197
2198 ratio = (msr >> 16) & 0x3F;
2199 if (ratio)
2200 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2201 ratio, bclk, ratio * bclk);
2202
2203 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2204 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2205
2206 ratio = (msr >> 24) & 0x3F;
2207 if (ratio)
2208 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2209 ratio, bclk, ratio * bclk);
2210
2211 ratio = (msr >> 16) & 0x3F;
2212 if (ratio)
2213 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2214 ratio, bclk, ratio * bclk);
2215
2216 ratio = (msr >> 8) & 0x3F;
2217 if (ratio)
2218 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2219 ratio, bclk, ratio * bclk);
2220
2221 ratio = (msr >> 0) & 0x3F;
2222 if (ratio)
2223 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2224 ratio, bclk, ratio * bclk);
2225}
2226
fb5d4327
DC		 2227static void
2228dump_knl_turbo_ratio_limits(void)
2229{
cbf97aba
HC		 2230 const unsigned int buckets_no = 7;
2231
fb5d4327 2232 unsigned long long msr;
cbf97aba
HC		 2233 int delta_cores, delta_ratio;
2234 int i, b_nr;
2235 unsigned int cores[buckets_no];
2236 unsigned int ratio[buckets_no];
fb5d4327 2237
ebf5926a 2238 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
fb5d4327 2239
b7d8c148 2240 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
bfae2052 2241 base_cpu, msr);
fb5d4327
DC		 2242
2243 /**
2244 * Turbo encoding in KNL is as follows:
cbf97aba
HC		 2245 * [0] -- Reserved
2246 * [7:1] -- Base value of number of active cores of bucket 1.
fb5d4327
DC		 2247 * [15:8] -- Base value of freq ratio of bucket 1.
2248 * [20:16] -- +ve delta of number of active cores of bucket 2.
2249 * i.e. active cores of bucket 2 =
2250 * active cores of bucket 1 + delta
2251 * [23:21] -- Negative delta of freq ratio of bucket 2.
2252 * i.e. freq ratio of bucket 2 =
2253 * freq ratio of bucket 1 - delta
2254 * [28:24]-- +ve delta of number of active cores of bucket 3.
2255 * [31:29]-- -ve delta of freq ratio of bucket 3.
2256 * [36:32]-- +ve delta of number of active cores of bucket 4.
2257 * [39:37]-- -ve delta of freq ratio of bucket 4.
2258 * [44:40]-- +ve delta of number of active cores of bucket 5.
2259 * [47:45]-- -ve delta of freq ratio of bucket 5.
2260 * [52:48]-- +ve delta of number of active cores of bucket 6.
2261 * [55:53]-- -ve delta of freq ratio of bucket 6.
2262 * [60:56]-- +ve delta of number of active cores of bucket 7.
2263 * [63:61]-- -ve delta of freq ratio of bucket 7.
2264 */
cbf97aba
HC		 2265
2266 b_nr = 0;
2267 cores[b_nr] = (msr & 0xFF) >> 1;
2268 ratio[b_nr] = (msr >> 8) & 0xFF;
2269
2270 for (i = 16; i < 64; i += 8) {
fb5d4327 2271 delta_cores = (msr >> i) & 0x1F;
cbf97aba
HC		 2272 delta_ratio = (msr >> (i + 5)) & 0x7;
2273
2274 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2275 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2276 b_nr++;
fb5d4327 2277 }
cbf97aba
HC		 2278
2279 for (i = buckets_no - 1; i >= 0; i--)
2280 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
b7d8c148 2281 fprintf(outf,
710f273b 2282 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
cbf97aba 2283 ratio[i], bclk, ratio[i] * bclk, cores[i]);
fb5d4327
DC		 2284}
2285
fcd17211
LB		 2286static void
2287dump_nhm_cst_cfg(void)
2288{
2289 unsigned long long msr;
2290
1df2e55a 2291 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
fcd17211 2292
1df2e55a 2293 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
fcd17211 2294
3e8b62bf 2295 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
fcd17211
LB		 2296 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2297 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2298 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2299 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2300 (msr & (1 << 15)) ? "" : "UN",
6c34f160 2301 (unsigned int)msr & 0xF,
fcd17211 2302 pkg_cstate_limit_strings[pkg_cstate_limit]);
ac980e13
AB		 2303
2304#define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2305 if (has_automatic_cstate_conversion) {
2306 fprintf(outf, ", automatic c-state conversion=%s",
2307 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2308 }
2309
2310 fprintf(outf, ")\n");
2311
fcd17211 2312 return;
103a8fea
LB		 2313}
2314
6fb3143b
LB		 2315static void
2316dump_config_tdp(void)
2317{
2318 unsigned long long msr;
2319
2320 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
b7d8c148 2321 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
685b535b 2322 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
6fb3143b
LB		 2323
2324 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
b7d8c148 2325 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
6fb3143b 2326 if (msr) {
685b535b
CY		 2327 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2328 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2329 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2330 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2331 }
b7d8c148 2332 fprintf(outf, ")\n");
6fb3143b
LB		 2333
2334 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
b7d8c148 2335 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
6fb3143b 2336 if (msr) {
685b535b
CY		 2337 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2338 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2339 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2340 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 2341 }
b7d8c148 2342 fprintf(outf, ")\n");
6fb3143b
LB		 2343
2344 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
b7d8c148 2345 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
6fb3143b 2346 if ((msr) & 0x3)
b7d8c148
LB		 2347 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2348 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2349 fprintf(outf, ")\n");
36229897 2350
6fb3143b 2351 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
b7d8c148 2352 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
685b535b 2353 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
b7d8c148
LB		 2354 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2355 fprintf(outf, ")\n");
6fb3143b 2356}
5a63426e
LB		 2357
2358unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2359
2360void print_irtl(void)
2361{
2362 unsigned long long msr;
2363
2364 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2365 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2366 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2367 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2368
2369 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2370 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2371 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2372 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2373
2374 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2375 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2376 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2377 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2378
2379 if (!do_irtl_hsw)
2380 return;
2381
2382 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2383 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2384 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2385 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2386
2387 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2388 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2389 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2390 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2391
2392 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2393 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2394 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2395 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2396
2397}
36229897
LB		 2398void free_fd_percpu(void)
2399{
2400 int i;
2401
01a67adf 2402 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
36229897
LB		 2403 if (fd_percpu[i] != 0)
2404 close(fd_percpu[i]);
2405 }
2406
2407 free(fd_percpu);
6fb3143b
LB		 2408}
2409
c98d5d94 2410void free_all_buffers(void)
103a8fea 2411{
0e2d8f05
LB		 2412 int i;
2413
c98d5d94
LB		 2414 CPU_FREE(cpu_present_set);
2415 cpu_present_set = NULL;
36229897 2416 cpu_present_setsize = 0;
103a8fea 2417
c98d5d94
LB		 2418 CPU_FREE(cpu_affinity_set);
2419 cpu_affinity_set = NULL;
2420 cpu_affinity_setsize = 0;
103a8fea 2421
c98d5d94
LB		 2422 free(thread_even);
2423 free(core_even);
2424 free(package_even);
103a8fea 2425
c98d5d94
LB		 2426 thread_even = NULL;
2427 core_even = NULL;
2428 package_even = NULL;
103a8fea 2429
c98d5d94
LB		 2430 free(thread_odd);
2431 free(core_odd);
2432 free(package_odd);
103a8fea 2433
c98d5d94
LB		 2434 thread_odd = NULL;
2435 core_odd = NULL;
2436 package_odd = NULL;
103a8fea 2437
c98d5d94
LB		 2438 free(output_buffer);
2439 output_buffer = NULL;
2440 outp = NULL;
36229897
LB		 2441
2442 free_fd_percpu();
562a2d37
LB		 2443
2444 free(irq_column_2_cpu);
2445 free(irqs_per_cpu);
0e2d8f05
LB		 2446
2447 for (i = 0; i <= topo.max_cpu_num; ++i) {
2448 if (cpus[i].put_ids)
2449 CPU_FREE(cpus[i].put_ids);
2450 }
2451 free(cpus);
103a8fea
LB		 2452}
2453
57a42a34 2454
c98d5d94 2455/*
95aebc44 2456 * Parse a file containing a single int.
c98d5d94 2457 */
95aebc44 2458int parse_int_file(const char *fmt, ...)
103a8fea 2459{
95aebc44
JT		 2460 va_list args;
2461 char path[PATH_MAX];
c98d5d94 2462 FILE *filep;
95aebc44 2463 int value;
103a8fea 2464
95aebc44
JT		 2465 va_start(args, fmt);
2466 vsnprintf(path, sizeof(path), fmt, args);
2467 va_end(args);
57a42a34 2468 filep = fopen_or_die(path, "r");
b2c95d90
JT		 2469 if (fscanf(filep, "%d", &value) != 1)
2470 err(1, "%s: failed to parse number from file", path);
c98d5d94 2471 fclose(filep);
95aebc44
JT		 2472 return value;
2473}
2474
c98d5d94
LB		 2475/*
2476 * cpu_is_first_core_in_package(cpu)
2477 * return 1 if given CPU is 1st core in package
2478 */
2479int cpu_is_first_core_in_package(int cpu)
103a8fea 2480{
95aebc44 2481 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 2482}
2483
2484int get_physical_package_id(int cpu)
2485{
95aebc44 2486 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 2487}
2488
2489int get_core_id(int cpu)
2490{
95aebc44 2491 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 2492}
2493
ef605741
PB		 2494void set_node_data(void)
2495{
2ffbb224
PB		 2496 int pkg, node, lnode, cpu, cpux;
2497 int cpu_count;
2498
2499 /* initialize logical_node_id */
2500 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu)
2501 cpus[cpu].logical_node_id = -1;
2502
2503 cpu_count = 0;
2504 for (pkg = 0; pkg < topo.num_packages; pkg++) {
2505 lnode = 0;
2506 for (cpu = 0; cpu <= topo.max_cpu_num; ++cpu) {
2507 if (cpus[cpu].physical_package_id != pkg)
2508 continue;
2509 /* find a cpu with an unset logical_node_id */
2510 if (cpus[cpu].logical_node_id != -1)
2511 continue;
2512 cpus[cpu].logical_node_id = lnode;
2513 node = cpus[cpu].physical_node_id;
2514 cpu_count++;
2515 /*
2516 * find all matching cpus on this pkg and set
2517 * the logical_node_id
2518 */
2519 for (cpux = cpu; cpux <= topo.max_cpu_num; cpux++) {
2520 if ((cpus[cpux].physical_package_id == pkg) &&
2521 (cpus[cpux].physical_node_id == node)) {
2522 cpus[cpux].logical_node_id = lnode;
2523 cpu_count++;
2524 }
2525 }
2526 lnode++;
2527 if (lnode > topo.nodes_per_pkg)
2528 topo.nodes_per_pkg = lnode;
2529 }
2530 if (cpu_count >= topo.max_cpu_num)
2531 break;
ef605741 2532 }
ef605741
PB		 2533}
2534
2535int get_physical_node_id(struct cpu_topology *thiscpu)
c98d5d94
LB		 2536{
2537 char path[80];
2538 FILE *filep;
0e2d8f05
LB		 2539 int i;
2540 int cpu = thiscpu->logical_cpu_id;
e275b388 2541
0e2d8f05
LB		 2542 for (i = 0; i <= topo.max_cpu_num; i++) {
2543 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2544 cpu, i);
2545 filep = fopen(path, "r");
2546 if (!filep)
2547 continue;
2548 fclose(filep);
2549 return i;
e275b388 2550 }
0e2d8f05
LB		 2551 return -1;
2552}
c98d5d94 2553
0e2d8f05
LB		 2554int get_thread_siblings(struct cpu_topology *thiscpu)
2555{
2556 char path[80], character;
2557 FILE *filep;
2558 unsigned long map;
8cb48b32 2559 int so, shift, sib_core;
0e2d8f05
LB		 2560 int cpu = thiscpu->logical_cpu_id;
2561 int offset = topo.max_cpu_num + 1;
2562 size_t size;
8cb48b32 2563 int thread_id = 0;
0e2d8f05
LB		 2564
2565 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
8cb48b32
PB		 2566 if (thiscpu->thread_id < 0)
2567 thiscpu->thread_id = thread_id++;
0e2d8f05
LB		 2568 if (!thiscpu->put_ids)
2569 return -1;
2570
2571 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2572 CPU_ZERO_S(size, thiscpu->put_ids);
2573
2574 sprintf(path,
2575 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2576 filep = fopen_or_die(path, "r");
2577 do {
2578 offset -= BITMASK_SIZE;
2579 fscanf(filep, "%lx%c", &map, &character);
2580 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2581 if ((map >> shift) & 0x1) {
8cb48b32
PB		 2582 so = shift + offset;
2583 sib_core = get_core_id(so);
2584 if (sib_core == thiscpu->physical_core_id) {
2585 CPU_SET_S(so, size, thiscpu->put_ids);
2586 if ((so != cpu) &&
2587 (cpus[so].thread_id < 0))
2588 cpus[so].thread_id =
2589 thread_id++;
2590 }
0e2d8f05
LB		 2591 }
2592 }
2593 } while (!strncmp(&character, ",", 1));
c98d5d94 2594 fclose(filep);
0e2d8f05
LB		 2595
2596 return CPU_COUNT_S(size, thiscpu->put_ids);
c98d5d94
LB		 2597}
2598
103a8fea 2599/*
c98d5d94
LB		 2600 * run func(thread, core, package) in topology order
2601 * skip non-present cpus
103a8fea
LB		 2602 */
2603
c98d5d94
LB		 2604int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2605 struct pkg_data *, struct thread_data *, struct core_data *,
2606 struct pkg_data *), struct thread_data *thread_base,
2607 struct core_data *core_base, struct pkg_data *pkg_base,
2608 struct thread_data *thread_base2, struct core_data *core_base2,
2609 struct pkg_data *pkg_base2)
2610{
40f5cfe7 2611 int retval, pkg_no, node_no, core_no, thread_no;
c98d5d94
LB		 2612
2613 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
40f5cfe7
PB		 2614 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2615 for (core_no = 0; core_no < topo.cores_per_node;
2616 ++core_no) {
2617 for (thread_no = 0; thread_no <
2618 topo.threads_per_core; ++thread_no) {
2619 struct thread_data *t, *t2;
2620 struct core_data *c, *c2;
2621 struct pkg_data *p, *p2;
2622
2623 t = GET_THREAD(thread_base, thread_no,
2624 core_no, node_no,
2625 pkg_no);
2626
2627 if (cpu_is_not_present(t->cpu_id))
2628 continue;
2629
2630 t2 = GET_THREAD(thread_base2, thread_no,
2631 core_no, node_no,
2632 pkg_no);
2633
2634 c = GET_CORE(core_base, core_no,
2635 node_no, pkg_no);
2636 c2 = GET_CORE(core_base2, core_no,
2637 node_no,
2638 pkg_no);
2639
2640 p = GET_PKG(pkg_base, pkg_no);
2641 p2 = GET_PKG(pkg_base2, pkg_no);
2642
2643 retval = func(t, c, p, t2, c2, p2);
2644 if (retval)
2645 return retval;
2646 }
c98d5d94
LB		 2647 }
2648 }
2649 }
2650 return 0;
2651}
2652
2653/*
2654 * run func(cpu) on every cpu in /proc/stat
2655 * return max_cpu number
2656 */
2657int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 2658{
2659 FILE *fp;
c98d5d94 2660 int cpu_num;
103a8fea
LB		 2661 int retval;
2662
57a42a34 2663 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 2664
2665 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 2666 if (retval != 0)
2667 err(1, "%s: failed to parse format", proc_stat);
103a8fea 2668
c98d5d94
LB		 2669 while (1) {
2670 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 2671 if (retval != 1)
2672 break;
2673
c98d5d94
LB		 2674 retval = func(cpu_num);
2675 if (retval) {
2676 fclose(fp);
2677 return(retval);
2678 }
103a8fea
LB		 2679 }
2680 fclose(fp);
c98d5d94 2681 return 0;
103a8fea
LB		 2682}
2683
2684void re_initialize(void)
2685{
c98d5d94
LB		 2686 free_all_buffers();
2687 setup_all_buffers();
2688 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 2689}
2690
843c5791
PB		 2691void set_max_cpu_num(void)
2692{
2693 FILE *filep;
2694 unsigned long dummy;
2695
2696 topo.max_cpu_num = 0;
2697 filep = fopen_or_die(
2698 "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2699 "r");
2700 while (fscanf(filep, "%lx,", &dummy) == 1)
0e2d8f05 2701 topo.max_cpu_num += BITMASK_SIZE;
843c5791
PB		 2702 fclose(filep);
2703 topo.max_cpu_num--; /* 0 based */
2704}
c98d5d94 2705
103a8fea 2706/*
c98d5d94
LB		 2707 * count_cpus()
2708 * remember the last one seen, it will be the max
103a8fea 2709 */
c98d5d94 2710int count_cpus(int cpu)
103a8fea 2711{
843c5791 2712 topo.num_cpus++;
c98d5d94
LB		 2713 return 0;
2714}
2715int mark_cpu_present(int cpu)
2716{
2717 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 2718 return 0;
103a8fea
LB		 2719}
2720
8cb48b32
PB		 2721int init_thread_id(int cpu)
2722{
2723 cpus[cpu].thread_id = -1;
2724 return 0;
2725}
2726
562a2d37
LB		 2727/*
2728 * snapshot_proc_interrupts()
2729 *
2730 * read and record summary of /proc/interrupts
2731 *
2732 * return 1 if config change requires a restart, else return 0
2733 */
2734int snapshot_proc_interrupts(void)
2735{
2736 static FILE *fp;
2737 int column, retval;
2738
2739 if (fp == NULL)
2740 fp = fopen_or_die("/proc/interrupts", "r");
2741 else
2742 rewind(fp);
2743
2744 /* read 1st line of /proc/interrupts to get cpu* name for each column */
2745 for (column = 0; column < topo.num_cpus; ++column) {
2746 int cpu_number;
2747
2748 retval = fscanf(fp, " CPU%d", &cpu_number);
2749 if (retval != 1)
2750 break;
2751
2752 if (cpu_number > topo.max_cpu_num) {
2753 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2754 return 1;
2755 }
2756
2757 irq_column_2_cpu[column] = cpu_number;
2758 irqs_per_cpu[cpu_number] = 0;
2759 }
2760
2761 /* read /proc/interrupt count lines and sum up irqs per cpu */
2762 while (1) {
2763 int column;
2764 char buf[64];
2765
2766 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
2767 if (retval != 1)
2768 break;
2769
2770 /* read the count per cpu */
2771 for (column = 0; column < topo.num_cpus; ++column) {
2772
2773 int cpu_number, irq_count;
2774
2775 retval = fscanf(fp, " %d", &irq_count);
2776 if (retval != 1)
2777 break;
2778
2779 cpu_number = irq_column_2_cpu[column];
2780 irqs_per_cpu[cpu_number] += irq_count;
2781
2782 }
2783
2784 while (getc(fp) != '\n')
2785 ; /* flush interrupt description */
2786
2787 }
2788 return 0;
2789}
fdf676e5
LB		 2790/*
2791 * snapshot_gfx_rc6_ms()
2792 *
2793 * record snapshot of
2794 * /sys/class/drm/card0/power/rc6_residency_ms
2795 *
2796 * return 1 if config change requires a restart, else return 0
2797 */
2798int snapshot_gfx_rc6_ms(void)
2799{
2800 FILE *fp;
2801 int retval;
2802
2803 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2804
2805 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2806 if (retval != 1)
2807 err(1, "GFX rc6");
2808
2809 fclose(fp);
2810
2811 return 0;
2812}
27d47356
LB		 2813/*
2814 * snapshot_gfx_mhz()
2815 *
2816 * record snapshot of
2817 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2818 *
2819 * return 1 if config change requires a restart, else return 0
2820 */
2821int snapshot_gfx_mhz(void)
2822{
2823 static FILE *fp;
2824 int retval;
2825
2826 if (fp == NULL)
2827 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
22048c54 2828 else {
27d47356 2829 rewind(fp);
22048c54
LB		 2830 fflush(fp);
2831 }
27d47356
LB		 2832
2833 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2834 if (retval != 1)
2835 err(1, "GFX MHz");
2836
2837 return 0;
2838}
562a2d37 2839
be0e54c4
LB		 2840/*
2841 * snapshot_cpu_lpi()
2842 *
2843 * record snapshot of
2844 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2845 *
2846 * return 1 if config change requires a restart, else return 0
2847 */
2848int snapshot_cpu_lpi_us(void)
2849{
2850 FILE *fp;
2851 int retval;
2852
2853 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2854
2855 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
2856 if (retval != 1)
2857 err(1, "CPU LPI");
2858
2859 fclose(fp);
2860
2861 return 0;
2862}
2863/*
2864 * snapshot_sys_lpi()
2865 *
2866 * record snapshot of
2867 * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2868 *
2869 * return 1 if config change requires a restart, else return 0
2870 */
2871int snapshot_sys_lpi_us(void)
2872{
2873 FILE *fp;
2874 int retval;
2875
2876 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2877
2878 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
2879 if (retval != 1)
2880 err(1, "SYS LPI");
2881
2882 fclose(fp);
2883
2884 return 0;
2885}
562a2d37
LB		 2886/*
2887 * snapshot /proc and /sys files
2888 *
2889 * return 1 if configuration restart needed, else return 0
2890 */
2891int snapshot_proc_sysfs_files(void)
2892{
218f0e8d
LB		 2893 if (DO_BIC(BIC_IRQ))
2894 if (snapshot_proc_interrupts())
2895 return 1;
562a2d37 2896
812db3f7 2897 if (DO_BIC(BIC_GFX_rc6))
fdf676e5
LB		 2898 snapshot_gfx_rc6_ms();
2899
812db3f7 2900 if (DO_BIC(BIC_GFXMHz))
27d47356
LB		 2901 snapshot_gfx_mhz();
2902
be0e54c4
LB		 2903 if (DO_BIC(BIC_CPU_LPI))
2904 snapshot_cpu_lpi_us();
2905
2906 if (DO_BIC(BIC_SYS_LPI))
2907 snapshot_sys_lpi_us();
2908
562a2d37
LB		 2909 return 0;
2910}
2911
8aa2ed0b
LB		 2912int exit_requested;
2913
2914static void signal_handler (int signal)
2915{
2916 switch (signal) {
2917 case SIGINT:
2918 exit_requested = 1;
2919 if (debug)
2920 fprintf(stderr, " SIGINT\n");
2921 break;
07211960
LB		 2922 case SIGUSR1:
2923 if (debug > 1)
2924 fprintf(stderr, "SIGUSR1\n");
2925 break;
8aa2ed0b 2926 }
b9ad8ee0
LB		 2927 /* make sure this manually-invoked interval is at least 1ms long */
2928 nanosleep(&one_msec, NULL);
8aa2ed0b
LB		 2929}
2930
2931void setup_signal_handler(void)
2932{
2933 struct sigaction sa;
2934
2935 memset(&sa, 0, sizeof(sa));
2936
2937 sa.sa_handler = &signal_handler;
2938
2939 if (sigaction(SIGINT, &sa, NULL) < 0)
2940 err(1, "sigaction SIGINT");
07211960
LB		 2941 if (sigaction(SIGUSR1, &sa, NULL) < 0)
2942 err(1, "sigaction SIGUSR1");
8aa2ed0b 2943}
b9ad8ee0 2944
47936f94 2945void do_sleep(void)
b9ad8ee0
LB		 2946{
2947 struct timeval select_timeout;
2948 fd_set readfds;
2949 int retval;
2950
2951 FD_ZERO(&readfds);
2952 FD_SET(0, &readfds);
2953
47936f94
AB		 2954 if (!isatty(fileno(stdin))) {
2955 nanosleep(&interval_ts, NULL);
2956 return;
2957 }
b9ad8ee0 2958
47936f94 2959 select_timeout = interval_tv;
b9ad8ee0
LB		 2960 retval = select(1, &readfds, NULL, NULL, &select_timeout);
2961
2962 if (retval == 1) {
b9ad8ee0
LB		 2963 switch (getc(stdin)) {
2964 case 'q':
2965 exit_requested = 1;
2966 break;
2967 }
2968 /* make sure this manually-invoked interval is at least 1ms long */
2969 nanosleep(&one_msec, NULL);
2970 }
b9ad8ee0 2971}
47936f94 2972
4c2122d4 2973
103a8fea
LB		 2974void turbostat_loop()
2975{
c98d5d94 2976 int retval;
e52966c0 2977 int restarted = 0;
023fe0ac 2978 int done_iters = 0;
c98d5d94 2979
8aa2ed0b
LB		 2980 setup_signal_handler();
2981
103a8fea 2982restart:
e52966c0
LB		 2983 restarted++;
2984
562a2d37 2985 snapshot_proc_sysfs_files();
c98d5d94 2986 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 2987 first_counter_read = 0;
d91bb17c
LB		 2988 if (retval < -1) {
2989 exit(retval);
2990 } else if (retval == -1) {
e52966c0
LB		 2991 if (restarted > 1) {
2992 exit(retval);
2993 }
c98d5d94
LB		 2994 re_initialize();
2995 goto restart;
2996 }
e52966c0 2997 restarted = 0;
023fe0ac 2998 done_iters = 0;
103a8fea
LB		 2999 gettimeofday(&tv_even, (struct timezone *)NULL);
3000
3001 while (1) {
c98d5d94 3002 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 3003 re_initialize();
3004 goto restart;
3005 }
b9ad8ee0 3006 do_sleep();
562a2d37
LB		 3007 if (snapshot_proc_sysfs_files())
3008 goto restart;
c98d5d94 3009 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 3010 if (retval < -1) {
3011 exit(retval);
3012 } else if (retval == -1) {
15aaa346
LB		 3013 re_initialize();
3014 goto restart;
3015 }
103a8fea 3016 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3017 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 3018 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
3019 re_initialize();
3020 goto restart;
3021 }
c98d5d94
LB		 3022 compute_average(EVEN_COUNTERS);
3023 format_all_counters(EVEN_COUNTERS);
b7d8c148 3024 flush_output_stdout();
8aa2ed0b
LB		 3025 if (exit_requested)
3026 break;
023fe0ac
CY		 3027 if (num_iterations && ++done_iters >= num_iterations)
3028 break;
b9ad8ee0 3029 do_sleep();
562a2d37
LB		 3030 if (snapshot_proc_sysfs_files())
3031 goto restart;
c98d5d94 3032 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 3033 if (retval < -1) {
3034 exit(retval);
3035 } else if (retval == -1) {
103a8fea
LB		 3036 re_initialize();
3037 goto restart;
3038 }
103a8fea 3039 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 3040 timersub(&tv_even, &tv_odd, &tv_delta);
ba3dec99
LB		 3041 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
3042 re_initialize();
3043 goto restart;
3044 }
c98d5d94
LB		 3045 compute_average(ODD_COUNTERS);
3046 format_all_counters(ODD_COUNTERS);
b7d8c148 3047 flush_output_stdout();
8aa2ed0b
LB		 3048 if (exit_requested)
3049 break;
023fe0ac
CY		 3050 if (num_iterations && ++done_iters >= num_iterations)
3051 break;
103a8fea
LB		 3052 }
3053}
3054
3055void check_dev_msr()
3056{
3057 struct stat sb;
7ce7d5de 3058 char pathname[32];
103a8fea 3059
7ce7d5de
PB		 3060 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3061 if (stat(pathname, &sb))
a21d38c8
LB		 3062 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
3063 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 3064}
3065
98481e79 3066void check_permissions()
103a8fea 3067{
98481e79
LB		 3068 struct __user_cap_header_struct cap_header_data;
3069 cap_user_header_t cap_header = &cap_header_data;
3070 struct __user_cap_data_struct cap_data_data;
3071 cap_user_data_t cap_data = &cap_data_data;
3072 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
3073 int do_exit = 0;
7ce7d5de 3074 char pathname[32];
98481e79
LB		 3075
3076 /* check for CAP_SYS_RAWIO */
3077 cap_header->pid = getpid();
3078 cap_header->version = _LINUX_CAPABILITY_VERSION;
3079 if (capget(cap_header, cap_data) < 0)
3080 err(-6, "capget(2) failed");
3081
3082 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
3083 do_exit++;
3084 warnx("capget(CAP_SYS_RAWIO) failed,"
3085 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
3086 }
3087
3088 /* test file permissions */
7ce7d5de
PB		 3089 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
3090 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 3091 do_exit++;
3092 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3093 }
3094
3095 /* if all else fails, thell them to be root */
3096 if (do_exit)
3097 if (getuid() != 0)
d7899447 3098 warnx("... or simply run as root");
98481e79
LB		 3099
3100 if (do_exit)
3101 exit(-6);
103a8fea
LB		 3102}
3103
d7899447
LB		 3104/*
3105 * NHM adds support for additional MSRs:
3106 *
3107 * MSR_SMI_COUNT 0x00000034
3108 *
ec0adc53 3109 * MSR_PLATFORM_INFO 0x000000ce
1df2e55a 3110 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
d7899447 3111 *
cf4cbe53
LB		 3112 * MSR_MISC_PWR_MGMT 0x000001aa
3113 *
d7899447
LB		 3114 * MSR_PKG_C3_RESIDENCY 0x000003f8
3115 * MSR_PKG_C6_RESIDENCY 0x000003f9
3116 * MSR_CORE_C3_RESIDENCY 0x000003fc
3117 * MSR_CORE_C6_RESIDENCY 0x000003fd
3118 *
ee7e38e3 3119 * Side effect:
1df2e55a 3120 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
33148d67 3121 * sets has_misc_feature_control
d7899447 3122 */
ee7e38e3 3123int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 3124{
ee7e38e3 3125 unsigned long long msr;
21ed5574 3126 unsigned int base_ratio;
ee7e38e3
LB		 3127 int *pkg_cstate_limits;
3128
103a8fea
LB		 3129 if (!genuine_intel)
3130 return 0;
3131
3132 if (family != 6)
3133 return 0;
3134
21ed5574
LB		 3135 bclk = discover_bclk(family, model);
3136
103a8fea 3137 switch (model) {
869ce69e 3138 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
869ce69e 3139 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
ee7e38e3
LB		 3140 pkg_cstate_limits = nhm_pkg_cstate_limits;
3141 break;
869ce69e
LB		 3142 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3143 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3144 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3145 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
ee7e38e3 3146 pkg_cstate_limits = snb_pkg_cstate_limits;
33148d67 3147 has_misc_feature_control = 1;
ee7e38e3 3148 break;
869ce69e
LB		 3149 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3150 case INTEL_FAM6_HASWELL_X: /* HSX */
869ce69e
LB		 3151 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3152 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3153 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3154 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3155 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3156 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
ee7e38e3 3157 pkg_cstate_limits = hsw_pkg_cstate_limits;
33148d67 3158 has_misc_feature_control = 1;
ee7e38e3 3159 break;
d8ebb442
LB		 3160 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3161 pkg_cstate_limits = skx_pkg_cstate_limits;
33148d67 3162 has_misc_feature_control = 1;
d8ebb442 3163 break;
f2c4db1b 3164 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
cf4cbe53 3165 no_MSR_MISC_PWR_MGMT = 1;
f2c4db1b 3166 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
ee7e38e3
LB		 3167 pkg_cstate_limits = slv_pkg_cstate_limits;
3168 break;
869ce69e 3169 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
ee7e38e3 3170 pkg_cstate_limits = amt_pkg_cstate_limits;
cf4cbe53 3171 no_MSR_MISC_PWR_MGMT = 1;
ee7e38e3 3172 break;
869ce69e 3173 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
ee7e38e3
LB		 3174 pkg_cstate_limits = phi_pkg_cstate_limits;
3175 break;
869ce69e 3176 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 3177 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
3178 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
445640a5 3179 pkg_cstate_limits = glm_pkg_cstate_limits;
e4085d54 3180 break;
103a8fea
LB		 3181 default:
3182 return 0;
3183 }
1df2e55a 3184 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
e9257f5f 3185 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 3186
ec0adc53 3187 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 3188 base_ratio = (msr >> 8) & 0xFF;
3189
3190 base_hz = base_ratio * bclk * 1000000;
3191 has_base_hz = 1;
ee7e38e3 3192 return 1;
103a8fea 3193}
0f7887c4 3194/*
495c7654 3195 * SLV client has support for unique MSRs:
0f7887c4
LB		 3196 *
3197 * MSR_CC6_DEMOTION_POLICY_CONFIG
3198 * MSR_MC6_DEMOTION_POLICY_CONFIG
3199 */
3200
3201int has_slv_msrs(unsigned int family, unsigned int model)
3202{
3203 if (!genuine_intel)
3204 return 0;
3205
3206 switch (model) {
f2c4db1b
PZ		 3207 case INTEL_FAM6_ATOM_SILVERMONT:
3208 case INTEL_FAM6_ATOM_SILVERMONT_MID:
3209 case INTEL_FAM6_ATOM_AIRMONT_MID:
0f7887c4
LB		 3210 return 1;
3211 }
3212 return 0;
3213}
7170a374
LB		 3214int is_dnv(unsigned int family, unsigned int model)
3215{
3216
3217 if (!genuine_intel)
3218 return 0;
3219
3220 switch (model) {
f2c4db1b 3221 case INTEL_FAM6_ATOM_GOLDMONT_X:
7170a374
LB		 3222 return 1;
3223 }
3224 return 0;
3225}
ade0ebac
LB		 3226int is_bdx(unsigned int family, unsigned int model)
3227{
3228
3229 if (!genuine_intel)
3230 return 0;
3231
3232 switch (model) {
3233 case INTEL_FAM6_BROADWELL_X:
ade0ebac
LB		 3234 return 1;
3235 }
3236 return 0;
3237}
34c76197
LB		 3238int is_skx(unsigned int family, unsigned int model)
3239{
3240
3241 if (!genuine_intel)
3242 return 0;
3243
3244 switch (model) {
3245 case INTEL_FAM6_SKYLAKE_X:
3246 return 1;
3247 }
3248 return 0;
3249}
0f7887c4 3250
31e07522 3251int has_turbo_ratio_limit(unsigned int family, unsigned int model)
d7899447 3252{
0f7887c4
LB		 3253 if (has_slv_msrs(family, model))
3254 return 0;
3255
d7899447
LB		 3256 switch (model) {
3257 /* Nehalem compatible, but do not include turbo-ratio limit support */
869ce69e 3258 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
869ce69e 3259 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
d7899447
LB		 3260 return 0;
3261 default:
3262 return 1;
3263 }
3264}
0f7887c4
LB		 3265int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3266{
3267 if (has_slv_msrs(family, model))
3268 return 1;
3269
3270 return 0;
3271}
6574a5d5
LB		 3272int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3273{
3274 if (!genuine_intel)
3275 return 0;
3276
3277 if (family != 6)
3278 return 0;
3279
3280 switch (model) {
869ce69e
LB		 3281 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3282 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
fcd17211
LB		 3283 return 1;
3284 default:
3285 return 0;
3286 }
3287}
3288int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3289{
3290 if (!genuine_intel)
3291 return 0;
3292
3293 if (family != 6)
3294 return 0;
3295
3296 switch (model) {
869ce69e 3297 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
6574a5d5
LB		 3298 return 1;
3299 default:
3300 return 0;
3301 }
3302}
3303
fb5d4327
DC		 3304int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3305{
3306 if (!genuine_intel)
3307 return 0;
3308
3309 if (family != 6)
3310 return 0;
3311
3312 switch (model) {
869ce69e 3313 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
fb5d4327
DC		 3314 return 1;
3315 default:
3316 return 0;
3317 }
3318}
31e07522
LB		 3319int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3320{
3321 if (!genuine_intel)
3322 return 0;
3323
3324 if (family != 6)
3325 return 0;
3326
3327 switch (model) {
3328 case INTEL_FAM6_ATOM_GOLDMONT:
3329 case INTEL_FAM6_SKYLAKE_X:
3330 return 1;
3331 default:
3332 return 0;
3333 }
3334}
6fb3143b
LB		 3335int has_config_tdp(unsigned int family, unsigned int model)
3336{
3337 if (!genuine_intel)
3338 return 0;
3339
3340 if (family != 6)
3341 return 0;
3342
3343 switch (model) {
869ce69e
LB		 3344 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3345 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3346 case INTEL_FAM6_HASWELL_X: /* HSX */
869ce69e
LB		 3347 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3348 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3349 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3350 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3351 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3352 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e
LB		 3353 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3354
3355 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
6fb3143b
LB		 3356 return 1;
3357 default:
3358 return 0;
3359 }
3360}
3361
fcd17211 3362static void
1b69317d 3363dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
fcd17211
LB		 3364{
3365 if (!do_nhm_platform_info)
3366 return;
3367
3368 dump_nhm_platform_info();
3369
3370 if (has_hsw_turbo_ratio_limit(family, model))
3371 dump_hsw_turbo_ratio_limits();
3372
3373 if (has_ivt_turbo_ratio_limit(family, model))
3374 dump_ivt_turbo_ratio_limits();
3375
31e07522
LB		 3376 if (has_turbo_ratio_limit(family, model))
3377 dump_turbo_ratio_limits(family, model);
fcd17211 3378
0f7887c4
LB		 3379 if (has_atom_turbo_ratio_limit(family, model))
3380 dump_atom_turbo_ratio_limits();
3381
fb5d4327
DC		 3382 if (has_knl_turbo_ratio_limit(family, model))
3383 dump_knl_turbo_ratio_limits();
3384
6fb3143b
LB		 3385 if (has_config_tdp(family, model))
3386 dump_config_tdp();
3387
fcd17211
LB		 3388 dump_nhm_cst_cfg();
3389}
3390
41618e63
LB		 3391static void
3392dump_sysfs_cstate_config(void)
3393{
3394 char path[64];
3395 char name_buf[16];
3396 char desc[64];
3397 FILE *input;
3398 int state;
3399 char *sp;
3400
3401 if (!DO_BIC(BIC_sysfs))
3402 return;
3403
3404 for (state = 0; state < 10; ++state) {
3405
3406 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3407 base_cpu, state);
3408 input = fopen(path, "r");
3409 if (input == NULL)
3410 continue;
3411 fgets(name_buf, sizeof(name_buf), input);
3412
3413 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3414 sp = strchr(name_buf, '-');
3415 if (!sp)
3416 sp = strchrnul(name_buf, '\n');
3417 *sp = '\0';
3418
3419 fclose(input);
3420
3421 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3422 base_cpu, state);
3423 input = fopen(path, "r");
3424 if (input == NULL)
3425 continue;
3426 fgets(desc, sizeof(desc), input);
3427
3428 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3429 fclose(input);
3430 }
3431}
7293fccd
LB		 3432static void
3433dump_sysfs_pstate_config(void)
3434{
3435 char path[64];
3436 char driver_buf[64];
3437 char governor_buf[64];
3438 FILE *input;
3439 int turbo;
3440
3441 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3442 base_cpu);
3443 input = fopen(path, "r");
3444 if (input == NULL) {
3445 fprintf(stderr, "NSFOD %s\n", path);
3446 return;
3447 }
3448 fgets(driver_buf, sizeof(driver_buf), input);
3449 fclose(input);
3450
3451 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3452 base_cpu);
3453 input = fopen(path, "r");
3454 if (input == NULL) {
3455 fprintf(stderr, "NSFOD %s\n", path);
3456 return;
3457 }
3458 fgets(governor_buf, sizeof(governor_buf), input);
3459 fclose(input);
3460
3461 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3462 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3463
3464 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3465 input = fopen(path, "r");
3466 if (input != NULL) {
3467 fscanf(input, "%d", &turbo);
3468 fprintf(outf, "cpufreq boost: %d\n", turbo);
3469 fclose(input);
3470 }
3471
3472 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3473 input = fopen(path, "r");
3474 if (input != NULL) {
3475 fscanf(input, "%d", &turbo);
3476 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3477 fclose(input);
3478 }
3479}
41618e63 3480
fcd17211 3481
889facbe
LB		 3482/*
3483 * print_epb()
3484 * Decode the ENERGY_PERF_BIAS MSR
3485 */
3486int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3487{
3488 unsigned long long msr;
3489 char *epb_string;
3490 int cpu;
3491
3492 if (!has_epb)
3493 return 0;
3494
3495 cpu = t->cpu_id;
3496
3497 /* EPB is per-package */
3498 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3499 return 0;
3500
3501 if (cpu_migrate(cpu)) {
b7d8c148 3502 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 3503 return -1;
3504 }
3505
3506 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3507 return 0;
3508
e9be7dd6 3509 switch (msr & 0xF) {
889facbe
LB		 3510 case ENERGY_PERF_BIAS_PERFORMANCE:
3511 epb_string = "performance";
3512 break;
3513 case ENERGY_PERF_BIAS_NORMAL:
3514 epb_string = "balanced";
3515 break;
3516 case ENERGY_PERF_BIAS_POWERSAVE:
3517 epb_string = "powersave";
3518 break;
3519 default:
3520 epb_string = "custom";
3521 break;
3522 }
b7d8c148 3523 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
889facbe
LB		 3524
3525 return 0;
3526}
7f5c258e
LB		 3527/*
3528 * print_hwp()
3529 * Decode the MSR_HWP_CAPABILITIES
3530 */
3531int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3532{
3533 unsigned long long msr;
3534 int cpu;
3535
3536 if (!has_hwp)
3537 return 0;
3538
3539 cpu = t->cpu_id;
3540
3541 /* MSR_HWP_CAPABILITIES is per-package */
3542 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3543 return 0;
3544
3545 if (cpu_migrate(cpu)) {
b7d8c148 3546 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
7f5c258e
LB		 3547 return -1;
3548 }
3549
3550 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3551 return 0;
3552
b7d8c148 3553 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
7f5c258e
LB		 3554 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3555
3556 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3557 if ((msr & (1 << 0)) == 0)
3558 return 0;
3559
3560 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3561 return 0;
3562
b7d8c148 3563 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
6dbd25a2 3564 "(high %d guar %d eff %d low %d)\n",
7f5c258e
LB		 3565 cpu, msr,
3566 (unsigned int)HWP_HIGHEST_PERF(msr),
3567 (unsigned int)HWP_GUARANTEED_PERF(msr),
3568 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3569 (unsigned int)HWP_LOWEST_PERF(msr));
3570
3571 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3572 return 0;
3573
b7d8c148 3574 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
6dbd25a2 3575 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
7f5c258e
LB		 3576 cpu, msr,
3577 (unsigned int)(((msr) >> 0) & 0xff),
3578 (unsigned int)(((msr) >> 8) & 0xff),
3579 (unsigned int)(((msr) >> 16) & 0xff),
3580 (unsigned int)(((msr) >> 24) & 0xff),
3581 (unsigned int)(((msr) >> 32) & 0xff3),
3582 (unsigned int)(((msr) >> 42) & 0x1));
3583
3584 if (has_hwp_pkg) {
3585 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3586 return 0;
3587
b7d8c148 3588 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
6dbd25a2 3589 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
7f5c258e
LB		 3590 cpu, msr,
3591 (unsigned int)(((msr) >> 0) & 0xff),
3592 (unsigned int)(((msr) >> 8) & 0xff),
3593 (unsigned int)(((msr) >> 16) & 0xff),
3594 (unsigned int)(((msr) >> 24) & 0xff),
3595 (unsigned int)(((msr) >> 32) & 0xff3));
3596 }
3597 if (has_hwp_notify) {
3598 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3599 return 0;
3600
b7d8c148 3601 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
7f5c258e
LB		 3602 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3603 cpu, msr,
3604 ((msr) & 0x1) ? "EN" : "Dis",
3605 ((msr) & 0x2) ? "EN" : "Dis");
3606 }
3607 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3608 return 0;
3609
b7d8c148 3610 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
7f5c258e
LB		 3611 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3612 cpu, msr,
3613 ((msr) & 0x1) ? "" : "No-",
3614 ((msr) & 0x2) ? "" : "No-");
889facbe
LB		 3615
3616 return 0;
3617}
3618
3a9a941d
LB		 3619/*
3620 * print_perf_limit()
3621 */
3622int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3623{
3624 unsigned long long msr;
3625 int cpu;
3626
3627 cpu = t->cpu_id;
3628
3629 /* per-package */
3630 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3631 return 0;
3632
3633 if (cpu_migrate(cpu)) {
b7d8c148 3634 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3a9a941d
LB		 3635 return -1;
3636 }
3637
3638 if (do_core_perf_limit_reasons) {
3639 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3640 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3641 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 3642 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 3643 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 3644 (msr & 1 << 13) ? "Transitions, " : "",
3645 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3646 (msr & 1 << 11) ? "PkgPwrL2, " : "",
3647 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3648 (msr & 1 << 9) ? "CorePwr, " : "",
3649 (msr & 1 << 8) ? "Amps, " : "",
3650 (msr & 1 << 6) ? "VR-Therm, " : "",
3651 (msr & 1 << 5) ? "Auto-HWP, " : "",
3652 (msr & 1 << 4) ? "Graphics, " : "",
3653 (msr & 1 << 2) ? "bit2, " : "",
3654 (msr & 1 << 1) ? "ThermStatus, " : "",
3655 (msr & 1 << 0) ? "PROCHOT, " : "");
b7d8c148 3656 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 3657 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 3658 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 3659 (msr & 1 << 29) ? "Transitions, " : "",
3660 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3661 (msr & 1 << 27) ? "PkgPwrL2, " : "",
3662 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3663 (msr & 1 << 25) ? "CorePwr, " : "",
3664 (msr & 1 << 24) ? "Amps, " : "",
3665 (msr & 1 << 22) ? "VR-Therm, " : "",
3666 (msr & 1 << 21) ? "Auto-HWP, " : "",
3667 (msr & 1 << 20) ? "Graphics, " : "",
3668 (msr & 1 << 18) ? "bit18, " : "",
3669 (msr & 1 << 17) ? "ThermStatus, " : "",
3670 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 3671
3672 }
3673 if (do_gfx_perf_limit_reasons) {
3674 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3675 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3676 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3a9a941d
LB		 3677 (msr & 1 << 0) ? "PROCHOT, " : "",
3678 (msr & 1 << 1) ? "ThermStatus, " : "",
3679 (msr & 1 << 4) ? "Graphics, " : "",
3680 (msr & 1 << 6) ? "VR-Therm, " : "",
3681 (msr & 1 << 8) ? "Amps, " : "",
3682 (msr & 1 << 9) ? "GFXPwr, " : "",
3683 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3684 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3685 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3a9a941d
LB		 3686 (msr & 1 << 16) ? "PROCHOT, " : "",
3687 (msr & 1 << 17) ? "ThermStatus, " : "",
3688 (msr & 1 << 20) ? "Graphics, " : "",
3689 (msr & 1 << 22) ? "VR-Therm, " : "",
3690 (msr & 1 << 24) ? "Amps, " : "",
3691 (msr & 1 << 25) ? "GFXPwr, " : "",
3692 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3693 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3694 }
3695 if (do_ring_perf_limit_reasons) {
3696 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 3697 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3698 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3a9a941d
LB		 3699 (msr & 1 << 0) ? "PROCHOT, " : "",
3700 (msr & 1 << 1) ? "ThermStatus, " : "",
3701 (msr & 1 << 6) ? "VR-Therm, " : "",
3702 (msr & 1 << 8) ? "Amps, " : "",
3703 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3704 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 3705 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3a9a941d
LB		 3706 (msr & 1 << 16) ? "PROCHOT, " : "",
3707 (msr & 1 << 17) ? "ThermStatus, " : "",
3708 (msr & 1 << 22) ? "VR-Therm, " : "",
3709 (msr & 1 << 24) ? "Amps, " : "",
3710 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3711 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3712 }
3713 return 0;
3714}
3715
889facbe
LB		 3716#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
3717#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
3718
1b69317d 3719double get_tdp(unsigned int model)
144b44b1
LB		 3720{
3721 unsigned long long msr;
3722
3723 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 3724 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 3725 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3726
3727 switch (model) {
f2c4db1b
PZ		 3728 case INTEL_FAM6_ATOM_SILVERMONT:
3729 case INTEL_FAM6_ATOM_SILVERMONT_X:
144b44b1
LB		 3730 return 30.0;
3731 default:
3732 return 135.0;
3733 }
3734}
3735
40ee8e3b
AS		 3736/*
3737 * rapl_dram_energy_units_probe()
3738 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3739 */
3740static double
3741rapl_dram_energy_units_probe(int model, double rapl_energy_units)
3742{
3743 /* only called for genuine_intel, family 6 */
3744
3745 switch (model) {
869ce69e
LB		 3746 case INTEL_FAM6_HASWELL_X: /* HSX */
3747 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 3748 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
40ee8e3b
AS		 3749 return (rapl_dram_energy_units = 15.3 / 1000000);
3750 default:
3751 return (rapl_energy_units);
3752 }
3753}
3754
144b44b1 3755
889facbe
LB		 3756/*
3757 * rapl_probe()
3758 *
144b44b1 3759 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 3760 */
3761void rapl_probe(unsigned int family, unsigned int model)
3762{
3763 unsigned long long msr;
144b44b1 3764 unsigned int time_unit;
889facbe
LB		 3765 double tdp;
3766
3767 if (!genuine_intel)
3768 return;
3769
3770 if (family != 6)
3771 return;
3772
3773 switch (model) {
869ce69e
LB		 3774 case INTEL_FAM6_SANDYBRIDGE:
3775 case INTEL_FAM6_IVYBRIDGE:
3776 case INTEL_FAM6_HASWELL_CORE: /* HSW */
869ce69e
LB		 3777 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3778 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3779 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
144b44b1 3780 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3781 if (rapl_joules) {
3782 BIC_PRESENT(BIC_Pkg_J);
3783 BIC_PRESENT(BIC_Cor_J);
3784 BIC_PRESENT(BIC_GFX_J);
3785 } else {
3786 BIC_PRESENT(BIC_PkgWatt);
3787 BIC_PRESENT(BIC_CorWatt);
3788 BIC_PRESENT(BIC_GFXWatt);
3789 }
889facbe 3790 break;
869ce69e 3791 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 3792 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e4085d54 3793 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3794 if (rapl_joules)
3795 BIC_PRESENT(BIC_Pkg_J);
3796 else
3797 BIC_PRESENT(BIC_PkgWatt);
e4085d54 3798 break;
869ce69e 3799 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 3800 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
81824921 3801 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3802 BIC_PRESENT(BIC_PKG__);
3803 BIC_PRESENT(BIC_RAM__);
3804 if (rapl_joules) {
3805 BIC_PRESENT(BIC_Pkg_J);
3806 BIC_PRESENT(BIC_Cor_J);
3807 BIC_PRESENT(BIC_RAM_J);
81824921 3808 BIC_PRESENT(BIC_GFX_J);
812db3f7
LB		 3809 } else {
3810 BIC_PRESENT(BIC_PkgWatt);
3811 BIC_PRESENT(BIC_CorWatt);
3812 BIC_PRESENT(BIC_RAMWatt);
81824921 3813 BIC_PRESENT(BIC_GFXWatt);
812db3f7 3814 }
0b2bb692 3815 break;
869ce69e
LB		 3816 case INTEL_FAM6_HASWELL_X: /* HSX */
3817 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e
LB		 3818 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3819 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
0b2bb692 3820 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3821 BIC_PRESENT(BIC_PKG__);
3822 BIC_PRESENT(BIC_RAM__);
3823 if (rapl_joules) {
3824 BIC_PRESENT(BIC_Pkg_J);
3825 BIC_PRESENT(BIC_RAM_J);
3826 } else {
3827 BIC_PRESENT(BIC_PkgWatt);
3828 BIC_PRESENT(BIC_RAMWatt);
3829 }
e6f9bb3c 3830 break;
869ce69e
LB		 3831 case INTEL_FAM6_SANDYBRIDGE_X:
3832 case INTEL_FAM6_IVYBRIDGE_X:
0b2bb692 3833 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
812db3f7
LB		 3834 BIC_PRESENT(BIC_PKG__);
3835 BIC_PRESENT(BIC_RAM__);
3836 if (rapl_joules) {
3837 BIC_PRESENT(BIC_Pkg_J);
3838 BIC_PRESENT(BIC_Cor_J);
3839 BIC_PRESENT(BIC_RAM_J);
3840 } else {
3841 BIC_PRESENT(BIC_PkgWatt);
3842 BIC_PRESENT(BIC_CorWatt);
3843 BIC_PRESENT(BIC_RAMWatt);
3844 }
144b44b1 3845 break;
f2c4db1b
PZ		 3846 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
3847 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
9148494c 3848 do_rapl = RAPL_PKG | RAPL_CORES;
812db3f7
LB		 3849 if (rapl_joules) {
3850 BIC_PRESENT(BIC_Pkg_J);
3851 BIC_PRESENT(BIC_Cor_J);
3852 } else {
3853 BIC_PRESENT(BIC_PkgWatt);
3854 BIC_PRESENT(BIC_CorWatt);
3855 }
889facbe 3856 break;
f2c4db1b 3857 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
0f644909 3858 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
812db3f7
LB		 3859 BIC_PRESENT(BIC_PKG__);
3860 BIC_PRESENT(BIC_RAM__);
3861 if (rapl_joules) {
3862 BIC_PRESENT(BIC_Pkg_J);
3863 BIC_PRESENT(BIC_Cor_J);
3864 BIC_PRESENT(BIC_RAM_J);
3865 } else {
3866 BIC_PRESENT(BIC_PkgWatt);
3867 BIC_PRESENT(BIC_CorWatt);
3868 BIC_PRESENT(BIC_RAMWatt);
3869 }
0f644909 3870 break;
889facbe
LB		 3871 default:
3872 return;
3873 }
3874
3875 /* units on package 0, verify later other packages match */
7ce7d5de 3876 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 3877 return;
3878
3879 rapl_power_units = 1.0 / (1 << (msr & 0xF));
f2c4db1b 3880 if (model == INTEL_FAM6_ATOM_SILVERMONT)
144b44b1
LB		 3881 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3882 else
3883 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 3884
40ee8e3b
AS		 3885 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3886
144b44b1
LB		 3887 time_unit = msr >> 16 & 0xF;
3888 if (time_unit == 0)
3889 time_unit = 0xA;
889facbe 3890
144b44b1 3891 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 3892
144b44b1 3893 tdp = get_tdp(model);
889facbe 3894
144b44b1 3895 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
96e47158 3896 if (!quiet)
b7d8c148 3897 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 3898
3899 return;
3900}
3901
1b69317d 3902void perf_limit_reasons_probe(unsigned int family, unsigned int model)
3a9a941d
LB		 3903{
3904 if (!genuine_intel)
3905 return;
3906
3907 if (family != 6)
3908 return;
3909
3910 switch (model) {
869ce69e 3911 case INTEL_FAM6_HASWELL_CORE: /* HSW */
869ce69e 3912 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3a9a941d 3913 do_gfx_perf_limit_reasons = 1;
869ce69e 3914 case INTEL_FAM6_HASWELL_X: /* HSX */
3a9a941d
LB		 3915 do_core_perf_limit_reasons = 1;
3916 do_ring_perf_limit_reasons = 1;
3917 default:
3918 return;
3919 }
3920}
3921
ac980e13
AB		 3922void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
3923{
3924 if (is_skx(family, model) || is_bdx(family, model))
3925 has_automatic_cstate_conversion = 1;
3926}
3927
889facbe
LB		 3928int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3929{
3930 unsigned long long msr;
f4896fa5 3931 unsigned int dts, dts2;
889facbe
LB		 3932 int cpu;
3933
3934 if (!(do_dts || do_ptm))
3935 return 0;
3936
3937 cpu = t->cpu_id;
3938
3939 /* DTS is per-core, no need to print for each thread */
388e9c81 3940 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
889facbe
LB		 3941 return 0;
3942
3943 if (cpu_migrate(cpu)) {
b7d8c148 3944 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 3945 return -1;
3946 }
3947
3948 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
3949 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
3950 return 0;
3951
3952 dts = (msr >> 16) & 0x7F;
b7d8c148 3953 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
889facbe
LB		 3954 cpu, msr, tcc_activation_temp - dts);
3955
889facbe
LB		 3956 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
3957 return 0;
3958
3959 dts = (msr >> 16) & 0x7F;
3960 dts2 = (msr >> 8) & 0x7F;
b7d8c148 3961 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 3962 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 3963 }
3964
3965
f4896fa5 3966 if (do_dts && debug) {
889facbe
LB		 3967 unsigned int resolution;
3968
3969 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
3970 return 0;
3971
3972 dts = (msr >> 16) & 0x7F;
3973 resolution = (msr >> 27) & 0xF;
b7d8c148 3974 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
889facbe
LB		 3975 cpu, msr, tcc_activation_temp - dts, resolution);
3976
889facbe
LB		 3977 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
3978 return 0;
3979
3980 dts = (msr >> 16) & 0x7F;
3981 dts2 = (msr >> 8) & 0x7F;
b7d8c148 3982 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe 3983 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
889facbe
LB		 3984 }
3985
3986 return 0;
3987}
36229897 3988
889facbe
LB		 3989void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
3990{
b7d8c148 3991 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
889facbe
LB		 3992 cpu, label,
3993 ((msr >> 15) & 1) ? "EN" : "DIS",
3994 ((msr >> 0) & 0x7FFF) * rapl_power_units,
3995 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
3996 (((msr >> 16) & 1) ? "EN" : "DIS"));
3997
3998 return;
3999}
4000
4001int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4002{
4003 unsigned long long msr;
4004 int cpu;
889facbe
LB		 4005
4006 if (!do_rapl)
4007 return 0;
4008
4009 /* RAPL counters are per package, so print only for 1st thread/package */
4010 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4011 return 0;
4012
4013 cpu = t->cpu_id;
4014 if (cpu_migrate(cpu)) {
b7d8c148 4015 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4016 return -1;
4017 }
4018
4019 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
4020 return -1;
4021
96e47158
LB		 4022 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr,
4023 rapl_power_units, rapl_energy_units, rapl_time_units);
4024
144b44b1
LB		 4025 if (do_rapl & RAPL_PKG_POWER_INFO) {
4026
889facbe
LB		 4027 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
4028 return -5;
4029
4030
b7d8c148 4031 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4032 cpu, msr,
4033 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4034 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4035 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4036 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4037
144b44b1
LB		 4038 }
4039 if (do_rapl & RAPL_PKG) {
4040
889facbe
LB		 4041 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
4042 return -9;
4043
b7d8c148 4044 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4045 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
889facbe
LB		 4046
4047 print_power_limit_msr(cpu, msr, "PKG Limit #1");
b7d8c148 4048 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
889facbe
LB		 4049 cpu,
4050 ((msr >> 47) & 1) ? "EN" : "DIS",
4051 ((msr >> 32) & 0x7FFF) * rapl_power_units,
4052 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
4053 ((msr >> 48) & 1) ? "EN" : "DIS");
4054 }
4055
0b2bb692 4056 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 4057 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
4058 return -6;
4059
b7d8c148 4060 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 4061 cpu, msr,
4062 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4063 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4064 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4065 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 4066 }
4067 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 4068 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4069 return -9;
b7d8c148 4070 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
96e47158 4071 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
889facbe
LB		 4072
4073 print_power_limit_msr(cpu, msr, "DRAM Limit");
4074 }
144b44b1 4075 if (do_rapl & RAPL_CORE_POLICY) {
96e47158
LB		 4076 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4077 return -7;
889facbe 4078
96e47158 4079 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1 4080 }
9148494c 4081 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
96e47158
LB		 4082 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4083 return -9;
4084 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4085 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4086 print_power_limit_msr(cpu, msr, "Cores Limit");
889facbe
LB		 4087 }
4088 if (do_rapl & RAPL_GFX) {
96e47158
LB		 4089 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4090 return -8;
889facbe 4091
96e47158 4092 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
889facbe 4093
96e47158
LB		 4094 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4095 return -9;
4096 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4097 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4098 print_power_limit_msr(cpu, msr, "GFX Limit");
889facbe
LB		 4099 }
4100 return 0;
4101}
4102
d7899447
LB		 4103/*
4104 * SNB adds support for additional MSRs:
4105 *
4106 * MSR_PKG_C7_RESIDENCY 0x000003fa
4107 * MSR_CORE_C7_RESIDENCY 0x000003fe
4108 * MSR_PKG_C2_RESIDENCY 0x0000060d
4109 */
103a8fea 4110
d7899447 4111int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 4112{
4113 if (!genuine_intel)
4114 return 0;
4115
4116 switch (model) {
869ce69e
LB		 4117 case INTEL_FAM6_SANDYBRIDGE:
4118 case INTEL_FAM6_SANDYBRIDGE_X:
4119 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4120 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
4121 case INTEL_FAM6_HASWELL_CORE: /* HSW */
4122 case INTEL_FAM6_HASWELL_X: /* HSW */
869ce69e
LB		 4123 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
4124 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4125 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
4126 case INTEL_FAM6_BROADWELL_X: /* BDX */
869ce69e 4127 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4128 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e
LB		 4129 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4130 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b
PZ		 4131 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
4132 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
103a8fea
LB		 4133 return 1;
4134 }
4135 return 0;
4136}
4137
d7899447
LB		 4138/*
4139 * HSW adds support for additional MSRs:
4140 *
5a63426e
LB		 4141 * MSR_PKG_C8_RESIDENCY 0x00000630
4142 * MSR_PKG_C9_RESIDENCY 0x00000631
4143 * MSR_PKG_C10_RESIDENCY 0x00000632
4144 *
4145 * MSR_PKGC8_IRTL 0x00000633
4146 * MSR_PKGC9_IRTL 0x00000634
4147 * MSR_PKGC10_IRTL 0x00000635
4148 *
d7899447
LB		 4149 */
4150int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 4151{
4152 if (!genuine_intel)
4153 return 0;
4154
4155 switch (model) {
f5a4c76a 4156 case INTEL_FAM6_HASWELL_CORE:
869ce69e
LB		 4157 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4158 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4159 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
869ce69e 4160 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4161 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
0b2bb692
LB		 4162 return 1;
4163 }
4164 return 0;
4165}
4166
4167/*
4168 * SKL adds support for additional MSRS:
4169 *
4170 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4171 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4172 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4173 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4174 */
4175int has_skl_msrs(unsigned int family, unsigned int model)
4176{
4177 if (!genuine_intel)
4178 return 0;
4179
4180 switch (model) {
869ce69e 4181 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
997e5395 4182 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
ca58710f
KCA		 4183 return 1;
4184 }
4185 return 0;
4186}
4187
144b44b1
LB		 4188int is_slm(unsigned int family, unsigned int model)
4189{
4190 if (!genuine_intel)
4191 return 0;
4192 switch (model) {
f2c4db1b
PZ		 4193 case INTEL_FAM6_ATOM_SILVERMONT: /* BYT */
4194 case INTEL_FAM6_ATOM_SILVERMONT_X: /* AVN */
144b44b1
LB		 4195 return 1;
4196 }
4197 return 0;
4198}
4199
fb5d4327
DC		 4200int is_knl(unsigned int family, unsigned int model)
4201{
4202 if (!genuine_intel)
4203 return 0;
4204 switch (model) {
869ce69e 4205 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
fb5d4327
DC		 4206 return 1;
4207 }
4208 return 0;
4209}
4210
997e5395
SP		 4211int is_cnl(unsigned int family, unsigned int model)
4212{
4213 if (!genuine_intel)
4214 return 0;
4215
4216 switch (model) {
4217 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4218 return 1;
4219 }
4220
4221 return 0;
4222}
4223
b2b34dfe
HC		 4224unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4225{
4226 if (is_knl(family, model))
4227 return 1024;
4228 return 1;
4229}
4230
144b44b1
LB		 4231#define SLM_BCLK_FREQS 5
4232double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4233
4234double slm_bclk(void)
4235{
4236 unsigned long long msr = 3;
4237 unsigned int i;
4238 double freq;
4239
7ce7d5de 4240 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
b7d8c148 4241 fprintf(outf, "SLM BCLK: unknown\n");
144b44b1
LB		 4242
4243 i = msr & 0xf;
4244 if (i >= SLM_BCLK_FREQS) {
b7d8c148 4245 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
0a91e551 4246 i = 3;
144b44b1
LB		 4247 }
4248 freq = slm_freq_table[i];
4249
96e47158 4250 if (!quiet)
8f6196c1 4251 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
144b44b1
LB		 4252
4253 return freq;
4254}
4255
103a8fea
LB		 4256double discover_bclk(unsigned int family, unsigned int model)
4257{
121b48bb 4258 if (has_snb_msrs(family, model) || is_knl(family, model))
103a8fea 4259 return 100.00;
144b44b1
LB		 4260 else if (is_slm(family, model))
4261 return slm_bclk();
103a8fea
LB		 4262 else
4263 return 133.33;
4264}
4265
889facbe
LB		 4266/*
4267 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4268 * the Thermal Control Circuit (TCC) activates.
4269 * This is usually equal to tjMax.
4270 *
4271 * Older processors do not have this MSR, so there we guess,
4272 * but also allow cmdline over-ride with -T.
4273 *
4274 * Several MSR temperature values are in units of degrees-C
4275 * below this value, including the Digital Thermal Sensor (DTS),
4276 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4277 */
4278int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4279{
4280 unsigned long long msr;
4281 unsigned int target_c_local;
4282 int cpu;
4283
4284 /* tcc_activation_temp is used only for dts or ptm */
4285 if (!(do_dts || do_ptm))
4286 return 0;
4287
4288 /* this is a per-package concept */
4289 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4290 return 0;
4291
4292 cpu = t->cpu_id;
4293 if (cpu_migrate(cpu)) {
b7d8c148 4294 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 4295 return -1;
4296 }
4297
4298 if (tcc_activation_temp_override != 0) {
4299 tcc_activation_temp = tcc_activation_temp_override;
b7d8c148 4300 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
889facbe
LB		 4301 cpu, tcc_activation_temp);
4302 return 0;
4303 }
4304
4305 /* Temperature Target MSR is Nehalem and newer only */
d7899447 4306 if (!do_nhm_platform_info)
889facbe
LB		 4307 goto guess;
4308
7ce7d5de 4309 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 4310 goto guess;
4311
3482124a 4312 target_c_local = (msr >> 16) & 0xFF;
889facbe 4313
96e47158 4314 if (!quiet)
b7d8c148 4315 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
889facbe
LB		 4316 cpu, msr, target_c_local);
4317
3482124a 4318 if (!target_c_local)
889facbe
LB		 4319 goto guess;
4320
4321 tcc_activation_temp = target_c_local;
4322
4323 return 0;
4324
4325guess:
4326 tcc_activation_temp = TJMAX_DEFAULT;
b7d8c148 4327 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
889facbe
LB		 4328 cpu, tcc_activation_temp);
4329
4330 return 0;
4331}
69807a63 4332
aa8d8cc7
LB		 4333void decode_feature_control_msr(void)
4334{
4335 unsigned long long msr;
4336
4337 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4338 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4339 base_cpu, msr,
4340 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4341 msr & (1 << 18) ? "SGX" : "");
4342}
4343
69807a63
LB		 4344void decode_misc_enable_msr(void)
4345{
4346 unsigned long long msr;
4347
f26b1519
LB		 4348 if (!genuine_intel)
4349 return;
4350
69807a63 4351 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
e6512624 4352 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
69807a63 4353 base_cpu, msr,
e6512624
LB		 4354 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4355 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
fd3933ca 4356 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
e6512624
LB		 4357 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4358 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
69807a63
LB		 4359}
4360
33148d67
LB		 4361void decode_misc_feature_control(void)
4362{
4363 unsigned long long msr;
4364
4365 if (!has_misc_feature_control)
4366 return;
4367
4368 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4369 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4370 base_cpu, msr,
4371 msr & (0 << 0) ? "No-" : "",
4372 msr & (1 << 0) ? "No-" : "",
4373 msr & (2 << 0) ? "No-" : "",
4374 msr & (3 << 0) ? "No-" : "");
4375}
f0057310
LB		 4376/*
4377 * Decode MSR_MISC_PWR_MGMT
4378 *
4379 * Decode the bits according to the Nehalem documentation
4380 * bit[0] seems to continue to have same meaning going forward
4381 * bit[1] less so...
4382 */
4383void decode_misc_pwr_mgmt_msr(void)
4384{
4385 unsigned long long msr;
4386
4387 if (!do_nhm_platform_info)
4388 return;
4389
cf4cbe53
LB		 4390 if (no_MSR_MISC_PWR_MGMT)
4391 return;
4392
f0057310 4393 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
ddadb8ad 4394 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
f0057310
LB		 4395 base_cpu, msr,
4396 msr & (1 << 0) ? "DIS" : "EN",
ddadb8ad
SP		 4397 msr & (1 << 1) ? "EN" : "DIS",
4398 msr & (1 << 8) ? "EN" : "DIS");
f0057310 4399}
71616c8e
LB		 4400/*
4401 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4402 *
4403 * This MSRs are present on Silvermont processors,
4404 * Intel Atom processor E3000 series (Baytrail), and friends.
4405 */
4406void decode_c6_demotion_policy_msr(void)
4407{
4408 unsigned long long msr;
4409
4410 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4411 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4412 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4413
4414 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4415 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4416 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4417}
7f5c258e 4418
f5a4c76a
LB		 4419/*
4420 * When models are the same, for the purpose of turbostat, reuse
4421 */
4422unsigned int intel_model_duplicates(unsigned int model)
4423{
4424
4425 switch(model) {
4426 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
4427 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
4428 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
4429 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
4430 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
4431 return INTEL_FAM6_NEHALEM;
4432
4433 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
4434 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
4435 return INTEL_FAM6_NEHALEM_EX;
4436
4437 case INTEL_FAM6_XEON_PHI_KNM:
4438 return INTEL_FAM6_XEON_PHI_KNL;
4439
4440 case INTEL_FAM6_HASWELL_ULT:
4441 return INTEL_FAM6_HASWELL_CORE;
4442
4443 case INTEL_FAM6_BROADWELL_X:
4444 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
4445 return INTEL_FAM6_BROADWELL_X;
4446
4447 case INTEL_FAM6_SKYLAKE_MOBILE:
4448 case INTEL_FAM6_SKYLAKE_DESKTOP:
4449 case INTEL_FAM6_KABYLAKE_MOBILE:
4450 case INTEL_FAM6_KABYLAKE_DESKTOP:
4451 return INTEL_FAM6_SKYLAKE_MOBILE;
937807d3
LB		 4452
4453 case INTEL_FAM6_ICELAKE_MOBILE:
4454 return INTEL_FAM6_CANNONLAKE_MOBILE;
f5a4c76a
LB		 4455 }
4456 return model;
4457}
fcd17211 4458void process_cpuid()
103a8fea 4459{
34041551
LB		 4460 unsigned int eax, ebx, ecx, edx;
4461 unsigned int fms, family, model, stepping, ecx_flags, edx_flags;
b3a34e93 4462 unsigned int has_turbo;
103a8fea
LB		 4463
4464 eax = ebx = ecx = edx = 0;
4465
5aea2f7f 4466 __cpuid(0, max_level, ebx, ecx, edx);
103a8fea 4467
34041551 4468 if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
103a8fea 4469 genuine_intel = 1;
34041551
LB		 4470 else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
4471 authentic_amd = 1;
103a8fea 4472
96e47158 4473 if (!quiet)
b7d8c148 4474 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 4475 (char *)&ebx, (char *)&edx, (char *)&ecx);
4476
5aea2f7f 4477 __cpuid(1, fms, ebx, ecx, edx);
103a8fea
LB		 4478 family = (fms >> 8) & 0xf;
4479 model = (fms >> 4) & 0xf;
4480 stepping = fms & 0xf;
5aa3d1a2
CW		 4481 if (family == 0xf)
4482 family += (fms >> 20) & 0xff;
4483 if (family >= 6)
103a8fea 4484 model += ((fms >> 16) & 0xf) << 4;
34041551
LB		 4485 ecx_flags = ecx;
4486 edx_flags = edx;
103a8fea
LB		 4487
4488 /*
4489 * check max extended function levels of CPUID.
4490 * This is needed to check for invariant TSC.
4491 * This check is valid for both Intel and AMD.
4492 */
4493 ebx = ecx = edx = 0;
5aea2f7f 4494 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
103a8fea 4495
34041551
LB		 4496 if (!quiet) {
4497 fprintf(outf, "0x%x CPUID levels; 0x%x xlevels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4498 max_level, max_extended_level, family, model, stepping, family, model, stepping);
4499 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s %s\n",
4500 ecx_flags & (1 << 0) ? "SSE3" : "-",
4501 ecx_flags & (1 << 3) ? "MONITOR" : "-",
4502 ecx_flags & (1 << 6) ? "SMX" : "-",
4503 ecx_flags & (1 << 7) ? "EIST" : "-",
4504 ecx_flags & (1 << 8) ? "TM2" : "-",
4505 edx_flags & (1 << 4) ? "TSC" : "-",
4506 edx_flags & (1 << 5) ? "MSR" : "-",
4507 edx_flags & (1 << 22) ? "ACPI-TM" : "-",
4508 edx_flags & (1 << 28) ? "HT" : "-",
4509 edx_flags & (1 << 29) ? "TM" : "-");
4510 }
f5a4c76a
LB		 4511 if (genuine_intel)
4512 model = intel_model_duplicates(model);
34041551
LB		 4513
4514 if (!(edx_flags & (1 << 5)))
4515 errx(1, "CPUID: no MSR");
4516
61a87ba7 4517 if (max_extended_level >= 0x80000007) {
103a8fea 4518
d7899447
LB		 4519 /*
4520 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4521 * this check is valid for both Intel and AMD
4522 */
5aea2f7f 4523 __cpuid(0x80000007, eax, ebx, ecx, edx);
d7899447
LB		 4524 has_invariant_tsc = edx & (1 << 8);
4525 }
103a8fea
LB		 4526
4527 /*
4528 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4529 * this check is valid for both Intel and AMD
4530 */
4531
5aea2f7f 4532 __cpuid(0x6, eax, ebx, ecx, edx);
8209e054 4533 has_aperf = ecx & (1 << 0);
812db3f7
LB		 4534 if (has_aperf) {
4535 BIC_PRESENT(BIC_Avg_MHz);
4536 BIC_PRESENT(BIC_Busy);
4537 BIC_PRESENT(BIC_Bzy_MHz);
4538 }
889facbe 4539 do_dts = eax & (1 << 0);
812db3f7
LB		 4540 if (do_dts)
4541 BIC_PRESENT(BIC_CoreTmp);
b3a34e93 4542 has_turbo = eax & (1 << 1);
889facbe 4543 do_ptm = eax & (1 << 6);
812db3f7
LB		 4544 if (do_ptm)
4545 BIC_PRESENT(BIC_PkgTmp);
7f5c258e
LB		 4546 has_hwp = eax & (1 << 7);
4547 has_hwp_notify = eax & (1 << 8);
4548 has_hwp_activity_window = eax & (1 << 9);
4549 has_hwp_epp = eax & (1 << 10);
4550 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 4551 has_epb = ecx & (1 << 3);
4552
96e47158 4553 if (!quiet)
b3a34e93 4554 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
7f5c258e
LB		 4555 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4556 has_aperf ? "" : "No-",
b3a34e93 4557 has_turbo ? "" : "No-",
7f5c258e
LB		 4558 do_dts ? "" : "No-",
4559 do_ptm ? "" : "No-",
4560 has_hwp ? "" : "No-",
4561 has_hwp_notify ? "" : "No-",
4562 has_hwp_activity_window ? "" : "No-",
4563 has_hwp_epp ? "" : "No-",
4564 has_hwp_pkg ? "" : "No-",
4565 has_epb ? "" : "No-");
103a8fea 4566
96e47158 4567 if (!quiet)
69807a63
LB		 4568 decode_misc_enable_msr();
4569
33148d67 4570
96e47158 4571 if (max_level >= 0x7 && !quiet) {
aa8d8cc7 4572 int has_sgx;
103a8fea 4573
aa8d8cc7
LB		 4574 ecx = 0;
4575
4576 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4577
4578 has_sgx = ebx & (1 << 2);
4579 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4580
4581 if (has_sgx)
4582 decode_feature_control_msr();
4583 }
4584
61a87ba7 4585 if (max_level >= 0x15) {
8a5bdf41
LB		 4586 unsigned int eax_crystal;
4587 unsigned int ebx_tsc;
4588
4589 /*
4590 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4591 */
4592 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5aea2f7f 4593 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
8a5bdf41
LB		 4594
4595 if (ebx_tsc != 0) {
4596
96e47158 4597 if (!quiet && (ebx != 0))
b7d8c148 4598 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
8a5bdf41
LB		 4599 eax_crystal, ebx_tsc, crystal_hz);
4600
4601 if (crystal_hz == 0)
4602 switch(model) {
869ce69e 4603 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
e8efbc80
LB		 4604 crystal_hz = 24000000; /* 24.0 MHz */
4605 break;
f2c4db1b 4606 case INTEL_FAM6_ATOM_GOLDMONT_X: /* DNV */
ec53e594
LB		 4607 crystal_hz = 25000000; /* 25.0 MHz */
4608 break;
869ce69e 4609 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
f2c4db1b 4610 case INTEL_FAM6_ATOM_GOLDMONT_PLUS:
e8efbc80 4611 crystal_hz = 19200000; /* 19.2 MHz */
8a5bdf41
LB		 4612 break;
4613 default:
4614 crystal_hz = 0;
4615 }
4616
4617 if (crystal_hz) {
4618 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
96e47158 4619 if (!quiet)
b7d8c148 4620 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
8a5bdf41
LB		 4621 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
4622 }
4623 }
4624 }
61a87ba7
LB		 4625 if (max_level >= 0x16) {
4626 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4627
4628 /*
4629 * CPUID 16H Base MHz, Max MHz, Bus MHz
4630 */
4631 base_mhz = max_mhz = bus_mhz = edx = 0;
4632
5aea2f7f 4633 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
96e47158 4634 if (!quiet)
b7d8c148 4635 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
61a87ba7
LB		 4636 base_mhz, max_mhz, bus_mhz);
4637 }
8a5bdf41 4638
b2b34dfe
HC		 4639 if (has_aperf)
4640 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4641
812db3f7
LB		 4642 BIC_PRESENT(BIC_IRQ);
4643 BIC_PRESENT(BIC_TSC_MHz);
4644
4645 if (probe_nhm_msrs(family, model)) {
4646 do_nhm_platform_info = 1;
4647 BIC_PRESENT(BIC_CPU_c1);
4648 BIC_PRESENT(BIC_CPU_c3);
4649 BIC_PRESENT(BIC_CPU_c6);
4650 BIC_PRESENT(BIC_SMI);
4651 }
d7899447 4652 do_snb_cstates = has_snb_msrs(family, model);
812db3f7
LB		 4653
4654 if (do_snb_cstates)
4655 BIC_PRESENT(BIC_CPU_c7);
4656
5a63426e 4657 do_irtl_snb = has_snb_msrs(family, model);
0f47c08d
LB		 4658 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4659 BIC_PRESENT(BIC_Pkgpc2);
4660 if (pkg_cstate_limit >= PCL__3)
4661 BIC_PRESENT(BIC_Pkgpc3);
4662 if (pkg_cstate_limit >= PCL__6)
4663 BIC_PRESENT(BIC_Pkgpc6);
4664 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4665 BIC_PRESENT(BIC_Pkgpc7);
0539ba11 4666 if (has_slv_msrs(family, model)) {
0f47c08d
LB		 4667 BIC_NOT_PRESENT(BIC_Pkgpc2);
4668 BIC_NOT_PRESENT(BIC_Pkgpc3);
4669 BIC_PRESENT(BIC_Pkgpc6);
4670 BIC_NOT_PRESENT(BIC_Pkgpc7);
0539ba11
LB		 4671 BIC_PRESENT(BIC_Mod_c6);
4672 use_c1_residency_msr = 1;
4673 }
7170a374
LB		 4674 if (is_dnv(family, model)) {
4675 BIC_PRESENT(BIC_CPU_c1);
4676 BIC_NOT_PRESENT(BIC_CPU_c3);
4677 BIC_NOT_PRESENT(BIC_Pkgpc3);
4678 BIC_NOT_PRESENT(BIC_CPU_c7);
4679 BIC_NOT_PRESENT(BIC_Pkgpc7);
4680 use_c1_residency_msr = 1;
4681 }
34c76197
LB		 4682 if (is_skx(family, model)) {
4683 BIC_NOT_PRESENT(BIC_CPU_c3);
4684 BIC_NOT_PRESENT(BIC_Pkgpc3);
4685 BIC_NOT_PRESENT(BIC_CPU_c7);
4686 BIC_NOT_PRESENT(BIC_Pkgpc7);
4687 }
ade0ebac
LB		 4688 if (is_bdx(family, model)) {
4689 BIC_NOT_PRESENT(BIC_CPU_c7);
4690 BIC_NOT_PRESENT(BIC_Pkgpc7);
4691 }
0f47c08d
LB		 4692 if (has_hsw_msrs(family, model)) {
4693 BIC_PRESENT(BIC_Pkgpc8);
4694 BIC_PRESENT(BIC_Pkgpc9);
4695 BIC_PRESENT(BIC_Pkgpc10);
4696 }
5a63426e 4697 do_irtl_hsw = has_hsw_msrs(family, model);
a99d8730
LB		 4698 if (has_skl_msrs(family, model)) {
4699 BIC_PRESENT(BIC_Totl_c0);
4700 BIC_PRESENT(BIC_Any_c0);
4701 BIC_PRESENT(BIC_GFX_c0);
4702 BIC_PRESENT(BIC_CPUGFX);
4703 }
144b44b1 4704 do_slm_cstates = is_slm(family, model);
fb5d4327 4705 do_knl_cstates = is_knl(family, model);
103a8fea 4706
31a1f15c 4707 if (do_slm_cstates || do_knl_cstates || is_cnl(family, model))
562855ee
LB		 4708 BIC_NOT_PRESENT(BIC_CPU_c3);
4709
96e47158 4710 if (!quiet)
f0057310
LB		 4711 decode_misc_pwr_mgmt_msr();
4712
96e47158 4713 if (!quiet && has_slv_msrs(family, model))
71616c8e
LB		 4714 decode_c6_demotion_policy_msr();
4715
889facbe 4716 rapl_probe(family, model);
3a9a941d 4717 perf_limit_reasons_probe(family, model);
ac980e13 4718 automatic_cstate_conversion_probe(family, model);
889facbe 4719
96e47158 4720 if (!quiet)
1b69317d 4721 dump_cstate_pstate_config_info(family, model);
fcd17211 4722
41618e63
LB		 4723 if (!quiet)
4724 dump_sysfs_cstate_config();
7293fccd
LB		 4725 if (!quiet)
4726 dump_sysfs_pstate_config();
41618e63 4727
a2b7b749
LB		 4728 if (has_skl_msrs(family, model))
4729 calculate_tsc_tweak();
4730
812db3f7
LB		 4731 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4732 BIC_PRESENT(BIC_GFX_rc6);
fdf676e5 4733
812db3f7
LB		 4734 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4735 BIC_PRESENT(BIC_GFXMHz);
27d47356 4736
be0e54c4
LB		 4737 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4738 BIC_PRESENT(BIC_CPU_LPI);
4739 else
4740 BIC_NOT_PRESENT(BIC_CPU_LPI);
4741
4742 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4743 BIC_PRESENT(BIC_SYS_LPI);
4744 else
4745 BIC_NOT_PRESENT(BIC_SYS_LPI);
4746
96e47158 4747 if (!quiet)
33148d67
LB		 4748 decode_misc_feature_control();
4749
889facbe 4750 return;
103a8fea
LB		 4751}
4752
103a8fea
LB		 4753/*
4754 * in /dev/cpu/ return success for names that are numbers
4755 * ie. filter out ".", "..", "microcode".
4756 */
4757int dir_filter(const struct dirent *dirp)
4758{
4759 if (isdigit(dirp->d_name[0]))
4760 return 1;
4761 else
4762 return 0;
4763}
4764
4765int open_dev_cpu_msr(int dummy1)
4766{
4767 return 0;
4768}
4769
c98d5d94
LB		 4770void topology_probe()
4771{
4772 int i;
4773 int max_core_id = 0;
4774 int max_package_id = 0;
4775 int max_siblings = 0;
c98d5d94
LB		 4776
4777 /* Initialize num_cpus, max_cpu_num */
843c5791 4778 set_max_cpu_num();
c98d5d94 4779 topo.num_cpus = 0;
c98d5d94
LB		 4780 for_all_proc_cpus(count_cpus);
4781 if (!summary_only && topo.num_cpus > 1)
812db3f7 4782 BIC_PRESENT(BIC_CPU);
c98d5d94 4783
d8af6f5f 4784 if (debug > 1)
b7d8c148 4785 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
c98d5d94
LB		 4786
4787 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 4788 if (cpus == NULL)
4789 err(1, "calloc cpus");
c98d5d94
LB		 4790
4791 /*
4792 * Allocate and initialize cpu_present_set
4793 */
4794 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4795 if (cpu_present_set == NULL)
4796 err(3, "CPU_ALLOC");
c98d5d94
LB		 4797 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4798 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4799 for_all_proc_cpus(mark_cpu_present);
4800
1ef7d21a
LB		 4801 /*
4802 * Validate that all cpus in cpu_subset are also in cpu_present_set
4803 */
4804 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4805 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4806 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4807 err(1, "cpu%d not present", i);
4808 }
4809
c98d5d94
LB		 4810 /*
4811 * Allocate and initialize cpu_affinity_set
4812 */
4813 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 4814 if (cpu_affinity_set == NULL)
4815 err(3, "CPU_ALLOC");
c98d5d94
LB		 4816 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4817 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4818
8cb48b32 4819 for_all_proc_cpus(init_thread_id);
c98d5d94
LB		 4820
4821 /*
4822 * For online cpus
4823 * find max_core_id, max_package_id
4824 */
4825 for (i = 0; i <= topo.max_cpu_num; ++i) {
4826 int siblings;
4827
4828 if (cpu_is_not_present(i)) {
d8af6f5f 4829 if (debug > 1)
b7d8c148 4830 fprintf(outf, "cpu%d NOT PRESENT\n", i);
c98d5d94
LB		 4831 continue;
4832 }
c98d5d94 4833
0e2d8f05
LB		 4834 cpus[i].logical_cpu_id = i;
4835
4836 /* get package information */
c98d5d94
LB		 4837 cpus[i].physical_package_id = get_physical_package_id(i);
4838 if (cpus[i].physical_package_id > max_package_id)
4839 max_package_id = cpus[i].physical_package_id;
4840
0e2d8f05 4841 /* get numa node information */
ef605741
PB		 4842 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4843 if (cpus[i].physical_node_id > topo.max_node_num)
4844 topo.max_node_num = cpus[i].physical_node_id;
0e2d8f05
LB		 4845
4846 /* get core information */
4847 cpus[i].physical_core_id = get_core_id(i);
4848 if (cpus[i].physical_core_id > max_core_id)
4849 max_core_id = cpus[i].physical_core_id;
4850
4851 /* get thread information */
4852 siblings = get_thread_siblings(&cpus[i]);
c98d5d94
LB		 4853 if (siblings > max_siblings)
4854 max_siblings = siblings;
4f206a0f 4855 if (cpus[i].thread_id == 0)
8cb48b32 4856 topo.num_cores++;
c98d5d94 4857 }
ef605741 4858
70a9c6e8 4859 topo.cores_per_node = max_core_id + 1;
d8af6f5f 4860 if (debug > 1)
b7d8c148 4861 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
70a9c6e8
PB		 4862 max_core_id, topo.cores_per_node);
4863 if (!summary_only && topo.cores_per_node > 1)
812db3f7 4864 BIC_PRESENT(BIC_Core);
c98d5d94
LB		 4865
4866 topo.num_packages = max_package_id + 1;
d8af6f5f 4867 if (debug > 1)
b7d8c148 4868 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
c98d5d94 4869 max_package_id, topo.num_packages);
7da6e3e2 4870 if (!summary_only && topo.num_packages > 1)
812db3f7 4871 BIC_PRESENT(BIC_Package);
c98d5d94 4872
ef605741
PB		 4873 set_node_data();
4874 if (debug > 1)
70a9c6e8 4875 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
01235041
PB		 4876 if (!summary_only && topo.nodes_per_pkg > 1)
4877 BIC_PRESENT(BIC_Node);
ef605741 4878
70a9c6e8 4879 topo.threads_per_core = max_siblings;
d8af6f5f 4880 if (debug > 1)
b7d8c148 4881 fprintf(outf, "max_siblings %d\n", max_siblings);
2ffbb224
PB		 4882
4883 if (debug < 1)
4884 return;
4885
4886 for (i = 0; i <= topo.max_cpu_num; ++i) {
0ec712e3
LB		 4887 if (cpu_is_not_present(i))
4888 continue;
2ffbb224
PB		 4889 fprintf(outf,
4890 "cpu %d pkg %d node %d lnode %d core %d thread %d\n",
4891 i, cpus[i].physical_package_id,
4892 cpus[i].physical_node_id,
4893 cpus[i].logical_node_id,
4894 cpus[i].physical_core_id,
4895 cpus[i].thread_id);
4896 }
4897
c98d5d94
LB		 4898}
4899
4900void
40f5cfe7
PB		 4901allocate_counters(struct thread_data **t, struct core_data **c,
4902 struct pkg_data **p)
c98d5d94
LB		 4903{
4904 int i;
40f5cfe7
PB		 4905 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
4906 topo.num_packages;
4907 int num_threads = topo.threads_per_core * num_cores;
c98d5d94 4908
40f5cfe7 4909 *t = calloc(num_threads, sizeof(struct thread_data));
c98d5d94
LB		 4910 if (*t == NULL)
4911 goto error;
4912
40f5cfe7 4913 for (i = 0; i < num_threads; i++)
c98d5d94
LB		 4914 (*t)[i].cpu_id = -1;
4915
40f5cfe7 4916 *c = calloc(num_cores, sizeof(struct core_data));
c98d5d94
LB		 4917 if (*c == NULL)
4918 goto error;
4919
40f5cfe7 4920 for (i = 0; i < num_cores; i++)
c98d5d94
LB		 4921 (*c)[i].core_id = -1;
4922
678a3bd1 4923 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
c98d5d94
LB		 4924 if (*p == NULL)
4925 goto error;
4926
4927 for (i = 0; i < topo.num_packages; i++)
4928 (*p)[i].package_id = i;
4929
4930 return;
4931error:
b2c95d90 4932 err(1, "calloc counters");
c98d5d94
LB		 4933}
4934/*
4935 * init_counter()
4936 *
c98d5d94 4937 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
c98d5d94
LB		 4938 */
4939void init_counter(struct thread_data *thread_base, struct core_data *core_base,
8cb48b32 4940 struct pkg_data *pkg_base, int cpu_id)
c98d5d94 4941{
8cb48b32 4942 int pkg_id = cpus[cpu_id].physical_package_id;
40f5cfe7 4943 int node_id = cpus[cpu_id].logical_node_id;
8cb48b32
PB		 4944 int core_id = cpus[cpu_id].physical_core_id;
4945 int thread_id = cpus[cpu_id].thread_id;
c98d5d94
LB		 4946 struct thread_data *t;
4947 struct core_data *c;
4948 struct pkg_data *p;
4949
42dd4520
NC		 4950
4951 /* Workaround for systems where physical_node_id==-1
4952 * and logical_node_id==(-1 - topo.num_cpus)
4953 */
4954 if (node_id < 0)
4955 node_id = 0;
4956
40f5cfe7
PB		 4957 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
4958 c = GET_CORE(core_base, core_id, node_id, pkg_id);
8cb48b32 4959 p = GET_PKG(pkg_base, pkg_id);
c98d5d94
LB		 4960
4961 t->cpu_id = cpu_id;
8cb48b32 4962 if (thread_id == 0) {
c98d5d94
LB		 4963 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
4964 if (cpu_is_first_core_in_package(cpu_id))
4965 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
4966 }
4967
8cb48b32
PB		 4968 c->core_id = core_id;
4969 p->package_id = pkg_id;
c98d5d94
LB		 4970}
4971
4972
4973int initialize_counters(int cpu_id)
4974{
8cb48b32
PB		 4975 init_counter(EVEN_COUNTERS, cpu_id);
4976 init_counter(ODD_COUNTERS, cpu_id);
c98d5d94
LB		 4977 return 0;
4978}
4979
4980void allocate_output_buffer()
4981{
3b4d5c7f 4982 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 4983 outp = output_buffer;
b2c95d90
JT		 4984 if (outp == NULL)
4985 err(-1, "calloc output buffer");
c98d5d94 4986}
36229897
LB		 4987void allocate_fd_percpu(void)
4988{
01a67adf 4989 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
36229897
LB		 4990 if (fd_percpu == NULL)
4991 err(-1, "calloc fd_percpu");
4992}
562a2d37
LB		 4993void allocate_irq_buffers(void)
4994{
4995 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
4996 if (irq_column_2_cpu == NULL)
4997 err(-1, "calloc %d", topo.num_cpus);
c98d5d94 4998
01a67adf 4999 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
562a2d37 5000 if (irqs_per_cpu == NULL)
01a67adf 5001 err(-1, "calloc %d", topo.max_cpu_num + 1);
562a2d37 5002}
c98d5d94
LB		 5003void setup_all_buffers(void)
5004{
5005 topology_probe();
562a2d37 5006 allocate_irq_buffers();
36229897 5007 allocate_fd_percpu();
c98d5d94
LB		 5008 allocate_counters(&thread_even, &core_even, &package_even);
5009 allocate_counters(&thread_odd, &core_odd, &package_odd);
5010 allocate_output_buffer();
5011 for_all_proc_cpus(initialize_counters);
5012}
3b4d5c7f 5013
7ce7d5de
PB		 5014void set_base_cpu(void)
5015{
5016 base_cpu = sched_getcpu();
5017 if (base_cpu < 0)
5018 err(-ENODEV, "No valid cpus found");
5019
5020 if (debug > 1)
b7d8c148 5021 fprintf(outf, "base_cpu = %d\n", base_cpu);
7ce7d5de
PB		 5022}
5023
103a8fea
LB		 5024void turbostat_init()
5025{
7ce7d5de
PB		 5026 setup_all_buffers();
5027 set_base_cpu();
103a8fea 5028 check_dev_msr();
98481e79 5029 check_permissions();
fcd17211 5030 process_cpuid();
103a8fea 5031
103a8fea 5032
96e47158 5033 if (!quiet)
7f5c258e
LB		 5034 for_all_cpus(print_hwp, ODD_COUNTERS);
5035
96e47158 5036 if (!quiet)
889facbe
LB		 5037 for_all_cpus(print_epb, ODD_COUNTERS);
5038
96e47158 5039 if (!quiet)
3a9a941d
LB		 5040 for_all_cpus(print_perf_limit, ODD_COUNTERS);
5041
96e47158 5042 if (!quiet)
889facbe
LB		 5043 for_all_cpus(print_rapl, ODD_COUNTERS);
5044
5045 for_all_cpus(set_temperature_target, ODD_COUNTERS);
5046
96e47158 5047 if (!quiet)
889facbe 5048 for_all_cpus(print_thermal, ODD_COUNTERS);
5a63426e 5049
96e47158 5050 if (!quiet && do_irtl_snb)
5a63426e 5051 print_irtl();
103a8fea
LB		 5052}
5053
5054int fork_it(char **argv)
5055{
103a8fea 5056 pid_t child_pid;
d91bb17c 5057 int status;
d15cf7c1 5058
218f0e8d 5059 snapshot_proc_sysfs_files();
d91bb17c 5060 status = for_all_cpus(get_counters, EVEN_COUNTERS);
4c2122d4 5061 first_counter_read = 0;
d91bb17c
LB		 5062 if (status)
5063 exit(status);
c98d5d94
LB		 5064 /* clear affinity side-effect of get_counters() */
5065 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 5066 gettimeofday(&tv_even, (struct timezone *)NULL);
5067
5068 child_pid = fork();
5069 if (!child_pid) {
5070 /* child */
5071 execvp(argv[0], argv);
0815a3d0 5072 err(errno, "exec %s", argv[0]);
103a8fea 5073 } else {
103a8fea
LB		 5074
5075 /* parent */
b2c95d90
JT		 5076 if (child_pid == -1)
5077 err(1, "fork");
103a8fea
LB		 5078
5079 signal(SIGINT, SIG_IGN);
5080 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 5081 if (waitpid(child_pid, &status, 0) == -1)
5082 err(status, "waitpid");
103a8fea 5083 }
c98d5d94
LB		 5084 /*
5085 * n.b. fork_it() does not check for errors from for_all_cpus()
5086 * because re-starting is problematic when forking
5087 */
218f0e8d 5088 snapshot_proc_sysfs_files();
c98d5d94 5089 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 5090 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 5091 timersub(&tv_odd, &tv_even, &tv_delta);
ba3dec99
LB		 5092 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
5093 fprintf(outf, "%s: Counter reset detected\n", progname);
5094 else {
5095 compute_average(EVEN_COUNTERS);
5096 format_all_counters(EVEN_COUNTERS);
5097 }
103a8fea 5098
b7d8c148
LB		 5099 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
5100
5101 flush_output_stderr();
103a8fea 5102
d91bb17c 5103 return status;
103a8fea
LB		 5104}
5105
3b4d5c7f
AS		 5106int get_and_dump_counters(void)
5107{
5108 int status;
5109
218f0e8d 5110 snapshot_proc_sysfs_files();
3b4d5c7f
AS		 5111 status = for_all_cpus(get_counters, ODD_COUNTERS);
5112 if (status)
5113 return status;
5114
5115 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5116 if (status)
5117 return status;
5118
b7d8c148 5119 flush_output_stdout();
3b4d5c7f
AS		 5120
5121 return status;
5122}
5123
d8af6f5f 5124void print_version() {
538c48f2 5125 fprintf(outf, "turbostat version 18.07.27"
d8af6f5f
LB		 5126 " - Len Brown <lenb@kernel.org>\n");
5127}
5128
495c7654
LB		 5129int add_counter(unsigned int msr_num, char *path, char *name,
5130 unsigned int width, enum counter_scope scope,
41618e63 5131 enum counter_type type, enum counter_format format, int flags)
388e9c81
LB		 5132{
5133 struct msr_counter *msrp;
5134
5135 msrp = calloc(1, sizeof(struct msr_counter));
5136 if (msrp == NULL) {
5137 perror("calloc");
5138 exit(1);
5139 }
5140
5141 msrp->msr_num = msr_num;
5142 strncpy(msrp->name, name, NAME_BYTES);
495c7654
LB		 5143 if (path)
5144 strncpy(msrp->path, path, PATH_BYTES);
388e9c81
LB		 5145 msrp->width = width;
5146 msrp->type = type;
5147 msrp->format = format;
41618e63 5148 msrp->flags = flags;
388e9c81
LB		 5149
5150 switch (scope) {
5151
5152 case SCOPE_CPU:
388e9c81
LB		 5153 msrp->next = sys.tp;
5154 sys.tp = msrp;
678a3bd1 5155 sys.added_thread_counters++;
0748eaf0 5156 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
678a3bd1
LB		 5157 fprintf(stderr, "exceeded max %d added thread counters\n",
5158 MAX_ADDED_COUNTERS);
5159 exit(-1);
5160 }
388e9c81
LB		 5161 break;
5162
5163 case SCOPE_CORE:
388e9c81
LB		 5164 msrp->next = sys.cp;
5165 sys.cp = msrp;
678a3bd1
LB		 5166 sys.added_core_counters++;
5167 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5168 fprintf(stderr, "exceeded max %d added core counters\n",
5169 MAX_ADDED_COUNTERS);
5170 exit(-1);
5171 }
388e9c81
LB		 5172 break;
5173
5174 case SCOPE_PACKAGE:
388e9c81
LB		 5175 msrp->next = sys.pp;
5176 sys.pp = msrp;
678a3bd1
LB		 5177 sys.added_package_counters++;
5178 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5179 fprintf(stderr, "exceeded max %d added package counters\n",
5180 MAX_ADDED_COUNTERS);
5181 exit(-1);
5182 }
388e9c81
LB		 5183 break;
5184 }
5185
5186 return 0;
5187}
5188
5189void parse_add_command(char *add_command)
5190{
5191 int msr_num = 0;
495c7654 5192 char *path = NULL;
0f47c08d 5193 char name_buffer[NAME_BYTES] = "";
388e9c81
LB		 5194 int width = 64;
5195 int fail = 0;
5196 enum counter_scope scope = SCOPE_CPU;
5197 enum counter_type type = COUNTER_CYCLES;
5198 enum counter_format format = FORMAT_DELTA;
5199
5200 while (add_command) {
5201
5202 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5203 goto next;
5204
5205 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5206 goto next;
5207
495c7654
LB		 5208 if (*add_command == '/') {
5209 path = add_command;
5210 goto next;
5211 }
5212
388e9c81
LB		 5213 if (sscanf(add_command, "u%d", &width) == 1) {
5214 if ((width == 32) || (width == 64))
5215 goto next;
5216 width = 64;
5217 }
5218 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5219 scope = SCOPE_CPU;
5220 goto next;
5221 }
5222 if (!strncmp(add_command, "core", strlen("core"))) {
5223 scope = SCOPE_CORE;
5224 goto next;
5225 }
5226 if (!strncmp(add_command, "package", strlen("package"))) {
5227 scope = SCOPE_PACKAGE;
5228 goto next;
5229 }
5230 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5231 type = COUNTER_CYCLES;
5232 goto next;
5233 }
5234 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5235 type = COUNTER_SECONDS;
5236 goto next;
5237 }
41618e63
LB		 5238 if (!strncmp(add_command, "usec", strlen("usec"))) {
5239 type = COUNTER_USEC;
5240 goto next;
5241 }
388e9c81
LB		 5242 if (!strncmp(add_command, "raw", strlen("raw"))) {
5243 format = FORMAT_RAW;
5244 goto next;
5245 }
5246 if (!strncmp(add_command, "delta", strlen("delta"))) {
5247 format = FORMAT_DELTA;
5248 goto next;
5249 }
5250 if (!strncmp(add_command, "percent", strlen("percent"))) {
5251 format = FORMAT_PERCENT;
5252 goto next;
5253 }
5254
5255 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5256 char *eos;
5257
5258 eos = strchr(name_buffer, ',');
5259 if (eos)
5260 *eos = '\0';
5261 goto next;
5262 }
5263
5264next:
5265 add_command = strchr(add_command, ',');
495c7654
LB		 5266 if (add_command) {
5267 *add_command = '\0';
388e9c81 5268 add_command++;
495c7654 5269 }
388e9c81
LB		 5270
5271 }
495c7654
LB		 5272 if ((msr_num == 0) && (path == NULL)) {
5273 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
388e9c81
LB		 5274 fail++;
5275 }
5276
5277 /* generate default column header */
5278 if (*name_buffer == '\0') {
5f3aea57
LB		 5279 if (width == 32)
5280 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5281 else
5282 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
388e9c81
LB		 5283 }
5284
41618e63 5285 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
388e9c81
LB		 5286 fail++;
5287
5288 if (fail) {
5289 help();
5290 exit(1);
5291 }
5292}
41618e63 5293
dd778a5e
LB		 5294int is_deferred_skip(char *name)
5295{
5296 int i;
5297
5298 for (i = 0; i < deferred_skip_index; ++i)
5299 if (!strcmp(name, deferred_skip_names[i]))
5300 return 1;
5301 return 0;
5302}
5303
41618e63
LB		 5304void probe_sysfs(void)
5305{
5306 char path[64];
5307 char name_buf[16];
5308 FILE *input;
5309 int state;
5310 char *sp;
5311
5312 if (!DO_BIC(BIC_sysfs))
5313 return;
5314
0748eaf0 5315 for (state = 10; state >= 0; --state) {
41618e63
LB		 5316
5317 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5318 base_cpu, state);
5319 input = fopen(path, "r");
5320 if (input == NULL)
5321 continue;
5322 fgets(name_buf, sizeof(name_buf), input);
5323
5324 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5325 sp = strchr(name_buf, '-');
5326 if (!sp)
5327 sp = strchrnul(name_buf, '\n');
5328 *sp = '%';
5329 *(sp + 1) = '\0';
5330
5331 fclose(input);
5332
5333 sprintf(path, "cpuidle/state%d/time", state);
5334
dd778a5e
LB		 5335 if (is_deferred_skip(name_buf))
5336 continue;
5337
41618e63
LB		 5338 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5339 FORMAT_PERCENT, SYSFS_PERCPU);
5340 }
5341
0748eaf0 5342 for (state = 10; state >= 0; --state) {
41618e63
LB		 5343
5344 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5345 base_cpu, state);
5346 input = fopen(path, "r");
5347 if (input == NULL)
5348 continue;
5349 fgets(name_buf, sizeof(name_buf), input);
5350 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5351 sp = strchr(name_buf, '-');
5352 if (!sp)
5353 sp = strchrnul(name_buf, '\n');
5354 *sp = '\0';
5355 fclose(input);
5356
5357 sprintf(path, "cpuidle/state%d/usage", state);
5358
dd778a5e
LB		 5359 if (is_deferred_skip(name_buf))
5360 continue;
5361
41618e63
LB		 5362 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5363 FORMAT_DELTA, SYSFS_PERCPU);
5364 }
5365
5366}
5367
1ef7d21a
LB		 5368
5369/*
5370 * parse cpuset with following syntax
5371 * 1,2,4..6,8-10 and set bits in cpu_subset
5372 */
5373void parse_cpu_command(char *optarg)
5374{
5375 unsigned int start, end;
5376 char *next;
5377
4e4e1e7c
LB		 5378 if (!strcmp(optarg, "core")) {
5379 if (cpu_subset)
5380 goto error;
5381 show_core_only++;
5382 return;
5383 }
5384 if (!strcmp(optarg, "package")) {
5385 if (cpu_subset)
5386 goto error;
5387 show_pkg_only++;
5388 return;
5389 }
5390 if (show_core_only || show_pkg_only)
5391 goto error;
5392
1ef7d21a
LB		 5393 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5394 if (cpu_subset == NULL)
5395 err(3, "CPU_ALLOC");
5396 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5397
5398 CPU_ZERO_S(cpu_subset_size, cpu_subset);
5399
5400 next = optarg;
5401
5402 while (next && *next) {
5403
5404 if (*next == '-') /* no negative cpu numbers */
5405 goto error;
5406
5407 start = strtoul(next, &next, 10);
5408
5409 if (start >= CPU_SUBSET_MAXCPUS)
5410 goto error;
5411 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5412
5413 if (*next == '\0')
5414 break;
5415
5416 if (*next == ',') {
5417 next += 1;
5418 continue;
5419 }
5420
5421 if (*next == '-') {
5422 next += 1; /* start range */
5423 } else if (*next == '.') {
5424 next += 1;
5425 if (*next == '.')
5426 next += 1; /* start range */
5427 else
5428 goto error;
5429 }
5430
5431 end = strtoul(next, &next, 10);
5432 if (end <= start)
5433 goto error;
5434
5435 while (++start <= end) {
5436 if (start >= CPU_SUBSET_MAXCPUS)
5437 goto error;
5438 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5439 }
5440
5441 if (*next == ',')
5442 next += 1;
5443 else if (*next != '\0')
5444 goto error;
5445 }
5446
5447 return;
5448
5449error:
4e4e1e7c
LB		 5450 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5451 help();
1ef7d21a
LB		 5452 exit(-1);
5453}
5454
812db3f7 5455
103a8fea
LB		 5456void cmdline(int argc, char **argv)
5457{
5458 int opt;
d8af6f5f
LB		 5459 int option_index = 0;
5460 static struct option long_options[] = {
388e9c81 5461 {"add", required_argument, 0, 'a'},
1ef7d21a 5462 {"cpu", required_argument, 0, 'c'},
d8af6f5f 5463 {"Dump", no_argument, 0, 'D'},
96e47158 5464 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
3f44a5c6 5465 {"enable", required_argument, 0, 'e'},
d8af6f5f 5466 {"interval", required_argument, 0, 'i'},
023fe0ac 5467 {"num_iterations", required_argument, 0, 'n'},
d8af6f5f 5468 {"help", no_argument, 0, 'h'},
812db3f7 5469 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
d8af6f5f 5470 {"Joules", no_argument, 0, 'J'},
c8ade361 5471 {"list", no_argument, 0, 'l'},
b7d8c148 5472 {"out", required_argument, 0, 'o'},
96e47158 5473 {"quiet", no_argument, 0, 'q'},
812db3f7 5474 {"show", required_argument, 0, 's'},
d8af6f5f
LB		 5475 {"Summary", no_argument, 0, 'S'},
5476 {"TCC", required_argument, 0, 'T'},
5477 {"version", no_argument, 0, 'v' },
5478 {0, 0, 0, 0 }
5479 };
103a8fea
LB		 5480
5481 progname = argv[0];
5482
023fe0ac 5483 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
d8af6f5f 5484 long_options, &option_index)) != -1) {
103a8fea 5485 switch (opt) {
388e9c81
LB		 5486 case 'a':
5487 parse_add_command(optarg);
5488 break;
1ef7d21a
LB		 5489 case 'c':
5490 parse_cpu_command(optarg);
5491 break;
d8af6f5f 5492 case 'D':
3b4d5c7f
AS		 5493 dump_only++;
5494 break;
3f44a5c6
LB		 5495 case 'e':
5496 /* --enable specified counter */
4c2122d4 5497 bic_enabled = bic_enabled | bic_lookup(optarg, SHOW_LIST);
3f44a5c6 5498 break;
d8af6f5f
LB		 5499 case 'd':
5500 debug++;
3f44a5c6 5501 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
103a8fea 5502 break;
812db3f7 5503 case 'H':
3f44a5c6
LB		 5504 /*
5505 * --hide: do not show those specified
5506 * multiple invocations simply clear more bits in enabled mask
5507 */
5508 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
812db3f7 5509 break;
d8af6f5f
LB		 5510 case 'h':
5511 default:
5512 help();
5513 exit(1);
103a8fea 5514 case 'i':
2a0609c0
LB		 5515 {
5516 double interval = strtod(optarg, NULL);
5517
5518 if (interval < 0.001) {
b7d8c148 5519 fprintf(outf, "interval %f seconds is too small\n",
2a0609c0
LB		 5520 interval);
5521 exit(2);
5522 }
5523
47936f94 5524 interval_tv.tv_sec = interval_ts.tv_sec = interval;
b9ad8ee0 5525 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
47936f94 5526 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
2a0609c0 5527 }
103a8fea 5528 break;
d8af6f5f
LB		 5529 case 'J':
5530 rapl_joules++;
8e180f3c 5531 break;
c8ade361 5532 case 'l':
3f44a5c6 5533 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
c8ade361
LB		 5534 list_header_only++;
5535 quiet++;
5536 break;
b7d8c148
LB		 5537 case 'o':
5538 outf = fopen_or_die(optarg, "w");
5539 break;
96e47158
LB		 5540 case 'q':
5541 quiet = 1;
5542 break;
023fe0ac
CY		 5543 case 'n':
5544 num_iterations = strtod(optarg, NULL);
5545
5546 if (num_iterations <= 0) {
5547 fprintf(outf, "iterations %d should be positive number\n",
5548 num_iterations);
5549 exit(2);
5550 }
5551 break;
812db3f7 5552 case 's':
3f44a5c6
LB		 5553 /*
5554 * --show: show only those specified
5555 * The 1st invocation will clear and replace the enabled mask
5556 * subsequent invocations can add to it.
5557 */
5558 if (shown == 0)
5559 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5560 else
5561 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5562 shown = 1;
812db3f7 5563 break;
d8af6f5f
LB		 5564 case 'S':
5565 summary_only++;
889facbe
LB		 5566 break;
5567 case 'T':
5568 tcc_activation_temp_override = atoi(optarg);
5569 break;
d8af6f5f
LB		 5570 case 'v':
5571 print_version();
5572 exit(0);
5c56be9a 5573 break;
103a8fea
LB		 5574 }
5575 }
5576}
5577
5578int main(int argc, char **argv)
5579{
b7d8c148 5580 outf = stderr;
103a8fea
LB		 5581 cmdline(argc, argv);
5582
96e47158 5583 if (!quiet)
d8af6f5f 5584 print_version();
103a8fea 5585
41618e63
LB		 5586 probe_sysfs();
5587
103a8fea
LB		 5588 turbostat_init();
5589
3b4d5c7f
AS		 5590 /* dump counters and exit */
5591 if (dump_only)
5592 return get_and_dump_counters();
5593
c8ade361
LB		 5594 /* list header and exit */
5595 if (list_header_only) {
5596 print_header(",");
5597 flush_output_stdout();
5598 return 0;
5599 }
5600
103a8fea
LB		 5601 /*
5602 * if any params left, it must be a command to fork
5603 */
5604 if (argc - optind)
5605 return fork_it(argv + optind);
5606 else
5607 turbostat_loop();
5608
5609 return 0;
5610}
Linux 6.x block layer and io_uring tree(s)